1 // SPDX-License-Identifier: GPL-2.0
2 /* Copyright(c) 2017 - 2019 Pensando Systems, Inc */
3 
4 #include <linux/module.h>
5 #include <linux/netdevice.h>
6 #include <linux/etherdevice.h>
7 #include <linux/pci.h>
8 
9 #include "ionic.h"
10 #include "ionic_bus.h"
11 #include "ionic_lif.h"
12 #include "ionic_debugfs.h"
13 
14 /* Supported devices */
15 static const struct pci_device_id ionic_id_table[] = {
16 	{ PCI_VDEVICE(PENSANDO, PCI_DEVICE_ID_PENSANDO_IONIC_ETH_PF) },
17 	{ PCI_VDEVICE(PENSANDO, PCI_DEVICE_ID_PENSANDO_IONIC_ETH_VF) },
18 	{ PCI_VDEVICE(PENSANDO, PCI_DEVICE_ID_PENSANDO_IONIC_ETH_MGMT) },
19 	{ 0, }	/* end of table */
20 };
21 MODULE_DEVICE_TABLE(pci, ionic_id_table);
22 
23 int ionic_bus_get_irq(struct ionic *ionic, unsigned int num)
24 {
25 	return pci_irq_vector(ionic->pdev, num);
26 }
27 
28 const char *ionic_bus_info(struct ionic *ionic)
29 {
30 	return pci_name(ionic->pdev);
31 }
32 
33 int ionic_bus_alloc_irq_vectors(struct ionic *ionic, unsigned int nintrs)
34 {
35 	return pci_alloc_irq_vectors(ionic->pdev, nintrs, nintrs,
36 				     PCI_IRQ_MSIX);
37 }
38 
39 void ionic_bus_free_irq_vectors(struct ionic *ionic)
40 {
41 	if (!ionic->nintrs)
42 		return;
43 
44 	pci_free_irq_vectors(ionic->pdev);
45 }
46 
47 static int ionic_map_bars(struct ionic *ionic)
48 {
49 	struct pci_dev *pdev = ionic->pdev;
50 	struct device *dev = ionic->dev;
51 	struct ionic_dev_bar *bars;
52 	unsigned int i, j;
53 
54 	bars = ionic->bars;
55 	ionic->num_bars = 0;
56 
57 	for (i = 0, j = 0; i < IONIC_BARS_MAX; i++) {
58 		if (!(pci_resource_flags(pdev, i) & IORESOURCE_MEM))
59 			continue;
60 		bars[j].len = pci_resource_len(pdev, i);
61 
62 		/* only map the whole bar 0 */
63 		if (j > 0) {
64 			bars[j].vaddr = NULL;
65 		} else {
66 			bars[j].vaddr = pci_iomap(pdev, i, bars[j].len);
67 			if (!bars[j].vaddr) {
68 				dev_err(dev,
69 					"Cannot memory-map BAR %d, aborting\n",
70 					i);
71 				return -ENODEV;
72 			}
73 		}
74 
75 		bars[j].bus_addr = pci_resource_start(pdev, i);
76 		bars[j].res_index = i;
77 		ionic->num_bars++;
78 		j++;
79 	}
80 
81 	return 0;
82 }
83 
84 static void ionic_unmap_bars(struct ionic *ionic)
85 {
86 	struct ionic_dev_bar *bars = ionic->bars;
87 	unsigned int i;
88 
89 	for (i = 0; i < IONIC_BARS_MAX; i++) {
90 		if (bars[i].vaddr) {
91 			iounmap(bars[i].vaddr);
92 			bars[i].bus_addr = 0;
93 			bars[i].vaddr = NULL;
94 			bars[i].len = 0;
95 		}
96 	}
97 }
98 
99 void __iomem *ionic_bus_map_dbpage(struct ionic *ionic, int page_num)
100 {
101 	return pci_iomap_range(ionic->pdev,
102 			       ionic->bars[IONIC_PCI_BAR_DBELL].res_index,
103 			       (u64)page_num << PAGE_SHIFT, PAGE_SIZE);
104 }
105 
106 void ionic_bus_unmap_dbpage(struct ionic *ionic, void __iomem *page)
107 {
108 	iounmap(page);
109 }
110 
111 static void ionic_vf_dealloc_locked(struct ionic *ionic)
112 {
113 	struct ionic_vf *v;
114 	dma_addr_t dma = 0;
115 	int i;
116 
117 	if (!ionic->vfs)
118 		return;
119 
120 	for (i = ionic->num_vfs - 1; i >= 0; i--) {
121 		v = &ionic->vfs[i];
122 
123 		if (v->stats_pa) {
124 			(void)ionic_set_vf_config(ionic, i,
125 						  IONIC_VF_ATTR_STATSADDR,
126 						  (u8 *)&dma);
127 			dma_unmap_single(ionic->dev, v->stats_pa,
128 					 sizeof(v->stats), DMA_FROM_DEVICE);
129 			v->stats_pa = 0;
130 		}
131 	}
132 
133 	kfree(ionic->vfs);
134 	ionic->vfs = NULL;
135 	ionic->num_vfs = 0;
136 }
137 
138 static void ionic_vf_dealloc(struct ionic *ionic)
139 {
140 	down_write(&ionic->vf_op_lock);
141 	ionic_vf_dealloc_locked(ionic);
142 	up_write(&ionic->vf_op_lock);
143 }
144 
145 static int ionic_vf_alloc(struct ionic *ionic, int num_vfs)
146 {
147 	struct ionic_vf *v;
148 	int err = 0;
149 	int i;
150 
151 	down_write(&ionic->vf_op_lock);
152 
153 	ionic->vfs = kcalloc(num_vfs, sizeof(struct ionic_vf), GFP_KERNEL);
154 	if (!ionic->vfs) {
155 		err = -ENOMEM;
156 		goto out;
157 	}
158 
159 	for (i = 0; i < num_vfs; i++) {
160 		v = &ionic->vfs[i];
161 		v->stats_pa = dma_map_single(ionic->dev, &v->stats,
162 					     sizeof(v->stats), DMA_FROM_DEVICE);
163 		if (dma_mapping_error(ionic->dev, v->stats_pa)) {
164 			v->stats_pa = 0;
165 			err = -ENODEV;
166 			goto out;
167 		}
168 
169 		/* ignore failures from older FW, we just won't get stats */
170 		(void)ionic_set_vf_config(ionic, i, IONIC_VF_ATTR_STATSADDR,
171 					  (u8 *)&v->stats_pa);
172 		ionic->num_vfs++;
173 	}
174 
175 out:
176 	if (err)
177 		ionic_vf_dealloc_locked(ionic);
178 	up_write(&ionic->vf_op_lock);
179 	return err;
180 }
181 
182 static int ionic_sriov_configure(struct pci_dev *pdev, int num_vfs)
183 {
184 	struct ionic *ionic = pci_get_drvdata(pdev);
185 	struct device *dev = ionic->dev;
186 	int ret = 0;
187 
188 	if (num_vfs > 0) {
189 		ret = pci_enable_sriov(pdev, num_vfs);
190 		if (ret) {
191 			dev_err(dev, "Cannot enable SRIOV: %d\n", ret);
192 			goto out;
193 		}
194 
195 		ret = ionic_vf_alloc(ionic, num_vfs);
196 		if (ret) {
197 			dev_err(dev, "Cannot alloc VFs: %d\n", ret);
198 			pci_disable_sriov(pdev);
199 			goto out;
200 		}
201 
202 		ret = num_vfs;
203 	} else {
204 		pci_disable_sriov(pdev);
205 		ionic_vf_dealloc(ionic);
206 	}
207 
208 out:
209 	return ret;
210 }
211 
212 static int ionic_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
213 {
214 	struct device *dev = &pdev->dev;
215 	struct ionic *ionic;
216 	int num_vfs;
217 	int err;
218 
219 	ionic = ionic_devlink_alloc(dev);
220 	if (!ionic)
221 		return -ENOMEM;
222 
223 	ionic->pdev = pdev;
224 	ionic->dev = dev;
225 	pci_set_drvdata(pdev, ionic);
226 	mutex_init(&ionic->dev_cmd_lock);
227 
228 	ionic->is_mgmt_nic =
229 		ent->device == PCI_DEVICE_ID_PENSANDO_IONIC_ETH_MGMT;
230 
231 	/* Query system for DMA addressing limitation for the device. */
232 	err = dma_set_mask_and_coherent(dev, DMA_BIT_MASK(IONIC_ADDR_LEN));
233 	if (err) {
234 		dev_err(dev, "Unable to obtain 64-bit DMA for consistent allocations, aborting.  err=%d\n",
235 			err);
236 		goto err_out_clear_drvdata;
237 	}
238 
239 	ionic_debugfs_add_dev(ionic);
240 
241 	/* Setup PCI device */
242 	err = pci_enable_device_mem(pdev);
243 	if (err) {
244 		dev_err(dev, "Cannot enable PCI device: %d, aborting\n", err);
245 		goto err_out_debugfs_del_dev;
246 	}
247 
248 	err = pci_request_regions(pdev, IONIC_DRV_NAME);
249 	if (err) {
250 		dev_err(dev, "Cannot request PCI regions: %d, aborting\n", err);
251 		goto err_out_pci_disable_device;
252 	}
253 
254 	pci_set_master(pdev);
255 	if (!ionic->is_mgmt_nic)
256 		pcie_print_link_status(pdev);
257 
258 	err = ionic_map_bars(ionic);
259 	if (err)
260 		goto err_out_pci_clear_master;
261 
262 	/* Configure the device */
263 	err = ionic_setup(ionic);
264 	if (err) {
265 		dev_err(dev, "Cannot setup device: %d, aborting\n", err);
266 		goto err_out_unmap_bars;
267 	}
268 
269 	err = ionic_identify(ionic);
270 	if (err) {
271 		dev_err(dev, "Cannot identify device: %d, aborting\n", err);
272 		goto err_out_teardown;
273 	}
274 
275 	err = ionic_init(ionic);
276 	if (err) {
277 		dev_err(dev, "Cannot init device: %d, aborting\n", err);
278 		goto err_out_teardown;
279 	}
280 
281 	/* Configure the ports */
282 	err = ionic_port_identify(ionic);
283 	if (err) {
284 		dev_err(dev, "Cannot identify port: %d, aborting\n", err);
285 		goto err_out_reset;
286 	}
287 
288 	err = ionic_port_init(ionic);
289 	if (err) {
290 		dev_err(dev, "Cannot init port: %d, aborting\n", err);
291 		goto err_out_reset;
292 	}
293 
294 	/* Configure LIFs */
295 	err = ionic_lif_identify(ionic, IONIC_LIF_TYPE_CLASSIC,
296 				 &ionic->ident.lif);
297 	if (err) {
298 		dev_err(dev, "Cannot identify LIFs: %d, aborting\n", err);
299 		goto err_out_port_reset;
300 	}
301 
302 	err = ionic_lifs_size(ionic);
303 	if (err) {
304 		dev_err(dev, "Cannot size LIFs: %d, aborting\n", err);
305 		goto err_out_port_reset;
306 	}
307 
308 	err = ionic_lifs_alloc(ionic);
309 	if (err) {
310 		dev_err(dev, "Cannot allocate LIFs: %d, aborting\n", err);
311 		goto err_out_free_irqs;
312 	}
313 
314 	err = ionic_lifs_init(ionic);
315 	if (err) {
316 		dev_err(dev, "Cannot init LIFs: %d, aborting\n", err);
317 		goto err_out_free_lifs;
318 	}
319 
320 	init_rwsem(&ionic->vf_op_lock);
321 	num_vfs = pci_num_vf(pdev);
322 	if (num_vfs) {
323 		dev_info(dev, "%d VFs found already enabled\n", num_vfs);
324 		err = ionic_vf_alloc(ionic, num_vfs);
325 		if (err)
326 			dev_err(dev, "Cannot enable existing VFs: %d\n", err);
327 	}
328 
329 	err = ionic_lifs_register(ionic);
330 	if (err) {
331 		dev_err(dev, "Cannot register LIFs: %d, aborting\n", err);
332 		goto err_out_deinit_lifs;
333 	}
334 
335 	err = ionic_devlink_register(ionic);
336 	if (err) {
337 		dev_err(dev, "Cannot register devlink: %d\n", err);
338 		goto err_out_deregister_lifs;
339 	}
340 
341 	return 0;
342 
343 err_out_deregister_lifs:
344 	ionic_lifs_unregister(ionic);
345 err_out_deinit_lifs:
346 	ionic_vf_dealloc(ionic);
347 	ionic_lifs_deinit(ionic);
348 err_out_free_lifs:
349 	ionic_lifs_free(ionic);
350 err_out_free_irqs:
351 	ionic_bus_free_irq_vectors(ionic);
352 err_out_port_reset:
353 	ionic_port_reset(ionic);
354 err_out_reset:
355 	ionic_reset(ionic);
356 err_out_teardown:
357 	ionic_dev_teardown(ionic);
358 	/* Don't fail the probe for these errors, keep
359 	 * the hw interface around for inspection
360 	 */
361 	return 0;
362 
363 err_out_unmap_bars:
364 	ionic_unmap_bars(ionic);
365 	pci_release_regions(pdev);
366 err_out_pci_clear_master:
367 	pci_clear_master(pdev);
368 err_out_pci_disable_device:
369 	pci_disable_device(pdev);
370 err_out_debugfs_del_dev:
371 	ionic_debugfs_del_dev(ionic);
372 err_out_clear_drvdata:
373 	mutex_destroy(&ionic->dev_cmd_lock);
374 	ionic_devlink_free(ionic);
375 
376 	return err;
377 }
378 
379 static void ionic_remove(struct pci_dev *pdev)
380 {
381 	struct ionic *ionic = pci_get_drvdata(pdev);
382 
383 	if (!ionic)
384 		return;
385 
386 	if (ionic->master_lif) {
387 		ionic_devlink_unregister(ionic);
388 		ionic_lifs_unregister(ionic);
389 		ionic_lifs_deinit(ionic);
390 		ionic_lifs_free(ionic);
391 		ionic_bus_free_irq_vectors(ionic);
392 	}
393 
394 	ionic_port_reset(ionic);
395 	ionic_reset(ionic);
396 	ionic_dev_teardown(ionic);
397 	ionic_unmap_bars(ionic);
398 	pci_release_regions(pdev);
399 	pci_clear_master(pdev);
400 	pci_disable_device(pdev);
401 	ionic_debugfs_del_dev(ionic);
402 	mutex_destroy(&ionic->dev_cmd_lock);
403 	ionic_devlink_free(ionic);
404 }
405 
406 static struct pci_driver ionic_driver = {
407 	.name = IONIC_DRV_NAME,
408 	.id_table = ionic_id_table,
409 	.probe = ionic_probe,
410 	.remove = ionic_remove,
411 	.sriov_configure = ionic_sriov_configure,
412 };
413 
414 int ionic_bus_register_driver(void)
415 {
416 	return pci_register_driver(&ionic_driver);
417 }
418 
419 void ionic_bus_unregister_driver(void)
420 {
421 	pci_unregister_driver(&ionic_driver);
422 }
423