1 /* 2 * Copyright (C) 2006 PA Semi, Inc 3 * 4 * Driver for the PA6T-1682M onchip 1G/10G Ethernet MACs, soft state and 5 * hardware register layouts. 6 * 7 * This program is free software; you can redistribute it and/or modify 8 * it under the terms of the GNU General Public License version 2 as 9 * published by the Free Software Foundation. 10 * 11 * This program is distributed in the hope that it will be useful, 12 * but WITHOUT ANY WARRANTY; without even the implied warranty of 13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 14 * GNU General Public License for more details. 15 * 16 * You should have received a copy of the GNU General Public License 17 * along with this program; if not, see <http://www.gnu.org/licenses/>. 18 */ 19 20 #ifndef PASEMI_MAC_H 21 #define PASEMI_MAC_H 22 23 #include <linux/ethtool.h> 24 #include <linux/netdevice.h> 25 #include <linux/spinlock.h> 26 #include <linux/phy.h> 27 28 /* Must be a power of two */ 29 #define RX_RING_SIZE 2048 30 #define TX_RING_SIZE 4096 31 #define CS_RING_SIZE (TX_RING_SIZE*2) 32 33 34 #define MAX_CS 2 35 36 struct pasemi_mac_txring { 37 struct pasemi_dmachan chan; /* Must be first */ 38 spinlock_t lock; 39 unsigned int size; 40 unsigned int next_to_fill; 41 unsigned int next_to_clean; 42 struct pasemi_mac_buffer *ring_info; 43 struct pasemi_mac *mac; /* Needed in intr handler */ 44 struct timer_list clean_timer; 45 }; 46 47 struct pasemi_mac_rxring { 48 struct pasemi_dmachan chan; /* Must be first */ 49 spinlock_t lock; 50 u64 *buffers; /* RX interface buffer ring */ 51 dma_addr_t buf_dma; 52 unsigned int size; 53 unsigned int next_to_fill; 54 unsigned int next_to_clean; 55 struct pasemi_mac_buffer *ring_info; 56 struct pasemi_mac *mac; /* Needed in intr handler */ 57 }; 58 59 struct pasemi_mac_csring { 60 struct pasemi_dmachan chan; 61 unsigned int size; 62 unsigned int next_to_fill; 63 int events[2]; 64 int last_event; 65 int fun; 66 }; 67 68 struct pasemi_mac { 69 struct net_device *netdev; 70 struct pci_dev *pdev; 71 struct pci_dev *dma_pdev; 72 struct pci_dev *iob_pdev; 73 struct napi_struct napi; 74 75 int bufsz; /* RX ring buffer size */ 76 int last_cs; 77 int num_cs; 78 u32 dma_if; 79 u8 type; 80 #define MAC_TYPE_GMAC 1 81 #define MAC_TYPE_XAUI 2 82 83 u8 mac_addr[ETH_ALEN]; 84 85 struct timer_list rxtimer; 86 87 struct pasemi_mac_txring *tx; 88 struct pasemi_mac_rxring *rx; 89 struct pasemi_mac_csring *cs[MAX_CS]; 90 char tx_irq_name[10]; /* "eth%d tx" */ 91 char rx_irq_name[10]; /* "eth%d rx" */ 92 int link; 93 int speed; 94 int duplex; 95 96 unsigned int msg_enable; 97 }; 98 99 /* Software status descriptor (ring_info) */ 100 struct pasemi_mac_buffer { 101 struct sk_buff *skb; 102 dma_addr_t dma; 103 }; 104 105 #define TX_DESC(tx, num) ((tx)->chan.ring_virt[(num) & (TX_RING_SIZE-1)]) 106 #define TX_DESC_INFO(tx, num) ((tx)->ring_info[(num) & (TX_RING_SIZE-1)]) 107 #define RX_DESC(rx, num) ((rx)->chan.ring_virt[(num) & (RX_RING_SIZE-1)]) 108 #define RX_DESC_INFO(rx, num) ((rx)->ring_info[(num) & (RX_RING_SIZE-1)]) 109 #define RX_BUFF(rx, num) ((rx)->buffers[(num) & (RX_RING_SIZE-1)]) 110 #define CS_DESC(cs, num) ((cs)->chan.ring_virt[(num) & (CS_RING_SIZE-1)]) 111 112 #define RING_USED(ring) (((ring)->next_to_fill - (ring)->next_to_clean) \ 113 & ((ring)->size - 1)) 114 #define RING_AVAIL(ring) ((ring->size) - RING_USED(ring)) 115 116 /* PCI register offsets and formats */ 117 118 119 /* MAC CFG register offsets */ 120 enum { 121 PAS_MAC_CFG_PCFG = 0x80, 122 PAS_MAC_CFG_MACCFG = 0x84, 123 PAS_MAC_CFG_ADR0 = 0x8c, 124 PAS_MAC_CFG_ADR1 = 0x90, 125 PAS_MAC_CFG_TXP = 0x98, 126 PAS_MAC_CFG_RMON = 0x100, 127 PAS_MAC_IPC_CHNL = 0x208, 128 }; 129 130 /* MAC CFG register fields */ 131 #define PAS_MAC_CFG_PCFG_PE 0x80000000 132 #define PAS_MAC_CFG_PCFG_CE 0x40000000 133 #define PAS_MAC_CFG_PCFG_BU 0x20000000 134 #define PAS_MAC_CFG_PCFG_TT 0x10000000 135 #define PAS_MAC_CFG_PCFG_TSR_M 0x0c000000 136 #define PAS_MAC_CFG_PCFG_TSR_10M 0x00000000 137 #define PAS_MAC_CFG_PCFG_TSR_100M 0x04000000 138 #define PAS_MAC_CFG_PCFG_TSR_1G 0x08000000 139 #define PAS_MAC_CFG_PCFG_TSR_10G 0x0c000000 140 #define PAS_MAC_CFG_PCFG_T24 0x02000000 141 #define PAS_MAC_CFG_PCFG_PR 0x01000000 142 #define PAS_MAC_CFG_PCFG_CRO_M 0x00ff0000 143 #define PAS_MAC_CFG_PCFG_CRO_S 16 144 #define PAS_MAC_CFG_PCFG_IPO_M 0x0000ff00 145 #define PAS_MAC_CFG_PCFG_IPO_S 8 146 #define PAS_MAC_CFG_PCFG_S1 0x00000080 147 #define PAS_MAC_CFG_PCFG_IO_M 0x00000060 148 #define PAS_MAC_CFG_PCFG_IO_MAC 0x00000000 149 #define PAS_MAC_CFG_PCFG_IO_OFF 0x00000020 150 #define PAS_MAC_CFG_PCFG_IO_IND_ETH 0x00000040 151 #define PAS_MAC_CFG_PCFG_IO_IND_IP 0x00000060 152 #define PAS_MAC_CFG_PCFG_LP 0x00000010 153 #define PAS_MAC_CFG_PCFG_TS 0x00000008 154 #define PAS_MAC_CFG_PCFG_HD 0x00000004 155 #define PAS_MAC_CFG_PCFG_SPD_M 0x00000003 156 #define PAS_MAC_CFG_PCFG_SPD_10M 0x00000000 157 #define PAS_MAC_CFG_PCFG_SPD_100M 0x00000001 158 #define PAS_MAC_CFG_PCFG_SPD_1G 0x00000002 159 #define PAS_MAC_CFG_PCFG_SPD_10G 0x00000003 160 161 #define PAS_MAC_CFG_MACCFG_TXT_M 0x70000000 162 #define PAS_MAC_CFG_MACCFG_TXT_S 28 163 #define PAS_MAC_CFG_MACCFG_PRES_M 0x0f000000 164 #define PAS_MAC_CFG_MACCFG_PRES_S 24 165 #define PAS_MAC_CFG_MACCFG_MAXF_M 0x00ffff00 166 #define PAS_MAC_CFG_MACCFG_MAXF_S 8 167 #define PAS_MAC_CFG_MACCFG_MAXF(x) (((x) << PAS_MAC_CFG_MACCFG_MAXF_S) & \ 168 PAS_MAC_CFG_MACCFG_MAXF_M) 169 #define PAS_MAC_CFG_MACCFG_MINF_M 0x000000ff 170 #define PAS_MAC_CFG_MACCFG_MINF_S 0 171 172 #define PAS_MAC_CFG_TXP_FCF 0x01000000 173 #define PAS_MAC_CFG_TXP_FCE 0x00800000 174 #define PAS_MAC_CFG_TXP_FC 0x00400000 175 #define PAS_MAC_CFG_TXP_FPC_M 0x00300000 176 #define PAS_MAC_CFG_TXP_FPC_S 20 177 #define PAS_MAC_CFG_TXP_FPC(x) (((x) << PAS_MAC_CFG_TXP_FPC_S) & \ 178 PAS_MAC_CFG_TXP_FPC_M) 179 #define PAS_MAC_CFG_TXP_RT 0x00080000 180 #define PAS_MAC_CFG_TXP_BL 0x00040000 181 #define PAS_MAC_CFG_TXP_SL_M 0x00030000 182 #define PAS_MAC_CFG_TXP_SL_S 16 183 #define PAS_MAC_CFG_TXP_SL(x) (((x) << PAS_MAC_CFG_TXP_SL_S) & \ 184 PAS_MAC_CFG_TXP_SL_M) 185 #define PAS_MAC_CFG_TXP_COB_M 0x0000f000 186 #define PAS_MAC_CFG_TXP_COB_S 12 187 #define PAS_MAC_CFG_TXP_COB(x) (((x) << PAS_MAC_CFG_TXP_COB_S) & \ 188 PAS_MAC_CFG_TXP_COB_M) 189 #define PAS_MAC_CFG_TXP_TIFT_M 0x00000f00 190 #define PAS_MAC_CFG_TXP_TIFT_S 8 191 #define PAS_MAC_CFG_TXP_TIFT(x) (((x) << PAS_MAC_CFG_TXP_TIFT_S) & \ 192 PAS_MAC_CFG_TXP_TIFT_M) 193 #define PAS_MAC_CFG_TXP_TIFG_M 0x000000ff 194 #define PAS_MAC_CFG_TXP_TIFG_S 0 195 #define PAS_MAC_CFG_TXP_TIFG(x) (((x) << PAS_MAC_CFG_TXP_TIFG_S) & \ 196 PAS_MAC_CFG_TXP_TIFG_M) 197 198 #define PAS_MAC_RMON(r) (0x100+(r)*4) 199 200 #define PAS_MAC_IPC_CHNL_DCHNO_M 0x003f0000 201 #define PAS_MAC_IPC_CHNL_DCHNO_S 16 202 #define PAS_MAC_IPC_CHNL_DCHNO(x) (((x) << PAS_MAC_IPC_CHNL_DCHNO_S) & \ 203 PAS_MAC_IPC_CHNL_DCHNO_M) 204 #define PAS_MAC_IPC_CHNL_BCH_M 0x0000003f 205 #define PAS_MAC_IPC_CHNL_BCH_S 0 206 #define PAS_MAC_IPC_CHNL_BCH(x) (((x) << PAS_MAC_IPC_CHNL_BCH_S) & \ 207 PAS_MAC_IPC_CHNL_BCH_M) 208 209 210 #endif /* PASEMI_MAC_H */ 211