1 /* hamachi.c: A Packet Engines GNIC-II Gigabit Ethernet driver for Linux. */
2 /*
3 	Written 1998-2000 by Donald Becker.
4 	Updates 2000 by Keith Underwood.
5 
6 	This software may be used and distributed according to the terms of
7 	the GNU General Public License (GPL), incorporated herein by reference.
8 	Drivers based on or derived from this code fall under the GPL and must
9 	retain the authorship, copyright and license notice.  This file is not
10 	a complete program and may only be used when the entire operating
11 	system is licensed under the GPL.
12 
13 	The author may be reached as becker@scyld.com, or C/O
14 	Scyld Computing Corporation
15 	410 Severn Ave., Suite 210
16 	Annapolis MD 21403
17 
18 	This driver is for the Packet Engines GNIC-II PCI Gigabit Ethernet
19 	adapter.
20 
21 	Support and updates available at
22 	http://www.scyld.com/network/hamachi.html
23 	[link no longer provides useful info -jgarzik]
24 	or
25 	http://www.parl.clemson.edu/~keithu/hamachi.html
26 
27 */
28 
29 #define DRV_NAME	"hamachi"
30 #define DRV_VERSION	"2.1"
31 #define DRV_RELDATE	"Sept 11, 2006"
32 
33 
34 /* A few user-configurable values. */
35 
36 static int debug = 1;		/* 1 normal messages, 0 quiet .. 7 verbose.  */
37 #define final_version
38 #define hamachi_debug debug
39 /* Maximum events (Rx packets, etc.) to handle at each interrupt. */
40 static int max_interrupt_work = 40;
41 static int mtu;
42 /* Default values selected by testing on a dual processor PIII-450 */
43 /* These six interrupt control parameters may be set directly when loading the
44  * module, or through the rx_params and tx_params variables
45  */
46 static int max_rx_latency = 0x11;
47 static int max_rx_gap = 0x05;
48 static int min_rx_pkt = 0x18;
49 static int max_tx_latency = 0x00;
50 static int max_tx_gap = 0x00;
51 static int min_tx_pkt = 0x30;
52 
53 /* Set the copy breakpoint for the copy-only-tiny-frames scheme.
54    -Setting to > 1518 causes all frames to be copied
55 	-Setting to 0 disables copies
56 */
57 static int rx_copybreak;
58 
59 /* An override for the hardware detection of bus width.
60 	Set to 1 to force 32 bit PCI bus detection.  Set to 4 to force 64 bit.
61 	Add 2 to disable parity detection.
62 */
63 static int force32;
64 
65 
66 /* Used to pass the media type, etc.
67    These exist for driver interoperability.
68    No media types are currently defined.
69 		- The lower 4 bits are reserved for the media type.
70 		- The next three bits may be set to one of the following:
71 			0x00000000 : Autodetect PCI bus
72 			0x00000010 : Force 32 bit PCI bus
73 			0x00000020 : Disable parity detection
74 			0x00000040 : Force 64 bit PCI bus
75 			Default is autodetect
76 		- The next bit can be used to force half-duplex.  This is a bad
77 		  idea since no known implementations implement half-duplex, and,
78 		  in general, half-duplex for gigabit ethernet is a bad idea.
79 			0x00000080 : Force half-duplex
80 			Default is full-duplex.
81 		- In the original driver, the ninth bit could be used to force
82 		  full-duplex.  Maintain that for compatibility
83 		   0x00000200 : Force full-duplex
84 */
85 #define MAX_UNITS 8				/* More are supported, limit only on options */
86 static int options[MAX_UNITS] = {-1, -1, -1, -1, -1, -1, -1, -1};
87 static int full_duplex[MAX_UNITS] = {-1, -1, -1, -1, -1, -1, -1, -1};
88 /* The Hamachi chipset supports 3 parameters each for Rx and Tx
89  * interruput management.  Parameters will be loaded as specified into
90  * the TxIntControl and RxIntControl registers.
91  *
92  * The registers are arranged as follows:
93  *     23 - 16   15 -  8   7    -    0
94  *    _________________________________
95  *   | min_pkt | max_gap | max_latency |
96  *    ---------------------------------
97  *   min_pkt      : The minimum number of packets processed between
98  *                  interrupts.
99  *   max_gap      : The maximum inter-packet gap in units of 8.192 us
100  *   max_latency  : The absolute time between interrupts in units of 8.192 us
101  *
102  */
103 static int rx_params[MAX_UNITS] = {-1, -1, -1, -1, -1, -1, -1, -1};
104 static int tx_params[MAX_UNITS] = {-1, -1, -1, -1, -1, -1, -1, -1};
105 
106 /* Operational parameters that are set at compile time. */
107 
108 /* Keep the ring sizes a power of two for compile efficiency.
109 	The compiler will convert <unsigned>'%'<2^N> into a bit mask.
110    Making the Tx ring too large decreases the effectiveness of channel
111    bonding and packet priority.
112    There are no ill effects from too-large receive rings, except for
113 	excessive memory usage */
114 /* Empirically it appears that the Tx ring needs to be a little bigger
115    for these Gbit adapters or you get into an overrun condition really
116    easily.  Also, things appear to work a bit better in back-to-back
117    configurations if the Rx ring is 8 times the size of the Tx ring
118 */
119 #define TX_RING_SIZE	64
120 #define RX_RING_SIZE	512
121 #define TX_TOTAL_SIZE	TX_RING_SIZE*sizeof(struct hamachi_desc)
122 #define RX_TOTAL_SIZE	RX_RING_SIZE*sizeof(struct hamachi_desc)
123 
124 /*
125  * Enable netdev_ioctl.  Added interrupt coalescing parameter adjustment.
126  * 2/19/99 Pete Wyckoff <wyckoff@ca.sandia.gov>
127  */
128 
129 /* play with 64-bit addrlen; seems to be a teensy bit slower  --pw */
130 /* #define ADDRLEN 64 */
131 
132 /*
133  * RX_CHECKSUM turns on card-generated receive checksum generation for
134  *   TCP and UDP packets.  Otherwise the upper layers do the calculation.
135  * 3/10/1999 Pete Wyckoff <wyckoff@ca.sandia.gov>
136  */
137 #define RX_CHECKSUM
138 
139 /* Operational parameters that usually are not changed. */
140 /* Time in jiffies before concluding the transmitter is hung. */
141 #define TX_TIMEOUT  (5*HZ)
142 
143 #include <linux/capability.h>
144 #include <linux/module.h>
145 #include <linux/kernel.h>
146 #include <linux/string.h>
147 #include <linux/timer.h>
148 #include <linux/time.h>
149 #include <linux/errno.h>
150 #include <linux/ioport.h>
151 #include <linux/interrupt.h>
152 #include <linux/pci.h>
153 #include <linux/init.h>
154 #include <linux/ethtool.h>
155 #include <linux/mii.h>
156 #include <linux/netdevice.h>
157 #include <linux/etherdevice.h>
158 #include <linux/skbuff.h>
159 #include <linux/ip.h>
160 #include <linux/delay.h>
161 #include <linux/bitops.h>
162 
163 #include <linux/uaccess.h>
164 #include <asm/processor.h>	/* Processor type for cache alignment. */
165 #include <asm/io.h>
166 #include <asm/unaligned.h>
167 #include <asm/cache.h>
168 
169 static const char version[] =
170 KERN_INFO DRV_NAME ".c:v" DRV_VERSION " " DRV_RELDATE "  Written by Donald Becker\n"
171 "   Some modifications by Eric kasten <kasten@nscl.msu.edu>\n"
172 "   Further modifications by Keith Underwood <keithu@parl.clemson.edu>\n";
173 
174 
175 /* IP_MF appears to be only defined in <netinet/ip.h>, however,
176    we need it for hardware checksumming support.  FYI... some of
177    the definitions in <netinet/ip.h> conflict/duplicate those in
178    other linux headers causing many compiler warnings.
179 */
180 #ifndef IP_MF
181   #define IP_MF 0x2000   /* IP more frags from <netinet/ip.h> */
182 #endif
183 
184 /* Define IP_OFFSET to be IPOPT_OFFSET */
185 #ifndef IP_OFFSET
186   #ifdef IPOPT_OFFSET
187     #define IP_OFFSET IPOPT_OFFSET
188   #else
189     #define IP_OFFSET 2
190   #endif
191 #endif
192 
193 #define RUN_AT(x) (jiffies + (x))
194 
195 #ifndef ADDRLEN
196 #define ADDRLEN 32
197 #endif
198 
199 /* Condensed bus+endian portability operations. */
200 #if ADDRLEN == 64
201 #define cpu_to_leXX(addr)	cpu_to_le64(addr)
202 #define leXX_to_cpu(addr)	le64_to_cpu(addr)
203 #else
204 #define cpu_to_leXX(addr)	cpu_to_le32(addr)
205 #define leXX_to_cpu(addr)	le32_to_cpu(addr)
206 #endif
207 
208 
209 /*
210 				Theory of Operation
211 
212 I. Board Compatibility
213 
214 This device driver is designed for the Packet Engines "Hamachi"
215 Gigabit Ethernet chip.  The only PCA currently supported is the GNIC-II 64-bit
216 66Mhz PCI card.
217 
218 II. Board-specific settings
219 
220 No jumpers exist on the board.  The chip supports software correction of
221 various motherboard wiring errors, however this driver does not support
222 that feature.
223 
224 III. Driver operation
225 
226 IIIa. Ring buffers
227 
228 The Hamachi uses a typical descriptor based bus-master architecture.
229 The descriptor list is similar to that used by the Digital Tulip.
230 This driver uses two statically allocated fixed-size descriptor lists
231 formed into rings by a branch from the final descriptor to the beginning of
232 the list.  The ring sizes are set at compile time by RX/TX_RING_SIZE.
233 
234 This driver uses a zero-copy receive and transmit scheme similar my other
235 network drivers.
236 The driver allocates full frame size skbuffs for the Rx ring buffers at
237 open() time and passes the skb->data field to the Hamachi as receive data
238 buffers.  When an incoming frame is less than RX_COPYBREAK bytes long,
239 a fresh skbuff is allocated and the frame is copied to the new skbuff.
240 When the incoming frame is larger, the skbuff is passed directly up the
241 protocol stack and replaced by a newly allocated skbuff.
242 
243 The RX_COPYBREAK value is chosen to trade-off the memory wasted by
244 using a full-sized skbuff for small frames vs. the copying costs of larger
245 frames.  Gigabit cards are typically used on generously configured machines
246 and the underfilled buffers have negligible impact compared to the benefit of
247 a single allocation size, so the default value of zero results in never
248 copying packets.
249 
250 IIIb/c. Transmit/Receive Structure
251 
252 The Rx and Tx descriptor structure are straight-forward, with no historical
253 baggage that must be explained.  Unlike the awkward DBDMA structure, there
254 are no unused fields or option bits that had only one allowable setting.
255 
256 Two details should be noted about the descriptors: The chip supports both 32
257 bit and 64 bit address structures, and the length field is overwritten on
258 the receive descriptors.  The descriptor length is set in the control word
259 for each channel. The development driver uses 32 bit addresses only, however
260 64 bit addresses may be enabled for 64 bit architectures e.g. the Alpha.
261 
262 IIId. Synchronization
263 
264 This driver is very similar to my other network drivers.
265 The driver runs as two independent, single-threaded flows of control.  One
266 is the send-packet routine, which enforces single-threaded use by the
267 dev->tbusy flag.  The other thread is the interrupt handler, which is single
268 threaded by the hardware and other software.
269 
270 The send packet thread has partial control over the Tx ring and 'dev->tbusy'
271 flag.  It sets the tbusy flag whenever it's queuing a Tx packet. If the next
272 queue slot is empty, it clears the tbusy flag when finished otherwise it sets
273 the 'hmp->tx_full' flag.
274 
275 The interrupt handler has exclusive control over the Rx ring and records stats
276 from the Tx ring.  After reaping the stats, it marks the Tx queue entry as
277 empty by incrementing the dirty_tx mark. Iff the 'hmp->tx_full' flag is set, it
278 clears both the tx_full and tbusy flags.
279 
280 IV. Notes
281 
282 Thanks to Kim Stearns of Packet Engines for providing a pair of GNIC-II boards.
283 
284 IVb. References
285 
286 Hamachi Engineering Design Specification, 5/15/97
287 (Note: This version was marked "Confidential".)
288 
289 IVc. Errata
290 
291 None noted.
292 
293 V.  Recent Changes
294 
295 01/15/1999 EPK  Enlargement of the TX and RX ring sizes.  This appears
296     to help avoid some stall conditions -- this needs further research.
297 
298 01/15/1999 EPK  Creation of the hamachi_tx function.  This function cleans
299     the Tx ring and is called from hamachi_start_xmit (this used to be
300     called from hamachi_interrupt but it tends to delay execution of the
301     interrupt handler and thus reduce bandwidth by reducing the latency
302     between hamachi_rx()'s).  Notably, some modification has been made so
303     that the cleaning loop checks only to make sure that the DescOwn bit
304     isn't set in the status flag since the card is not required
305     to set the entire flag to zero after processing.
306 
307 01/15/1999 EPK In the hamachi_start_tx function, the Tx ring full flag is
308     checked before attempting to add a buffer to the ring.  If the ring is full
309     an attempt is made to free any dirty buffers and thus find space for
310     the new buffer or the function returns non-zero which should case the
311     scheduler to reschedule the buffer later.
312 
313 01/15/1999 EPK Some adjustments were made to the chip initialization.
314     End-to-end flow control should now be fully active and the interrupt
315     algorithm vars have been changed.  These could probably use further tuning.
316 
317 01/15/1999 EPK Added the max_{rx,tx}_latency options.  These are used to
318     set the rx and tx latencies for the Hamachi interrupts. If you're having
319     problems with network stalls, try setting these to higher values.
320     Valid values are 0x00 through 0xff.
321 
322 01/15/1999 EPK In general, the overall bandwidth has increased and
323     latencies are better (sometimes by a factor of 2).  Stalls are rare at
324     this point, however there still appears to be a bug somewhere between the
325     hardware and driver.  TCP checksum errors under load also appear to be
326     eliminated at this point.
327 
328 01/18/1999 EPK Ensured that the DescEndRing bit was being set on both the
329     Rx and Tx rings.  This appears to have been affecting whether a particular
330     peer-to-peer connection would hang under high load.  I believe the Rx
331     rings was typically getting set correctly, but the Tx ring wasn't getting
332     the DescEndRing bit set during initialization. ??? Does this mean the
333     hamachi card is using the DescEndRing in processing even if a particular
334     slot isn't in use -- hypothetically, the card might be searching the
335     entire Tx ring for slots with the DescOwn bit set and then processing
336     them.  If the DescEndRing bit isn't set, then it might just wander off
337     through memory until it hits a chunk of data with that bit set
338     and then looping back.
339 
340 02/09/1999 EPK Added Michel Mueller's TxDMA Interrupt and Tx-timeout
341     problem (TxCmd and RxCmd need only to be set when idle or stopped.
342 
343 02/09/1999 EPK Added code to check/reset dev->tbusy in hamachi_interrupt.
344     (Michel Mueller pointed out the ``permanently busy'' potential
345     problem here).
346 
347 02/22/1999 EPK Added Pete Wyckoff's ioctl to control the Tx/Rx latencies.
348 
349 02/23/1999 EPK Verified that the interrupt status field bits for Tx were
350     incorrectly defined and corrected (as per Michel Mueller).
351 
352 02/23/1999 EPK Corrected the Tx full check to check that at least 4 slots
353     were available before resetting the tbusy and tx_full flags
354     (as per Michel Mueller).
355 
356 03/11/1999 EPK Added Pete Wyckoff's hardware checksumming support.
357 
358 12/31/1999 KDU Cleaned up assorted things and added Don's code to force
359 32 bit.
360 
361 02/20/2000 KDU Some of the control was just plain odd.  Cleaned up the
362 hamachi_start_xmit() and hamachi_interrupt() code.  There is still some
363 re-structuring I would like to do.
364 
365 03/01/2000 KDU Experimenting with a WIDE range of interrupt mitigation
366 parameters on a dual P3-450 setup yielded the new default interrupt
367 mitigation parameters.  Tx should interrupt VERY infrequently due to
368 Eric's scheme.  Rx should be more often...
369 
370 03/13/2000 KDU Added a patch to make the Rx Checksum code interact
371 nicely with non-linux machines.
372 
373 03/13/2000 KDU Experimented with some of the configuration values:
374 
375 	-It seems that enabling PCI performance commands for descriptors
376 	(changing RxDMACtrl and TxDMACtrl lower nibble from 5 to D) has minimal
377 	performance impact for any of my tests. (ttcp, netpipe, netperf)  I will
378 	leave them that way until I hear further feedback.
379 
380 	-Increasing the PCI_LATENCY_TIMER to 130
381 	(2 + (burst size of 128 * (0 wait states + 1))) seems to slightly
382 	degrade performance.  Leaving default at 64 pending further information.
383 
384 03/14/2000 KDU Further tuning:
385 
386 	-adjusted boguscnt in hamachi_rx() to depend on interrupt
387 	mitigation parameters chosen.
388 
389 	-Selected a set of interrupt parameters based on some extensive testing.
390 	These may change with more testing.
391 
392 TO DO:
393 
394 -Consider borrowing from the acenic driver code to check PCI_COMMAND for
395 PCI_COMMAND_INVALIDATE.  Set maximum burst size to cache line size in
396 that case.
397 
398 -fix the reset procedure.  It doesn't quite work.
399 */
400 
401 /* A few values that may be tweaked. */
402 /* Size of each temporary Rx buffer, calculated as:
403  * 1518 bytes (ethernet packet) + 2 bytes (to get 8 byte alignment for
404  * the card) + 8 bytes of status info + 8 bytes for the Rx Checksum
405  */
406 #define PKT_BUF_SZ		1536
407 
408 /* For now, this is going to be set to the maximum size of an ethernet
409  * packet.  Eventually, we may want to make it a variable that is
410  * related to the MTU
411  */
412 #define MAX_FRAME_SIZE  1518
413 
414 /* The rest of these values should never change. */
415 
416 static void hamachi_timer(struct timer_list *t);
417 
418 enum capability_flags {CanHaveMII=1, };
419 static const struct chip_info {
420 	u16	vendor_id, device_id, device_id_mask, pad;
421 	const char *name;
422 	void (*media_timer)(struct timer_list *t);
423 	int flags;
424 } chip_tbl[] = {
425 	{0x1318, 0x0911, 0xffff, 0, "Hamachi GNIC-II", hamachi_timer, 0},
426 	{0,},
427 };
428 
429 /* Offsets to the Hamachi registers.  Various sizes. */
430 enum hamachi_offsets {
431 	TxDMACtrl=0x00, TxCmd=0x04, TxStatus=0x06, TxPtr=0x08, TxCurPtr=0x10,
432 	RxDMACtrl=0x20, RxCmd=0x24, RxStatus=0x26, RxPtr=0x28, RxCurPtr=0x30,
433 	PCIClkMeas=0x060, MiscStatus=0x066, ChipRev=0x68, ChipReset=0x06B,
434 	LEDCtrl=0x06C, VirtualJumpers=0x06D, GPIO=0x6E,
435 	TxChecksum=0x074, RxChecksum=0x076,
436 	TxIntrCtrl=0x078, RxIntrCtrl=0x07C,
437 	InterruptEnable=0x080, InterruptClear=0x084, IntrStatus=0x088,
438 	EventStatus=0x08C,
439 	MACCnfg=0x0A0, FrameGap0=0x0A2, FrameGap1=0x0A4,
440 	/* See enum MII_offsets below. */
441 	MACCnfg2=0x0B0, RxDepth=0x0B8, FlowCtrl=0x0BC, MaxFrameSize=0x0CE,
442 	AddrMode=0x0D0, StationAddr=0x0D2,
443 	/* Gigabit AutoNegotiation. */
444 	ANCtrl=0x0E0, ANStatus=0x0E2, ANXchngCtrl=0x0E4, ANAdvertise=0x0E8,
445 	ANLinkPartnerAbility=0x0EA,
446 	EECmdStatus=0x0F0, EEData=0x0F1, EEAddr=0x0F2,
447 	FIFOcfg=0x0F8,
448 };
449 
450 /* Offsets to the MII-mode registers. */
451 enum MII_offsets {
452 	MII_Cmd=0xA6, MII_Addr=0xA8, MII_Wr_Data=0xAA, MII_Rd_Data=0xAC,
453 	MII_Status=0xAE,
454 };
455 
456 /* Bits in the interrupt status/mask registers. */
457 enum intr_status_bits {
458 	IntrRxDone=0x01, IntrRxPCIFault=0x02, IntrRxPCIErr=0x04,
459 	IntrTxDone=0x100, IntrTxPCIFault=0x200, IntrTxPCIErr=0x400,
460 	LinkChange=0x10000, NegotiationChange=0x20000, StatsMax=0x40000, };
461 
462 /* The Hamachi Rx and Tx buffer descriptors. */
463 struct hamachi_desc {
464 	__le32 status_n_length;
465 #if ADDRLEN == 64
466 	u32 pad;
467 	__le64 addr;
468 #else
469 	__le32 addr;
470 #endif
471 };
472 
473 /* Bits in hamachi_desc.status_n_length */
474 enum desc_status_bits {
475 	DescOwn=0x80000000, DescEndPacket=0x40000000, DescEndRing=0x20000000,
476 	DescIntr=0x10000000,
477 };
478 
479 #define PRIV_ALIGN	15  			/* Required alignment mask */
480 #define MII_CNT		4
481 struct hamachi_private {
482 	/* Descriptor rings first for alignment.  Tx requires a second descriptor
483 	   for status. */
484 	struct hamachi_desc *rx_ring;
485 	struct hamachi_desc *tx_ring;
486 	struct sk_buff* rx_skbuff[RX_RING_SIZE];
487 	struct sk_buff* tx_skbuff[TX_RING_SIZE];
488 	dma_addr_t tx_ring_dma;
489 	dma_addr_t rx_ring_dma;
490 	struct timer_list timer;		/* Media selection timer. */
491 	/* Frequently used and paired value: keep adjacent for cache effect. */
492 	spinlock_t lock;
493 	int chip_id;
494 	unsigned int cur_rx, dirty_rx;		/* Producer/consumer ring indices */
495 	unsigned int cur_tx, dirty_tx;
496 	unsigned int rx_buf_sz;			/* Based on MTU+slack. */
497 	unsigned int tx_full:1;			/* The Tx queue is full. */
498 	unsigned int duplex_lock:1;
499 	unsigned int default_port:4;		/* Last dev->if_port value. */
500 	/* MII transceiver section. */
501 	int mii_cnt;								/* MII device addresses. */
502 	struct mii_if_info mii_if;		/* MII lib hooks/info */
503 	unsigned char phys[MII_CNT];		/* MII device addresses, only first one used. */
504 	u32 rx_int_var, tx_int_var;	/* interrupt control variables */
505 	u32 option;							/* Hold on to a copy of the options */
506 	struct pci_dev *pci_dev;
507 	void __iomem *base;
508 };
509 
510 MODULE_AUTHOR("Donald Becker <becker@scyld.com>, Eric Kasten <kasten@nscl.msu.edu>, Keith Underwood <keithu@parl.clemson.edu>");
511 MODULE_DESCRIPTION("Packet Engines 'Hamachi' GNIC-II Gigabit Ethernet driver");
512 MODULE_LICENSE("GPL");
513 
514 module_param(max_interrupt_work, int, 0);
515 module_param(mtu, int, 0);
516 module_param(debug, int, 0);
517 module_param(min_rx_pkt, int, 0);
518 module_param(max_rx_gap, int, 0);
519 module_param(max_rx_latency, int, 0);
520 module_param(min_tx_pkt, int, 0);
521 module_param(max_tx_gap, int, 0);
522 module_param(max_tx_latency, int, 0);
523 module_param(rx_copybreak, int, 0);
524 module_param_array(rx_params, int, NULL, 0);
525 module_param_array(tx_params, int, NULL, 0);
526 module_param_array(options, int, NULL, 0);
527 module_param_array(full_duplex, int, NULL, 0);
528 module_param(force32, int, 0);
529 MODULE_PARM_DESC(max_interrupt_work, "GNIC-II maximum events handled per interrupt");
530 MODULE_PARM_DESC(mtu, "GNIC-II MTU (all boards)");
531 MODULE_PARM_DESC(debug, "GNIC-II debug level (0-7)");
532 MODULE_PARM_DESC(min_rx_pkt, "GNIC-II minimum Rx packets processed between interrupts");
533 MODULE_PARM_DESC(max_rx_gap, "GNIC-II maximum Rx inter-packet gap in 8.192 microsecond units");
534 MODULE_PARM_DESC(max_rx_latency, "GNIC-II time between Rx interrupts in 8.192 microsecond units");
535 MODULE_PARM_DESC(min_tx_pkt, "GNIC-II minimum Tx packets processed between interrupts");
536 MODULE_PARM_DESC(max_tx_gap, "GNIC-II maximum Tx inter-packet gap in 8.192 microsecond units");
537 MODULE_PARM_DESC(max_tx_latency, "GNIC-II time between Tx interrupts in 8.192 microsecond units");
538 MODULE_PARM_DESC(rx_copybreak, "GNIC-II copy breakpoint for copy-only-tiny-frames");
539 MODULE_PARM_DESC(rx_params, "GNIC-II min_rx_pkt+max_rx_gap+max_rx_latency");
540 MODULE_PARM_DESC(tx_params, "GNIC-II min_tx_pkt+max_tx_gap+max_tx_latency");
541 MODULE_PARM_DESC(options, "GNIC-II Bits 0-3: media type, bits 4-6: as force32, bit 7: half duplex, bit 9 full duplex");
542 MODULE_PARM_DESC(full_duplex, "GNIC-II full duplex setting(s) (1)");
543 MODULE_PARM_DESC(force32, "GNIC-II: Bit 0: 32 bit PCI, bit 1: disable parity, bit 2: 64 bit PCI (all boards)");
544 
545 static int read_eeprom(void __iomem *ioaddr, int location);
546 static int mdio_read(struct net_device *dev, int phy_id, int location);
547 static void mdio_write(struct net_device *dev, int phy_id, int location, int value);
548 static int hamachi_open(struct net_device *dev);
549 static int netdev_ioctl(struct net_device *dev, struct ifreq *rq, int cmd);
550 static void hamachi_timer(struct timer_list *t);
551 static void hamachi_tx_timeout(struct net_device *dev, unsigned int txqueue);
552 static void hamachi_init_ring(struct net_device *dev);
553 static netdev_tx_t hamachi_start_xmit(struct sk_buff *skb,
554 				      struct net_device *dev);
555 static irqreturn_t hamachi_interrupt(int irq, void *dev_instance);
556 static int hamachi_rx(struct net_device *dev);
557 static inline int hamachi_tx(struct net_device *dev);
558 static void hamachi_error(struct net_device *dev, int intr_status);
559 static int hamachi_close(struct net_device *dev);
560 static struct net_device_stats *hamachi_get_stats(struct net_device *dev);
561 static void set_rx_mode(struct net_device *dev);
562 static const struct ethtool_ops ethtool_ops;
563 static const struct ethtool_ops ethtool_ops_no_mii;
564 
565 static const struct net_device_ops hamachi_netdev_ops = {
566 	.ndo_open		= hamachi_open,
567 	.ndo_stop		= hamachi_close,
568 	.ndo_start_xmit		= hamachi_start_xmit,
569 	.ndo_get_stats		= hamachi_get_stats,
570 	.ndo_set_rx_mode	= set_rx_mode,
571 	.ndo_validate_addr	= eth_validate_addr,
572 	.ndo_set_mac_address 	= eth_mac_addr,
573 	.ndo_tx_timeout		= hamachi_tx_timeout,
574 	.ndo_do_ioctl		= netdev_ioctl,
575 };
576 
577 
578 static int hamachi_init_one(struct pci_dev *pdev,
579 			    const struct pci_device_id *ent)
580 {
581 	struct hamachi_private *hmp;
582 	int option, i, rx_int_var, tx_int_var, boguscnt;
583 	int chip_id = ent->driver_data;
584 	int irq;
585 	void __iomem *ioaddr;
586 	unsigned long base;
587 	static int card_idx;
588 	struct net_device *dev;
589 	void *ring_space;
590 	dma_addr_t ring_dma;
591 	int ret = -ENOMEM;
592 
593 /* when built into the kernel, we only print version if device is found */
594 #ifndef MODULE
595 	static int printed_version;
596 	if (!printed_version++)
597 		printk(version);
598 #endif
599 
600 	if (pci_enable_device(pdev)) {
601 		ret = -EIO;
602 		goto err_out;
603 	}
604 
605 	base = pci_resource_start(pdev, 0);
606 #ifdef __alpha__				/* Really "64 bit addrs" */
607 	base |= (pci_resource_start(pdev, 1) << 32);
608 #endif
609 
610 	pci_set_master(pdev);
611 
612 	i = pci_request_regions(pdev, DRV_NAME);
613 	if (i)
614 		return i;
615 
616 	irq = pdev->irq;
617 	ioaddr = ioremap(base, 0x400);
618 	if (!ioaddr)
619 		goto err_out_release;
620 
621 	dev = alloc_etherdev(sizeof(struct hamachi_private));
622 	if (!dev)
623 		goto err_out_iounmap;
624 
625 	SET_NETDEV_DEV(dev, &pdev->dev);
626 
627 	for (i = 0; i < 6; i++)
628 		dev->dev_addr[i] = 1 ? read_eeprom(ioaddr, 4 + i)
629 			: readb(ioaddr + StationAddr + i);
630 
631 #if ! defined(final_version)
632 	if (hamachi_debug > 4)
633 		for (i = 0; i < 0x10; i++)
634 			printk("%2.2x%s",
635 				   read_eeprom(ioaddr, i), i % 16 != 15 ? " " : "\n");
636 #endif
637 
638 	hmp = netdev_priv(dev);
639 	spin_lock_init(&hmp->lock);
640 
641 	hmp->mii_if.dev = dev;
642 	hmp->mii_if.mdio_read = mdio_read;
643 	hmp->mii_if.mdio_write = mdio_write;
644 	hmp->mii_if.phy_id_mask = 0x1f;
645 	hmp->mii_if.reg_num_mask = 0x1f;
646 
647 	ring_space = dma_alloc_coherent(&pdev->dev, TX_TOTAL_SIZE, &ring_dma,
648 					GFP_KERNEL);
649 	if (!ring_space)
650 		goto err_out_cleardev;
651 	hmp->tx_ring = ring_space;
652 	hmp->tx_ring_dma = ring_dma;
653 
654 	ring_space = dma_alloc_coherent(&pdev->dev, RX_TOTAL_SIZE, &ring_dma,
655 					GFP_KERNEL);
656 	if (!ring_space)
657 		goto err_out_unmap_tx;
658 	hmp->rx_ring = ring_space;
659 	hmp->rx_ring_dma = ring_dma;
660 
661 	/* Check for options being passed in */
662 	option = card_idx < MAX_UNITS ? options[card_idx] : 0;
663 	if (dev->mem_start)
664 		option = dev->mem_start;
665 
666 	/* If the bus size is misidentified, do the following. */
667 	force32 = force32 ? force32 :
668 		((option  >= 0) ? ((option & 0x00000070) >> 4) : 0 );
669 	if (force32)
670 		writeb(force32, ioaddr + VirtualJumpers);
671 
672 	/* Hmmm, do we really need to reset the chip???. */
673 	writeb(0x01, ioaddr + ChipReset);
674 
675 	/* After a reset, the clock speed measurement of the PCI bus will not
676 	 * be valid for a moment.  Wait for a little while until it is.  If
677 	 * it takes more than 10ms, forget it.
678 	 */
679 	udelay(10);
680 	i = readb(ioaddr + PCIClkMeas);
681 	for (boguscnt = 0; (!(i & 0x080)) && boguscnt < 1000; boguscnt++){
682 		udelay(10);
683 		i = readb(ioaddr + PCIClkMeas);
684 	}
685 
686 	hmp->base = ioaddr;
687 	pci_set_drvdata(pdev, dev);
688 
689 	hmp->chip_id = chip_id;
690 	hmp->pci_dev = pdev;
691 
692 	/* The lower four bits are the media type. */
693 	if (option > 0) {
694 		hmp->option = option;
695 		if (option & 0x200)
696 			hmp->mii_if.full_duplex = 1;
697 		else if (option & 0x080)
698 			hmp->mii_if.full_duplex = 0;
699 		hmp->default_port = option & 15;
700 		if (hmp->default_port)
701 			hmp->mii_if.force_media = 1;
702 	}
703 	if (card_idx < MAX_UNITS  &&  full_duplex[card_idx] > 0)
704 		hmp->mii_if.full_duplex = 1;
705 
706 	/* lock the duplex mode if someone specified a value */
707 	if (hmp->mii_if.full_duplex || (option & 0x080))
708 		hmp->duplex_lock = 1;
709 
710 	/* Set interrupt tuning parameters */
711 	max_rx_latency = max_rx_latency & 0x00ff;
712 	max_rx_gap = max_rx_gap & 0x00ff;
713 	min_rx_pkt = min_rx_pkt & 0x00ff;
714 	max_tx_latency = max_tx_latency & 0x00ff;
715 	max_tx_gap = max_tx_gap & 0x00ff;
716 	min_tx_pkt = min_tx_pkt & 0x00ff;
717 
718 	rx_int_var = card_idx < MAX_UNITS ? rx_params[card_idx] : -1;
719 	tx_int_var = card_idx < MAX_UNITS ? tx_params[card_idx] : -1;
720 	hmp->rx_int_var = rx_int_var >= 0 ? rx_int_var :
721 		(min_rx_pkt << 16 | max_rx_gap << 8 | max_rx_latency);
722 	hmp->tx_int_var = tx_int_var >= 0 ? tx_int_var :
723 		(min_tx_pkt << 16 | max_tx_gap << 8 | max_tx_latency);
724 
725 
726 	/* The Hamachi-specific entries in the device structure. */
727 	dev->netdev_ops = &hamachi_netdev_ops;
728 	dev->ethtool_ops = (chip_tbl[hmp->chip_id].flags & CanHaveMII) ?
729 		&ethtool_ops : &ethtool_ops_no_mii;
730 	dev->watchdog_timeo = TX_TIMEOUT;
731 	if (mtu)
732 		dev->mtu = mtu;
733 
734 	i = register_netdev(dev);
735 	if (i) {
736 		ret = i;
737 		goto err_out_unmap_rx;
738 	}
739 
740 	printk(KERN_INFO "%s: %s type %x at %p, %pM, IRQ %d.\n",
741 		   dev->name, chip_tbl[chip_id].name, readl(ioaddr + ChipRev),
742 		   ioaddr, dev->dev_addr, irq);
743 	i = readb(ioaddr + PCIClkMeas);
744 	printk(KERN_INFO "%s:  %d-bit %d Mhz PCI bus (%d), Virtual Jumpers "
745 		   "%2.2x, LPA %4.4x.\n",
746 		   dev->name, readw(ioaddr + MiscStatus) & 1 ? 64 : 32,
747 		   i ? 2000/(i&0x7f) : 0, i&0x7f, (int)readb(ioaddr + VirtualJumpers),
748 		   readw(ioaddr + ANLinkPartnerAbility));
749 
750 	if (chip_tbl[hmp->chip_id].flags & CanHaveMII) {
751 		int phy, phy_idx = 0;
752 		for (phy = 0; phy < 32 && phy_idx < MII_CNT; phy++) {
753 			int mii_status = mdio_read(dev, phy, MII_BMSR);
754 			if (mii_status != 0xffff  &&
755 				mii_status != 0x0000) {
756 				hmp->phys[phy_idx++] = phy;
757 				hmp->mii_if.advertising = mdio_read(dev, phy, MII_ADVERTISE);
758 				printk(KERN_INFO "%s: MII PHY found at address %d, status "
759 					   "0x%4.4x advertising %4.4x.\n",
760 					   dev->name, phy, mii_status, hmp->mii_if.advertising);
761 			}
762 		}
763 		hmp->mii_cnt = phy_idx;
764 		if (hmp->mii_cnt > 0)
765 			hmp->mii_if.phy_id = hmp->phys[0];
766 		else
767 			memset(&hmp->mii_if, 0, sizeof(hmp->mii_if));
768 	}
769 	/* Configure gigabit autonegotiation. */
770 	writew(0x0400, ioaddr + ANXchngCtrl);	/* Enable legacy links. */
771 	writew(0x08e0, ioaddr + ANAdvertise);	/* Set our advertise word. */
772 	writew(0x1000, ioaddr + ANCtrl);			/* Enable negotiation */
773 
774 	card_idx++;
775 	return 0;
776 
777 err_out_unmap_rx:
778 	dma_free_coherent(&pdev->dev, RX_TOTAL_SIZE, hmp->rx_ring,
779 			  hmp->rx_ring_dma);
780 err_out_unmap_tx:
781 	dma_free_coherent(&pdev->dev, TX_TOTAL_SIZE, hmp->tx_ring,
782 			  hmp->tx_ring_dma);
783 err_out_cleardev:
784 	free_netdev (dev);
785 err_out_iounmap:
786 	iounmap(ioaddr);
787 err_out_release:
788 	pci_release_regions(pdev);
789 err_out:
790 	return ret;
791 }
792 
793 static int read_eeprom(void __iomem *ioaddr, int location)
794 {
795 	int bogus_cnt = 1000;
796 
797 	/* We should check busy first - per docs -KDU */
798 	while ((readb(ioaddr + EECmdStatus) & 0x40)  && --bogus_cnt > 0);
799 	writew(location, ioaddr + EEAddr);
800 	writeb(0x02, ioaddr + EECmdStatus);
801 	bogus_cnt = 1000;
802 	while ((readb(ioaddr + EECmdStatus) & 0x40)  && --bogus_cnt > 0);
803 	if (hamachi_debug > 5)
804 		printk("   EEPROM status is %2.2x after %d ticks.\n",
805 			   (int)readb(ioaddr + EECmdStatus), 1000- bogus_cnt);
806 	return readb(ioaddr + EEData);
807 }
808 
809 /* MII Managemen Data I/O accesses.
810    These routines assume the MDIO controller is idle, and do not exit until
811    the command is finished. */
812 
813 static int mdio_read(struct net_device *dev, int phy_id, int location)
814 {
815 	struct hamachi_private *hmp = netdev_priv(dev);
816 	void __iomem *ioaddr = hmp->base;
817 	int i;
818 
819 	/* We should check busy first - per docs -KDU */
820 	for (i = 10000; i >= 0; i--)
821 		if ((readw(ioaddr + MII_Status) & 1) == 0)
822 			break;
823 	writew((phy_id<<8) + location, ioaddr + MII_Addr);
824 	writew(0x0001, ioaddr + MII_Cmd);
825 	for (i = 10000; i >= 0; i--)
826 		if ((readw(ioaddr + MII_Status) & 1) == 0)
827 			break;
828 	return readw(ioaddr + MII_Rd_Data);
829 }
830 
831 static void mdio_write(struct net_device *dev, int phy_id, int location, int value)
832 {
833 	struct hamachi_private *hmp = netdev_priv(dev);
834 	void __iomem *ioaddr = hmp->base;
835 	int i;
836 
837 	/* We should check busy first - per docs -KDU */
838 	for (i = 10000; i >= 0; i--)
839 		if ((readw(ioaddr + MII_Status) & 1) == 0)
840 			break;
841 	writew((phy_id<<8) + location, ioaddr + MII_Addr);
842 	writew(value, ioaddr + MII_Wr_Data);
843 
844 	/* Wait for the command to finish. */
845 	for (i = 10000; i >= 0; i--)
846 		if ((readw(ioaddr + MII_Status) & 1) == 0)
847 			break;
848 }
849 
850 
851 static int hamachi_open(struct net_device *dev)
852 {
853 	struct hamachi_private *hmp = netdev_priv(dev);
854 	void __iomem *ioaddr = hmp->base;
855 	int i;
856 	u32 rx_int_var, tx_int_var;
857 	u16 fifo_info;
858 
859 	i = request_irq(hmp->pci_dev->irq, hamachi_interrupt, IRQF_SHARED,
860 			dev->name, dev);
861 	if (i)
862 		return i;
863 
864 	hamachi_init_ring(dev);
865 
866 #if ADDRLEN == 64
867 	/* writellll anyone ? */
868 	writel(hmp->rx_ring_dma, ioaddr + RxPtr);
869 	writel(hmp->rx_ring_dma >> 32, ioaddr + RxPtr + 4);
870 	writel(hmp->tx_ring_dma, ioaddr + TxPtr);
871 	writel(hmp->tx_ring_dma >> 32, ioaddr + TxPtr + 4);
872 #else
873 	writel(hmp->rx_ring_dma, ioaddr + RxPtr);
874 	writel(hmp->tx_ring_dma, ioaddr + TxPtr);
875 #endif
876 
877 	/* TODO:  It would make sense to organize this as words since the card
878 	 * documentation does. -KDU
879 	 */
880 	for (i = 0; i < 6; i++)
881 		writeb(dev->dev_addr[i], ioaddr + StationAddr + i);
882 
883 	/* Initialize other registers: with so many this eventually this will
884 	   converted to an offset/value list. */
885 
886 	/* Configure the FIFO */
887 	fifo_info = (readw(ioaddr + GPIO) & 0x00C0) >> 6;
888 	switch (fifo_info){
889 		case 0 :
890 			/* No FIFO */
891 			writew(0x0000, ioaddr + FIFOcfg);
892 			break;
893 		case 1 :
894 			/* Configure the FIFO for 512K external, 16K used for Tx. */
895 			writew(0x0028, ioaddr + FIFOcfg);
896 			break;
897 		case 2 :
898 			/* Configure the FIFO for 1024 external, 32K used for Tx. */
899 			writew(0x004C, ioaddr + FIFOcfg);
900 			break;
901 		case 3 :
902 			/* Configure the FIFO for 2048 external, 32K used for Tx. */
903 			writew(0x006C, ioaddr + FIFOcfg);
904 			break;
905 		default :
906 			printk(KERN_WARNING "%s:  Unsupported external memory config!\n",
907 				dev->name);
908 			/* Default to no FIFO */
909 			writew(0x0000, ioaddr + FIFOcfg);
910 			break;
911 	}
912 
913 	if (dev->if_port == 0)
914 		dev->if_port = hmp->default_port;
915 
916 
917 	/* Setting the Rx mode will start the Rx process. */
918 	/* If someone didn't choose a duplex, default to full-duplex */
919 	if (hmp->duplex_lock != 1)
920 		hmp->mii_if.full_duplex = 1;
921 
922 	/* always 1, takes no more time to do it */
923 	writew(0x0001, ioaddr + RxChecksum);
924 	writew(0x0000, ioaddr + TxChecksum);
925 	writew(0x8000, ioaddr + MACCnfg); /* Soft reset the MAC */
926 	writew(0x215F, ioaddr + MACCnfg);
927 	writew(0x000C, ioaddr + FrameGap0);
928 	/* WHAT?!?!?  Why isn't this documented somewhere? -KDU */
929 	writew(0x1018, ioaddr + FrameGap1);
930 	/* Why do we enable receives/transmits here? -KDU */
931 	writew(0x0780, ioaddr + MACCnfg2); /* Upper 16 bits control LEDs. */
932 	/* Enable automatic generation of flow control frames, period 0xffff. */
933 	writel(0x0030FFFF, ioaddr + FlowCtrl);
934 	writew(MAX_FRAME_SIZE, ioaddr + MaxFrameSize); 	/* dev->mtu+14 ??? */
935 
936 	/* Enable legacy links. */
937 	writew(0x0400, ioaddr + ANXchngCtrl);	/* Enable legacy links. */
938 	/* Initial Link LED to blinking red. */
939 	writeb(0x03, ioaddr + LEDCtrl);
940 
941 	/* Configure interrupt mitigation.  This has a great effect on
942 	   performance, so systems tuning should start here!. */
943 
944 	rx_int_var = hmp->rx_int_var;
945 	tx_int_var = hmp->tx_int_var;
946 
947 	if (hamachi_debug > 1) {
948 		printk("max_tx_latency: %d, max_tx_gap: %d, min_tx_pkt: %d\n",
949 			tx_int_var & 0x00ff, (tx_int_var & 0x00ff00) >> 8,
950 			(tx_int_var & 0x00ff0000) >> 16);
951 		printk("max_rx_latency: %d, max_rx_gap: %d, min_rx_pkt: %d\n",
952 			rx_int_var & 0x00ff, (rx_int_var & 0x00ff00) >> 8,
953 			(rx_int_var & 0x00ff0000) >> 16);
954 		printk("rx_int_var: %x, tx_int_var: %x\n", rx_int_var, tx_int_var);
955 	}
956 
957 	writel(tx_int_var, ioaddr + TxIntrCtrl);
958 	writel(rx_int_var, ioaddr + RxIntrCtrl);
959 
960 	set_rx_mode(dev);
961 
962 	netif_start_queue(dev);
963 
964 	/* Enable interrupts by setting the interrupt mask. */
965 	writel(0x80878787, ioaddr + InterruptEnable);
966 	writew(0x0000, ioaddr + EventStatus);	/* Clear non-interrupting events */
967 
968 	/* Configure and start the DMA channels. */
969 	/* Burst sizes are in the low three bits: size = 4<<(val&7) */
970 #if ADDRLEN == 64
971 	writew(0x005D, ioaddr + RxDMACtrl); 		/* 128 dword bursts */
972 	writew(0x005D, ioaddr + TxDMACtrl);
973 #else
974 	writew(0x001D, ioaddr + RxDMACtrl);
975 	writew(0x001D, ioaddr + TxDMACtrl);
976 #endif
977 	writew(0x0001, ioaddr + RxCmd);
978 
979 	if (hamachi_debug > 2) {
980 		printk(KERN_DEBUG "%s: Done hamachi_open(), status: Rx %x Tx %x.\n",
981 			   dev->name, readw(ioaddr + RxStatus), readw(ioaddr + TxStatus));
982 	}
983 	/* Set the timer to check for link beat. */
984 	timer_setup(&hmp->timer, hamachi_timer, 0);
985 	hmp->timer.expires = RUN_AT((24*HZ)/10);			/* 2.4 sec. */
986 	add_timer(&hmp->timer);
987 
988 	return 0;
989 }
990 
991 static inline int hamachi_tx(struct net_device *dev)
992 {
993 	struct hamachi_private *hmp = netdev_priv(dev);
994 
995 	/* Update the dirty pointer until we find an entry that is
996 		still owned by the card */
997 	for (; hmp->cur_tx - hmp->dirty_tx > 0; hmp->dirty_tx++) {
998 		int entry = hmp->dirty_tx % TX_RING_SIZE;
999 		struct sk_buff *skb;
1000 
1001 		if (hmp->tx_ring[entry].status_n_length & cpu_to_le32(DescOwn))
1002 			break;
1003 		/* Free the original skb. */
1004 		skb = hmp->tx_skbuff[entry];
1005 		if (skb) {
1006 			dma_unmap_single(&hmp->pci_dev->dev,
1007 					 leXX_to_cpu(hmp->tx_ring[entry].addr),
1008 					 skb->len, DMA_TO_DEVICE);
1009 			dev_kfree_skb(skb);
1010 			hmp->tx_skbuff[entry] = NULL;
1011 		}
1012 		hmp->tx_ring[entry].status_n_length = 0;
1013 		if (entry >= TX_RING_SIZE-1)
1014 			hmp->tx_ring[TX_RING_SIZE-1].status_n_length |=
1015 				cpu_to_le32(DescEndRing);
1016 		dev->stats.tx_packets++;
1017 	}
1018 
1019 	return 0;
1020 }
1021 
1022 static void hamachi_timer(struct timer_list *t)
1023 {
1024 	struct hamachi_private *hmp = from_timer(hmp, t, timer);
1025 	struct net_device *dev = hmp->mii_if.dev;
1026 	void __iomem *ioaddr = hmp->base;
1027 	int next_tick = 10*HZ;
1028 
1029 	if (hamachi_debug > 2) {
1030 		printk(KERN_INFO "%s: Hamachi Autonegotiation status %4.4x, LPA "
1031 			   "%4.4x.\n", dev->name, readw(ioaddr + ANStatus),
1032 			   readw(ioaddr + ANLinkPartnerAbility));
1033 		printk(KERN_INFO "%s: Autonegotiation regs %4.4x %4.4x %4.4x "
1034 		       "%4.4x %4.4x %4.4x.\n", dev->name,
1035 		       readw(ioaddr + 0x0e0),
1036 		       readw(ioaddr + 0x0e2),
1037 		       readw(ioaddr + 0x0e4),
1038 		       readw(ioaddr + 0x0e6),
1039 		       readw(ioaddr + 0x0e8),
1040 		       readw(ioaddr + 0x0eA));
1041 	}
1042 	/* We could do something here... nah. */
1043 	hmp->timer.expires = RUN_AT(next_tick);
1044 	add_timer(&hmp->timer);
1045 }
1046 
1047 static void hamachi_tx_timeout(struct net_device *dev, unsigned int txqueue)
1048 {
1049 	int i;
1050 	struct hamachi_private *hmp = netdev_priv(dev);
1051 	void __iomem *ioaddr = hmp->base;
1052 
1053 	printk(KERN_WARNING "%s: Hamachi transmit timed out, status %8.8x,"
1054 		   " resetting...\n", dev->name, (int)readw(ioaddr + TxStatus));
1055 
1056 	{
1057 		printk(KERN_DEBUG "  Rx ring %p: ", hmp->rx_ring);
1058 		for (i = 0; i < RX_RING_SIZE; i++)
1059 			printk(KERN_CONT " %8.8x",
1060 			       le32_to_cpu(hmp->rx_ring[i].status_n_length));
1061 		printk(KERN_CONT "\n");
1062 		printk(KERN_DEBUG"  Tx ring %p: ", hmp->tx_ring);
1063 		for (i = 0; i < TX_RING_SIZE; i++)
1064 			printk(KERN_CONT " %4.4x",
1065 			       le32_to_cpu(hmp->tx_ring[i].status_n_length));
1066 		printk(KERN_CONT "\n");
1067 	}
1068 
1069 	/* Reinit the hardware and make sure the Rx and Tx processes
1070 		are up and running.
1071 	 */
1072 	dev->if_port = 0;
1073 	/* The right way to do Reset. -KDU
1074 	 *		-Clear OWN bit in all Rx/Tx descriptors
1075 	 *		-Wait 50 uS for channels to go idle
1076 	 *		-Turn off MAC receiver
1077 	 *		-Issue Reset
1078 	 */
1079 
1080 	for (i = 0; i < RX_RING_SIZE; i++)
1081 		hmp->rx_ring[i].status_n_length &= cpu_to_le32(~DescOwn);
1082 
1083 	/* Presume that all packets in the Tx queue are gone if we have to
1084 	 * re-init the hardware.
1085 	 */
1086 	for (i = 0; i < TX_RING_SIZE; i++){
1087 		struct sk_buff *skb;
1088 
1089 		if (i >= TX_RING_SIZE - 1)
1090 			hmp->tx_ring[i].status_n_length =
1091 				cpu_to_le32(DescEndRing) |
1092 				(hmp->tx_ring[i].status_n_length &
1093 				 cpu_to_le32(0x0000ffff));
1094 		else
1095 			hmp->tx_ring[i].status_n_length &= cpu_to_le32(0x0000ffff);
1096 		skb = hmp->tx_skbuff[i];
1097 		if (skb){
1098 			dma_unmap_single(&hmp->pci_dev->dev,
1099 					 leXX_to_cpu(hmp->tx_ring[i].addr),
1100 					 skb->len, DMA_TO_DEVICE);
1101 			dev_kfree_skb(skb);
1102 			hmp->tx_skbuff[i] = NULL;
1103 		}
1104 	}
1105 
1106 	udelay(60); /* Sleep 60 us just for safety sake */
1107 	writew(0x0002, ioaddr + RxCmd); /* STOP Rx */
1108 
1109 	writeb(0x01, ioaddr + ChipReset);  /* Reinit the hardware */
1110 
1111 	hmp->tx_full = 0;
1112 	hmp->cur_rx = hmp->cur_tx = 0;
1113 	hmp->dirty_rx = hmp->dirty_tx = 0;
1114 	/* Rx packets are also presumed lost; however, we need to make sure a
1115 	 * ring of buffers is in tact. -KDU
1116 	 */
1117 	for (i = 0; i < RX_RING_SIZE; i++){
1118 		struct sk_buff *skb = hmp->rx_skbuff[i];
1119 
1120 		if (skb){
1121 			dma_unmap_single(&hmp->pci_dev->dev,
1122 					 leXX_to_cpu(hmp->rx_ring[i].addr),
1123 					 hmp->rx_buf_sz, DMA_FROM_DEVICE);
1124 			dev_kfree_skb(skb);
1125 			hmp->rx_skbuff[i] = NULL;
1126 		}
1127 	}
1128 	/* Fill in the Rx buffers.  Handle allocation failure gracefully. */
1129 	for (i = 0; i < RX_RING_SIZE; i++) {
1130 		struct sk_buff *skb;
1131 
1132 		skb = netdev_alloc_skb_ip_align(dev, hmp->rx_buf_sz);
1133 		hmp->rx_skbuff[i] = skb;
1134 		if (skb == NULL)
1135 			break;
1136 
1137 		hmp->rx_ring[i].addr = cpu_to_leXX(dma_map_single(&hmp->pci_dev->dev,
1138 								  skb->data,
1139 								  hmp->rx_buf_sz,
1140 								  DMA_FROM_DEVICE));
1141 		hmp->rx_ring[i].status_n_length = cpu_to_le32(DescOwn |
1142 			DescEndPacket | DescIntr | (hmp->rx_buf_sz - 2));
1143 	}
1144 	hmp->dirty_rx = (unsigned int)(i - RX_RING_SIZE);
1145 	/* Mark the last entry as wrapping the ring. */
1146 	hmp->rx_ring[RX_RING_SIZE-1].status_n_length |= cpu_to_le32(DescEndRing);
1147 
1148 	/* Trigger an immediate transmit demand. */
1149 	netif_trans_update(dev); /* prevent tx timeout */
1150 	dev->stats.tx_errors++;
1151 
1152 	/* Restart the chip's Tx/Rx processes . */
1153 	writew(0x0002, ioaddr + TxCmd); /* STOP Tx */
1154 	writew(0x0001, ioaddr + TxCmd); /* START Tx */
1155 	writew(0x0001, ioaddr + RxCmd); /* START Rx */
1156 
1157 	netif_wake_queue(dev);
1158 }
1159 
1160 
1161 /* Initialize the Rx and Tx rings, along with various 'dev' bits. */
1162 static void hamachi_init_ring(struct net_device *dev)
1163 {
1164 	struct hamachi_private *hmp = netdev_priv(dev);
1165 	int i;
1166 
1167 	hmp->tx_full = 0;
1168 	hmp->cur_rx = hmp->cur_tx = 0;
1169 	hmp->dirty_rx = hmp->dirty_tx = 0;
1170 
1171 	/* +26 gets the maximum ethernet encapsulation, +7 & ~7 because the
1172 	 * card needs room to do 8 byte alignment, +2 so we can reserve
1173 	 * the first 2 bytes, and +16 gets room for the status word from the
1174 	 * card.  -KDU
1175 	 */
1176 	hmp->rx_buf_sz = (dev->mtu <= 1492 ? PKT_BUF_SZ :
1177 		(((dev->mtu+26+7) & ~7) + 16));
1178 
1179 	/* Initialize all Rx descriptors. */
1180 	for (i = 0; i < RX_RING_SIZE; i++) {
1181 		hmp->rx_ring[i].status_n_length = 0;
1182 		hmp->rx_skbuff[i] = NULL;
1183 	}
1184 	/* Fill in the Rx buffers.  Handle allocation failure gracefully. */
1185 	for (i = 0; i < RX_RING_SIZE; i++) {
1186 		struct sk_buff *skb = netdev_alloc_skb(dev, hmp->rx_buf_sz + 2);
1187 		hmp->rx_skbuff[i] = skb;
1188 		if (skb == NULL)
1189 			break;
1190 		skb_reserve(skb, 2); /* 16 byte align the IP header. */
1191 		hmp->rx_ring[i].addr = cpu_to_leXX(dma_map_single(&hmp->pci_dev->dev,
1192 								  skb->data,
1193 								  hmp->rx_buf_sz,
1194 								  DMA_FROM_DEVICE));
1195 		/* -2 because it doesn't REALLY have that first 2 bytes -KDU */
1196 		hmp->rx_ring[i].status_n_length = cpu_to_le32(DescOwn |
1197 			DescEndPacket | DescIntr | (hmp->rx_buf_sz -2));
1198 	}
1199 	hmp->dirty_rx = (unsigned int)(i - RX_RING_SIZE);
1200 	hmp->rx_ring[RX_RING_SIZE-1].status_n_length |= cpu_to_le32(DescEndRing);
1201 
1202 	for (i = 0; i < TX_RING_SIZE; i++) {
1203 		hmp->tx_skbuff[i] = NULL;
1204 		hmp->tx_ring[i].status_n_length = 0;
1205 	}
1206 	/* Mark the last entry of the ring */
1207 	hmp->tx_ring[TX_RING_SIZE-1].status_n_length |= cpu_to_le32(DescEndRing);
1208 }
1209 
1210 
1211 static netdev_tx_t hamachi_start_xmit(struct sk_buff *skb,
1212 				      struct net_device *dev)
1213 {
1214 	struct hamachi_private *hmp = netdev_priv(dev);
1215 	unsigned entry;
1216 	u16 status;
1217 
1218 	/* Ok, now make sure that the queue has space before trying to
1219 		add another skbuff.  if we return non-zero the scheduler
1220 		should interpret this as a queue full and requeue the buffer
1221 		for later.
1222 	 */
1223 	if (hmp->tx_full) {
1224 		/* We should NEVER reach this point -KDU */
1225 		printk(KERN_WARNING "%s: Hamachi transmit queue full at slot %d.\n",dev->name, hmp->cur_tx);
1226 
1227 		/* Wake the potentially-idle transmit channel. */
1228 		/* If we don't need to read status, DON'T -KDU */
1229 		status=readw(hmp->base + TxStatus);
1230 		if( !(status & 0x0001) || (status & 0x0002))
1231 			writew(0x0001, hmp->base + TxCmd);
1232 		return NETDEV_TX_BUSY;
1233 	}
1234 
1235 	/* Caution: the write order is important here, set the field
1236 	   with the "ownership" bits last. */
1237 
1238 	/* Calculate the next Tx descriptor entry. */
1239 	entry = hmp->cur_tx % TX_RING_SIZE;
1240 
1241 	hmp->tx_skbuff[entry] = skb;
1242 
1243 	hmp->tx_ring[entry].addr = cpu_to_leXX(dma_map_single(&hmp->pci_dev->dev,
1244 							      skb->data,
1245 							      skb->len,
1246 							      DMA_TO_DEVICE));
1247 
1248 	/* Hmmmm, could probably put a DescIntr on these, but the way
1249 		the driver is currently coded makes Tx interrupts unnecessary
1250 		since the clearing of the Tx ring is handled by the start_xmit
1251 		routine.  This organization helps mitigate the interrupts a
1252 		bit and probably renders the max_tx_latency param useless.
1253 
1254 		Update: Putting a DescIntr bit on all of the descriptors and
1255 		mitigating interrupt frequency with the tx_min_pkt parameter. -KDU
1256 	*/
1257 	if (entry >= TX_RING_SIZE-1)		 /* Wrap ring */
1258 		hmp->tx_ring[entry].status_n_length = cpu_to_le32(DescOwn |
1259 			DescEndPacket | DescEndRing | DescIntr | skb->len);
1260 	else
1261 		hmp->tx_ring[entry].status_n_length = cpu_to_le32(DescOwn |
1262 			DescEndPacket | DescIntr | skb->len);
1263 	hmp->cur_tx++;
1264 
1265 	/* Non-x86 Todo: explicitly flush cache lines here. */
1266 
1267 	/* Wake the potentially-idle transmit channel. */
1268 	/* If we don't need to read status, DON'T -KDU */
1269 	status=readw(hmp->base + TxStatus);
1270 	if( !(status & 0x0001) || (status & 0x0002))
1271 		writew(0x0001, hmp->base + TxCmd);
1272 
1273 	/* Immediately before returning, let's clear as many entries as we can. */
1274 	hamachi_tx(dev);
1275 
1276 	/* We should kick the bottom half here, since we are not accepting
1277 	 * interrupts with every packet.  i.e. realize that Gigabit ethernet
1278 	 * can transmit faster than ordinary machines can load packets;
1279 	 * hence, any packet that got put off because we were in the transmit
1280 	 * routine should IMMEDIATELY get a chance to be re-queued. -KDU
1281 	 */
1282 	if ((hmp->cur_tx - hmp->dirty_tx) < (TX_RING_SIZE - 4))
1283 		netif_wake_queue(dev);  /* Typical path */
1284 	else {
1285 		hmp->tx_full = 1;
1286 		netif_stop_queue(dev);
1287 	}
1288 
1289 	if (hamachi_debug > 4) {
1290 		printk(KERN_DEBUG "%s: Hamachi transmit frame #%d queued in slot %d.\n",
1291 			   dev->name, hmp->cur_tx, entry);
1292 	}
1293 	return NETDEV_TX_OK;
1294 }
1295 
1296 /* The interrupt handler does all of the Rx thread work and cleans up
1297    after the Tx thread. */
1298 static irqreturn_t hamachi_interrupt(int irq, void *dev_instance)
1299 {
1300 	struct net_device *dev = dev_instance;
1301 	struct hamachi_private *hmp = netdev_priv(dev);
1302 	void __iomem *ioaddr = hmp->base;
1303 	long boguscnt = max_interrupt_work;
1304 	int handled = 0;
1305 
1306 #ifndef final_version			/* Can never occur. */
1307 	if (dev == NULL) {
1308 		printk (KERN_ERR "hamachi_interrupt(): irq %d for unknown device.\n", irq);
1309 		return IRQ_NONE;
1310 	}
1311 #endif
1312 
1313 	spin_lock(&hmp->lock);
1314 
1315 	do {
1316 		u32 intr_status = readl(ioaddr + InterruptClear);
1317 
1318 		if (hamachi_debug > 4)
1319 			printk(KERN_DEBUG "%s: Hamachi interrupt, status %4.4x.\n",
1320 				   dev->name, intr_status);
1321 
1322 		if (intr_status == 0)
1323 			break;
1324 
1325 		handled = 1;
1326 
1327 		if (intr_status & IntrRxDone)
1328 			hamachi_rx(dev);
1329 
1330 		if (intr_status & IntrTxDone){
1331 			/* This code should RARELY need to execute. After all, this is
1332 			 * a gigabit link, it should consume packets as fast as we put
1333 			 * them in AND we clear the Tx ring in hamachi_start_xmit().
1334 			 */
1335 			if (hmp->tx_full){
1336 				for (; hmp->cur_tx - hmp->dirty_tx > 0; hmp->dirty_tx++){
1337 					int entry = hmp->dirty_tx % TX_RING_SIZE;
1338 					struct sk_buff *skb;
1339 
1340 					if (hmp->tx_ring[entry].status_n_length & cpu_to_le32(DescOwn))
1341 						break;
1342 					skb = hmp->tx_skbuff[entry];
1343 					/* Free the original skb. */
1344 					if (skb){
1345 						dma_unmap_single(&hmp->pci_dev->dev,
1346 								 leXX_to_cpu(hmp->tx_ring[entry].addr),
1347 								 skb->len,
1348 								 DMA_TO_DEVICE);
1349 						dev_consume_skb_irq(skb);
1350 						hmp->tx_skbuff[entry] = NULL;
1351 					}
1352 					hmp->tx_ring[entry].status_n_length = 0;
1353 					if (entry >= TX_RING_SIZE-1)
1354 						hmp->tx_ring[TX_RING_SIZE-1].status_n_length |=
1355 							cpu_to_le32(DescEndRing);
1356 					dev->stats.tx_packets++;
1357 				}
1358 				if (hmp->cur_tx - hmp->dirty_tx < TX_RING_SIZE - 4){
1359 					/* The ring is no longer full */
1360 					hmp->tx_full = 0;
1361 					netif_wake_queue(dev);
1362 				}
1363 			} else {
1364 				netif_wake_queue(dev);
1365 			}
1366 		}
1367 
1368 
1369 		/* Abnormal error summary/uncommon events handlers. */
1370 		if (intr_status &
1371 			(IntrTxPCIFault | IntrTxPCIErr | IntrRxPCIFault | IntrRxPCIErr |
1372 			 LinkChange | NegotiationChange | StatsMax))
1373 			hamachi_error(dev, intr_status);
1374 
1375 		if (--boguscnt < 0) {
1376 			printk(KERN_WARNING "%s: Too much work at interrupt, status=0x%4.4x.\n",
1377 				   dev->name, intr_status);
1378 			break;
1379 		}
1380 	} while (1);
1381 
1382 	if (hamachi_debug > 3)
1383 		printk(KERN_DEBUG "%s: exiting interrupt, status=%#4.4x.\n",
1384 			   dev->name, readl(ioaddr + IntrStatus));
1385 
1386 #ifndef final_version
1387 	/* Code that should never be run!  Perhaps remove after testing.. */
1388 	{
1389 		static int stopit = 10;
1390 		if (dev->start == 0  &&  --stopit < 0) {
1391 			printk(KERN_ERR "%s: Emergency stop, looping startup interrupt.\n",
1392 				   dev->name);
1393 			free_irq(irq, dev);
1394 		}
1395 	}
1396 #endif
1397 
1398 	spin_unlock(&hmp->lock);
1399 	return IRQ_RETVAL(handled);
1400 }
1401 
1402 /* This routine is logically part of the interrupt handler, but separated
1403    for clarity and better register allocation. */
1404 static int hamachi_rx(struct net_device *dev)
1405 {
1406 	struct hamachi_private *hmp = netdev_priv(dev);
1407 	int entry = hmp->cur_rx % RX_RING_SIZE;
1408 	int boguscnt = (hmp->dirty_rx + RX_RING_SIZE) - hmp->cur_rx;
1409 
1410 	if (hamachi_debug > 4) {
1411 		printk(KERN_DEBUG " In hamachi_rx(), entry %d status %4.4x.\n",
1412 			   entry, hmp->rx_ring[entry].status_n_length);
1413 	}
1414 
1415 	/* If EOP is set on the next entry, it's a new packet. Send it up. */
1416 	while (1) {
1417 		struct hamachi_desc *desc = &(hmp->rx_ring[entry]);
1418 		u32 desc_status = le32_to_cpu(desc->status_n_length);
1419 		u16 data_size = desc_status;	/* Implicit truncate */
1420 		u8 *buf_addr;
1421 		s32 frame_status;
1422 
1423 		if (desc_status & DescOwn)
1424 			break;
1425 		dma_sync_single_for_cpu(&hmp->pci_dev->dev,
1426 					leXX_to_cpu(desc->addr),
1427 					hmp->rx_buf_sz, DMA_FROM_DEVICE);
1428 		buf_addr = (u8 *) hmp->rx_skbuff[entry]->data;
1429 		frame_status = get_unaligned_le32(&(buf_addr[data_size - 12]));
1430 		if (hamachi_debug > 4)
1431 			printk(KERN_DEBUG "  hamachi_rx() status was %8.8x.\n",
1432 				frame_status);
1433 		if (--boguscnt < 0)
1434 			break;
1435 		if ( ! (desc_status & DescEndPacket)) {
1436 			printk(KERN_WARNING "%s: Oversized Ethernet frame spanned "
1437 				   "multiple buffers, entry %#x length %d status %4.4x!\n",
1438 				   dev->name, hmp->cur_rx, data_size, desc_status);
1439 			printk(KERN_WARNING "%s: Oversized Ethernet frame %p vs %p.\n",
1440 				   dev->name, desc, &hmp->rx_ring[hmp->cur_rx % RX_RING_SIZE]);
1441 			printk(KERN_WARNING "%s: Oversized Ethernet frame -- next status %x/%x last status %x.\n",
1442 				   dev->name,
1443 				   le32_to_cpu(hmp->rx_ring[(hmp->cur_rx+1) % RX_RING_SIZE].status_n_length) & 0xffff0000,
1444 				   le32_to_cpu(hmp->rx_ring[(hmp->cur_rx+1) % RX_RING_SIZE].status_n_length) & 0x0000ffff,
1445 				   le32_to_cpu(hmp->rx_ring[(hmp->cur_rx-1) % RX_RING_SIZE].status_n_length));
1446 			dev->stats.rx_length_errors++;
1447 		} /* else  Omit for prototype errata??? */
1448 		if (frame_status & 0x00380000) {
1449 			/* There was an error. */
1450 			if (hamachi_debug > 2)
1451 				printk(KERN_DEBUG "  hamachi_rx() Rx error was %8.8x.\n",
1452 					   frame_status);
1453 			dev->stats.rx_errors++;
1454 			if (frame_status & 0x00600000)
1455 				dev->stats.rx_length_errors++;
1456 			if (frame_status & 0x00080000)
1457 				dev->stats.rx_frame_errors++;
1458 			if (frame_status & 0x00100000)
1459 				dev->stats.rx_crc_errors++;
1460 			if (frame_status < 0)
1461 				dev->stats.rx_dropped++;
1462 		} else {
1463 			struct sk_buff *skb;
1464 			/* Omit CRC */
1465 			u16 pkt_len = (frame_status & 0x07ff) - 4;
1466 #ifdef RX_CHECKSUM
1467 			u32 pfck = *(u32 *) &buf_addr[data_size - 8];
1468 #endif
1469 
1470 
1471 #ifndef final_version
1472 			if (hamachi_debug > 4)
1473 				printk(KERN_DEBUG "  hamachi_rx() normal Rx pkt length %d"
1474 					   " of %d, bogus_cnt %d.\n",
1475 					   pkt_len, data_size, boguscnt);
1476 			if (hamachi_debug > 5)
1477 				printk(KERN_DEBUG"%s:  rx status %8.8x %8.8x %8.8x %8.8x %8.8x.\n",
1478 					   dev->name,
1479 					   *(s32*)&(buf_addr[data_size - 20]),
1480 					   *(s32*)&(buf_addr[data_size - 16]),
1481 					   *(s32*)&(buf_addr[data_size - 12]),
1482 					   *(s32*)&(buf_addr[data_size - 8]),
1483 					   *(s32*)&(buf_addr[data_size - 4]));
1484 #endif
1485 			/* Check if the packet is long enough to accept without copying
1486 			   to a minimally-sized skbuff. */
1487 			if (pkt_len < rx_copybreak &&
1488 			    (skb = netdev_alloc_skb(dev, pkt_len + 2)) != NULL) {
1489 #ifdef RX_CHECKSUM
1490 				printk(KERN_ERR "%s: rx_copybreak non-zero "
1491 				  "not good with RX_CHECKSUM\n", dev->name);
1492 #endif
1493 				skb_reserve(skb, 2);	/* 16 byte align the IP header */
1494 				dma_sync_single_for_cpu(&hmp->pci_dev->dev,
1495 							leXX_to_cpu(hmp->rx_ring[entry].addr),
1496 							hmp->rx_buf_sz,
1497 							DMA_FROM_DEVICE);
1498 				/* Call copy + cksum if available. */
1499 #if 1 || USE_IP_COPYSUM
1500 				skb_copy_to_linear_data(skb,
1501 					hmp->rx_skbuff[entry]->data, pkt_len);
1502 				skb_put(skb, pkt_len);
1503 #else
1504 				skb_put_data(skb, hmp->rx_ring_dma
1505 					     + entry*sizeof(*desc), pkt_len);
1506 #endif
1507 				dma_sync_single_for_device(&hmp->pci_dev->dev,
1508 							   leXX_to_cpu(hmp->rx_ring[entry].addr),
1509 							   hmp->rx_buf_sz,
1510 							   DMA_FROM_DEVICE);
1511 			} else {
1512 				dma_unmap_single(&hmp->pci_dev->dev,
1513 						 leXX_to_cpu(hmp->rx_ring[entry].addr),
1514 						 hmp->rx_buf_sz,
1515 						 DMA_FROM_DEVICE);
1516 				skb_put(skb = hmp->rx_skbuff[entry], pkt_len);
1517 				hmp->rx_skbuff[entry] = NULL;
1518 			}
1519 			skb->protocol = eth_type_trans(skb, dev);
1520 
1521 
1522 #ifdef RX_CHECKSUM
1523 			/* TCP or UDP on ipv4, DIX encoding */
1524 			if (pfck>>24 == 0x91 || pfck>>24 == 0x51) {
1525 				struct iphdr *ih = (struct iphdr *) skb->data;
1526 				/* Check that IP packet is at least 46 bytes, otherwise,
1527 				 * there may be pad bytes included in the hardware checksum.
1528 				 * This wouldn't happen if everyone padded with 0.
1529 				 */
1530 				if (ntohs(ih->tot_len) >= 46){
1531 					/* don't worry about frags */
1532 					if (!(ih->frag_off & cpu_to_be16(IP_MF|IP_OFFSET))) {
1533 						u32 inv = *(u32 *) &buf_addr[data_size - 16];
1534 						u32 *p = (u32 *) &buf_addr[data_size - 20];
1535 						register u32 crc, p_r, p_r1;
1536 
1537 						if (inv & 4) {
1538 							inv &= ~4;
1539 							--p;
1540 						}
1541 						p_r = *p;
1542 						p_r1 = *(p-1);
1543 						switch (inv) {
1544 							case 0:
1545 								crc = (p_r & 0xffff) + (p_r >> 16);
1546 								break;
1547 							case 1:
1548 								crc = (p_r >> 16) + (p_r & 0xffff)
1549 									+ (p_r1 >> 16 & 0xff00);
1550 								break;
1551 							case 2:
1552 								crc = p_r + (p_r1 >> 16);
1553 								break;
1554 							case 3:
1555 								crc = p_r + (p_r1 & 0xff00) + (p_r1 >> 16);
1556 								break;
1557 							default:	/*NOTREACHED*/ crc = 0;
1558 						}
1559 						if (crc & 0xffff0000) {
1560 							crc &= 0xffff;
1561 							++crc;
1562 						}
1563 						/* tcp/udp will add in pseudo */
1564 						skb->csum = ntohs(pfck & 0xffff);
1565 						if (skb->csum > crc)
1566 							skb->csum -= crc;
1567 						else
1568 							skb->csum += (~crc & 0xffff);
1569 						/*
1570 						* could do the pseudo myself and return
1571 						* CHECKSUM_UNNECESSARY
1572 						*/
1573 						skb->ip_summed = CHECKSUM_COMPLETE;
1574 					}
1575 				}
1576 			}
1577 #endif  /* RX_CHECKSUM */
1578 
1579 			netif_rx(skb);
1580 			dev->stats.rx_packets++;
1581 		}
1582 		entry = (++hmp->cur_rx) % RX_RING_SIZE;
1583 	}
1584 
1585 	/* Refill the Rx ring buffers. */
1586 	for (; hmp->cur_rx - hmp->dirty_rx > 0; hmp->dirty_rx++) {
1587 		struct hamachi_desc *desc;
1588 
1589 		entry = hmp->dirty_rx % RX_RING_SIZE;
1590 		desc = &(hmp->rx_ring[entry]);
1591 		if (hmp->rx_skbuff[entry] == NULL) {
1592 			struct sk_buff *skb = netdev_alloc_skb(dev, hmp->rx_buf_sz + 2);
1593 
1594 			hmp->rx_skbuff[entry] = skb;
1595 			if (skb == NULL)
1596 				break;		/* Better luck next round. */
1597 			skb_reserve(skb, 2);	/* Align IP on 16 byte boundaries */
1598 			desc->addr = cpu_to_leXX(dma_map_single(&hmp->pci_dev->dev,
1599 								skb->data,
1600 								hmp->rx_buf_sz,
1601 								DMA_FROM_DEVICE));
1602 		}
1603 		desc->status_n_length = cpu_to_le32(hmp->rx_buf_sz);
1604 		if (entry >= RX_RING_SIZE-1)
1605 			desc->status_n_length |= cpu_to_le32(DescOwn |
1606 				DescEndPacket | DescEndRing | DescIntr);
1607 		else
1608 			desc->status_n_length |= cpu_to_le32(DescOwn |
1609 				DescEndPacket | DescIntr);
1610 	}
1611 
1612 	/* Restart Rx engine if stopped. */
1613 	/* If we don't need to check status, don't. -KDU */
1614 	if (readw(hmp->base + RxStatus) & 0x0002)
1615 		writew(0x0001, hmp->base + RxCmd);
1616 
1617 	return 0;
1618 }
1619 
1620 /* This is more properly named "uncommon interrupt events", as it covers more
1621    than just errors. */
1622 static void hamachi_error(struct net_device *dev, int intr_status)
1623 {
1624 	struct hamachi_private *hmp = netdev_priv(dev);
1625 	void __iomem *ioaddr = hmp->base;
1626 
1627 	if (intr_status & (LinkChange|NegotiationChange)) {
1628 		if (hamachi_debug > 1)
1629 			printk(KERN_INFO "%s: Link changed: AutoNegotiation Ctrl"
1630 				   " %4.4x, Status %4.4x %4.4x Intr status %4.4x.\n",
1631 				   dev->name, readw(ioaddr + 0x0E0), readw(ioaddr + 0x0E2),
1632 				   readw(ioaddr + ANLinkPartnerAbility),
1633 				   readl(ioaddr + IntrStatus));
1634 		if (readw(ioaddr + ANStatus) & 0x20)
1635 			writeb(0x01, ioaddr + LEDCtrl);
1636 		else
1637 			writeb(0x03, ioaddr + LEDCtrl);
1638 	}
1639 	if (intr_status & StatsMax) {
1640 		hamachi_get_stats(dev);
1641 		/* Read the overflow bits to clear. */
1642 		readl(ioaddr + 0x370);
1643 		readl(ioaddr + 0x3F0);
1644 	}
1645 	if ((intr_status & ~(LinkChange|StatsMax|NegotiationChange|IntrRxDone|IntrTxDone)) &&
1646 	    hamachi_debug)
1647 		printk(KERN_ERR "%s: Something Wicked happened! %4.4x.\n",
1648 		       dev->name, intr_status);
1649 	/* Hmmmmm, it's not clear how to recover from PCI faults. */
1650 	if (intr_status & (IntrTxPCIErr | IntrTxPCIFault))
1651 		dev->stats.tx_fifo_errors++;
1652 	if (intr_status & (IntrRxPCIErr | IntrRxPCIFault))
1653 		dev->stats.rx_fifo_errors++;
1654 }
1655 
1656 static int hamachi_close(struct net_device *dev)
1657 {
1658 	struct hamachi_private *hmp = netdev_priv(dev);
1659 	void __iomem *ioaddr = hmp->base;
1660 	struct sk_buff *skb;
1661 	int i;
1662 
1663 	netif_stop_queue(dev);
1664 
1665 	if (hamachi_debug > 1) {
1666 		printk(KERN_DEBUG "%s: Shutting down ethercard, status was Tx %4.4x Rx %4.4x Int %2.2x.\n",
1667 			   dev->name, readw(ioaddr + TxStatus),
1668 			   readw(ioaddr + RxStatus), readl(ioaddr + IntrStatus));
1669 		printk(KERN_DEBUG "%s: Queue pointers were Tx %d / %d,  Rx %d / %d.\n",
1670 			   dev->name, hmp->cur_tx, hmp->dirty_tx, hmp->cur_rx, hmp->dirty_rx);
1671 	}
1672 
1673 	/* Disable interrupts by clearing the interrupt mask. */
1674 	writel(0x0000, ioaddr + InterruptEnable);
1675 
1676 	/* Stop the chip's Tx and Rx processes. */
1677 	writel(2, ioaddr + RxCmd);
1678 	writew(2, ioaddr + TxCmd);
1679 
1680 #ifdef __i386__
1681 	if (hamachi_debug > 2) {
1682 		printk(KERN_DEBUG "  Tx ring at %8.8x:\n",
1683 			   (int)hmp->tx_ring_dma);
1684 		for (i = 0; i < TX_RING_SIZE; i++)
1685 			printk(KERN_DEBUG " %c #%d desc. %8.8x %8.8x.\n",
1686 				   readl(ioaddr + TxCurPtr) == (long)&hmp->tx_ring[i] ? '>' : ' ',
1687 				   i, hmp->tx_ring[i].status_n_length, hmp->tx_ring[i].addr);
1688 		printk(KERN_DEBUG "  Rx ring %8.8x:\n",
1689 			   (int)hmp->rx_ring_dma);
1690 		for (i = 0; i < RX_RING_SIZE; i++) {
1691 			printk(KERN_DEBUG " %c #%d desc. %4.4x %8.8x\n",
1692 				   readl(ioaddr + RxCurPtr) == (long)&hmp->rx_ring[i] ? '>' : ' ',
1693 				   i, hmp->rx_ring[i].status_n_length, hmp->rx_ring[i].addr);
1694 			if (hamachi_debug > 6) {
1695 				if (*(u8*)hmp->rx_skbuff[i]->data != 0x69) {
1696 					u16 *addr = (u16 *)
1697 						hmp->rx_skbuff[i]->data;
1698 					int j;
1699 					printk(KERN_DEBUG "Addr: ");
1700 					for (j = 0; j < 0x50; j++)
1701 						printk(" %4.4x", addr[j]);
1702 					printk("\n");
1703 				}
1704 			}
1705 		}
1706 	}
1707 #endif /* __i386__ debugging only */
1708 
1709 	free_irq(hmp->pci_dev->irq, dev);
1710 
1711 	del_timer_sync(&hmp->timer);
1712 
1713 	/* Free all the skbuffs in the Rx queue. */
1714 	for (i = 0; i < RX_RING_SIZE; i++) {
1715 		skb = hmp->rx_skbuff[i];
1716 		hmp->rx_ring[i].status_n_length = 0;
1717 		if (skb) {
1718 			dma_unmap_single(&hmp->pci_dev->dev,
1719 					 leXX_to_cpu(hmp->rx_ring[i].addr),
1720 					 hmp->rx_buf_sz, DMA_FROM_DEVICE);
1721 			dev_kfree_skb(skb);
1722 			hmp->rx_skbuff[i] = NULL;
1723 		}
1724 		hmp->rx_ring[i].addr = cpu_to_leXX(0xBADF00D0); /* An invalid address. */
1725 	}
1726 	for (i = 0; i < TX_RING_SIZE; i++) {
1727 		skb = hmp->tx_skbuff[i];
1728 		if (skb) {
1729 			dma_unmap_single(&hmp->pci_dev->dev,
1730 					 leXX_to_cpu(hmp->tx_ring[i].addr),
1731 					 skb->len, DMA_TO_DEVICE);
1732 			dev_kfree_skb(skb);
1733 			hmp->tx_skbuff[i] = NULL;
1734 		}
1735 	}
1736 
1737 	writeb(0x00, ioaddr + LEDCtrl);
1738 
1739 	return 0;
1740 }
1741 
1742 static struct net_device_stats *hamachi_get_stats(struct net_device *dev)
1743 {
1744 	struct hamachi_private *hmp = netdev_priv(dev);
1745 	void __iomem *ioaddr = hmp->base;
1746 
1747 	/* We should lock this segment of code for SMP eventually, although
1748 	   the vulnerability window is very small and statistics are
1749 	   non-critical. */
1750         /* Ok, what goes here?  This appears to be stuck at 21 packets
1751            according to ifconfig.  It does get incremented in hamachi_tx(),
1752            so I think I'll comment it out here and see if better things
1753            happen.
1754         */
1755 	/* dev->stats.tx_packets	= readl(ioaddr + 0x000); */
1756 
1757 	/* Total Uni+Brd+Multi */
1758 	dev->stats.rx_bytes = readl(ioaddr + 0x330);
1759 	/* Total Uni+Brd+Multi */
1760 	dev->stats.tx_bytes = readl(ioaddr + 0x3B0);
1761 	/* Multicast Rx */
1762 	dev->stats.multicast = readl(ioaddr + 0x320);
1763 
1764 	/* Over+Undersized */
1765 	dev->stats.rx_length_errors = readl(ioaddr + 0x368);
1766 	/* Jabber */
1767 	dev->stats.rx_over_errors = readl(ioaddr + 0x35C);
1768 	/* Jabber */
1769 	dev->stats.rx_crc_errors = readl(ioaddr + 0x360);
1770 	/* Symbol Errs */
1771 	dev->stats.rx_frame_errors = readl(ioaddr + 0x364);
1772 	/* Dropped */
1773 	dev->stats.rx_missed_errors = readl(ioaddr + 0x36C);
1774 
1775 	return &dev->stats;
1776 }
1777 
1778 static void set_rx_mode(struct net_device *dev)
1779 {
1780 	struct hamachi_private *hmp = netdev_priv(dev);
1781 	void __iomem *ioaddr = hmp->base;
1782 
1783 	if (dev->flags & IFF_PROMISC) {			/* Set promiscuous. */
1784 		writew(0x000F, ioaddr + AddrMode);
1785 	} else if ((netdev_mc_count(dev) > 63) || (dev->flags & IFF_ALLMULTI)) {
1786 		/* Too many to match, or accept all multicasts. */
1787 		writew(0x000B, ioaddr + AddrMode);
1788 	} else if (!netdev_mc_empty(dev)) { /* Must use the CAM filter. */
1789 		struct netdev_hw_addr *ha;
1790 		int i = 0;
1791 
1792 		netdev_for_each_mc_addr(ha, dev) {
1793 			writel(*(u32 *)(ha->addr), ioaddr + 0x100 + i*8);
1794 			writel(0x20000 | (*(u16 *)&ha->addr[4]),
1795 				   ioaddr + 0x104 + i*8);
1796 			i++;
1797 		}
1798 		/* Clear remaining entries. */
1799 		for (; i < 64; i++)
1800 			writel(0, ioaddr + 0x104 + i*8);
1801 		writew(0x0003, ioaddr + AddrMode);
1802 	} else {					/* Normal, unicast/broadcast-only mode. */
1803 		writew(0x0001, ioaddr + AddrMode);
1804 	}
1805 }
1806 
1807 static int check_if_running(struct net_device *dev)
1808 {
1809 	if (!netif_running(dev))
1810 		return -EINVAL;
1811 	return 0;
1812 }
1813 
1814 static void hamachi_get_drvinfo(struct net_device *dev, struct ethtool_drvinfo *info)
1815 {
1816 	struct hamachi_private *np = netdev_priv(dev);
1817 
1818 	strlcpy(info->driver, DRV_NAME, sizeof(info->driver));
1819 	strlcpy(info->version, DRV_VERSION, sizeof(info->version));
1820 	strlcpy(info->bus_info, pci_name(np->pci_dev), sizeof(info->bus_info));
1821 }
1822 
1823 static int hamachi_get_link_ksettings(struct net_device *dev,
1824 				      struct ethtool_link_ksettings *cmd)
1825 {
1826 	struct hamachi_private *np = netdev_priv(dev);
1827 	spin_lock_irq(&np->lock);
1828 	mii_ethtool_get_link_ksettings(&np->mii_if, cmd);
1829 	spin_unlock_irq(&np->lock);
1830 	return 0;
1831 }
1832 
1833 static int hamachi_set_link_ksettings(struct net_device *dev,
1834 				      const struct ethtool_link_ksettings *cmd)
1835 {
1836 	struct hamachi_private *np = netdev_priv(dev);
1837 	int res;
1838 	spin_lock_irq(&np->lock);
1839 	res = mii_ethtool_set_link_ksettings(&np->mii_if, cmd);
1840 	spin_unlock_irq(&np->lock);
1841 	return res;
1842 }
1843 
1844 static int hamachi_nway_reset(struct net_device *dev)
1845 {
1846 	struct hamachi_private *np = netdev_priv(dev);
1847 	return mii_nway_restart(&np->mii_if);
1848 }
1849 
1850 static u32 hamachi_get_link(struct net_device *dev)
1851 {
1852 	struct hamachi_private *np = netdev_priv(dev);
1853 	return mii_link_ok(&np->mii_if);
1854 }
1855 
1856 static const struct ethtool_ops ethtool_ops = {
1857 	.begin = check_if_running,
1858 	.get_drvinfo = hamachi_get_drvinfo,
1859 	.nway_reset = hamachi_nway_reset,
1860 	.get_link = hamachi_get_link,
1861 	.get_link_ksettings = hamachi_get_link_ksettings,
1862 	.set_link_ksettings = hamachi_set_link_ksettings,
1863 };
1864 
1865 static const struct ethtool_ops ethtool_ops_no_mii = {
1866 	.begin = check_if_running,
1867 	.get_drvinfo = hamachi_get_drvinfo,
1868 };
1869 
1870 static int netdev_ioctl(struct net_device *dev, struct ifreq *rq, int cmd)
1871 {
1872 	struct hamachi_private *np = netdev_priv(dev);
1873 	struct mii_ioctl_data *data = if_mii(rq);
1874 	int rc;
1875 
1876 	if (!netif_running(dev))
1877 		return -EINVAL;
1878 
1879 	if (cmd == (SIOCDEVPRIVATE+3)) { /* set rx,tx intr params */
1880 		u32 *d = (u32 *)&rq->ifr_ifru;
1881 		/* Should add this check here or an ordinary user can do nasty
1882 		 * things. -KDU
1883 		 *
1884 		 * TODO: Shut down the Rx and Tx engines while doing this.
1885 		 */
1886 		if (!capable(CAP_NET_ADMIN))
1887 			return -EPERM;
1888 		writel(d[0], np->base + TxIntrCtrl);
1889 		writel(d[1], np->base + RxIntrCtrl);
1890 		printk(KERN_NOTICE "%s: tx %08x, rx %08x intr\n", dev->name,
1891 		  (u32) readl(np->base + TxIntrCtrl),
1892 		  (u32) readl(np->base + RxIntrCtrl));
1893 		rc = 0;
1894 	}
1895 
1896 	else {
1897 		spin_lock_irq(&np->lock);
1898 		rc = generic_mii_ioctl(&np->mii_if, data, cmd, NULL);
1899 		spin_unlock_irq(&np->lock);
1900 	}
1901 
1902 	return rc;
1903 }
1904 
1905 
1906 static void hamachi_remove_one(struct pci_dev *pdev)
1907 {
1908 	struct net_device *dev = pci_get_drvdata(pdev);
1909 
1910 	if (dev) {
1911 		struct hamachi_private *hmp = netdev_priv(dev);
1912 
1913 		dma_free_coherent(&pdev->dev, RX_TOTAL_SIZE, hmp->rx_ring,
1914 				  hmp->rx_ring_dma);
1915 		dma_free_coherent(&pdev->dev, TX_TOTAL_SIZE, hmp->tx_ring,
1916 				  hmp->tx_ring_dma);
1917 		unregister_netdev(dev);
1918 		iounmap(hmp->base);
1919 		free_netdev(dev);
1920 		pci_release_regions(pdev);
1921 	}
1922 }
1923 
1924 static const struct pci_device_id hamachi_pci_tbl[] = {
1925 	{ 0x1318, 0x0911, PCI_ANY_ID, PCI_ANY_ID, },
1926 	{ 0, }
1927 };
1928 MODULE_DEVICE_TABLE(pci, hamachi_pci_tbl);
1929 
1930 static struct pci_driver hamachi_driver = {
1931 	.name		= DRV_NAME,
1932 	.id_table	= hamachi_pci_tbl,
1933 	.probe		= hamachi_init_one,
1934 	.remove		= hamachi_remove_one,
1935 };
1936 
1937 static int __init hamachi_init (void)
1938 {
1939 /* when a module, this is printed whether or not devices are found in probe */
1940 #ifdef MODULE
1941 	printk(version);
1942 #endif
1943 	return pci_register_driver(&hamachi_driver);
1944 }
1945 
1946 static void __exit hamachi_exit (void)
1947 {
1948 	pci_unregister_driver(&hamachi_driver);
1949 }
1950 
1951 
1952 module_init(hamachi_init);
1953 module_exit(hamachi_exit);
1954