1 /* hamachi.c: A Packet Engines GNIC-II Gigabit Ethernet driver for Linux. */ 2 /* 3 Written 1998-2000 by Donald Becker. 4 Updates 2000 by Keith Underwood. 5 6 This software may be used and distributed according to the terms of 7 the GNU General Public License (GPL), incorporated herein by reference. 8 Drivers based on or derived from this code fall under the GPL and must 9 retain the authorship, copyright and license notice. This file is not 10 a complete program and may only be used when the entire operating 11 system is licensed under the GPL. 12 13 The author may be reached as becker@scyld.com, or C/O 14 Scyld Computing Corporation 15 410 Severn Ave., Suite 210 16 Annapolis MD 21403 17 18 This driver is for the Packet Engines GNIC-II PCI Gigabit Ethernet 19 adapter. 20 21 Support and updates available at 22 http://www.scyld.com/network/hamachi.html 23 [link no longer provides useful info -jgarzik] 24 or 25 http://www.parl.clemson.edu/~keithu/hamachi.html 26 27 */ 28 29 #define DRV_NAME "hamachi" 30 #define DRV_VERSION "2.1" 31 #define DRV_RELDATE "Sept 11, 2006" 32 33 34 /* A few user-configurable values. */ 35 36 static int debug = 1; /* 1 normal messages, 0 quiet .. 7 verbose. */ 37 #define final_version 38 #define hamachi_debug debug 39 /* Maximum events (Rx packets, etc.) to handle at each interrupt. */ 40 static int max_interrupt_work = 40; 41 static int mtu; 42 /* Default values selected by testing on a dual processor PIII-450 */ 43 /* These six interrupt control parameters may be set directly when loading the 44 * module, or through the rx_params and tx_params variables 45 */ 46 static int max_rx_latency = 0x11; 47 static int max_rx_gap = 0x05; 48 static int min_rx_pkt = 0x18; 49 static int max_tx_latency = 0x00; 50 static int max_tx_gap = 0x00; 51 static int min_tx_pkt = 0x30; 52 53 /* Set the copy breakpoint for the copy-only-tiny-frames scheme. 54 -Setting to > 1518 causes all frames to be copied 55 -Setting to 0 disables copies 56 */ 57 static int rx_copybreak; 58 59 /* An override for the hardware detection of bus width. 60 Set to 1 to force 32 bit PCI bus detection. Set to 4 to force 64 bit. 61 Add 2 to disable parity detection. 62 */ 63 static int force32; 64 65 66 /* Used to pass the media type, etc. 67 These exist for driver interoperability. 68 No media types are currently defined. 69 - The lower 4 bits are reserved for the media type. 70 - The next three bits may be set to one of the following: 71 0x00000000 : Autodetect PCI bus 72 0x00000010 : Force 32 bit PCI bus 73 0x00000020 : Disable parity detection 74 0x00000040 : Force 64 bit PCI bus 75 Default is autodetect 76 - The next bit can be used to force half-duplex. This is a bad 77 idea since no known implementations implement half-duplex, and, 78 in general, half-duplex for gigabit ethernet is a bad idea. 79 0x00000080 : Force half-duplex 80 Default is full-duplex. 81 - In the original driver, the ninth bit could be used to force 82 full-duplex. Maintain that for compatibility 83 0x00000200 : Force full-duplex 84 */ 85 #define MAX_UNITS 8 /* More are supported, limit only on options */ 86 static int options[MAX_UNITS] = {-1, -1, -1, -1, -1, -1, -1, -1}; 87 static int full_duplex[MAX_UNITS] = {-1, -1, -1, -1, -1, -1, -1, -1}; 88 /* The Hamachi chipset supports 3 parameters each for Rx and Tx 89 * interruput management. Parameters will be loaded as specified into 90 * the TxIntControl and RxIntControl registers. 91 * 92 * The registers are arranged as follows: 93 * 23 - 16 15 - 8 7 - 0 94 * _________________________________ 95 * | min_pkt | max_gap | max_latency | 96 * --------------------------------- 97 * min_pkt : The minimum number of packets processed between 98 * interrupts. 99 * max_gap : The maximum inter-packet gap in units of 8.192 us 100 * max_latency : The absolute time between interrupts in units of 8.192 us 101 * 102 */ 103 static int rx_params[MAX_UNITS] = {-1, -1, -1, -1, -1, -1, -1, -1}; 104 static int tx_params[MAX_UNITS] = {-1, -1, -1, -1, -1, -1, -1, -1}; 105 106 /* Operational parameters that are set at compile time. */ 107 108 /* Keep the ring sizes a power of two for compile efficiency. 109 The compiler will convert <unsigned>'%'<2^N> into a bit mask. 110 Making the Tx ring too large decreases the effectiveness of channel 111 bonding and packet priority. 112 There are no ill effects from too-large receive rings, except for 113 excessive memory usage */ 114 /* Empirically it appears that the Tx ring needs to be a little bigger 115 for these Gbit adapters or you get into an overrun condition really 116 easily. Also, things appear to work a bit better in back-to-back 117 configurations if the Rx ring is 8 times the size of the Tx ring 118 */ 119 #define TX_RING_SIZE 64 120 #define RX_RING_SIZE 512 121 #define TX_TOTAL_SIZE TX_RING_SIZE*sizeof(struct hamachi_desc) 122 #define RX_TOTAL_SIZE RX_RING_SIZE*sizeof(struct hamachi_desc) 123 124 /* 125 * Enable netdev_ioctl. Added interrupt coalescing parameter adjustment. 126 * 2/19/99 Pete Wyckoff <wyckoff@ca.sandia.gov> 127 */ 128 129 /* play with 64-bit addrlen; seems to be a teensy bit slower --pw */ 130 /* #define ADDRLEN 64 */ 131 132 /* 133 * RX_CHECKSUM turns on card-generated receive checksum generation for 134 * TCP and UDP packets. Otherwise the upper layers do the calculation. 135 * 3/10/1999 Pete Wyckoff <wyckoff@ca.sandia.gov> 136 */ 137 #define RX_CHECKSUM 138 139 /* Operational parameters that usually are not changed. */ 140 /* Time in jiffies before concluding the transmitter is hung. */ 141 #define TX_TIMEOUT (5*HZ) 142 143 #include <linux/capability.h> 144 #include <linux/module.h> 145 #include <linux/kernel.h> 146 #include <linux/string.h> 147 #include <linux/timer.h> 148 #include <linux/time.h> 149 #include <linux/errno.h> 150 #include <linux/ioport.h> 151 #include <linux/interrupt.h> 152 #include <linux/pci.h> 153 #include <linux/init.h> 154 #include <linux/ethtool.h> 155 #include <linux/mii.h> 156 #include <linux/netdevice.h> 157 #include <linux/etherdevice.h> 158 #include <linux/skbuff.h> 159 #include <linux/ip.h> 160 #include <linux/delay.h> 161 #include <linux/bitops.h> 162 163 #include <asm/uaccess.h> 164 #include <asm/processor.h> /* Processor type for cache alignment. */ 165 #include <asm/io.h> 166 #include <asm/unaligned.h> 167 #include <asm/cache.h> 168 169 static const char version[] __devinitconst = 170 KERN_INFO DRV_NAME ".c:v" DRV_VERSION " " DRV_RELDATE " Written by Donald Becker\n" 171 " Some modifications by Eric kasten <kasten@nscl.msu.edu>\n" 172 " Further modifications by Keith Underwood <keithu@parl.clemson.edu>\n"; 173 174 175 /* IP_MF appears to be only defined in <netinet/ip.h>, however, 176 we need it for hardware checksumming support. FYI... some of 177 the definitions in <netinet/ip.h> conflict/duplicate those in 178 other linux headers causing many compiler warnings. 179 */ 180 #ifndef IP_MF 181 #define IP_MF 0x2000 /* IP more frags from <netinet/ip.h> */ 182 #endif 183 184 /* Define IP_OFFSET to be IPOPT_OFFSET */ 185 #ifndef IP_OFFSET 186 #ifdef IPOPT_OFFSET 187 #define IP_OFFSET IPOPT_OFFSET 188 #else 189 #define IP_OFFSET 2 190 #endif 191 #endif 192 193 #define RUN_AT(x) (jiffies + (x)) 194 195 #ifndef ADDRLEN 196 #define ADDRLEN 32 197 #endif 198 199 /* Condensed bus+endian portability operations. */ 200 #if ADDRLEN == 64 201 #define cpu_to_leXX(addr) cpu_to_le64(addr) 202 #define leXX_to_cpu(addr) le64_to_cpu(addr) 203 #else 204 #define cpu_to_leXX(addr) cpu_to_le32(addr) 205 #define leXX_to_cpu(addr) le32_to_cpu(addr) 206 #endif 207 208 209 /* 210 Theory of Operation 211 212 I. Board Compatibility 213 214 This device driver is designed for the Packet Engines "Hamachi" 215 Gigabit Ethernet chip. The only PCA currently supported is the GNIC-II 64-bit 216 66Mhz PCI card. 217 218 II. Board-specific settings 219 220 No jumpers exist on the board. The chip supports software correction of 221 various motherboard wiring errors, however this driver does not support 222 that feature. 223 224 III. Driver operation 225 226 IIIa. Ring buffers 227 228 The Hamachi uses a typical descriptor based bus-master architecture. 229 The descriptor list is similar to that used by the Digital Tulip. 230 This driver uses two statically allocated fixed-size descriptor lists 231 formed into rings by a branch from the final descriptor to the beginning of 232 the list. The ring sizes are set at compile time by RX/TX_RING_SIZE. 233 234 This driver uses a zero-copy receive and transmit scheme similar my other 235 network drivers. 236 The driver allocates full frame size skbuffs for the Rx ring buffers at 237 open() time and passes the skb->data field to the Hamachi as receive data 238 buffers. When an incoming frame is less than RX_COPYBREAK bytes long, 239 a fresh skbuff is allocated and the frame is copied to the new skbuff. 240 When the incoming frame is larger, the skbuff is passed directly up the 241 protocol stack and replaced by a newly allocated skbuff. 242 243 The RX_COPYBREAK value is chosen to trade-off the memory wasted by 244 using a full-sized skbuff for small frames vs. the copying costs of larger 245 frames. Gigabit cards are typically used on generously configured machines 246 and the underfilled buffers have negligible impact compared to the benefit of 247 a single allocation size, so the default value of zero results in never 248 copying packets. 249 250 IIIb/c. Transmit/Receive Structure 251 252 The Rx and Tx descriptor structure are straight-forward, with no historical 253 baggage that must be explained. Unlike the awkward DBDMA structure, there 254 are no unused fields or option bits that had only one allowable setting. 255 256 Two details should be noted about the descriptors: The chip supports both 32 257 bit and 64 bit address structures, and the length field is overwritten on 258 the receive descriptors. The descriptor length is set in the control word 259 for each channel. The development driver uses 32 bit addresses only, however 260 64 bit addresses may be enabled for 64 bit architectures e.g. the Alpha. 261 262 IIId. Synchronization 263 264 This driver is very similar to my other network drivers. 265 The driver runs as two independent, single-threaded flows of control. One 266 is the send-packet routine, which enforces single-threaded use by the 267 dev->tbusy flag. The other thread is the interrupt handler, which is single 268 threaded by the hardware and other software. 269 270 The send packet thread has partial control over the Tx ring and 'dev->tbusy' 271 flag. It sets the tbusy flag whenever it's queuing a Tx packet. If the next 272 queue slot is empty, it clears the tbusy flag when finished otherwise it sets 273 the 'hmp->tx_full' flag. 274 275 The interrupt handler has exclusive control over the Rx ring and records stats 276 from the Tx ring. After reaping the stats, it marks the Tx queue entry as 277 empty by incrementing the dirty_tx mark. Iff the 'hmp->tx_full' flag is set, it 278 clears both the tx_full and tbusy flags. 279 280 IV. Notes 281 282 Thanks to Kim Stearns of Packet Engines for providing a pair of GNIC-II boards. 283 284 IVb. References 285 286 Hamachi Engineering Design Specification, 5/15/97 287 (Note: This version was marked "Confidential".) 288 289 IVc. Errata 290 291 None noted. 292 293 V. Recent Changes 294 295 01/15/1999 EPK Enlargement of the TX and RX ring sizes. This appears 296 to help avoid some stall conditions -- this needs further research. 297 298 01/15/1999 EPK Creation of the hamachi_tx function. This function cleans 299 the Tx ring and is called from hamachi_start_xmit (this used to be 300 called from hamachi_interrupt but it tends to delay execution of the 301 interrupt handler and thus reduce bandwidth by reducing the latency 302 between hamachi_rx()'s). Notably, some modification has been made so 303 that the cleaning loop checks only to make sure that the DescOwn bit 304 isn't set in the status flag since the card is not required 305 to set the entire flag to zero after processing. 306 307 01/15/1999 EPK In the hamachi_start_tx function, the Tx ring full flag is 308 checked before attempting to add a buffer to the ring. If the ring is full 309 an attempt is made to free any dirty buffers and thus find space for 310 the new buffer or the function returns non-zero which should case the 311 scheduler to reschedule the buffer later. 312 313 01/15/1999 EPK Some adjustments were made to the chip initialization. 314 End-to-end flow control should now be fully active and the interrupt 315 algorithm vars have been changed. These could probably use further tuning. 316 317 01/15/1999 EPK Added the max_{rx,tx}_latency options. These are used to 318 set the rx and tx latencies for the Hamachi interrupts. If you're having 319 problems with network stalls, try setting these to higher values. 320 Valid values are 0x00 through 0xff. 321 322 01/15/1999 EPK In general, the overall bandwidth has increased and 323 latencies are better (sometimes by a factor of 2). Stalls are rare at 324 this point, however there still appears to be a bug somewhere between the 325 hardware and driver. TCP checksum errors under load also appear to be 326 eliminated at this point. 327 328 01/18/1999 EPK Ensured that the DescEndRing bit was being set on both the 329 Rx and Tx rings. This appears to have been affecting whether a particular 330 peer-to-peer connection would hang under high load. I believe the Rx 331 rings was typically getting set correctly, but the Tx ring wasn't getting 332 the DescEndRing bit set during initialization. ??? Does this mean the 333 hamachi card is using the DescEndRing in processing even if a particular 334 slot isn't in use -- hypothetically, the card might be searching the 335 entire Tx ring for slots with the DescOwn bit set and then processing 336 them. If the DescEndRing bit isn't set, then it might just wander off 337 through memory until it hits a chunk of data with that bit set 338 and then looping back. 339 340 02/09/1999 EPK Added Michel Mueller's TxDMA Interrupt and Tx-timeout 341 problem (TxCmd and RxCmd need only to be set when idle or stopped. 342 343 02/09/1999 EPK Added code to check/reset dev->tbusy in hamachi_interrupt. 344 (Michel Mueller pointed out the ``permanently busy'' potential 345 problem here). 346 347 02/22/1999 EPK Added Pete Wyckoff's ioctl to control the Tx/Rx latencies. 348 349 02/23/1999 EPK Verified that the interrupt status field bits for Tx were 350 incorrectly defined and corrected (as per Michel Mueller). 351 352 02/23/1999 EPK Corrected the Tx full check to check that at least 4 slots 353 were available before reseting the tbusy and tx_full flags 354 (as per Michel Mueller). 355 356 03/11/1999 EPK Added Pete Wyckoff's hardware checksumming support. 357 358 12/31/1999 KDU Cleaned up assorted things and added Don's code to force 359 32 bit. 360 361 02/20/2000 KDU Some of the control was just plain odd. Cleaned up the 362 hamachi_start_xmit() and hamachi_interrupt() code. There is still some 363 re-structuring I would like to do. 364 365 03/01/2000 KDU Experimenting with a WIDE range of interrupt mitigation 366 parameters on a dual P3-450 setup yielded the new default interrupt 367 mitigation parameters. Tx should interrupt VERY infrequently due to 368 Eric's scheme. Rx should be more often... 369 370 03/13/2000 KDU Added a patch to make the Rx Checksum code interact 371 nicely with non-linux machines. 372 373 03/13/2000 KDU Experimented with some of the configuration values: 374 375 -It seems that enabling PCI performance commands for descriptors 376 (changing RxDMACtrl and TxDMACtrl lower nibble from 5 to D) has minimal 377 performance impact for any of my tests. (ttcp, netpipe, netperf) I will 378 leave them that way until I hear further feedback. 379 380 -Increasing the PCI_LATENCY_TIMER to 130 381 (2 + (burst size of 128 * (0 wait states + 1))) seems to slightly 382 degrade performance. Leaving default at 64 pending further information. 383 384 03/14/2000 KDU Further tuning: 385 386 -adjusted boguscnt in hamachi_rx() to depend on interrupt 387 mitigation parameters chosen. 388 389 -Selected a set of interrupt parameters based on some extensive testing. 390 These may change with more testing. 391 392 TO DO: 393 394 -Consider borrowing from the acenic driver code to check PCI_COMMAND for 395 PCI_COMMAND_INVALIDATE. Set maximum burst size to cache line size in 396 that case. 397 398 -fix the reset procedure. It doesn't quite work. 399 */ 400 401 /* A few values that may be tweaked. */ 402 /* Size of each temporary Rx buffer, calculated as: 403 * 1518 bytes (ethernet packet) + 2 bytes (to get 8 byte alignment for 404 * the card) + 8 bytes of status info + 8 bytes for the Rx Checksum 405 */ 406 #define PKT_BUF_SZ 1536 407 408 /* For now, this is going to be set to the maximum size of an ethernet 409 * packet. Eventually, we may want to make it a variable that is 410 * related to the MTU 411 */ 412 #define MAX_FRAME_SIZE 1518 413 414 /* The rest of these values should never change. */ 415 416 static void hamachi_timer(unsigned long data); 417 418 enum capability_flags {CanHaveMII=1, }; 419 static const struct chip_info { 420 u16 vendor_id, device_id, device_id_mask, pad; 421 const char *name; 422 void (*media_timer)(unsigned long data); 423 int flags; 424 } chip_tbl[] = { 425 {0x1318, 0x0911, 0xffff, 0, "Hamachi GNIC-II", hamachi_timer, 0}, 426 {0,}, 427 }; 428 429 /* Offsets to the Hamachi registers. Various sizes. */ 430 enum hamachi_offsets { 431 TxDMACtrl=0x00, TxCmd=0x04, TxStatus=0x06, TxPtr=0x08, TxCurPtr=0x10, 432 RxDMACtrl=0x20, RxCmd=0x24, RxStatus=0x26, RxPtr=0x28, RxCurPtr=0x30, 433 PCIClkMeas=0x060, MiscStatus=0x066, ChipRev=0x68, ChipReset=0x06B, 434 LEDCtrl=0x06C, VirtualJumpers=0x06D, GPIO=0x6E, 435 TxChecksum=0x074, RxChecksum=0x076, 436 TxIntrCtrl=0x078, RxIntrCtrl=0x07C, 437 InterruptEnable=0x080, InterruptClear=0x084, IntrStatus=0x088, 438 EventStatus=0x08C, 439 MACCnfg=0x0A0, FrameGap0=0x0A2, FrameGap1=0x0A4, 440 /* See enum MII_offsets below. */ 441 MACCnfg2=0x0B0, RxDepth=0x0B8, FlowCtrl=0x0BC, MaxFrameSize=0x0CE, 442 AddrMode=0x0D0, StationAddr=0x0D2, 443 /* Gigabit AutoNegotiation. */ 444 ANCtrl=0x0E0, ANStatus=0x0E2, ANXchngCtrl=0x0E4, ANAdvertise=0x0E8, 445 ANLinkPartnerAbility=0x0EA, 446 EECmdStatus=0x0F0, EEData=0x0F1, EEAddr=0x0F2, 447 FIFOcfg=0x0F8, 448 }; 449 450 /* Offsets to the MII-mode registers. */ 451 enum MII_offsets { 452 MII_Cmd=0xA6, MII_Addr=0xA8, MII_Wr_Data=0xAA, MII_Rd_Data=0xAC, 453 MII_Status=0xAE, 454 }; 455 456 /* Bits in the interrupt status/mask registers. */ 457 enum intr_status_bits { 458 IntrRxDone=0x01, IntrRxPCIFault=0x02, IntrRxPCIErr=0x04, 459 IntrTxDone=0x100, IntrTxPCIFault=0x200, IntrTxPCIErr=0x400, 460 LinkChange=0x10000, NegotiationChange=0x20000, StatsMax=0x40000, }; 461 462 /* The Hamachi Rx and Tx buffer descriptors. */ 463 struct hamachi_desc { 464 __le32 status_n_length; 465 #if ADDRLEN == 64 466 u32 pad; 467 __le64 addr; 468 #else 469 __le32 addr; 470 #endif 471 }; 472 473 /* Bits in hamachi_desc.status_n_length */ 474 enum desc_status_bits { 475 DescOwn=0x80000000, DescEndPacket=0x40000000, DescEndRing=0x20000000, 476 DescIntr=0x10000000, 477 }; 478 479 #define PRIV_ALIGN 15 /* Required alignment mask */ 480 #define MII_CNT 4 481 struct hamachi_private { 482 /* Descriptor rings first for alignment. Tx requires a second descriptor 483 for status. */ 484 struct hamachi_desc *rx_ring; 485 struct hamachi_desc *tx_ring; 486 struct sk_buff* rx_skbuff[RX_RING_SIZE]; 487 struct sk_buff* tx_skbuff[TX_RING_SIZE]; 488 dma_addr_t tx_ring_dma; 489 dma_addr_t rx_ring_dma; 490 struct timer_list timer; /* Media selection timer. */ 491 /* Frequently used and paired value: keep adjacent for cache effect. */ 492 spinlock_t lock; 493 int chip_id; 494 unsigned int cur_rx, dirty_rx; /* Producer/consumer ring indices */ 495 unsigned int cur_tx, dirty_tx; 496 unsigned int rx_buf_sz; /* Based on MTU+slack. */ 497 unsigned int tx_full:1; /* The Tx queue is full. */ 498 unsigned int duplex_lock:1; 499 unsigned int default_port:4; /* Last dev->if_port value. */ 500 /* MII transceiver section. */ 501 int mii_cnt; /* MII device addresses. */ 502 struct mii_if_info mii_if; /* MII lib hooks/info */ 503 unsigned char phys[MII_CNT]; /* MII device addresses, only first one used. */ 504 u32 rx_int_var, tx_int_var; /* interrupt control variables */ 505 u32 option; /* Hold on to a copy of the options */ 506 struct pci_dev *pci_dev; 507 void __iomem *base; 508 }; 509 510 MODULE_AUTHOR("Donald Becker <becker@scyld.com>, Eric Kasten <kasten@nscl.msu.edu>, Keith Underwood <keithu@parl.clemson.edu>"); 511 MODULE_DESCRIPTION("Packet Engines 'Hamachi' GNIC-II Gigabit Ethernet driver"); 512 MODULE_LICENSE("GPL"); 513 514 module_param(max_interrupt_work, int, 0); 515 module_param(mtu, int, 0); 516 module_param(debug, int, 0); 517 module_param(min_rx_pkt, int, 0); 518 module_param(max_rx_gap, int, 0); 519 module_param(max_rx_latency, int, 0); 520 module_param(min_tx_pkt, int, 0); 521 module_param(max_tx_gap, int, 0); 522 module_param(max_tx_latency, int, 0); 523 module_param(rx_copybreak, int, 0); 524 module_param_array(rx_params, int, NULL, 0); 525 module_param_array(tx_params, int, NULL, 0); 526 module_param_array(options, int, NULL, 0); 527 module_param_array(full_duplex, int, NULL, 0); 528 module_param(force32, int, 0); 529 MODULE_PARM_DESC(max_interrupt_work, "GNIC-II maximum events handled per interrupt"); 530 MODULE_PARM_DESC(mtu, "GNIC-II MTU (all boards)"); 531 MODULE_PARM_DESC(debug, "GNIC-II debug level (0-7)"); 532 MODULE_PARM_DESC(min_rx_pkt, "GNIC-II minimum Rx packets processed between interrupts"); 533 MODULE_PARM_DESC(max_rx_gap, "GNIC-II maximum Rx inter-packet gap in 8.192 microsecond units"); 534 MODULE_PARM_DESC(max_rx_latency, "GNIC-II time between Rx interrupts in 8.192 microsecond units"); 535 MODULE_PARM_DESC(min_tx_pkt, "GNIC-II minimum Tx packets processed between interrupts"); 536 MODULE_PARM_DESC(max_tx_gap, "GNIC-II maximum Tx inter-packet gap in 8.192 microsecond units"); 537 MODULE_PARM_DESC(max_tx_latency, "GNIC-II time between Tx interrupts in 8.192 microsecond units"); 538 MODULE_PARM_DESC(rx_copybreak, "GNIC-II copy breakpoint for copy-only-tiny-frames"); 539 MODULE_PARM_DESC(rx_params, "GNIC-II min_rx_pkt+max_rx_gap+max_rx_latency"); 540 MODULE_PARM_DESC(tx_params, "GNIC-II min_tx_pkt+max_tx_gap+max_tx_latency"); 541 MODULE_PARM_DESC(options, "GNIC-II Bits 0-3: media type, bits 4-6: as force32, bit 7: half duplex, bit 9 full duplex"); 542 MODULE_PARM_DESC(full_duplex, "GNIC-II full duplex setting(s) (1)"); 543 MODULE_PARM_DESC(force32, "GNIC-II: Bit 0: 32 bit PCI, bit 1: disable parity, bit 2: 64 bit PCI (all boards)"); 544 545 static int read_eeprom(void __iomem *ioaddr, int location); 546 static int mdio_read(struct net_device *dev, int phy_id, int location); 547 static void mdio_write(struct net_device *dev, int phy_id, int location, int value); 548 static int hamachi_open(struct net_device *dev); 549 static int netdev_ioctl(struct net_device *dev, struct ifreq *rq, int cmd); 550 static void hamachi_timer(unsigned long data); 551 static void hamachi_tx_timeout(struct net_device *dev); 552 static void hamachi_init_ring(struct net_device *dev); 553 static netdev_tx_t hamachi_start_xmit(struct sk_buff *skb, 554 struct net_device *dev); 555 static irqreturn_t hamachi_interrupt(int irq, void *dev_instance); 556 static int hamachi_rx(struct net_device *dev); 557 static inline int hamachi_tx(struct net_device *dev); 558 static void hamachi_error(struct net_device *dev, int intr_status); 559 static int hamachi_close(struct net_device *dev); 560 static struct net_device_stats *hamachi_get_stats(struct net_device *dev); 561 static void set_rx_mode(struct net_device *dev); 562 static const struct ethtool_ops ethtool_ops; 563 static const struct ethtool_ops ethtool_ops_no_mii; 564 565 static const struct net_device_ops hamachi_netdev_ops = { 566 .ndo_open = hamachi_open, 567 .ndo_stop = hamachi_close, 568 .ndo_start_xmit = hamachi_start_xmit, 569 .ndo_get_stats = hamachi_get_stats, 570 .ndo_set_rx_mode = set_rx_mode, 571 .ndo_change_mtu = eth_change_mtu, 572 .ndo_validate_addr = eth_validate_addr, 573 .ndo_set_mac_address = eth_mac_addr, 574 .ndo_tx_timeout = hamachi_tx_timeout, 575 .ndo_do_ioctl = netdev_ioctl, 576 }; 577 578 579 static int __devinit hamachi_init_one (struct pci_dev *pdev, 580 const struct pci_device_id *ent) 581 { 582 struct hamachi_private *hmp; 583 int option, i, rx_int_var, tx_int_var, boguscnt; 584 int chip_id = ent->driver_data; 585 int irq; 586 void __iomem *ioaddr; 587 unsigned long base; 588 static int card_idx; 589 struct net_device *dev; 590 void *ring_space; 591 dma_addr_t ring_dma; 592 int ret = -ENOMEM; 593 594 /* when built into the kernel, we only print version if device is found */ 595 #ifndef MODULE 596 static int printed_version; 597 if (!printed_version++) 598 printk(version); 599 #endif 600 601 if (pci_enable_device(pdev)) { 602 ret = -EIO; 603 goto err_out; 604 } 605 606 base = pci_resource_start(pdev, 0); 607 #ifdef __alpha__ /* Really "64 bit addrs" */ 608 base |= (pci_resource_start(pdev, 1) << 32); 609 #endif 610 611 pci_set_master(pdev); 612 613 i = pci_request_regions(pdev, DRV_NAME); 614 if (i) 615 return i; 616 617 irq = pdev->irq; 618 ioaddr = ioremap(base, 0x400); 619 if (!ioaddr) 620 goto err_out_release; 621 622 dev = alloc_etherdev(sizeof(struct hamachi_private)); 623 if (!dev) 624 goto err_out_iounmap; 625 626 SET_NETDEV_DEV(dev, &pdev->dev); 627 628 for (i = 0; i < 6; i++) 629 dev->dev_addr[i] = 1 ? read_eeprom(ioaddr, 4 + i) 630 : readb(ioaddr + StationAddr + i); 631 632 #if ! defined(final_version) 633 if (hamachi_debug > 4) 634 for (i = 0; i < 0x10; i++) 635 printk("%2.2x%s", 636 read_eeprom(ioaddr, i), i % 16 != 15 ? " " : "\n"); 637 #endif 638 639 hmp = netdev_priv(dev); 640 spin_lock_init(&hmp->lock); 641 642 hmp->mii_if.dev = dev; 643 hmp->mii_if.mdio_read = mdio_read; 644 hmp->mii_if.mdio_write = mdio_write; 645 hmp->mii_if.phy_id_mask = 0x1f; 646 hmp->mii_if.reg_num_mask = 0x1f; 647 648 ring_space = pci_alloc_consistent(pdev, TX_TOTAL_SIZE, &ring_dma); 649 if (!ring_space) 650 goto err_out_cleardev; 651 hmp->tx_ring = ring_space; 652 hmp->tx_ring_dma = ring_dma; 653 654 ring_space = pci_alloc_consistent(pdev, RX_TOTAL_SIZE, &ring_dma); 655 if (!ring_space) 656 goto err_out_unmap_tx; 657 hmp->rx_ring = ring_space; 658 hmp->rx_ring_dma = ring_dma; 659 660 /* Check for options being passed in */ 661 option = card_idx < MAX_UNITS ? options[card_idx] : 0; 662 if (dev->mem_start) 663 option = dev->mem_start; 664 665 /* If the bus size is misidentified, do the following. */ 666 force32 = force32 ? force32 : 667 ((option >= 0) ? ((option & 0x00000070) >> 4) : 0 ); 668 if (force32) 669 writeb(force32, ioaddr + VirtualJumpers); 670 671 /* Hmmm, do we really need to reset the chip???. */ 672 writeb(0x01, ioaddr + ChipReset); 673 674 /* After a reset, the clock speed measurement of the PCI bus will not 675 * be valid for a moment. Wait for a little while until it is. If 676 * it takes more than 10ms, forget it. 677 */ 678 udelay(10); 679 i = readb(ioaddr + PCIClkMeas); 680 for (boguscnt = 0; (!(i & 0x080)) && boguscnt < 1000; boguscnt++){ 681 udelay(10); 682 i = readb(ioaddr + PCIClkMeas); 683 } 684 685 hmp->base = ioaddr; 686 dev->base_addr = (unsigned long)ioaddr; 687 dev->irq = irq; 688 pci_set_drvdata(pdev, dev); 689 690 hmp->chip_id = chip_id; 691 hmp->pci_dev = pdev; 692 693 /* The lower four bits are the media type. */ 694 if (option > 0) { 695 hmp->option = option; 696 if (option & 0x200) 697 hmp->mii_if.full_duplex = 1; 698 else if (option & 0x080) 699 hmp->mii_if.full_duplex = 0; 700 hmp->default_port = option & 15; 701 if (hmp->default_port) 702 hmp->mii_if.force_media = 1; 703 } 704 if (card_idx < MAX_UNITS && full_duplex[card_idx] > 0) 705 hmp->mii_if.full_duplex = 1; 706 707 /* lock the duplex mode if someone specified a value */ 708 if (hmp->mii_if.full_duplex || (option & 0x080)) 709 hmp->duplex_lock = 1; 710 711 /* Set interrupt tuning parameters */ 712 max_rx_latency = max_rx_latency & 0x00ff; 713 max_rx_gap = max_rx_gap & 0x00ff; 714 min_rx_pkt = min_rx_pkt & 0x00ff; 715 max_tx_latency = max_tx_latency & 0x00ff; 716 max_tx_gap = max_tx_gap & 0x00ff; 717 min_tx_pkt = min_tx_pkt & 0x00ff; 718 719 rx_int_var = card_idx < MAX_UNITS ? rx_params[card_idx] : -1; 720 tx_int_var = card_idx < MAX_UNITS ? tx_params[card_idx] : -1; 721 hmp->rx_int_var = rx_int_var >= 0 ? rx_int_var : 722 (min_rx_pkt << 16 | max_rx_gap << 8 | max_rx_latency); 723 hmp->tx_int_var = tx_int_var >= 0 ? tx_int_var : 724 (min_tx_pkt << 16 | max_tx_gap << 8 | max_tx_latency); 725 726 727 /* The Hamachi-specific entries in the device structure. */ 728 dev->netdev_ops = &hamachi_netdev_ops; 729 if (chip_tbl[hmp->chip_id].flags & CanHaveMII) 730 SET_ETHTOOL_OPS(dev, ðtool_ops); 731 else 732 SET_ETHTOOL_OPS(dev, ðtool_ops_no_mii); 733 dev->watchdog_timeo = TX_TIMEOUT; 734 if (mtu) 735 dev->mtu = mtu; 736 737 i = register_netdev(dev); 738 if (i) { 739 ret = i; 740 goto err_out_unmap_rx; 741 } 742 743 printk(KERN_INFO "%s: %s type %x at %p, %pM, IRQ %d.\n", 744 dev->name, chip_tbl[chip_id].name, readl(ioaddr + ChipRev), 745 ioaddr, dev->dev_addr, irq); 746 i = readb(ioaddr + PCIClkMeas); 747 printk(KERN_INFO "%s: %d-bit %d Mhz PCI bus (%d), Virtual Jumpers " 748 "%2.2x, LPA %4.4x.\n", 749 dev->name, readw(ioaddr + MiscStatus) & 1 ? 64 : 32, 750 i ? 2000/(i&0x7f) : 0, i&0x7f, (int)readb(ioaddr + VirtualJumpers), 751 readw(ioaddr + ANLinkPartnerAbility)); 752 753 if (chip_tbl[hmp->chip_id].flags & CanHaveMII) { 754 int phy, phy_idx = 0; 755 for (phy = 0; phy < 32 && phy_idx < MII_CNT; phy++) { 756 int mii_status = mdio_read(dev, phy, MII_BMSR); 757 if (mii_status != 0xffff && 758 mii_status != 0x0000) { 759 hmp->phys[phy_idx++] = phy; 760 hmp->mii_if.advertising = mdio_read(dev, phy, MII_ADVERTISE); 761 printk(KERN_INFO "%s: MII PHY found at address %d, status " 762 "0x%4.4x advertising %4.4x.\n", 763 dev->name, phy, mii_status, hmp->mii_if.advertising); 764 } 765 } 766 hmp->mii_cnt = phy_idx; 767 if (hmp->mii_cnt > 0) 768 hmp->mii_if.phy_id = hmp->phys[0]; 769 else 770 memset(&hmp->mii_if, 0, sizeof(hmp->mii_if)); 771 } 772 /* Configure gigabit autonegotiation. */ 773 writew(0x0400, ioaddr + ANXchngCtrl); /* Enable legacy links. */ 774 writew(0x08e0, ioaddr + ANAdvertise); /* Set our advertise word. */ 775 writew(0x1000, ioaddr + ANCtrl); /* Enable negotiation */ 776 777 card_idx++; 778 return 0; 779 780 err_out_unmap_rx: 781 pci_free_consistent(pdev, RX_TOTAL_SIZE, hmp->rx_ring, 782 hmp->rx_ring_dma); 783 err_out_unmap_tx: 784 pci_free_consistent(pdev, TX_TOTAL_SIZE, hmp->tx_ring, 785 hmp->tx_ring_dma); 786 err_out_cleardev: 787 free_netdev (dev); 788 err_out_iounmap: 789 iounmap(ioaddr); 790 err_out_release: 791 pci_release_regions(pdev); 792 err_out: 793 return ret; 794 } 795 796 static int __devinit read_eeprom(void __iomem *ioaddr, int location) 797 { 798 int bogus_cnt = 1000; 799 800 /* We should check busy first - per docs -KDU */ 801 while ((readb(ioaddr + EECmdStatus) & 0x40) && --bogus_cnt > 0); 802 writew(location, ioaddr + EEAddr); 803 writeb(0x02, ioaddr + EECmdStatus); 804 bogus_cnt = 1000; 805 while ((readb(ioaddr + EECmdStatus) & 0x40) && --bogus_cnt > 0); 806 if (hamachi_debug > 5) 807 printk(" EEPROM status is %2.2x after %d ticks.\n", 808 (int)readb(ioaddr + EECmdStatus), 1000- bogus_cnt); 809 return readb(ioaddr + EEData); 810 } 811 812 /* MII Managemen Data I/O accesses. 813 These routines assume the MDIO controller is idle, and do not exit until 814 the command is finished. */ 815 816 static int mdio_read(struct net_device *dev, int phy_id, int location) 817 { 818 struct hamachi_private *hmp = netdev_priv(dev); 819 void __iomem *ioaddr = hmp->base; 820 int i; 821 822 /* We should check busy first - per docs -KDU */ 823 for (i = 10000; i >= 0; i--) 824 if ((readw(ioaddr + MII_Status) & 1) == 0) 825 break; 826 writew((phy_id<<8) + location, ioaddr + MII_Addr); 827 writew(0x0001, ioaddr + MII_Cmd); 828 for (i = 10000; i >= 0; i--) 829 if ((readw(ioaddr + MII_Status) & 1) == 0) 830 break; 831 return readw(ioaddr + MII_Rd_Data); 832 } 833 834 static void mdio_write(struct net_device *dev, int phy_id, int location, int value) 835 { 836 struct hamachi_private *hmp = netdev_priv(dev); 837 void __iomem *ioaddr = hmp->base; 838 int i; 839 840 /* We should check busy first - per docs -KDU */ 841 for (i = 10000; i >= 0; i--) 842 if ((readw(ioaddr + MII_Status) & 1) == 0) 843 break; 844 writew((phy_id<<8) + location, ioaddr + MII_Addr); 845 writew(value, ioaddr + MII_Wr_Data); 846 847 /* Wait for the command to finish. */ 848 for (i = 10000; i >= 0; i--) 849 if ((readw(ioaddr + MII_Status) & 1) == 0) 850 break; 851 } 852 853 854 static int hamachi_open(struct net_device *dev) 855 { 856 struct hamachi_private *hmp = netdev_priv(dev); 857 void __iomem *ioaddr = hmp->base; 858 int i; 859 u32 rx_int_var, tx_int_var; 860 u16 fifo_info; 861 862 i = request_irq(dev->irq, hamachi_interrupt, IRQF_SHARED, dev->name, dev); 863 if (i) 864 return i; 865 866 if (hamachi_debug > 1) 867 printk(KERN_DEBUG "%s: hamachi_open() irq %d.\n", 868 dev->name, dev->irq); 869 870 hamachi_init_ring(dev); 871 872 #if ADDRLEN == 64 873 /* writellll anyone ? */ 874 writel(hmp->rx_ring_dma, ioaddr + RxPtr); 875 writel(hmp->rx_ring_dma >> 32, ioaddr + RxPtr + 4); 876 writel(hmp->tx_ring_dma, ioaddr + TxPtr); 877 writel(hmp->tx_ring_dma >> 32, ioaddr + TxPtr + 4); 878 #else 879 writel(hmp->rx_ring_dma, ioaddr + RxPtr); 880 writel(hmp->tx_ring_dma, ioaddr + TxPtr); 881 #endif 882 883 /* TODO: It would make sense to organize this as words since the card 884 * documentation does. -KDU 885 */ 886 for (i = 0; i < 6; i++) 887 writeb(dev->dev_addr[i], ioaddr + StationAddr + i); 888 889 /* Initialize other registers: with so many this eventually this will 890 converted to an offset/value list. */ 891 892 /* Configure the FIFO */ 893 fifo_info = (readw(ioaddr + GPIO) & 0x00C0) >> 6; 894 switch (fifo_info){ 895 case 0 : 896 /* No FIFO */ 897 writew(0x0000, ioaddr + FIFOcfg); 898 break; 899 case 1 : 900 /* Configure the FIFO for 512K external, 16K used for Tx. */ 901 writew(0x0028, ioaddr + FIFOcfg); 902 break; 903 case 2 : 904 /* Configure the FIFO for 1024 external, 32K used for Tx. */ 905 writew(0x004C, ioaddr + FIFOcfg); 906 break; 907 case 3 : 908 /* Configure the FIFO for 2048 external, 32K used for Tx. */ 909 writew(0x006C, ioaddr + FIFOcfg); 910 break; 911 default : 912 printk(KERN_WARNING "%s: Unsupported external memory config!\n", 913 dev->name); 914 /* Default to no FIFO */ 915 writew(0x0000, ioaddr + FIFOcfg); 916 break; 917 } 918 919 if (dev->if_port == 0) 920 dev->if_port = hmp->default_port; 921 922 923 /* Setting the Rx mode will start the Rx process. */ 924 /* If someone didn't choose a duplex, default to full-duplex */ 925 if (hmp->duplex_lock != 1) 926 hmp->mii_if.full_duplex = 1; 927 928 /* always 1, takes no more time to do it */ 929 writew(0x0001, ioaddr + RxChecksum); 930 writew(0x0000, ioaddr + TxChecksum); 931 writew(0x8000, ioaddr + MACCnfg); /* Soft reset the MAC */ 932 writew(0x215F, ioaddr + MACCnfg); 933 writew(0x000C, ioaddr + FrameGap0); 934 /* WHAT?!?!? Why isn't this documented somewhere? -KDU */ 935 writew(0x1018, ioaddr + FrameGap1); 936 /* Why do we enable receives/transmits here? -KDU */ 937 writew(0x0780, ioaddr + MACCnfg2); /* Upper 16 bits control LEDs. */ 938 /* Enable automatic generation of flow control frames, period 0xffff. */ 939 writel(0x0030FFFF, ioaddr + FlowCtrl); 940 writew(MAX_FRAME_SIZE, ioaddr + MaxFrameSize); /* dev->mtu+14 ??? */ 941 942 /* Enable legacy links. */ 943 writew(0x0400, ioaddr + ANXchngCtrl); /* Enable legacy links. */ 944 /* Initial Link LED to blinking red. */ 945 writeb(0x03, ioaddr + LEDCtrl); 946 947 /* Configure interrupt mitigation. This has a great effect on 948 performance, so systems tuning should start here!. */ 949 950 rx_int_var = hmp->rx_int_var; 951 tx_int_var = hmp->tx_int_var; 952 953 if (hamachi_debug > 1) { 954 printk("max_tx_latency: %d, max_tx_gap: %d, min_tx_pkt: %d\n", 955 tx_int_var & 0x00ff, (tx_int_var & 0x00ff00) >> 8, 956 (tx_int_var & 0x00ff0000) >> 16); 957 printk("max_rx_latency: %d, max_rx_gap: %d, min_rx_pkt: %d\n", 958 rx_int_var & 0x00ff, (rx_int_var & 0x00ff00) >> 8, 959 (rx_int_var & 0x00ff0000) >> 16); 960 printk("rx_int_var: %x, tx_int_var: %x\n", rx_int_var, tx_int_var); 961 } 962 963 writel(tx_int_var, ioaddr + TxIntrCtrl); 964 writel(rx_int_var, ioaddr + RxIntrCtrl); 965 966 set_rx_mode(dev); 967 968 netif_start_queue(dev); 969 970 /* Enable interrupts by setting the interrupt mask. */ 971 writel(0x80878787, ioaddr + InterruptEnable); 972 writew(0x0000, ioaddr + EventStatus); /* Clear non-interrupting events */ 973 974 /* Configure and start the DMA channels. */ 975 /* Burst sizes are in the low three bits: size = 4<<(val&7) */ 976 #if ADDRLEN == 64 977 writew(0x005D, ioaddr + RxDMACtrl); /* 128 dword bursts */ 978 writew(0x005D, ioaddr + TxDMACtrl); 979 #else 980 writew(0x001D, ioaddr + RxDMACtrl); 981 writew(0x001D, ioaddr + TxDMACtrl); 982 #endif 983 writew(0x0001, ioaddr + RxCmd); 984 985 if (hamachi_debug > 2) { 986 printk(KERN_DEBUG "%s: Done hamachi_open(), status: Rx %x Tx %x.\n", 987 dev->name, readw(ioaddr + RxStatus), readw(ioaddr + TxStatus)); 988 } 989 /* Set the timer to check for link beat. */ 990 init_timer(&hmp->timer); 991 hmp->timer.expires = RUN_AT((24*HZ)/10); /* 2.4 sec. */ 992 hmp->timer.data = (unsigned long)dev; 993 hmp->timer.function = hamachi_timer; /* timer handler */ 994 add_timer(&hmp->timer); 995 996 return 0; 997 } 998 999 static inline int hamachi_tx(struct net_device *dev) 1000 { 1001 struct hamachi_private *hmp = netdev_priv(dev); 1002 1003 /* Update the dirty pointer until we find an entry that is 1004 still owned by the card */ 1005 for (; hmp->cur_tx - hmp->dirty_tx > 0; hmp->dirty_tx++) { 1006 int entry = hmp->dirty_tx % TX_RING_SIZE; 1007 struct sk_buff *skb; 1008 1009 if (hmp->tx_ring[entry].status_n_length & cpu_to_le32(DescOwn)) 1010 break; 1011 /* Free the original skb. */ 1012 skb = hmp->tx_skbuff[entry]; 1013 if (skb) { 1014 pci_unmap_single(hmp->pci_dev, 1015 leXX_to_cpu(hmp->tx_ring[entry].addr), 1016 skb->len, PCI_DMA_TODEVICE); 1017 dev_kfree_skb(skb); 1018 hmp->tx_skbuff[entry] = NULL; 1019 } 1020 hmp->tx_ring[entry].status_n_length = 0; 1021 if (entry >= TX_RING_SIZE-1) 1022 hmp->tx_ring[TX_RING_SIZE-1].status_n_length |= 1023 cpu_to_le32(DescEndRing); 1024 dev->stats.tx_packets++; 1025 } 1026 1027 return 0; 1028 } 1029 1030 static void hamachi_timer(unsigned long data) 1031 { 1032 struct net_device *dev = (struct net_device *)data; 1033 struct hamachi_private *hmp = netdev_priv(dev); 1034 void __iomem *ioaddr = hmp->base; 1035 int next_tick = 10*HZ; 1036 1037 if (hamachi_debug > 2) { 1038 printk(KERN_INFO "%s: Hamachi Autonegotiation status %4.4x, LPA " 1039 "%4.4x.\n", dev->name, readw(ioaddr + ANStatus), 1040 readw(ioaddr + ANLinkPartnerAbility)); 1041 printk(KERN_INFO "%s: Autonegotiation regs %4.4x %4.4x %4.4x " 1042 "%4.4x %4.4x %4.4x.\n", dev->name, 1043 readw(ioaddr + 0x0e0), 1044 readw(ioaddr + 0x0e2), 1045 readw(ioaddr + 0x0e4), 1046 readw(ioaddr + 0x0e6), 1047 readw(ioaddr + 0x0e8), 1048 readw(ioaddr + 0x0eA)); 1049 } 1050 /* We could do something here... nah. */ 1051 hmp->timer.expires = RUN_AT(next_tick); 1052 add_timer(&hmp->timer); 1053 } 1054 1055 static void hamachi_tx_timeout(struct net_device *dev) 1056 { 1057 int i; 1058 struct hamachi_private *hmp = netdev_priv(dev); 1059 void __iomem *ioaddr = hmp->base; 1060 1061 printk(KERN_WARNING "%s: Hamachi transmit timed out, status %8.8x," 1062 " resetting...\n", dev->name, (int)readw(ioaddr + TxStatus)); 1063 1064 { 1065 printk(KERN_DEBUG " Rx ring %p: ", hmp->rx_ring); 1066 for (i = 0; i < RX_RING_SIZE; i++) 1067 printk(KERN_CONT " %8.8x", 1068 le32_to_cpu(hmp->rx_ring[i].status_n_length)); 1069 printk(KERN_CONT "\n"); 1070 printk(KERN_DEBUG" Tx ring %p: ", hmp->tx_ring); 1071 for (i = 0; i < TX_RING_SIZE; i++) 1072 printk(KERN_CONT " %4.4x", 1073 le32_to_cpu(hmp->tx_ring[i].status_n_length)); 1074 printk(KERN_CONT "\n"); 1075 } 1076 1077 /* Reinit the hardware and make sure the Rx and Tx processes 1078 are up and running. 1079 */ 1080 dev->if_port = 0; 1081 /* The right way to do Reset. -KDU 1082 * -Clear OWN bit in all Rx/Tx descriptors 1083 * -Wait 50 uS for channels to go idle 1084 * -Turn off MAC receiver 1085 * -Issue Reset 1086 */ 1087 1088 for (i = 0; i < RX_RING_SIZE; i++) 1089 hmp->rx_ring[i].status_n_length &= cpu_to_le32(~DescOwn); 1090 1091 /* Presume that all packets in the Tx queue are gone if we have to 1092 * re-init the hardware. 1093 */ 1094 for (i = 0; i < TX_RING_SIZE; i++){ 1095 struct sk_buff *skb; 1096 1097 if (i >= TX_RING_SIZE - 1) 1098 hmp->tx_ring[i].status_n_length = 1099 cpu_to_le32(DescEndRing) | 1100 (hmp->tx_ring[i].status_n_length & 1101 cpu_to_le32(0x0000ffff)); 1102 else 1103 hmp->tx_ring[i].status_n_length &= cpu_to_le32(0x0000ffff); 1104 skb = hmp->tx_skbuff[i]; 1105 if (skb){ 1106 pci_unmap_single(hmp->pci_dev, leXX_to_cpu(hmp->tx_ring[i].addr), 1107 skb->len, PCI_DMA_TODEVICE); 1108 dev_kfree_skb(skb); 1109 hmp->tx_skbuff[i] = NULL; 1110 } 1111 } 1112 1113 udelay(60); /* Sleep 60 us just for safety sake */ 1114 writew(0x0002, ioaddr + RxCmd); /* STOP Rx */ 1115 1116 writeb(0x01, ioaddr + ChipReset); /* Reinit the hardware */ 1117 1118 hmp->tx_full = 0; 1119 hmp->cur_rx = hmp->cur_tx = 0; 1120 hmp->dirty_rx = hmp->dirty_tx = 0; 1121 /* Rx packets are also presumed lost; however, we need to make sure a 1122 * ring of buffers is in tact. -KDU 1123 */ 1124 for (i = 0; i < RX_RING_SIZE; i++){ 1125 struct sk_buff *skb = hmp->rx_skbuff[i]; 1126 1127 if (skb){ 1128 pci_unmap_single(hmp->pci_dev, 1129 leXX_to_cpu(hmp->rx_ring[i].addr), 1130 hmp->rx_buf_sz, PCI_DMA_FROMDEVICE); 1131 dev_kfree_skb(skb); 1132 hmp->rx_skbuff[i] = NULL; 1133 } 1134 } 1135 /* Fill in the Rx buffers. Handle allocation failure gracefully. */ 1136 for (i = 0; i < RX_RING_SIZE; i++) { 1137 struct sk_buff *skb; 1138 1139 skb = netdev_alloc_skb_ip_align(dev, hmp->rx_buf_sz); 1140 hmp->rx_skbuff[i] = skb; 1141 if (skb == NULL) 1142 break; 1143 1144 hmp->rx_ring[i].addr = cpu_to_leXX(pci_map_single(hmp->pci_dev, 1145 skb->data, hmp->rx_buf_sz, PCI_DMA_FROMDEVICE)); 1146 hmp->rx_ring[i].status_n_length = cpu_to_le32(DescOwn | 1147 DescEndPacket | DescIntr | (hmp->rx_buf_sz - 2)); 1148 } 1149 hmp->dirty_rx = (unsigned int)(i - RX_RING_SIZE); 1150 /* Mark the last entry as wrapping the ring. */ 1151 hmp->rx_ring[RX_RING_SIZE-1].status_n_length |= cpu_to_le32(DescEndRing); 1152 1153 /* Trigger an immediate transmit demand. */ 1154 dev->trans_start = jiffies; /* prevent tx timeout */ 1155 dev->stats.tx_errors++; 1156 1157 /* Restart the chip's Tx/Rx processes . */ 1158 writew(0x0002, ioaddr + TxCmd); /* STOP Tx */ 1159 writew(0x0001, ioaddr + TxCmd); /* START Tx */ 1160 writew(0x0001, ioaddr + RxCmd); /* START Rx */ 1161 1162 netif_wake_queue(dev); 1163 } 1164 1165 1166 /* Initialize the Rx and Tx rings, along with various 'dev' bits. */ 1167 static void hamachi_init_ring(struct net_device *dev) 1168 { 1169 struct hamachi_private *hmp = netdev_priv(dev); 1170 int i; 1171 1172 hmp->tx_full = 0; 1173 hmp->cur_rx = hmp->cur_tx = 0; 1174 hmp->dirty_rx = hmp->dirty_tx = 0; 1175 1176 /* +26 gets the maximum ethernet encapsulation, +7 & ~7 because the 1177 * card needs room to do 8 byte alignment, +2 so we can reserve 1178 * the first 2 bytes, and +16 gets room for the status word from the 1179 * card. -KDU 1180 */ 1181 hmp->rx_buf_sz = (dev->mtu <= 1492 ? PKT_BUF_SZ : 1182 (((dev->mtu+26+7) & ~7) + 16)); 1183 1184 /* Initialize all Rx descriptors. */ 1185 for (i = 0; i < RX_RING_SIZE; i++) { 1186 hmp->rx_ring[i].status_n_length = 0; 1187 hmp->rx_skbuff[i] = NULL; 1188 } 1189 /* Fill in the Rx buffers. Handle allocation failure gracefully. */ 1190 for (i = 0; i < RX_RING_SIZE; i++) { 1191 struct sk_buff *skb = netdev_alloc_skb(dev, hmp->rx_buf_sz + 2); 1192 hmp->rx_skbuff[i] = skb; 1193 if (skb == NULL) 1194 break; 1195 skb_reserve(skb, 2); /* 16 byte align the IP header. */ 1196 hmp->rx_ring[i].addr = cpu_to_leXX(pci_map_single(hmp->pci_dev, 1197 skb->data, hmp->rx_buf_sz, PCI_DMA_FROMDEVICE)); 1198 /* -2 because it doesn't REALLY have that first 2 bytes -KDU */ 1199 hmp->rx_ring[i].status_n_length = cpu_to_le32(DescOwn | 1200 DescEndPacket | DescIntr | (hmp->rx_buf_sz -2)); 1201 } 1202 hmp->dirty_rx = (unsigned int)(i - RX_RING_SIZE); 1203 hmp->rx_ring[RX_RING_SIZE-1].status_n_length |= cpu_to_le32(DescEndRing); 1204 1205 for (i = 0; i < TX_RING_SIZE; i++) { 1206 hmp->tx_skbuff[i] = NULL; 1207 hmp->tx_ring[i].status_n_length = 0; 1208 } 1209 /* Mark the last entry of the ring */ 1210 hmp->tx_ring[TX_RING_SIZE-1].status_n_length |= cpu_to_le32(DescEndRing); 1211 } 1212 1213 1214 static netdev_tx_t hamachi_start_xmit(struct sk_buff *skb, 1215 struct net_device *dev) 1216 { 1217 struct hamachi_private *hmp = netdev_priv(dev); 1218 unsigned entry; 1219 u16 status; 1220 1221 /* Ok, now make sure that the queue has space before trying to 1222 add another skbuff. if we return non-zero the scheduler 1223 should interpret this as a queue full and requeue the buffer 1224 for later. 1225 */ 1226 if (hmp->tx_full) { 1227 /* We should NEVER reach this point -KDU */ 1228 printk(KERN_WARNING "%s: Hamachi transmit queue full at slot %d.\n",dev->name, hmp->cur_tx); 1229 1230 /* Wake the potentially-idle transmit channel. */ 1231 /* If we don't need to read status, DON'T -KDU */ 1232 status=readw(hmp->base + TxStatus); 1233 if( !(status & 0x0001) || (status & 0x0002)) 1234 writew(0x0001, hmp->base + TxCmd); 1235 return NETDEV_TX_BUSY; 1236 } 1237 1238 /* Caution: the write order is important here, set the field 1239 with the "ownership" bits last. */ 1240 1241 /* Calculate the next Tx descriptor entry. */ 1242 entry = hmp->cur_tx % TX_RING_SIZE; 1243 1244 hmp->tx_skbuff[entry] = skb; 1245 1246 hmp->tx_ring[entry].addr = cpu_to_leXX(pci_map_single(hmp->pci_dev, 1247 skb->data, skb->len, PCI_DMA_TODEVICE)); 1248 1249 /* Hmmmm, could probably put a DescIntr on these, but the way 1250 the driver is currently coded makes Tx interrupts unnecessary 1251 since the clearing of the Tx ring is handled by the start_xmit 1252 routine. This organization helps mitigate the interrupts a 1253 bit and probably renders the max_tx_latency param useless. 1254 1255 Update: Putting a DescIntr bit on all of the descriptors and 1256 mitigating interrupt frequency with the tx_min_pkt parameter. -KDU 1257 */ 1258 if (entry >= TX_RING_SIZE-1) /* Wrap ring */ 1259 hmp->tx_ring[entry].status_n_length = cpu_to_le32(DescOwn | 1260 DescEndPacket | DescEndRing | DescIntr | skb->len); 1261 else 1262 hmp->tx_ring[entry].status_n_length = cpu_to_le32(DescOwn | 1263 DescEndPacket | DescIntr | skb->len); 1264 hmp->cur_tx++; 1265 1266 /* Non-x86 Todo: explicitly flush cache lines here. */ 1267 1268 /* Wake the potentially-idle transmit channel. */ 1269 /* If we don't need to read status, DON'T -KDU */ 1270 status=readw(hmp->base + TxStatus); 1271 if( !(status & 0x0001) || (status & 0x0002)) 1272 writew(0x0001, hmp->base + TxCmd); 1273 1274 /* Immediately before returning, let's clear as many entries as we can. */ 1275 hamachi_tx(dev); 1276 1277 /* We should kick the bottom half here, since we are not accepting 1278 * interrupts with every packet. i.e. realize that Gigabit ethernet 1279 * can transmit faster than ordinary machines can load packets; 1280 * hence, any packet that got put off because we were in the transmit 1281 * routine should IMMEDIATELY get a chance to be re-queued. -KDU 1282 */ 1283 if ((hmp->cur_tx - hmp->dirty_tx) < (TX_RING_SIZE - 4)) 1284 netif_wake_queue(dev); /* Typical path */ 1285 else { 1286 hmp->tx_full = 1; 1287 netif_stop_queue(dev); 1288 } 1289 1290 if (hamachi_debug > 4) { 1291 printk(KERN_DEBUG "%s: Hamachi transmit frame #%d queued in slot %d.\n", 1292 dev->name, hmp->cur_tx, entry); 1293 } 1294 return NETDEV_TX_OK; 1295 } 1296 1297 /* The interrupt handler does all of the Rx thread work and cleans up 1298 after the Tx thread. */ 1299 static irqreturn_t hamachi_interrupt(int irq, void *dev_instance) 1300 { 1301 struct net_device *dev = dev_instance; 1302 struct hamachi_private *hmp = netdev_priv(dev); 1303 void __iomem *ioaddr = hmp->base; 1304 long boguscnt = max_interrupt_work; 1305 int handled = 0; 1306 1307 #ifndef final_version /* Can never occur. */ 1308 if (dev == NULL) { 1309 printk (KERN_ERR "hamachi_interrupt(): irq %d for unknown device.\n", irq); 1310 return IRQ_NONE; 1311 } 1312 #endif 1313 1314 spin_lock(&hmp->lock); 1315 1316 do { 1317 u32 intr_status = readl(ioaddr + InterruptClear); 1318 1319 if (hamachi_debug > 4) 1320 printk(KERN_DEBUG "%s: Hamachi interrupt, status %4.4x.\n", 1321 dev->name, intr_status); 1322 1323 if (intr_status == 0) 1324 break; 1325 1326 handled = 1; 1327 1328 if (intr_status & IntrRxDone) 1329 hamachi_rx(dev); 1330 1331 if (intr_status & IntrTxDone){ 1332 /* This code should RARELY need to execute. After all, this is 1333 * a gigabit link, it should consume packets as fast as we put 1334 * them in AND we clear the Tx ring in hamachi_start_xmit(). 1335 */ 1336 if (hmp->tx_full){ 1337 for (; hmp->cur_tx - hmp->dirty_tx > 0; hmp->dirty_tx++){ 1338 int entry = hmp->dirty_tx % TX_RING_SIZE; 1339 struct sk_buff *skb; 1340 1341 if (hmp->tx_ring[entry].status_n_length & cpu_to_le32(DescOwn)) 1342 break; 1343 skb = hmp->tx_skbuff[entry]; 1344 /* Free the original skb. */ 1345 if (skb){ 1346 pci_unmap_single(hmp->pci_dev, 1347 leXX_to_cpu(hmp->tx_ring[entry].addr), 1348 skb->len, 1349 PCI_DMA_TODEVICE); 1350 dev_kfree_skb_irq(skb); 1351 hmp->tx_skbuff[entry] = NULL; 1352 } 1353 hmp->tx_ring[entry].status_n_length = 0; 1354 if (entry >= TX_RING_SIZE-1) 1355 hmp->tx_ring[TX_RING_SIZE-1].status_n_length |= 1356 cpu_to_le32(DescEndRing); 1357 dev->stats.tx_packets++; 1358 } 1359 if (hmp->cur_tx - hmp->dirty_tx < TX_RING_SIZE - 4){ 1360 /* The ring is no longer full */ 1361 hmp->tx_full = 0; 1362 netif_wake_queue(dev); 1363 } 1364 } else { 1365 netif_wake_queue(dev); 1366 } 1367 } 1368 1369 1370 /* Abnormal error summary/uncommon events handlers. */ 1371 if (intr_status & 1372 (IntrTxPCIFault | IntrTxPCIErr | IntrRxPCIFault | IntrRxPCIErr | 1373 LinkChange | NegotiationChange | StatsMax)) 1374 hamachi_error(dev, intr_status); 1375 1376 if (--boguscnt < 0) { 1377 printk(KERN_WARNING "%s: Too much work at interrupt, status=0x%4.4x.\n", 1378 dev->name, intr_status); 1379 break; 1380 } 1381 } while (1); 1382 1383 if (hamachi_debug > 3) 1384 printk(KERN_DEBUG "%s: exiting interrupt, status=%#4.4x.\n", 1385 dev->name, readl(ioaddr + IntrStatus)); 1386 1387 #ifndef final_version 1388 /* Code that should never be run! Perhaps remove after testing.. */ 1389 { 1390 static int stopit = 10; 1391 if (dev->start == 0 && --stopit < 0) { 1392 printk(KERN_ERR "%s: Emergency stop, looping startup interrupt.\n", 1393 dev->name); 1394 free_irq(irq, dev); 1395 } 1396 } 1397 #endif 1398 1399 spin_unlock(&hmp->lock); 1400 return IRQ_RETVAL(handled); 1401 } 1402 1403 /* This routine is logically part of the interrupt handler, but separated 1404 for clarity and better register allocation. */ 1405 static int hamachi_rx(struct net_device *dev) 1406 { 1407 struct hamachi_private *hmp = netdev_priv(dev); 1408 int entry = hmp->cur_rx % RX_RING_SIZE; 1409 int boguscnt = (hmp->dirty_rx + RX_RING_SIZE) - hmp->cur_rx; 1410 1411 if (hamachi_debug > 4) { 1412 printk(KERN_DEBUG " In hamachi_rx(), entry %d status %4.4x.\n", 1413 entry, hmp->rx_ring[entry].status_n_length); 1414 } 1415 1416 /* If EOP is set on the next entry, it's a new packet. Send it up. */ 1417 while (1) { 1418 struct hamachi_desc *desc = &(hmp->rx_ring[entry]); 1419 u32 desc_status = le32_to_cpu(desc->status_n_length); 1420 u16 data_size = desc_status; /* Implicit truncate */ 1421 u8 *buf_addr; 1422 s32 frame_status; 1423 1424 if (desc_status & DescOwn) 1425 break; 1426 pci_dma_sync_single_for_cpu(hmp->pci_dev, 1427 leXX_to_cpu(desc->addr), 1428 hmp->rx_buf_sz, 1429 PCI_DMA_FROMDEVICE); 1430 buf_addr = (u8 *) hmp->rx_skbuff[entry]->data; 1431 frame_status = get_unaligned_le32(&(buf_addr[data_size - 12])); 1432 if (hamachi_debug > 4) 1433 printk(KERN_DEBUG " hamachi_rx() status was %8.8x.\n", 1434 frame_status); 1435 if (--boguscnt < 0) 1436 break; 1437 if ( ! (desc_status & DescEndPacket)) { 1438 printk(KERN_WARNING "%s: Oversized Ethernet frame spanned " 1439 "multiple buffers, entry %#x length %d status %4.4x!\n", 1440 dev->name, hmp->cur_rx, data_size, desc_status); 1441 printk(KERN_WARNING "%s: Oversized Ethernet frame %p vs %p.\n", 1442 dev->name, desc, &hmp->rx_ring[hmp->cur_rx % RX_RING_SIZE]); 1443 printk(KERN_WARNING "%s: Oversized Ethernet frame -- next status %x/%x last status %x.\n", 1444 dev->name, 1445 le32_to_cpu(hmp->rx_ring[(hmp->cur_rx+1) % RX_RING_SIZE].status_n_length) & 0xffff0000, 1446 le32_to_cpu(hmp->rx_ring[(hmp->cur_rx+1) % RX_RING_SIZE].status_n_length) & 0x0000ffff, 1447 le32_to_cpu(hmp->rx_ring[(hmp->cur_rx-1) % RX_RING_SIZE].status_n_length)); 1448 dev->stats.rx_length_errors++; 1449 } /* else Omit for prototype errata??? */ 1450 if (frame_status & 0x00380000) { 1451 /* There was an error. */ 1452 if (hamachi_debug > 2) 1453 printk(KERN_DEBUG " hamachi_rx() Rx error was %8.8x.\n", 1454 frame_status); 1455 dev->stats.rx_errors++; 1456 if (frame_status & 0x00600000) 1457 dev->stats.rx_length_errors++; 1458 if (frame_status & 0x00080000) 1459 dev->stats.rx_frame_errors++; 1460 if (frame_status & 0x00100000) 1461 dev->stats.rx_crc_errors++; 1462 if (frame_status < 0) 1463 dev->stats.rx_dropped++; 1464 } else { 1465 struct sk_buff *skb; 1466 /* Omit CRC */ 1467 u16 pkt_len = (frame_status & 0x07ff) - 4; 1468 #ifdef RX_CHECKSUM 1469 u32 pfck = *(u32 *) &buf_addr[data_size - 8]; 1470 #endif 1471 1472 1473 #ifndef final_version 1474 if (hamachi_debug > 4) 1475 printk(KERN_DEBUG " hamachi_rx() normal Rx pkt length %d" 1476 " of %d, bogus_cnt %d.\n", 1477 pkt_len, data_size, boguscnt); 1478 if (hamachi_debug > 5) 1479 printk(KERN_DEBUG"%s: rx status %8.8x %8.8x %8.8x %8.8x %8.8x.\n", 1480 dev->name, 1481 *(s32*)&(buf_addr[data_size - 20]), 1482 *(s32*)&(buf_addr[data_size - 16]), 1483 *(s32*)&(buf_addr[data_size - 12]), 1484 *(s32*)&(buf_addr[data_size - 8]), 1485 *(s32*)&(buf_addr[data_size - 4])); 1486 #endif 1487 /* Check if the packet is long enough to accept without copying 1488 to a minimally-sized skbuff. */ 1489 if (pkt_len < rx_copybreak && 1490 (skb = netdev_alloc_skb(dev, pkt_len + 2)) != NULL) { 1491 #ifdef RX_CHECKSUM 1492 printk(KERN_ERR "%s: rx_copybreak non-zero " 1493 "not good with RX_CHECKSUM\n", dev->name); 1494 #endif 1495 skb_reserve(skb, 2); /* 16 byte align the IP header */ 1496 pci_dma_sync_single_for_cpu(hmp->pci_dev, 1497 leXX_to_cpu(hmp->rx_ring[entry].addr), 1498 hmp->rx_buf_sz, 1499 PCI_DMA_FROMDEVICE); 1500 /* Call copy + cksum if available. */ 1501 #if 1 || USE_IP_COPYSUM 1502 skb_copy_to_linear_data(skb, 1503 hmp->rx_skbuff[entry]->data, pkt_len); 1504 skb_put(skb, pkt_len); 1505 #else 1506 memcpy(skb_put(skb, pkt_len), hmp->rx_ring_dma 1507 + entry*sizeof(*desc), pkt_len); 1508 #endif 1509 pci_dma_sync_single_for_device(hmp->pci_dev, 1510 leXX_to_cpu(hmp->rx_ring[entry].addr), 1511 hmp->rx_buf_sz, 1512 PCI_DMA_FROMDEVICE); 1513 } else { 1514 pci_unmap_single(hmp->pci_dev, 1515 leXX_to_cpu(hmp->rx_ring[entry].addr), 1516 hmp->rx_buf_sz, PCI_DMA_FROMDEVICE); 1517 skb_put(skb = hmp->rx_skbuff[entry], pkt_len); 1518 hmp->rx_skbuff[entry] = NULL; 1519 } 1520 skb->protocol = eth_type_trans(skb, dev); 1521 1522 1523 #ifdef RX_CHECKSUM 1524 /* TCP or UDP on ipv4, DIX encoding */ 1525 if (pfck>>24 == 0x91 || pfck>>24 == 0x51) { 1526 struct iphdr *ih = (struct iphdr *) skb->data; 1527 /* Check that IP packet is at least 46 bytes, otherwise, 1528 * there may be pad bytes included in the hardware checksum. 1529 * This wouldn't happen if everyone padded with 0. 1530 */ 1531 if (ntohs(ih->tot_len) >= 46){ 1532 /* don't worry about frags */ 1533 if (!(ih->frag_off & cpu_to_be16(IP_MF|IP_OFFSET))) { 1534 u32 inv = *(u32 *) &buf_addr[data_size - 16]; 1535 u32 *p = (u32 *) &buf_addr[data_size - 20]; 1536 register u32 crc, p_r, p_r1; 1537 1538 if (inv & 4) { 1539 inv &= ~4; 1540 --p; 1541 } 1542 p_r = *p; 1543 p_r1 = *(p-1); 1544 switch (inv) { 1545 case 0: 1546 crc = (p_r & 0xffff) + (p_r >> 16); 1547 break; 1548 case 1: 1549 crc = (p_r >> 16) + (p_r & 0xffff) 1550 + (p_r1 >> 16 & 0xff00); 1551 break; 1552 case 2: 1553 crc = p_r + (p_r1 >> 16); 1554 break; 1555 case 3: 1556 crc = p_r + (p_r1 & 0xff00) + (p_r1 >> 16); 1557 break; 1558 default: /*NOTREACHED*/ crc = 0; 1559 } 1560 if (crc & 0xffff0000) { 1561 crc &= 0xffff; 1562 ++crc; 1563 } 1564 /* tcp/udp will add in pseudo */ 1565 skb->csum = ntohs(pfck & 0xffff); 1566 if (skb->csum > crc) 1567 skb->csum -= crc; 1568 else 1569 skb->csum += (~crc & 0xffff); 1570 /* 1571 * could do the pseudo myself and return 1572 * CHECKSUM_UNNECESSARY 1573 */ 1574 skb->ip_summed = CHECKSUM_COMPLETE; 1575 } 1576 } 1577 } 1578 #endif /* RX_CHECKSUM */ 1579 1580 netif_rx(skb); 1581 dev->stats.rx_packets++; 1582 } 1583 entry = (++hmp->cur_rx) % RX_RING_SIZE; 1584 } 1585 1586 /* Refill the Rx ring buffers. */ 1587 for (; hmp->cur_rx - hmp->dirty_rx > 0; hmp->dirty_rx++) { 1588 struct hamachi_desc *desc; 1589 1590 entry = hmp->dirty_rx % RX_RING_SIZE; 1591 desc = &(hmp->rx_ring[entry]); 1592 if (hmp->rx_skbuff[entry] == NULL) { 1593 struct sk_buff *skb = netdev_alloc_skb(dev, hmp->rx_buf_sz + 2); 1594 1595 hmp->rx_skbuff[entry] = skb; 1596 if (skb == NULL) 1597 break; /* Better luck next round. */ 1598 skb_reserve(skb, 2); /* Align IP on 16 byte boundaries */ 1599 desc->addr = cpu_to_leXX(pci_map_single(hmp->pci_dev, 1600 skb->data, hmp->rx_buf_sz, PCI_DMA_FROMDEVICE)); 1601 } 1602 desc->status_n_length = cpu_to_le32(hmp->rx_buf_sz); 1603 if (entry >= RX_RING_SIZE-1) 1604 desc->status_n_length |= cpu_to_le32(DescOwn | 1605 DescEndPacket | DescEndRing | DescIntr); 1606 else 1607 desc->status_n_length |= cpu_to_le32(DescOwn | 1608 DescEndPacket | DescIntr); 1609 } 1610 1611 /* Restart Rx engine if stopped. */ 1612 /* If we don't need to check status, don't. -KDU */ 1613 if (readw(hmp->base + RxStatus) & 0x0002) 1614 writew(0x0001, hmp->base + RxCmd); 1615 1616 return 0; 1617 } 1618 1619 /* This is more properly named "uncommon interrupt events", as it covers more 1620 than just errors. */ 1621 static void hamachi_error(struct net_device *dev, int intr_status) 1622 { 1623 struct hamachi_private *hmp = netdev_priv(dev); 1624 void __iomem *ioaddr = hmp->base; 1625 1626 if (intr_status & (LinkChange|NegotiationChange)) { 1627 if (hamachi_debug > 1) 1628 printk(KERN_INFO "%s: Link changed: AutoNegotiation Ctrl" 1629 " %4.4x, Status %4.4x %4.4x Intr status %4.4x.\n", 1630 dev->name, readw(ioaddr + 0x0E0), readw(ioaddr + 0x0E2), 1631 readw(ioaddr + ANLinkPartnerAbility), 1632 readl(ioaddr + IntrStatus)); 1633 if (readw(ioaddr + ANStatus) & 0x20) 1634 writeb(0x01, ioaddr + LEDCtrl); 1635 else 1636 writeb(0x03, ioaddr + LEDCtrl); 1637 } 1638 if (intr_status & StatsMax) { 1639 hamachi_get_stats(dev); 1640 /* Read the overflow bits to clear. */ 1641 readl(ioaddr + 0x370); 1642 readl(ioaddr + 0x3F0); 1643 } 1644 if ((intr_status & ~(LinkChange|StatsMax|NegotiationChange|IntrRxDone|IntrTxDone)) && 1645 hamachi_debug) 1646 printk(KERN_ERR "%s: Something Wicked happened! %4.4x.\n", 1647 dev->name, intr_status); 1648 /* Hmmmmm, it's not clear how to recover from PCI faults. */ 1649 if (intr_status & (IntrTxPCIErr | IntrTxPCIFault)) 1650 dev->stats.tx_fifo_errors++; 1651 if (intr_status & (IntrRxPCIErr | IntrRxPCIFault)) 1652 dev->stats.rx_fifo_errors++; 1653 } 1654 1655 static int hamachi_close(struct net_device *dev) 1656 { 1657 struct hamachi_private *hmp = netdev_priv(dev); 1658 void __iomem *ioaddr = hmp->base; 1659 struct sk_buff *skb; 1660 int i; 1661 1662 netif_stop_queue(dev); 1663 1664 if (hamachi_debug > 1) { 1665 printk(KERN_DEBUG "%s: Shutting down ethercard, status was Tx %4.4x Rx %4.4x Int %2.2x.\n", 1666 dev->name, readw(ioaddr + TxStatus), 1667 readw(ioaddr + RxStatus), readl(ioaddr + IntrStatus)); 1668 printk(KERN_DEBUG "%s: Queue pointers were Tx %d / %d, Rx %d / %d.\n", 1669 dev->name, hmp->cur_tx, hmp->dirty_tx, hmp->cur_rx, hmp->dirty_rx); 1670 } 1671 1672 /* Disable interrupts by clearing the interrupt mask. */ 1673 writel(0x0000, ioaddr + InterruptEnable); 1674 1675 /* Stop the chip's Tx and Rx processes. */ 1676 writel(2, ioaddr + RxCmd); 1677 writew(2, ioaddr + TxCmd); 1678 1679 #ifdef __i386__ 1680 if (hamachi_debug > 2) { 1681 printk(KERN_DEBUG " Tx ring at %8.8x:\n", 1682 (int)hmp->tx_ring_dma); 1683 for (i = 0; i < TX_RING_SIZE; i++) 1684 printk(KERN_DEBUG " %c #%d desc. %8.8x %8.8x.\n", 1685 readl(ioaddr + TxCurPtr) == (long)&hmp->tx_ring[i] ? '>' : ' ', 1686 i, hmp->tx_ring[i].status_n_length, hmp->tx_ring[i].addr); 1687 printk(KERN_DEBUG " Rx ring %8.8x:\n", 1688 (int)hmp->rx_ring_dma); 1689 for (i = 0; i < RX_RING_SIZE; i++) { 1690 printk(KERN_DEBUG " %c #%d desc. %4.4x %8.8x\n", 1691 readl(ioaddr + RxCurPtr) == (long)&hmp->rx_ring[i] ? '>' : ' ', 1692 i, hmp->rx_ring[i].status_n_length, hmp->rx_ring[i].addr); 1693 if (hamachi_debug > 6) { 1694 if (*(u8*)hmp->rx_skbuff[i]->data != 0x69) { 1695 u16 *addr = (u16 *) 1696 hmp->rx_skbuff[i]->data; 1697 int j; 1698 printk(KERN_DEBUG "Addr: "); 1699 for (j = 0; j < 0x50; j++) 1700 printk(" %4.4x", addr[j]); 1701 printk("\n"); 1702 } 1703 } 1704 } 1705 } 1706 #endif /* __i386__ debugging only */ 1707 1708 free_irq(dev->irq, dev); 1709 1710 del_timer_sync(&hmp->timer); 1711 1712 /* Free all the skbuffs in the Rx queue. */ 1713 for (i = 0; i < RX_RING_SIZE; i++) { 1714 skb = hmp->rx_skbuff[i]; 1715 hmp->rx_ring[i].status_n_length = 0; 1716 if (skb) { 1717 pci_unmap_single(hmp->pci_dev, 1718 leXX_to_cpu(hmp->rx_ring[i].addr), 1719 hmp->rx_buf_sz, PCI_DMA_FROMDEVICE); 1720 dev_kfree_skb(skb); 1721 hmp->rx_skbuff[i] = NULL; 1722 } 1723 hmp->rx_ring[i].addr = cpu_to_leXX(0xBADF00D0); /* An invalid address. */ 1724 } 1725 for (i = 0; i < TX_RING_SIZE; i++) { 1726 skb = hmp->tx_skbuff[i]; 1727 if (skb) { 1728 pci_unmap_single(hmp->pci_dev, 1729 leXX_to_cpu(hmp->tx_ring[i].addr), 1730 skb->len, PCI_DMA_TODEVICE); 1731 dev_kfree_skb(skb); 1732 hmp->tx_skbuff[i] = NULL; 1733 } 1734 } 1735 1736 writeb(0x00, ioaddr + LEDCtrl); 1737 1738 return 0; 1739 } 1740 1741 static struct net_device_stats *hamachi_get_stats(struct net_device *dev) 1742 { 1743 struct hamachi_private *hmp = netdev_priv(dev); 1744 void __iomem *ioaddr = hmp->base; 1745 1746 /* We should lock this segment of code for SMP eventually, although 1747 the vulnerability window is very small and statistics are 1748 non-critical. */ 1749 /* Ok, what goes here? This appears to be stuck at 21 packets 1750 according to ifconfig. It does get incremented in hamachi_tx(), 1751 so I think I'll comment it out here and see if better things 1752 happen. 1753 */ 1754 /* dev->stats.tx_packets = readl(ioaddr + 0x000); */ 1755 1756 /* Total Uni+Brd+Multi */ 1757 dev->stats.rx_bytes = readl(ioaddr + 0x330); 1758 /* Total Uni+Brd+Multi */ 1759 dev->stats.tx_bytes = readl(ioaddr + 0x3B0); 1760 /* Multicast Rx */ 1761 dev->stats.multicast = readl(ioaddr + 0x320); 1762 1763 /* Over+Undersized */ 1764 dev->stats.rx_length_errors = readl(ioaddr + 0x368); 1765 /* Jabber */ 1766 dev->stats.rx_over_errors = readl(ioaddr + 0x35C); 1767 /* Jabber */ 1768 dev->stats.rx_crc_errors = readl(ioaddr + 0x360); 1769 /* Symbol Errs */ 1770 dev->stats.rx_frame_errors = readl(ioaddr + 0x364); 1771 /* Dropped */ 1772 dev->stats.rx_missed_errors = readl(ioaddr + 0x36C); 1773 1774 return &dev->stats; 1775 } 1776 1777 static void set_rx_mode(struct net_device *dev) 1778 { 1779 struct hamachi_private *hmp = netdev_priv(dev); 1780 void __iomem *ioaddr = hmp->base; 1781 1782 if (dev->flags & IFF_PROMISC) { /* Set promiscuous. */ 1783 writew(0x000F, ioaddr + AddrMode); 1784 } else if ((netdev_mc_count(dev) > 63) || (dev->flags & IFF_ALLMULTI)) { 1785 /* Too many to match, or accept all multicasts. */ 1786 writew(0x000B, ioaddr + AddrMode); 1787 } else if (!netdev_mc_empty(dev)) { /* Must use the CAM filter. */ 1788 struct netdev_hw_addr *ha; 1789 int i = 0; 1790 1791 netdev_for_each_mc_addr(ha, dev) { 1792 writel(*(u32 *)(ha->addr), ioaddr + 0x100 + i*8); 1793 writel(0x20000 | (*(u16 *)&ha->addr[4]), 1794 ioaddr + 0x104 + i*8); 1795 i++; 1796 } 1797 /* Clear remaining entries. */ 1798 for (; i < 64; i++) 1799 writel(0, ioaddr + 0x104 + i*8); 1800 writew(0x0003, ioaddr + AddrMode); 1801 } else { /* Normal, unicast/broadcast-only mode. */ 1802 writew(0x0001, ioaddr + AddrMode); 1803 } 1804 } 1805 1806 static int check_if_running(struct net_device *dev) 1807 { 1808 if (!netif_running(dev)) 1809 return -EINVAL; 1810 return 0; 1811 } 1812 1813 static void hamachi_get_drvinfo(struct net_device *dev, struct ethtool_drvinfo *info) 1814 { 1815 struct hamachi_private *np = netdev_priv(dev); 1816 strcpy(info->driver, DRV_NAME); 1817 strcpy(info->version, DRV_VERSION); 1818 strcpy(info->bus_info, pci_name(np->pci_dev)); 1819 } 1820 1821 static int hamachi_get_settings(struct net_device *dev, struct ethtool_cmd *ecmd) 1822 { 1823 struct hamachi_private *np = netdev_priv(dev); 1824 spin_lock_irq(&np->lock); 1825 mii_ethtool_gset(&np->mii_if, ecmd); 1826 spin_unlock_irq(&np->lock); 1827 return 0; 1828 } 1829 1830 static int hamachi_set_settings(struct net_device *dev, struct ethtool_cmd *ecmd) 1831 { 1832 struct hamachi_private *np = netdev_priv(dev); 1833 int res; 1834 spin_lock_irq(&np->lock); 1835 res = mii_ethtool_sset(&np->mii_if, ecmd); 1836 spin_unlock_irq(&np->lock); 1837 return res; 1838 } 1839 1840 static int hamachi_nway_reset(struct net_device *dev) 1841 { 1842 struct hamachi_private *np = netdev_priv(dev); 1843 return mii_nway_restart(&np->mii_if); 1844 } 1845 1846 static u32 hamachi_get_link(struct net_device *dev) 1847 { 1848 struct hamachi_private *np = netdev_priv(dev); 1849 return mii_link_ok(&np->mii_if); 1850 } 1851 1852 static const struct ethtool_ops ethtool_ops = { 1853 .begin = check_if_running, 1854 .get_drvinfo = hamachi_get_drvinfo, 1855 .get_settings = hamachi_get_settings, 1856 .set_settings = hamachi_set_settings, 1857 .nway_reset = hamachi_nway_reset, 1858 .get_link = hamachi_get_link, 1859 }; 1860 1861 static const struct ethtool_ops ethtool_ops_no_mii = { 1862 .begin = check_if_running, 1863 .get_drvinfo = hamachi_get_drvinfo, 1864 }; 1865 1866 static int netdev_ioctl(struct net_device *dev, struct ifreq *rq, int cmd) 1867 { 1868 struct hamachi_private *np = netdev_priv(dev); 1869 struct mii_ioctl_data *data = if_mii(rq); 1870 int rc; 1871 1872 if (!netif_running(dev)) 1873 return -EINVAL; 1874 1875 if (cmd == (SIOCDEVPRIVATE+3)) { /* set rx,tx intr params */ 1876 u32 *d = (u32 *)&rq->ifr_ifru; 1877 /* Should add this check here or an ordinary user can do nasty 1878 * things. -KDU 1879 * 1880 * TODO: Shut down the Rx and Tx engines while doing this. 1881 */ 1882 if (!capable(CAP_NET_ADMIN)) 1883 return -EPERM; 1884 writel(d[0], np->base + TxIntrCtrl); 1885 writel(d[1], np->base + RxIntrCtrl); 1886 printk(KERN_NOTICE "%s: tx %08x, rx %08x intr\n", dev->name, 1887 (u32) readl(np->base + TxIntrCtrl), 1888 (u32) readl(np->base + RxIntrCtrl)); 1889 rc = 0; 1890 } 1891 1892 else { 1893 spin_lock_irq(&np->lock); 1894 rc = generic_mii_ioctl(&np->mii_if, data, cmd, NULL); 1895 spin_unlock_irq(&np->lock); 1896 } 1897 1898 return rc; 1899 } 1900 1901 1902 static void __devexit hamachi_remove_one (struct pci_dev *pdev) 1903 { 1904 struct net_device *dev = pci_get_drvdata(pdev); 1905 1906 if (dev) { 1907 struct hamachi_private *hmp = netdev_priv(dev); 1908 1909 pci_free_consistent(pdev, RX_TOTAL_SIZE, hmp->rx_ring, 1910 hmp->rx_ring_dma); 1911 pci_free_consistent(pdev, TX_TOTAL_SIZE, hmp->tx_ring, 1912 hmp->tx_ring_dma); 1913 unregister_netdev(dev); 1914 iounmap(hmp->base); 1915 free_netdev(dev); 1916 pci_release_regions(pdev); 1917 pci_set_drvdata(pdev, NULL); 1918 } 1919 } 1920 1921 static DEFINE_PCI_DEVICE_TABLE(hamachi_pci_tbl) = { 1922 { 0x1318, 0x0911, PCI_ANY_ID, PCI_ANY_ID, }, 1923 { 0, } 1924 }; 1925 MODULE_DEVICE_TABLE(pci, hamachi_pci_tbl); 1926 1927 static struct pci_driver hamachi_driver = { 1928 .name = DRV_NAME, 1929 .id_table = hamachi_pci_tbl, 1930 .probe = hamachi_init_one, 1931 .remove = __devexit_p(hamachi_remove_one), 1932 }; 1933 1934 static int __init hamachi_init (void) 1935 { 1936 /* when a module, this is printed whether or not devices are found in probe */ 1937 #ifdef MODULE 1938 printk(version); 1939 #endif 1940 return pci_register_driver(&hamachi_driver); 1941 } 1942 1943 static void __exit hamachi_exit (void) 1944 { 1945 pci_unregister_driver(&hamachi_driver); 1946 } 1947 1948 1949 module_init(hamachi_init); 1950 module_exit(hamachi_exit); 1951