1 /* SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) */
2 /* Copyright (C) 2015-2018 Netronome Systems, Inc. */
3 
4 /*
5  * nfp_net.h
6  * Declarations for Netronome network device driver.
7  * Authors: Jakub Kicinski <jakub.kicinski@netronome.com>
8  *          Jason McMullan <jason.mcmullan@netronome.com>
9  *          Rolf Neugebauer <rolf.neugebauer@netronome.com>
10  */
11 
12 #ifndef _NFP_NET_H_
13 #define _NFP_NET_H_
14 
15 #include <linux/atomic.h>
16 #include <linux/interrupt.h>
17 #include <linux/list.h>
18 #include <linux/netdevice.h>
19 #include <linux/pci.h>
20 #include <linux/io-64-nonatomic-hi-lo.h>
21 #include <linux/semaphore.h>
22 #include <linux/workqueue.h>
23 #include <net/xdp.h>
24 
25 #include "nfp_net_ctrl.h"
26 
27 #define nn_pr(nn, lvl, fmt, args...)					\
28 	({								\
29 		struct nfp_net *__nn = (nn);				\
30 									\
31 		if (__nn->dp.netdev)					\
32 			netdev_printk(lvl, __nn->dp.netdev, fmt, ## args); \
33 		else							\
34 			dev_printk(lvl, __nn->dp.dev, "ctrl: " fmt, ## args); \
35 	})
36 
37 #define nn_err(nn, fmt, args...)	nn_pr(nn, KERN_ERR, fmt, ## args)
38 #define nn_warn(nn, fmt, args...)	nn_pr(nn, KERN_WARNING, fmt, ## args)
39 #define nn_info(nn, fmt, args...)	nn_pr(nn, KERN_INFO, fmt, ## args)
40 #define nn_dbg(nn, fmt, args...)	nn_pr(nn, KERN_DEBUG, fmt, ## args)
41 
42 #define nn_dp_warn(dp, fmt, args...)					\
43 	({								\
44 		struct nfp_net_dp *__dp = (dp);				\
45 									\
46 		if (unlikely(net_ratelimit())) {			\
47 			if (__dp->netdev)				\
48 				netdev_warn(__dp->netdev, fmt, ## args); \
49 			else						\
50 				dev_warn(__dp->dev, fmt, ## args);	\
51 		}							\
52 	})
53 
54 /* Max time to wait for NFP to respond on updates (in seconds) */
55 #define NFP_NET_POLL_TIMEOUT	5
56 
57 /* Interval for reading offloaded filter stats */
58 #define NFP_NET_STAT_POLL_IVL	msecs_to_jiffies(100)
59 
60 /* Bar allocation */
61 #define NFP_NET_CTRL_BAR	0
62 #define NFP_NET_Q0_BAR		2
63 #define NFP_NET_Q1_BAR		4	/* OBSOLETE */
64 
65 /* Max bits in DMA address */
66 #define NFP_NET_MAX_DMA_BITS	40
67 
68 /* Default size for MTU and freelist buffer sizes */
69 #define NFP_NET_DEFAULT_MTU		1500
70 
71 /* Maximum number of bytes prepended to a packet */
72 #define NFP_NET_MAX_PREPEND		64
73 
74 /* Interrupt definitions */
75 #define NFP_NET_NON_Q_VECTORS		2
76 #define NFP_NET_IRQ_LSC_IDX		0
77 #define NFP_NET_IRQ_EXN_IDX		1
78 #define NFP_NET_MIN_VNIC_IRQS		(NFP_NET_NON_Q_VECTORS + 1)
79 
80 /* Queue/Ring definitions */
81 #define NFP_NET_MAX_TX_RINGS	64	/* Max. # of Tx rings per device */
82 #define NFP_NET_MAX_RX_RINGS	64	/* Max. # of Rx rings per device */
83 #define NFP_NET_MAX_R_VECS	(NFP_NET_MAX_TX_RINGS > NFP_NET_MAX_RX_RINGS ? \
84 				 NFP_NET_MAX_TX_RINGS : NFP_NET_MAX_RX_RINGS)
85 #define NFP_NET_MAX_IRQS	(NFP_NET_NON_Q_VECTORS + NFP_NET_MAX_R_VECS)
86 
87 #define NFP_NET_MIN_TX_DESCS	256	/* Min. # of Tx descs per ring */
88 #define NFP_NET_MIN_RX_DESCS	256	/* Min. # of Rx descs per ring */
89 #define NFP_NET_MAX_TX_DESCS	(256 * 1024) /* Max. # of Tx descs per ring */
90 #define NFP_NET_MAX_RX_DESCS	(256 * 1024) /* Max. # of Rx descs per ring */
91 
92 #define NFP_NET_TX_DESCS_DEFAULT 4096	/* Default # of Tx descs per ring */
93 #define NFP_NET_RX_DESCS_DEFAULT 4096	/* Default # of Rx descs per ring */
94 
95 #define NFP_NET_FL_BATCH	16	/* Add freelist in this Batch size */
96 #define NFP_NET_XDP_MAX_COMPLETE 2048	/* XDP bufs to reclaim in NAPI poll */
97 
98 /* Offload definitions */
99 #define NFP_NET_N_VXLAN_PORTS	(NFP_NET_CFG_VXLAN_SZ / sizeof(__be16))
100 
101 #define NFP_NET_RX_BUF_HEADROOM	(NET_SKB_PAD + NET_IP_ALIGN)
102 #define NFP_NET_RX_BUF_NON_DATA	(NFP_NET_RX_BUF_HEADROOM +		\
103 				 SKB_DATA_ALIGN(sizeof(struct skb_shared_info)))
104 
105 /* Forward declarations */
106 struct nfp_cpp;
107 struct nfp_eth_table_port;
108 struct nfp_net;
109 struct nfp_net_r_vector;
110 struct nfp_port;
111 
112 /* Convenience macro for wrapping descriptor index on ring size */
113 #define D_IDX(ring, idx)	((idx) & ((ring)->cnt - 1))
114 
115 /* Convenience macro for writing dma address into RX/TX descriptors */
116 #define nfp_desc_set_dma_addr(desc, dma_addr)				\
117 	do {								\
118 		__typeof(desc) __d = (desc);				\
119 		dma_addr_t __addr = (dma_addr);				\
120 									\
121 		__d->dma_addr_lo = cpu_to_le32(lower_32_bits(__addr));	\
122 		__d->dma_addr_hi = upper_32_bits(__addr) & 0xff;	\
123 	} while (0)
124 
125 /* TX descriptor format */
126 
127 #define PCIE_DESC_TX_EOP		BIT(7)
128 #define PCIE_DESC_TX_OFFSET_MASK	GENMASK(6, 0)
129 #define PCIE_DESC_TX_MSS_MASK		GENMASK(13, 0)
130 
131 /* Flags in the host TX descriptor */
132 #define PCIE_DESC_TX_CSUM		BIT(7)
133 #define PCIE_DESC_TX_IP4_CSUM		BIT(6)
134 #define PCIE_DESC_TX_TCP_CSUM		BIT(5)
135 #define PCIE_DESC_TX_UDP_CSUM		BIT(4)
136 #define PCIE_DESC_TX_VLAN		BIT(3)
137 #define PCIE_DESC_TX_LSO		BIT(2)
138 #define PCIE_DESC_TX_ENCAP		BIT(1)
139 #define PCIE_DESC_TX_O_IP4_CSUM	BIT(0)
140 
141 struct nfp_net_tx_desc {
142 	union {
143 		struct {
144 			u8 dma_addr_hi; /* High bits of host buf address */
145 			__le16 dma_len;	/* Length to DMA for this desc */
146 			u8 offset_eop;	/* Offset in buf where pkt starts +
147 					 * highest bit is eop flag.
148 					 */
149 			__le32 dma_addr_lo; /* Low 32bit of host buf addr */
150 
151 			__le16 mss;	/* MSS to be used for LSO */
152 			u8 lso_hdrlen;	/* LSO, TCP payload offset */
153 			u8 flags;	/* TX Flags, see @PCIE_DESC_TX_* */
154 			union {
155 				struct {
156 					u8 l3_offset; /* L3 header offset */
157 					u8 l4_offset; /* L4 header offset */
158 				};
159 				__le16 vlan; /* VLAN tag to add if indicated */
160 			};
161 			__le16 data_len; /* Length of frame + meta data */
162 		} __packed;
163 		__le32 vals[4];
164 		__le64 vals8[2];
165 	};
166 };
167 
168 /**
169  * struct nfp_net_tx_buf - software TX buffer descriptor
170  * @skb:	normal ring, sk_buff associated with this buffer
171  * @frag:	XDP ring, page frag associated with this buffer
172  * @dma_addr:	DMA mapping address of the buffer
173  * @fidx:	Fragment index (-1 for the head and [0..nr_frags-1] for frags)
174  * @pkt_cnt:	Number of packets to be produced out of the skb associated
175  *		with this buffer (valid only on the head's buffer).
176  *		Will be 1 for all non-TSO packets.
177  * @real_len:	Number of bytes which to be produced out of the skb (valid only
178  *		on the head's buffer). Equal to skb->len for non-TSO packets.
179  */
180 struct nfp_net_tx_buf {
181 	union {
182 		struct sk_buff *skb;
183 		void *frag;
184 	};
185 	dma_addr_t dma_addr;
186 	short int fidx;
187 	u16 pkt_cnt;
188 	u32 real_len;
189 };
190 
191 /**
192  * struct nfp_net_tx_ring - TX ring structure
193  * @r_vec:      Back pointer to ring vector structure
194  * @idx:        Ring index from Linux's perspective
195  * @qcidx:      Queue Controller Peripheral (QCP) queue index for the TX queue
196  * @qcp_q:      Pointer to base of the QCP TX queue
197  * @cnt:        Size of the queue in number of descriptors
198  * @wr_p:       TX ring write pointer (free running)
199  * @rd_p:       TX ring read pointer (free running)
200  * @qcp_rd_p:   Local copy of QCP TX queue read pointer
201  * @wr_ptr_add:	Accumulated number of buffers to add to QCP write pointer
202  *		(used for .xmit_more delayed kick)
203  * @txbufs:     Array of transmitted TX buffers, to free on transmit
204  * @txds:       Virtual address of TX ring in host memory
205  * @dma:        DMA address of the TX ring
206  * @size:       Size, in bytes, of the TX ring (needed to free)
207  * @is_xdp:	Is this a XDP TX ring?
208  */
209 struct nfp_net_tx_ring {
210 	struct nfp_net_r_vector *r_vec;
211 
212 	u32 idx;
213 	int qcidx;
214 	u8 __iomem *qcp_q;
215 
216 	u32 cnt;
217 	u32 wr_p;
218 	u32 rd_p;
219 	u32 qcp_rd_p;
220 
221 	u32 wr_ptr_add;
222 
223 	struct nfp_net_tx_buf *txbufs;
224 	struct nfp_net_tx_desc *txds;
225 
226 	dma_addr_t dma;
227 	size_t size;
228 	bool is_xdp;
229 } ____cacheline_aligned;
230 
231 /* RX and freelist descriptor format */
232 
233 #define PCIE_DESC_RX_DD			BIT(7)
234 #define PCIE_DESC_RX_META_LEN_MASK	GENMASK(6, 0)
235 
236 /* Flags in the RX descriptor */
237 #define PCIE_DESC_RX_RSS		cpu_to_le16(BIT(15))
238 #define PCIE_DESC_RX_I_IP4_CSUM		cpu_to_le16(BIT(14))
239 #define PCIE_DESC_RX_I_IP4_CSUM_OK	cpu_to_le16(BIT(13))
240 #define PCIE_DESC_RX_I_TCP_CSUM		cpu_to_le16(BIT(12))
241 #define PCIE_DESC_RX_I_TCP_CSUM_OK	cpu_to_le16(BIT(11))
242 #define PCIE_DESC_RX_I_UDP_CSUM		cpu_to_le16(BIT(10))
243 #define PCIE_DESC_RX_I_UDP_CSUM_OK	cpu_to_le16(BIT(9))
244 #define PCIE_DESC_RX_DECRYPTED		cpu_to_le16(BIT(8))
245 #define PCIE_DESC_RX_EOP		cpu_to_le16(BIT(7))
246 #define PCIE_DESC_RX_IP4_CSUM		cpu_to_le16(BIT(6))
247 #define PCIE_DESC_RX_IP4_CSUM_OK	cpu_to_le16(BIT(5))
248 #define PCIE_DESC_RX_TCP_CSUM		cpu_to_le16(BIT(4))
249 #define PCIE_DESC_RX_TCP_CSUM_OK	cpu_to_le16(BIT(3))
250 #define PCIE_DESC_RX_UDP_CSUM		cpu_to_le16(BIT(2))
251 #define PCIE_DESC_RX_UDP_CSUM_OK	cpu_to_le16(BIT(1))
252 #define PCIE_DESC_RX_VLAN		cpu_to_le16(BIT(0))
253 
254 #define PCIE_DESC_RX_CSUM_ALL		(PCIE_DESC_RX_IP4_CSUM |	\
255 					 PCIE_DESC_RX_TCP_CSUM |	\
256 					 PCIE_DESC_RX_UDP_CSUM |	\
257 					 PCIE_DESC_RX_I_IP4_CSUM |	\
258 					 PCIE_DESC_RX_I_TCP_CSUM |	\
259 					 PCIE_DESC_RX_I_UDP_CSUM)
260 #define PCIE_DESC_RX_CSUM_OK_SHIFT	1
261 #define __PCIE_DESC_RX_CSUM_ALL		le16_to_cpu(PCIE_DESC_RX_CSUM_ALL)
262 #define __PCIE_DESC_RX_CSUM_ALL_OK	(__PCIE_DESC_RX_CSUM_ALL >>	\
263 					 PCIE_DESC_RX_CSUM_OK_SHIFT)
264 
265 struct nfp_net_rx_desc {
266 	union {
267 		struct {
268 			u8 dma_addr_hi;	/* High bits of the buf address */
269 			__le16 reserved; /* Must be zero */
270 			u8 meta_len_dd; /* Must be zero */
271 
272 			__le32 dma_addr_lo; /* Low bits of the buffer address */
273 		} __packed fld;
274 
275 		struct {
276 			__le16 data_len; /* Length of the frame + meta data */
277 			u8 reserved;
278 			u8 meta_len_dd;	/* Length of meta data prepended +
279 					 * descriptor done flag.
280 					 */
281 
282 			__le16 flags;	/* RX flags. See @PCIE_DESC_RX_* */
283 			__le16 vlan;	/* VLAN if stripped */
284 		} __packed rxd;
285 
286 		__le32 vals[2];
287 	};
288 };
289 
290 #define NFP_NET_META_FIELD_MASK GENMASK(NFP_NET_META_FIELD_SIZE - 1, 0)
291 
292 struct nfp_meta_parsed {
293 	u8 hash_type;
294 	u8 csum_type;
295 	u32 hash;
296 	u32 mark;
297 	u32 portid;
298 	__wsum csum;
299 };
300 
301 struct nfp_net_rx_hash {
302 	__be32 hash_type;
303 	__be32 hash;
304 };
305 
306 /**
307  * struct nfp_net_rx_buf - software RX buffer descriptor
308  * @frag:	page fragment buffer
309  * @dma_addr:	DMA mapping address of the buffer
310  */
311 struct nfp_net_rx_buf {
312 	void *frag;
313 	dma_addr_t dma_addr;
314 };
315 
316 /**
317  * struct nfp_net_rx_ring - RX ring structure
318  * @r_vec:      Back pointer to ring vector structure
319  * @cnt:        Size of the queue in number of descriptors
320  * @wr_p:       FL/RX ring write pointer (free running)
321  * @rd_p:       FL/RX ring read pointer (free running)
322  * @idx:        Ring index from Linux's perspective
323  * @fl_qcidx:   Queue Controller Peripheral (QCP) queue index for the freelist
324  * @qcp_fl:     Pointer to base of the QCP freelist queue
325  * @rxbufs:     Array of transmitted FL/RX buffers
326  * @rxds:       Virtual address of FL/RX ring in host memory
327  * @xdp_rxq:    RX-ring info avail for XDP
328  * @dma:        DMA address of the FL/RX ring
329  * @size:       Size, in bytes, of the FL/RX ring (needed to free)
330  */
331 struct nfp_net_rx_ring {
332 	struct nfp_net_r_vector *r_vec;
333 
334 	u32 cnt;
335 	u32 wr_p;
336 	u32 rd_p;
337 
338 	u32 idx;
339 
340 	int fl_qcidx;
341 	u8 __iomem *qcp_fl;
342 
343 	struct nfp_net_rx_buf *rxbufs;
344 	struct nfp_net_rx_desc *rxds;
345 
346 	struct xdp_rxq_info xdp_rxq;
347 
348 	dma_addr_t dma;
349 	size_t size;
350 } ____cacheline_aligned;
351 
352 /**
353  * struct nfp_net_r_vector - Per ring interrupt vector configuration
354  * @nfp_net:        Backpointer to nfp_net structure
355  * @napi:           NAPI structure for this ring vec
356  * @tasklet:        ctrl vNIC, tasklet for servicing the r_vec
357  * @queue:          ctrl vNIC, send queue
358  * @lock:           ctrl vNIC, r_vec lock protects @queue
359  * @tx_ring:        Pointer to TX ring
360  * @rx_ring:        Pointer to RX ring
361  * @xdp_ring:	    Pointer to an extra TX ring for XDP
362  * @irq_entry:      MSI-X table entry (use for talking to the device)
363  * @rx_sync:	    Seqlock for atomic updates of RX stats
364  * @rx_pkts:        Number of received packets
365  * @rx_bytes:	    Number of received bytes
366  * @rx_drops:	    Number of packets dropped on RX due to lack of resources
367  * @hw_csum_rx_ok:  Counter of packets where the HW checksum was OK
368  * @hw_csum_rx_inner_ok: Counter of packets where the inner HW checksum was OK
369  * @hw_csum_rx_complete: Counter of packets with CHECKSUM_COMPLETE reported
370  * @hw_csum_rx_error:	 Counter of packets with bad checksums
371  * @hw_tls_rx:	    Number of packets with TLS decrypted by hardware
372  * @tx_sync:	    Seqlock for atomic updates of TX stats
373  * @tx_pkts:	    Number of Transmitted packets
374  * @tx_bytes:	    Number of Transmitted bytes
375  * @hw_csum_tx:	    Counter of packets with TX checksum offload requested
376  * @hw_csum_tx_inner:	 Counter of inner TX checksum offload requests
377  * @tx_gather:	    Counter of packets with Gather DMA
378  * @tx_lso:	    Counter of LSO packets sent
379  * @hw_tls_tx:	    Counter of TLS packets sent with crypto offloaded to HW
380  * @tls_tx_fallback:	Counter of TLS packets sent which had to be encrypted
381  *			by the fallback path because packets came out of order
382  * @tls_tx_no_fallback:	Counter of TLS packets not sent because the fallback
383  *			path could not encrypt them
384  * @tx_errors:	    How many TX errors were encountered
385  * @tx_busy:        How often was TX busy (no space)?
386  * @rx_replace_buf_alloc_fail:	Counter of RX buffer allocation failures
387  * @irq_vector:     Interrupt vector number (use for talking to the OS)
388  * @handler:        Interrupt handler for this ring vector
389  * @name:           Name of the interrupt vector
390  * @affinity_mask:  SMP affinity mask for this vector
391  *
392  * This structure ties RX and TX rings to interrupt vectors and a NAPI
393  * context. This currently only supports one RX and TX ring per
394  * interrupt vector but might be extended in the future to allow
395  * association of multiple rings per vector.
396  */
397 struct nfp_net_r_vector {
398 	struct nfp_net *nfp_net;
399 	union {
400 		struct napi_struct napi;
401 		struct {
402 			struct tasklet_struct tasklet;
403 			struct sk_buff_head queue;
404 			spinlock_t lock;
405 		};
406 	};
407 
408 	struct nfp_net_tx_ring *tx_ring;
409 	struct nfp_net_rx_ring *rx_ring;
410 
411 	u16 irq_entry;
412 
413 	struct u64_stats_sync rx_sync;
414 	u64 rx_pkts;
415 	u64 rx_bytes;
416 	u64 rx_drops;
417 	u64 hw_csum_rx_ok;
418 	u64 hw_csum_rx_inner_ok;
419 	u64 hw_csum_rx_complete;
420 	u64 hw_tls_rx;
421 
422 	u64 hw_csum_rx_error;
423 	u64 rx_replace_buf_alloc_fail;
424 
425 	struct nfp_net_tx_ring *xdp_ring;
426 
427 	struct u64_stats_sync tx_sync;
428 	u64 tx_pkts;
429 	u64 tx_bytes;
430 
431 	u64 ____cacheline_aligned_in_smp hw_csum_tx;
432 	u64 hw_csum_tx_inner;
433 	u64 tx_gather;
434 	u64 tx_lso;
435 	u64 hw_tls_tx;
436 
437 	u64 tls_tx_fallback;
438 	u64 tls_tx_no_fallback;
439 	u64 tx_errors;
440 	u64 tx_busy;
441 
442 	/* Cold data follows */
443 
444 	u32 irq_vector;
445 	irq_handler_t handler;
446 	char name[IFNAMSIZ + 8];
447 	cpumask_t affinity_mask;
448 } ____cacheline_aligned;
449 
450 /* Firmware version as it is written in the 32bit value in the BAR */
451 struct nfp_net_fw_version {
452 	u8 minor;
453 	u8 major;
454 	u8 class;
455 	u8 resv;
456 } __packed;
457 
458 static inline bool nfp_net_fw_ver_eq(struct nfp_net_fw_version *fw_ver,
459 				     u8 resv, u8 class, u8 major, u8 minor)
460 {
461 	return fw_ver->resv == resv &&
462 	       fw_ver->class == class &&
463 	       fw_ver->major == major &&
464 	       fw_ver->minor == minor;
465 }
466 
467 struct nfp_stat_pair {
468 	u64 pkts;
469 	u64 bytes;
470 };
471 
472 /**
473  * struct nfp_net_dp - NFP network device datapath data structure
474  * @dev:		Backpointer to struct device
475  * @netdev:		Backpointer to net_device structure
476  * @is_vf:		Is the driver attached to a VF?
477  * @chained_metadata_format:  Firemware will use new metadata format
478  * @ktls_tx:		Is kTLS TX enabled?
479  * @rx_dma_dir:		Mapping direction for RX buffers
480  * @rx_dma_off:		Offset at which DMA packets (for XDP headroom)
481  * @rx_offset:		Offset in the RX buffers where packet data starts
482  * @ctrl:		Local copy of the control register/word.
483  * @fl_bufsz:		Currently configured size of the freelist buffers
484  * @xdp_prog:		Installed XDP program
485  * @tx_rings:		Array of pre-allocated TX ring structures
486  * @rx_rings:		Array of pre-allocated RX ring structures
487  * @ctrl_bar:		Pointer to mapped control BAR
488  *
489  * @txd_cnt:		Size of the TX ring in number of descriptors
490  * @rxd_cnt:		Size of the RX ring in number of descriptors
491  * @num_r_vecs:		Number of used ring vectors
492  * @num_tx_rings:	Currently configured number of TX rings
493  * @num_stack_tx_rings:	Number of TX rings used by the stack (not XDP)
494  * @num_rx_rings:	Currently configured number of RX rings
495  * @mtu:		Device MTU
496  */
497 struct nfp_net_dp {
498 	struct device *dev;
499 	struct net_device *netdev;
500 
501 	u8 is_vf:1;
502 	u8 chained_metadata_format:1;
503 	u8 ktls_tx:1;
504 
505 	u8 rx_dma_dir;
506 	u8 rx_offset;
507 
508 	u32 rx_dma_off;
509 
510 	u32 ctrl;
511 	u32 fl_bufsz;
512 
513 	struct bpf_prog *xdp_prog;
514 
515 	struct nfp_net_tx_ring *tx_rings;
516 	struct nfp_net_rx_ring *rx_rings;
517 
518 	u8 __iomem *ctrl_bar;
519 
520 	/* Cold data follows */
521 
522 	unsigned int txd_cnt;
523 	unsigned int rxd_cnt;
524 
525 	unsigned int num_r_vecs;
526 
527 	unsigned int num_tx_rings;
528 	unsigned int num_stack_tx_rings;
529 	unsigned int num_rx_rings;
530 
531 	unsigned int mtu;
532 };
533 
534 /**
535  * struct nfp_net - NFP network device structure
536  * @dp:			Datapath structure
537  * @id:			vNIC id within the PF (0 for VFs)
538  * @fw_ver:		Firmware version
539  * @cap:                Capabilities advertised by the Firmware
540  * @max_mtu:            Maximum support MTU advertised by the Firmware
541  * @rss_hfunc:		RSS selected hash function
542  * @rss_cfg:            RSS configuration
543  * @rss_key:            RSS secret key
544  * @rss_itbl:           RSS indirection table
545  * @xdp:		Information about the driver XDP program
546  * @xdp_hw:		Information about the HW XDP program
547  * @max_r_vecs:		Number of allocated interrupt vectors for RX/TX
548  * @max_tx_rings:       Maximum number of TX rings supported by the Firmware
549  * @max_rx_rings:       Maximum number of RX rings supported by the Firmware
550  * @stride_rx:		Queue controller RX queue spacing
551  * @stride_tx:		Queue controller TX queue spacing
552  * @r_vecs:             Pre-allocated array of ring vectors
553  * @irq_entries:        Pre-allocated array of MSI-X entries
554  * @lsc_handler:        Handler for Link State Change interrupt
555  * @lsc_name:           Name for Link State Change interrupt
556  * @exn_handler:        Handler for Exception interrupt
557  * @exn_name:           Name for Exception interrupt
558  * @shared_handler:     Handler for shared interrupts
559  * @shared_name:        Name for shared interrupt
560  * @me_freq_mhz:        ME clock_freq (MHz)
561  * @reconfig_lock:	Protects @reconfig_posted, @reconfig_timer_active,
562  *			@reconfig_sync_present and HW reconfiguration request
563  *			regs/machinery from async requests (sync must take
564  *			@bar_lock)
565  * @reconfig_posted:	Pending reconfig bits coming from async sources
566  * @reconfig_timer_active:  Timer for reading reconfiguration results is pending
567  * @reconfig_sync_present:  Some thread is performing synchronous reconfig
568  * @reconfig_timer:	Timer for async reading of reconfig results
569  * @reconfig_in_progress_update:	Update FW is processing now (debug only)
570  * @bar_lock:		vNIC config BAR access lock, protects: update,
571  *			mailbox area, crypto TLV
572  * @link_up:            Is the link up?
573  * @link_status_lock:	Protects @link_* and ensures atomicity with BAR reading
574  * @rx_coalesce_usecs:      RX interrupt moderation usecs delay parameter
575  * @rx_coalesce_max_frames: RX interrupt moderation frame count parameter
576  * @tx_coalesce_usecs:      TX interrupt moderation usecs delay parameter
577  * @tx_coalesce_max_frames: TX interrupt moderation frame count parameter
578  * @vxlan_ports:	VXLAN ports for RX inner csum offload communicated to HW
579  * @vxlan_usecnt:	IPv4/IPv6 VXLAN port use counts
580  * @qcp_cfg:            Pointer to QCP queue used for configuration notification
581  * @tx_bar:             Pointer to mapped TX queues
582  * @rx_bar:             Pointer to mapped FL/RX queues
583  * @tlv_caps:		Parsed TLV capabilities
584  * @ktls_tx_conn_cnt:	Number of offloaded kTLS TX connections
585  * @ktls_rx_conn_cnt:	Number of offloaded kTLS RX connections
586  * @ktls_conn_id_gen:	Trivial generator for kTLS connection ids (for TX)
587  * @ktls_no_space:	Counter of firmware rejecting kTLS connection due to
588  *			lack of space
589  * @mbox_cmsg:		Common Control Message via vNIC mailbox state
590  * @mbox_cmsg.queue:	CCM mbox queue of pending messages
591  * @mbox_cmsg.wq:	CCM mbox wait queue of waiting processes
592  * @mbox_cmsg.workq:	CCM mbox work queue for @wait_work and @runq_work
593  * @mbox_cmsg.wait_work:    CCM mbox posted msg reconfig wait work
594  * @mbox_cmsg.runq_work:    CCM mbox posted msg queue runner work
595  * @mbox_cmsg.tag:	CCM mbox message tag allocator
596  * @debugfs_dir:	Device directory in debugfs
597  * @vnic_list:		Entry on device vNIC list
598  * @pdev:		Backpointer to PCI device
599  * @app:		APP handle if available
600  * @vnic_no_name:	For non-port PF vNIC make ndo_get_phys_port_name return
601  *			-EOPNOTSUPP to keep backwards compatibility (set by app)
602  * @port:		Pointer to nfp_port structure if vNIC is a port
603  * @app_priv:		APP private data for this vNIC
604  */
605 struct nfp_net {
606 	struct nfp_net_dp dp;
607 
608 	struct nfp_net_fw_version fw_ver;
609 
610 	u32 id;
611 
612 	u32 cap;
613 	u32 max_mtu;
614 
615 	u8 rss_hfunc;
616 	u32 rss_cfg;
617 	u8 rss_key[NFP_NET_CFG_RSS_KEY_SZ];
618 	u8 rss_itbl[NFP_NET_CFG_RSS_ITBL_SZ];
619 
620 	struct xdp_attachment_info xdp;
621 	struct xdp_attachment_info xdp_hw;
622 
623 	unsigned int max_tx_rings;
624 	unsigned int max_rx_rings;
625 
626 	int stride_tx;
627 	int stride_rx;
628 
629 	unsigned int max_r_vecs;
630 	struct nfp_net_r_vector r_vecs[NFP_NET_MAX_R_VECS];
631 	struct msix_entry irq_entries[NFP_NET_MAX_IRQS];
632 
633 	irq_handler_t lsc_handler;
634 	char lsc_name[IFNAMSIZ + 8];
635 
636 	irq_handler_t exn_handler;
637 	char exn_name[IFNAMSIZ + 8];
638 
639 	irq_handler_t shared_handler;
640 	char shared_name[IFNAMSIZ + 8];
641 
642 	u32 me_freq_mhz;
643 
644 	bool link_up;
645 	spinlock_t link_status_lock;
646 
647 	spinlock_t reconfig_lock;
648 	u32 reconfig_posted;
649 	bool reconfig_timer_active;
650 	bool reconfig_sync_present;
651 	struct timer_list reconfig_timer;
652 	u32 reconfig_in_progress_update;
653 
654 	struct semaphore bar_lock;
655 
656 	u32 rx_coalesce_usecs;
657 	u32 rx_coalesce_max_frames;
658 	u32 tx_coalesce_usecs;
659 	u32 tx_coalesce_max_frames;
660 
661 	__be16 vxlan_ports[NFP_NET_N_VXLAN_PORTS];
662 	u8 vxlan_usecnt[NFP_NET_N_VXLAN_PORTS];
663 
664 	u8 __iomem *qcp_cfg;
665 
666 	u8 __iomem *tx_bar;
667 	u8 __iomem *rx_bar;
668 
669 	struct nfp_net_tlv_caps tlv_caps;
670 
671 	unsigned int ktls_tx_conn_cnt;
672 	unsigned int ktls_rx_conn_cnt;
673 
674 	atomic64_t ktls_conn_id_gen;
675 
676 	atomic_t ktls_no_space;
677 
678 	struct {
679 		struct sk_buff_head queue;
680 		wait_queue_head_t wq;
681 		struct workqueue_struct *workq;
682 		struct work_struct wait_work;
683 		struct work_struct runq_work;
684 		u16 tag;
685 	} mbox_cmsg;
686 
687 	struct dentry *debugfs_dir;
688 
689 	struct list_head vnic_list;
690 
691 	struct pci_dev *pdev;
692 	struct nfp_app *app;
693 
694 	bool vnic_no_name;
695 
696 	struct nfp_port *port;
697 
698 	void *app_priv;
699 };
700 
701 /* Functions to read/write from/to a BAR
702  * Performs any endian conversion necessary.
703  */
704 static inline u16 nn_readb(struct nfp_net *nn, int off)
705 {
706 	return readb(nn->dp.ctrl_bar + off);
707 }
708 
709 static inline void nn_writeb(struct nfp_net *nn, int off, u8 val)
710 {
711 	writeb(val, nn->dp.ctrl_bar + off);
712 }
713 
714 static inline u16 nn_readw(struct nfp_net *nn, int off)
715 {
716 	return readw(nn->dp.ctrl_bar + off);
717 }
718 
719 static inline void nn_writew(struct nfp_net *nn, int off, u16 val)
720 {
721 	writew(val, nn->dp.ctrl_bar + off);
722 }
723 
724 static inline u32 nn_readl(struct nfp_net *nn, int off)
725 {
726 	return readl(nn->dp.ctrl_bar + off);
727 }
728 
729 static inline void nn_writel(struct nfp_net *nn, int off, u32 val)
730 {
731 	writel(val, nn->dp.ctrl_bar + off);
732 }
733 
734 static inline u64 nn_readq(struct nfp_net *nn, int off)
735 {
736 	return readq(nn->dp.ctrl_bar + off);
737 }
738 
739 static inline void nn_writeq(struct nfp_net *nn, int off, u64 val)
740 {
741 	writeq(val, nn->dp.ctrl_bar + off);
742 }
743 
744 /* Flush posted PCI writes by reading something without side effects */
745 static inline void nn_pci_flush(struct nfp_net *nn)
746 {
747 	nn_readl(nn, NFP_NET_CFG_VERSION);
748 }
749 
750 /* Queue Controller Peripheral access functions and definitions.
751  *
752  * Some of the BARs of the NFP are mapped to portions of the Queue
753  * Controller Peripheral (QCP) address space on the NFP.  A QCP queue
754  * has a read and a write pointer (as well as a size and flags,
755  * indicating overflow etc).  The QCP offers a number of different
756  * operation on queue pointers, but here we only offer function to
757  * either add to a pointer or to read the pointer value.
758  */
759 #define NFP_QCP_QUEUE_ADDR_SZ			0x800
760 #define NFP_QCP_QUEUE_AREA_SZ			0x80000
761 #define NFP_QCP_QUEUE_OFF(_x)			((_x) * NFP_QCP_QUEUE_ADDR_SZ)
762 #define NFP_QCP_QUEUE_ADD_RPTR			0x0000
763 #define NFP_QCP_QUEUE_ADD_WPTR			0x0004
764 #define NFP_QCP_QUEUE_STS_LO			0x0008
765 #define NFP_QCP_QUEUE_STS_LO_READPTR_mask	0x3ffff
766 #define NFP_QCP_QUEUE_STS_HI			0x000c
767 #define NFP_QCP_QUEUE_STS_HI_WRITEPTR_mask	0x3ffff
768 
769 /* The offset of a QCP queues in the PCIe Target */
770 #define NFP_PCIE_QUEUE(_q) (0x80000 + (NFP_QCP_QUEUE_ADDR_SZ * ((_q) & 0xff)))
771 
772 /* nfp_qcp_ptr - Read or Write Pointer of a queue */
773 enum nfp_qcp_ptr {
774 	NFP_QCP_READ_PTR = 0,
775 	NFP_QCP_WRITE_PTR
776 };
777 
778 /* There appear to be an *undocumented* upper limit on the value which
779  * one can add to a queue and that value is either 0x3f or 0x7f.  We
780  * go with 0x3f as a conservative measure.
781  */
782 #define NFP_QCP_MAX_ADD				0x3f
783 
784 static inline void _nfp_qcp_ptr_add(u8 __iomem *q,
785 				    enum nfp_qcp_ptr ptr, u32 val)
786 {
787 	u32 off;
788 
789 	if (ptr == NFP_QCP_READ_PTR)
790 		off = NFP_QCP_QUEUE_ADD_RPTR;
791 	else
792 		off = NFP_QCP_QUEUE_ADD_WPTR;
793 
794 	while (val > NFP_QCP_MAX_ADD) {
795 		writel(NFP_QCP_MAX_ADD, q + off);
796 		val -= NFP_QCP_MAX_ADD;
797 	}
798 
799 	writel(val, q + off);
800 }
801 
802 /**
803  * nfp_qcp_rd_ptr_add() - Add the value to the read pointer of a queue
804  *
805  * @q:   Base address for queue structure
806  * @val: Value to add to the queue pointer
807  *
808  * If @val is greater than @NFP_QCP_MAX_ADD multiple writes are performed.
809  */
810 static inline void nfp_qcp_rd_ptr_add(u8 __iomem *q, u32 val)
811 {
812 	_nfp_qcp_ptr_add(q, NFP_QCP_READ_PTR, val);
813 }
814 
815 /**
816  * nfp_qcp_wr_ptr_add() - Add the value to the write pointer of a queue
817  *
818  * @q:   Base address for queue structure
819  * @val: Value to add to the queue pointer
820  *
821  * If @val is greater than @NFP_QCP_MAX_ADD multiple writes are performed.
822  */
823 static inline void nfp_qcp_wr_ptr_add(u8 __iomem *q, u32 val)
824 {
825 	_nfp_qcp_ptr_add(q, NFP_QCP_WRITE_PTR, val);
826 }
827 
828 static inline u32 _nfp_qcp_read(u8 __iomem *q, enum nfp_qcp_ptr ptr)
829 {
830 	u32 off;
831 	u32 val;
832 
833 	if (ptr == NFP_QCP_READ_PTR)
834 		off = NFP_QCP_QUEUE_STS_LO;
835 	else
836 		off = NFP_QCP_QUEUE_STS_HI;
837 
838 	val = readl(q + off);
839 
840 	if (ptr == NFP_QCP_READ_PTR)
841 		return val & NFP_QCP_QUEUE_STS_LO_READPTR_mask;
842 	else
843 		return val & NFP_QCP_QUEUE_STS_HI_WRITEPTR_mask;
844 }
845 
846 /**
847  * nfp_qcp_rd_ptr_read() - Read the current read pointer value for a queue
848  * @q:  Base address for queue structure
849  *
850  * Return: Value read.
851  */
852 static inline u32 nfp_qcp_rd_ptr_read(u8 __iomem *q)
853 {
854 	return _nfp_qcp_read(q, NFP_QCP_READ_PTR);
855 }
856 
857 /**
858  * nfp_qcp_wr_ptr_read() - Read the current write pointer value for a queue
859  * @q:  Base address for queue structure
860  *
861  * Return: Value read.
862  */
863 static inline u32 nfp_qcp_wr_ptr_read(u8 __iomem *q)
864 {
865 	return _nfp_qcp_read(q, NFP_QCP_WRITE_PTR);
866 }
867 
868 static inline bool nfp_net_is_data_vnic(struct nfp_net *nn)
869 {
870 	WARN_ON_ONCE(!nn->dp.netdev && nn->port);
871 	return !!nn->dp.netdev;
872 }
873 
874 static inline bool nfp_net_running(struct nfp_net *nn)
875 {
876 	return nn->dp.ctrl & NFP_NET_CFG_CTRL_ENABLE;
877 }
878 
879 static inline const char *nfp_net_name(struct nfp_net *nn)
880 {
881 	return nn->dp.netdev ? nn->dp.netdev->name : "ctrl";
882 }
883 
884 static inline void nfp_ctrl_lock(struct nfp_net *nn)
885 	__acquires(&nn->r_vecs[0].lock)
886 {
887 	spin_lock_bh(&nn->r_vecs[0].lock);
888 }
889 
890 static inline void nfp_ctrl_unlock(struct nfp_net *nn)
891 	__releases(&nn->r_vecs[0].lock)
892 {
893 	spin_unlock_bh(&nn->r_vecs[0].lock);
894 }
895 
896 static inline void nn_ctrl_bar_lock(struct nfp_net *nn)
897 {
898 	down(&nn->bar_lock);
899 }
900 
901 static inline bool nn_ctrl_bar_trylock(struct nfp_net *nn)
902 {
903 	return !down_trylock(&nn->bar_lock);
904 }
905 
906 static inline void nn_ctrl_bar_unlock(struct nfp_net *nn)
907 {
908 	up(&nn->bar_lock);
909 }
910 
911 /* Globals */
912 extern const char nfp_driver_version[];
913 
914 extern const struct net_device_ops nfp_net_netdev_ops;
915 
916 static inline bool nfp_netdev_is_nfp_net(struct net_device *netdev)
917 {
918 	return netdev->netdev_ops == &nfp_net_netdev_ops;
919 }
920 
921 /* Prototypes */
922 void nfp_net_get_fw_version(struct nfp_net_fw_version *fw_ver,
923 			    void __iomem *ctrl_bar);
924 
925 struct nfp_net *
926 nfp_net_alloc(struct pci_dev *pdev, void __iomem *ctrl_bar, bool needs_netdev,
927 	      unsigned int max_tx_rings, unsigned int max_rx_rings);
928 void nfp_net_free(struct nfp_net *nn);
929 
930 int nfp_net_init(struct nfp_net *nn);
931 void nfp_net_clean(struct nfp_net *nn);
932 
933 int nfp_ctrl_open(struct nfp_net *nn);
934 void nfp_ctrl_close(struct nfp_net *nn);
935 
936 void nfp_net_set_ethtool_ops(struct net_device *netdev);
937 void nfp_net_info(struct nfp_net *nn);
938 int __nfp_net_reconfig(struct nfp_net *nn, u32 update);
939 int nfp_net_reconfig(struct nfp_net *nn, u32 update);
940 unsigned int nfp_net_rss_key_sz(struct nfp_net *nn);
941 void nfp_net_rss_write_itbl(struct nfp_net *nn);
942 void nfp_net_rss_write_key(struct nfp_net *nn);
943 void nfp_net_coalesce_write_cfg(struct nfp_net *nn);
944 int nfp_net_mbox_lock(struct nfp_net *nn, unsigned int data_size);
945 int nfp_net_mbox_reconfig(struct nfp_net *nn, u32 mbox_cmd);
946 int nfp_net_mbox_reconfig_and_unlock(struct nfp_net *nn, u32 mbox_cmd);
947 void nfp_net_mbox_reconfig_post(struct nfp_net *nn, u32 update);
948 int nfp_net_mbox_reconfig_wait_posted(struct nfp_net *nn);
949 
950 unsigned int
951 nfp_net_irqs_alloc(struct pci_dev *pdev, struct msix_entry *irq_entries,
952 		   unsigned int min_irqs, unsigned int want_irqs);
953 void nfp_net_irqs_disable(struct pci_dev *pdev);
954 void
955 nfp_net_irqs_assign(struct nfp_net *nn, struct msix_entry *irq_entries,
956 		    unsigned int n);
957 
958 struct nfp_net_dp *nfp_net_clone_dp(struct nfp_net *nn);
959 int nfp_net_ring_reconfig(struct nfp_net *nn, struct nfp_net_dp *new,
960 			  struct netlink_ext_ack *extack);
961 
962 #ifdef CONFIG_NFP_DEBUG
963 void nfp_net_debugfs_create(void);
964 void nfp_net_debugfs_destroy(void);
965 struct dentry *nfp_net_debugfs_device_add(struct pci_dev *pdev);
966 void nfp_net_debugfs_vnic_add(struct nfp_net *nn, struct dentry *ddir);
967 void nfp_net_debugfs_dir_clean(struct dentry **dir);
968 #else
969 static inline void nfp_net_debugfs_create(void)
970 {
971 }
972 
973 static inline void nfp_net_debugfs_destroy(void)
974 {
975 }
976 
977 static inline struct dentry *nfp_net_debugfs_device_add(struct pci_dev *pdev)
978 {
979 	return NULL;
980 }
981 
982 static inline void
983 nfp_net_debugfs_vnic_add(struct nfp_net *nn, struct dentry *ddir)
984 {
985 }
986 
987 static inline void nfp_net_debugfs_dir_clean(struct dentry **dir)
988 {
989 }
990 #endif /* CONFIG_NFP_DEBUG */
991 
992 #endif /* _NFP_NET_H_ */
993