1 /* 2 * Copyright (C) 2015-2017 Netronome Systems, Inc. 3 * 4 * This software is dual licensed under the GNU General License Version 2, 5 * June 1991 as shown in the file COPYING in the top-level directory of this 6 * source tree or the BSD 2-Clause License provided below. You have the 7 * option to license this software under the complete terms of either license. 8 * 9 * The BSD 2-Clause License: 10 * 11 * Redistribution and use in source and binary forms, with or 12 * without modification, are permitted provided that the following 13 * conditions are met: 14 * 15 * 1. Redistributions of source code must retain the above 16 * copyright notice, this list of conditions and the following 17 * disclaimer. 18 * 19 * 2. Redistributions in binary form must reproduce the above 20 * copyright notice, this list of conditions and the following 21 * disclaimer in the documentation and/or other materials 22 * provided with the distribution. 23 * 24 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, 25 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF 26 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND 27 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS 28 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN 29 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN 30 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE 31 * SOFTWARE. 32 */ 33 34 /* 35 * nfp_net.h 36 * Declarations for Netronome network device driver. 37 * Authors: Jakub Kicinski <jakub.kicinski@netronome.com> 38 * Jason McMullan <jason.mcmullan@netronome.com> 39 * Rolf Neugebauer <rolf.neugebauer@netronome.com> 40 */ 41 42 #ifndef _NFP_NET_H_ 43 #define _NFP_NET_H_ 44 45 #include <linux/interrupt.h> 46 #include <linux/list.h> 47 #include <linux/netdevice.h> 48 #include <linux/pci.h> 49 #include <linux/io-64-nonatomic-hi-lo.h> 50 51 #include "nfp_net_ctrl.h" 52 53 #define nn_err(nn, fmt, args...) netdev_err((nn)->dp.netdev, fmt, ## args) 54 #define nn_warn(nn, fmt, args...) netdev_warn((nn)->dp.netdev, fmt, ## args) 55 #define nn_info(nn, fmt, args...) netdev_info((nn)->dp.netdev, fmt, ## args) 56 #define nn_dbg(nn, fmt, args...) netdev_dbg((nn)->dp.netdev, fmt, ## args) 57 #define nn_dp_warn(dp, fmt, args...) \ 58 do { \ 59 if (unlikely(net_ratelimit())) \ 60 netdev_warn((dp)->netdev, fmt, ## args); \ 61 } while (0) 62 63 /* Max time to wait for NFP to respond on updates (in seconds) */ 64 #define NFP_NET_POLL_TIMEOUT 5 65 66 /* Interval for reading offloaded filter stats */ 67 #define NFP_NET_STAT_POLL_IVL msecs_to_jiffies(100) 68 69 /* Bar allocation */ 70 #define NFP_NET_CTRL_BAR 0 71 #define NFP_NET_Q0_BAR 2 72 #define NFP_NET_Q1_BAR 4 /* OBSOLETE */ 73 74 /* Max bits in DMA address */ 75 #define NFP_NET_MAX_DMA_BITS 40 76 77 /* Default size for MTU and freelist buffer sizes */ 78 #define NFP_NET_DEFAULT_MTU 1500 79 80 /* Maximum number of bytes prepended to a packet */ 81 #define NFP_NET_MAX_PREPEND 64 82 83 /* Interrupt definitions */ 84 #define NFP_NET_NON_Q_VECTORS 2 85 #define NFP_NET_IRQ_LSC_IDX 0 86 #define NFP_NET_IRQ_EXN_IDX 1 87 #define NFP_NET_MIN_PORT_IRQS (NFP_NET_NON_Q_VECTORS + 1) 88 89 /* Queue/Ring definitions */ 90 #define NFP_NET_MAX_TX_RINGS 64 /* Max. # of Tx rings per device */ 91 #define NFP_NET_MAX_RX_RINGS 64 /* Max. # of Rx rings per device */ 92 #define NFP_NET_MAX_R_VECS (NFP_NET_MAX_TX_RINGS > NFP_NET_MAX_RX_RINGS ? \ 93 NFP_NET_MAX_TX_RINGS : NFP_NET_MAX_RX_RINGS) 94 #define NFP_NET_MAX_IRQS (NFP_NET_NON_Q_VECTORS + NFP_NET_MAX_R_VECS) 95 96 #define NFP_NET_MIN_TX_DESCS 256 /* Min. # of Tx descs per ring */ 97 #define NFP_NET_MIN_RX_DESCS 256 /* Min. # of Rx descs per ring */ 98 #define NFP_NET_MAX_TX_DESCS (256 * 1024) /* Max. # of Tx descs per ring */ 99 #define NFP_NET_MAX_RX_DESCS (256 * 1024) /* Max. # of Rx descs per ring */ 100 101 #define NFP_NET_TX_DESCS_DEFAULT 4096 /* Default # of Tx descs per ring */ 102 #define NFP_NET_RX_DESCS_DEFAULT 4096 /* Default # of Rx descs per ring */ 103 104 #define NFP_NET_FL_BATCH 16 /* Add freelist in this Batch size */ 105 106 /* Offload definitions */ 107 #define NFP_NET_N_VXLAN_PORTS (NFP_NET_CFG_VXLAN_SZ / sizeof(__be16)) 108 109 #define NFP_NET_RX_BUF_HEADROOM (NET_SKB_PAD + NET_IP_ALIGN) 110 #define NFP_NET_RX_BUF_NON_DATA (NFP_NET_RX_BUF_HEADROOM + \ 111 SKB_DATA_ALIGN(sizeof(struct skb_shared_info))) 112 113 /* Forward declarations */ 114 struct nfp_cpp; 115 struct nfp_eth_table_port; 116 struct nfp_net; 117 struct nfp_net_r_vector; 118 119 /* Convenience macro for writing dma address into RX/TX descriptors */ 120 #define nfp_desc_set_dma_addr(desc, dma_addr) \ 121 do { \ 122 __typeof(desc) __d = (desc); \ 123 dma_addr_t __addr = (dma_addr); \ 124 \ 125 __d->dma_addr_lo = cpu_to_le32(lower_32_bits(__addr)); \ 126 __d->dma_addr_hi = upper_32_bits(__addr) & 0xff; \ 127 } while (0) 128 129 /* TX descriptor format */ 130 131 #define PCIE_DESC_TX_EOP BIT(7) 132 #define PCIE_DESC_TX_OFFSET_MASK GENMASK(6, 0) 133 #define PCIE_DESC_TX_MSS_MASK GENMASK(13, 0) 134 135 /* Flags in the host TX descriptor */ 136 #define PCIE_DESC_TX_CSUM BIT(7) 137 #define PCIE_DESC_TX_IP4_CSUM BIT(6) 138 #define PCIE_DESC_TX_TCP_CSUM BIT(5) 139 #define PCIE_DESC_TX_UDP_CSUM BIT(4) 140 #define PCIE_DESC_TX_VLAN BIT(3) 141 #define PCIE_DESC_TX_LSO BIT(2) 142 #define PCIE_DESC_TX_ENCAP BIT(1) 143 #define PCIE_DESC_TX_O_IP4_CSUM BIT(0) 144 145 struct nfp_net_tx_desc { 146 union { 147 struct { 148 u8 dma_addr_hi; /* High bits of host buf address */ 149 __le16 dma_len; /* Length to DMA for this desc */ 150 u8 offset_eop; /* Offset in buf where pkt starts + 151 * highest bit is eop flag. 152 */ 153 __le32 dma_addr_lo; /* Low 32bit of host buf addr */ 154 155 __le16 mss; /* MSS to be used for LSO */ 156 u8 l4_offset; /* LSO, where the L4 data starts */ 157 u8 flags; /* TX Flags, see @PCIE_DESC_TX_* */ 158 159 __le16 vlan; /* VLAN tag to add if indicated */ 160 __le16 data_len; /* Length of frame + meta data */ 161 } __packed; 162 __le32 vals[4]; 163 }; 164 }; 165 166 /** 167 * struct nfp_net_tx_buf - software TX buffer descriptor 168 * @skb: sk_buff associated with this buffer 169 * @dma_addr: DMA mapping address of the buffer 170 * @fidx: Fragment index (-1 for the head and [0..nr_frags-1] for frags) 171 * @pkt_cnt: Number of packets to be produced out of the skb associated 172 * with this buffer (valid only on the head's buffer). 173 * Will be 1 for all non-TSO packets. 174 * @real_len: Number of bytes which to be produced out of the skb (valid only 175 * on the head's buffer). Equal to skb->len for non-TSO packets. 176 */ 177 struct nfp_net_tx_buf { 178 union { 179 struct sk_buff *skb; 180 void *frag; 181 }; 182 dma_addr_t dma_addr; 183 short int fidx; 184 u16 pkt_cnt; 185 u32 real_len; 186 }; 187 188 /** 189 * struct nfp_net_tx_ring - TX ring structure 190 * @r_vec: Back pointer to ring vector structure 191 * @idx: Ring index from Linux's perspective 192 * @qcidx: Queue Controller Peripheral (QCP) queue index for the TX queue 193 * @qcp_q: Pointer to base of the QCP TX queue 194 * @cnt: Size of the queue in number of descriptors 195 * @wr_p: TX ring write pointer (free running) 196 * @rd_p: TX ring read pointer (free running) 197 * @qcp_rd_p: Local copy of QCP TX queue read pointer 198 * @wr_ptr_add: Accumulated number of buffers to add to QCP write pointer 199 * (used for .xmit_more delayed kick) 200 * @txbufs: Array of transmitted TX buffers, to free on transmit 201 * @txds: Virtual address of TX ring in host memory 202 * @dma: DMA address of the TX ring 203 * @size: Size, in bytes, of the TX ring (needed to free) 204 */ 205 struct nfp_net_tx_ring { 206 struct nfp_net_r_vector *r_vec; 207 208 u32 idx; 209 int qcidx; 210 u8 __iomem *qcp_q; 211 212 u32 cnt; 213 u32 wr_p; 214 u32 rd_p; 215 u32 qcp_rd_p; 216 217 u32 wr_ptr_add; 218 219 struct nfp_net_tx_buf *txbufs; 220 struct nfp_net_tx_desc *txds; 221 222 dma_addr_t dma; 223 unsigned int size; 224 } ____cacheline_aligned; 225 226 /* RX and freelist descriptor format */ 227 228 #define PCIE_DESC_RX_DD BIT(7) 229 #define PCIE_DESC_RX_META_LEN_MASK GENMASK(6, 0) 230 231 /* Flags in the RX descriptor */ 232 #define PCIE_DESC_RX_RSS cpu_to_le16(BIT(15)) 233 #define PCIE_DESC_RX_I_IP4_CSUM cpu_to_le16(BIT(14)) 234 #define PCIE_DESC_RX_I_IP4_CSUM_OK cpu_to_le16(BIT(13)) 235 #define PCIE_DESC_RX_I_TCP_CSUM cpu_to_le16(BIT(12)) 236 #define PCIE_DESC_RX_I_TCP_CSUM_OK cpu_to_le16(BIT(11)) 237 #define PCIE_DESC_RX_I_UDP_CSUM cpu_to_le16(BIT(10)) 238 #define PCIE_DESC_RX_I_UDP_CSUM_OK cpu_to_le16(BIT(9)) 239 #define PCIE_DESC_RX_BPF cpu_to_le16(BIT(8)) 240 #define PCIE_DESC_RX_EOP cpu_to_le16(BIT(7)) 241 #define PCIE_DESC_RX_IP4_CSUM cpu_to_le16(BIT(6)) 242 #define PCIE_DESC_RX_IP4_CSUM_OK cpu_to_le16(BIT(5)) 243 #define PCIE_DESC_RX_TCP_CSUM cpu_to_le16(BIT(4)) 244 #define PCIE_DESC_RX_TCP_CSUM_OK cpu_to_le16(BIT(3)) 245 #define PCIE_DESC_RX_UDP_CSUM cpu_to_le16(BIT(2)) 246 #define PCIE_DESC_RX_UDP_CSUM_OK cpu_to_le16(BIT(1)) 247 #define PCIE_DESC_RX_VLAN cpu_to_le16(BIT(0)) 248 249 #define PCIE_DESC_RX_CSUM_ALL (PCIE_DESC_RX_IP4_CSUM | \ 250 PCIE_DESC_RX_TCP_CSUM | \ 251 PCIE_DESC_RX_UDP_CSUM | \ 252 PCIE_DESC_RX_I_IP4_CSUM | \ 253 PCIE_DESC_RX_I_TCP_CSUM | \ 254 PCIE_DESC_RX_I_UDP_CSUM) 255 #define PCIE_DESC_RX_CSUM_OK_SHIFT 1 256 #define __PCIE_DESC_RX_CSUM_ALL le16_to_cpu(PCIE_DESC_RX_CSUM_ALL) 257 #define __PCIE_DESC_RX_CSUM_ALL_OK (__PCIE_DESC_RX_CSUM_ALL >> \ 258 PCIE_DESC_RX_CSUM_OK_SHIFT) 259 260 struct nfp_net_rx_desc { 261 union { 262 struct { 263 u8 dma_addr_hi; /* High bits of the buf address */ 264 __le16 reserved; /* Must be zero */ 265 u8 meta_len_dd; /* Must be zero */ 266 267 __le32 dma_addr_lo; /* Low bits of the buffer address */ 268 } __packed fld; 269 270 struct { 271 __le16 data_len; /* Length of the frame + meta data */ 272 u8 reserved; 273 u8 meta_len_dd; /* Length of meta data prepended + 274 * descriptor done flag. 275 */ 276 277 __le16 flags; /* RX flags. See @PCIE_DESC_RX_* */ 278 __le16 vlan; /* VLAN if stripped */ 279 } __packed rxd; 280 281 __le32 vals[2]; 282 }; 283 }; 284 285 #define NFP_NET_META_FIELD_MASK GENMASK(NFP_NET_META_FIELD_SIZE - 1, 0) 286 287 struct nfp_net_rx_hash { 288 __be32 hash_type; 289 __be32 hash; 290 }; 291 292 /** 293 * struct nfp_net_rx_buf - software RX buffer descriptor 294 * @frag: page fragment buffer 295 * @dma_addr: DMA mapping address of the buffer 296 */ 297 struct nfp_net_rx_buf { 298 void *frag; 299 dma_addr_t dma_addr; 300 }; 301 302 /** 303 * struct nfp_net_rx_ring - RX ring structure 304 * @r_vec: Back pointer to ring vector structure 305 * @cnt: Size of the queue in number of descriptors 306 * @wr_p: FL/RX ring write pointer (free running) 307 * @rd_p: FL/RX ring read pointer (free running) 308 * @idx: Ring index from Linux's perspective 309 * @fl_qcidx: Queue Controller Peripheral (QCP) queue index for the freelist 310 * @qcp_fl: Pointer to base of the QCP freelist queue 311 * @wr_ptr_add: Accumulated number of buffers to add to QCP write pointer 312 * (used for free list batching) 313 * @rxbufs: Array of transmitted FL/RX buffers 314 * @rxds: Virtual address of FL/RX ring in host memory 315 * @dma: DMA address of the FL/RX ring 316 * @size: Size, in bytes, of the FL/RX ring (needed to free) 317 */ 318 struct nfp_net_rx_ring { 319 struct nfp_net_r_vector *r_vec; 320 321 u32 cnt; 322 u32 wr_p; 323 u32 rd_p; 324 325 u32 idx; 326 u32 wr_ptr_add; 327 328 int fl_qcidx; 329 u8 __iomem *qcp_fl; 330 331 struct nfp_net_rx_buf *rxbufs; 332 struct nfp_net_rx_desc *rxds; 333 334 dma_addr_t dma; 335 unsigned int size; 336 } ____cacheline_aligned; 337 338 /** 339 * struct nfp_net_r_vector - Per ring interrupt vector configuration 340 * @nfp_net: Backpointer to nfp_net structure 341 * @napi: NAPI structure for this ring vec 342 * @tx_ring: Pointer to TX ring 343 * @rx_ring: Pointer to RX ring 344 * @xdp_ring: Pointer to an extra TX ring for XDP 345 * @irq_entry: MSI-X table entry (use for talking to the device) 346 * @rx_sync: Seqlock for atomic updates of RX stats 347 * @rx_pkts: Number of received packets 348 * @rx_bytes: Number of received bytes 349 * @rx_drops: Number of packets dropped on RX due to lack of resources 350 * @hw_csum_rx_ok: Counter of packets where the HW checksum was OK 351 * @hw_csum_rx_inner_ok: Counter of packets where the inner HW checksum was OK 352 * @hw_csum_rx_error: Counter of packets with bad checksums 353 * @tx_sync: Seqlock for atomic updates of TX stats 354 * @tx_pkts: Number of Transmitted packets 355 * @tx_bytes: Number of Transmitted bytes 356 * @hw_csum_tx: Counter of packets with TX checksum offload requested 357 * @hw_csum_tx_inner: Counter of inner TX checksum offload requests 358 * @tx_gather: Counter of packets with Gather DMA 359 * @tx_lso: Counter of LSO packets sent 360 * @tx_errors: How many TX errors were encountered 361 * @tx_busy: How often was TX busy (no space)? 362 * @irq_vector: Interrupt vector number (use for talking to the OS) 363 * @handler: Interrupt handler for this ring vector 364 * @name: Name of the interrupt vector 365 * @affinity_mask: SMP affinity mask for this vector 366 * 367 * This structure ties RX and TX rings to interrupt vectors and a NAPI 368 * context. This currently only supports one RX and TX ring per 369 * interrupt vector but might be extended in the future to allow 370 * association of multiple rings per vector. 371 */ 372 struct nfp_net_r_vector { 373 struct nfp_net *nfp_net; 374 struct napi_struct napi; 375 376 struct nfp_net_tx_ring *tx_ring; 377 struct nfp_net_rx_ring *rx_ring; 378 379 u16 irq_entry; 380 381 struct u64_stats_sync rx_sync; 382 u64 rx_pkts; 383 u64 rx_bytes; 384 u64 rx_drops; 385 u64 hw_csum_rx_ok; 386 u64 hw_csum_rx_inner_ok; 387 u64 hw_csum_rx_error; 388 389 struct nfp_net_tx_ring *xdp_ring; 390 391 struct u64_stats_sync tx_sync; 392 u64 tx_pkts; 393 u64 tx_bytes; 394 u64 hw_csum_tx; 395 u64 hw_csum_tx_inner; 396 u64 tx_gather; 397 u64 tx_lso; 398 u64 tx_errors; 399 u64 tx_busy; 400 401 u32 irq_vector; 402 irq_handler_t handler; 403 char name[IFNAMSIZ + 8]; 404 cpumask_t affinity_mask; 405 } ____cacheline_aligned; 406 407 /* Firmware version as it is written in the 32bit value in the BAR */ 408 struct nfp_net_fw_version { 409 u8 minor; 410 u8 major; 411 u8 class; 412 u8 resv; 413 } __packed; 414 415 static inline bool nfp_net_fw_ver_eq(struct nfp_net_fw_version *fw_ver, 416 u8 resv, u8 class, u8 major, u8 minor) 417 { 418 return fw_ver->resv == resv && 419 fw_ver->class == class && 420 fw_ver->major == major && 421 fw_ver->minor == minor; 422 } 423 424 struct nfp_stat_pair { 425 u64 pkts; 426 u64 bytes; 427 }; 428 429 /** 430 * struct nfp_net_dp - NFP network device datapath data structure 431 * @dev: Backpointer to struct device 432 * @netdev: Backpointer to net_device structure 433 * @is_vf: Is the driver attached to a VF? 434 * @bpf_offload_skip_sw: Offloaded BPF program will not be rerun by cls_bpf 435 * @bpf_offload_xdp: Offloaded BPF program is XDP 436 * @chained_metadata_format: Firemware will use new metadata format 437 * @rx_dma_dir: Mapping direction for RX buffers 438 * @rx_dma_off: Offset at which DMA packets (for XDP headroom) 439 * @rx_offset: Offset in the RX buffers where packet data starts 440 * @ctrl: Local copy of the control register/word. 441 * @fl_bufsz: Currently configured size of the freelist buffers 442 * @xdp_prog: Installed XDP program 443 * @tx_rings: Array of pre-allocated TX ring structures 444 * @rx_rings: Array of pre-allocated RX ring structures 445 * @ctrl_bar: Pointer to mapped control BAR 446 * 447 * @txd_cnt: Size of the TX ring in number of descriptors 448 * @rxd_cnt: Size of the RX ring in number of descriptors 449 * @num_r_vecs: Number of used ring vectors 450 * @num_tx_rings: Currently configured number of TX rings 451 * @num_stack_tx_rings: Number of TX rings used by the stack (not XDP) 452 * @num_rx_rings: Currently configured number of RX rings 453 * @mtu: Device MTU 454 */ 455 struct nfp_net_dp { 456 struct device *dev; 457 struct net_device *netdev; 458 459 u8 is_vf:1; 460 u8 bpf_offload_skip_sw:1; 461 u8 bpf_offload_xdp:1; 462 u8 chained_metadata_format:1; 463 464 u8 rx_dma_dir; 465 u8 rx_dma_off; 466 467 u8 rx_offset; 468 469 u32 ctrl; 470 u32 fl_bufsz; 471 472 struct bpf_prog *xdp_prog; 473 474 struct nfp_net_tx_ring *tx_rings; 475 struct nfp_net_rx_ring *rx_rings; 476 477 u8 __iomem *ctrl_bar; 478 479 /* Cold data follows */ 480 481 unsigned int txd_cnt; 482 unsigned int rxd_cnt; 483 484 unsigned int num_r_vecs; 485 486 unsigned int num_tx_rings; 487 unsigned int num_stack_tx_rings; 488 unsigned int num_rx_rings; 489 490 unsigned int mtu; 491 }; 492 493 /** 494 * struct nfp_net - NFP network device structure 495 * @dp: Datapath structure 496 * @fw_ver: Firmware version 497 * @cap: Capabilities advertised by the Firmware 498 * @max_mtu: Maximum support MTU advertised by the Firmware 499 * @rss_hfunc: RSS selected hash function 500 * @rss_cfg: RSS configuration 501 * @rss_key: RSS secret key 502 * @rss_itbl: RSS indirection table 503 * @rx_filter: Filter offload statistics - dropped packets/bytes 504 * @rx_filter_prev: Filter offload statistics - values from previous update 505 * @rx_filter_change: Jiffies when statistics last changed 506 * @rx_filter_stats_timer: Timer for polling filter offload statistics 507 * @rx_filter_lock: Lock protecting timer state changes (teardown) 508 * @max_r_vecs: Number of allocated interrupt vectors for RX/TX 509 * @max_tx_rings: Maximum number of TX rings supported by the Firmware 510 * @max_rx_rings: Maximum number of RX rings supported by the Firmware 511 * @r_vecs: Pre-allocated array of ring vectors 512 * @irq_entries: Pre-allocated array of MSI-X entries 513 * @lsc_handler: Handler for Link State Change interrupt 514 * @lsc_name: Name for Link State Change interrupt 515 * @exn_handler: Handler for Exception interrupt 516 * @exn_name: Name for Exception interrupt 517 * @shared_handler: Handler for shared interrupts 518 * @shared_name: Name for shared interrupt 519 * @me_freq_mhz: ME clock_freq (MHz) 520 * @reconfig_lock: Protects HW reconfiguration request regs/machinery 521 * @reconfig_posted: Pending reconfig bits coming from async sources 522 * @reconfig_timer_active: Timer for reading reconfiguration results is pending 523 * @reconfig_sync_present: Some thread is performing synchronous reconfig 524 * @reconfig_timer: Timer for async reading of reconfig results 525 * @link_up: Is the link up? 526 * @link_changed: Has link state changes since last port refresh? 527 * @link_status_lock: Protects @link_* and ensures atomicity with BAR reading 528 * @rx_coalesce_usecs: RX interrupt moderation usecs delay parameter 529 * @rx_coalesce_max_frames: RX interrupt moderation frame count parameter 530 * @tx_coalesce_usecs: TX interrupt moderation usecs delay parameter 531 * @tx_coalesce_max_frames: TX interrupt moderation frame count parameter 532 * @vxlan_ports: VXLAN ports for RX inner csum offload communicated to HW 533 * @vxlan_usecnt: IPv4/IPv6 VXLAN port use counts 534 * @qcp_cfg: Pointer to QCP queue used for configuration notification 535 * @tx_bar: Pointer to mapped TX queues 536 * @rx_bar: Pointer to mapped FL/RX queues 537 * @debugfs_dir: Device directory in debugfs 538 * @ethtool_dump_flag: Ethtool dump flag 539 * @port_list: Entry on device port list 540 * @pdev: Backpointer to PCI device 541 * @cpp: CPP device handle if available 542 * @eth_port: Translated ETH Table port entry 543 */ 544 struct nfp_net { 545 struct nfp_net_dp dp; 546 547 struct nfp_net_fw_version fw_ver; 548 549 u32 cap; 550 u32 max_mtu; 551 552 u8 rss_hfunc; 553 u32 rss_cfg; 554 u8 rss_key[NFP_NET_CFG_RSS_KEY_SZ]; 555 u8 rss_itbl[NFP_NET_CFG_RSS_ITBL_SZ]; 556 557 struct nfp_stat_pair rx_filter, rx_filter_prev; 558 unsigned long rx_filter_change; 559 struct timer_list rx_filter_stats_timer; 560 spinlock_t rx_filter_lock; 561 562 unsigned int max_tx_rings; 563 unsigned int max_rx_rings; 564 565 int stride_tx; 566 int stride_rx; 567 568 unsigned int max_r_vecs; 569 struct nfp_net_r_vector r_vecs[NFP_NET_MAX_R_VECS]; 570 struct msix_entry irq_entries[NFP_NET_MAX_IRQS]; 571 572 irq_handler_t lsc_handler; 573 char lsc_name[IFNAMSIZ + 8]; 574 575 irq_handler_t exn_handler; 576 char exn_name[IFNAMSIZ + 8]; 577 578 irq_handler_t shared_handler; 579 char shared_name[IFNAMSIZ + 8]; 580 581 u32 me_freq_mhz; 582 583 bool link_up; 584 bool link_changed; 585 spinlock_t link_status_lock; 586 587 spinlock_t reconfig_lock; 588 u32 reconfig_posted; 589 bool reconfig_timer_active; 590 bool reconfig_sync_present; 591 struct timer_list reconfig_timer; 592 593 u32 rx_coalesce_usecs; 594 u32 rx_coalesce_max_frames; 595 u32 tx_coalesce_usecs; 596 u32 tx_coalesce_max_frames; 597 598 __be16 vxlan_ports[NFP_NET_N_VXLAN_PORTS]; 599 u8 vxlan_usecnt[NFP_NET_N_VXLAN_PORTS]; 600 601 u8 __iomem *qcp_cfg; 602 603 u8 __iomem *tx_bar; 604 u8 __iomem *rx_bar; 605 606 struct dentry *debugfs_dir; 607 u32 ethtool_dump_flag; 608 609 struct list_head port_list; 610 611 struct pci_dev *pdev; 612 struct nfp_cpp *cpp; 613 614 struct nfp_eth_table_port *eth_port; 615 }; 616 617 /* Functions to read/write from/to a BAR 618 * Performs any endian conversion necessary. 619 */ 620 static inline u16 nn_readb(struct nfp_net *nn, int off) 621 { 622 return readb(nn->dp.ctrl_bar + off); 623 } 624 625 static inline void nn_writeb(struct nfp_net *nn, int off, u8 val) 626 { 627 writeb(val, nn->dp.ctrl_bar + off); 628 } 629 630 static inline u16 nn_readw(struct nfp_net *nn, int off) 631 { 632 return readw(nn->dp.ctrl_bar + off); 633 } 634 635 static inline void nn_writew(struct nfp_net *nn, int off, u16 val) 636 { 637 writew(val, nn->dp.ctrl_bar + off); 638 } 639 640 static inline u32 nn_readl(struct nfp_net *nn, int off) 641 { 642 return readl(nn->dp.ctrl_bar + off); 643 } 644 645 static inline void nn_writel(struct nfp_net *nn, int off, u32 val) 646 { 647 writel(val, nn->dp.ctrl_bar + off); 648 } 649 650 static inline u64 nn_readq(struct nfp_net *nn, int off) 651 { 652 return readq(nn->dp.ctrl_bar + off); 653 } 654 655 static inline void nn_writeq(struct nfp_net *nn, int off, u64 val) 656 { 657 writeq(val, nn->dp.ctrl_bar + off); 658 } 659 660 /* Flush posted PCI writes by reading something without side effects */ 661 static inline void nn_pci_flush(struct nfp_net *nn) 662 { 663 nn_readl(nn, NFP_NET_CFG_VERSION); 664 } 665 666 /* Queue Controller Peripheral access functions and definitions. 667 * 668 * Some of the BARs of the NFP are mapped to portions of the Queue 669 * Controller Peripheral (QCP) address space on the NFP. A QCP queue 670 * has a read and a write pointer (as well as a size and flags, 671 * indicating overflow etc). The QCP offers a number of different 672 * operation on queue pointers, but here we only offer function to 673 * either add to a pointer or to read the pointer value. 674 */ 675 #define NFP_QCP_QUEUE_ADDR_SZ 0x800 676 #define NFP_QCP_QUEUE_OFF(_x) ((_x) * NFP_QCP_QUEUE_ADDR_SZ) 677 #define NFP_QCP_QUEUE_ADD_RPTR 0x0000 678 #define NFP_QCP_QUEUE_ADD_WPTR 0x0004 679 #define NFP_QCP_QUEUE_STS_LO 0x0008 680 #define NFP_QCP_QUEUE_STS_LO_READPTR_mask 0x3ffff 681 #define NFP_QCP_QUEUE_STS_HI 0x000c 682 #define NFP_QCP_QUEUE_STS_HI_WRITEPTR_mask 0x3ffff 683 684 /* The offset of a QCP queues in the PCIe Target */ 685 #define NFP_PCIE_QUEUE(_q) (0x80000 + (NFP_QCP_QUEUE_ADDR_SZ * ((_q) & 0xff))) 686 687 /* nfp_qcp_ptr - Read or Write Pointer of a queue */ 688 enum nfp_qcp_ptr { 689 NFP_QCP_READ_PTR = 0, 690 NFP_QCP_WRITE_PTR 691 }; 692 693 /* There appear to be an *undocumented* upper limit on the value which 694 * one can add to a queue and that value is either 0x3f or 0x7f. We 695 * go with 0x3f as a conservative measure. 696 */ 697 #define NFP_QCP_MAX_ADD 0x3f 698 699 static inline void _nfp_qcp_ptr_add(u8 __iomem *q, 700 enum nfp_qcp_ptr ptr, u32 val) 701 { 702 u32 off; 703 704 if (ptr == NFP_QCP_READ_PTR) 705 off = NFP_QCP_QUEUE_ADD_RPTR; 706 else 707 off = NFP_QCP_QUEUE_ADD_WPTR; 708 709 while (val > NFP_QCP_MAX_ADD) { 710 writel(NFP_QCP_MAX_ADD, q + off); 711 val -= NFP_QCP_MAX_ADD; 712 } 713 714 writel(val, q + off); 715 } 716 717 /** 718 * nfp_qcp_rd_ptr_add() - Add the value to the read pointer of a queue 719 * 720 * @q: Base address for queue structure 721 * @val: Value to add to the queue pointer 722 * 723 * If @val is greater than @NFP_QCP_MAX_ADD multiple writes are performed. 724 */ 725 static inline void nfp_qcp_rd_ptr_add(u8 __iomem *q, u32 val) 726 { 727 _nfp_qcp_ptr_add(q, NFP_QCP_READ_PTR, val); 728 } 729 730 /** 731 * nfp_qcp_wr_ptr_add() - Add the value to the write pointer of a queue 732 * 733 * @q: Base address for queue structure 734 * @val: Value to add to the queue pointer 735 * 736 * If @val is greater than @NFP_QCP_MAX_ADD multiple writes are performed. 737 */ 738 static inline void nfp_qcp_wr_ptr_add(u8 __iomem *q, u32 val) 739 { 740 _nfp_qcp_ptr_add(q, NFP_QCP_WRITE_PTR, val); 741 } 742 743 static inline u32 _nfp_qcp_read(u8 __iomem *q, enum nfp_qcp_ptr ptr) 744 { 745 u32 off; 746 u32 val; 747 748 if (ptr == NFP_QCP_READ_PTR) 749 off = NFP_QCP_QUEUE_STS_LO; 750 else 751 off = NFP_QCP_QUEUE_STS_HI; 752 753 val = readl(q + off); 754 755 if (ptr == NFP_QCP_READ_PTR) 756 return val & NFP_QCP_QUEUE_STS_LO_READPTR_mask; 757 else 758 return val & NFP_QCP_QUEUE_STS_HI_WRITEPTR_mask; 759 } 760 761 /** 762 * nfp_qcp_rd_ptr_read() - Read the current read pointer value for a queue 763 * @q: Base address for queue structure 764 * 765 * Return: Value read. 766 */ 767 static inline u32 nfp_qcp_rd_ptr_read(u8 __iomem *q) 768 { 769 return _nfp_qcp_read(q, NFP_QCP_READ_PTR); 770 } 771 772 /** 773 * nfp_qcp_wr_ptr_read() - Read the current write pointer value for a queue 774 * @q: Base address for queue structure 775 * 776 * Return: Value read. 777 */ 778 static inline u32 nfp_qcp_wr_ptr_read(u8 __iomem *q) 779 { 780 return _nfp_qcp_read(q, NFP_QCP_WRITE_PTR); 781 } 782 783 /* Globals */ 784 extern const char nfp_driver_version[]; 785 786 /* Prototypes */ 787 void nfp_net_get_fw_version(struct nfp_net_fw_version *fw_ver, 788 void __iomem *ctrl_bar); 789 790 struct nfp_net * 791 nfp_net_netdev_alloc(struct pci_dev *pdev, 792 unsigned int max_tx_rings, unsigned int max_rx_rings); 793 void nfp_net_netdev_free(struct nfp_net *nn); 794 int nfp_net_netdev_init(struct net_device *netdev); 795 void nfp_net_netdev_clean(struct net_device *netdev); 796 void nfp_net_set_ethtool_ops(struct net_device *netdev); 797 void nfp_net_info(struct nfp_net *nn); 798 int nfp_net_reconfig(struct nfp_net *nn, u32 update); 799 unsigned int nfp_net_rss_key_sz(struct nfp_net *nn); 800 void nfp_net_rss_write_itbl(struct nfp_net *nn); 801 void nfp_net_rss_write_key(struct nfp_net *nn); 802 void nfp_net_coalesce_write_cfg(struct nfp_net *nn); 803 804 unsigned int 805 nfp_net_irqs_alloc(struct pci_dev *pdev, struct msix_entry *irq_entries, 806 unsigned int min_irqs, unsigned int want_irqs); 807 void nfp_net_irqs_disable(struct pci_dev *pdev); 808 void 809 nfp_net_irqs_assign(struct nfp_net *nn, struct msix_entry *irq_entries, 810 unsigned int n); 811 812 struct nfp_net_dp *nfp_net_clone_dp(struct nfp_net *nn); 813 int nfp_net_ring_reconfig(struct nfp_net *nn, struct nfp_net_dp *new); 814 815 bool nfp_net_link_changed_read_clear(struct nfp_net *nn); 816 void nfp_net_refresh_port_config(struct nfp_net *nn); 817 818 #ifdef CONFIG_NFP_DEBUG 819 void nfp_net_debugfs_create(void); 820 void nfp_net_debugfs_destroy(void); 821 struct dentry *nfp_net_debugfs_device_add(struct pci_dev *pdev); 822 void nfp_net_debugfs_port_add(struct nfp_net *nn, struct dentry *ddir, int id); 823 void nfp_net_debugfs_dir_clean(struct dentry **dir); 824 #else 825 static inline void nfp_net_debugfs_create(void) 826 { 827 } 828 829 static inline void nfp_net_debugfs_destroy(void) 830 { 831 } 832 833 static inline struct dentry *nfp_net_debugfs_device_add(struct pci_dev *pdev) 834 { 835 return NULL; 836 } 837 838 static inline void 839 nfp_net_debugfs_port_add(struct nfp_net *nn, struct dentry *ddir, int id) 840 { 841 } 842 843 static inline void nfp_net_debugfs_dir_clean(struct dentry **dir) 844 { 845 } 846 #endif /* CONFIG_NFP_DEBUG */ 847 848 void nfp_net_filter_stats_timer(unsigned long data); 849 int nfp_net_bpf_offload(struct nfp_net *nn, struct tc_cls_bpf_offload *cls_bpf); 850 851 #endif /* _NFP_NET_H_ */ 852