1 /* SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) */
2 /* Copyright (C) 2015-2018 Netronome Systems, Inc. */
3 
4 /*
5  * nfp_net.h
6  * Declarations for Netronome network device driver.
7  * Authors: Jakub Kicinski <jakub.kicinski@netronome.com>
8  *          Jason McMullan <jason.mcmullan@netronome.com>
9  *          Rolf Neugebauer <rolf.neugebauer@netronome.com>
10  */
11 
12 #ifndef _NFP_NET_H_
13 #define _NFP_NET_H_
14 
15 #include <linux/interrupt.h>
16 #include <linux/list.h>
17 #include <linux/netdevice.h>
18 #include <linux/pci.h>
19 #include <linux/io-64-nonatomic-hi-lo.h>
20 #include <net/xdp.h>
21 
22 #include "nfp_net_ctrl.h"
23 
24 #define nn_pr(nn, lvl, fmt, args...)					\
25 	({								\
26 		struct nfp_net *__nn = (nn);				\
27 									\
28 		if (__nn->dp.netdev)					\
29 			netdev_printk(lvl, __nn->dp.netdev, fmt, ## args); \
30 		else							\
31 			dev_printk(lvl, __nn->dp.dev, "ctrl: " fmt, ## args); \
32 	})
33 
34 #define nn_err(nn, fmt, args...)	nn_pr(nn, KERN_ERR, fmt, ## args)
35 #define nn_warn(nn, fmt, args...)	nn_pr(nn, KERN_WARNING, fmt, ## args)
36 #define nn_info(nn, fmt, args...)	nn_pr(nn, KERN_INFO, fmt, ## args)
37 #define nn_dbg(nn, fmt, args...)	nn_pr(nn, KERN_DEBUG, fmt, ## args)
38 
39 #define nn_dp_warn(dp, fmt, args...)					\
40 	({								\
41 		struct nfp_net_dp *__dp = (dp);				\
42 									\
43 		if (unlikely(net_ratelimit())) {			\
44 			if (__dp->netdev)				\
45 				netdev_warn(__dp->netdev, fmt, ## args); \
46 			else						\
47 				dev_warn(__dp->dev, fmt, ## args);	\
48 		}							\
49 	})
50 
51 /* Max time to wait for NFP to respond on updates (in seconds) */
52 #define NFP_NET_POLL_TIMEOUT	5
53 
54 /* Interval for reading offloaded filter stats */
55 #define NFP_NET_STAT_POLL_IVL	msecs_to_jiffies(100)
56 
57 /* Bar allocation */
58 #define NFP_NET_CTRL_BAR	0
59 #define NFP_NET_Q0_BAR		2
60 #define NFP_NET_Q1_BAR		4	/* OBSOLETE */
61 
62 /* Max bits in DMA address */
63 #define NFP_NET_MAX_DMA_BITS	40
64 
65 /* Default size for MTU and freelist buffer sizes */
66 #define NFP_NET_DEFAULT_MTU		1500
67 
68 /* Maximum number of bytes prepended to a packet */
69 #define NFP_NET_MAX_PREPEND		64
70 
71 /* Interrupt definitions */
72 #define NFP_NET_NON_Q_VECTORS		2
73 #define NFP_NET_IRQ_LSC_IDX		0
74 #define NFP_NET_IRQ_EXN_IDX		1
75 #define NFP_NET_MIN_VNIC_IRQS		(NFP_NET_NON_Q_VECTORS + 1)
76 
77 /* Queue/Ring definitions */
78 #define NFP_NET_MAX_TX_RINGS	64	/* Max. # of Tx rings per device */
79 #define NFP_NET_MAX_RX_RINGS	64	/* Max. # of Rx rings per device */
80 #define NFP_NET_MAX_R_VECS	(NFP_NET_MAX_TX_RINGS > NFP_NET_MAX_RX_RINGS ? \
81 				 NFP_NET_MAX_TX_RINGS : NFP_NET_MAX_RX_RINGS)
82 #define NFP_NET_MAX_IRQS	(NFP_NET_NON_Q_VECTORS + NFP_NET_MAX_R_VECS)
83 
84 #define NFP_NET_MIN_TX_DESCS	256	/* Min. # of Tx descs per ring */
85 #define NFP_NET_MIN_RX_DESCS	256	/* Min. # of Rx descs per ring */
86 #define NFP_NET_MAX_TX_DESCS	(256 * 1024) /* Max. # of Tx descs per ring */
87 #define NFP_NET_MAX_RX_DESCS	(256 * 1024) /* Max. # of Rx descs per ring */
88 
89 #define NFP_NET_TX_DESCS_DEFAULT 4096	/* Default # of Tx descs per ring */
90 #define NFP_NET_RX_DESCS_DEFAULT 4096	/* Default # of Rx descs per ring */
91 
92 #define NFP_NET_FL_BATCH	16	/* Add freelist in this Batch size */
93 #define NFP_NET_XDP_MAX_COMPLETE 2048	/* XDP bufs to reclaim in NAPI poll */
94 
95 /* Offload definitions */
96 #define NFP_NET_N_VXLAN_PORTS	(NFP_NET_CFG_VXLAN_SZ / sizeof(__be16))
97 
98 #define NFP_NET_RX_BUF_HEADROOM	(NET_SKB_PAD + NET_IP_ALIGN)
99 #define NFP_NET_RX_BUF_NON_DATA	(NFP_NET_RX_BUF_HEADROOM +		\
100 				 SKB_DATA_ALIGN(sizeof(struct skb_shared_info)))
101 
102 /* Forward declarations */
103 struct nfp_cpp;
104 struct nfp_eth_table_port;
105 struct nfp_net;
106 struct nfp_net_r_vector;
107 struct nfp_port;
108 
109 /* Convenience macro for wrapping descriptor index on ring size */
110 #define D_IDX(ring, idx)	((idx) & ((ring)->cnt - 1))
111 
112 /* Convenience macro for writing dma address into RX/TX descriptors */
113 #define nfp_desc_set_dma_addr(desc, dma_addr)				\
114 	do {								\
115 		__typeof(desc) __d = (desc);				\
116 		dma_addr_t __addr = (dma_addr);				\
117 									\
118 		__d->dma_addr_lo = cpu_to_le32(lower_32_bits(__addr));	\
119 		__d->dma_addr_hi = upper_32_bits(__addr) & 0xff;	\
120 	} while (0)
121 
122 /* TX descriptor format */
123 
124 #define PCIE_DESC_TX_EOP		BIT(7)
125 #define PCIE_DESC_TX_OFFSET_MASK	GENMASK(6, 0)
126 #define PCIE_DESC_TX_MSS_MASK		GENMASK(13, 0)
127 
128 /* Flags in the host TX descriptor */
129 #define PCIE_DESC_TX_CSUM		BIT(7)
130 #define PCIE_DESC_TX_IP4_CSUM		BIT(6)
131 #define PCIE_DESC_TX_TCP_CSUM		BIT(5)
132 #define PCIE_DESC_TX_UDP_CSUM		BIT(4)
133 #define PCIE_DESC_TX_VLAN		BIT(3)
134 #define PCIE_DESC_TX_LSO		BIT(2)
135 #define PCIE_DESC_TX_ENCAP		BIT(1)
136 #define PCIE_DESC_TX_O_IP4_CSUM	BIT(0)
137 
138 struct nfp_net_tx_desc {
139 	union {
140 		struct {
141 			u8 dma_addr_hi; /* High bits of host buf address */
142 			__le16 dma_len;	/* Length to DMA for this desc */
143 			u8 offset_eop;	/* Offset in buf where pkt starts +
144 					 * highest bit is eop flag.
145 					 */
146 			__le32 dma_addr_lo; /* Low 32bit of host buf addr */
147 
148 			__le16 mss;	/* MSS to be used for LSO */
149 			u8 lso_hdrlen;	/* LSO, TCP payload offset */
150 			u8 flags;	/* TX Flags, see @PCIE_DESC_TX_* */
151 			union {
152 				struct {
153 					u8 l3_offset; /* L3 header offset */
154 					u8 l4_offset; /* L4 header offset */
155 				};
156 				__le16 vlan; /* VLAN tag to add if indicated */
157 			};
158 			__le16 data_len; /* Length of frame + meta data */
159 		} __packed;
160 		__le32 vals[4];
161 	};
162 };
163 
164 /**
165  * struct nfp_net_tx_buf - software TX buffer descriptor
166  * @skb:	normal ring, sk_buff associated with this buffer
167  * @frag:	XDP ring, page frag associated with this buffer
168  * @dma_addr:	DMA mapping address of the buffer
169  * @fidx:	Fragment index (-1 for the head and [0..nr_frags-1] for frags)
170  * @pkt_cnt:	Number of packets to be produced out of the skb associated
171  *		with this buffer (valid only on the head's buffer).
172  *		Will be 1 for all non-TSO packets.
173  * @real_len:	Number of bytes which to be produced out of the skb (valid only
174  *		on the head's buffer). Equal to skb->len for non-TSO packets.
175  */
176 struct nfp_net_tx_buf {
177 	union {
178 		struct sk_buff *skb;
179 		void *frag;
180 	};
181 	dma_addr_t dma_addr;
182 	short int fidx;
183 	u16 pkt_cnt;
184 	u32 real_len;
185 };
186 
187 /**
188  * struct nfp_net_tx_ring - TX ring structure
189  * @r_vec:      Back pointer to ring vector structure
190  * @idx:        Ring index from Linux's perspective
191  * @qcidx:      Queue Controller Peripheral (QCP) queue index for the TX queue
192  * @qcp_q:      Pointer to base of the QCP TX queue
193  * @cnt:        Size of the queue in number of descriptors
194  * @wr_p:       TX ring write pointer (free running)
195  * @rd_p:       TX ring read pointer (free running)
196  * @qcp_rd_p:   Local copy of QCP TX queue read pointer
197  * @wr_ptr_add:	Accumulated number of buffers to add to QCP write pointer
198  *		(used for .xmit_more delayed kick)
199  * @txbufs:     Array of transmitted TX buffers, to free on transmit
200  * @txds:       Virtual address of TX ring in host memory
201  * @dma:        DMA address of the TX ring
202  * @size:       Size, in bytes, of the TX ring (needed to free)
203  * @is_xdp:	Is this a XDP TX ring?
204  */
205 struct nfp_net_tx_ring {
206 	struct nfp_net_r_vector *r_vec;
207 
208 	u32 idx;
209 	int qcidx;
210 	u8 __iomem *qcp_q;
211 
212 	u32 cnt;
213 	u32 wr_p;
214 	u32 rd_p;
215 	u32 qcp_rd_p;
216 
217 	u32 wr_ptr_add;
218 
219 	struct nfp_net_tx_buf *txbufs;
220 	struct nfp_net_tx_desc *txds;
221 
222 	dma_addr_t dma;
223 	size_t size;
224 	bool is_xdp;
225 } ____cacheline_aligned;
226 
227 /* RX and freelist descriptor format */
228 
229 #define PCIE_DESC_RX_DD			BIT(7)
230 #define PCIE_DESC_RX_META_LEN_MASK	GENMASK(6, 0)
231 
232 /* Flags in the RX descriptor */
233 #define PCIE_DESC_RX_RSS		cpu_to_le16(BIT(15))
234 #define PCIE_DESC_RX_I_IP4_CSUM		cpu_to_le16(BIT(14))
235 #define PCIE_DESC_RX_I_IP4_CSUM_OK	cpu_to_le16(BIT(13))
236 #define PCIE_DESC_RX_I_TCP_CSUM		cpu_to_le16(BIT(12))
237 #define PCIE_DESC_RX_I_TCP_CSUM_OK	cpu_to_le16(BIT(11))
238 #define PCIE_DESC_RX_I_UDP_CSUM		cpu_to_le16(BIT(10))
239 #define PCIE_DESC_RX_I_UDP_CSUM_OK	cpu_to_le16(BIT(9))
240 #define PCIE_DESC_RX_BPF		cpu_to_le16(BIT(8))
241 #define PCIE_DESC_RX_EOP		cpu_to_le16(BIT(7))
242 #define PCIE_DESC_RX_IP4_CSUM		cpu_to_le16(BIT(6))
243 #define PCIE_DESC_RX_IP4_CSUM_OK	cpu_to_le16(BIT(5))
244 #define PCIE_DESC_RX_TCP_CSUM		cpu_to_le16(BIT(4))
245 #define PCIE_DESC_RX_TCP_CSUM_OK	cpu_to_le16(BIT(3))
246 #define PCIE_DESC_RX_UDP_CSUM		cpu_to_le16(BIT(2))
247 #define PCIE_DESC_RX_UDP_CSUM_OK	cpu_to_le16(BIT(1))
248 #define PCIE_DESC_RX_VLAN		cpu_to_le16(BIT(0))
249 
250 #define PCIE_DESC_RX_CSUM_ALL		(PCIE_DESC_RX_IP4_CSUM |	\
251 					 PCIE_DESC_RX_TCP_CSUM |	\
252 					 PCIE_DESC_RX_UDP_CSUM |	\
253 					 PCIE_DESC_RX_I_IP4_CSUM |	\
254 					 PCIE_DESC_RX_I_TCP_CSUM |	\
255 					 PCIE_DESC_RX_I_UDP_CSUM)
256 #define PCIE_DESC_RX_CSUM_OK_SHIFT	1
257 #define __PCIE_DESC_RX_CSUM_ALL		le16_to_cpu(PCIE_DESC_RX_CSUM_ALL)
258 #define __PCIE_DESC_RX_CSUM_ALL_OK	(__PCIE_DESC_RX_CSUM_ALL >>	\
259 					 PCIE_DESC_RX_CSUM_OK_SHIFT)
260 
261 struct nfp_net_rx_desc {
262 	union {
263 		struct {
264 			u8 dma_addr_hi;	/* High bits of the buf address */
265 			__le16 reserved; /* Must be zero */
266 			u8 meta_len_dd; /* Must be zero */
267 
268 			__le32 dma_addr_lo; /* Low bits of the buffer address */
269 		} __packed fld;
270 
271 		struct {
272 			__le16 data_len; /* Length of the frame + meta data */
273 			u8 reserved;
274 			u8 meta_len_dd;	/* Length of meta data prepended +
275 					 * descriptor done flag.
276 					 */
277 
278 			__le16 flags;	/* RX flags. See @PCIE_DESC_RX_* */
279 			__le16 vlan;	/* VLAN if stripped */
280 		} __packed rxd;
281 
282 		__le32 vals[2];
283 	};
284 };
285 
286 #define NFP_NET_META_FIELD_MASK GENMASK(NFP_NET_META_FIELD_SIZE - 1, 0)
287 
288 struct nfp_meta_parsed {
289 	u8 hash_type;
290 	u8 csum_type;
291 	u32 hash;
292 	u32 mark;
293 	u32 portid;
294 	__wsum csum;
295 };
296 
297 struct nfp_net_rx_hash {
298 	__be32 hash_type;
299 	__be32 hash;
300 };
301 
302 /**
303  * struct nfp_net_rx_buf - software RX buffer descriptor
304  * @frag:	page fragment buffer
305  * @dma_addr:	DMA mapping address of the buffer
306  */
307 struct nfp_net_rx_buf {
308 	void *frag;
309 	dma_addr_t dma_addr;
310 };
311 
312 /**
313  * struct nfp_net_rx_ring - RX ring structure
314  * @r_vec:      Back pointer to ring vector structure
315  * @cnt:        Size of the queue in number of descriptors
316  * @wr_p:       FL/RX ring write pointer (free running)
317  * @rd_p:       FL/RX ring read pointer (free running)
318  * @idx:        Ring index from Linux's perspective
319  * @fl_qcidx:   Queue Controller Peripheral (QCP) queue index for the freelist
320  * @qcp_fl:     Pointer to base of the QCP freelist queue
321  * @rxbufs:     Array of transmitted FL/RX buffers
322  * @rxds:       Virtual address of FL/RX ring in host memory
323  * @xdp_rxq:    RX-ring info avail for XDP
324  * @dma:        DMA address of the FL/RX ring
325  * @size:       Size, in bytes, of the FL/RX ring (needed to free)
326  */
327 struct nfp_net_rx_ring {
328 	struct nfp_net_r_vector *r_vec;
329 
330 	u32 cnt;
331 	u32 wr_p;
332 	u32 rd_p;
333 
334 	u32 idx;
335 
336 	int fl_qcidx;
337 	u8 __iomem *qcp_fl;
338 
339 	struct nfp_net_rx_buf *rxbufs;
340 	struct nfp_net_rx_desc *rxds;
341 
342 	struct xdp_rxq_info xdp_rxq;
343 
344 	dma_addr_t dma;
345 	size_t size;
346 } ____cacheline_aligned;
347 
348 /**
349  * struct nfp_net_r_vector - Per ring interrupt vector configuration
350  * @nfp_net:        Backpointer to nfp_net structure
351  * @napi:           NAPI structure for this ring vec
352  * @tasklet:        ctrl vNIC, tasklet for servicing the r_vec
353  * @queue:          ctrl vNIC, send queue
354  * @lock:           ctrl vNIC, r_vec lock protects @queue
355  * @tx_ring:        Pointer to TX ring
356  * @rx_ring:        Pointer to RX ring
357  * @xdp_ring:	    Pointer to an extra TX ring for XDP
358  * @irq_entry:      MSI-X table entry (use for talking to the device)
359  * @rx_sync:	    Seqlock for atomic updates of RX stats
360  * @rx_pkts:        Number of received packets
361  * @rx_bytes:	    Number of received bytes
362  * @rx_drops:	    Number of packets dropped on RX due to lack of resources
363  * @hw_csum_rx_ok:  Counter of packets where the HW checksum was OK
364  * @hw_csum_rx_inner_ok: Counter of packets where the inner HW checksum was OK
365  * @hw_csum_rx_complete: Counter of packets with CHECKSUM_COMPLETE reported
366  * @hw_csum_rx_error:	 Counter of packets with bad checksums
367  * @tx_sync:	    Seqlock for atomic updates of TX stats
368  * @tx_pkts:	    Number of Transmitted packets
369  * @tx_bytes:	    Number of Transmitted bytes
370  * @hw_csum_tx:	    Counter of packets with TX checksum offload requested
371  * @hw_csum_tx_inner:	 Counter of inner TX checksum offload requests
372  * @tx_gather:	    Counter of packets with Gather DMA
373  * @tx_lso:	    Counter of LSO packets sent
374  * @tx_errors:	    How many TX errors were encountered
375  * @tx_busy:        How often was TX busy (no space)?
376  * @rx_replace_buf_alloc_fail:	Counter of RX buffer allocation failures
377  * @irq_vector:     Interrupt vector number (use for talking to the OS)
378  * @handler:        Interrupt handler for this ring vector
379  * @name:           Name of the interrupt vector
380  * @affinity_mask:  SMP affinity mask for this vector
381  *
382  * This structure ties RX and TX rings to interrupt vectors and a NAPI
383  * context. This currently only supports one RX and TX ring per
384  * interrupt vector but might be extended in the future to allow
385  * association of multiple rings per vector.
386  */
387 struct nfp_net_r_vector {
388 	struct nfp_net *nfp_net;
389 	union {
390 		struct napi_struct napi;
391 		struct {
392 			struct tasklet_struct tasklet;
393 			struct sk_buff_head queue;
394 			struct spinlock lock;
395 		};
396 	};
397 
398 	struct nfp_net_tx_ring *tx_ring;
399 	struct nfp_net_rx_ring *rx_ring;
400 
401 	u16 irq_entry;
402 
403 	struct u64_stats_sync rx_sync;
404 	u64 rx_pkts;
405 	u64 rx_bytes;
406 	u64 rx_drops;
407 	u64 hw_csum_rx_ok;
408 	u64 hw_csum_rx_inner_ok;
409 	u64 hw_csum_rx_complete;
410 
411 	struct nfp_net_tx_ring *xdp_ring;
412 
413 	struct u64_stats_sync tx_sync;
414 	u64 tx_pkts;
415 	u64 tx_bytes;
416 	u64 hw_csum_tx;
417 	u64 hw_csum_tx_inner;
418 	u64 tx_gather;
419 	u64 tx_lso;
420 
421 	u64 hw_csum_rx_error;
422 	u64 rx_replace_buf_alloc_fail;
423 	u64 tx_errors;
424 	u64 tx_busy;
425 
426 	u32 irq_vector;
427 	irq_handler_t handler;
428 	char name[IFNAMSIZ + 8];
429 	cpumask_t affinity_mask;
430 } ____cacheline_aligned;
431 
432 /* Firmware version as it is written in the 32bit value in the BAR */
433 struct nfp_net_fw_version {
434 	u8 minor;
435 	u8 major;
436 	u8 class;
437 	u8 resv;
438 } __packed;
439 
440 static inline bool nfp_net_fw_ver_eq(struct nfp_net_fw_version *fw_ver,
441 				     u8 resv, u8 class, u8 major, u8 minor)
442 {
443 	return fw_ver->resv == resv &&
444 	       fw_ver->class == class &&
445 	       fw_ver->major == major &&
446 	       fw_ver->minor == minor;
447 }
448 
449 struct nfp_stat_pair {
450 	u64 pkts;
451 	u64 bytes;
452 };
453 
454 /**
455  * struct nfp_net_dp - NFP network device datapath data structure
456  * @dev:		Backpointer to struct device
457  * @netdev:		Backpointer to net_device structure
458  * @is_vf:		Is the driver attached to a VF?
459  * @chained_metadata_format:  Firemware will use new metadata format
460  * @rx_dma_dir:		Mapping direction for RX buffers
461  * @rx_dma_off:		Offset at which DMA packets (for XDP headroom)
462  * @rx_offset:		Offset in the RX buffers where packet data starts
463  * @ctrl:		Local copy of the control register/word.
464  * @fl_bufsz:		Currently configured size of the freelist buffers
465  * @xdp_prog:		Installed XDP program
466  * @tx_rings:		Array of pre-allocated TX ring structures
467  * @rx_rings:		Array of pre-allocated RX ring structures
468  * @ctrl_bar:		Pointer to mapped control BAR
469  *
470  * @txd_cnt:		Size of the TX ring in number of descriptors
471  * @rxd_cnt:		Size of the RX ring in number of descriptors
472  * @num_r_vecs:		Number of used ring vectors
473  * @num_tx_rings:	Currently configured number of TX rings
474  * @num_stack_tx_rings:	Number of TX rings used by the stack (not XDP)
475  * @num_rx_rings:	Currently configured number of RX rings
476  * @mtu:		Device MTU
477  */
478 struct nfp_net_dp {
479 	struct device *dev;
480 	struct net_device *netdev;
481 
482 	u8 is_vf:1;
483 	u8 chained_metadata_format:1;
484 
485 	u8 rx_dma_dir;
486 	u8 rx_offset;
487 
488 	u32 rx_dma_off;
489 
490 	u32 ctrl;
491 	u32 fl_bufsz;
492 
493 	struct bpf_prog *xdp_prog;
494 
495 	struct nfp_net_tx_ring *tx_rings;
496 	struct nfp_net_rx_ring *rx_rings;
497 
498 	u8 __iomem *ctrl_bar;
499 
500 	/* Cold data follows */
501 
502 	unsigned int txd_cnt;
503 	unsigned int rxd_cnt;
504 
505 	unsigned int num_r_vecs;
506 
507 	unsigned int num_tx_rings;
508 	unsigned int num_stack_tx_rings;
509 	unsigned int num_rx_rings;
510 
511 	unsigned int mtu;
512 };
513 
514 /**
515  * struct nfp_net - NFP network device structure
516  * @dp:			Datapath structure
517  * @id:			vNIC id within the PF (0 for VFs)
518  * @fw_ver:		Firmware version
519  * @cap:                Capabilities advertised by the Firmware
520  * @max_mtu:            Maximum support MTU advertised by the Firmware
521  * @rss_hfunc:		RSS selected hash function
522  * @rss_cfg:            RSS configuration
523  * @rss_key:            RSS secret key
524  * @rss_itbl:           RSS indirection table
525  * @xdp:		Information about the driver XDP program
526  * @xdp_hw:		Information about the HW XDP program
527  * @max_r_vecs:		Number of allocated interrupt vectors for RX/TX
528  * @max_tx_rings:       Maximum number of TX rings supported by the Firmware
529  * @max_rx_rings:       Maximum number of RX rings supported by the Firmware
530  * @stride_rx:		Queue controller RX queue spacing
531  * @stride_tx:		Queue controller TX queue spacing
532  * @r_vecs:             Pre-allocated array of ring vectors
533  * @irq_entries:        Pre-allocated array of MSI-X entries
534  * @lsc_handler:        Handler for Link State Change interrupt
535  * @lsc_name:           Name for Link State Change interrupt
536  * @exn_handler:        Handler for Exception interrupt
537  * @exn_name:           Name for Exception interrupt
538  * @shared_handler:     Handler for shared interrupts
539  * @shared_name:        Name for shared interrupt
540  * @me_freq_mhz:        ME clock_freq (MHz)
541  * @reconfig_lock:	Protects HW reconfiguration request regs/machinery
542  * @reconfig_posted:	Pending reconfig bits coming from async sources
543  * @reconfig_timer_active:  Timer for reading reconfiguration results is pending
544  * @reconfig_sync_present:  Some thread is performing synchronous reconfig
545  * @reconfig_timer:	Timer for async reading of reconfig results
546  * @link_up:            Is the link up?
547  * @link_status_lock:	Protects @link_* and ensures atomicity with BAR reading
548  * @rx_coalesce_usecs:      RX interrupt moderation usecs delay parameter
549  * @rx_coalesce_max_frames: RX interrupt moderation frame count parameter
550  * @tx_coalesce_usecs:      TX interrupt moderation usecs delay parameter
551  * @tx_coalesce_max_frames: TX interrupt moderation frame count parameter
552  * @vxlan_ports:	VXLAN ports for RX inner csum offload communicated to HW
553  * @vxlan_usecnt:	IPv4/IPv6 VXLAN port use counts
554  * @qcp_cfg:            Pointer to QCP queue used for configuration notification
555  * @tx_bar:             Pointer to mapped TX queues
556  * @rx_bar:             Pointer to mapped FL/RX queues
557  * @tlv_caps:		Parsed TLV capabilities
558  * @debugfs_dir:	Device directory in debugfs
559  * @vnic_list:		Entry on device vNIC list
560  * @pdev:		Backpointer to PCI device
561  * @app:		APP handle if available
562  * @vnic_no_name:	For non-port PF vNIC make ndo_get_phys_port_name return
563  *			-EOPNOTSUPP to keep backwards compatibility (set by app)
564  * @port:		Pointer to nfp_port structure if vNIC is a port
565  * @app_priv:		APP private data for this vNIC
566  */
567 struct nfp_net {
568 	struct nfp_net_dp dp;
569 
570 	struct nfp_net_fw_version fw_ver;
571 
572 	u32 id;
573 
574 	u32 cap;
575 	u32 max_mtu;
576 
577 	u8 rss_hfunc;
578 	u32 rss_cfg;
579 	u8 rss_key[NFP_NET_CFG_RSS_KEY_SZ];
580 	u8 rss_itbl[NFP_NET_CFG_RSS_ITBL_SZ];
581 
582 	struct xdp_attachment_info xdp;
583 	struct xdp_attachment_info xdp_hw;
584 
585 	unsigned int max_tx_rings;
586 	unsigned int max_rx_rings;
587 
588 	int stride_tx;
589 	int stride_rx;
590 
591 	unsigned int max_r_vecs;
592 	struct nfp_net_r_vector r_vecs[NFP_NET_MAX_R_VECS];
593 	struct msix_entry irq_entries[NFP_NET_MAX_IRQS];
594 
595 	irq_handler_t lsc_handler;
596 	char lsc_name[IFNAMSIZ + 8];
597 
598 	irq_handler_t exn_handler;
599 	char exn_name[IFNAMSIZ + 8];
600 
601 	irq_handler_t shared_handler;
602 	char shared_name[IFNAMSIZ + 8];
603 
604 	u32 me_freq_mhz;
605 
606 	bool link_up;
607 	spinlock_t link_status_lock;
608 
609 	spinlock_t reconfig_lock;
610 	u32 reconfig_posted;
611 	bool reconfig_timer_active;
612 	bool reconfig_sync_present;
613 	struct timer_list reconfig_timer;
614 
615 	u32 rx_coalesce_usecs;
616 	u32 rx_coalesce_max_frames;
617 	u32 tx_coalesce_usecs;
618 	u32 tx_coalesce_max_frames;
619 
620 	__be16 vxlan_ports[NFP_NET_N_VXLAN_PORTS];
621 	u8 vxlan_usecnt[NFP_NET_N_VXLAN_PORTS];
622 
623 	u8 __iomem *qcp_cfg;
624 
625 	u8 __iomem *tx_bar;
626 	u8 __iomem *rx_bar;
627 
628 	struct nfp_net_tlv_caps tlv_caps;
629 
630 	struct dentry *debugfs_dir;
631 
632 	struct list_head vnic_list;
633 
634 	struct pci_dev *pdev;
635 	struct nfp_app *app;
636 
637 	bool vnic_no_name;
638 
639 	struct nfp_port *port;
640 
641 	void *app_priv;
642 };
643 
644 /* Functions to read/write from/to a BAR
645  * Performs any endian conversion necessary.
646  */
647 static inline u16 nn_readb(struct nfp_net *nn, int off)
648 {
649 	return readb(nn->dp.ctrl_bar + off);
650 }
651 
652 static inline void nn_writeb(struct nfp_net *nn, int off, u8 val)
653 {
654 	writeb(val, nn->dp.ctrl_bar + off);
655 }
656 
657 static inline u16 nn_readw(struct nfp_net *nn, int off)
658 {
659 	return readw(nn->dp.ctrl_bar + off);
660 }
661 
662 static inline void nn_writew(struct nfp_net *nn, int off, u16 val)
663 {
664 	writew(val, nn->dp.ctrl_bar + off);
665 }
666 
667 static inline u32 nn_readl(struct nfp_net *nn, int off)
668 {
669 	return readl(nn->dp.ctrl_bar + off);
670 }
671 
672 static inline void nn_writel(struct nfp_net *nn, int off, u32 val)
673 {
674 	writel(val, nn->dp.ctrl_bar + off);
675 }
676 
677 static inline u64 nn_readq(struct nfp_net *nn, int off)
678 {
679 	return readq(nn->dp.ctrl_bar + off);
680 }
681 
682 static inline void nn_writeq(struct nfp_net *nn, int off, u64 val)
683 {
684 	writeq(val, nn->dp.ctrl_bar + off);
685 }
686 
687 /* Flush posted PCI writes by reading something without side effects */
688 static inline void nn_pci_flush(struct nfp_net *nn)
689 {
690 	nn_readl(nn, NFP_NET_CFG_VERSION);
691 }
692 
693 /* Queue Controller Peripheral access functions and definitions.
694  *
695  * Some of the BARs of the NFP are mapped to portions of the Queue
696  * Controller Peripheral (QCP) address space on the NFP.  A QCP queue
697  * has a read and a write pointer (as well as a size and flags,
698  * indicating overflow etc).  The QCP offers a number of different
699  * operation on queue pointers, but here we only offer function to
700  * either add to a pointer or to read the pointer value.
701  */
702 #define NFP_QCP_QUEUE_ADDR_SZ			0x800
703 #define NFP_QCP_QUEUE_AREA_SZ			0x80000
704 #define NFP_QCP_QUEUE_OFF(_x)			((_x) * NFP_QCP_QUEUE_ADDR_SZ)
705 #define NFP_QCP_QUEUE_ADD_RPTR			0x0000
706 #define NFP_QCP_QUEUE_ADD_WPTR			0x0004
707 #define NFP_QCP_QUEUE_STS_LO			0x0008
708 #define NFP_QCP_QUEUE_STS_LO_READPTR_mask	0x3ffff
709 #define NFP_QCP_QUEUE_STS_HI			0x000c
710 #define NFP_QCP_QUEUE_STS_HI_WRITEPTR_mask	0x3ffff
711 
712 /* The offset of a QCP queues in the PCIe Target */
713 #define NFP_PCIE_QUEUE(_q) (0x80000 + (NFP_QCP_QUEUE_ADDR_SZ * ((_q) & 0xff)))
714 
715 /* nfp_qcp_ptr - Read or Write Pointer of a queue */
716 enum nfp_qcp_ptr {
717 	NFP_QCP_READ_PTR = 0,
718 	NFP_QCP_WRITE_PTR
719 };
720 
721 /* There appear to be an *undocumented* upper limit on the value which
722  * one can add to a queue and that value is either 0x3f or 0x7f.  We
723  * go with 0x3f as a conservative measure.
724  */
725 #define NFP_QCP_MAX_ADD				0x3f
726 
727 static inline void _nfp_qcp_ptr_add(u8 __iomem *q,
728 				    enum nfp_qcp_ptr ptr, u32 val)
729 {
730 	u32 off;
731 
732 	if (ptr == NFP_QCP_READ_PTR)
733 		off = NFP_QCP_QUEUE_ADD_RPTR;
734 	else
735 		off = NFP_QCP_QUEUE_ADD_WPTR;
736 
737 	while (val > NFP_QCP_MAX_ADD) {
738 		writel(NFP_QCP_MAX_ADD, q + off);
739 		val -= NFP_QCP_MAX_ADD;
740 	}
741 
742 	writel(val, q + off);
743 }
744 
745 /**
746  * nfp_qcp_rd_ptr_add() - Add the value to the read pointer of a queue
747  *
748  * @q:   Base address for queue structure
749  * @val: Value to add to the queue pointer
750  *
751  * If @val is greater than @NFP_QCP_MAX_ADD multiple writes are performed.
752  */
753 static inline void nfp_qcp_rd_ptr_add(u8 __iomem *q, u32 val)
754 {
755 	_nfp_qcp_ptr_add(q, NFP_QCP_READ_PTR, val);
756 }
757 
758 /**
759  * nfp_qcp_wr_ptr_add() - Add the value to the write pointer of a queue
760  *
761  * @q:   Base address for queue structure
762  * @val: Value to add to the queue pointer
763  *
764  * If @val is greater than @NFP_QCP_MAX_ADD multiple writes are performed.
765  */
766 static inline void nfp_qcp_wr_ptr_add(u8 __iomem *q, u32 val)
767 {
768 	_nfp_qcp_ptr_add(q, NFP_QCP_WRITE_PTR, val);
769 }
770 
771 static inline u32 _nfp_qcp_read(u8 __iomem *q, enum nfp_qcp_ptr ptr)
772 {
773 	u32 off;
774 	u32 val;
775 
776 	if (ptr == NFP_QCP_READ_PTR)
777 		off = NFP_QCP_QUEUE_STS_LO;
778 	else
779 		off = NFP_QCP_QUEUE_STS_HI;
780 
781 	val = readl(q + off);
782 
783 	if (ptr == NFP_QCP_READ_PTR)
784 		return val & NFP_QCP_QUEUE_STS_LO_READPTR_mask;
785 	else
786 		return val & NFP_QCP_QUEUE_STS_HI_WRITEPTR_mask;
787 }
788 
789 /**
790  * nfp_qcp_rd_ptr_read() - Read the current read pointer value for a queue
791  * @q:  Base address for queue structure
792  *
793  * Return: Value read.
794  */
795 static inline u32 nfp_qcp_rd_ptr_read(u8 __iomem *q)
796 {
797 	return _nfp_qcp_read(q, NFP_QCP_READ_PTR);
798 }
799 
800 /**
801  * nfp_qcp_wr_ptr_read() - Read the current write pointer value for a queue
802  * @q:  Base address for queue structure
803  *
804  * Return: Value read.
805  */
806 static inline u32 nfp_qcp_wr_ptr_read(u8 __iomem *q)
807 {
808 	return _nfp_qcp_read(q, NFP_QCP_WRITE_PTR);
809 }
810 
811 static inline bool nfp_net_is_data_vnic(struct nfp_net *nn)
812 {
813 	WARN_ON_ONCE(!nn->dp.netdev && nn->port);
814 	return !!nn->dp.netdev;
815 }
816 
817 static inline bool nfp_net_running(struct nfp_net *nn)
818 {
819 	return nn->dp.ctrl & NFP_NET_CFG_CTRL_ENABLE;
820 }
821 
822 static inline const char *nfp_net_name(struct nfp_net *nn)
823 {
824 	return nn->dp.netdev ? nn->dp.netdev->name : "ctrl";
825 }
826 
827 static inline void nfp_ctrl_lock(struct nfp_net *nn)
828 	__acquires(&nn->r_vecs[0].lock)
829 {
830 	spin_lock_bh(&nn->r_vecs[0].lock);
831 }
832 
833 static inline void nfp_ctrl_unlock(struct nfp_net *nn)
834 	__releases(&nn->r_vecs[0].lock)
835 {
836 	spin_unlock_bh(&nn->r_vecs[0].lock);
837 }
838 
839 /* Globals */
840 extern const char nfp_driver_version[];
841 
842 extern const struct net_device_ops nfp_net_netdev_ops;
843 
844 static inline bool nfp_netdev_is_nfp_net(struct net_device *netdev)
845 {
846 	return netdev->netdev_ops == &nfp_net_netdev_ops;
847 }
848 
849 /* Prototypes */
850 void nfp_net_get_fw_version(struct nfp_net_fw_version *fw_ver,
851 			    void __iomem *ctrl_bar);
852 
853 struct nfp_net *
854 nfp_net_alloc(struct pci_dev *pdev, bool needs_netdev,
855 	      unsigned int max_tx_rings, unsigned int max_rx_rings);
856 void nfp_net_free(struct nfp_net *nn);
857 
858 int nfp_net_init(struct nfp_net *nn);
859 void nfp_net_clean(struct nfp_net *nn);
860 
861 int nfp_ctrl_open(struct nfp_net *nn);
862 void nfp_ctrl_close(struct nfp_net *nn);
863 
864 void nfp_net_set_ethtool_ops(struct net_device *netdev);
865 void nfp_net_info(struct nfp_net *nn);
866 int nfp_net_reconfig(struct nfp_net *nn, u32 update);
867 unsigned int nfp_net_rss_key_sz(struct nfp_net *nn);
868 void nfp_net_rss_write_itbl(struct nfp_net *nn);
869 void nfp_net_rss_write_key(struct nfp_net *nn);
870 void nfp_net_coalesce_write_cfg(struct nfp_net *nn);
871 
872 unsigned int
873 nfp_net_irqs_alloc(struct pci_dev *pdev, struct msix_entry *irq_entries,
874 		   unsigned int min_irqs, unsigned int want_irqs);
875 void nfp_net_irqs_disable(struct pci_dev *pdev);
876 void
877 nfp_net_irqs_assign(struct nfp_net *nn, struct msix_entry *irq_entries,
878 		    unsigned int n);
879 
880 struct nfp_net_dp *nfp_net_clone_dp(struct nfp_net *nn);
881 int nfp_net_ring_reconfig(struct nfp_net *nn, struct nfp_net_dp *new,
882 			  struct netlink_ext_ack *extack);
883 
884 #ifdef CONFIG_NFP_DEBUG
885 void nfp_net_debugfs_create(void);
886 void nfp_net_debugfs_destroy(void);
887 struct dentry *nfp_net_debugfs_device_add(struct pci_dev *pdev);
888 void nfp_net_debugfs_vnic_add(struct nfp_net *nn, struct dentry *ddir);
889 void nfp_net_debugfs_dir_clean(struct dentry **dir);
890 #else
891 static inline void nfp_net_debugfs_create(void)
892 {
893 }
894 
895 static inline void nfp_net_debugfs_destroy(void)
896 {
897 }
898 
899 static inline struct dentry *nfp_net_debugfs_device_add(struct pci_dev *pdev)
900 {
901 	return NULL;
902 }
903 
904 static inline void
905 nfp_net_debugfs_vnic_add(struct nfp_net *nn, struct dentry *ddir)
906 {
907 }
908 
909 static inline void nfp_net_debugfs_dir_clean(struct dentry **dir)
910 {
911 }
912 #endif /* CONFIG_NFP_DEBUG */
913 
914 #endif /* _NFP_NET_H_ */
915