1 // SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 2 /* Copyright (C) 2015-2019 Netronome Systems, Inc. */ 3 4 #include <linux/bpf_trace.h> 5 #include <linux/netdevice.h> 6 7 #include "../nfp_app.h" 8 #include "../nfp_net.h" 9 #include "../nfp_net_dp.h" 10 #include "../nfp_net_xsk.h" 11 #include "../crypto/crypto.h" 12 #include "../crypto/fw.h" 13 #include "nfd3.h" 14 15 /* Transmit processing 16 * 17 * One queue controller peripheral queue is used for transmit. The 18 * driver en-queues packets for transmit by advancing the write 19 * pointer. The device indicates that packets have transmitted by 20 * advancing the read pointer. The driver maintains a local copy of 21 * the read and write pointer in @struct nfp_net_tx_ring. The driver 22 * keeps @wr_p in sync with the queue controller write pointer and can 23 * determine how many packets have been transmitted by comparing its 24 * copy of the read pointer @rd_p with the read pointer maintained by 25 * the queue controller peripheral. 26 */ 27 28 /* Wrappers for deciding when to stop and restart TX queues */ 29 static int nfp_nfd3_tx_ring_should_wake(struct nfp_net_tx_ring *tx_ring) 30 { 31 return !nfp_net_tx_full(tx_ring, MAX_SKB_FRAGS * 4); 32 } 33 34 static int nfp_nfd3_tx_ring_should_stop(struct nfp_net_tx_ring *tx_ring) 35 { 36 return nfp_net_tx_full(tx_ring, MAX_SKB_FRAGS + 1); 37 } 38 39 /** 40 * nfp_nfd3_tx_ring_stop() - stop tx ring 41 * @nd_q: netdev queue 42 * @tx_ring: driver tx queue structure 43 * 44 * Safely stop TX ring. Remember that while we are running .start_xmit() 45 * someone else may be cleaning the TX ring completions so we need to be 46 * extra careful here. 47 */ 48 static void 49 nfp_nfd3_tx_ring_stop(struct netdev_queue *nd_q, 50 struct nfp_net_tx_ring *tx_ring) 51 { 52 netif_tx_stop_queue(nd_q); 53 54 /* We can race with the TX completion out of NAPI so recheck */ 55 smp_mb(); 56 if (unlikely(nfp_nfd3_tx_ring_should_wake(tx_ring))) 57 netif_tx_start_queue(nd_q); 58 } 59 60 /** 61 * nfp_nfd3_tx_tso() - Set up Tx descriptor for LSO 62 * @r_vec: per-ring structure 63 * @txbuf: Pointer to driver soft TX descriptor 64 * @txd: Pointer to HW TX descriptor 65 * @skb: Pointer to SKB 66 * @md_bytes: Prepend length 67 * 68 * Set up Tx descriptor for LSO, do nothing for non-LSO skbs. 69 * Return error on packet header greater than maximum supported LSO header size. 70 */ 71 static void 72 nfp_nfd3_tx_tso(struct nfp_net_r_vector *r_vec, struct nfp_nfd3_tx_buf *txbuf, 73 struct nfp_nfd3_tx_desc *txd, struct sk_buff *skb, u32 md_bytes) 74 { 75 u32 l3_offset, l4_offset, hdrlen; 76 u16 mss; 77 78 if (!skb_is_gso(skb)) 79 return; 80 81 if (!skb->encapsulation) { 82 l3_offset = skb_network_offset(skb); 83 l4_offset = skb_transport_offset(skb); 84 hdrlen = skb_tcp_all_headers(skb); 85 } else { 86 l3_offset = skb_inner_network_offset(skb); 87 l4_offset = skb_inner_transport_offset(skb); 88 hdrlen = skb_inner_tcp_all_headers(skb); 89 } 90 91 txbuf->pkt_cnt = skb_shinfo(skb)->gso_segs; 92 txbuf->real_len += hdrlen * (txbuf->pkt_cnt - 1); 93 94 mss = skb_shinfo(skb)->gso_size & NFD3_DESC_TX_MSS_MASK; 95 txd->l3_offset = l3_offset - md_bytes; 96 txd->l4_offset = l4_offset - md_bytes; 97 txd->lso_hdrlen = hdrlen - md_bytes; 98 txd->mss = cpu_to_le16(mss); 99 txd->flags |= NFD3_DESC_TX_LSO; 100 101 u64_stats_update_begin(&r_vec->tx_sync); 102 r_vec->tx_lso++; 103 u64_stats_update_end(&r_vec->tx_sync); 104 } 105 106 /** 107 * nfp_nfd3_tx_csum() - Set TX CSUM offload flags in TX descriptor 108 * @dp: NFP Net data path struct 109 * @r_vec: per-ring structure 110 * @txbuf: Pointer to driver soft TX descriptor 111 * @txd: Pointer to TX descriptor 112 * @skb: Pointer to SKB 113 * 114 * This function sets the TX checksum flags in the TX descriptor based 115 * on the configuration and the protocol of the packet to be transmitted. 116 */ 117 static void 118 nfp_nfd3_tx_csum(struct nfp_net_dp *dp, struct nfp_net_r_vector *r_vec, 119 struct nfp_nfd3_tx_buf *txbuf, struct nfp_nfd3_tx_desc *txd, 120 struct sk_buff *skb) 121 { 122 struct ipv6hdr *ipv6h; 123 struct iphdr *iph; 124 u8 l4_hdr; 125 126 if (!(dp->ctrl & NFP_NET_CFG_CTRL_TXCSUM)) 127 return; 128 129 if (skb->ip_summed != CHECKSUM_PARTIAL) 130 return; 131 132 txd->flags |= NFD3_DESC_TX_CSUM; 133 if (skb->encapsulation) 134 txd->flags |= NFD3_DESC_TX_ENCAP; 135 136 iph = skb->encapsulation ? inner_ip_hdr(skb) : ip_hdr(skb); 137 ipv6h = skb->encapsulation ? inner_ipv6_hdr(skb) : ipv6_hdr(skb); 138 139 if (iph->version == 4) { 140 txd->flags |= NFD3_DESC_TX_IP4_CSUM; 141 l4_hdr = iph->protocol; 142 } else if (ipv6h->version == 6) { 143 l4_hdr = ipv6h->nexthdr; 144 } else { 145 nn_dp_warn(dp, "partial checksum but ipv=%x!\n", iph->version); 146 return; 147 } 148 149 switch (l4_hdr) { 150 case IPPROTO_TCP: 151 txd->flags |= NFD3_DESC_TX_TCP_CSUM; 152 break; 153 case IPPROTO_UDP: 154 txd->flags |= NFD3_DESC_TX_UDP_CSUM; 155 break; 156 default: 157 nn_dp_warn(dp, "partial checksum but l4 proto=%x!\n", l4_hdr); 158 return; 159 } 160 161 u64_stats_update_begin(&r_vec->tx_sync); 162 if (skb->encapsulation) 163 r_vec->hw_csum_tx_inner += txbuf->pkt_cnt; 164 else 165 r_vec->hw_csum_tx += txbuf->pkt_cnt; 166 u64_stats_update_end(&r_vec->tx_sync); 167 } 168 169 static int nfp_nfd3_prep_tx_meta(struct sk_buff *skb, u64 tls_handle) 170 { 171 struct metadata_dst *md_dst = skb_metadata_dst(skb); 172 unsigned char *data; 173 u32 meta_id = 0; 174 int md_bytes; 175 176 if (likely(!md_dst && !tls_handle)) 177 return 0; 178 if (unlikely(md_dst && md_dst->type != METADATA_HW_PORT_MUX)) { 179 if (!tls_handle) 180 return 0; 181 md_dst = NULL; 182 } 183 184 md_bytes = 4 + !!md_dst * 4 + !!tls_handle * 8; 185 186 if (unlikely(skb_cow_head(skb, md_bytes))) 187 return -ENOMEM; 188 189 meta_id = 0; 190 data = skb_push(skb, md_bytes) + md_bytes; 191 if (md_dst) { 192 data -= 4; 193 put_unaligned_be32(md_dst->u.port_info.port_id, data); 194 meta_id = NFP_NET_META_PORTID; 195 } 196 if (tls_handle) { 197 /* conn handle is opaque, we just use u64 to be able to quickly 198 * compare it to zero 199 */ 200 data -= 8; 201 memcpy(data, &tls_handle, sizeof(tls_handle)); 202 meta_id <<= NFP_NET_META_FIELD_SIZE; 203 meta_id |= NFP_NET_META_CONN_HANDLE; 204 } 205 206 data -= 4; 207 put_unaligned_be32(meta_id, data); 208 209 return md_bytes; 210 } 211 212 /** 213 * nfp_nfd3_tx() - Main transmit entry point 214 * @skb: SKB to transmit 215 * @netdev: netdev structure 216 * 217 * Return: NETDEV_TX_OK on success. 218 */ 219 netdev_tx_t nfp_nfd3_tx(struct sk_buff *skb, struct net_device *netdev) 220 { 221 struct nfp_net *nn = netdev_priv(netdev); 222 int f, nr_frags, wr_idx, md_bytes; 223 struct nfp_net_tx_ring *tx_ring; 224 struct nfp_net_r_vector *r_vec; 225 struct nfp_nfd3_tx_buf *txbuf; 226 struct nfp_nfd3_tx_desc *txd; 227 struct netdev_queue *nd_q; 228 const skb_frag_t *frag; 229 struct nfp_net_dp *dp; 230 dma_addr_t dma_addr; 231 unsigned int fsize; 232 u64 tls_handle = 0; 233 u16 qidx; 234 235 dp = &nn->dp; 236 qidx = skb_get_queue_mapping(skb); 237 tx_ring = &dp->tx_rings[qidx]; 238 r_vec = tx_ring->r_vec; 239 240 nr_frags = skb_shinfo(skb)->nr_frags; 241 242 if (unlikely(nfp_net_tx_full(tx_ring, nr_frags + 1))) { 243 nn_dp_warn(dp, "TX ring %d busy. wrp=%u rdp=%u\n", 244 qidx, tx_ring->wr_p, tx_ring->rd_p); 245 nd_q = netdev_get_tx_queue(dp->netdev, qidx); 246 netif_tx_stop_queue(nd_q); 247 nfp_net_tx_xmit_more_flush(tx_ring); 248 u64_stats_update_begin(&r_vec->tx_sync); 249 r_vec->tx_busy++; 250 u64_stats_update_end(&r_vec->tx_sync); 251 return NETDEV_TX_BUSY; 252 } 253 254 skb = nfp_net_tls_tx(dp, r_vec, skb, &tls_handle, &nr_frags); 255 if (unlikely(!skb)) { 256 nfp_net_tx_xmit_more_flush(tx_ring); 257 return NETDEV_TX_OK; 258 } 259 260 md_bytes = nfp_nfd3_prep_tx_meta(skb, tls_handle); 261 if (unlikely(md_bytes < 0)) 262 goto err_flush; 263 264 /* Start with the head skbuf */ 265 dma_addr = dma_map_single(dp->dev, skb->data, skb_headlen(skb), 266 DMA_TO_DEVICE); 267 if (dma_mapping_error(dp->dev, dma_addr)) 268 goto err_dma_err; 269 270 wr_idx = D_IDX(tx_ring, tx_ring->wr_p); 271 272 /* Stash the soft descriptor of the head then initialize it */ 273 txbuf = &tx_ring->txbufs[wr_idx]; 274 txbuf->skb = skb; 275 txbuf->dma_addr = dma_addr; 276 txbuf->fidx = -1; 277 txbuf->pkt_cnt = 1; 278 txbuf->real_len = skb->len; 279 280 /* Build TX descriptor */ 281 txd = &tx_ring->txds[wr_idx]; 282 txd->offset_eop = (nr_frags ? 0 : NFD3_DESC_TX_EOP) | md_bytes; 283 txd->dma_len = cpu_to_le16(skb_headlen(skb)); 284 nfp_desc_set_dma_addr_40b(txd, dma_addr); 285 txd->data_len = cpu_to_le16(skb->len); 286 287 txd->flags = 0; 288 txd->mss = 0; 289 txd->lso_hdrlen = 0; 290 291 /* Do not reorder - tso may adjust pkt cnt, vlan may override fields */ 292 nfp_nfd3_tx_tso(r_vec, txbuf, txd, skb, md_bytes); 293 nfp_nfd3_tx_csum(dp, r_vec, txbuf, txd, skb); 294 if (skb_vlan_tag_present(skb) && dp->ctrl & NFP_NET_CFG_CTRL_TXVLAN) { 295 txd->flags |= NFD3_DESC_TX_VLAN; 296 txd->vlan = cpu_to_le16(skb_vlan_tag_get(skb)); 297 } 298 299 /* Gather DMA */ 300 if (nr_frags > 0) { 301 __le64 second_half; 302 303 /* all descs must match except for in addr, length and eop */ 304 second_half = txd->vals8[1]; 305 306 for (f = 0; f < nr_frags; f++) { 307 frag = &skb_shinfo(skb)->frags[f]; 308 fsize = skb_frag_size(frag); 309 310 dma_addr = skb_frag_dma_map(dp->dev, frag, 0, 311 fsize, DMA_TO_DEVICE); 312 if (dma_mapping_error(dp->dev, dma_addr)) 313 goto err_unmap; 314 315 wr_idx = D_IDX(tx_ring, wr_idx + 1); 316 tx_ring->txbufs[wr_idx].skb = skb; 317 tx_ring->txbufs[wr_idx].dma_addr = dma_addr; 318 tx_ring->txbufs[wr_idx].fidx = f; 319 320 txd = &tx_ring->txds[wr_idx]; 321 txd->dma_len = cpu_to_le16(fsize); 322 nfp_desc_set_dma_addr_40b(txd, dma_addr); 323 txd->offset_eop = md_bytes | 324 ((f == nr_frags - 1) ? NFD3_DESC_TX_EOP : 0); 325 txd->vals8[1] = second_half; 326 } 327 328 u64_stats_update_begin(&r_vec->tx_sync); 329 r_vec->tx_gather++; 330 u64_stats_update_end(&r_vec->tx_sync); 331 } 332 333 skb_tx_timestamp(skb); 334 335 nd_q = netdev_get_tx_queue(dp->netdev, tx_ring->idx); 336 337 tx_ring->wr_p += nr_frags + 1; 338 if (nfp_nfd3_tx_ring_should_stop(tx_ring)) 339 nfp_nfd3_tx_ring_stop(nd_q, tx_ring); 340 341 tx_ring->wr_ptr_add += nr_frags + 1; 342 if (__netdev_tx_sent_queue(nd_q, txbuf->real_len, netdev_xmit_more())) 343 nfp_net_tx_xmit_more_flush(tx_ring); 344 345 return NETDEV_TX_OK; 346 347 err_unmap: 348 while (--f >= 0) { 349 frag = &skb_shinfo(skb)->frags[f]; 350 dma_unmap_page(dp->dev, tx_ring->txbufs[wr_idx].dma_addr, 351 skb_frag_size(frag), DMA_TO_DEVICE); 352 tx_ring->txbufs[wr_idx].skb = NULL; 353 tx_ring->txbufs[wr_idx].dma_addr = 0; 354 tx_ring->txbufs[wr_idx].fidx = -2; 355 wr_idx = wr_idx - 1; 356 if (wr_idx < 0) 357 wr_idx += tx_ring->cnt; 358 } 359 dma_unmap_single(dp->dev, tx_ring->txbufs[wr_idx].dma_addr, 360 skb_headlen(skb), DMA_TO_DEVICE); 361 tx_ring->txbufs[wr_idx].skb = NULL; 362 tx_ring->txbufs[wr_idx].dma_addr = 0; 363 tx_ring->txbufs[wr_idx].fidx = -2; 364 err_dma_err: 365 nn_dp_warn(dp, "Failed to map DMA TX buffer\n"); 366 err_flush: 367 nfp_net_tx_xmit_more_flush(tx_ring); 368 u64_stats_update_begin(&r_vec->tx_sync); 369 r_vec->tx_errors++; 370 u64_stats_update_end(&r_vec->tx_sync); 371 nfp_net_tls_tx_undo(skb, tls_handle); 372 dev_kfree_skb_any(skb); 373 return NETDEV_TX_OK; 374 } 375 376 /** 377 * nfp_nfd3_tx_complete() - Handled completed TX packets 378 * @tx_ring: TX ring structure 379 * @budget: NAPI budget (only used as bool to determine if in NAPI context) 380 */ 381 void nfp_nfd3_tx_complete(struct nfp_net_tx_ring *tx_ring, int budget) 382 { 383 struct nfp_net_r_vector *r_vec = tx_ring->r_vec; 384 struct nfp_net_dp *dp = &r_vec->nfp_net->dp; 385 u32 done_pkts = 0, done_bytes = 0; 386 struct netdev_queue *nd_q; 387 u32 qcp_rd_p; 388 int todo; 389 390 if (tx_ring->wr_p == tx_ring->rd_p) 391 return; 392 393 /* Work out how many descriptors have been transmitted */ 394 qcp_rd_p = nfp_net_read_tx_cmpl(tx_ring, dp); 395 396 if (qcp_rd_p == tx_ring->qcp_rd_p) 397 return; 398 399 todo = D_IDX(tx_ring, qcp_rd_p - tx_ring->qcp_rd_p); 400 401 while (todo--) { 402 const skb_frag_t *frag; 403 struct nfp_nfd3_tx_buf *tx_buf; 404 struct sk_buff *skb; 405 int fidx, nr_frags; 406 int idx; 407 408 idx = D_IDX(tx_ring, tx_ring->rd_p++); 409 tx_buf = &tx_ring->txbufs[idx]; 410 411 skb = tx_buf->skb; 412 if (!skb) 413 continue; 414 415 nr_frags = skb_shinfo(skb)->nr_frags; 416 fidx = tx_buf->fidx; 417 418 if (fidx == -1) { 419 /* unmap head */ 420 dma_unmap_single(dp->dev, tx_buf->dma_addr, 421 skb_headlen(skb), DMA_TO_DEVICE); 422 423 done_pkts += tx_buf->pkt_cnt; 424 done_bytes += tx_buf->real_len; 425 } else { 426 /* unmap fragment */ 427 frag = &skb_shinfo(skb)->frags[fidx]; 428 dma_unmap_page(dp->dev, tx_buf->dma_addr, 429 skb_frag_size(frag), DMA_TO_DEVICE); 430 } 431 432 /* check for last gather fragment */ 433 if (fidx == nr_frags - 1) 434 napi_consume_skb(skb, budget); 435 436 tx_buf->dma_addr = 0; 437 tx_buf->skb = NULL; 438 tx_buf->fidx = -2; 439 } 440 441 tx_ring->qcp_rd_p = qcp_rd_p; 442 443 u64_stats_update_begin(&r_vec->tx_sync); 444 r_vec->tx_bytes += done_bytes; 445 r_vec->tx_pkts += done_pkts; 446 u64_stats_update_end(&r_vec->tx_sync); 447 448 if (!dp->netdev) 449 return; 450 451 nd_q = netdev_get_tx_queue(dp->netdev, tx_ring->idx); 452 netdev_tx_completed_queue(nd_q, done_pkts, done_bytes); 453 if (nfp_nfd3_tx_ring_should_wake(tx_ring)) { 454 /* Make sure TX thread will see updated tx_ring->rd_p */ 455 smp_mb(); 456 457 if (unlikely(netif_tx_queue_stopped(nd_q))) 458 netif_tx_wake_queue(nd_q); 459 } 460 461 WARN_ONCE(tx_ring->wr_p - tx_ring->rd_p > tx_ring->cnt, 462 "TX ring corruption rd_p=%u wr_p=%u cnt=%u\n", 463 tx_ring->rd_p, tx_ring->wr_p, tx_ring->cnt); 464 } 465 466 static bool nfp_nfd3_xdp_complete(struct nfp_net_tx_ring *tx_ring) 467 { 468 struct nfp_net_r_vector *r_vec = tx_ring->r_vec; 469 struct nfp_net_dp *dp = &r_vec->nfp_net->dp; 470 u32 done_pkts = 0, done_bytes = 0; 471 bool done_all; 472 int idx, todo; 473 u32 qcp_rd_p; 474 475 /* Work out how many descriptors have been transmitted */ 476 qcp_rd_p = nfp_net_read_tx_cmpl(tx_ring, dp); 477 478 if (qcp_rd_p == tx_ring->qcp_rd_p) 479 return true; 480 481 todo = D_IDX(tx_ring, qcp_rd_p - tx_ring->qcp_rd_p); 482 483 done_all = todo <= NFP_NET_XDP_MAX_COMPLETE; 484 todo = min(todo, NFP_NET_XDP_MAX_COMPLETE); 485 486 tx_ring->qcp_rd_p = D_IDX(tx_ring, tx_ring->qcp_rd_p + todo); 487 488 done_pkts = todo; 489 while (todo--) { 490 idx = D_IDX(tx_ring, tx_ring->rd_p); 491 tx_ring->rd_p++; 492 493 done_bytes += tx_ring->txbufs[idx].real_len; 494 } 495 496 u64_stats_update_begin(&r_vec->tx_sync); 497 r_vec->tx_bytes += done_bytes; 498 r_vec->tx_pkts += done_pkts; 499 u64_stats_update_end(&r_vec->tx_sync); 500 501 WARN_ONCE(tx_ring->wr_p - tx_ring->rd_p > tx_ring->cnt, 502 "XDP TX ring corruption rd_p=%u wr_p=%u cnt=%u\n", 503 tx_ring->rd_p, tx_ring->wr_p, tx_ring->cnt); 504 505 return done_all; 506 } 507 508 /* Receive processing 509 */ 510 511 static void * 512 nfp_nfd3_napi_alloc_one(struct nfp_net_dp *dp, dma_addr_t *dma_addr) 513 { 514 void *frag; 515 516 if (!dp->xdp_prog) { 517 frag = napi_alloc_frag(dp->fl_bufsz); 518 if (unlikely(!frag)) 519 return NULL; 520 } else { 521 struct page *page; 522 523 page = dev_alloc_page(); 524 if (unlikely(!page)) 525 return NULL; 526 frag = page_address(page); 527 } 528 529 *dma_addr = nfp_net_dma_map_rx(dp, frag); 530 if (dma_mapping_error(dp->dev, *dma_addr)) { 531 nfp_net_free_frag(frag, dp->xdp_prog); 532 nn_dp_warn(dp, "Failed to map DMA RX buffer\n"); 533 return NULL; 534 } 535 536 return frag; 537 } 538 539 /** 540 * nfp_nfd3_rx_give_one() - Put mapped skb on the software and hardware rings 541 * @dp: NFP Net data path struct 542 * @rx_ring: RX ring structure 543 * @frag: page fragment buffer 544 * @dma_addr: DMA address of skb mapping 545 */ 546 static void 547 nfp_nfd3_rx_give_one(const struct nfp_net_dp *dp, 548 struct nfp_net_rx_ring *rx_ring, 549 void *frag, dma_addr_t dma_addr) 550 { 551 unsigned int wr_idx; 552 553 wr_idx = D_IDX(rx_ring, rx_ring->wr_p); 554 555 nfp_net_dma_sync_dev_rx(dp, dma_addr); 556 557 /* Stash SKB and DMA address away */ 558 rx_ring->rxbufs[wr_idx].frag = frag; 559 rx_ring->rxbufs[wr_idx].dma_addr = dma_addr; 560 561 /* Fill freelist descriptor */ 562 rx_ring->rxds[wr_idx].fld.reserved = 0; 563 rx_ring->rxds[wr_idx].fld.meta_len_dd = 0; 564 /* DMA address is expanded to 48-bit width in freelist for NFP3800, 565 * so the *_48b macro is used accordingly, it's also OK to fill 566 * a 40-bit address since the top 8 bits are get set to 0. 567 */ 568 nfp_desc_set_dma_addr_48b(&rx_ring->rxds[wr_idx].fld, 569 dma_addr + dp->rx_dma_off); 570 571 rx_ring->wr_p++; 572 if (!(rx_ring->wr_p % NFP_NET_FL_BATCH)) { 573 /* Update write pointer of the freelist queue. Make 574 * sure all writes are flushed before telling the hardware. 575 */ 576 wmb(); 577 nfp_qcp_wr_ptr_add(rx_ring->qcp_fl, NFP_NET_FL_BATCH); 578 } 579 } 580 581 /** 582 * nfp_nfd3_rx_ring_fill_freelist() - Give buffers from the ring to FW 583 * @dp: NFP Net data path struct 584 * @rx_ring: RX ring to fill 585 */ 586 void nfp_nfd3_rx_ring_fill_freelist(struct nfp_net_dp *dp, 587 struct nfp_net_rx_ring *rx_ring) 588 { 589 unsigned int i; 590 591 if (nfp_net_has_xsk_pool_slow(dp, rx_ring->idx)) 592 return nfp_net_xsk_rx_ring_fill_freelist(rx_ring); 593 594 for (i = 0; i < rx_ring->cnt - 1; i++) 595 nfp_nfd3_rx_give_one(dp, rx_ring, rx_ring->rxbufs[i].frag, 596 rx_ring->rxbufs[i].dma_addr); 597 } 598 599 /** 600 * nfp_nfd3_rx_csum_has_errors() - group check if rxd has any csum errors 601 * @flags: RX descriptor flags field in CPU byte order 602 */ 603 static int nfp_nfd3_rx_csum_has_errors(u16 flags) 604 { 605 u16 csum_all_checked, csum_all_ok; 606 607 csum_all_checked = flags & __PCIE_DESC_RX_CSUM_ALL; 608 csum_all_ok = flags & __PCIE_DESC_RX_CSUM_ALL_OK; 609 610 return csum_all_checked != (csum_all_ok << PCIE_DESC_RX_CSUM_OK_SHIFT); 611 } 612 613 /** 614 * nfp_nfd3_rx_csum() - set SKB checksum field based on RX descriptor flags 615 * @dp: NFP Net data path struct 616 * @r_vec: per-ring structure 617 * @rxd: Pointer to RX descriptor 618 * @meta: Parsed metadata prepend 619 * @skb: Pointer to SKB 620 */ 621 void 622 nfp_nfd3_rx_csum(const struct nfp_net_dp *dp, struct nfp_net_r_vector *r_vec, 623 const struct nfp_net_rx_desc *rxd, 624 const struct nfp_meta_parsed *meta, struct sk_buff *skb) 625 { 626 skb_checksum_none_assert(skb); 627 628 if (!(dp->netdev->features & NETIF_F_RXCSUM)) 629 return; 630 631 if (meta->csum_type) { 632 skb->ip_summed = meta->csum_type; 633 skb->csum = meta->csum; 634 u64_stats_update_begin(&r_vec->rx_sync); 635 r_vec->hw_csum_rx_complete++; 636 u64_stats_update_end(&r_vec->rx_sync); 637 return; 638 } 639 640 if (nfp_nfd3_rx_csum_has_errors(le16_to_cpu(rxd->rxd.flags))) { 641 u64_stats_update_begin(&r_vec->rx_sync); 642 r_vec->hw_csum_rx_error++; 643 u64_stats_update_end(&r_vec->rx_sync); 644 return; 645 } 646 647 /* Assume that the firmware will never report inner CSUM_OK unless outer 648 * L4 headers were successfully parsed. FW will always report zero UDP 649 * checksum as CSUM_OK. 650 */ 651 if (rxd->rxd.flags & PCIE_DESC_RX_TCP_CSUM_OK || 652 rxd->rxd.flags & PCIE_DESC_RX_UDP_CSUM_OK) { 653 __skb_incr_checksum_unnecessary(skb); 654 u64_stats_update_begin(&r_vec->rx_sync); 655 r_vec->hw_csum_rx_ok++; 656 u64_stats_update_end(&r_vec->rx_sync); 657 } 658 659 if (rxd->rxd.flags & PCIE_DESC_RX_I_TCP_CSUM_OK || 660 rxd->rxd.flags & PCIE_DESC_RX_I_UDP_CSUM_OK) { 661 __skb_incr_checksum_unnecessary(skb); 662 u64_stats_update_begin(&r_vec->rx_sync); 663 r_vec->hw_csum_rx_inner_ok++; 664 u64_stats_update_end(&r_vec->rx_sync); 665 } 666 } 667 668 static void 669 nfp_nfd3_set_hash(struct net_device *netdev, struct nfp_meta_parsed *meta, 670 unsigned int type, __be32 *hash) 671 { 672 if (!(netdev->features & NETIF_F_RXHASH)) 673 return; 674 675 switch (type) { 676 case NFP_NET_RSS_IPV4: 677 case NFP_NET_RSS_IPV6: 678 case NFP_NET_RSS_IPV6_EX: 679 meta->hash_type = PKT_HASH_TYPE_L3; 680 break; 681 default: 682 meta->hash_type = PKT_HASH_TYPE_L4; 683 break; 684 } 685 686 meta->hash = get_unaligned_be32(hash); 687 } 688 689 static void 690 nfp_nfd3_set_hash_desc(struct net_device *netdev, struct nfp_meta_parsed *meta, 691 void *data, struct nfp_net_rx_desc *rxd) 692 { 693 struct nfp_net_rx_hash *rx_hash = data; 694 695 if (!(rxd->rxd.flags & PCIE_DESC_RX_RSS)) 696 return; 697 698 nfp_nfd3_set_hash(netdev, meta, get_unaligned_be32(&rx_hash->hash_type), 699 &rx_hash->hash); 700 } 701 702 bool 703 nfp_nfd3_parse_meta(struct net_device *netdev, struct nfp_meta_parsed *meta, 704 void *data, void *pkt, unsigned int pkt_len, int meta_len) 705 { 706 u32 meta_info; 707 708 meta_info = get_unaligned_be32(data); 709 data += 4; 710 711 while (meta_info) { 712 switch (meta_info & NFP_NET_META_FIELD_MASK) { 713 case NFP_NET_META_HASH: 714 meta_info >>= NFP_NET_META_FIELD_SIZE; 715 nfp_nfd3_set_hash(netdev, meta, 716 meta_info & NFP_NET_META_FIELD_MASK, 717 (__be32 *)data); 718 data += 4; 719 break; 720 case NFP_NET_META_MARK: 721 meta->mark = get_unaligned_be32(data); 722 data += 4; 723 break; 724 case NFP_NET_META_PORTID: 725 meta->portid = get_unaligned_be32(data); 726 data += 4; 727 break; 728 case NFP_NET_META_CSUM: 729 meta->csum_type = CHECKSUM_COMPLETE; 730 meta->csum = 731 (__force __wsum)__get_unaligned_cpu32(data); 732 data += 4; 733 break; 734 case NFP_NET_META_RESYNC_INFO: 735 if (nfp_net_tls_rx_resync_req(netdev, data, pkt, 736 pkt_len)) 737 return false; 738 data += sizeof(struct nfp_net_tls_resync_req); 739 break; 740 default: 741 return true; 742 } 743 744 meta_info >>= NFP_NET_META_FIELD_SIZE; 745 } 746 747 return data != pkt; 748 } 749 750 static void 751 nfp_nfd3_rx_drop(const struct nfp_net_dp *dp, struct nfp_net_r_vector *r_vec, 752 struct nfp_net_rx_ring *rx_ring, struct nfp_net_rx_buf *rxbuf, 753 struct sk_buff *skb) 754 { 755 u64_stats_update_begin(&r_vec->rx_sync); 756 r_vec->rx_drops++; 757 /* If we have both skb and rxbuf the replacement buffer allocation 758 * must have failed, count this as an alloc failure. 759 */ 760 if (skb && rxbuf) 761 r_vec->rx_replace_buf_alloc_fail++; 762 u64_stats_update_end(&r_vec->rx_sync); 763 764 /* skb is build based on the frag, free_skb() would free the frag 765 * so to be able to reuse it we need an extra ref. 766 */ 767 if (skb && rxbuf && skb->head == rxbuf->frag) 768 page_ref_inc(virt_to_head_page(rxbuf->frag)); 769 if (rxbuf) 770 nfp_nfd3_rx_give_one(dp, rx_ring, rxbuf->frag, rxbuf->dma_addr); 771 if (skb) 772 dev_kfree_skb_any(skb); 773 } 774 775 static bool 776 nfp_nfd3_tx_xdp_buf(struct nfp_net_dp *dp, struct nfp_net_rx_ring *rx_ring, 777 struct nfp_net_tx_ring *tx_ring, 778 struct nfp_net_rx_buf *rxbuf, unsigned int dma_off, 779 unsigned int pkt_len, bool *completed) 780 { 781 unsigned int dma_map_sz = dp->fl_bufsz - NFP_NET_RX_BUF_NON_DATA; 782 struct nfp_nfd3_tx_buf *txbuf; 783 struct nfp_nfd3_tx_desc *txd; 784 int wr_idx; 785 786 /* Reject if xdp_adjust_tail grow packet beyond DMA area */ 787 if (pkt_len + dma_off > dma_map_sz) 788 return false; 789 790 if (unlikely(nfp_net_tx_full(tx_ring, 1))) { 791 if (!*completed) { 792 nfp_nfd3_xdp_complete(tx_ring); 793 *completed = true; 794 } 795 796 if (unlikely(nfp_net_tx_full(tx_ring, 1))) { 797 nfp_nfd3_rx_drop(dp, rx_ring->r_vec, rx_ring, rxbuf, 798 NULL); 799 return false; 800 } 801 } 802 803 wr_idx = D_IDX(tx_ring, tx_ring->wr_p); 804 805 /* Stash the soft descriptor of the head then initialize it */ 806 txbuf = &tx_ring->txbufs[wr_idx]; 807 808 nfp_nfd3_rx_give_one(dp, rx_ring, txbuf->frag, txbuf->dma_addr); 809 810 txbuf->frag = rxbuf->frag; 811 txbuf->dma_addr = rxbuf->dma_addr; 812 txbuf->fidx = -1; 813 txbuf->pkt_cnt = 1; 814 txbuf->real_len = pkt_len; 815 816 dma_sync_single_for_device(dp->dev, rxbuf->dma_addr + dma_off, 817 pkt_len, DMA_BIDIRECTIONAL); 818 819 /* Build TX descriptor */ 820 txd = &tx_ring->txds[wr_idx]; 821 txd->offset_eop = NFD3_DESC_TX_EOP; 822 txd->dma_len = cpu_to_le16(pkt_len); 823 nfp_desc_set_dma_addr_40b(txd, rxbuf->dma_addr + dma_off); 824 txd->data_len = cpu_to_le16(pkt_len); 825 826 txd->flags = 0; 827 txd->mss = 0; 828 txd->lso_hdrlen = 0; 829 830 tx_ring->wr_p++; 831 tx_ring->wr_ptr_add++; 832 return true; 833 } 834 835 /** 836 * nfp_nfd3_rx() - receive up to @budget packets on @rx_ring 837 * @rx_ring: RX ring to receive from 838 * @budget: NAPI budget 839 * 840 * Note, this function is separated out from the napi poll function to 841 * more cleanly separate packet receive code from other bookkeeping 842 * functions performed in the napi poll function. 843 * 844 * Return: Number of packets received. 845 */ 846 static int nfp_nfd3_rx(struct nfp_net_rx_ring *rx_ring, int budget) 847 { 848 struct nfp_net_r_vector *r_vec = rx_ring->r_vec; 849 struct nfp_net_dp *dp = &r_vec->nfp_net->dp; 850 struct nfp_net_tx_ring *tx_ring; 851 struct bpf_prog *xdp_prog; 852 bool xdp_tx_cmpl = false; 853 unsigned int true_bufsz; 854 struct sk_buff *skb; 855 int pkts_polled = 0; 856 struct xdp_buff xdp; 857 int idx; 858 859 xdp_prog = READ_ONCE(dp->xdp_prog); 860 true_bufsz = xdp_prog ? PAGE_SIZE : dp->fl_bufsz; 861 xdp_init_buff(&xdp, PAGE_SIZE - NFP_NET_RX_BUF_HEADROOM, 862 &rx_ring->xdp_rxq); 863 tx_ring = r_vec->xdp_ring; 864 865 while (pkts_polled < budget) { 866 unsigned int meta_len, data_len, meta_off, pkt_len, pkt_off; 867 struct nfp_net_rx_buf *rxbuf; 868 struct nfp_net_rx_desc *rxd; 869 struct nfp_meta_parsed meta; 870 bool redir_egress = false; 871 struct net_device *netdev; 872 dma_addr_t new_dma_addr; 873 u32 meta_len_xdp = 0; 874 void *new_frag; 875 876 idx = D_IDX(rx_ring, rx_ring->rd_p); 877 878 rxd = &rx_ring->rxds[idx]; 879 if (!(rxd->rxd.meta_len_dd & PCIE_DESC_RX_DD)) 880 break; 881 882 /* Memory barrier to ensure that we won't do other reads 883 * before the DD bit. 884 */ 885 dma_rmb(); 886 887 memset(&meta, 0, sizeof(meta)); 888 889 rx_ring->rd_p++; 890 pkts_polled++; 891 892 rxbuf = &rx_ring->rxbufs[idx]; 893 /* < meta_len > 894 * <-- [rx_offset] --> 895 * --------------------------------------------------------- 896 * | [XX] | metadata | packet | XXXX | 897 * --------------------------------------------------------- 898 * <---------------- data_len ---------------> 899 * 900 * The rx_offset is fixed for all packets, the meta_len can vary 901 * on a packet by packet basis. If rx_offset is set to zero 902 * (_RX_OFFSET_DYNAMIC) metadata starts at the beginning of the 903 * buffer and is immediately followed by the packet (no [XX]). 904 */ 905 meta_len = rxd->rxd.meta_len_dd & PCIE_DESC_RX_META_LEN_MASK; 906 data_len = le16_to_cpu(rxd->rxd.data_len); 907 pkt_len = data_len - meta_len; 908 909 pkt_off = NFP_NET_RX_BUF_HEADROOM + dp->rx_dma_off; 910 if (dp->rx_offset == NFP_NET_CFG_RX_OFFSET_DYNAMIC) 911 pkt_off += meta_len; 912 else 913 pkt_off += dp->rx_offset; 914 meta_off = pkt_off - meta_len; 915 916 /* Stats update */ 917 u64_stats_update_begin(&r_vec->rx_sync); 918 r_vec->rx_pkts++; 919 r_vec->rx_bytes += pkt_len; 920 u64_stats_update_end(&r_vec->rx_sync); 921 922 if (unlikely(meta_len > NFP_NET_MAX_PREPEND || 923 (dp->rx_offset && meta_len > dp->rx_offset))) { 924 nn_dp_warn(dp, "oversized RX packet metadata %u\n", 925 meta_len); 926 nfp_nfd3_rx_drop(dp, r_vec, rx_ring, rxbuf, NULL); 927 continue; 928 } 929 930 nfp_net_dma_sync_cpu_rx(dp, rxbuf->dma_addr + meta_off, 931 data_len); 932 933 if (!dp->chained_metadata_format) { 934 nfp_nfd3_set_hash_desc(dp->netdev, &meta, 935 rxbuf->frag + meta_off, rxd); 936 } else if (meta_len) { 937 if (unlikely(nfp_nfd3_parse_meta(dp->netdev, &meta, 938 rxbuf->frag + meta_off, 939 rxbuf->frag + pkt_off, 940 pkt_len, meta_len))) { 941 nn_dp_warn(dp, "invalid RX packet metadata\n"); 942 nfp_nfd3_rx_drop(dp, r_vec, rx_ring, rxbuf, 943 NULL); 944 continue; 945 } 946 } 947 948 if (xdp_prog && !meta.portid) { 949 void *orig_data = rxbuf->frag + pkt_off; 950 unsigned int dma_off; 951 int act; 952 953 xdp_prepare_buff(&xdp, 954 rxbuf->frag + NFP_NET_RX_BUF_HEADROOM, 955 pkt_off - NFP_NET_RX_BUF_HEADROOM, 956 pkt_len, true); 957 958 act = bpf_prog_run_xdp(xdp_prog, &xdp); 959 960 pkt_len = xdp.data_end - xdp.data; 961 pkt_off += xdp.data - orig_data; 962 963 switch (act) { 964 case XDP_PASS: 965 meta_len_xdp = xdp.data - xdp.data_meta; 966 break; 967 case XDP_TX: 968 dma_off = pkt_off - NFP_NET_RX_BUF_HEADROOM; 969 if (unlikely(!nfp_nfd3_tx_xdp_buf(dp, rx_ring, 970 tx_ring, 971 rxbuf, 972 dma_off, 973 pkt_len, 974 &xdp_tx_cmpl))) 975 trace_xdp_exception(dp->netdev, 976 xdp_prog, act); 977 continue; 978 default: 979 bpf_warn_invalid_xdp_action(dp->netdev, xdp_prog, act); 980 fallthrough; 981 case XDP_ABORTED: 982 trace_xdp_exception(dp->netdev, xdp_prog, act); 983 fallthrough; 984 case XDP_DROP: 985 nfp_nfd3_rx_give_one(dp, rx_ring, rxbuf->frag, 986 rxbuf->dma_addr); 987 continue; 988 } 989 } 990 991 if (likely(!meta.portid)) { 992 netdev = dp->netdev; 993 } else if (meta.portid == NFP_META_PORT_ID_CTRL) { 994 struct nfp_net *nn = netdev_priv(dp->netdev); 995 996 nfp_app_ctrl_rx_raw(nn->app, rxbuf->frag + pkt_off, 997 pkt_len); 998 nfp_nfd3_rx_give_one(dp, rx_ring, rxbuf->frag, 999 rxbuf->dma_addr); 1000 continue; 1001 } else { 1002 struct nfp_net *nn; 1003 1004 nn = netdev_priv(dp->netdev); 1005 netdev = nfp_app_dev_get(nn->app, meta.portid, 1006 &redir_egress); 1007 if (unlikely(!netdev)) { 1008 nfp_nfd3_rx_drop(dp, r_vec, rx_ring, rxbuf, 1009 NULL); 1010 continue; 1011 } 1012 1013 if (nfp_netdev_is_nfp_repr(netdev)) 1014 nfp_repr_inc_rx_stats(netdev, pkt_len); 1015 } 1016 1017 skb = build_skb(rxbuf->frag, true_bufsz); 1018 if (unlikely(!skb)) { 1019 nfp_nfd3_rx_drop(dp, r_vec, rx_ring, rxbuf, NULL); 1020 continue; 1021 } 1022 new_frag = nfp_nfd3_napi_alloc_one(dp, &new_dma_addr); 1023 if (unlikely(!new_frag)) { 1024 nfp_nfd3_rx_drop(dp, r_vec, rx_ring, rxbuf, skb); 1025 continue; 1026 } 1027 1028 nfp_net_dma_unmap_rx(dp, rxbuf->dma_addr); 1029 1030 nfp_nfd3_rx_give_one(dp, rx_ring, new_frag, new_dma_addr); 1031 1032 skb_reserve(skb, pkt_off); 1033 skb_put(skb, pkt_len); 1034 1035 skb->mark = meta.mark; 1036 skb_set_hash(skb, meta.hash, meta.hash_type); 1037 1038 skb_record_rx_queue(skb, rx_ring->idx); 1039 skb->protocol = eth_type_trans(skb, netdev); 1040 1041 nfp_nfd3_rx_csum(dp, r_vec, rxd, &meta, skb); 1042 1043 #ifdef CONFIG_TLS_DEVICE 1044 if (rxd->rxd.flags & PCIE_DESC_RX_DECRYPTED) { 1045 skb->decrypted = true; 1046 u64_stats_update_begin(&r_vec->rx_sync); 1047 r_vec->hw_tls_rx++; 1048 u64_stats_update_end(&r_vec->rx_sync); 1049 } 1050 #endif 1051 1052 if (rxd->rxd.flags & PCIE_DESC_RX_VLAN) 1053 __vlan_hwaccel_put_tag(skb, htons(ETH_P_8021Q), 1054 le16_to_cpu(rxd->rxd.vlan)); 1055 if (meta_len_xdp) 1056 skb_metadata_set(skb, meta_len_xdp); 1057 1058 if (likely(!redir_egress)) { 1059 napi_gro_receive(&rx_ring->r_vec->napi, skb); 1060 } else { 1061 skb->dev = netdev; 1062 skb_reset_network_header(skb); 1063 __skb_push(skb, ETH_HLEN); 1064 dev_queue_xmit(skb); 1065 } 1066 } 1067 1068 if (xdp_prog) { 1069 if (tx_ring->wr_ptr_add) 1070 nfp_net_tx_xmit_more_flush(tx_ring); 1071 else if (unlikely(tx_ring->wr_p != tx_ring->rd_p) && 1072 !xdp_tx_cmpl) 1073 if (!nfp_nfd3_xdp_complete(tx_ring)) 1074 pkts_polled = budget; 1075 } 1076 1077 return pkts_polled; 1078 } 1079 1080 /** 1081 * nfp_nfd3_poll() - napi poll function 1082 * @napi: NAPI structure 1083 * @budget: NAPI budget 1084 * 1085 * Return: number of packets polled. 1086 */ 1087 int nfp_nfd3_poll(struct napi_struct *napi, int budget) 1088 { 1089 struct nfp_net_r_vector *r_vec = 1090 container_of(napi, struct nfp_net_r_vector, napi); 1091 unsigned int pkts_polled = 0; 1092 1093 if (r_vec->tx_ring) 1094 nfp_nfd3_tx_complete(r_vec->tx_ring, budget); 1095 if (r_vec->rx_ring) 1096 pkts_polled = nfp_nfd3_rx(r_vec->rx_ring, budget); 1097 1098 if (pkts_polled < budget) 1099 if (napi_complete_done(napi, pkts_polled)) 1100 nfp_net_irq_unmask(r_vec->nfp_net, r_vec->irq_entry); 1101 1102 if (r_vec->nfp_net->rx_coalesce_adapt_on && r_vec->rx_ring) { 1103 struct dim_sample dim_sample = {}; 1104 unsigned int start; 1105 u64 pkts, bytes; 1106 1107 do { 1108 start = u64_stats_fetch_begin(&r_vec->rx_sync); 1109 pkts = r_vec->rx_pkts; 1110 bytes = r_vec->rx_bytes; 1111 } while (u64_stats_fetch_retry(&r_vec->rx_sync, start)); 1112 1113 dim_update_sample(r_vec->event_ctr, pkts, bytes, &dim_sample); 1114 net_dim(&r_vec->rx_dim, dim_sample); 1115 } 1116 1117 if (r_vec->nfp_net->tx_coalesce_adapt_on && r_vec->tx_ring) { 1118 struct dim_sample dim_sample = {}; 1119 unsigned int start; 1120 u64 pkts, bytes; 1121 1122 do { 1123 start = u64_stats_fetch_begin(&r_vec->tx_sync); 1124 pkts = r_vec->tx_pkts; 1125 bytes = r_vec->tx_bytes; 1126 } while (u64_stats_fetch_retry(&r_vec->tx_sync, start)); 1127 1128 dim_update_sample(r_vec->event_ctr, pkts, bytes, &dim_sample); 1129 net_dim(&r_vec->tx_dim, dim_sample); 1130 } 1131 1132 return pkts_polled; 1133 } 1134 1135 /* Control device data path 1136 */ 1137 1138 bool 1139 nfp_nfd3_ctrl_tx_one(struct nfp_net *nn, struct nfp_net_r_vector *r_vec, 1140 struct sk_buff *skb, bool old) 1141 { 1142 unsigned int real_len = skb->len, meta_len = 0; 1143 struct nfp_net_tx_ring *tx_ring; 1144 struct nfp_nfd3_tx_buf *txbuf; 1145 struct nfp_nfd3_tx_desc *txd; 1146 struct nfp_net_dp *dp; 1147 dma_addr_t dma_addr; 1148 int wr_idx; 1149 1150 dp = &r_vec->nfp_net->dp; 1151 tx_ring = r_vec->tx_ring; 1152 1153 if (WARN_ON_ONCE(skb_shinfo(skb)->nr_frags)) { 1154 nn_dp_warn(dp, "Driver's CTRL TX does not implement gather\n"); 1155 goto err_free; 1156 } 1157 1158 if (unlikely(nfp_net_tx_full(tx_ring, 1))) { 1159 u64_stats_update_begin(&r_vec->tx_sync); 1160 r_vec->tx_busy++; 1161 u64_stats_update_end(&r_vec->tx_sync); 1162 if (!old) 1163 __skb_queue_tail(&r_vec->queue, skb); 1164 else 1165 __skb_queue_head(&r_vec->queue, skb); 1166 return true; 1167 } 1168 1169 if (nfp_app_ctrl_has_meta(nn->app)) { 1170 if (unlikely(skb_headroom(skb) < 8)) { 1171 nn_dp_warn(dp, "CTRL TX on skb without headroom\n"); 1172 goto err_free; 1173 } 1174 meta_len = 8; 1175 put_unaligned_be32(NFP_META_PORT_ID_CTRL, skb_push(skb, 4)); 1176 put_unaligned_be32(NFP_NET_META_PORTID, skb_push(skb, 4)); 1177 } 1178 1179 /* Start with the head skbuf */ 1180 dma_addr = dma_map_single(dp->dev, skb->data, skb_headlen(skb), 1181 DMA_TO_DEVICE); 1182 if (dma_mapping_error(dp->dev, dma_addr)) 1183 goto err_dma_warn; 1184 1185 wr_idx = D_IDX(tx_ring, tx_ring->wr_p); 1186 1187 /* Stash the soft descriptor of the head then initialize it */ 1188 txbuf = &tx_ring->txbufs[wr_idx]; 1189 txbuf->skb = skb; 1190 txbuf->dma_addr = dma_addr; 1191 txbuf->fidx = -1; 1192 txbuf->pkt_cnt = 1; 1193 txbuf->real_len = real_len; 1194 1195 /* Build TX descriptor */ 1196 txd = &tx_ring->txds[wr_idx]; 1197 txd->offset_eop = meta_len | NFD3_DESC_TX_EOP; 1198 txd->dma_len = cpu_to_le16(skb_headlen(skb)); 1199 nfp_desc_set_dma_addr_40b(txd, dma_addr); 1200 txd->data_len = cpu_to_le16(skb->len); 1201 1202 txd->flags = 0; 1203 txd->mss = 0; 1204 txd->lso_hdrlen = 0; 1205 1206 tx_ring->wr_p++; 1207 tx_ring->wr_ptr_add++; 1208 nfp_net_tx_xmit_more_flush(tx_ring); 1209 1210 return false; 1211 1212 err_dma_warn: 1213 nn_dp_warn(dp, "Failed to DMA map TX CTRL buffer\n"); 1214 err_free: 1215 u64_stats_update_begin(&r_vec->tx_sync); 1216 r_vec->tx_errors++; 1217 u64_stats_update_end(&r_vec->tx_sync); 1218 dev_kfree_skb_any(skb); 1219 return false; 1220 } 1221 1222 static void __nfp_ctrl_tx_queued(struct nfp_net_r_vector *r_vec) 1223 { 1224 struct sk_buff *skb; 1225 1226 while ((skb = __skb_dequeue(&r_vec->queue))) 1227 if (nfp_nfd3_ctrl_tx_one(r_vec->nfp_net, r_vec, skb, true)) 1228 return; 1229 } 1230 1231 static bool 1232 nfp_ctrl_meta_ok(struct nfp_net *nn, void *data, unsigned int meta_len) 1233 { 1234 u32 meta_type, meta_tag; 1235 1236 if (!nfp_app_ctrl_has_meta(nn->app)) 1237 return !meta_len; 1238 1239 if (meta_len != 8) 1240 return false; 1241 1242 meta_type = get_unaligned_be32(data); 1243 meta_tag = get_unaligned_be32(data + 4); 1244 1245 return (meta_type == NFP_NET_META_PORTID && 1246 meta_tag == NFP_META_PORT_ID_CTRL); 1247 } 1248 1249 static bool 1250 nfp_ctrl_rx_one(struct nfp_net *nn, struct nfp_net_dp *dp, 1251 struct nfp_net_r_vector *r_vec, struct nfp_net_rx_ring *rx_ring) 1252 { 1253 unsigned int meta_len, data_len, meta_off, pkt_len, pkt_off; 1254 struct nfp_net_rx_buf *rxbuf; 1255 struct nfp_net_rx_desc *rxd; 1256 dma_addr_t new_dma_addr; 1257 struct sk_buff *skb; 1258 void *new_frag; 1259 int idx; 1260 1261 idx = D_IDX(rx_ring, rx_ring->rd_p); 1262 1263 rxd = &rx_ring->rxds[idx]; 1264 if (!(rxd->rxd.meta_len_dd & PCIE_DESC_RX_DD)) 1265 return false; 1266 1267 /* Memory barrier to ensure that we won't do other reads 1268 * before the DD bit. 1269 */ 1270 dma_rmb(); 1271 1272 rx_ring->rd_p++; 1273 1274 rxbuf = &rx_ring->rxbufs[idx]; 1275 meta_len = rxd->rxd.meta_len_dd & PCIE_DESC_RX_META_LEN_MASK; 1276 data_len = le16_to_cpu(rxd->rxd.data_len); 1277 pkt_len = data_len - meta_len; 1278 1279 pkt_off = NFP_NET_RX_BUF_HEADROOM + dp->rx_dma_off; 1280 if (dp->rx_offset == NFP_NET_CFG_RX_OFFSET_DYNAMIC) 1281 pkt_off += meta_len; 1282 else 1283 pkt_off += dp->rx_offset; 1284 meta_off = pkt_off - meta_len; 1285 1286 /* Stats update */ 1287 u64_stats_update_begin(&r_vec->rx_sync); 1288 r_vec->rx_pkts++; 1289 r_vec->rx_bytes += pkt_len; 1290 u64_stats_update_end(&r_vec->rx_sync); 1291 1292 nfp_net_dma_sync_cpu_rx(dp, rxbuf->dma_addr + meta_off, data_len); 1293 1294 if (unlikely(!nfp_ctrl_meta_ok(nn, rxbuf->frag + meta_off, meta_len))) { 1295 nn_dp_warn(dp, "incorrect metadata for ctrl packet (%d)\n", 1296 meta_len); 1297 nfp_nfd3_rx_drop(dp, r_vec, rx_ring, rxbuf, NULL); 1298 return true; 1299 } 1300 1301 skb = build_skb(rxbuf->frag, dp->fl_bufsz); 1302 if (unlikely(!skb)) { 1303 nfp_nfd3_rx_drop(dp, r_vec, rx_ring, rxbuf, NULL); 1304 return true; 1305 } 1306 new_frag = nfp_nfd3_napi_alloc_one(dp, &new_dma_addr); 1307 if (unlikely(!new_frag)) { 1308 nfp_nfd3_rx_drop(dp, r_vec, rx_ring, rxbuf, skb); 1309 return true; 1310 } 1311 1312 nfp_net_dma_unmap_rx(dp, rxbuf->dma_addr); 1313 1314 nfp_nfd3_rx_give_one(dp, rx_ring, new_frag, new_dma_addr); 1315 1316 skb_reserve(skb, pkt_off); 1317 skb_put(skb, pkt_len); 1318 1319 nfp_app_ctrl_rx(nn->app, skb); 1320 1321 return true; 1322 } 1323 1324 static bool nfp_ctrl_rx(struct nfp_net_r_vector *r_vec) 1325 { 1326 struct nfp_net_rx_ring *rx_ring = r_vec->rx_ring; 1327 struct nfp_net *nn = r_vec->nfp_net; 1328 struct nfp_net_dp *dp = &nn->dp; 1329 unsigned int budget = 512; 1330 1331 while (nfp_ctrl_rx_one(nn, dp, r_vec, rx_ring) && budget--) 1332 continue; 1333 1334 return budget; 1335 } 1336 1337 void nfp_nfd3_ctrl_poll(struct tasklet_struct *t) 1338 { 1339 struct nfp_net_r_vector *r_vec = from_tasklet(r_vec, t, tasklet); 1340 1341 spin_lock(&r_vec->lock); 1342 nfp_nfd3_tx_complete(r_vec->tx_ring, 0); 1343 __nfp_ctrl_tx_queued(r_vec); 1344 spin_unlock(&r_vec->lock); 1345 1346 if (nfp_ctrl_rx(r_vec)) { 1347 nfp_net_irq_unmask(r_vec->nfp_net, r_vec->irq_entry); 1348 } else { 1349 tasklet_schedule(&r_vec->tasklet); 1350 nn_dp_warn(&r_vec->nfp_net->dp, 1351 "control message budget exceeded!\n"); 1352 } 1353 } 1354