1 // SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 2 /* Copyright (C) 2015-2019 Netronome Systems, Inc. */ 3 4 #include <linux/bpf_trace.h> 5 #include <linux/netdevice.h> 6 7 #include "../nfp_app.h" 8 #include "../nfp_net.h" 9 #include "../nfp_net_dp.h" 10 #include "../nfp_net_xsk.h" 11 #include "../crypto/crypto.h" 12 #include "../crypto/fw.h" 13 #include "nfd3.h" 14 15 /* Transmit processing 16 * 17 * One queue controller peripheral queue is used for transmit. The 18 * driver en-queues packets for transmit by advancing the write 19 * pointer. The device indicates that packets have transmitted by 20 * advancing the read pointer. The driver maintains a local copy of 21 * the read and write pointer in @struct nfp_net_tx_ring. The driver 22 * keeps @wr_p in sync with the queue controller write pointer and can 23 * determine how many packets have been transmitted by comparing its 24 * copy of the read pointer @rd_p with the read pointer maintained by 25 * the queue controller peripheral. 26 */ 27 28 /* Wrappers for deciding when to stop and restart TX queues */ 29 static int nfp_nfd3_tx_ring_should_wake(struct nfp_net_tx_ring *tx_ring) 30 { 31 return !nfp_net_tx_full(tx_ring, MAX_SKB_FRAGS * 4); 32 } 33 34 static int nfp_nfd3_tx_ring_should_stop(struct nfp_net_tx_ring *tx_ring) 35 { 36 return nfp_net_tx_full(tx_ring, MAX_SKB_FRAGS + 1); 37 } 38 39 /** 40 * nfp_nfd3_tx_ring_stop() - stop tx ring 41 * @nd_q: netdev queue 42 * @tx_ring: driver tx queue structure 43 * 44 * Safely stop TX ring. Remember that while we are running .start_xmit() 45 * someone else may be cleaning the TX ring completions so we need to be 46 * extra careful here. 47 */ 48 static void 49 nfp_nfd3_tx_ring_stop(struct netdev_queue *nd_q, 50 struct nfp_net_tx_ring *tx_ring) 51 { 52 netif_tx_stop_queue(nd_q); 53 54 /* We can race with the TX completion out of NAPI so recheck */ 55 smp_mb(); 56 if (unlikely(nfp_nfd3_tx_ring_should_wake(tx_ring))) 57 netif_tx_start_queue(nd_q); 58 } 59 60 /** 61 * nfp_nfd3_tx_tso() - Set up Tx descriptor for LSO 62 * @r_vec: per-ring structure 63 * @txbuf: Pointer to driver soft TX descriptor 64 * @txd: Pointer to HW TX descriptor 65 * @skb: Pointer to SKB 66 * @md_bytes: Prepend length 67 * 68 * Set up Tx descriptor for LSO, do nothing for non-LSO skbs. 69 * Return error on packet header greater than maximum supported LSO header size. 70 */ 71 static void 72 nfp_nfd3_tx_tso(struct nfp_net_r_vector *r_vec, struct nfp_nfd3_tx_buf *txbuf, 73 struct nfp_nfd3_tx_desc *txd, struct sk_buff *skb, u32 md_bytes) 74 { 75 u32 l3_offset, l4_offset, hdrlen; 76 u16 mss; 77 78 if (!skb_is_gso(skb)) 79 return; 80 81 if (!skb->encapsulation) { 82 l3_offset = skb_network_offset(skb); 83 l4_offset = skb_transport_offset(skb); 84 hdrlen = skb_transport_offset(skb) + tcp_hdrlen(skb); 85 } else { 86 l3_offset = skb_inner_network_offset(skb); 87 l4_offset = skb_inner_transport_offset(skb); 88 hdrlen = skb_inner_transport_header(skb) - skb->data + 89 inner_tcp_hdrlen(skb); 90 } 91 92 txbuf->pkt_cnt = skb_shinfo(skb)->gso_segs; 93 txbuf->real_len += hdrlen * (txbuf->pkt_cnt - 1); 94 95 mss = skb_shinfo(skb)->gso_size & NFD3_DESC_TX_MSS_MASK; 96 txd->l3_offset = l3_offset - md_bytes; 97 txd->l4_offset = l4_offset - md_bytes; 98 txd->lso_hdrlen = hdrlen - md_bytes; 99 txd->mss = cpu_to_le16(mss); 100 txd->flags |= NFD3_DESC_TX_LSO; 101 102 u64_stats_update_begin(&r_vec->tx_sync); 103 r_vec->tx_lso++; 104 u64_stats_update_end(&r_vec->tx_sync); 105 } 106 107 /** 108 * nfp_nfd3_tx_csum() - Set TX CSUM offload flags in TX descriptor 109 * @dp: NFP Net data path struct 110 * @r_vec: per-ring structure 111 * @txbuf: Pointer to driver soft TX descriptor 112 * @txd: Pointer to TX descriptor 113 * @skb: Pointer to SKB 114 * 115 * This function sets the TX checksum flags in the TX descriptor based 116 * on the configuration and the protocol of the packet to be transmitted. 117 */ 118 static void 119 nfp_nfd3_tx_csum(struct nfp_net_dp *dp, struct nfp_net_r_vector *r_vec, 120 struct nfp_nfd3_tx_buf *txbuf, struct nfp_nfd3_tx_desc *txd, 121 struct sk_buff *skb) 122 { 123 struct ipv6hdr *ipv6h; 124 struct iphdr *iph; 125 u8 l4_hdr; 126 127 if (!(dp->ctrl & NFP_NET_CFG_CTRL_TXCSUM)) 128 return; 129 130 if (skb->ip_summed != CHECKSUM_PARTIAL) 131 return; 132 133 txd->flags |= NFD3_DESC_TX_CSUM; 134 if (skb->encapsulation) 135 txd->flags |= NFD3_DESC_TX_ENCAP; 136 137 iph = skb->encapsulation ? inner_ip_hdr(skb) : ip_hdr(skb); 138 ipv6h = skb->encapsulation ? inner_ipv6_hdr(skb) : ipv6_hdr(skb); 139 140 if (iph->version == 4) { 141 txd->flags |= NFD3_DESC_TX_IP4_CSUM; 142 l4_hdr = iph->protocol; 143 } else if (ipv6h->version == 6) { 144 l4_hdr = ipv6h->nexthdr; 145 } else { 146 nn_dp_warn(dp, "partial checksum but ipv=%x!\n", iph->version); 147 return; 148 } 149 150 switch (l4_hdr) { 151 case IPPROTO_TCP: 152 txd->flags |= NFD3_DESC_TX_TCP_CSUM; 153 break; 154 case IPPROTO_UDP: 155 txd->flags |= NFD3_DESC_TX_UDP_CSUM; 156 break; 157 default: 158 nn_dp_warn(dp, "partial checksum but l4 proto=%x!\n", l4_hdr); 159 return; 160 } 161 162 u64_stats_update_begin(&r_vec->tx_sync); 163 if (skb->encapsulation) 164 r_vec->hw_csum_tx_inner += txbuf->pkt_cnt; 165 else 166 r_vec->hw_csum_tx += txbuf->pkt_cnt; 167 u64_stats_update_end(&r_vec->tx_sync); 168 } 169 170 static int nfp_nfd3_prep_tx_meta(struct sk_buff *skb, u64 tls_handle) 171 { 172 struct metadata_dst *md_dst = skb_metadata_dst(skb); 173 unsigned char *data; 174 u32 meta_id = 0; 175 int md_bytes; 176 177 if (likely(!md_dst && !tls_handle)) 178 return 0; 179 if (unlikely(md_dst && md_dst->type != METADATA_HW_PORT_MUX)) { 180 if (!tls_handle) 181 return 0; 182 md_dst = NULL; 183 } 184 185 md_bytes = 4 + !!md_dst * 4 + !!tls_handle * 8; 186 187 if (unlikely(skb_cow_head(skb, md_bytes))) 188 return -ENOMEM; 189 190 meta_id = 0; 191 data = skb_push(skb, md_bytes) + md_bytes; 192 if (md_dst) { 193 data -= 4; 194 put_unaligned_be32(md_dst->u.port_info.port_id, data); 195 meta_id = NFP_NET_META_PORTID; 196 } 197 if (tls_handle) { 198 /* conn handle is opaque, we just use u64 to be able to quickly 199 * compare it to zero 200 */ 201 data -= 8; 202 memcpy(data, &tls_handle, sizeof(tls_handle)); 203 meta_id <<= NFP_NET_META_FIELD_SIZE; 204 meta_id |= NFP_NET_META_CONN_HANDLE; 205 } 206 207 data -= 4; 208 put_unaligned_be32(meta_id, data); 209 210 return md_bytes; 211 } 212 213 /** 214 * nfp_nfd3_tx() - Main transmit entry point 215 * @skb: SKB to transmit 216 * @netdev: netdev structure 217 * 218 * Return: NETDEV_TX_OK on success. 219 */ 220 netdev_tx_t nfp_nfd3_tx(struct sk_buff *skb, struct net_device *netdev) 221 { 222 struct nfp_net *nn = netdev_priv(netdev); 223 int f, nr_frags, wr_idx, md_bytes; 224 struct nfp_net_tx_ring *tx_ring; 225 struct nfp_net_r_vector *r_vec; 226 struct nfp_nfd3_tx_buf *txbuf; 227 struct nfp_nfd3_tx_desc *txd; 228 struct netdev_queue *nd_q; 229 const skb_frag_t *frag; 230 struct nfp_net_dp *dp; 231 dma_addr_t dma_addr; 232 unsigned int fsize; 233 u64 tls_handle = 0; 234 u16 qidx; 235 236 dp = &nn->dp; 237 qidx = skb_get_queue_mapping(skb); 238 tx_ring = &dp->tx_rings[qidx]; 239 r_vec = tx_ring->r_vec; 240 241 nr_frags = skb_shinfo(skb)->nr_frags; 242 243 if (unlikely(nfp_net_tx_full(tx_ring, nr_frags + 1))) { 244 nn_dp_warn(dp, "TX ring %d busy. wrp=%u rdp=%u\n", 245 qidx, tx_ring->wr_p, tx_ring->rd_p); 246 nd_q = netdev_get_tx_queue(dp->netdev, qidx); 247 netif_tx_stop_queue(nd_q); 248 nfp_net_tx_xmit_more_flush(tx_ring); 249 u64_stats_update_begin(&r_vec->tx_sync); 250 r_vec->tx_busy++; 251 u64_stats_update_end(&r_vec->tx_sync); 252 return NETDEV_TX_BUSY; 253 } 254 255 skb = nfp_net_tls_tx(dp, r_vec, skb, &tls_handle, &nr_frags); 256 if (unlikely(!skb)) { 257 nfp_net_tx_xmit_more_flush(tx_ring); 258 return NETDEV_TX_OK; 259 } 260 261 md_bytes = nfp_nfd3_prep_tx_meta(skb, tls_handle); 262 if (unlikely(md_bytes < 0)) 263 goto err_flush; 264 265 /* Start with the head skbuf */ 266 dma_addr = dma_map_single(dp->dev, skb->data, skb_headlen(skb), 267 DMA_TO_DEVICE); 268 if (dma_mapping_error(dp->dev, dma_addr)) 269 goto err_dma_err; 270 271 wr_idx = D_IDX(tx_ring, tx_ring->wr_p); 272 273 /* Stash the soft descriptor of the head then initialize it */ 274 txbuf = &tx_ring->txbufs[wr_idx]; 275 txbuf->skb = skb; 276 txbuf->dma_addr = dma_addr; 277 txbuf->fidx = -1; 278 txbuf->pkt_cnt = 1; 279 txbuf->real_len = skb->len; 280 281 /* Build TX descriptor */ 282 txd = &tx_ring->txds[wr_idx]; 283 txd->offset_eop = (nr_frags ? 0 : NFD3_DESC_TX_EOP) | md_bytes; 284 txd->dma_len = cpu_to_le16(skb_headlen(skb)); 285 nfp_desc_set_dma_addr_40b(txd, dma_addr); 286 txd->data_len = cpu_to_le16(skb->len); 287 288 txd->flags = 0; 289 txd->mss = 0; 290 txd->lso_hdrlen = 0; 291 292 /* Do not reorder - tso may adjust pkt cnt, vlan may override fields */ 293 nfp_nfd3_tx_tso(r_vec, txbuf, txd, skb, md_bytes); 294 nfp_nfd3_tx_csum(dp, r_vec, txbuf, txd, skb); 295 if (skb_vlan_tag_present(skb) && dp->ctrl & NFP_NET_CFG_CTRL_TXVLAN) { 296 txd->flags |= NFD3_DESC_TX_VLAN; 297 txd->vlan = cpu_to_le16(skb_vlan_tag_get(skb)); 298 } 299 300 /* Gather DMA */ 301 if (nr_frags > 0) { 302 __le64 second_half; 303 304 /* all descs must match except for in addr, length and eop */ 305 second_half = txd->vals8[1]; 306 307 for (f = 0; f < nr_frags; f++) { 308 frag = &skb_shinfo(skb)->frags[f]; 309 fsize = skb_frag_size(frag); 310 311 dma_addr = skb_frag_dma_map(dp->dev, frag, 0, 312 fsize, DMA_TO_DEVICE); 313 if (dma_mapping_error(dp->dev, dma_addr)) 314 goto err_unmap; 315 316 wr_idx = D_IDX(tx_ring, wr_idx + 1); 317 tx_ring->txbufs[wr_idx].skb = skb; 318 tx_ring->txbufs[wr_idx].dma_addr = dma_addr; 319 tx_ring->txbufs[wr_idx].fidx = f; 320 321 txd = &tx_ring->txds[wr_idx]; 322 txd->dma_len = cpu_to_le16(fsize); 323 nfp_desc_set_dma_addr_40b(txd, dma_addr); 324 txd->offset_eop = md_bytes | 325 ((f == nr_frags - 1) ? NFD3_DESC_TX_EOP : 0); 326 txd->vals8[1] = second_half; 327 } 328 329 u64_stats_update_begin(&r_vec->tx_sync); 330 r_vec->tx_gather++; 331 u64_stats_update_end(&r_vec->tx_sync); 332 } 333 334 skb_tx_timestamp(skb); 335 336 nd_q = netdev_get_tx_queue(dp->netdev, tx_ring->idx); 337 338 tx_ring->wr_p += nr_frags + 1; 339 if (nfp_nfd3_tx_ring_should_stop(tx_ring)) 340 nfp_nfd3_tx_ring_stop(nd_q, tx_ring); 341 342 tx_ring->wr_ptr_add += nr_frags + 1; 343 if (__netdev_tx_sent_queue(nd_q, txbuf->real_len, netdev_xmit_more())) 344 nfp_net_tx_xmit_more_flush(tx_ring); 345 346 return NETDEV_TX_OK; 347 348 err_unmap: 349 while (--f >= 0) { 350 frag = &skb_shinfo(skb)->frags[f]; 351 dma_unmap_page(dp->dev, tx_ring->txbufs[wr_idx].dma_addr, 352 skb_frag_size(frag), DMA_TO_DEVICE); 353 tx_ring->txbufs[wr_idx].skb = NULL; 354 tx_ring->txbufs[wr_idx].dma_addr = 0; 355 tx_ring->txbufs[wr_idx].fidx = -2; 356 wr_idx = wr_idx - 1; 357 if (wr_idx < 0) 358 wr_idx += tx_ring->cnt; 359 } 360 dma_unmap_single(dp->dev, tx_ring->txbufs[wr_idx].dma_addr, 361 skb_headlen(skb), DMA_TO_DEVICE); 362 tx_ring->txbufs[wr_idx].skb = NULL; 363 tx_ring->txbufs[wr_idx].dma_addr = 0; 364 tx_ring->txbufs[wr_idx].fidx = -2; 365 err_dma_err: 366 nn_dp_warn(dp, "Failed to map DMA TX buffer\n"); 367 err_flush: 368 nfp_net_tx_xmit_more_flush(tx_ring); 369 u64_stats_update_begin(&r_vec->tx_sync); 370 r_vec->tx_errors++; 371 u64_stats_update_end(&r_vec->tx_sync); 372 nfp_net_tls_tx_undo(skb, tls_handle); 373 dev_kfree_skb_any(skb); 374 return NETDEV_TX_OK; 375 } 376 377 /** 378 * nfp_nfd3_tx_complete() - Handled completed TX packets 379 * @tx_ring: TX ring structure 380 * @budget: NAPI budget (only used as bool to determine if in NAPI context) 381 */ 382 void nfp_nfd3_tx_complete(struct nfp_net_tx_ring *tx_ring, int budget) 383 { 384 struct nfp_net_r_vector *r_vec = tx_ring->r_vec; 385 struct nfp_net_dp *dp = &r_vec->nfp_net->dp; 386 u32 done_pkts = 0, done_bytes = 0; 387 struct netdev_queue *nd_q; 388 u32 qcp_rd_p; 389 int todo; 390 391 if (tx_ring->wr_p == tx_ring->rd_p) 392 return; 393 394 /* Work out how many descriptors have been transmitted */ 395 qcp_rd_p = nfp_net_read_tx_cmpl(tx_ring, dp); 396 397 if (qcp_rd_p == tx_ring->qcp_rd_p) 398 return; 399 400 todo = D_IDX(tx_ring, qcp_rd_p - tx_ring->qcp_rd_p); 401 402 while (todo--) { 403 const skb_frag_t *frag; 404 struct nfp_nfd3_tx_buf *tx_buf; 405 struct sk_buff *skb; 406 int fidx, nr_frags; 407 int idx; 408 409 idx = D_IDX(tx_ring, tx_ring->rd_p++); 410 tx_buf = &tx_ring->txbufs[idx]; 411 412 skb = tx_buf->skb; 413 if (!skb) 414 continue; 415 416 nr_frags = skb_shinfo(skb)->nr_frags; 417 fidx = tx_buf->fidx; 418 419 if (fidx == -1) { 420 /* unmap head */ 421 dma_unmap_single(dp->dev, tx_buf->dma_addr, 422 skb_headlen(skb), DMA_TO_DEVICE); 423 424 done_pkts += tx_buf->pkt_cnt; 425 done_bytes += tx_buf->real_len; 426 } else { 427 /* unmap fragment */ 428 frag = &skb_shinfo(skb)->frags[fidx]; 429 dma_unmap_page(dp->dev, tx_buf->dma_addr, 430 skb_frag_size(frag), DMA_TO_DEVICE); 431 } 432 433 /* check for last gather fragment */ 434 if (fidx == nr_frags - 1) 435 napi_consume_skb(skb, budget); 436 437 tx_buf->dma_addr = 0; 438 tx_buf->skb = NULL; 439 tx_buf->fidx = -2; 440 } 441 442 tx_ring->qcp_rd_p = qcp_rd_p; 443 444 u64_stats_update_begin(&r_vec->tx_sync); 445 r_vec->tx_bytes += done_bytes; 446 r_vec->tx_pkts += done_pkts; 447 u64_stats_update_end(&r_vec->tx_sync); 448 449 if (!dp->netdev) 450 return; 451 452 nd_q = netdev_get_tx_queue(dp->netdev, tx_ring->idx); 453 netdev_tx_completed_queue(nd_q, done_pkts, done_bytes); 454 if (nfp_nfd3_tx_ring_should_wake(tx_ring)) { 455 /* Make sure TX thread will see updated tx_ring->rd_p */ 456 smp_mb(); 457 458 if (unlikely(netif_tx_queue_stopped(nd_q))) 459 netif_tx_wake_queue(nd_q); 460 } 461 462 WARN_ONCE(tx_ring->wr_p - tx_ring->rd_p > tx_ring->cnt, 463 "TX ring corruption rd_p=%u wr_p=%u cnt=%u\n", 464 tx_ring->rd_p, tx_ring->wr_p, tx_ring->cnt); 465 } 466 467 static bool nfp_nfd3_xdp_complete(struct nfp_net_tx_ring *tx_ring) 468 { 469 struct nfp_net_r_vector *r_vec = tx_ring->r_vec; 470 struct nfp_net_dp *dp = &r_vec->nfp_net->dp; 471 u32 done_pkts = 0, done_bytes = 0; 472 bool done_all; 473 int idx, todo; 474 u32 qcp_rd_p; 475 476 /* Work out how many descriptors have been transmitted */ 477 qcp_rd_p = nfp_net_read_tx_cmpl(tx_ring, dp); 478 479 if (qcp_rd_p == tx_ring->qcp_rd_p) 480 return true; 481 482 todo = D_IDX(tx_ring, qcp_rd_p - tx_ring->qcp_rd_p); 483 484 done_all = todo <= NFP_NET_XDP_MAX_COMPLETE; 485 todo = min(todo, NFP_NET_XDP_MAX_COMPLETE); 486 487 tx_ring->qcp_rd_p = D_IDX(tx_ring, tx_ring->qcp_rd_p + todo); 488 489 done_pkts = todo; 490 while (todo--) { 491 idx = D_IDX(tx_ring, tx_ring->rd_p); 492 tx_ring->rd_p++; 493 494 done_bytes += tx_ring->txbufs[idx].real_len; 495 } 496 497 u64_stats_update_begin(&r_vec->tx_sync); 498 r_vec->tx_bytes += done_bytes; 499 r_vec->tx_pkts += done_pkts; 500 u64_stats_update_end(&r_vec->tx_sync); 501 502 WARN_ONCE(tx_ring->wr_p - tx_ring->rd_p > tx_ring->cnt, 503 "XDP TX ring corruption rd_p=%u wr_p=%u cnt=%u\n", 504 tx_ring->rd_p, tx_ring->wr_p, tx_ring->cnt); 505 506 return done_all; 507 } 508 509 /* Receive processing 510 */ 511 512 static void * 513 nfp_nfd3_napi_alloc_one(struct nfp_net_dp *dp, dma_addr_t *dma_addr) 514 { 515 void *frag; 516 517 if (!dp->xdp_prog) { 518 frag = napi_alloc_frag(dp->fl_bufsz); 519 if (unlikely(!frag)) 520 return NULL; 521 } else { 522 struct page *page; 523 524 page = dev_alloc_page(); 525 if (unlikely(!page)) 526 return NULL; 527 frag = page_address(page); 528 } 529 530 *dma_addr = nfp_net_dma_map_rx(dp, frag); 531 if (dma_mapping_error(dp->dev, *dma_addr)) { 532 nfp_net_free_frag(frag, dp->xdp_prog); 533 nn_dp_warn(dp, "Failed to map DMA RX buffer\n"); 534 return NULL; 535 } 536 537 return frag; 538 } 539 540 /** 541 * nfp_nfd3_rx_give_one() - Put mapped skb on the software and hardware rings 542 * @dp: NFP Net data path struct 543 * @rx_ring: RX ring structure 544 * @frag: page fragment buffer 545 * @dma_addr: DMA address of skb mapping 546 */ 547 static void 548 nfp_nfd3_rx_give_one(const struct nfp_net_dp *dp, 549 struct nfp_net_rx_ring *rx_ring, 550 void *frag, dma_addr_t dma_addr) 551 { 552 unsigned int wr_idx; 553 554 wr_idx = D_IDX(rx_ring, rx_ring->wr_p); 555 556 nfp_net_dma_sync_dev_rx(dp, dma_addr); 557 558 /* Stash SKB and DMA address away */ 559 rx_ring->rxbufs[wr_idx].frag = frag; 560 rx_ring->rxbufs[wr_idx].dma_addr = dma_addr; 561 562 /* Fill freelist descriptor */ 563 rx_ring->rxds[wr_idx].fld.reserved = 0; 564 rx_ring->rxds[wr_idx].fld.meta_len_dd = 0; 565 /* DMA address is expanded to 48-bit width in freelist for NFP3800, 566 * so the *_48b macro is used accordingly, it's also OK to fill 567 * a 40-bit address since the top 8 bits are get set to 0. 568 */ 569 nfp_desc_set_dma_addr_48b(&rx_ring->rxds[wr_idx].fld, 570 dma_addr + dp->rx_dma_off); 571 572 rx_ring->wr_p++; 573 if (!(rx_ring->wr_p % NFP_NET_FL_BATCH)) { 574 /* Update write pointer of the freelist queue. Make 575 * sure all writes are flushed before telling the hardware. 576 */ 577 wmb(); 578 nfp_qcp_wr_ptr_add(rx_ring->qcp_fl, NFP_NET_FL_BATCH); 579 } 580 } 581 582 /** 583 * nfp_nfd3_rx_ring_fill_freelist() - Give buffers from the ring to FW 584 * @dp: NFP Net data path struct 585 * @rx_ring: RX ring to fill 586 */ 587 void nfp_nfd3_rx_ring_fill_freelist(struct nfp_net_dp *dp, 588 struct nfp_net_rx_ring *rx_ring) 589 { 590 unsigned int i; 591 592 if (nfp_net_has_xsk_pool_slow(dp, rx_ring->idx)) 593 return nfp_net_xsk_rx_ring_fill_freelist(rx_ring); 594 595 for (i = 0; i < rx_ring->cnt - 1; i++) 596 nfp_nfd3_rx_give_one(dp, rx_ring, rx_ring->rxbufs[i].frag, 597 rx_ring->rxbufs[i].dma_addr); 598 } 599 600 /** 601 * nfp_nfd3_rx_csum_has_errors() - group check if rxd has any csum errors 602 * @flags: RX descriptor flags field in CPU byte order 603 */ 604 static int nfp_nfd3_rx_csum_has_errors(u16 flags) 605 { 606 u16 csum_all_checked, csum_all_ok; 607 608 csum_all_checked = flags & __PCIE_DESC_RX_CSUM_ALL; 609 csum_all_ok = flags & __PCIE_DESC_RX_CSUM_ALL_OK; 610 611 return csum_all_checked != (csum_all_ok << PCIE_DESC_RX_CSUM_OK_SHIFT); 612 } 613 614 /** 615 * nfp_nfd3_rx_csum() - set SKB checksum field based on RX descriptor flags 616 * @dp: NFP Net data path struct 617 * @r_vec: per-ring structure 618 * @rxd: Pointer to RX descriptor 619 * @meta: Parsed metadata prepend 620 * @skb: Pointer to SKB 621 */ 622 void 623 nfp_nfd3_rx_csum(const struct nfp_net_dp *dp, struct nfp_net_r_vector *r_vec, 624 const struct nfp_net_rx_desc *rxd, 625 const struct nfp_meta_parsed *meta, struct sk_buff *skb) 626 { 627 skb_checksum_none_assert(skb); 628 629 if (!(dp->netdev->features & NETIF_F_RXCSUM)) 630 return; 631 632 if (meta->csum_type) { 633 skb->ip_summed = meta->csum_type; 634 skb->csum = meta->csum; 635 u64_stats_update_begin(&r_vec->rx_sync); 636 r_vec->hw_csum_rx_complete++; 637 u64_stats_update_end(&r_vec->rx_sync); 638 return; 639 } 640 641 if (nfp_nfd3_rx_csum_has_errors(le16_to_cpu(rxd->rxd.flags))) { 642 u64_stats_update_begin(&r_vec->rx_sync); 643 r_vec->hw_csum_rx_error++; 644 u64_stats_update_end(&r_vec->rx_sync); 645 return; 646 } 647 648 /* Assume that the firmware will never report inner CSUM_OK unless outer 649 * L4 headers were successfully parsed. FW will always report zero UDP 650 * checksum as CSUM_OK. 651 */ 652 if (rxd->rxd.flags & PCIE_DESC_RX_TCP_CSUM_OK || 653 rxd->rxd.flags & PCIE_DESC_RX_UDP_CSUM_OK) { 654 __skb_incr_checksum_unnecessary(skb); 655 u64_stats_update_begin(&r_vec->rx_sync); 656 r_vec->hw_csum_rx_ok++; 657 u64_stats_update_end(&r_vec->rx_sync); 658 } 659 660 if (rxd->rxd.flags & PCIE_DESC_RX_I_TCP_CSUM_OK || 661 rxd->rxd.flags & PCIE_DESC_RX_I_UDP_CSUM_OK) { 662 __skb_incr_checksum_unnecessary(skb); 663 u64_stats_update_begin(&r_vec->rx_sync); 664 r_vec->hw_csum_rx_inner_ok++; 665 u64_stats_update_end(&r_vec->rx_sync); 666 } 667 } 668 669 static void 670 nfp_nfd3_set_hash(struct net_device *netdev, struct nfp_meta_parsed *meta, 671 unsigned int type, __be32 *hash) 672 { 673 if (!(netdev->features & NETIF_F_RXHASH)) 674 return; 675 676 switch (type) { 677 case NFP_NET_RSS_IPV4: 678 case NFP_NET_RSS_IPV6: 679 case NFP_NET_RSS_IPV6_EX: 680 meta->hash_type = PKT_HASH_TYPE_L3; 681 break; 682 default: 683 meta->hash_type = PKT_HASH_TYPE_L4; 684 break; 685 } 686 687 meta->hash = get_unaligned_be32(hash); 688 } 689 690 static void 691 nfp_nfd3_set_hash_desc(struct net_device *netdev, struct nfp_meta_parsed *meta, 692 void *data, struct nfp_net_rx_desc *rxd) 693 { 694 struct nfp_net_rx_hash *rx_hash = data; 695 696 if (!(rxd->rxd.flags & PCIE_DESC_RX_RSS)) 697 return; 698 699 nfp_nfd3_set_hash(netdev, meta, get_unaligned_be32(&rx_hash->hash_type), 700 &rx_hash->hash); 701 } 702 703 bool 704 nfp_nfd3_parse_meta(struct net_device *netdev, struct nfp_meta_parsed *meta, 705 void *data, void *pkt, unsigned int pkt_len, int meta_len) 706 { 707 u32 meta_info; 708 709 meta_info = get_unaligned_be32(data); 710 data += 4; 711 712 while (meta_info) { 713 switch (meta_info & NFP_NET_META_FIELD_MASK) { 714 case NFP_NET_META_HASH: 715 meta_info >>= NFP_NET_META_FIELD_SIZE; 716 nfp_nfd3_set_hash(netdev, meta, 717 meta_info & NFP_NET_META_FIELD_MASK, 718 (__be32 *)data); 719 data += 4; 720 break; 721 case NFP_NET_META_MARK: 722 meta->mark = get_unaligned_be32(data); 723 data += 4; 724 break; 725 case NFP_NET_META_PORTID: 726 meta->portid = get_unaligned_be32(data); 727 data += 4; 728 break; 729 case NFP_NET_META_CSUM: 730 meta->csum_type = CHECKSUM_COMPLETE; 731 meta->csum = 732 (__force __wsum)__get_unaligned_cpu32(data); 733 data += 4; 734 break; 735 case NFP_NET_META_RESYNC_INFO: 736 if (nfp_net_tls_rx_resync_req(netdev, data, pkt, 737 pkt_len)) 738 return false; 739 data += sizeof(struct nfp_net_tls_resync_req); 740 break; 741 default: 742 return true; 743 } 744 745 meta_info >>= NFP_NET_META_FIELD_SIZE; 746 } 747 748 return data != pkt; 749 } 750 751 static void 752 nfp_nfd3_rx_drop(const struct nfp_net_dp *dp, struct nfp_net_r_vector *r_vec, 753 struct nfp_net_rx_ring *rx_ring, struct nfp_net_rx_buf *rxbuf, 754 struct sk_buff *skb) 755 { 756 u64_stats_update_begin(&r_vec->rx_sync); 757 r_vec->rx_drops++; 758 /* If we have both skb and rxbuf the replacement buffer allocation 759 * must have failed, count this as an alloc failure. 760 */ 761 if (skb && rxbuf) 762 r_vec->rx_replace_buf_alloc_fail++; 763 u64_stats_update_end(&r_vec->rx_sync); 764 765 /* skb is build based on the frag, free_skb() would free the frag 766 * so to be able to reuse it we need an extra ref. 767 */ 768 if (skb && rxbuf && skb->head == rxbuf->frag) 769 page_ref_inc(virt_to_head_page(rxbuf->frag)); 770 if (rxbuf) 771 nfp_nfd3_rx_give_one(dp, rx_ring, rxbuf->frag, rxbuf->dma_addr); 772 if (skb) 773 dev_kfree_skb_any(skb); 774 } 775 776 static bool 777 nfp_nfd3_tx_xdp_buf(struct nfp_net_dp *dp, struct nfp_net_rx_ring *rx_ring, 778 struct nfp_net_tx_ring *tx_ring, 779 struct nfp_net_rx_buf *rxbuf, unsigned int dma_off, 780 unsigned int pkt_len, bool *completed) 781 { 782 unsigned int dma_map_sz = dp->fl_bufsz - NFP_NET_RX_BUF_NON_DATA; 783 struct nfp_nfd3_tx_buf *txbuf; 784 struct nfp_nfd3_tx_desc *txd; 785 int wr_idx; 786 787 /* Reject if xdp_adjust_tail grow packet beyond DMA area */ 788 if (pkt_len + dma_off > dma_map_sz) 789 return false; 790 791 if (unlikely(nfp_net_tx_full(tx_ring, 1))) { 792 if (!*completed) { 793 nfp_nfd3_xdp_complete(tx_ring); 794 *completed = true; 795 } 796 797 if (unlikely(nfp_net_tx_full(tx_ring, 1))) { 798 nfp_nfd3_rx_drop(dp, rx_ring->r_vec, rx_ring, rxbuf, 799 NULL); 800 return false; 801 } 802 } 803 804 wr_idx = D_IDX(tx_ring, tx_ring->wr_p); 805 806 /* Stash the soft descriptor of the head then initialize it */ 807 txbuf = &tx_ring->txbufs[wr_idx]; 808 809 nfp_nfd3_rx_give_one(dp, rx_ring, txbuf->frag, txbuf->dma_addr); 810 811 txbuf->frag = rxbuf->frag; 812 txbuf->dma_addr = rxbuf->dma_addr; 813 txbuf->fidx = -1; 814 txbuf->pkt_cnt = 1; 815 txbuf->real_len = pkt_len; 816 817 dma_sync_single_for_device(dp->dev, rxbuf->dma_addr + dma_off, 818 pkt_len, DMA_BIDIRECTIONAL); 819 820 /* Build TX descriptor */ 821 txd = &tx_ring->txds[wr_idx]; 822 txd->offset_eop = NFD3_DESC_TX_EOP; 823 txd->dma_len = cpu_to_le16(pkt_len); 824 nfp_desc_set_dma_addr_40b(txd, rxbuf->dma_addr + dma_off); 825 txd->data_len = cpu_to_le16(pkt_len); 826 827 txd->flags = 0; 828 txd->mss = 0; 829 txd->lso_hdrlen = 0; 830 831 tx_ring->wr_p++; 832 tx_ring->wr_ptr_add++; 833 return true; 834 } 835 836 /** 837 * nfp_nfd3_rx() - receive up to @budget packets on @rx_ring 838 * @rx_ring: RX ring to receive from 839 * @budget: NAPI budget 840 * 841 * Note, this function is separated out from the napi poll function to 842 * more cleanly separate packet receive code from other bookkeeping 843 * functions performed in the napi poll function. 844 * 845 * Return: Number of packets received. 846 */ 847 static int nfp_nfd3_rx(struct nfp_net_rx_ring *rx_ring, int budget) 848 { 849 struct nfp_net_r_vector *r_vec = rx_ring->r_vec; 850 struct nfp_net_dp *dp = &r_vec->nfp_net->dp; 851 struct nfp_net_tx_ring *tx_ring; 852 struct bpf_prog *xdp_prog; 853 bool xdp_tx_cmpl = false; 854 unsigned int true_bufsz; 855 struct sk_buff *skb; 856 int pkts_polled = 0; 857 struct xdp_buff xdp; 858 int idx; 859 860 xdp_prog = READ_ONCE(dp->xdp_prog); 861 true_bufsz = xdp_prog ? PAGE_SIZE : dp->fl_bufsz; 862 xdp_init_buff(&xdp, PAGE_SIZE - NFP_NET_RX_BUF_HEADROOM, 863 &rx_ring->xdp_rxq); 864 tx_ring = r_vec->xdp_ring; 865 866 while (pkts_polled < budget) { 867 unsigned int meta_len, data_len, meta_off, pkt_len, pkt_off; 868 struct nfp_net_rx_buf *rxbuf; 869 struct nfp_net_rx_desc *rxd; 870 struct nfp_meta_parsed meta; 871 bool redir_egress = false; 872 struct net_device *netdev; 873 dma_addr_t new_dma_addr; 874 u32 meta_len_xdp = 0; 875 void *new_frag; 876 877 idx = D_IDX(rx_ring, rx_ring->rd_p); 878 879 rxd = &rx_ring->rxds[idx]; 880 if (!(rxd->rxd.meta_len_dd & PCIE_DESC_RX_DD)) 881 break; 882 883 /* Memory barrier to ensure that we won't do other reads 884 * before the DD bit. 885 */ 886 dma_rmb(); 887 888 memset(&meta, 0, sizeof(meta)); 889 890 rx_ring->rd_p++; 891 pkts_polled++; 892 893 rxbuf = &rx_ring->rxbufs[idx]; 894 /* < meta_len > 895 * <-- [rx_offset] --> 896 * --------------------------------------------------------- 897 * | [XX] | metadata | packet | XXXX | 898 * --------------------------------------------------------- 899 * <---------------- data_len ---------------> 900 * 901 * The rx_offset is fixed for all packets, the meta_len can vary 902 * on a packet by packet basis. If rx_offset is set to zero 903 * (_RX_OFFSET_DYNAMIC) metadata starts at the beginning of the 904 * buffer and is immediately followed by the packet (no [XX]). 905 */ 906 meta_len = rxd->rxd.meta_len_dd & PCIE_DESC_RX_META_LEN_MASK; 907 data_len = le16_to_cpu(rxd->rxd.data_len); 908 pkt_len = data_len - meta_len; 909 910 pkt_off = NFP_NET_RX_BUF_HEADROOM + dp->rx_dma_off; 911 if (dp->rx_offset == NFP_NET_CFG_RX_OFFSET_DYNAMIC) 912 pkt_off += meta_len; 913 else 914 pkt_off += dp->rx_offset; 915 meta_off = pkt_off - meta_len; 916 917 /* Stats update */ 918 u64_stats_update_begin(&r_vec->rx_sync); 919 r_vec->rx_pkts++; 920 r_vec->rx_bytes += pkt_len; 921 u64_stats_update_end(&r_vec->rx_sync); 922 923 if (unlikely(meta_len > NFP_NET_MAX_PREPEND || 924 (dp->rx_offset && meta_len > dp->rx_offset))) { 925 nn_dp_warn(dp, "oversized RX packet metadata %u\n", 926 meta_len); 927 nfp_nfd3_rx_drop(dp, r_vec, rx_ring, rxbuf, NULL); 928 continue; 929 } 930 931 nfp_net_dma_sync_cpu_rx(dp, rxbuf->dma_addr + meta_off, 932 data_len); 933 934 if (!dp->chained_metadata_format) { 935 nfp_nfd3_set_hash_desc(dp->netdev, &meta, 936 rxbuf->frag + meta_off, rxd); 937 } else if (meta_len) { 938 if (unlikely(nfp_nfd3_parse_meta(dp->netdev, &meta, 939 rxbuf->frag + meta_off, 940 rxbuf->frag + pkt_off, 941 pkt_len, meta_len))) { 942 nn_dp_warn(dp, "invalid RX packet metadata\n"); 943 nfp_nfd3_rx_drop(dp, r_vec, rx_ring, rxbuf, 944 NULL); 945 continue; 946 } 947 } 948 949 if (xdp_prog && !meta.portid) { 950 void *orig_data = rxbuf->frag + pkt_off; 951 unsigned int dma_off; 952 int act; 953 954 xdp_prepare_buff(&xdp, 955 rxbuf->frag + NFP_NET_RX_BUF_HEADROOM, 956 pkt_off - NFP_NET_RX_BUF_HEADROOM, 957 pkt_len, true); 958 959 act = bpf_prog_run_xdp(xdp_prog, &xdp); 960 961 pkt_len = xdp.data_end - xdp.data; 962 pkt_off += xdp.data - orig_data; 963 964 switch (act) { 965 case XDP_PASS: 966 meta_len_xdp = xdp.data - xdp.data_meta; 967 break; 968 case XDP_TX: 969 dma_off = pkt_off - NFP_NET_RX_BUF_HEADROOM; 970 if (unlikely(!nfp_nfd3_tx_xdp_buf(dp, rx_ring, 971 tx_ring, 972 rxbuf, 973 dma_off, 974 pkt_len, 975 &xdp_tx_cmpl))) 976 trace_xdp_exception(dp->netdev, 977 xdp_prog, act); 978 continue; 979 default: 980 bpf_warn_invalid_xdp_action(dp->netdev, xdp_prog, act); 981 fallthrough; 982 case XDP_ABORTED: 983 trace_xdp_exception(dp->netdev, xdp_prog, act); 984 fallthrough; 985 case XDP_DROP: 986 nfp_nfd3_rx_give_one(dp, rx_ring, rxbuf->frag, 987 rxbuf->dma_addr); 988 continue; 989 } 990 } 991 992 if (likely(!meta.portid)) { 993 netdev = dp->netdev; 994 } else if (meta.portid == NFP_META_PORT_ID_CTRL) { 995 struct nfp_net *nn = netdev_priv(dp->netdev); 996 997 nfp_app_ctrl_rx_raw(nn->app, rxbuf->frag + pkt_off, 998 pkt_len); 999 nfp_nfd3_rx_give_one(dp, rx_ring, rxbuf->frag, 1000 rxbuf->dma_addr); 1001 continue; 1002 } else { 1003 struct nfp_net *nn; 1004 1005 nn = netdev_priv(dp->netdev); 1006 netdev = nfp_app_dev_get(nn->app, meta.portid, 1007 &redir_egress); 1008 if (unlikely(!netdev)) { 1009 nfp_nfd3_rx_drop(dp, r_vec, rx_ring, rxbuf, 1010 NULL); 1011 continue; 1012 } 1013 1014 if (nfp_netdev_is_nfp_repr(netdev)) 1015 nfp_repr_inc_rx_stats(netdev, pkt_len); 1016 } 1017 1018 skb = build_skb(rxbuf->frag, true_bufsz); 1019 if (unlikely(!skb)) { 1020 nfp_nfd3_rx_drop(dp, r_vec, rx_ring, rxbuf, NULL); 1021 continue; 1022 } 1023 new_frag = nfp_nfd3_napi_alloc_one(dp, &new_dma_addr); 1024 if (unlikely(!new_frag)) { 1025 nfp_nfd3_rx_drop(dp, r_vec, rx_ring, rxbuf, skb); 1026 continue; 1027 } 1028 1029 nfp_net_dma_unmap_rx(dp, rxbuf->dma_addr); 1030 1031 nfp_nfd3_rx_give_one(dp, rx_ring, new_frag, new_dma_addr); 1032 1033 skb_reserve(skb, pkt_off); 1034 skb_put(skb, pkt_len); 1035 1036 skb->mark = meta.mark; 1037 skb_set_hash(skb, meta.hash, meta.hash_type); 1038 1039 skb_record_rx_queue(skb, rx_ring->idx); 1040 skb->protocol = eth_type_trans(skb, netdev); 1041 1042 nfp_nfd3_rx_csum(dp, r_vec, rxd, &meta, skb); 1043 1044 #ifdef CONFIG_TLS_DEVICE 1045 if (rxd->rxd.flags & PCIE_DESC_RX_DECRYPTED) { 1046 skb->decrypted = true; 1047 u64_stats_update_begin(&r_vec->rx_sync); 1048 r_vec->hw_tls_rx++; 1049 u64_stats_update_end(&r_vec->rx_sync); 1050 } 1051 #endif 1052 1053 if (rxd->rxd.flags & PCIE_DESC_RX_VLAN) 1054 __vlan_hwaccel_put_tag(skb, htons(ETH_P_8021Q), 1055 le16_to_cpu(rxd->rxd.vlan)); 1056 if (meta_len_xdp) 1057 skb_metadata_set(skb, meta_len_xdp); 1058 1059 if (likely(!redir_egress)) { 1060 napi_gro_receive(&rx_ring->r_vec->napi, skb); 1061 } else { 1062 skb->dev = netdev; 1063 skb_reset_network_header(skb); 1064 __skb_push(skb, ETH_HLEN); 1065 dev_queue_xmit(skb); 1066 } 1067 } 1068 1069 if (xdp_prog) { 1070 if (tx_ring->wr_ptr_add) 1071 nfp_net_tx_xmit_more_flush(tx_ring); 1072 else if (unlikely(tx_ring->wr_p != tx_ring->rd_p) && 1073 !xdp_tx_cmpl) 1074 if (!nfp_nfd3_xdp_complete(tx_ring)) 1075 pkts_polled = budget; 1076 } 1077 1078 return pkts_polled; 1079 } 1080 1081 /** 1082 * nfp_nfd3_poll() - napi poll function 1083 * @napi: NAPI structure 1084 * @budget: NAPI budget 1085 * 1086 * Return: number of packets polled. 1087 */ 1088 int nfp_nfd3_poll(struct napi_struct *napi, int budget) 1089 { 1090 struct nfp_net_r_vector *r_vec = 1091 container_of(napi, struct nfp_net_r_vector, napi); 1092 unsigned int pkts_polled = 0; 1093 1094 if (r_vec->tx_ring) 1095 nfp_nfd3_tx_complete(r_vec->tx_ring, budget); 1096 if (r_vec->rx_ring) 1097 pkts_polled = nfp_nfd3_rx(r_vec->rx_ring, budget); 1098 1099 if (pkts_polled < budget) 1100 if (napi_complete_done(napi, pkts_polled)) 1101 nfp_net_irq_unmask(r_vec->nfp_net, r_vec->irq_entry); 1102 1103 if (r_vec->nfp_net->rx_coalesce_adapt_on && r_vec->rx_ring) { 1104 struct dim_sample dim_sample = {}; 1105 unsigned int start; 1106 u64 pkts, bytes; 1107 1108 do { 1109 start = u64_stats_fetch_begin(&r_vec->rx_sync); 1110 pkts = r_vec->rx_pkts; 1111 bytes = r_vec->rx_bytes; 1112 } while (u64_stats_fetch_retry(&r_vec->rx_sync, start)); 1113 1114 dim_update_sample(r_vec->event_ctr, pkts, bytes, &dim_sample); 1115 net_dim(&r_vec->rx_dim, dim_sample); 1116 } 1117 1118 if (r_vec->nfp_net->tx_coalesce_adapt_on && r_vec->tx_ring) { 1119 struct dim_sample dim_sample = {}; 1120 unsigned int start; 1121 u64 pkts, bytes; 1122 1123 do { 1124 start = u64_stats_fetch_begin(&r_vec->tx_sync); 1125 pkts = r_vec->tx_pkts; 1126 bytes = r_vec->tx_bytes; 1127 } while (u64_stats_fetch_retry(&r_vec->tx_sync, start)); 1128 1129 dim_update_sample(r_vec->event_ctr, pkts, bytes, &dim_sample); 1130 net_dim(&r_vec->tx_dim, dim_sample); 1131 } 1132 1133 return pkts_polled; 1134 } 1135 1136 /* Control device data path 1137 */ 1138 1139 bool 1140 nfp_nfd3_ctrl_tx_one(struct nfp_net *nn, struct nfp_net_r_vector *r_vec, 1141 struct sk_buff *skb, bool old) 1142 { 1143 unsigned int real_len = skb->len, meta_len = 0; 1144 struct nfp_net_tx_ring *tx_ring; 1145 struct nfp_nfd3_tx_buf *txbuf; 1146 struct nfp_nfd3_tx_desc *txd; 1147 struct nfp_net_dp *dp; 1148 dma_addr_t dma_addr; 1149 int wr_idx; 1150 1151 dp = &r_vec->nfp_net->dp; 1152 tx_ring = r_vec->tx_ring; 1153 1154 if (WARN_ON_ONCE(skb_shinfo(skb)->nr_frags)) { 1155 nn_dp_warn(dp, "Driver's CTRL TX does not implement gather\n"); 1156 goto err_free; 1157 } 1158 1159 if (unlikely(nfp_net_tx_full(tx_ring, 1))) { 1160 u64_stats_update_begin(&r_vec->tx_sync); 1161 r_vec->tx_busy++; 1162 u64_stats_update_end(&r_vec->tx_sync); 1163 if (!old) 1164 __skb_queue_tail(&r_vec->queue, skb); 1165 else 1166 __skb_queue_head(&r_vec->queue, skb); 1167 return true; 1168 } 1169 1170 if (nfp_app_ctrl_has_meta(nn->app)) { 1171 if (unlikely(skb_headroom(skb) < 8)) { 1172 nn_dp_warn(dp, "CTRL TX on skb without headroom\n"); 1173 goto err_free; 1174 } 1175 meta_len = 8; 1176 put_unaligned_be32(NFP_META_PORT_ID_CTRL, skb_push(skb, 4)); 1177 put_unaligned_be32(NFP_NET_META_PORTID, skb_push(skb, 4)); 1178 } 1179 1180 /* Start with the head skbuf */ 1181 dma_addr = dma_map_single(dp->dev, skb->data, skb_headlen(skb), 1182 DMA_TO_DEVICE); 1183 if (dma_mapping_error(dp->dev, dma_addr)) 1184 goto err_dma_warn; 1185 1186 wr_idx = D_IDX(tx_ring, tx_ring->wr_p); 1187 1188 /* Stash the soft descriptor of the head then initialize it */ 1189 txbuf = &tx_ring->txbufs[wr_idx]; 1190 txbuf->skb = skb; 1191 txbuf->dma_addr = dma_addr; 1192 txbuf->fidx = -1; 1193 txbuf->pkt_cnt = 1; 1194 txbuf->real_len = real_len; 1195 1196 /* Build TX descriptor */ 1197 txd = &tx_ring->txds[wr_idx]; 1198 txd->offset_eop = meta_len | NFD3_DESC_TX_EOP; 1199 txd->dma_len = cpu_to_le16(skb_headlen(skb)); 1200 nfp_desc_set_dma_addr_40b(txd, dma_addr); 1201 txd->data_len = cpu_to_le16(skb->len); 1202 1203 txd->flags = 0; 1204 txd->mss = 0; 1205 txd->lso_hdrlen = 0; 1206 1207 tx_ring->wr_p++; 1208 tx_ring->wr_ptr_add++; 1209 nfp_net_tx_xmit_more_flush(tx_ring); 1210 1211 return false; 1212 1213 err_dma_warn: 1214 nn_dp_warn(dp, "Failed to DMA map TX CTRL buffer\n"); 1215 err_free: 1216 u64_stats_update_begin(&r_vec->tx_sync); 1217 r_vec->tx_errors++; 1218 u64_stats_update_end(&r_vec->tx_sync); 1219 dev_kfree_skb_any(skb); 1220 return false; 1221 } 1222 1223 static void __nfp_ctrl_tx_queued(struct nfp_net_r_vector *r_vec) 1224 { 1225 struct sk_buff *skb; 1226 1227 while ((skb = __skb_dequeue(&r_vec->queue))) 1228 if (nfp_nfd3_ctrl_tx_one(r_vec->nfp_net, r_vec, skb, true)) 1229 return; 1230 } 1231 1232 static bool 1233 nfp_ctrl_meta_ok(struct nfp_net *nn, void *data, unsigned int meta_len) 1234 { 1235 u32 meta_type, meta_tag; 1236 1237 if (!nfp_app_ctrl_has_meta(nn->app)) 1238 return !meta_len; 1239 1240 if (meta_len != 8) 1241 return false; 1242 1243 meta_type = get_unaligned_be32(data); 1244 meta_tag = get_unaligned_be32(data + 4); 1245 1246 return (meta_type == NFP_NET_META_PORTID && 1247 meta_tag == NFP_META_PORT_ID_CTRL); 1248 } 1249 1250 static bool 1251 nfp_ctrl_rx_one(struct nfp_net *nn, struct nfp_net_dp *dp, 1252 struct nfp_net_r_vector *r_vec, struct nfp_net_rx_ring *rx_ring) 1253 { 1254 unsigned int meta_len, data_len, meta_off, pkt_len, pkt_off; 1255 struct nfp_net_rx_buf *rxbuf; 1256 struct nfp_net_rx_desc *rxd; 1257 dma_addr_t new_dma_addr; 1258 struct sk_buff *skb; 1259 void *new_frag; 1260 int idx; 1261 1262 idx = D_IDX(rx_ring, rx_ring->rd_p); 1263 1264 rxd = &rx_ring->rxds[idx]; 1265 if (!(rxd->rxd.meta_len_dd & PCIE_DESC_RX_DD)) 1266 return false; 1267 1268 /* Memory barrier to ensure that we won't do other reads 1269 * before the DD bit. 1270 */ 1271 dma_rmb(); 1272 1273 rx_ring->rd_p++; 1274 1275 rxbuf = &rx_ring->rxbufs[idx]; 1276 meta_len = rxd->rxd.meta_len_dd & PCIE_DESC_RX_META_LEN_MASK; 1277 data_len = le16_to_cpu(rxd->rxd.data_len); 1278 pkt_len = data_len - meta_len; 1279 1280 pkt_off = NFP_NET_RX_BUF_HEADROOM + dp->rx_dma_off; 1281 if (dp->rx_offset == NFP_NET_CFG_RX_OFFSET_DYNAMIC) 1282 pkt_off += meta_len; 1283 else 1284 pkt_off += dp->rx_offset; 1285 meta_off = pkt_off - meta_len; 1286 1287 /* Stats update */ 1288 u64_stats_update_begin(&r_vec->rx_sync); 1289 r_vec->rx_pkts++; 1290 r_vec->rx_bytes += pkt_len; 1291 u64_stats_update_end(&r_vec->rx_sync); 1292 1293 nfp_net_dma_sync_cpu_rx(dp, rxbuf->dma_addr + meta_off, data_len); 1294 1295 if (unlikely(!nfp_ctrl_meta_ok(nn, rxbuf->frag + meta_off, meta_len))) { 1296 nn_dp_warn(dp, "incorrect metadata for ctrl packet (%d)\n", 1297 meta_len); 1298 nfp_nfd3_rx_drop(dp, r_vec, rx_ring, rxbuf, NULL); 1299 return true; 1300 } 1301 1302 skb = build_skb(rxbuf->frag, dp->fl_bufsz); 1303 if (unlikely(!skb)) { 1304 nfp_nfd3_rx_drop(dp, r_vec, rx_ring, rxbuf, NULL); 1305 return true; 1306 } 1307 new_frag = nfp_nfd3_napi_alloc_one(dp, &new_dma_addr); 1308 if (unlikely(!new_frag)) { 1309 nfp_nfd3_rx_drop(dp, r_vec, rx_ring, rxbuf, skb); 1310 return true; 1311 } 1312 1313 nfp_net_dma_unmap_rx(dp, rxbuf->dma_addr); 1314 1315 nfp_nfd3_rx_give_one(dp, rx_ring, new_frag, new_dma_addr); 1316 1317 skb_reserve(skb, pkt_off); 1318 skb_put(skb, pkt_len); 1319 1320 nfp_app_ctrl_rx(nn->app, skb); 1321 1322 return true; 1323 } 1324 1325 static bool nfp_ctrl_rx(struct nfp_net_r_vector *r_vec) 1326 { 1327 struct nfp_net_rx_ring *rx_ring = r_vec->rx_ring; 1328 struct nfp_net *nn = r_vec->nfp_net; 1329 struct nfp_net_dp *dp = &nn->dp; 1330 unsigned int budget = 512; 1331 1332 while (nfp_ctrl_rx_one(nn, dp, r_vec, rx_ring) && budget--) 1333 continue; 1334 1335 return budget; 1336 } 1337 1338 void nfp_nfd3_ctrl_poll(struct tasklet_struct *t) 1339 { 1340 struct nfp_net_r_vector *r_vec = from_tasklet(r_vec, t, tasklet); 1341 1342 spin_lock(&r_vec->lock); 1343 nfp_nfd3_tx_complete(r_vec->tx_ring, 0); 1344 __nfp_ctrl_tx_queued(r_vec); 1345 spin_unlock(&r_vec->lock); 1346 1347 if (nfp_ctrl_rx(r_vec)) { 1348 nfp_net_irq_unmask(r_vec->nfp_net, r_vec->irq_entry); 1349 } else { 1350 tasklet_schedule(&r_vec->tasklet); 1351 nn_dp_warn(&r_vec->nfp_net->dp, 1352 "control message budget exceeded!\n"); 1353 } 1354 } 1355