1 // SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 2 /* Copyright (C) 2015-2019 Netronome Systems, Inc. */ 3 4 #include <linux/bpf_trace.h> 5 #include <linux/netdevice.h> 6 #include <linux/bitfield.h> 7 8 #include "../nfp_app.h" 9 #include "../nfp_net.h" 10 #include "../nfp_net_dp.h" 11 #include "../nfp_net_xsk.h" 12 #include "../crypto/crypto.h" 13 #include "../crypto/fw.h" 14 #include "nfd3.h" 15 16 /* Transmit processing 17 * 18 * One queue controller peripheral queue is used for transmit. The 19 * driver en-queues packets for transmit by advancing the write 20 * pointer. The device indicates that packets have transmitted by 21 * advancing the read pointer. The driver maintains a local copy of 22 * the read and write pointer in @struct nfp_net_tx_ring. The driver 23 * keeps @wr_p in sync with the queue controller write pointer and can 24 * determine how many packets have been transmitted by comparing its 25 * copy of the read pointer @rd_p with the read pointer maintained by 26 * the queue controller peripheral. 27 */ 28 29 /* Wrappers for deciding when to stop and restart TX queues */ 30 static int nfp_nfd3_tx_ring_should_wake(struct nfp_net_tx_ring *tx_ring) 31 { 32 return !nfp_net_tx_full(tx_ring, MAX_SKB_FRAGS * 4); 33 } 34 35 static int nfp_nfd3_tx_ring_should_stop(struct nfp_net_tx_ring *tx_ring) 36 { 37 return nfp_net_tx_full(tx_ring, MAX_SKB_FRAGS + 1); 38 } 39 40 /** 41 * nfp_nfd3_tx_ring_stop() - stop tx ring 42 * @nd_q: netdev queue 43 * @tx_ring: driver tx queue structure 44 * 45 * Safely stop TX ring. Remember that while we are running .start_xmit() 46 * someone else may be cleaning the TX ring completions so we need to be 47 * extra careful here. 48 */ 49 static void 50 nfp_nfd3_tx_ring_stop(struct netdev_queue *nd_q, 51 struct nfp_net_tx_ring *tx_ring) 52 { 53 netif_tx_stop_queue(nd_q); 54 55 /* We can race with the TX completion out of NAPI so recheck */ 56 smp_mb(); 57 if (unlikely(nfp_nfd3_tx_ring_should_wake(tx_ring))) 58 netif_tx_start_queue(nd_q); 59 } 60 61 /** 62 * nfp_nfd3_tx_tso() - Set up Tx descriptor for LSO 63 * @r_vec: per-ring structure 64 * @txbuf: Pointer to driver soft TX descriptor 65 * @txd: Pointer to HW TX descriptor 66 * @skb: Pointer to SKB 67 * @md_bytes: Prepend length 68 * 69 * Set up Tx descriptor for LSO, do nothing for non-LSO skbs. 70 * Return error on packet header greater than maximum supported LSO header size. 71 */ 72 static void 73 nfp_nfd3_tx_tso(struct nfp_net_r_vector *r_vec, struct nfp_nfd3_tx_buf *txbuf, 74 struct nfp_nfd3_tx_desc *txd, struct sk_buff *skb, u32 md_bytes) 75 { 76 u32 l3_offset, l4_offset, hdrlen; 77 u16 mss; 78 79 if (!skb_is_gso(skb)) 80 return; 81 82 if (!skb->encapsulation) { 83 l3_offset = skb_network_offset(skb); 84 l4_offset = skb_transport_offset(skb); 85 hdrlen = skb_tcp_all_headers(skb); 86 } else { 87 l3_offset = skb_inner_network_offset(skb); 88 l4_offset = skb_inner_transport_offset(skb); 89 hdrlen = skb_inner_tcp_all_headers(skb); 90 } 91 92 txbuf->pkt_cnt = skb_shinfo(skb)->gso_segs; 93 txbuf->real_len += hdrlen * (txbuf->pkt_cnt - 1); 94 95 mss = skb_shinfo(skb)->gso_size & NFD3_DESC_TX_MSS_MASK; 96 txd->l3_offset = l3_offset - md_bytes; 97 txd->l4_offset = l4_offset - md_bytes; 98 txd->lso_hdrlen = hdrlen - md_bytes; 99 txd->mss = cpu_to_le16(mss); 100 txd->flags |= NFD3_DESC_TX_LSO; 101 102 u64_stats_update_begin(&r_vec->tx_sync); 103 r_vec->tx_lso++; 104 u64_stats_update_end(&r_vec->tx_sync); 105 } 106 107 /** 108 * nfp_nfd3_tx_csum() - Set TX CSUM offload flags in TX descriptor 109 * @dp: NFP Net data path struct 110 * @r_vec: per-ring structure 111 * @txbuf: Pointer to driver soft TX descriptor 112 * @txd: Pointer to TX descriptor 113 * @skb: Pointer to SKB 114 * 115 * This function sets the TX checksum flags in the TX descriptor based 116 * on the configuration and the protocol of the packet to be transmitted. 117 */ 118 static void 119 nfp_nfd3_tx_csum(struct nfp_net_dp *dp, struct nfp_net_r_vector *r_vec, 120 struct nfp_nfd3_tx_buf *txbuf, struct nfp_nfd3_tx_desc *txd, 121 struct sk_buff *skb) 122 { 123 struct ipv6hdr *ipv6h; 124 struct iphdr *iph; 125 u8 l4_hdr; 126 127 if (!(dp->ctrl & NFP_NET_CFG_CTRL_TXCSUM)) 128 return; 129 130 if (skb->ip_summed != CHECKSUM_PARTIAL) 131 return; 132 133 txd->flags |= NFD3_DESC_TX_CSUM; 134 if (skb->encapsulation) 135 txd->flags |= NFD3_DESC_TX_ENCAP; 136 137 iph = skb->encapsulation ? inner_ip_hdr(skb) : ip_hdr(skb); 138 ipv6h = skb->encapsulation ? inner_ipv6_hdr(skb) : ipv6_hdr(skb); 139 140 if (iph->version == 4) { 141 txd->flags |= NFD3_DESC_TX_IP4_CSUM; 142 l4_hdr = iph->protocol; 143 } else if (ipv6h->version == 6) { 144 l4_hdr = ipv6h->nexthdr; 145 } else { 146 nn_dp_warn(dp, "partial checksum but ipv=%x!\n", iph->version); 147 return; 148 } 149 150 switch (l4_hdr) { 151 case IPPROTO_TCP: 152 txd->flags |= NFD3_DESC_TX_TCP_CSUM; 153 break; 154 case IPPROTO_UDP: 155 txd->flags |= NFD3_DESC_TX_UDP_CSUM; 156 break; 157 default: 158 nn_dp_warn(dp, "partial checksum but l4 proto=%x!\n", l4_hdr); 159 return; 160 } 161 162 u64_stats_update_begin(&r_vec->tx_sync); 163 if (skb->encapsulation) 164 r_vec->hw_csum_tx_inner += txbuf->pkt_cnt; 165 else 166 r_vec->hw_csum_tx += txbuf->pkt_cnt; 167 u64_stats_update_end(&r_vec->tx_sync); 168 } 169 170 static int nfp_nfd3_prep_tx_meta(struct nfp_net_dp *dp, struct sk_buff *skb, u64 tls_handle) 171 { 172 struct metadata_dst *md_dst = skb_metadata_dst(skb); 173 unsigned char *data; 174 bool vlan_insert; 175 u32 meta_id = 0; 176 int md_bytes; 177 178 if (unlikely(md_dst || tls_handle)) { 179 if (unlikely(md_dst && md_dst->type != METADATA_HW_PORT_MUX)) 180 md_dst = NULL; 181 } 182 183 vlan_insert = skb_vlan_tag_present(skb) && (dp->ctrl & NFP_NET_CFG_CTRL_TXVLAN_V2); 184 185 if (!(md_dst || tls_handle || vlan_insert)) 186 return 0; 187 188 md_bytes = sizeof(meta_id) + 189 !!md_dst * NFP_NET_META_PORTID_SIZE + 190 !!tls_handle * NFP_NET_META_CONN_HANDLE_SIZE + 191 vlan_insert * NFP_NET_META_VLAN_SIZE; 192 193 if (unlikely(skb_cow_head(skb, md_bytes))) 194 return -ENOMEM; 195 196 data = skb_push(skb, md_bytes) + md_bytes; 197 if (md_dst) { 198 data -= NFP_NET_META_PORTID_SIZE; 199 put_unaligned_be32(md_dst->u.port_info.port_id, data); 200 meta_id = NFP_NET_META_PORTID; 201 } 202 if (tls_handle) { 203 /* conn handle is opaque, we just use u64 to be able to quickly 204 * compare it to zero 205 */ 206 data -= NFP_NET_META_CONN_HANDLE_SIZE; 207 memcpy(data, &tls_handle, sizeof(tls_handle)); 208 meta_id <<= NFP_NET_META_FIELD_SIZE; 209 meta_id |= NFP_NET_META_CONN_HANDLE; 210 } 211 if (vlan_insert) { 212 data -= NFP_NET_META_VLAN_SIZE; 213 /* data type of skb->vlan_proto is __be16 214 * so it fills metadata without calling put_unaligned_be16 215 */ 216 memcpy(data, &skb->vlan_proto, sizeof(skb->vlan_proto)); 217 put_unaligned_be16(skb_vlan_tag_get(skb), data + sizeof(skb->vlan_proto)); 218 meta_id <<= NFP_NET_META_FIELD_SIZE; 219 meta_id |= NFP_NET_META_VLAN; 220 } 221 222 data -= sizeof(meta_id); 223 put_unaligned_be32(meta_id, data); 224 225 return md_bytes; 226 } 227 228 /** 229 * nfp_nfd3_tx() - Main transmit entry point 230 * @skb: SKB to transmit 231 * @netdev: netdev structure 232 * 233 * Return: NETDEV_TX_OK on success. 234 */ 235 netdev_tx_t nfp_nfd3_tx(struct sk_buff *skb, struct net_device *netdev) 236 { 237 struct nfp_net *nn = netdev_priv(netdev); 238 int f, nr_frags, wr_idx, md_bytes; 239 struct nfp_net_tx_ring *tx_ring; 240 struct nfp_net_r_vector *r_vec; 241 struct nfp_nfd3_tx_buf *txbuf; 242 struct nfp_nfd3_tx_desc *txd; 243 struct netdev_queue *nd_q; 244 const skb_frag_t *frag; 245 struct nfp_net_dp *dp; 246 dma_addr_t dma_addr; 247 unsigned int fsize; 248 u64 tls_handle = 0; 249 u16 qidx; 250 251 dp = &nn->dp; 252 qidx = skb_get_queue_mapping(skb); 253 tx_ring = &dp->tx_rings[qidx]; 254 r_vec = tx_ring->r_vec; 255 256 nr_frags = skb_shinfo(skb)->nr_frags; 257 258 if (unlikely(nfp_net_tx_full(tx_ring, nr_frags + 1))) { 259 nn_dp_warn(dp, "TX ring %d busy. wrp=%u rdp=%u\n", 260 qidx, tx_ring->wr_p, tx_ring->rd_p); 261 nd_q = netdev_get_tx_queue(dp->netdev, qidx); 262 netif_tx_stop_queue(nd_q); 263 nfp_net_tx_xmit_more_flush(tx_ring); 264 u64_stats_update_begin(&r_vec->tx_sync); 265 r_vec->tx_busy++; 266 u64_stats_update_end(&r_vec->tx_sync); 267 return NETDEV_TX_BUSY; 268 } 269 270 skb = nfp_net_tls_tx(dp, r_vec, skb, &tls_handle, &nr_frags); 271 if (unlikely(!skb)) { 272 nfp_net_tx_xmit_more_flush(tx_ring); 273 return NETDEV_TX_OK; 274 } 275 276 md_bytes = nfp_nfd3_prep_tx_meta(dp, skb, tls_handle); 277 if (unlikely(md_bytes < 0)) 278 goto err_flush; 279 280 /* Start with the head skbuf */ 281 dma_addr = dma_map_single(dp->dev, skb->data, skb_headlen(skb), 282 DMA_TO_DEVICE); 283 if (dma_mapping_error(dp->dev, dma_addr)) 284 goto err_dma_err; 285 286 wr_idx = D_IDX(tx_ring, tx_ring->wr_p); 287 288 /* Stash the soft descriptor of the head then initialize it */ 289 txbuf = &tx_ring->txbufs[wr_idx]; 290 txbuf->skb = skb; 291 txbuf->dma_addr = dma_addr; 292 txbuf->fidx = -1; 293 txbuf->pkt_cnt = 1; 294 txbuf->real_len = skb->len; 295 296 /* Build TX descriptor */ 297 txd = &tx_ring->txds[wr_idx]; 298 txd->offset_eop = (nr_frags ? 0 : NFD3_DESC_TX_EOP) | md_bytes; 299 txd->dma_len = cpu_to_le16(skb_headlen(skb)); 300 nfp_desc_set_dma_addr_40b(txd, dma_addr); 301 txd->data_len = cpu_to_le16(skb->len); 302 303 txd->flags = 0; 304 txd->mss = 0; 305 txd->lso_hdrlen = 0; 306 307 /* Do not reorder - tso may adjust pkt cnt, vlan may override fields */ 308 nfp_nfd3_tx_tso(r_vec, txbuf, txd, skb, md_bytes); 309 nfp_nfd3_tx_csum(dp, r_vec, txbuf, txd, skb); 310 if (skb_vlan_tag_present(skb) && dp->ctrl & NFP_NET_CFG_CTRL_TXVLAN) { 311 txd->flags |= NFD3_DESC_TX_VLAN; 312 txd->vlan = cpu_to_le16(skb_vlan_tag_get(skb)); 313 } 314 315 /* Gather DMA */ 316 if (nr_frags > 0) { 317 __le64 second_half; 318 319 /* all descs must match except for in addr, length and eop */ 320 second_half = txd->vals8[1]; 321 322 for (f = 0; f < nr_frags; f++) { 323 frag = &skb_shinfo(skb)->frags[f]; 324 fsize = skb_frag_size(frag); 325 326 dma_addr = skb_frag_dma_map(dp->dev, frag, 0, 327 fsize, DMA_TO_DEVICE); 328 if (dma_mapping_error(dp->dev, dma_addr)) 329 goto err_unmap; 330 331 wr_idx = D_IDX(tx_ring, wr_idx + 1); 332 tx_ring->txbufs[wr_idx].skb = skb; 333 tx_ring->txbufs[wr_idx].dma_addr = dma_addr; 334 tx_ring->txbufs[wr_idx].fidx = f; 335 336 txd = &tx_ring->txds[wr_idx]; 337 txd->dma_len = cpu_to_le16(fsize); 338 nfp_desc_set_dma_addr_40b(txd, dma_addr); 339 txd->offset_eop = md_bytes | 340 ((f == nr_frags - 1) ? NFD3_DESC_TX_EOP : 0); 341 txd->vals8[1] = second_half; 342 } 343 344 u64_stats_update_begin(&r_vec->tx_sync); 345 r_vec->tx_gather++; 346 u64_stats_update_end(&r_vec->tx_sync); 347 } 348 349 skb_tx_timestamp(skb); 350 351 nd_q = netdev_get_tx_queue(dp->netdev, tx_ring->idx); 352 353 tx_ring->wr_p += nr_frags + 1; 354 if (nfp_nfd3_tx_ring_should_stop(tx_ring)) 355 nfp_nfd3_tx_ring_stop(nd_q, tx_ring); 356 357 tx_ring->wr_ptr_add += nr_frags + 1; 358 if (__netdev_tx_sent_queue(nd_q, txbuf->real_len, netdev_xmit_more())) 359 nfp_net_tx_xmit_more_flush(tx_ring); 360 361 return NETDEV_TX_OK; 362 363 err_unmap: 364 while (--f >= 0) { 365 frag = &skb_shinfo(skb)->frags[f]; 366 dma_unmap_page(dp->dev, tx_ring->txbufs[wr_idx].dma_addr, 367 skb_frag_size(frag), DMA_TO_DEVICE); 368 tx_ring->txbufs[wr_idx].skb = NULL; 369 tx_ring->txbufs[wr_idx].dma_addr = 0; 370 tx_ring->txbufs[wr_idx].fidx = -2; 371 wr_idx = wr_idx - 1; 372 if (wr_idx < 0) 373 wr_idx += tx_ring->cnt; 374 } 375 dma_unmap_single(dp->dev, tx_ring->txbufs[wr_idx].dma_addr, 376 skb_headlen(skb), DMA_TO_DEVICE); 377 tx_ring->txbufs[wr_idx].skb = NULL; 378 tx_ring->txbufs[wr_idx].dma_addr = 0; 379 tx_ring->txbufs[wr_idx].fidx = -2; 380 err_dma_err: 381 nn_dp_warn(dp, "Failed to map DMA TX buffer\n"); 382 err_flush: 383 nfp_net_tx_xmit_more_flush(tx_ring); 384 u64_stats_update_begin(&r_vec->tx_sync); 385 r_vec->tx_errors++; 386 u64_stats_update_end(&r_vec->tx_sync); 387 nfp_net_tls_tx_undo(skb, tls_handle); 388 dev_kfree_skb_any(skb); 389 return NETDEV_TX_OK; 390 } 391 392 /** 393 * nfp_nfd3_tx_complete() - Handled completed TX packets 394 * @tx_ring: TX ring structure 395 * @budget: NAPI budget (only used as bool to determine if in NAPI context) 396 */ 397 void nfp_nfd3_tx_complete(struct nfp_net_tx_ring *tx_ring, int budget) 398 { 399 struct nfp_net_r_vector *r_vec = tx_ring->r_vec; 400 struct nfp_net_dp *dp = &r_vec->nfp_net->dp; 401 u32 done_pkts = 0, done_bytes = 0; 402 struct netdev_queue *nd_q; 403 u32 qcp_rd_p; 404 int todo; 405 406 if (tx_ring->wr_p == tx_ring->rd_p) 407 return; 408 409 /* Work out how many descriptors have been transmitted */ 410 qcp_rd_p = nfp_net_read_tx_cmpl(tx_ring, dp); 411 412 if (qcp_rd_p == tx_ring->qcp_rd_p) 413 return; 414 415 todo = D_IDX(tx_ring, qcp_rd_p - tx_ring->qcp_rd_p); 416 417 while (todo--) { 418 const skb_frag_t *frag; 419 struct nfp_nfd3_tx_buf *tx_buf; 420 struct sk_buff *skb; 421 int fidx, nr_frags; 422 int idx; 423 424 idx = D_IDX(tx_ring, tx_ring->rd_p++); 425 tx_buf = &tx_ring->txbufs[idx]; 426 427 skb = tx_buf->skb; 428 if (!skb) 429 continue; 430 431 nr_frags = skb_shinfo(skb)->nr_frags; 432 fidx = tx_buf->fidx; 433 434 if (fidx == -1) { 435 /* unmap head */ 436 dma_unmap_single(dp->dev, tx_buf->dma_addr, 437 skb_headlen(skb), DMA_TO_DEVICE); 438 439 done_pkts += tx_buf->pkt_cnt; 440 done_bytes += tx_buf->real_len; 441 } else { 442 /* unmap fragment */ 443 frag = &skb_shinfo(skb)->frags[fidx]; 444 dma_unmap_page(dp->dev, tx_buf->dma_addr, 445 skb_frag_size(frag), DMA_TO_DEVICE); 446 } 447 448 /* check for last gather fragment */ 449 if (fidx == nr_frags - 1) 450 napi_consume_skb(skb, budget); 451 452 tx_buf->dma_addr = 0; 453 tx_buf->skb = NULL; 454 tx_buf->fidx = -2; 455 } 456 457 tx_ring->qcp_rd_p = qcp_rd_p; 458 459 u64_stats_update_begin(&r_vec->tx_sync); 460 r_vec->tx_bytes += done_bytes; 461 r_vec->tx_pkts += done_pkts; 462 u64_stats_update_end(&r_vec->tx_sync); 463 464 if (!dp->netdev) 465 return; 466 467 nd_q = netdev_get_tx_queue(dp->netdev, tx_ring->idx); 468 netdev_tx_completed_queue(nd_q, done_pkts, done_bytes); 469 if (nfp_nfd3_tx_ring_should_wake(tx_ring)) { 470 /* Make sure TX thread will see updated tx_ring->rd_p */ 471 smp_mb(); 472 473 if (unlikely(netif_tx_queue_stopped(nd_q))) 474 netif_tx_wake_queue(nd_q); 475 } 476 477 WARN_ONCE(tx_ring->wr_p - tx_ring->rd_p > tx_ring->cnt, 478 "TX ring corruption rd_p=%u wr_p=%u cnt=%u\n", 479 tx_ring->rd_p, tx_ring->wr_p, tx_ring->cnt); 480 } 481 482 static bool nfp_nfd3_xdp_complete(struct nfp_net_tx_ring *tx_ring) 483 { 484 struct nfp_net_r_vector *r_vec = tx_ring->r_vec; 485 struct nfp_net_dp *dp = &r_vec->nfp_net->dp; 486 u32 done_pkts = 0, done_bytes = 0; 487 bool done_all; 488 int idx, todo; 489 u32 qcp_rd_p; 490 491 /* Work out how many descriptors have been transmitted */ 492 qcp_rd_p = nfp_net_read_tx_cmpl(tx_ring, dp); 493 494 if (qcp_rd_p == tx_ring->qcp_rd_p) 495 return true; 496 497 todo = D_IDX(tx_ring, qcp_rd_p - tx_ring->qcp_rd_p); 498 499 done_all = todo <= NFP_NET_XDP_MAX_COMPLETE; 500 todo = min(todo, NFP_NET_XDP_MAX_COMPLETE); 501 502 tx_ring->qcp_rd_p = D_IDX(tx_ring, tx_ring->qcp_rd_p + todo); 503 504 done_pkts = todo; 505 while (todo--) { 506 idx = D_IDX(tx_ring, tx_ring->rd_p); 507 tx_ring->rd_p++; 508 509 done_bytes += tx_ring->txbufs[idx].real_len; 510 } 511 512 u64_stats_update_begin(&r_vec->tx_sync); 513 r_vec->tx_bytes += done_bytes; 514 r_vec->tx_pkts += done_pkts; 515 u64_stats_update_end(&r_vec->tx_sync); 516 517 WARN_ONCE(tx_ring->wr_p - tx_ring->rd_p > tx_ring->cnt, 518 "XDP TX ring corruption rd_p=%u wr_p=%u cnt=%u\n", 519 tx_ring->rd_p, tx_ring->wr_p, tx_ring->cnt); 520 521 return done_all; 522 } 523 524 /* Receive processing 525 */ 526 527 static void * 528 nfp_nfd3_napi_alloc_one(struct nfp_net_dp *dp, dma_addr_t *dma_addr) 529 { 530 void *frag; 531 532 if (!dp->xdp_prog) { 533 frag = napi_alloc_frag(dp->fl_bufsz); 534 if (unlikely(!frag)) 535 return NULL; 536 } else { 537 struct page *page; 538 539 page = dev_alloc_page(); 540 if (unlikely(!page)) 541 return NULL; 542 frag = page_address(page); 543 } 544 545 *dma_addr = nfp_net_dma_map_rx(dp, frag); 546 if (dma_mapping_error(dp->dev, *dma_addr)) { 547 nfp_net_free_frag(frag, dp->xdp_prog); 548 nn_dp_warn(dp, "Failed to map DMA RX buffer\n"); 549 return NULL; 550 } 551 552 return frag; 553 } 554 555 /** 556 * nfp_nfd3_rx_give_one() - Put mapped skb on the software and hardware rings 557 * @dp: NFP Net data path struct 558 * @rx_ring: RX ring structure 559 * @frag: page fragment buffer 560 * @dma_addr: DMA address of skb mapping 561 */ 562 static void 563 nfp_nfd3_rx_give_one(const struct nfp_net_dp *dp, 564 struct nfp_net_rx_ring *rx_ring, 565 void *frag, dma_addr_t dma_addr) 566 { 567 unsigned int wr_idx; 568 569 wr_idx = D_IDX(rx_ring, rx_ring->wr_p); 570 571 nfp_net_dma_sync_dev_rx(dp, dma_addr); 572 573 /* Stash SKB and DMA address away */ 574 rx_ring->rxbufs[wr_idx].frag = frag; 575 rx_ring->rxbufs[wr_idx].dma_addr = dma_addr; 576 577 /* Fill freelist descriptor */ 578 rx_ring->rxds[wr_idx].fld.reserved = 0; 579 rx_ring->rxds[wr_idx].fld.meta_len_dd = 0; 580 /* DMA address is expanded to 48-bit width in freelist for NFP3800, 581 * so the *_48b macro is used accordingly, it's also OK to fill 582 * a 40-bit address since the top 8 bits are get set to 0. 583 */ 584 nfp_desc_set_dma_addr_48b(&rx_ring->rxds[wr_idx].fld, 585 dma_addr + dp->rx_dma_off); 586 587 rx_ring->wr_p++; 588 if (!(rx_ring->wr_p % NFP_NET_FL_BATCH)) { 589 /* Update write pointer of the freelist queue. Make 590 * sure all writes are flushed before telling the hardware. 591 */ 592 wmb(); 593 nfp_qcp_wr_ptr_add(rx_ring->qcp_fl, NFP_NET_FL_BATCH); 594 } 595 } 596 597 /** 598 * nfp_nfd3_rx_ring_fill_freelist() - Give buffers from the ring to FW 599 * @dp: NFP Net data path struct 600 * @rx_ring: RX ring to fill 601 */ 602 void nfp_nfd3_rx_ring_fill_freelist(struct nfp_net_dp *dp, 603 struct nfp_net_rx_ring *rx_ring) 604 { 605 unsigned int i; 606 607 if (nfp_net_has_xsk_pool_slow(dp, rx_ring->idx)) 608 return nfp_net_xsk_rx_ring_fill_freelist(rx_ring); 609 610 for (i = 0; i < rx_ring->cnt - 1; i++) 611 nfp_nfd3_rx_give_one(dp, rx_ring, rx_ring->rxbufs[i].frag, 612 rx_ring->rxbufs[i].dma_addr); 613 } 614 615 /** 616 * nfp_nfd3_rx_csum_has_errors() - group check if rxd has any csum errors 617 * @flags: RX descriptor flags field in CPU byte order 618 */ 619 static int nfp_nfd3_rx_csum_has_errors(u16 flags) 620 { 621 u16 csum_all_checked, csum_all_ok; 622 623 csum_all_checked = flags & __PCIE_DESC_RX_CSUM_ALL; 624 csum_all_ok = flags & __PCIE_DESC_RX_CSUM_ALL_OK; 625 626 return csum_all_checked != (csum_all_ok << PCIE_DESC_RX_CSUM_OK_SHIFT); 627 } 628 629 /** 630 * nfp_nfd3_rx_csum() - set SKB checksum field based on RX descriptor flags 631 * @dp: NFP Net data path struct 632 * @r_vec: per-ring structure 633 * @rxd: Pointer to RX descriptor 634 * @meta: Parsed metadata prepend 635 * @skb: Pointer to SKB 636 */ 637 void 638 nfp_nfd3_rx_csum(const struct nfp_net_dp *dp, struct nfp_net_r_vector *r_vec, 639 const struct nfp_net_rx_desc *rxd, 640 const struct nfp_meta_parsed *meta, struct sk_buff *skb) 641 { 642 skb_checksum_none_assert(skb); 643 644 if (!(dp->netdev->features & NETIF_F_RXCSUM)) 645 return; 646 647 if (meta->csum_type) { 648 skb->ip_summed = meta->csum_type; 649 skb->csum = meta->csum; 650 u64_stats_update_begin(&r_vec->rx_sync); 651 r_vec->hw_csum_rx_complete++; 652 u64_stats_update_end(&r_vec->rx_sync); 653 return; 654 } 655 656 if (nfp_nfd3_rx_csum_has_errors(le16_to_cpu(rxd->rxd.flags))) { 657 u64_stats_update_begin(&r_vec->rx_sync); 658 r_vec->hw_csum_rx_error++; 659 u64_stats_update_end(&r_vec->rx_sync); 660 return; 661 } 662 663 /* Assume that the firmware will never report inner CSUM_OK unless outer 664 * L4 headers were successfully parsed. FW will always report zero UDP 665 * checksum as CSUM_OK. 666 */ 667 if (rxd->rxd.flags & PCIE_DESC_RX_TCP_CSUM_OK || 668 rxd->rxd.flags & PCIE_DESC_RX_UDP_CSUM_OK) { 669 __skb_incr_checksum_unnecessary(skb); 670 u64_stats_update_begin(&r_vec->rx_sync); 671 r_vec->hw_csum_rx_ok++; 672 u64_stats_update_end(&r_vec->rx_sync); 673 } 674 675 if (rxd->rxd.flags & PCIE_DESC_RX_I_TCP_CSUM_OK || 676 rxd->rxd.flags & PCIE_DESC_RX_I_UDP_CSUM_OK) { 677 __skb_incr_checksum_unnecessary(skb); 678 u64_stats_update_begin(&r_vec->rx_sync); 679 r_vec->hw_csum_rx_inner_ok++; 680 u64_stats_update_end(&r_vec->rx_sync); 681 } 682 } 683 684 static void 685 nfp_nfd3_set_hash(struct net_device *netdev, struct nfp_meta_parsed *meta, 686 unsigned int type, __be32 *hash) 687 { 688 if (!(netdev->features & NETIF_F_RXHASH)) 689 return; 690 691 switch (type) { 692 case NFP_NET_RSS_IPV4: 693 case NFP_NET_RSS_IPV6: 694 case NFP_NET_RSS_IPV6_EX: 695 meta->hash_type = PKT_HASH_TYPE_L3; 696 break; 697 default: 698 meta->hash_type = PKT_HASH_TYPE_L4; 699 break; 700 } 701 702 meta->hash = get_unaligned_be32(hash); 703 } 704 705 static void 706 nfp_nfd3_set_hash_desc(struct net_device *netdev, struct nfp_meta_parsed *meta, 707 void *data, struct nfp_net_rx_desc *rxd) 708 { 709 struct nfp_net_rx_hash *rx_hash = data; 710 711 if (!(rxd->rxd.flags & PCIE_DESC_RX_RSS)) 712 return; 713 714 nfp_nfd3_set_hash(netdev, meta, get_unaligned_be32(&rx_hash->hash_type), 715 &rx_hash->hash); 716 } 717 718 bool 719 nfp_nfd3_parse_meta(struct net_device *netdev, struct nfp_meta_parsed *meta, 720 void *data, void *pkt, unsigned int pkt_len, int meta_len) 721 { 722 u32 meta_info, vlan_info; 723 724 meta_info = get_unaligned_be32(data); 725 data += 4; 726 727 while (meta_info) { 728 switch (meta_info & NFP_NET_META_FIELD_MASK) { 729 case NFP_NET_META_HASH: 730 meta_info >>= NFP_NET_META_FIELD_SIZE; 731 nfp_nfd3_set_hash(netdev, meta, 732 meta_info & NFP_NET_META_FIELD_MASK, 733 (__be32 *)data); 734 data += 4; 735 break; 736 case NFP_NET_META_MARK: 737 meta->mark = get_unaligned_be32(data); 738 data += 4; 739 break; 740 case NFP_NET_META_VLAN: 741 vlan_info = get_unaligned_be32(data); 742 if (FIELD_GET(NFP_NET_META_VLAN_STRIP, vlan_info)) { 743 meta->vlan.stripped = true; 744 meta->vlan.tpid = FIELD_GET(NFP_NET_META_VLAN_TPID_MASK, 745 vlan_info); 746 meta->vlan.tci = FIELD_GET(NFP_NET_META_VLAN_TCI_MASK, 747 vlan_info); 748 } 749 data += 4; 750 break; 751 case NFP_NET_META_PORTID: 752 meta->portid = get_unaligned_be32(data); 753 data += 4; 754 break; 755 case NFP_NET_META_CSUM: 756 meta->csum_type = CHECKSUM_COMPLETE; 757 meta->csum = 758 (__force __wsum)__get_unaligned_cpu32(data); 759 data += 4; 760 break; 761 case NFP_NET_META_RESYNC_INFO: 762 if (nfp_net_tls_rx_resync_req(netdev, data, pkt, 763 pkt_len)) 764 return false; 765 data += sizeof(struct nfp_net_tls_resync_req); 766 break; 767 default: 768 return true; 769 } 770 771 meta_info >>= NFP_NET_META_FIELD_SIZE; 772 } 773 774 return data != pkt; 775 } 776 777 static void 778 nfp_nfd3_rx_drop(const struct nfp_net_dp *dp, struct nfp_net_r_vector *r_vec, 779 struct nfp_net_rx_ring *rx_ring, struct nfp_net_rx_buf *rxbuf, 780 struct sk_buff *skb) 781 { 782 u64_stats_update_begin(&r_vec->rx_sync); 783 r_vec->rx_drops++; 784 /* If we have both skb and rxbuf the replacement buffer allocation 785 * must have failed, count this as an alloc failure. 786 */ 787 if (skb && rxbuf) 788 r_vec->rx_replace_buf_alloc_fail++; 789 u64_stats_update_end(&r_vec->rx_sync); 790 791 /* skb is build based on the frag, free_skb() would free the frag 792 * so to be able to reuse it we need an extra ref. 793 */ 794 if (skb && rxbuf && skb->head == rxbuf->frag) 795 page_ref_inc(virt_to_head_page(rxbuf->frag)); 796 if (rxbuf) 797 nfp_nfd3_rx_give_one(dp, rx_ring, rxbuf->frag, rxbuf->dma_addr); 798 if (skb) 799 dev_kfree_skb_any(skb); 800 } 801 802 static bool 803 nfp_nfd3_tx_xdp_buf(struct nfp_net_dp *dp, struct nfp_net_rx_ring *rx_ring, 804 struct nfp_net_tx_ring *tx_ring, 805 struct nfp_net_rx_buf *rxbuf, unsigned int dma_off, 806 unsigned int pkt_len, bool *completed) 807 { 808 unsigned int dma_map_sz = dp->fl_bufsz - NFP_NET_RX_BUF_NON_DATA; 809 struct nfp_nfd3_tx_buf *txbuf; 810 struct nfp_nfd3_tx_desc *txd; 811 int wr_idx; 812 813 /* Reject if xdp_adjust_tail grow packet beyond DMA area */ 814 if (pkt_len + dma_off > dma_map_sz) 815 return false; 816 817 if (unlikely(nfp_net_tx_full(tx_ring, 1))) { 818 if (!*completed) { 819 nfp_nfd3_xdp_complete(tx_ring); 820 *completed = true; 821 } 822 823 if (unlikely(nfp_net_tx_full(tx_ring, 1))) { 824 nfp_nfd3_rx_drop(dp, rx_ring->r_vec, rx_ring, rxbuf, 825 NULL); 826 return false; 827 } 828 } 829 830 wr_idx = D_IDX(tx_ring, tx_ring->wr_p); 831 832 /* Stash the soft descriptor of the head then initialize it */ 833 txbuf = &tx_ring->txbufs[wr_idx]; 834 835 nfp_nfd3_rx_give_one(dp, rx_ring, txbuf->frag, txbuf->dma_addr); 836 837 txbuf->frag = rxbuf->frag; 838 txbuf->dma_addr = rxbuf->dma_addr; 839 txbuf->fidx = -1; 840 txbuf->pkt_cnt = 1; 841 txbuf->real_len = pkt_len; 842 843 dma_sync_single_for_device(dp->dev, rxbuf->dma_addr + dma_off, 844 pkt_len, DMA_BIDIRECTIONAL); 845 846 /* Build TX descriptor */ 847 txd = &tx_ring->txds[wr_idx]; 848 txd->offset_eop = NFD3_DESC_TX_EOP; 849 txd->dma_len = cpu_to_le16(pkt_len); 850 nfp_desc_set_dma_addr_40b(txd, rxbuf->dma_addr + dma_off); 851 txd->data_len = cpu_to_le16(pkt_len); 852 853 txd->flags = 0; 854 txd->mss = 0; 855 txd->lso_hdrlen = 0; 856 857 tx_ring->wr_p++; 858 tx_ring->wr_ptr_add++; 859 return true; 860 } 861 862 /** 863 * nfp_nfd3_rx() - receive up to @budget packets on @rx_ring 864 * @rx_ring: RX ring to receive from 865 * @budget: NAPI budget 866 * 867 * Note, this function is separated out from the napi poll function to 868 * more cleanly separate packet receive code from other bookkeeping 869 * functions performed in the napi poll function. 870 * 871 * Return: Number of packets received. 872 */ 873 static int nfp_nfd3_rx(struct nfp_net_rx_ring *rx_ring, int budget) 874 { 875 struct nfp_net_r_vector *r_vec = rx_ring->r_vec; 876 struct nfp_net_dp *dp = &r_vec->nfp_net->dp; 877 struct nfp_net_tx_ring *tx_ring; 878 struct bpf_prog *xdp_prog; 879 bool xdp_tx_cmpl = false; 880 unsigned int true_bufsz; 881 struct sk_buff *skb; 882 int pkts_polled = 0; 883 struct xdp_buff xdp; 884 int idx; 885 886 xdp_prog = READ_ONCE(dp->xdp_prog); 887 true_bufsz = xdp_prog ? PAGE_SIZE : dp->fl_bufsz; 888 xdp_init_buff(&xdp, PAGE_SIZE - NFP_NET_RX_BUF_HEADROOM, 889 &rx_ring->xdp_rxq); 890 tx_ring = r_vec->xdp_ring; 891 892 while (pkts_polled < budget) { 893 unsigned int meta_len, data_len, meta_off, pkt_len, pkt_off; 894 struct nfp_net_rx_buf *rxbuf; 895 struct nfp_net_rx_desc *rxd; 896 struct nfp_meta_parsed meta; 897 bool redir_egress = false; 898 struct net_device *netdev; 899 dma_addr_t new_dma_addr; 900 u32 meta_len_xdp = 0; 901 void *new_frag; 902 903 idx = D_IDX(rx_ring, rx_ring->rd_p); 904 905 rxd = &rx_ring->rxds[idx]; 906 if (!(rxd->rxd.meta_len_dd & PCIE_DESC_RX_DD)) 907 break; 908 909 /* Memory barrier to ensure that we won't do other reads 910 * before the DD bit. 911 */ 912 dma_rmb(); 913 914 memset(&meta, 0, sizeof(meta)); 915 916 rx_ring->rd_p++; 917 pkts_polled++; 918 919 rxbuf = &rx_ring->rxbufs[idx]; 920 /* < meta_len > 921 * <-- [rx_offset] --> 922 * --------------------------------------------------------- 923 * | [XX] | metadata | packet | XXXX | 924 * --------------------------------------------------------- 925 * <---------------- data_len ---------------> 926 * 927 * The rx_offset is fixed for all packets, the meta_len can vary 928 * on a packet by packet basis. If rx_offset is set to zero 929 * (_RX_OFFSET_DYNAMIC) metadata starts at the beginning of the 930 * buffer and is immediately followed by the packet (no [XX]). 931 */ 932 meta_len = rxd->rxd.meta_len_dd & PCIE_DESC_RX_META_LEN_MASK; 933 data_len = le16_to_cpu(rxd->rxd.data_len); 934 pkt_len = data_len - meta_len; 935 936 pkt_off = NFP_NET_RX_BUF_HEADROOM + dp->rx_dma_off; 937 if (dp->rx_offset == NFP_NET_CFG_RX_OFFSET_DYNAMIC) 938 pkt_off += meta_len; 939 else 940 pkt_off += dp->rx_offset; 941 meta_off = pkt_off - meta_len; 942 943 /* Stats update */ 944 u64_stats_update_begin(&r_vec->rx_sync); 945 r_vec->rx_pkts++; 946 r_vec->rx_bytes += pkt_len; 947 u64_stats_update_end(&r_vec->rx_sync); 948 949 if (unlikely(meta_len > NFP_NET_MAX_PREPEND || 950 (dp->rx_offset && meta_len > dp->rx_offset))) { 951 nn_dp_warn(dp, "oversized RX packet metadata %u\n", 952 meta_len); 953 nfp_nfd3_rx_drop(dp, r_vec, rx_ring, rxbuf, NULL); 954 continue; 955 } 956 957 nfp_net_dma_sync_cpu_rx(dp, rxbuf->dma_addr + meta_off, 958 data_len); 959 960 if (!dp->chained_metadata_format) { 961 nfp_nfd3_set_hash_desc(dp->netdev, &meta, 962 rxbuf->frag + meta_off, rxd); 963 } else if (meta_len) { 964 if (unlikely(nfp_nfd3_parse_meta(dp->netdev, &meta, 965 rxbuf->frag + meta_off, 966 rxbuf->frag + pkt_off, 967 pkt_len, meta_len))) { 968 nn_dp_warn(dp, "invalid RX packet metadata\n"); 969 nfp_nfd3_rx_drop(dp, r_vec, rx_ring, rxbuf, 970 NULL); 971 continue; 972 } 973 } 974 975 if (xdp_prog && !meta.portid) { 976 void *orig_data = rxbuf->frag + pkt_off; 977 unsigned int dma_off; 978 int act; 979 980 xdp_prepare_buff(&xdp, 981 rxbuf->frag + NFP_NET_RX_BUF_HEADROOM, 982 pkt_off - NFP_NET_RX_BUF_HEADROOM, 983 pkt_len, true); 984 985 act = bpf_prog_run_xdp(xdp_prog, &xdp); 986 987 pkt_len = xdp.data_end - xdp.data; 988 pkt_off += xdp.data - orig_data; 989 990 switch (act) { 991 case XDP_PASS: 992 meta_len_xdp = xdp.data - xdp.data_meta; 993 break; 994 case XDP_TX: 995 dma_off = pkt_off - NFP_NET_RX_BUF_HEADROOM; 996 if (unlikely(!nfp_nfd3_tx_xdp_buf(dp, rx_ring, 997 tx_ring, 998 rxbuf, 999 dma_off, 1000 pkt_len, 1001 &xdp_tx_cmpl))) 1002 trace_xdp_exception(dp->netdev, 1003 xdp_prog, act); 1004 continue; 1005 default: 1006 bpf_warn_invalid_xdp_action(dp->netdev, xdp_prog, act); 1007 fallthrough; 1008 case XDP_ABORTED: 1009 trace_xdp_exception(dp->netdev, xdp_prog, act); 1010 fallthrough; 1011 case XDP_DROP: 1012 nfp_nfd3_rx_give_one(dp, rx_ring, rxbuf->frag, 1013 rxbuf->dma_addr); 1014 continue; 1015 } 1016 } 1017 1018 if (likely(!meta.portid)) { 1019 netdev = dp->netdev; 1020 } else if (meta.portid == NFP_META_PORT_ID_CTRL) { 1021 struct nfp_net *nn = netdev_priv(dp->netdev); 1022 1023 nfp_app_ctrl_rx_raw(nn->app, rxbuf->frag + pkt_off, 1024 pkt_len); 1025 nfp_nfd3_rx_give_one(dp, rx_ring, rxbuf->frag, 1026 rxbuf->dma_addr); 1027 continue; 1028 } else { 1029 struct nfp_net *nn; 1030 1031 nn = netdev_priv(dp->netdev); 1032 netdev = nfp_app_dev_get(nn->app, meta.portid, 1033 &redir_egress); 1034 if (unlikely(!netdev)) { 1035 nfp_nfd3_rx_drop(dp, r_vec, rx_ring, rxbuf, 1036 NULL); 1037 continue; 1038 } 1039 1040 if (nfp_netdev_is_nfp_repr(netdev)) 1041 nfp_repr_inc_rx_stats(netdev, pkt_len); 1042 } 1043 1044 skb = build_skb(rxbuf->frag, true_bufsz); 1045 if (unlikely(!skb)) { 1046 nfp_nfd3_rx_drop(dp, r_vec, rx_ring, rxbuf, NULL); 1047 continue; 1048 } 1049 new_frag = nfp_nfd3_napi_alloc_one(dp, &new_dma_addr); 1050 if (unlikely(!new_frag)) { 1051 nfp_nfd3_rx_drop(dp, r_vec, rx_ring, rxbuf, skb); 1052 continue; 1053 } 1054 1055 nfp_net_dma_unmap_rx(dp, rxbuf->dma_addr); 1056 1057 nfp_nfd3_rx_give_one(dp, rx_ring, new_frag, new_dma_addr); 1058 1059 skb_reserve(skb, pkt_off); 1060 skb_put(skb, pkt_len); 1061 1062 skb->mark = meta.mark; 1063 skb_set_hash(skb, meta.hash, meta.hash_type); 1064 1065 skb_record_rx_queue(skb, rx_ring->idx); 1066 skb->protocol = eth_type_trans(skb, netdev); 1067 1068 nfp_nfd3_rx_csum(dp, r_vec, rxd, &meta, skb); 1069 1070 #ifdef CONFIG_TLS_DEVICE 1071 if (rxd->rxd.flags & PCIE_DESC_RX_DECRYPTED) { 1072 skb->decrypted = true; 1073 u64_stats_update_begin(&r_vec->rx_sync); 1074 r_vec->hw_tls_rx++; 1075 u64_stats_update_end(&r_vec->rx_sync); 1076 } 1077 #endif 1078 1079 if (unlikely(!nfp_net_vlan_strip(skb, rxd, &meta))) { 1080 nfp_nfd3_rx_drop(dp, r_vec, rx_ring, NULL, skb); 1081 continue; 1082 } 1083 1084 if (meta_len_xdp) 1085 skb_metadata_set(skb, meta_len_xdp); 1086 1087 if (likely(!redir_egress)) { 1088 napi_gro_receive(&rx_ring->r_vec->napi, skb); 1089 } else { 1090 skb->dev = netdev; 1091 skb_reset_network_header(skb); 1092 __skb_push(skb, ETH_HLEN); 1093 dev_queue_xmit(skb); 1094 } 1095 } 1096 1097 if (xdp_prog) { 1098 if (tx_ring->wr_ptr_add) 1099 nfp_net_tx_xmit_more_flush(tx_ring); 1100 else if (unlikely(tx_ring->wr_p != tx_ring->rd_p) && 1101 !xdp_tx_cmpl) 1102 if (!nfp_nfd3_xdp_complete(tx_ring)) 1103 pkts_polled = budget; 1104 } 1105 1106 return pkts_polled; 1107 } 1108 1109 /** 1110 * nfp_nfd3_poll() - napi poll function 1111 * @napi: NAPI structure 1112 * @budget: NAPI budget 1113 * 1114 * Return: number of packets polled. 1115 */ 1116 int nfp_nfd3_poll(struct napi_struct *napi, int budget) 1117 { 1118 struct nfp_net_r_vector *r_vec = 1119 container_of(napi, struct nfp_net_r_vector, napi); 1120 unsigned int pkts_polled = 0; 1121 1122 if (r_vec->tx_ring) 1123 nfp_nfd3_tx_complete(r_vec->tx_ring, budget); 1124 if (r_vec->rx_ring) 1125 pkts_polled = nfp_nfd3_rx(r_vec->rx_ring, budget); 1126 1127 if (pkts_polled < budget) 1128 if (napi_complete_done(napi, pkts_polled)) 1129 nfp_net_irq_unmask(r_vec->nfp_net, r_vec->irq_entry); 1130 1131 if (r_vec->nfp_net->rx_coalesce_adapt_on && r_vec->rx_ring) { 1132 struct dim_sample dim_sample = {}; 1133 unsigned int start; 1134 u64 pkts, bytes; 1135 1136 do { 1137 start = u64_stats_fetch_begin(&r_vec->rx_sync); 1138 pkts = r_vec->rx_pkts; 1139 bytes = r_vec->rx_bytes; 1140 } while (u64_stats_fetch_retry(&r_vec->rx_sync, start)); 1141 1142 dim_update_sample(r_vec->event_ctr, pkts, bytes, &dim_sample); 1143 net_dim(&r_vec->rx_dim, dim_sample); 1144 } 1145 1146 if (r_vec->nfp_net->tx_coalesce_adapt_on && r_vec->tx_ring) { 1147 struct dim_sample dim_sample = {}; 1148 unsigned int start; 1149 u64 pkts, bytes; 1150 1151 do { 1152 start = u64_stats_fetch_begin(&r_vec->tx_sync); 1153 pkts = r_vec->tx_pkts; 1154 bytes = r_vec->tx_bytes; 1155 } while (u64_stats_fetch_retry(&r_vec->tx_sync, start)); 1156 1157 dim_update_sample(r_vec->event_ctr, pkts, bytes, &dim_sample); 1158 net_dim(&r_vec->tx_dim, dim_sample); 1159 } 1160 1161 return pkts_polled; 1162 } 1163 1164 /* Control device data path 1165 */ 1166 1167 bool 1168 nfp_nfd3_ctrl_tx_one(struct nfp_net *nn, struct nfp_net_r_vector *r_vec, 1169 struct sk_buff *skb, bool old) 1170 { 1171 unsigned int real_len = skb->len, meta_len = 0; 1172 struct nfp_net_tx_ring *tx_ring; 1173 struct nfp_nfd3_tx_buf *txbuf; 1174 struct nfp_nfd3_tx_desc *txd; 1175 struct nfp_net_dp *dp; 1176 dma_addr_t dma_addr; 1177 int wr_idx; 1178 1179 dp = &r_vec->nfp_net->dp; 1180 tx_ring = r_vec->tx_ring; 1181 1182 if (WARN_ON_ONCE(skb_shinfo(skb)->nr_frags)) { 1183 nn_dp_warn(dp, "Driver's CTRL TX does not implement gather\n"); 1184 goto err_free; 1185 } 1186 1187 if (unlikely(nfp_net_tx_full(tx_ring, 1))) { 1188 u64_stats_update_begin(&r_vec->tx_sync); 1189 r_vec->tx_busy++; 1190 u64_stats_update_end(&r_vec->tx_sync); 1191 if (!old) 1192 __skb_queue_tail(&r_vec->queue, skb); 1193 else 1194 __skb_queue_head(&r_vec->queue, skb); 1195 return true; 1196 } 1197 1198 if (nfp_app_ctrl_has_meta(nn->app)) { 1199 if (unlikely(skb_headroom(skb) < 8)) { 1200 nn_dp_warn(dp, "CTRL TX on skb without headroom\n"); 1201 goto err_free; 1202 } 1203 meta_len = 8; 1204 put_unaligned_be32(NFP_META_PORT_ID_CTRL, skb_push(skb, 4)); 1205 put_unaligned_be32(NFP_NET_META_PORTID, skb_push(skb, 4)); 1206 } 1207 1208 /* Start with the head skbuf */ 1209 dma_addr = dma_map_single(dp->dev, skb->data, skb_headlen(skb), 1210 DMA_TO_DEVICE); 1211 if (dma_mapping_error(dp->dev, dma_addr)) 1212 goto err_dma_warn; 1213 1214 wr_idx = D_IDX(tx_ring, tx_ring->wr_p); 1215 1216 /* Stash the soft descriptor of the head then initialize it */ 1217 txbuf = &tx_ring->txbufs[wr_idx]; 1218 txbuf->skb = skb; 1219 txbuf->dma_addr = dma_addr; 1220 txbuf->fidx = -1; 1221 txbuf->pkt_cnt = 1; 1222 txbuf->real_len = real_len; 1223 1224 /* Build TX descriptor */ 1225 txd = &tx_ring->txds[wr_idx]; 1226 txd->offset_eop = meta_len | NFD3_DESC_TX_EOP; 1227 txd->dma_len = cpu_to_le16(skb_headlen(skb)); 1228 nfp_desc_set_dma_addr_40b(txd, dma_addr); 1229 txd->data_len = cpu_to_le16(skb->len); 1230 1231 txd->flags = 0; 1232 txd->mss = 0; 1233 txd->lso_hdrlen = 0; 1234 1235 tx_ring->wr_p++; 1236 tx_ring->wr_ptr_add++; 1237 nfp_net_tx_xmit_more_flush(tx_ring); 1238 1239 return false; 1240 1241 err_dma_warn: 1242 nn_dp_warn(dp, "Failed to DMA map TX CTRL buffer\n"); 1243 err_free: 1244 u64_stats_update_begin(&r_vec->tx_sync); 1245 r_vec->tx_errors++; 1246 u64_stats_update_end(&r_vec->tx_sync); 1247 dev_kfree_skb_any(skb); 1248 return false; 1249 } 1250 1251 static void __nfp_ctrl_tx_queued(struct nfp_net_r_vector *r_vec) 1252 { 1253 struct sk_buff *skb; 1254 1255 while ((skb = __skb_dequeue(&r_vec->queue))) 1256 if (nfp_nfd3_ctrl_tx_one(r_vec->nfp_net, r_vec, skb, true)) 1257 return; 1258 } 1259 1260 static bool 1261 nfp_ctrl_meta_ok(struct nfp_net *nn, void *data, unsigned int meta_len) 1262 { 1263 u32 meta_type, meta_tag; 1264 1265 if (!nfp_app_ctrl_has_meta(nn->app)) 1266 return !meta_len; 1267 1268 if (meta_len != 8) 1269 return false; 1270 1271 meta_type = get_unaligned_be32(data); 1272 meta_tag = get_unaligned_be32(data + 4); 1273 1274 return (meta_type == NFP_NET_META_PORTID && 1275 meta_tag == NFP_META_PORT_ID_CTRL); 1276 } 1277 1278 static bool 1279 nfp_ctrl_rx_one(struct nfp_net *nn, struct nfp_net_dp *dp, 1280 struct nfp_net_r_vector *r_vec, struct nfp_net_rx_ring *rx_ring) 1281 { 1282 unsigned int meta_len, data_len, meta_off, pkt_len, pkt_off; 1283 struct nfp_net_rx_buf *rxbuf; 1284 struct nfp_net_rx_desc *rxd; 1285 dma_addr_t new_dma_addr; 1286 struct sk_buff *skb; 1287 void *new_frag; 1288 int idx; 1289 1290 idx = D_IDX(rx_ring, rx_ring->rd_p); 1291 1292 rxd = &rx_ring->rxds[idx]; 1293 if (!(rxd->rxd.meta_len_dd & PCIE_DESC_RX_DD)) 1294 return false; 1295 1296 /* Memory barrier to ensure that we won't do other reads 1297 * before the DD bit. 1298 */ 1299 dma_rmb(); 1300 1301 rx_ring->rd_p++; 1302 1303 rxbuf = &rx_ring->rxbufs[idx]; 1304 meta_len = rxd->rxd.meta_len_dd & PCIE_DESC_RX_META_LEN_MASK; 1305 data_len = le16_to_cpu(rxd->rxd.data_len); 1306 pkt_len = data_len - meta_len; 1307 1308 pkt_off = NFP_NET_RX_BUF_HEADROOM + dp->rx_dma_off; 1309 if (dp->rx_offset == NFP_NET_CFG_RX_OFFSET_DYNAMIC) 1310 pkt_off += meta_len; 1311 else 1312 pkt_off += dp->rx_offset; 1313 meta_off = pkt_off - meta_len; 1314 1315 /* Stats update */ 1316 u64_stats_update_begin(&r_vec->rx_sync); 1317 r_vec->rx_pkts++; 1318 r_vec->rx_bytes += pkt_len; 1319 u64_stats_update_end(&r_vec->rx_sync); 1320 1321 nfp_net_dma_sync_cpu_rx(dp, rxbuf->dma_addr + meta_off, data_len); 1322 1323 if (unlikely(!nfp_ctrl_meta_ok(nn, rxbuf->frag + meta_off, meta_len))) { 1324 nn_dp_warn(dp, "incorrect metadata for ctrl packet (%d)\n", 1325 meta_len); 1326 nfp_nfd3_rx_drop(dp, r_vec, rx_ring, rxbuf, NULL); 1327 return true; 1328 } 1329 1330 skb = build_skb(rxbuf->frag, dp->fl_bufsz); 1331 if (unlikely(!skb)) { 1332 nfp_nfd3_rx_drop(dp, r_vec, rx_ring, rxbuf, NULL); 1333 return true; 1334 } 1335 new_frag = nfp_nfd3_napi_alloc_one(dp, &new_dma_addr); 1336 if (unlikely(!new_frag)) { 1337 nfp_nfd3_rx_drop(dp, r_vec, rx_ring, rxbuf, skb); 1338 return true; 1339 } 1340 1341 nfp_net_dma_unmap_rx(dp, rxbuf->dma_addr); 1342 1343 nfp_nfd3_rx_give_one(dp, rx_ring, new_frag, new_dma_addr); 1344 1345 skb_reserve(skb, pkt_off); 1346 skb_put(skb, pkt_len); 1347 1348 nfp_app_ctrl_rx(nn->app, skb); 1349 1350 return true; 1351 } 1352 1353 static bool nfp_ctrl_rx(struct nfp_net_r_vector *r_vec) 1354 { 1355 struct nfp_net_rx_ring *rx_ring = r_vec->rx_ring; 1356 struct nfp_net *nn = r_vec->nfp_net; 1357 struct nfp_net_dp *dp = &nn->dp; 1358 unsigned int budget = 512; 1359 1360 while (nfp_ctrl_rx_one(nn, dp, r_vec, rx_ring) && budget--) 1361 continue; 1362 1363 return budget; 1364 } 1365 1366 void nfp_nfd3_ctrl_poll(struct tasklet_struct *t) 1367 { 1368 struct nfp_net_r_vector *r_vec = from_tasklet(r_vec, t, tasklet); 1369 1370 spin_lock(&r_vec->lock); 1371 nfp_nfd3_tx_complete(r_vec->tx_ring, 0); 1372 __nfp_ctrl_tx_queued(r_vec); 1373 spin_unlock(&r_vec->lock); 1374 1375 if (nfp_ctrl_rx(r_vec)) { 1376 nfp_net_irq_unmask(r_vec->nfp_net, r_vec->irq_entry); 1377 } else { 1378 tasklet_schedule(&r_vec->tasklet); 1379 nn_dp_warn(&r_vec->nfp_net->dp, 1380 "control message budget exceeded!\n"); 1381 } 1382 } 1383