1 /* 2 * Copyright (C) 2016 Netronome Systems, Inc. 3 * 4 * This software is dual licensed under the GNU General License Version 2, 5 * June 1991 as shown in the file COPYING in the top-level directory of this 6 * source tree or the BSD 2-Clause License provided below. You have the 7 * option to license this software under the complete terms of either license. 8 * 9 * The BSD 2-Clause License: 10 * 11 * Redistribution and use in source and binary forms, with or 12 * without modification, are permitted provided that the following 13 * conditions are met: 14 * 15 * 1. Redistributions of source code must retain the above 16 * copyright notice, this list of conditions and the following 17 * disclaimer. 18 * 19 * 2. Redistributions in binary form must reproduce the above 20 * copyright notice, this list of conditions and the following 21 * disclaimer in the documentation and/or other materials 22 * provided with the distribution. 23 * 24 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, 25 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF 26 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND 27 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS 28 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN 29 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN 30 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE 31 * SOFTWARE. 32 */ 33 34 #define pr_fmt(fmt) "NFP net bpf: " fmt 35 36 #include <linux/kernel.h> 37 #include <linux/bpf.h> 38 #include <linux/filter.h> 39 #include <linux/pkt_cls.h> 40 #include <linux/unistd.h> 41 42 #include "main.h" 43 #include "../nfp_asm.h" 44 45 /* --- NFP prog --- */ 46 /* Foreach "multiple" entries macros provide pos and next<n> pointers. 47 * It's safe to modify the next pointers (but not pos). 48 */ 49 #define nfp_for_each_insn_walk2(nfp_prog, pos, next) \ 50 for (pos = list_first_entry(&(nfp_prog)->insns, typeof(*pos), l), \ 51 next = list_next_entry(pos, l); \ 52 &(nfp_prog)->insns != &pos->l && \ 53 &(nfp_prog)->insns != &next->l; \ 54 pos = nfp_meta_next(pos), \ 55 next = nfp_meta_next(pos)) 56 57 #define nfp_for_each_insn_walk3(nfp_prog, pos, next, next2) \ 58 for (pos = list_first_entry(&(nfp_prog)->insns, typeof(*pos), l), \ 59 next = list_next_entry(pos, l), \ 60 next2 = list_next_entry(next, l); \ 61 &(nfp_prog)->insns != &pos->l && \ 62 &(nfp_prog)->insns != &next->l && \ 63 &(nfp_prog)->insns != &next2->l; \ 64 pos = nfp_meta_next(pos), \ 65 next = nfp_meta_next(pos), \ 66 next2 = nfp_meta_next(next)) 67 68 static bool 69 nfp_meta_has_next(struct nfp_prog *nfp_prog, struct nfp_insn_meta *meta) 70 { 71 return meta->l.next != &nfp_prog->insns; 72 } 73 74 static bool 75 nfp_meta_has_prev(struct nfp_prog *nfp_prog, struct nfp_insn_meta *meta) 76 { 77 return meta->l.prev != &nfp_prog->insns; 78 } 79 80 static void nfp_prog_free(struct nfp_prog *nfp_prog) 81 { 82 struct nfp_insn_meta *meta, *tmp; 83 84 list_for_each_entry_safe(meta, tmp, &nfp_prog->insns, l) { 85 list_del(&meta->l); 86 kfree(meta); 87 } 88 kfree(nfp_prog); 89 } 90 91 static void nfp_prog_push(struct nfp_prog *nfp_prog, u64 insn) 92 { 93 if (nfp_prog->__prog_alloc_len == nfp_prog->prog_len) { 94 nfp_prog->error = -ENOSPC; 95 return; 96 } 97 98 nfp_prog->prog[nfp_prog->prog_len] = insn; 99 nfp_prog->prog_len++; 100 } 101 102 static unsigned int nfp_prog_current_offset(struct nfp_prog *nfp_prog) 103 { 104 return nfp_prog->start_off + nfp_prog->prog_len; 105 } 106 107 static unsigned int 108 nfp_prog_offset_to_index(struct nfp_prog *nfp_prog, unsigned int offset) 109 { 110 return offset - nfp_prog->start_off; 111 } 112 113 /* --- Emitters --- */ 114 static void 115 __emit_cmd(struct nfp_prog *nfp_prog, enum cmd_tgt_map op, 116 u8 mode, u8 xfer, u8 areg, u8 breg, u8 size, bool sync) 117 { 118 enum cmd_ctx_swap ctx; 119 u64 insn; 120 121 if (sync) 122 ctx = CMD_CTX_SWAP; 123 else 124 ctx = CMD_CTX_NO_SWAP; 125 126 insn = FIELD_PREP(OP_CMD_A_SRC, areg) | 127 FIELD_PREP(OP_CMD_CTX, ctx) | 128 FIELD_PREP(OP_CMD_B_SRC, breg) | 129 FIELD_PREP(OP_CMD_TOKEN, cmd_tgt_act[op].token) | 130 FIELD_PREP(OP_CMD_XFER, xfer) | 131 FIELD_PREP(OP_CMD_CNT, size) | 132 FIELD_PREP(OP_CMD_SIG, sync) | 133 FIELD_PREP(OP_CMD_TGT_CMD, cmd_tgt_act[op].tgt_cmd) | 134 FIELD_PREP(OP_CMD_MODE, mode); 135 136 nfp_prog_push(nfp_prog, insn); 137 } 138 139 static void 140 emit_cmd(struct nfp_prog *nfp_prog, enum cmd_tgt_map op, 141 u8 mode, u8 xfer, swreg lreg, swreg rreg, u8 size, bool sync) 142 { 143 struct nfp_insn_re_regs reg; 144 int err; 145 146 err = swreg_to_restricted(reg_none(), lreg, rreg, ®, false); 147 if (err) { 148 nfp_prog->error = err; 149 return; 150 } 151 if (reg.swap) { 152 pr_err("cmd can't swap arguments\n"); 153 nfp_prog->error = -EFAULT; 154 return; 155 } 156 if (reg.dst_lmextn || reg.src_lmextn) { 157 pr_err("cmd can't use LMextn\n"); 158 nfp_prog->error = -EFAULT; 159 return; 160 } 161 162 __emit_cmd(nfp_prog, op, mode, xfer, reg.areg, reg.breg, size, sync); 163 } 164 165 static void 166 __emit_br(struct nfp_prog *nfp_prog, enum br_mask mask, enum br_ev_pip ev_pip, 167 enum br_ctx_signal_state css, u16 addr, u8 defer) 168 { 169 u16 addr_lo, addr_hi; 170 u64 insn; 171 172 addr_lo = addr & (OP_BR_ADDR_LO >> __bf_shf(OP_BR_ADDR_LO)); 173 addr_hi = addr != addr_lo; 174 175 insn = OP_BR_BASE | 176 FIELD_PREP(OP_BR_MASK, mask) | 177 FIELD_PREP(OP_BR_EV_PIP, ev_pip) | 178 FIELD_PREP(OP_BR_CSS, css) | 179 FIELD_PREP(OP_BR_DEFBR, defer) | 180 FIELD_PREP(OP_BR_ADDR_LO, addr_lo) | 181 FIELD_PREP(OP_BR_ADDR_HI, addr_hi); 182 183 nfp_prog_push(nfp_prog, insn); 184 } 185 186 static void emit_br_def(struct nfp_prog *nfp_prog, u16 addr, u8 defer) 187 { 188 if (defer > 2) { 189 pr_err("BUG: branch defer out of bounds %d\n", defer); 190 nfp_prog->error = -EFAULT; 191 return; 192 } 193 __emit_br(nfp_prog, BR_UNC, BR_EV_PIP_UNCOND, BR_CSS_NONE, addr, defer); 194 } 195 196 static void 197 emit_br(struct nfp_prog *nfp_prog, enum br_mask mask, u16 addr, u8 defer) 198 { 199 __emit_br(nfp_prog, mask, 200 mask != BR_UNC ? BR_EV_PIP_COND : BR_EV_PIP_UNCOND, 201 BR_CSS_NONE, addr, defer); 202 } 203 204 static void 205 __emit_br_byte(struct nfp_prog *nfp_prog, u8 areg, u8 breg, bool imm8, 206 u8 byte, bool equal, u16 addr, u8 defer, bool src_lmextn) 207 { 208 u16 addr_lo, addr_hi; 209 u64 insn; 210 211 addr_lo = addr & (OP_BB_ADDR_LO >> __bf_shf(OP_BB_ADDR_LO)); 212 addr_hi = addr != addr_lo; 213 214 insn = OP_BBYTE_BASE | 215 FIELD_PREP(OP_BB_A_SRC, areg) | 216 FIELD_PREP(OP_BB_BYTE, byte) | 217 FIELD_PREP(OP_BB_B_SRC, breg) | 218 FIELD_PREP(OP_BB_I8, imm8) | 219 FIELD_PREP(OP_BB_EQ, equal) | 220 FIELD_PREP(OP_BB_DEFBR, defer) | 221 FIELD_PREP(OP_BB_ADDR_LO, addr_lo) | 222 FIELD_PREP(OP_BB_ADDR_HI, addr_hi) | 223 FIELD_PREP(OP_BB_SRC_LMEXTN, src_lmextn); 224 225 nfp_prog_push(nfp_prog, insn); 226 } 227 228 static void 229 emit_br_byte_neq(struct nfp_prog *nfp_prog, 230 swreg src, u8 imm, u8 byte, u16 addr, u8 defer) 231 { 232 struct nfp_insn_re_regs reg; 233 int err; 234 235 err = swreg_to_restricted(reg_none(), src, reg_imm(imm), ®, true); 236 if (err) { 237 nfp_prog->error = err; 238 return; 239 } 240 241 __emit_br_byte(nfp_prog, reg.areg, reg.breg, reg.i8, byte, false, addr, 242 defer, reg.src_lmextn); 243 } 244 245 static void 246 __emit_immed(struct nfp_prog *nfp_prog, u16 areg, u16 breg, u16 imm_hi, 247 enum immed_width width, bool invert, 248 enum immed_shift shift, bool wr_both, 249 bool dst_lmextn, bool src_lmextn) 250 { 251 u64 insn; 252 253 insn = OP_IMMED_BASE | 254 FIELD_PREP(OP_IMMED_A_SRC, areg) | 255 FIELD_PREP(OP_IMMED_B_SRC, breg) | 256 FIELD_PREP(OP_IMMED_IMM, imm_hi) | 257 FIELD_PREP(OP_IMMED_WIDTH, width) | 258 FIELD_PREP(OP_IMMED_INV, invert) | 259 FIELD_PREP(OP_IMMED_SHIFT, shift) | 260 FIELD_PREP(OP_IMMED_WR_AB, wr_both) | 261 FIELD_PREP(OP_IMMED_SRC_LMEXTN, src_lmextn) | 262 FIELD_PREP(OP_IMMED_DST_LMEXTN, dst_lmextn); 263 264 nfp_prog_push(nfp_prog, insn); 265 } 266 267 static void 268 emit_immed(struct nfp_prog *nfp_prog, swreg dst, u16 imm, 269 enum immed_width width, bool invert, enum immed_shift shift) 270 { 271 struct nfp_insn_ur_regs reg; 272 int err; 273 274 if (swreg_type(dst) == NN_REG_IMM) { 275 nfp_prog->error = -EFAULT; 276 return; 277 } 278 279 err = swreg_to_unrestricted(dst, dst, reg_imm(imm & 0xff), ®); 280 if (err) { 281 nfp_prog->error = err; 282 return; 283 } 284 285 __emit_immed(nfp_prog, reg.areg, reg.breg, imm >> 8, width, 286 invert, shift, reg.wr_both, 287 reg.dst_lmextn, reg.src_lmextn); 288 } 289 290 static void 291 __emit_shf(struct nfp_prog *nfp_prog, u16 dst, enum alu_dst_ab dst_ab, 292 enum shf_sc sc, u8 shift, 293 u16 areg, enum shf_op op, u16 breg, bool i8, bool sw, bool wr_both, 294 bool dst_lmextn, bool src_lmextn) 295 { 296 u64 insn; 297 298 if (!FIELD_FIT(OP_SHF_SHIFT, shift)) { 299 nfp_prog->error = -EFAULT; 300 return; 301 } 302 303 if (sc == SHF_SC_L_SHF) 304 shift = 32 - shift; 305 306 insn = OP_SHF_BASE | 307 FIELD_PREP(OP_SHF_A_SRC, areg) | 308 FIELD_PREP(OP_SHF_SC, sc) | 309 FIELD_PREP(OP_SHF_B_SRC, breg) | 310 FIELD_PREP(OP_SHF_I8, i8) | 311 FIELD_PREP(OP_SHF_SW, sw) | 312 FIELD_PREP(OP_SHF_DST, dst) | 313 FIELD_PREP(OP_SHF_SHIFT, shift) | 314 FIELD_PREP(OP_SHF_OP, op) | 315 FIELD_PREP(OP_SHF_DST_AB, dst_ab) | 316 FIELD_PREP(OP_SHF_WR_AB, wr_both) | 317 FIELD_PREP(OP_SHF_SRC_LMEXTN, src_lmextn) | 318 FIELD_PREP(OP_SHF_DST_LMEXTN, dst_lmextn); 319 320 nfp_prog_push(nfp_prog, insn); 321 } 322 323 static void 324 emit_shf(struct nfp_prog *nfp_prog, swreg dst, 325 swreg lreg, enum shf_op op, swreg rreg, enum shf_sc sc, u8 shift) 326 { 327 struct nfp_insn_re_regs reg; 328 int err; 329 330 err = swreg_to_restricted(dst, lreg, rreg, ®, true); 331 if (err) { 332 nfp_prog->error = err; 333 return; 334 } 335 336 __emit_shf(nfp_prog, reg.dst, reg.dst_ab, sc, shift, 337 reg.areg, op, reg.breg, reg.i8, reg.swap, reg.wr_both, 338 reg.dst_lmextn, reg.src_lmextn); 339 } 340 341 static void 342 __emit_alu(struct nfp_prog *nfp_prog, u16 dst, enum alu_dst_ab dst_ab, 343 u16 areg, enum alu_op op, u16 breg, bool swap, bool wr_both, 344 bool dst_lmextn, bool src_lmextn) 345 { 346 u64 insn; 347 348 insn = OP_ALU_BASE | 349 FIELD_PREP(OP_ALU_A_SRC, areg) | 350 FIELD_PREP(OP_ALU_B_SRC, breg) | 351 FIELD_PREP(OP_ALU_DST, dst) | 352 FIELD_PREP(OP_ALU_SW, swap) | 353 FIELD_PREP(OP_ALU_OP, op) | 354 FIELD_PREP(OP_ALU_DST_AB, dst_ab) | 355 FIELD_PREP(OP_ALU_WR_AB, wr_both) | 356 FIELD_PREP(OP_ALU_SRC_LMEXTN, src_lmextn) | 357 FIELD_PREP(OP_ALU_DST_LMEXTN, dst_lmextn); 358 359 nfp_prog_push(nfp_prog, insn); 360 } 361 362 static void 363 emit_alu(struct nfp_prog *nfp_prog, swreg dst, 364 swreg lreg, enum alu_op op, swreg rreg) 365 { 366 struct nfp_insn_ur_regs reg; 367 int err; 368 369 err = swreg_to_unrestricted(dst, lreg, rreg, ®); 370 if (err) { 371 nfp_prog->error = err; 372 return; 373 } 374 375 __emit_alu(nfp_prog, reg.dst, reg.dst_ab, 376 reg.areg, op, reg.breg, reg.swap, reg.wr_both, 377 reg.dst_lmextn, reg.src_lmextn); 378 } 379 380 static void 381 __emit_ld_field(struct nfp_prog *nfp_prog, enum shf_sc sc, 382 u8 areg, u8 bmask, u8 breg, u8 shift, bool imm8, 383 bool zero, bool swap, bool wr_both, 384 bool dst_lmextn, bool src_lmextn) 385 { 386 u64 insn; 387 388 insn = OP_LDF_BASE | 389 FIELD_PREP(OP_LDF_A_SRC, areg) | 390 FIELD_PREP(OP_LDF_SC, sc) | 391 FIELD_PREP(OP_LDF_B_SRC, breg) | 392 FIELD_PREP(OP_LDF_I8, imm8) | 393 FIELD_PREP(OP_LDF_SW, swap) | 394 FIELD_PREP(OP_LDF_ZF, zero) | 395 FIELD_PREP(OP_LDF_BMASK, bmask) | 396 FIELD_PREP(OP_LDF_SHF, shift) | 397 FIELD_PREP(OP_LDF_WR_AB, wr_both) | 398 FIELD_PREP(OP_LDF_SRC_LMEXTN, src_lmextn) | 399 FIELD_PREP(OP_LDF_DST_LMEXTN, dst_lmextn); 400 401 nfp_prog_push(nfp_prog, insn); 402 } 403 404 static void 405 emit_ld_field_any(struct nfp_prog *nfp_prog, swreg dst, u8 bmask, swreg src, 406 enum shf_sc sc, u8 shift, bool zero) 407 { 408 struct nfp_insn_re_regs reg; 409 int err; 410 411 /* Note: ld_field is special as it uses one of the src regs as dst */ 412 err = swreg_to_restricted(dst, dst, src, ®, true); 413 if (err) { 414 nfp_prog->error = err; 415 return; 416 } 417 418 __emit_ld_field(nfp_prog, sc, reg.areg, bmask, reg.breg, shift, 419 reg.i8, zero, reg.swap, reg.wr_both, 420 reg.dst_lmextn, reg.src_lmextn); 421 } 422 423 static void 424 emit_ld_field(struct nfp_prog *nfp_prog, swreg dst, u8 bmask, swreg src, 425 enum shf_sc sc, u8 shift) 426 { 427 emit_ld_field_any(nfp_prog, dst, bmask, src, sc, shift, false); 428 } 429 430 static void 431 __emit_lcsr(struct nfp_prog *nfp_prog, u16 areg, u16 breg, bool wr, u16 addr, 432 bool dst_lmextn, bool src_lmextn) 433 { 434 u64 insn; 435 436 insn = OP_LCSR_BASE | 437 FIELD_PREP(OP_LCSR_A_SRC, areg) | 438 FIELD_PREP(OP_LCSR_B_SRC, breg) | 439 FIELD_PREP(OP_LCSR_WRITE, wr) | 440 FIELD_PREP(OP_LCSR_ADDR, addr) | 441 FIELD_PREP(OP_LCSR_SRC_LMEXTN, src_lmextn) | 442 FIELD_PREP(OP_LCSR_DST_LMEXTN, dst_lmextn); 443 444 nfp_prog_push(nfp_prog, insn); 445 } 446 447 static void emit_csr_wr(struct nfp_prog *nfp_prog, swreg src, u16 addr) 448 { 449 struct nfp_insn_ur_regs reg; 450 int err; 451 452 /* This instruction takes immeds instead of reg_none() for the ignored 453 * operand, but we can't encode 2 immeds in one instr with our normal 454 * swreg infra so if param is an immed, we encode as reg_none() and 455 * copy the immed to both operands. 456 */ 457 if (swreg_type(src) == NN_REG_IMM) { 458 err = swreg_to_unrestricted(reg_none(), src, reg_none(), ®); 459 reg.breg = reg.areg; 460 } else { 461 err = swreg_to_unrestricted(reg_none(), src, reg_imm(0), ®); 462 } 463 if (err) { 464 nfp_prog->error = err; 465 return; 466 } 467 468 __emit_lcsr(nfp_prog, reg.areg, reg.breg, true, addr / 4, 469 false, reg.src_lmextn); 470 } 471 472 static void emit_nop(struct nfp_prog *nfp_prog) 473 { 474 __emit_immed(nfp_prog, UR_REG_IMM, UR_REG_IMM, 0, 0, 0, 0, 0, 0, 0); 475 } 476 477 /* --- Wrappers --- */ 478 static bool pack_immed(u32 imm, u16 *val, enum immed_shift *shift) 479 { 480 if (!(imm & 0xffff0000)) { 481 *val = imm; 482 *shift = IMMED_SHIFT_0B; 483 } else if (!(imm & 0xff0000ff)) { 484 *val = imm >> 8; 485 *shift = IMMED_SHIFT_1B; 486 } else if (!(imm & 0x0000ffff)) { 487 *val = imm >> 16; 488 *shift = IMMED_SHIFT_2B; 489 } else { 490 return false; 491 } 492 493 return true; 494 } 495 496 static void wrp_immed(struct nfp_prog *nfp_prog, swreg dst, u32 imm) 497 { 498 enum immed_shift shift; 499 u16 val; 500 501 if (pack_immed(imm, &val, &shift)) { 502 emit_immed(nfp_prog, dst, val, IMMED_WIDTH_ALL, false, shift); 503 } else if (pack_immed(~imm, &val, &shift)) { 504 emit_immed(nfp_prog, dst, val, IMMED_WIDTH_ALL, true, shift); 505 } else { 506 emit_immed(nfp_prog, dst, imm & 0xffff, IMMED_WIDTH_ALL, 507 false, IMMED_SHIFT_0B); 508 emit_immed(nfp_prog, dst, imm >> 16, IMMED_WIDTH_WORD, 509 false, IMMED_SHIFT_2B); 510 } 511 } 512 513 /* ur_load_imm_any() - encode immediate or use tmp register (unrestricted) 514 * If the @imm is small enough encode it directly in operand and return 515 * otherwise load @imm to a spare register and return its encoding. 516 */ 517 static swreg ur_load_imm_any(struct nfp_prog *nfp_prog, u32 imm, swreg tmp_reg) 518 { 519 if (FIELD_FIT(UR_REG_IMM_MAX, imm)) 520 return reg_imm(imm); 521 522 wrp_immed(nfp_prog, tmp_reg, imm); 523 return tmp_reg; 524 } 525 526 /* re_load_imm_any() - encode immediate or use tmp register (restricted) 527 * If the @imm is small enough encode it directly in operand and return 528 * otherwise load @imm to a spare register and return its encoding. 529 */ 530 static swreg re_load_imm_any(struct nfp_prog *nfp_prog, u32 imm, swreg tmp_reg) 531 { 532 if (FIELD_FIT(RE_REG_IMM_MAX, imm)) 533 return reg_imm(imm); 534 535 wrp_immed(nfp_prog, tmp_reg, imm); 536 return tmp_reg; 537 } 538 539 static void wrp_nops(struct nfp_prog *nfp_prog, unsigned int count) 540 { 541 while (count--) 542 emit_nop(nfp_prog); 543 } 544 545 static void 546 wrp_br_special(struct nfp_prog *nfp_prog, enum br_mask mask, 547 enum br_special special) 548 { 549 emit_br(nfp_prog, mask, 0, 0); 550 551 nfp_prog->prog[nfp_prog->prog_len - 1] |= 552 FIELD_PREP(OP_BR_SPECIAL, special); 553 } 554 555 static void wrp_mov(struct nfp_prog *nfp_prog, swreg dst, swreg src) 556 { 557 emit_alu(nfp_prog, dst, reg_none(), ALU_OP_NONE, src); 558 } 559 560 static void wrp_reg_mov(struct nfp_prog *nfp_prog, u16 dst, u16 src) 561 { 562 wrp_mov(nfp_prog, reg_both(dst), reg_b(src)); 563 } 564 565 static int 566 data_ld(struct nfp_prog *nfp_prog, swreg offset, u8 dst_gpr, int size) 567 { 568 unsigned int i; 569 u16 shift, sz; 570 571 /* We load the value from the address indicated in @offset and then 572 * shift out the data we don't need. Note: this is big endian! 573 */ 574 sz = max(size, 4); 575 shift = size < 4 ? 4 - size : 0; 576 577 emit_cmd(nfp_prog, CMD_TGT_READ8, CMD_MODE_32b, 0, 578 pptr_reg(nfp_prog), offset, sz - 1, true); 579 580 i = 0; 581 if (shift) 582 emit_shf(nfp_prog, reg_both(dst_gpr), reg_none(), SHF_OP_NONE, 583 reg_xfer(0), SHF_SC_R_SHF, shift * 8); 584 else 585 for (; i * 4 < size; i++) 586 wrp_mov(nfp_prog, reg_both(dst_gpr + i), reg_xfer(i)); 587 588 if (i < 2) 589 wrp_immed(nfp_prog, reg_both(dst_gpr + 1), 0); 590 591 return 0; 592 } 593 594 static int 595 data_ld_host_order(struct nfp_prog *nfp_prog, u8 src_gpr, swreg offset, 596 u8 dst_gpr, int size) 597 { 598 unsigned int i; 599 u8 mask, sz; 600 601 /* We load the value from the address indicated in @offset and then 602 * mask out the data we don't need. Note: this is little endian! 603 */ 604 sz = max(size, 4); 605 mask = size < 4 ? GENMASK(size - 1, 0) : 0; 606 607 emit_cmd(nfp_prog, CMD_TGT_READ32_SWAP, CMD_MODE_32b, 0, 608 reg_a(src_gpr), offset, sz / 4 - 1, true); 609 610 i = 0; 611 if (mask) 612 emit_ld_field_any(nfp_prog, reg_both(dst_gpr), mask, 613 reg_xfer(0), SHF_SC_NONE, 0, true); 614 else 615 for (; i * 4 < size; i++) 616 wrp_mov(nfp_prog, reg_both(dst_gpr + i), reg_xfer(i)); 617 618 if (i < 2) 619 wrp_immed(nfp_prog, reg_both(dst_gpr + 1), 0); 620 621 return 0; 622 } 623 624 static int 625 construct_data_ind_ld(struct nfp_prog *nfp_prog, u16 offset, u16 src, u8 size) 626 { 627 swreg tmp_reg; 628 629 /* Calculate the true offset (src_reg + imm) */ 630 tmp_reg = ur_load_imm_any(nfp_prog, offset, imm_b(nfp_prog)); 631 emit_alu(nfp_prog, imm_both(nfp_prog), reg_a(src), ALU_OP_ADD, tmp_reg); 632 633 /* Check packet length (size guaranteed to fit b/c it's u8) */ 634 emit_alu(nfp_prog, imm_a(nfp_prog), 635 imm_a(nfp_prog), ALU_OP_ADD, reg_imm(size)); 636 emit_alu(nfp_prog, reg_none(), 637 plen_reg(nfp_prog), ALU_OP_SUB, imm_a(nfp_prog)); 638 wrp_br_special(nfp_prog, BR_BLO, OP_BR_GO_ABORT); 639 640 /* Load data */ 641 return data_ld(nfp_prog, imm_b(nfp_prog), 0, size); 642 } 643 644 static int construct_data_ld(struct nfp_prog *nfp_prog, u16 offset, u8 size) 645 { 646 swreg tmp_reg; 647 648 /* Check packet length */ 649 tmp_reg = ur_load_imm_any(nfp_prog, offset + size, imm_a(nfp_prog)); 650 emit_alu(nfp_prog, reg_none(), plen_reg(nfp_prog), ALU_OP_SUB, tmp_reg); 651 wrp_br_special(nfp_prog, BR_BLO, OP_BR_GO_ABORT); 652 653 /* Load data */ 654 tmp_reg = re_load_imm_any(nfp_prog, offset, imm_b(nfp_prog)); 655 return data_ld(nfp_prog, tmp_reg, 0, size); 656 } 657 658 static int 659 data_stx_host_order(struct nfp_prog *nfp_prog, u8 dst_gpr, swreg offset, 660 u8 src_gpr, u8 size) 661 { 662 unsigned int i; 663 664 for (i = 0; i * 4 < size; i++) 665 wrp_mov(nfp_prog, reg_xfer(i), reg_a(src_gpr + i)); 666 667 emit_cmd(nfp_prog, CMD_TGT_WRITE8_SWAP, CMD_MODE_32b, 0, 668 reg_a(dst_gpr), offset, size - 1, true); 669 670 return 0; 671 } 672 673 static int 674 data_st_host_order(struct nfp_prog *nfp_prog, u8 dst_gpr, swreg offset, 675 u64 imm, u8 size) 676 { 677 wrp_immed(nfp_prog, reg_xfer(0), imm); 678 if (size == 8) 679 wrp_immed(nfp_prog, reg_xfer(1), imm >> 32); 680 681 emit_cmd(nfp_prog, CMD_TGT_WRITE8_SWAP, CMD_MODE_32b, 0, 682 reg_a(dst_gpr), offset, size - 1, true); 683 684 return 0; 685 } 686 687 typedef int 688 (*lmem_step)(struct nfp_prog *nfp_prog, u8 gpr, u8 gpr_byte, s32 off, 689 unsigned int size, bool first, bool new_gpr, bool last, bool lm3, 690 bool needs_inc); 691 692 static int 693 wrp_lmem_load(struct nfp_prog *nfp_prog, u8 dst, u8 dst_byte, s32 off, 694 unsigned int size, bool first, bool new_gpr, bool last, bool lm3, 695 bool needs_inc) 696 { 697 bool should_inc = needs_inc && new_gpr && !last; 698 u32 idx, src_byte; 699 enum shf_sc sc; 700 swreg reg; 701 int shf; 702 u8 mask; 703 704 if (WARN_ON_ONCE(dst_byte + size > 4 || off % 4 + size > 4)) 705 return -EOPNOTSUPP; 706 707 idx = off / 4; 708 709 /* Move the entire word */ 710 if (size == 4) { 711 wrp_mov(nfp_prog, reg_both(dst), 712 should_inc ? reg_lm_inc(3) : reg_lm(lm3 ? 3 : 0, idx)); 713 return 0; 714 } 715 716 if (WARN_ON_ONCE(lm3 && idx > RE_REG_LM_IDX_MAX)) 717 return -EOPNOTSUPP; 718 719 src_byte = off % 4; 720 721 mask = (1 << size) - 1; 722 mask <<= dst_byte; 723 724 if (WARN_ON_ONCE(mask > 0xf)) 725 return -EOPNOTSUPP; 726 727 shf = abs(src_byte - dst_byte) * 8; 728 if (src_byte == dst_byte) { 729 sc = SHF_SC_NONE; 730 } else if (src_byte < dst_byte) { 731 shf = 32 - shf; 732 sc = SHF_SC_L_SHF; 733 } else { 734 sc = SHF_SC_R_SHF; 735 } 736 737 /* ld_field can address fewer indexes, if offset too large do RMW. 738 * Because we RMV twice we waste 2 cycles on unaligned 8 byte writes. 739 */ 740 if (idx <= RE_REG_LM_IDX_MAX) { 741 reg = reg_lm(lm3 ? 3 : 0, idx); 742 } else { 743 reg = imm_a(nfp_prog); 744 /* If it's not the first part of the load and we start a new GPR 745 * that means we are loading a second part of the LMEM word into 746 * a new GPR. IOW we've already looked that LMEM word and 747 * therefore it has been loaded into imm_a(). 748 */ 749 if (first || !new_gpr) 750 wrp_mov(nfp_prog, reg, reg_lm(0, idx)); 751 } 752 753 emit_ld_field_any(nfp_prog, reg_both(dst), mask, reg, sc, shf, new_gpr); 754 755 if (should_inc) 756 wrp_mov(nfp_prog, reg_none(), reg_lm_inc(3)); 757 758 return 0; 759 } 760 761 static int 762 wrp_lmem_store(struct nfp_prog *nfp_prog, u8 src, u8 src_byte, s32 off, 763 unsigned int size, bool first, bool new_gpr, bool last, bool lm3, 764 bool needs_inc) 765 { 766 bool should_inc = needs_inc && new_gpr && !last; 767 u32 idx, dst_byte; 768 enum shf_sc sc; 769 swreg reg; 770 int shf; 771 u8 mask; 772 773 if (WARN_ON_ONCE(src_byte + size > 4 || off % 4 + size > 4)) 774 return -EOPNOTSUPP; 775 776 idx = off / 4; 777 778 /* Move the entire word */ 779 if (size == 4) { 780 wrp_mov(nfp_prog, 781 should_inc ? reg_lm_inc(3) : reg_lm(lm3 ? 3 : 0, idx), 782 reg_b(src)); 783 return 0; 784 } 785 786 if (WARN_ON_ONCE(lm3 && idx > RE_REG_LM_IDX_MAX)) 787 return -EOPNOTSUPP; 788 789 dst_byte = off % 4; 790 791 mask = (1 << size) - 1; 792 mask <<= dst_byte; 793 794 if (WARN_ON_ONCE(mask > 0xf)) 795 return -EOPNOTSUPP; 796 797 shf = abs(src_byte - dst_byte) * 8; 798 if (src_byte == dst_byte) { 799 sc = SHF_SC_NONE; 800 } else if (src_byte < dst_byte) { 801 shf = 32 - shf; 802 sc = SHF_SC_L_SHF; 803 } else { 804 sc = SHF_SC_R_SHF; 805 } 806 807 /* ld_field can address fewer indexes, if offset too large do RMW. 808 * Because we RMV twice we waste 2 cycles on unaligned 8 byte writes. 809 */ 810 if (idx <= RE_REG_LM_IDX_MAX) { 811 reg = reg_lm(lm3 ? 3 : 0, idx); 812 } else { 813 reg = imm_a(nfp_prog); 814 /* Only first and last LMEM locations are going to need RMW, 815 * the middle location will be overwritten fully. 816 */ 817 if (first || last) 818 wrp_mov(nfp_prog, reg, reg_lm(0, idx)); 819 } 820 821 emit_ld_field(nfp_prog, reg, mask, reg_b(src), sc, shf); 822 823 if (new_gpr || last) { 824 if (idx > RE_REG_LM_IDX_MAX) 825 wrp_mov(nfp_prog, reg_lm(0, idx), reg); 826 if (should_inc) 827 wrp_mov(nfp_prog, reg_none(), reg_lm_inc(3)); 828 } 829 830 return 0; 831 } 832 833 static int 834 mem_op_stack(struct nfp_prog *nfp_prog, struct nfp_insn_meta *meta, 835 unsigned int size, unsigned int ptr_off, u8 gpr, u8 ptr_gpr, 836 bool clr_gpr, lmem_step step) 837 { 838 s32 off = nfp_prog->stack_depth + meta->insn.off + ptr_off; 839 bool first = true, last; 840 bool needs_inc = false; 841 swreg stack_off_reg; 842 u8 prev_gpr = 255; 843 u32 gpr_byte = 0; 844 bool lm3 = true; 845 int ret; 846 847 if (meta->ptr_not_const) { 848 /* Use of the last encountered ptr_off is OK, they all have 849 * the same alignment. Depend on low bits of value being 850 * discarded when written to LMaddr register. 851 */ 852 stack_off_reg = ur_load_imm_any(nfp_prog, meta->insn.off, 853 stack_imm(nfp_prog)); 854 855 emit_alu(nfp_prog, imm_b(nfp_prog), 856 reg_a(ptr_gpr), ALU_OP_ADD, stack_off_reg); 857 858 needs_inc = true; 859 } else if (off + size <= 64) { 860 /* We can reach bottom 64B with LMaddr0 */ 861 lm3 = false; 862 } else if (round_down(off, 32) == round_down(off + size - 1, 32)) { 863 /* We have to set up a new pointer. If we know the offset 864 * and the entire access falls into a single 32 byte aligned 865 * window we won't have to increment the LM pointer. 866 * The 32 byte alignment is imporant because offset is ORed in 867 * not added when doing *l$indexN[off]. 868 */ 869 stack_off_reg = ur_load_imm_any(nfp_prog, round_down(off, 32), 870 stack_imm(nfp_prog)); 871 emit_alu(nfp_prog, imm_b(nfp_prog), 872 stack_reg(nfp_prog), ALU_OP_ADD, stack_off_reg); 873 874 off %= 32; 875 } else { 876 stack_off_reg = ur_load_imm_any(nfp_prog, round_down(off, 4), 877 stack_imm(nfp_prog)); 878 879 emit_alu(nfp_prog, imm_b(nfp_prog), 880 stack_reg(nfp_prog), ALU_OP_ADD, stack_off_reg); 881 882 needs_inc = true; 883 } 884 if (lm3) { 885 emit_csr_wr(nfp_prog, imm_b(nfp_prog), NFP_CSR_ACT_LM_ADDR3); 886 /* For size < 4 one slot will be filled by zeroing of upper. */ 887 wrp_nops(nfp_prog, clr_gpr && size < 8 ? 2 : 3); 888 } 889 890 if (clr_gpr && size < 8) 891 wrp_immed(nfp_prog, reg_both(gpr + 1), 0); 892 893 while (size) { 894 u32 slice_end; 895 u8 slice_size; 896 897 slice_size = min(size, 4 - gpr_byte); 898 slice_end = min(off + slice_size, round_up(off + 1, 4)); 899 slice_size = slice_end - off; 900 901 last = slice_size == size; 902 903 if (needs_inc) 904 off %= 4; 905 906 ret = step(nfp_prog, gpr, gpr_byte, off, slice_size, 907 first, gpr != prev_gpr, last, lm3, needs_inc); 908 if (ret) 909 return ret; 910 911 prev_gpr = gpr; 912 first = false; 913 914 gpr_byte += slice_size; 915 if (gpr_byte >= 4) { 916 gpr_byte -= 4; 917 gpr++; 918 } 919 920 size -= slice_size; 921 off += slice_size; 922 } 923 924 return 0; 925 } 926 927 static void 928 wrp_alu_imm(struct nfp_prog *nfp_prog, u8 dst, enum alu_op alu_op, u32 imm) 929 { 930 swreg tmp_reg; 931 932 if (alu_op == ALU_OP_AND) { 933 if (!imm) 934 wrp_immed(nfp_prog, reg_both(dst), 0); 935 if (!imm || !~imm) 936 return; 937 } 938 if (alu_op == ALU_OP_OR) { 939 if (!~imm) 940 wrp_immed(nfp_prog, reg_both(dst), ~0U); 941 if (!imm || !~imm) 942 return; 943 } 944 if (alu_op == ALU_OP_XOR) { 945 if (!~imm) 946 emit_alu(nfp_prog, reg_both(dst), reg_none(), 947 ALU_OP_NEG, reg_b(dst)); 948 if (!imm || !~imm) 949 return; 950 } 951 952 tmp_reg = ur_load_imm_any(nfp_prog, imm, imm_b(nfp_prog)); 953 emit_alu(nfp_prog, reg_both(dst), reg_a(dst), alu_op, tmp_reg); 954 } 955 956 static int 957 wrp_alu64_imm(struct nfp_prog *nfp_prog, struct nfp_insn_meta *meta, 958 enum alu_op alu_op, bool skip) 959 { 960 const struct bpf_insn *insn = &meta->insn; 961 u64 imm = insn->imm; /* sign extend */ 962 963 if (skip) { 964 meta->skip = true; 965 return 0; 966 } 967 968 wrp_alu_imm(nfp_prog, insn->dst_reg * 2, alu_op, imm & ~0U); 969 wrp_alu_imm(nfp_prog, insn->dst_reg * 2 + 1, alu_op, imm >> 32); 970 971 return 0; 972 } 973 974 static int 975 wrp_alu64_reg(struct nfp_prog *nfp_prog, struct nfp_insn_meta *meta, 976 enum alu_op alu_op) 977 { 978 u8 dst = meta->insn.dst_reg * 2, src = meta->insn.src_reg * 2; 979 980 emit_alu(nfp_prog, reg_both(dst), reg_a(dst), alu_op, reg_b(src)); 981 emit_alu(nfp_prog, reg_both(dst + 1), 982 reg_a(dst + 1), alu_op, reg_b(src + 1)); 983 984 return 0; 985 } 986 987 static int 988 wrp_alu32_imm(struct nfp_prog *nfp_prog, struct nfp_insn_meta *meta, 989 enum alu_op alu_op, bool skip) 990 { 991 const struct bpf_insn *insn = &meta->insn; 992 993 if (skip) { 994 meta->skip = true; 995 return 0; 996 } 997 998 wrp_alu_imm(nfp_prog, insn->dst_reg * 2, alu_op, insn->imm); 999 wrp_immed(nfp_prog, reg_both(insn->dst_reg * 2 + 1), 0); 1000 1001 return 0; 1002 } 1003 1004 static int 1005 wrp_alu32_reg(struct nfp_prog *nfp_prog, struct nfp_insn_meta *meta, 1006 enum alu_op alu_op) 1007 { 1008 u8 dst = meta->insn.dst_reg * 2, src = meta->insn.src_reg * 2; 1009 1010 emit_alu(nfp_prog, reg_both(dst), reg_a(dst), alu_op, reg_b(src)); 1011 wrp_immed(nfp_prog, reg_both(meta->insn.dst_reg * 2 + 1), 0); 1012 1013 return 0; 1014 } 1015 1016 static void 1017 wrp_test_reg_one(struct nfp_prog *nfp_prog, u8 dst, enum alu_op alu_op, u8 src, 1018 enum br_mask br_mask, u16 off) 1019 { 1020 emit_alu(nfp_prog, reg_none(), reg_a(dst), alu_op, reg_b(src)); 1021 emit_br(nfp_prog, br_mask, off, 0); 1022 } 1023 1024 static int 1025 wrp_test_reg(struct nfp_prog *nfp_prog, struct nfp_insn_meta *meta, 1026 enum alu_op alu_op, enum br_mask br_mask) 1027 { 1028 const struct bpf_insn *insn = &meta->insn; 1029 1030 if (insn->off < 0) /* TODO */ 1031 return -EOPNOTSUPP; 1032 1033 wrp_test_reg_one(nfp_prog, insn->dst_reg * 2, alu_op, 1034 insn->src_reg * 2, br_mask, insn->off); 1035 wrp_test_reg_one(nfp_prog, insn->dst_reg * 2 + 1, alu_op, 1036 insn->src_reg * 2 + 1, br_mask, insn->off); 1037 1038 return 0; 1039 } 1040 1041 static int 1042 wrp_cmp_imm(struct nfp_prog *nfp_prog, struct nfp_insn_meta *meta, 1043 enum br_mask br_mask, bool swap) 1044 { 1045 const struct bpf_insn *insn = &meta->insn; 1046 u64 imm = insn->imm; /* sign extend */ 1047 u8 reg = insn->dst_reg * 2; 1048 swreg tmp_reg; 1049 1050 if (insn->off < 0) /* TODO */ 1051 return -EOPNOTSUPP; 1052 1053 tmp_reg = ur_load_imm_any(nfp_prog, imm & ~0U, imm_b(nfp_prog)); 1054 if (!swap) 1055 emit_alu(nfp_prog, reg_none(), reg_a(reg), ALU_OP_SUB, tmp_reg); 1056 else 1057 emit_alu(nfp_prog, reg_none(), tmp_reg, ALU_OP_SUB, reg_a(reg)); 1058 1059 tmp_reg = ur_load_imm_any(nfp_prog, imm >> 32, imm_b(nfp_prog)); 1060 if (!swap) 1061 emit_alu(nfp_prog, reg_none(), 1062 reg_a(reg + 1), ALU_OP_SUB_C, tmp_reg); 1063 else 1064 emit_alu(nfp_prog, reg_none(), 1065 tmp_reg, ALU_OP_SUB_C, reg_a(reg + 1)); 1066 1067 emit_br(nfp_prog, br_mask, insn->off, 0); 1068 1069 return 0; 1070 } 1071 1072 static int 1073 wrp_cmp_reg(struct nfp_prog *nfp_prog, struct nfp_insn_meta *meta, 1074 enum br_mask br_mask, bool swap) 1075 { 1076 const struct bpf_insn *insn = &meta->insn; 1077 u8 areg, breg; 1078 1079 areg = insn->dst_reg * 2; 1080 breg = insn->src_reg * 2; 1081 1082 if (insn->off < 0) /* TODO */ 1083 return -EOPNOTSUPP; 1084 1085 if (swap) { 1086 areg ^= breg; 1087 breg ^= areg; 1088 areg ^= breg; 1089 } 1090 1091 emit_alu(nfp_prog, reg_none(), reg_a(areg), ALU_OP_SUB, reg_b(breg)); 1092 emit_alu(nfp_prog, reg_none(), 1093 reg_a(areg + 1), ALU_OP_SUB_C, reg_b(breg + 1)); 1094 emit_br(nfp_prog, br_mask, insn->off, 0); 1095 1096 return 0; 1097 } 1098 1099 static void wrp_end32(struct nfp_prog *nfp_prog, swreg reg_in, u8 gpr_out) 1100 { 1101 emit_ld_field(nfp_prog, reg_both(gpr_out), 0xf, reg_in, 1102 SHF_SC_R_ROT, 8); 1103 emit_ld_field(nfp_prog, reg_both(gpr_out), 0x5, reg_a(gpr_out), 1104 SHF_SC_R_ROT, 16); 1105 } 1106 1107 /* --- Callbacks --- */ 1108 static int mov_reg64(struct nfp_prog *nfp_prog, struct nfp_insn_meta *meta) 1109 { 1110 const struct bpf_insn *insn = &meta->insn; 1111 u8 dst = insn->dst_reg * 2; 1112 u8 src = insn->src_reg * 2; 1113 1114 if (insn->src_reg == BPF_REG_10) { 1115 swreg stack_depth_reg; 1116 1117 stack_depth_reg = ur_load_imm_any(nfp_prog, 1118 nfp_prog->stack_depth, 1119 stack_imm(nfp_prog)); 1120 emit_alu(nfp_prog, reg_both(dst), 1121 stack_reg(nfp_prog), ALU_OP_ADD, stack_depth_reg); 1122 wrp_immed(nfp_prog, reg_both(dst + 1), 0); 1123 } else { 1124 wrp_reg_mov(nfp_prog, dst, src); 1125 wrp_reg_mov(nfp_prog, dst + 1, src + 1); 1126 } 1127 1128 return 0; 1129 } 1130 1131 static int mov_imm64(struct nfp_prog *nfp_prog, struct nfp_insn_meta *meta) 1132 { 1133 u64 imm = meta->insn.imm; /* sign extend */ 1134 1135 wrp_immed(nfp_prog, reg_both(meta->insn.dst_reg * 2), imm & ~0U); 1136 wrp_immed(nfp_prog, reg_both(meta->insn.dst_reg * 2 + 1), imm >> 32); 1137 1138 return 0; 1139 } 1140 1141 static int xor_reg64(struct nfp_prog *nfp_prog, struct nfp_insn_meta *meta) 1142 { 1143 return wrp_alu64_reg(nfp_prog, meta, ALU_OP_XOR); 1144 } 1145 1146 static int xor_imm64(struct nfp_prog *nfp_prog, struct nfp_insn_meta *meta) 1147 { 1148 return wrp_alu64_imm(nfp_prog, meta, ALU_OP_XOR, !meta->insn.imm); 1149 } 1150 1151 static int and_reg64(struct nfp_prog *nfp_prog, struct nfp_insn_meta *meta) 1152 { 1153 return wrp_alu64_reg(nfp_prog, meta, ALU_OP_AND); 1154 } 1155 1156 static int and_imm64(struct nfp_prog *nfp_prog, struct nfp_insn_meta *meta) 1157 { 1158 return wrp_alu64_imm(nfp_prog, meta, ALU_OP_AND, !~meta->insn.imm); 1159 } 1160 1161 static int or_reg64(struct nfp_prog *nfp_prog, struct nfp_insn_meta *meta) 1162 { 1163 return wrp_alu64_reg(nfp_prog, meta, ALU_OP_OR); 1164 } 1165 1166 static int or_imm64(struct nfp_prog *nfp_prog, struct nfp_insn_meta *meta) 1167 { 1168 return wrp_alu64_imm(nfp_prog, meta, ALU_OP_OR, !meta->insn.imm); 1169 } 1170 1171 static int add_reg64(struct nfp_prog *nfp_prog, struct nfp_insn_meta *meta) 1172 { 1173 const struct bpf_insn *insn = &meta->insn; 1174 1175 emit_alu(nfp_prog, reg_both(insn->dst_reg * 2), 1176 reg_a(insn->dst_reg * 2), ALU_OP_ADD, 1177 reg_b(insn->src_reg * 2)); 1178 emit_alu(nfp_prog, reg_both(insn->dst_reg * 2 + 1), 1179 reg_a(insn->dst_reg * 2 + 1), ALU_OP_ADD_C, 1180 reg_b(insn->src_reg * 2 + 1)); 1181 1182 return 0; 1183 } 1184 1185 static int add_imm64(struct nfp_prog *nfp_prog, struct nfp_insn_meta *meta) 1186 { 1187 const struct bpf_insn *insn = &meta->insn; 1188 u64 imm = insn->imm; /* sign extend */ 1189 1190 wrp_alu_imm(nfp_prog, insn->dst_reg * 2, ALU_OP_ADD, imm & ~0U); 1191 wrp_alu_imm(nfp_prog, insn->dst_reg * 2 + 1, ALU_OP_ADD_C, imm >> 32); 1192 1193 return 0; 1194 } 1195 1196 static int sub_reg64(struct nfp_prog *nfp_prog, struct nfp_insn_meta *meta) 1197 { 1198 const struct bpf_insn *insn = &meta->insn; 1199 1200 emit_alu(nfp_prog, reg_both(insn->dst_reg * 2), 1201 reg_a(insn->dst_reg * 2), ALU_OP_SUB, 1202 reg_b(insn->src_reg * 2)); 1203 emit_alu(nfp_prog, reg_both(insn->dst_reg * 2 + 1), 1204 reg_a(insn->dst_reg * 2 + 1), ALU_OP_SUB_C, 1205 reg_b(insn->src_reg * 2 + 1)); 1206 1207 return 0; 1208 } 1209 1210 static int sub_imm64(struct nfp_prog *nfp_prog, struct nfp_insn_meta *meta) 1211 { 1212 const struct bpf_insn *insn = &meta->insn; 1213 u64 imm = insn->imm; /* sign extend */ 1214 1215 wrp_alu_imm(nfp_prog, insn->dst_reg * 2, ALU_OP_SUB, imm & ~0U); 1216 wrp_alu_imm(nfp_prog, insn->dst_reg * 2 + 1, ALU_OP_SUB_C, imm >> 32); 1217 1218 return 0; 1219 } 1220 1221 static int shl_imm64(struct nfp_prog *nfp_prog, struct nfp_insn_meta *meta) 1222 { 1223 const struct bpf_insn *insn = &meta->insn; 1224 u8 dst = insn->dst_reg * 2; 1225 1226 if (insn->imm < 32) { 1227 emit_shf(nfp_prog, reg_both(dst + 1), 1228 reg_a(dst + 1), SHF_OP_NONE, reg_b(dst), 1229 SHF_SC_R_DSHF, 32 - insn->imm); 1230 emit_shf(nfp_prog, reg_both(dst), 1231 reg_none(), SHF_OP_NONE, reg_b(dst), 1232 SHF_SC_L_SHF, insn->imm); 1233 } else if (insn->imm == 32) { 1234 wrp_reg_mov(nfp_prog, dst + 1, dst); 1235 wrp_immed(nfp_prog, reg_both(dst), 0); 1236 } else if (insn->imm > 32) { 1237 emit_shf(nfp_prog, reg_both(dst + 1), 1238 reg_none(), SHF_OP_NONE, reg_b(dst), 1239 SHF_SC_L_SHF, insn->imm - 32); 1240 wrp_immed(nfp_prog, reg_both(dst), 0); 1241 } 1242 1243 return 0; 1244 } 1245 1246 static int shr_imm64(struct nfp_prog *nfp_prog, struct nfp_insn_meta *meta) 1247 { 1248 const struct bpf_insn *insn = &meta->insn; 1249 u8 dst = insn->dst_reg * 2; 1250 1251 if (insn->imm < 32) { 1252 emit_shf(nfp_prog, reg_both(dst), 1253 reg_a(dst + 1), SHF_OP_NONE, reg_b(dst), 1254 SHF_SC_R_DSHF, insn->imm); 1255 emit_shf(nfp_prog, reg_both(dst + 1), 1256 reg_none(), SHF_OP_NONE, reg_b(dst + 1), 1257 SHF_SC_R_SHF, insn->imm); 1258 } else if (insn->imm == 32) { 1259 wrp_reg_mov(nfp_prog, dst, dst + 1); 1260 wrp_immed(nfp_prog, reg_both(dst + 1), 0); 1261 } else if (insn->imm > 32) { 1262 emit_shf(nfp_prog, reg_both(dst), 1263 reg_none(), SHF_OP_NONE, reg_b(dst + 1), 1264 SHF_SC_R_SHF, insn->imm - 32); 1265 wrp_immed(nfp_prog, reg_both(dst + 1), 0); 1266 } 1267 1268 return 0; 1269 } 1270 1271 static int mov_reg(struct nfp_prog *nfp_prog, struct nfp_insn_meta *meta) 1272 { 1273 const struct bpf_insn *insn = &meta->insn; 1274 1275 wrp_reg_mov(nfp_prog, insn->dst_reg * 2, insn->src_reg * 2); 1276 wrp_immed(nfp_prog, reg_both(insn->dst_reg * 2 + 1), 0); 1277 1278 return 0; 1279 } 1280 1281 static int mov_imm(struct nfp_prog *nfp_prog, struct nfp_insn_meta *meta) 1282 { 1283 const struct bpf_insn *insn = &meta->insn; 1284 1285 wrp_immed(nfp_prog, reg_both(insn->dst_reg * 2), insn->imm); 1286 wrp_immed(nfp_prog, reg_both(insn->dst_reg * 2 + 1), 0); 1287 1288 return 0; 1289 } 1290 1291 static int xor_reg(struct nfp_prog *nfp_prog, struct nfp_insn_meta *meta) 1292 { 1293 return wrp_alu32_reg(nfp_prog, meta, ALU_OP_XOR); 1294 } 1295 1296 static int xor_imm(struct nfp_prog *nfp_prog, struct nfp_insn_meta *meta) 1297 { 1298 return wrp_alu32_imm(nfp_prog, meta, ALU_OP_XOR, !~meta->insn.imm); 1299 } 1300 1301 static int and_reg(struct nfp_prog *nfp_prog, struct nfp_insn_meta *meta) 1302 { 1303 return wrp_alu32_reg(nfp_prog, meta, ALU_OP_AND); 1304 } 1305 1306 static int and_imm(struct nfp_prog *nfp_prog, struct nfp_insn_meta *meta) 1307 { 1308 return wrp_alu32_imm(nfp_prog, meta, ALU_OP_AND, !~meta->insn.imm); 1309 } 1310 1311 static int or_reg(struct nfp_prog *nfp_prog, struct nfp_insn_meta *meta) 1312 { 1313 return wrp_alu32_reg(nfp_prog, meta, ALU_OP_OR); 1314 } 1315 1316 static int or_imm(struct nfp_prog *nfp_prog, struct nfp_insn_meta *meta) 1317 { 1318 return wrp_alu32_imm(nfp_prog, meta, ALU_OP_OR, !meta->insn.imm); 1319 } 1320 1321 static int add_reg(struct nfp_prog *nfp_prog, struct nfp_insn_meta *meta) 1322 { 1323 return wrp_alu32_reg(nfp_prog, meta, ALU_OP_ADD); 1324 } 1325 1326 static int add_imm(struct nfp_prog *nfp_prog, struct nfp_insn_meta *meta) 1327 { 1328 return wrp_alu32_imm(nfp_prog, meta, ALU_OP_ADD, !meta->insn.imm); 1329 } 1330 1331 static int sub_reg(struct nfp_prog *nfp_prog, struct nfp_insn_meta *meta) 1332 { 1333 return wrp_alu32_reg(nfp_prog, meta, ALU_OP_SUB); 1334 } 1335 1336 static int sub_imm(struct nfp_prog *nfp_prog, struct nfp_insn_meta *meta) 1337 { 1338 return wrp_alu32_imm(nfp_prog, meta, ALU_OP_SUB, !meta->insn.imm); 1339 } 1340 1341 static int shl_imm(struct nfp_prog *nfp_prog, struct nfp_insn_meta *meta) 1342 { 1343 const struct bpf_insn *insn = &meta->insn; 1344 1345 if (!insn->imm) 1346 return 1; /* TODO: zero shift means indirect */ 1347 1348 emit_shf(nfp_prog, reg_both(insn->dst_reg * 2), 1349 reg_none(), SHF_OP_NONE, reg_b(insn->dst_reg * 2), 1350 SHF_SC_L_SHF, insn->imm); 1351 wrp_immed(nfp_prog, reg_both(insn->dst_reg * 2 + 1), 0); 1352 1353 return 0; 1354 } 1355 1356 static int end_reg32(struct nfp_prog *nfp_prog, struct nfp_insn_meta *meta) 1357 { 1358 const struct bpf_insn *insn = &meta->insn; 1359 u8 gpr = insn->dst_reg * 2; 1360 1361 switch (insn->imm) { 1362 case 16: 1363 emit_ld_field(nfp_prog, reg_both(gpr), 0x9, reg_b(gpr), 1364 SHF_SC_R_ROT, 8); 1365 emit_ld_field(nfp_prog, reg_both(gpr), 0xe, reg_a(gpr), 1366 SHF_SC_R_SHF, 16); 1367 1368 wrp_immed(nfp_prog, reg_both(gpr + 1), 0); 1369 break; 1370 case 32: 1371 wrp_end32(nfp_prog, reg_a(gpr), gpr); 1372 wrp_immed(nfp_prog, reg_both(gpr + 1), 0); 1373 break; 1374 case 64: 1375 wrp_mov(nfp_prog, imm_a(nfp_prog), reg_b(gpr + 1)); 1376 1377 wrp_end32(nfp_prog, reg_a(gpr), gpr + 1); 1378 wrp_end32(nfp_prog, imm_a(nfp_prog), gpr); 1379 break; 1380 } 1381 1382 return 0; 1383 } 1384 1385 static int imm_ld8_part2(struct nfp_prog *nfp_prog, struct nfp_insn_meta *meta) 1386 { 1387 wrp_immed(nfp_prog, reg_both(nfp_meta_prev(meta)->insn.dst_reg * 2 + 1), 1388 meta->insn.imm); 1389 1390 return 0; 1391 } 1392 1393 static int imm_ld8(struct nfp_prog *nfp_prog, struct nfp_insn_meta *meta) 1394 { 1395 const struct bpf_insn *insn = &meta->insn; 1396 1397 meta->double_cb = imm_ld8_part2; 1398 wrp_immed(nfp_prog, reg_both(insn->dst_reg * 2), insn->imm); 1399 1400 return 0; 1401 } 1402 1403 static int data_ld1(struct nfp_prog *nfp_prog, struct nfp_insn_meta *meta) 1404 { 1405 return construct_data_ld(nfp_prog, meta->insn.imm, 1); 1406 } 1407 1408 static int data_ld2(struct nfp_prog *nfp_prog, struct nfp_insn_meta *meta) 1409 { 1410 return construct_data_ld(nfp_prog, meta->insn.imm, 2); 1411 } 1412 1413 static int data_ld4(struct nfp_prog *nfp_prog, struct nfp_insn_meta *meta) 1414 { 1415 return construct_data_ld(nfp_prog, meta->insn.imm, 4); 1416 } 1417 1418 static int data_ind_ld1(struct nfp_prog *nfp_prog, struct nfp_insn_meta *meta) 1419 { 1420 return construct_data_ind_ld(nfp_prog, meta->insn.imm, 1421 meta->insn.src_reg * 2, 1); 1422 } 1423 1424 static int data_ind_ld2(struct nfp_prog *nfp_prog, struct nfp_insn_meta *meta) 1425 { 1426 return construct_data_ind_ld(nfp_prog, meta->insn.imm, 1427 meta->insn.src_reg * 2, 2); 1428 } 1429 1430 static int data_ind_ld4(struct nfp_prog *nfp_prog, struct nfp_insn_meta *meta) 1431 { 1432 return construct_data_ind_ld(nfp_prog, meta->insn.imm, 1433 meta->insn.src_reg * 2, 4); 1434 } 1435 1436 static int 1437 mem_ldx_stack(struct nfp_prog *nfp_prog, struct nfp_insn_meta *meta, 1438 unsigned int size, unsigned int ptr_off) 1439 { 1440 return mem_op_stack(nfp_prog, meta, size, ptr_off, 1441 meta->insn.dst_reg * 2, meta->insn.src_reg * 2, 1442 true, wrp_lmem_load); 1443 } 1444 1445 static int mem_ldx_skb(struct nfp_prog *nfp_prog, struct nfp_insn_meta *meta, 1446 u8 size) 1447 { 1448 swreg dst = reg_both(meta->insn.dst_reg * 2); 1449 1450 switch (meta->insn.off) { 1451 case offsetof(struct sk_buff, len): 1452 if (size != FIELD_SIZEOF(struct sk_buff, len)) 1453 return -EOPNOTSUPP; 1454 wrp_mov(nfp_prog, dst, plen_reg(nfp_prog)); 1455 break; 1456 case offsetof(struct sk_buff, data): 1457 if (size != sizeof(void *)) 1458 return -EOPNOTSUPP; 1459 wrp_mov(nfp_prog, dst, pptr_reg(nfp_prog)); 1460 break; 1461 case offsetof(struct sk_buff, cb) + 1462 offsetof(struct bpf_skb_data_end, data_end): 1463 if (size != sizeof(void *)) 1464 return -EOPNOTSUPP; 1465 emit_alu(nfp_prog, dst, 1466 plen_reg(nfp_prog), ALU_OP_ADD, pptr_reg(nfp_prog)); 1467 break; 1468 default: 1469 return -EOPNOTSUPP; 1470 } 1471 1472 wrp_immed(nfp_prog, reg_both(meta->insn.dst_reg * 2 + 1), 0); 1473 1474 return 0; 1475 } 1476 1477 static int mem_ldx_xdp(struct nfp_prog *nfp_prog, struct nfp_insn_meta *meta, 1478 u8 size) 1479 { 1480 swreg dst = reg_both(meta->insn.dst_reg * 2); 1481 1482 if (size != sizeof(void *)) 1483 return -EINVAL; 1484 1485 switch (meta->insn.off) { 1486 case offsetof(struct xdp_buff, data): 1487 wrp_mov(nfp_prog, dst, pptr_reg(nfp_prog)); 1488 break; 1489 case offsetof(struct xdp_buff, data_end): 1490 emit_alu(nfp_prog, dst, 1491 plen_reg(nfp_prog), ALU_OP_ADD, pptr_reg(nfp_prog)); 1492 break; 1493 default: 1494 return -EOPNOTSUPP; 1495 } 1496 1497 wrp_immed(nfp_prog, reg_both(meta->insn.dst_reg * 2 + 1), 0); 1498 1499 return 0; 1500 } 1501 1502 static int 1503 mem_ldx_data(struct nfp_prog *nfp_prog, struct nfp_insn_meta *meta, 1504 unsigned int size) 1505 { 1506 swreg tmp_reg; 1507 1508 tmp_reg = re_load_imm_any(nfp_prog, meta->insn.off, imm_b(nfp_prog)); 1509 1510 return data_ld_host_order(nfp_prog, meta->insn.src_reg * 2, tmp_reg, 1511 meta->insn.dst_reg * 2, size); 1512 } 1513 1514 static int 1515 mem_ldx(struct nfp_prog *nfp_prog, struct nfp_insn_meta *meta, 1516 unsigned int size) 1517 { 1518 if (meta->ptr.type == PTR_TO_CTX) { 1519 if (nfp_prog->act == NN_ACT_XDP) 1520 return mem_ldx_xdp(nfp_prog, meta, size); 1521 else 1522 return mem_ldx_skb(nfp_prog, meta, size); 1523 } 1524 1525 if (meta->ptr.type == PTR_TO_PACKET) 1526 return mem_ldx_data(nfp_prog, meta, size); 1527 1528 if (meta->ptr.type == PTR_TO_STACK) 1529 return mem_ldx_stack(nfp_prog, meta, size, 1530 meta->ptr.off + meta->ptr.var_off.value); 1531 1532 return -EOPNOTSUPP; 1533 } 1534 1535 static int mem_ldx1(struct nfp_prog *nfp_prog, struct nfp_insn_meta *meta) 1536 { 1537 return mem_ldx(nfp_prog, meta, 1); 1538 } 1539 1540 static int mem_ldx2(struct nfp_prog *nfp_prog, struct nfp_insn_meta *meta) 1541 { 1542 return mem_ldx(nfp_prog, meta, 2); 1543 } 1544 1545 static int mem_ldx4(struct nfp_prog *nfp_prog, struct nfp_insn_meta *meta) 1546 { 1547 return mem_ldx(nfp_prog, meta, 4); 1548 } 1549 1550 static int mem_ldx8(struct nfp_prog *nfp_prog, struct nfp_insn_meta *meta) 1551 { 1552 return mem_ldx(nfp_prog, meta, 8); 1553 } 1554 1555 static int 1556 mem_st_data(struct nfp_prog *nfp_prog, struct nfp_insn_meta *meta, 1557 unsigned int size) 1558 { 1559 u64 imm = meta->insn.imm; /* sign extend */ 1560 swreg off_reg; 1561 1562 off_reg = re_load_imm_any(nfp_prog, meta->insn.off, imm_b(nfp_prog)); 1563 1564 return data_st_host_order(nfp_prog, meta->insn.dst_reg * 2, off_reg, 1565 imm, size); 1566 } 1567 1568 static int mem_st(struct nfp_prog *nfp_prog, struct nfp_insn_meta *meta, 1569 unsigned int size) 1570 { 1571 if (meta->ptr.type == PTR_TO_PACKET) 1572 return mem_st_data(nfp_prog, meta, size); 1573 1574 return -EOPNOTSUPP; 1575 } 1576 1577 static int mem_st1(struct nfp_prog *nfp_prog, struct nfp_insn_meta *meta) 1578 { 1579 return mem_st(nfp_prog, meta, 1); 1580 } 1581 1582 static int mem_st2(struct nfp_prog *nfp_prog, struct nfp_insn_meta *meta) 1583 { 1584 return mem_st(nfp_prog, meta, 2); 1585 } 1586 1587 static int mem_st4(struct nfp_prog *nfp_prog, struct nfp_insn_meta *meta) 1588 { 1589 return mem_st(nfp_prog, meta, 4); 1590 } 1591 1592 static int mem_st8(struct nfp_prog *nfp_prog, struct nfp_insn_meta *meta) 1593 { 1594 return mem_st(nfp_prog, meta, 8); 1595 } 1596 1597 static int 1598 mem_stx_data(struct nfp_prog *nfp_prog, struct nfp_insn_meta *meta, 1599 unsigned int size) 1600 { 1601 swreg off_reg; 1602 1603 off_reg = re_load_imm_any(nfp_prog, meta->insn.off, imm_b(nfp_prog)); 1604 1605 return data_stx_host_order(nfp_prog, meta->insn.dst_reg * 2, off_reg, 1606 meta->insn.src_reg * 2, size); 1607 } 1608 1609 static int 1610 mem_stx_stack(struct nfp_prog *nfp_prog, struct nfp_insn_meta *meta, 1611 unsigned int size, unsigned int ptr_off) 1612 { 1613 return mem_op_stack(nfp_prog, meta, size, ptr_off, 1614 meta->insn.src_reg * 2, meta->insn.dst_reg * 2, 1615 false, wrp_lmem_store); 1616 } 1617 1618 static int 1619 mem_stx(struct nfp_prog *nfp_prog, struct nfp_insn_meta *meta, 1620 unsigned int size) 1621 { 1622 if (meta->ptr.type == PTR_TO_PACKET) 1623 return mem_stx_data(nfp_prog, meta, size); 1624 1625 if (meta->ptr.type == PTR_TO_STACK) 1626 return mem_stx_stack(nfp_prog, meta, size, 1627 meta->ptr.off + meta->ptr.var_off.value); 1628 1629 return -EOPNOTSUPP; 1630 } 1631 1632 static int mem_stx1(struct nfp_prog *nfp_prog, struct nfp_insn_meta *meta) 1633 { 1634 return mem_stx(nfp_prog, meta, 1); 1635 } 1636 1637 static int mem_stx2(struct nfp_prog *nfp_prog, struct nfp_insn_meta *meta) 1638 { 1639 return mem_stx(nfp_prog, meta, 2); 1640 } 1641 1642 static int mem_stx4(struct nfp_prog *nfp_prog, struct nfp_insn_meta *meta) 1643 { 1644 return mem_stx(nfp_prog, meta, 4); 1645 } 1646 1647 static int mem_stx8(struct nfp_prog *nfp_prog, struct nfp_insn_meta *meta) 1648 { 1649 return mem_stx(nfp_prog, meta, 8); 1650 } 1651 1652 static int jump(struct nfp_prog *nfp_prog, struct nfp_insn_meta *meta) 1653 { 1654 if (meta->insn.off < 0) /* TODO */ 1655 return -EOPNOTSUPP; 1656 emit_br(nfp_prog, BR_UNC, meta->insn.off, 0); 1657 1658 return 0; 1659 } 1660 1661 static int jeq_imm(struct nfp_prog *nfp_prog, struct nfp_insn_meta *meta) 1662 { 1663 const struct bpf_insn *insn = &meta->insn; 1664 u64 imm = insn->imm; /* sign extend */ 1665 swreg or1, or2, tmp_reg; 1666 1667 or1 = reg_a(insn->dst_reg * 2); 1668 or2 = reg_b(insn->dst_reg * 2 + 1); 1669 1670 if (insn->off < 0) /* TODO */ 1671 return -EOPNOTSUPP; 1672 1673 if (imm & ~0U) { 1674 tmp_reg = ur_load_imm_any(nfp_prog, imm & ~0U, imm_b(nfp_prog)); 1675 emit_alu(nfp_prog, imm_a(nfp_prog), 1676 reg_a(insn->dst_reg * 2), ALU_OP_XOR, tmp_reg); 1677 or1 = imm_a(nfp_prog); 1678 } 1679 1680 if (imm >> 32) { 1681 tmp_reg = ur_load_imm_any(nfp_prog, imm >> 32, imm_b(nfp_prog)); 1682 emit_alu(nfp_prog, imm_b(nfp_prog), 1683 reg_a(insn->dst_reg * 2 + 1), ALU_OP_XOR, tmp_reg); 1684 or2 = imm_b(nfp_prog); 1685 } 1686 1687 emit_alu(nfp_prog, reg_none(), or1, ALU_OP_OR, or2); 1688 emit_br(nfp_prog, BR_BEQ, insn->off, 0); 1689 1690 return 0; 1691 } 1692 1693 static int jgt_imm(struct nfp_prog *nfp_prog, struct nfp_insn_meta *meta) 1694 { 1695 return wrp_cmp_imm(nfp_prog, meta, BR_BLO, true); 1696 } 1697 1698 static int jge_imm(struct nfp_prog *nfp_prog, struct nfp_insn_meta *meta) 1699 { 1700 return wrp_cmp_imm(nfp_prog, meta, BR_BHS, false); 1701 } 1702 1703 static int jlt_imm(struct nfp_prog *nfp_prog, struct nfp_insn_meta *meta) 1704 { 1705 return wrp_cmp_imm(nfp_prog, meta, BR_BLO, false); 1706 } 1707 1708 static int jle_imm(struct nfp_prog *nfp_prog, struct nfp_insn_meta *meta) 1709 { 1710 return wrp_cmp_imm(nfp_prog, meta, BR_BHS, true); 1711 } 1712 1713 static int jset_imm(struct nfp_prog *nfp_prog, struct nfp_insn_meta *meta) 1714 { 1715 const struct bpf_insn *insn = &meta->insn; 1716 u64 imm = insn->imm; /* sign extend */ 1717 swreg tmp_reg; 1718 1719 if (insn->off < 0) /* TODO */ 1720 return -EOPNOTSUPP; 1721 1722 if (!imm) { 1723 meta->skip = true; 1724 return 0; 1725 } 1726 1727 if (imm & ~0U) { 1728 tmp_reg = ur_load_imm_any(nfp_prog, imm & ~0U, imm_b(nfp_prog)); 1729 emit_alu(nfp_prog, reg_none(), 1730 reg_a(insn->dst_reg * 2), ALU_OP_AND, tmp_reg); 1731 emit_br(nfp_prog, BR_BNE, insn->off, 0); 1732 } 1733 1734 if (imm >> 32) { 1735 tmp_reg = ur_load_imm_any(nfp_prog, imm >> 32, imm_b(nfp_prog)); 1736 emit_alu(nfp_prog, reg_none(), 1737 reg_a(insn->dst_reg * 2 + 1), ALU_OP_AND, tmp_reg); 1738 emit_br(nfp_prog, BR_BNE, insn->off, 0); 1739 } 1740 1741 return 0; 1742 } 1743 1744 static int jne_imm(struct nfp_prog *nfp_prog, struct nfp_insn_meta *meta) 1745 { 1746 const struct bpf_insn *insn = &meta->insn; 1747 u64 imm = insn->imm; /* sign extend */ 1748 swreg tmp_reg; 1749 1750 if (insn->off < 0) /* TODO */ 1751 return -EOPNOTSUPP; 1752 1753 if (!imm) { 1754 emit_alu(nfp_prog, reg_none(), reg_a(insn->dst_reg * 2), 1755 ALU_OP_OR, reg_b(insn->dst_reg * 2 + 1)); 1756 emit_br(nfp_prog, BR_BNE, insn->off, 0); 1757 return 0; 1758 } 1759 1760 tmp_reg = ur_load_imm_any(nfp_prog, imm & ~0U, imm_b(nfp_prog)); 1761 emit_alu(nfp_prog, reg_none(), 1762 reg_a(insn->dst_reg * 2), ALU_OP_XOR, tmp_reg); 1763 emit_br(nfp_prog, BR_BNE, insn->off, 0); 1764 1765 tmp_reg = ur_load_imm_any(nfp_prog, imm >> 32, imm_b(nfp_prog)); 1766 emit_alu(nfp_prog, reg_none(), 1767 reg_a(insn->dst_reg * 2 + 1), ALU_OP_XOR, tmp_reg); 1768 emit_br(nfp_prog, BR_BNE, insn->off, 0); 1769 1770 return 0; 1771 } 1772 1773 static int jeq_reg(struct nfp_prog *nfp_prog, struct nfp_insn_meta *meta) 1774 { 1775 const struct bpf_insn *insn = &meta->insn; 1776 1777 if (insn->off < 0) /* TODO */ 1778 return -EOPNOTSUPP; 1779 1780 emit_alu(nfp_prog, imm_a(nfp_prog), reg_a(insn->dst_reg * 2), 1781 ALU_OP_XOR, reg_b(insn->src_reg * 2)); 1782 emit_alu(nfp_prog, imm_b(nfp_prog), reg_a(insn->dst_reg * 2 + 1), 1783 ALU_OP_XOR, reg_b(insn->src_reg * 2 + 1)); 1784 emit_alu(nfp_prog, reg_none(), 1785 imm_a(nfp_prog), ALU_OP_OR, imm_b(nfp_prog)); 1786 emit_br(nfp_prog, BR_BEQ, insn->off, 0); 1787 1788 return 0; 1789 } 1790 1791 static int jgt_reg(struct nfp_prog *nfp_prog, struct nfp_insn_meta *meta) 1792 { 1793 return wrp_cmp_reg(nfp_prog, meta, BR_BLO, true); 1794 } 1795 1796 static int jge_reg(struct nfp_prog *nfp_prog, struct nfp_insn_meta *meta) 1797 { 1798 return wrp_cmp_reg(nfp_prog, meta, BR_BHS, false); 1799 } 1800 1801 static int jlt_reg(struct nfp_prog *nfp_prog, struct nfp_insn_meta *meta) 1802 { 1803 return wrp_cmp_reg(nfp_prog, meta, BR_BLO, false); 1804 } 1805 1806 static int jle_reg(struct nfp_prog *nfp_prog, struct nfp_insn_meta *meta) 1807 { 1808 return wrp_cmp_reg(nfp_prog, meta, BR_BHS, true); 1809 } 1810 1811 static int jset_reg(struct nfp_prog *nfp_prog, struct nfp_insn_meta *meta) 1812 { 1813 return wrp_test_reg(nfp_prog, meta, ALU_OP_AND, BR_BNE); 1814 } 1815 1816 static int jne_reg(struct nfp_prog *nfp_prog, struct nfp_insn_meta *meta) 1817 { 1818 return wrp_test_reg(nfp_prog, meta, ALU_OP_XOR, BR_BNE); 1819 } 1820 1821 static int goto_out(struct nfp_prog *nfp_prog, struct nfp_insn_meta *meta) 1822 { 1823 wrp_br_special(nfp_prog, BR_UNC, OP_BR_GO_OUT); 1824 1825 return 0; 1826 } 1827 1828 static const instr_cb_t instr_cb[256] = { 1829 [BPF_ALU64 | BPF_MOV | BPF_X] = mov_reg64, 1830 [BPF_ALU64 | BPF_MOV | BPF_K] = mov_imm64, 1831 [BPF_ALU64 | BPF_XOR | BPF_X] = xor_reg64, 1832 [BPF_ALU64 | BPF_XOR | BPF_K] = xor_imm64, 1833 [BPF_ALU64 | BPF_AND | BPF_X] = and_reg64, 1834 [BPF_ALU64 | BPF_AND | BPF_K] = and_imm64, 1835 [BPF_ALU64 | BPF_OR | BPF_X] = or_reg64, 1836 [BPF_ALU64 | BPF_OR | BPF_K] = or_imm64, 1837 [BPF_ALU64 | BPF_ADD | BPF_X] = add_reg64, 1838 [BPF_ALU64 | BPF_ADD | BPF_K] = add_imm64, 1839 [BPF_ALU64 | BPF_SUB | BPF_X] = sub_reg64, 1840 [BPF_ALU64 | BPF_SUB | BPF_K] = sub_imm64, 1841 [BPF_ALU64 | BPF_LSH | BPF_K] = shl_imm64, 1842 [BPF_ALU64 | BPF_RSH | BPF_K] = shr_imm64, 1843 [BPF_ALU | BPF_MOV | BPF_X] = mov_reg, 1844 [BPF_ALU | BPF_MOV | BPF_K] = mov_imm, 1845 [BPF_ALU | BPF_XOR | BPF_X] = xor_reg, 1846 [BPF_ALU | BPF_XOR | BPF_K] = xor_imm, 1847 [BPF_ALU | BPF_AND | BPF_X] = and_reg, 1848 [BPF_ALU | BPF_AND | BPF_K] = and_imm, 1849 [BPF_ALU | BPF_OR | BPF_X] = or_reg, 1850 [BPF_ALU | BPF_OR | BPF_K] = or_imm, 1851 [BPF_ALU | BPF_ADD | BPF_X] = add_reg, 1852 [BPF_ALU | BPF_ADD | BPF_K] = add_imm, 1853 [BPF_ALU | BPF_SUB | BPF_X] = sub_reg, 1854 [BPF_ALU | BPF_SUB | BPF_K] = sub_imm, 1855 [BPF_ALU | BPF_LSH | BPF_K] = shl_imm, 1856 [BPF_ALU | BPF_END | BPF_X] = end_reg32, 1857 [BPF_LD | BPF_IMM | BPF_DW] = imm_ld8, 1858 [BPF_LD | BPF_ABS | BPF_B] = data_ld1, 1859 [BPF_LD | BPF_ABS | BPF_H] = data_ld2, 1860 [BPF_LD | BPF_ABS | BPF_W] = data_ld4, 1861 [BPF_LD | BPF_IND | BPF_B] = data_ind_ld1, 1862 [BPF_LD | BPF_IND | BPF_H] = data_ind_ld2, 1863 [BPF_LD | BPF_IND | BPF_W] = data_ind_ld4, 1864 [BPF_LDX | BPF_MEM | BPF_B] = mem_ldx1, 1865 [BPF_LDX | BPF_MEM | BPF_H] = mem_ldx2, 1866 [BPF_LDX | BPF_MEM | BPF_W] = mem_ldx4, 1867 [BPF_LDX | BPF_MEM | BPF_DW] = mem_ldx8, 1868 [BPF_STX | BPF_MEM | BPF_B] = mem_stx1, 1869 [BPF_STX | BPF_MEM | BPF_H] = mem_stx2, 1870 [BPF_STX | BPF_MEM | BPF_W] = mem_stx4, 1871 [BPF_STX | BPF_MEM | BPF_DW] = mem_stx8, 1872 [BPF_ST | BPF_MEM | BPF_B] = mem_st1, 1873 [BPF_ST | BPF_MEM | BPF_H] = mem_st2, 1874 [BPF_ST | BPF_MEM | BPF_W] = mem_st4, 1875 [BPF_ST | BPF_MEM | BPF_DW] = mem_st8, 1876 [BPF_JMP | BPF_JA | BPF_K] = jump, 1877 [BPF_JMP | BPF_JEQ | BPF_K] = jeq_imm, 1878 [BPF_JMP | BPF_JGT | BPF_K] = jgt_imm, 1879 [BPF_JMP | BPF_JGE | BPF_K] = jge_imm, 1880 [BPF_JMP | BPF_JLT | BPF_K] = jlt_imm, 1881 [BPF_JMP | BPF_JLE | BPF_K] = jle_imm, 1882 [BPF_JMP | BPF_JSET | BPF_K] = jset_imm, 1883 [BPF_JMP | BPF_JNE | BPF_K] = jne_imm, 1884 [BPF_JMP | BPF_JEQ | BPF_X] = jeq_reg, 1885 [BPF_JMP | BPF_JGT | BPF_X] = jgt_reg, 1886 [BPF_JMP | BPF_JGE | BPF_X] = jge_reg, 1887 [BPF_JMP | BPF_JLT | BPF_X] = jlt_reg, 1888 [BPF_JMP | BPF_JLE | BPF_X] = jle_reg, 1889 [BPF_JMP | BPF_JSET | BPF_X] = jset_reg, 1890 [BPF_JMP | BPF_JNE | BPF_X] = jne_reg, 1891 [BPF_JMP | BPF_EXIT] = goto_out, 1892 }; 1893 1894 /* --- Misc code --- */ 1895 static void br_set_offset(u64 *instr, u16 offset) 1896 { 1897 u16 addr_lo, addr_hi; 1898 1899 addr_lo = offset & (OP_BR_ADDR_LO >> __bf_shf(OP_BR_ADDR_LO)); 1900 addr_hi = offset != addr_lo; 1901 *instr &= ~(OP_BR_ADDR_HI | OP_BR_ADDR_LO); 1902 *instr |= FIELD_PREP(OP_BR_ADDR_HI, addr_hi); 1903 *instr |= FIELD_PREP(OP_BR_ADDR_LO, addr_lo); 1904 } 1905 1906 /* --- Assembler logic --- */ 1907 static int nfp_fixup_branches(struct nfp_prog *nfp_prog) 1908 { 1909 struct nfp_insn_meta *meta, *next; 1910 u32 off, br_idx; 1911 u32 idx; 1912 1913 nfp_for_each_insn_walk2(nfp_prog, meta, next) { 1914 if (meta->skip) 1915 continue; 1916 if (BPF_CLASS(meta->insn.code) != BPF_JMP) 1917 continue; 1918 1919 br_idx = nfp_prog_offset_to_index(nfp_prog, next->off) - 1; 1920 if (!nfp_is_br(nfp_prog->prog[br_idx])) { 1921 pr_err("Fixup found block not ending in branch %d %02x %016llx!!\n", 1922 br_idx, meta->insn.code, nfp_prog->prog[br_idx]); 1923 return -ELOOP; 1924 } 1925 /* Leave special branches for later */ 1926 if (FIELD_GET(OP_BR_SPECIAL, nfp_prog->prog[br_idx])) 1927 continue; 1928 1929 /* Find the target offset in assembler realm */ 1930 off = meta->insn.off; 1931 if (!off) { 1932 pr_err("Fixup found zero offset!!\n"); 1933 return -ELOOP; 1934 } 1935 1936 while (off && nfp_meta_has_next(nfp_prog, next)) { 1937 next = nfp_meta_next(next); 1938 off--; 1939 } 1940 if (off) { 1941 pr_err("Fixup found too large jump!! %d\n", off); 1942 return -ELOOP; 1943 } 1944 1945 if (next->skip) { 1946 pr_err("Branch landing on removed instruction!!\n"); 1947 return -ELOOP; 1948 } 1949 1950 for (idx = nfp_prog_offset_to_index(nfp_prog, meta->off); 1951 idx <= br_idx; idx++) { 1952 if (!nfp_is_br(nfp_prog->prog[idx])) 1953 continue; 1954 br_set_offset(&nfp_prog->prog[idx], next->off); 1955 } 1956 } 1957 1958 /* Fixup 'goto out's separately, they can be scattered around */ 1959 for (br_idx = 0; br_idx < nfp_prog->prog_len; br_idx++) { 1960 enum br_special special; 1961 1962 if ((nfp_prog->prog[br_idx] & OP_BR_BASE_MASK) != OP_BR_BASE) 1963 continue; 1964 1965 special = FIELD_GET(OP_BR_SPECIAL, nfp_prog->prog[br_idx]); 1966 switch (special) { 1967 case OP_BR_NORMAL: 1968 break; 1969 case OP_BR_GO_OUT: 1970 br_set_offset(&nfp_prog->prog[br_idx], 1971 nfp_prog->tgt_out); 1972 break; 1973 case OP_BR_GO_ABORT: 1974 br_set_offset(&nfp_prog->prog[br_idx], 1975 nfp_prog->tgt_abort); 1976 break; 1977 } 1978 1979 nfp_prog->prog[br_idx] &= ~OP_BR_SPECIAL; 1980 } 1981 1982 return 0; 1983 } 1984 1985 static void nfp_intro(struct nfp_prog *nfp_prog) 1986 { 1987 wrp_immed(nfp_prog, plen_reg(nfp_prog), GENMASK(13, 0)); 1988 emit_alu(nfp_prog, plen_reg(nfp_prog), 1989 plen_reg(nfp_prog), ALU_OP_AND, pv_len(nfp_prog)); 1990 } 1991 1992 static void nfp_outro_tc_legacy(struct nfp_prog *nfp_prog) 1993 { 1994 const u8 act2code[] = { 1995 [NN_ACT_TC_DROP] = 0x22, 1996 [NN_ACT_TC_REDIR] = 0x24 1997 }; 1998 /* Target for aborts */ 1999 nfp_prog->tgt_abort = nfp_prog_current_offset(nfp_prog); 2000 wrp_immed(nfp_prog, reg_both(0), 0); 2001 2002 /* Target for normal exits */ 2003 nfp_prog->tgt_out = nfp_prog_current_offset(nfp_prog); 2004 /* Legacy TC mode: 2005 * 0 0x11 -> pass, count as stat0 2006 * -1 drop 0x22 -> drop, count as stat1 2007 * redir 0x24 -> redir, count as stat1 2008 * ife mark 0x21 -> pass, count as stat1 2009 * ife + tx 0x24 -> redir, count as stat1 2010 */ 2011 emit_br_byte_neq(nfp_prog, reg_b(0), 0xff, 0, nfp_prog->tgt_done, 2); 2012 wrp_mov(nfp_prog, reg_a(0), NFP_BPF_ABI_FLAGS); 2013 emit_ld_field(nfp_prog, reg_a(0), 0xc, reg_imm(0x11), SHF_SC_L_SHF, 16); 2014 2015 emit_br(nfp_prog, BR_UNC, nfp_prog->tgt_done, 1); 2016 emit_ld_field(nfp_prog, reg_a(0), 0xc, reg_imm(act2code[nfp_prog->act]), 2017 SHF_SC_L_SHF, 16); 2018 } 2019 2020 static void nfp_outro_tc_da(struct nfp_prog *nfp_prog) 2021 { 2022 /* TC direct-action mode: 2023 * 0,1 ok NOT SUPPORTED[1] 2024 * 2 drop 0x22 -> drop, count as stat1 2025 * 4,5 nuke 0x02 -> drop 2026 * 7 redir 0x44 -> redir, count as stat2 2027 * * unspec 0x11 -> pass, count as stat0 2028 * 2029 * [1] We can't support OK and RECLASSIFY because we can't tell TC 2030 * the exact decision made. We are forced to support UNSPEC 2031 * to handle aborts so that's the only one we handle for passing 2032 * packets up the stack. 2033 */ 2034 /* Target for aborts */ 2035 nfp_prog->tgt_abort = nfp_prog_current_offset(nfp_prog); 2036 2037 emit_br_def(nfp_prog, nfp_prog->tgt_done, 2); 2038 2039 wrp_mov(nfp_prog, reg_a(0), NFP_BPF_ABI_FLAGS); 2040 emit_ld_field(nfp_prog, reg_a(0), 0xc, reg_imm(0x11), SHF_SC_L_SHF, 16); 2041 2042 /* Target for normal exits */ 2043 nfp_prog->tgt_out = nfp_prog_current_offset(nfp_prog); 2044 2045 /* if R0 > 7 jump to abort */ 2046 emit_alu(nfp_prog, reg_none(), reg_imm(7), ALU_OP_SUB, reg_b(0)); 2047 emit_br(nfp_prog, BR_BLO, nfp_prog->tgt_abort, 0); 2048 wrp_mov(nfp_prog, reg_a(0), NFP_BPF_ABI_FLAGS); 2049 2050 wrp_immed(nfp_prog, reg_b(2), 0x41221211); 2051 wrp_immed(nfp_prog, reg_b(3), 0x41001211); 2052 2053 emit_shf(nfp_prog, reg_a(1), 2054 reg_none(), SHF_OP_NONE, reg_b(0), SHF_SC_L_SHF, 2); 2055 2056 emit_alu(nfp_prog, reg_none(), reg_a(1), ALU_OP_OR, reg_imm(0)); 2057 emit_shf(nfp_prog, reg_a(2), 2058 reg_imm(0xf), SHF_OP_AND, reg_b(2), SHF_SC_R_SHF, 0); 2059 2060 emit_alu(nfp_prog, reg_none(), reg_a(1), ALU_OP_OR, reg_imm(0)); 2061 emit_shf(nfp_prog, reg_b(2), 2062 reg_imm(0xf), SHF_OP_AND, reg_b(3), SHF_SC_R_SHF, 0); 2063 2064 emit_br_def(nfp_prog, nfp_prog->tgt_done, 2); 2065 2066 emit_shf(nfp_prog, reg_b(2), 2067 reg_a(2), SHF_OP_OR, reg_b(2), SHF_SC_L_SHF, 4); 2068 emit_ld_field(nfp_prog, reg_a(0), 0xc, reg_b(2), SHF_SC_L_SHF, 16); 2069 } 2070 2071 static void nfp_outro_xdp(struct nfp_prog *nfp_prog) 2072 { 2073 /* XDP return codes: 2074 * 0 aborted 0x82 -> drop, count as stat3 2075 * 1 drop 0x22 -> drop, count as stat1 2076 * 2 pass 0x11 -> pass, count as stat0 2077 * 3 tx 0x44 -> redir, count as stat2 2078 * * unknown 0x82 -> drop, count as stat3 2079 */ 2080 /* Target for aborts */ 2081 nfp_prog->tgt_abort = nfp_prog_current_offset(nfp_prog); 2082 2083 emit_br_def(nfp_prog, nfp_prog->tgt_done, 2); 2084 2085 wrp_mov(nfp_prog, reg_a(0), NFP_BPF_ABI_FLAGS); 2086 emit_ld_field(nfp_prog, reg_a(0), 0xc, reg_imm(0x82), SHF_SC_L_SHF, 16); 2087 2088 /* Target for normal exits */ 2089 nfp_prog->tgt_out = nfp_prog_current_offset(nfp_prog); 2090 2091 /* if R0 > 3 jump to abort */ 2092 emit_alu(nfp_prog, reg_none(), reg_imm(3), ALU_OP_SUB, reg_b(0)); 2093 emit_br(nfp_prog, BR_BLO, nfp_prog->tgt_abort, 0); 2094 2095 wrp_immed(nfp_prog, reg_b(2), 0x44112282); 2096 2097 emit_shf(nfp_prog, reg_a(1), 2098 reg_none(), SHF_OP_NONE, reg_b(0), SHF_SC_L_SHF, 3); 2099 2100 emit_alu(nfp_prog, reg_none(), reg_a(1), ALU_OP_OR, reg_imm(0)); 2101 emit_shf(nfp_prog, reg_b(2), 2102 reg_imm(0xff), SHF_OP_AND, reg_b(2), SHF_SC_R_SHF, 0); 2103 2104 emit_br_def(nfp_prog, nfp_prog->tgt_done, 2); 2105 2106 wrp_mov(nfp_prog, reg_a(0), NFP_BPF_ABI_FLAGS); 2107 emit_ld_field(nfp_prog, reg_a(0), 0xc, reg_b(2), SHF_SC_L_SHF, 16); 2108 } 2109 2110 static void nfp_outro(struct nfp_prog *nfp_prog) 2111 { 2112 switch (nfp_prog->act) { 2113 case NN_ACT_DIRECT: 2114 nfp_outro_tc_da(nfp_prog); 2115 break; 2116 case NN_ACT_TC_DROP: 2117 case NN_ACT_TC_REDIR: 2118 nfp_outro_tc_legacy(nfp_prog); 2119 break; 2120 case NN_ACT_XDP: 2121 nfp_outro_xdp(nfp_prog); 2122 break; 2123 } 2124 } 2125 2126 static int nfp_translate(struct nfp_prog *nfp_prog) 2127 { 2128 struct nfp_insn_meta *meta; 2129 int err; 2130 2131 nfp_intro(nfp_prog); 2132 if (nfp_prog->error) 2133 return nfp_prog->error; 2134 2135 list_for_each_entry(meta, &nfp_prog->insns, l) { 2136 instr_cb_t cb = instr_cb[meta->insn.code]; 2137 2138 meta->off = nfp_prog_current_offset(nfp_prog); 2139 2140 if (meta->skip) { 2141 nfp_prog->n_translated++; 2142 continue; 2143 } 2144 2145 if (nfp_meta_has_prev(nfp_prog, meta) && 2146 nfp_meta_prev(meta)->double_cb) 2147 cb = nfp_meta_prev(meta)->double_cb; 2148 if (!cb) 2149 return -ENOENT; 2150 err = cb(nfp_prog, meta); 2151 if (err) 2152 return err; 2153 2154 nfp_prog->n_translated++; 2155 } 2156 2157 nfp_outro(nfp_prog); 2158 if (nfp_prog->error) 2159 return nfp_prog->error; 2160 2161 wrp_nops(nfp_prog, NFP_USTORE_PREFETCH_WINDOW); 2162 if (nfp_prog->error) 2163 return nfp_prog->error; 2164 2165 return nfp_fixup_branches(nfp_prog); 2166 } 2167 2168 static int 2169 nfp_prog_prepare(struct nfp_prog *nfp_prog, const struct bpf_insn *prog, 2170 unsigned int cnt) 2171 { 2172 unsigned int i; 2173 2174 for (i = 0; i < cnt; i++) { 2175 struct nfp_insn_meta *meta; 2176 2177 meta = kzalloc(sizeof(*meta), GFP_KERNEL); 2178 if (!meta) 2179 return -ENOMEM; 2180 2181 meta->insn = prog[i]; 2182 meta->n = i; 2183 2184 list_add_tail(&meta->l, &nfp_prog->insns); 2185 } 2186 2187 return 0; 2188 } 2189 2190 /* --- Optimizations --- */ 2191 static void nfp_bpf_opt_reg_init(struct nfp_prog *nfp_prog) 2192 { 2193 struct nfp_insn_meta *meta; 2194 2195 list_for_each_entry(meta, &nfp_prog->insns, l) { 2196 struct bpf_insn insn = meta->insn; 2197 2198 /* Programs converted from cBPF start with register xoring */ 2199 if (insn.code == (BPF_ALU64 | BPF_XOR | BPF_X) && 2200 insn.src_reg == insn.dst_reg) 2201 continue; 2202 2203 /* Programs start with R6 = R1 but we ignore the skb pointer */ 2204 if (insn.code == (BPF_ALU64 | BPF_MOV | BPF_X) && 2205 insn.src_reg == 1 && insn.dst_reg == 6) 2206 meta->skip = true; 2207 2208 /* Return as soon as something doesn't match */ 2209 if (!meta->skip) 2210 return; 2211 } 2212 } 2213 2214 /* Remove masking after load since our load guarantees this is not needed */ 2215 static void nfp_bpf_opt_ld_mask(struct nfp_prog *nfp_prog) 2216 { 2217 struct nfp_insn_meta *meta1, *meta2; 2218 const s32 exp_mask[] = { 2219 [BPF_B] = 0x000000ffU, 2220 [BPF_H] = 0x0000ffffU, 2221 [BPF_W] = 0xffffffffU, 2222 }; 2223 2224 nfp_for_each_insn_walk2(nfp_prog, meta1, meta2) { 2225 struct bpf_insn insn, next; 2226 2227 insn = meta1->insn; 2228 next = meta2->insn; 2229 2230 if (BPF_CLASS(insn.code) != BPF_LD) 2231 continue; 2232 if (BPF_MODE(insn.code) != BPF_ABS && 2233 BPF_MODE(insn.code) != BPF_IND) 2234 continue; 2235 2236 if (next.code != (BPF_ALU64 | BPF_AND | BPF_K)) 2237 continue; 2238 2239 if (!exp_mask[BPF_SIZE(insn.code)]) 2240 continue; 2241 if (exp_mask[BPF_SIZE(insn.code)] != next.imm) 2242 continue; 2243 2244 if (next.src_reg || next.dst_reg) 2245 continue; 2246 2247 meta2->skip = true; 2248 } 2249 } 2250 2251 static void nfp_bpf_opt_ld_shift(struct nfp_prog *nfp_prog) 2252 { 2253 struct nfp_insn_meta *meta1, *meta2, *meta3; 2254 2255 nfp_for_each_insn_walk3(nfp_prog, meta1, meta2, meta3) { 2256 struct bpf_insn insn, next1, next2; 2257 2258 insn = meta1->insn; 2259 next1 = meta2->insn; 2260 next2 = meta3->insn; 2261 2262 if (BPF_CLASS(insn.code) != BPF_LD) 2263 continue; 2264 if (BPF_MODE(insn.code) != BPF_ABS && 2265 BPF_MODE(insn.code) != BPF_IND) 2266 continue; 2267 if (BPF_SIZE(insn.code) != BPF_W) 2268 continue; 2269 2270 if (!(next1.code == (BPF_LSH | BPF_K | BPF_ALU64) && 2271 next2.code == (BPF_RSH | BPF_K | BPF_ALU64)) && 2272 !(next1.code == (BPF_RSH | BPF_K | BPF_ALU64) && 2273 next2.code == (BPF_LSH | BPF_K | BPF_ALU64))) 2274 continue; 2275 2276 if (next1.src_reg || next1.dst_reg || 2277 next2.src_reg || next2.dst_reg) 2278 continue; 2279 2280 if (next1.imm != 0x20 || next2.imm != 0x20) 2281 continue; 2282 2283 meta2->skip = true; 2284 meta3->skip = true; 2285 } 2286 } 2287 2288 static int nfp_bpf_optimize(struct nfp_prog *nfp_prog) 2289 { 2290 nfp_bpf_opt_reg_init(nfp_prog); 2291 2292 nfp_bpf_opt_ld_mask(nfp_prog); 2293 nfp_bpf_opt_ld_shift(nfp_prog); 2294 2295 return 0; 2296 } 2297 2298 static int nfp_bpf_ustore_calc(struct nfp_prog *nfp_prog, __le64 *ustore) 2299 { 2300 int i; 2301 2302 for (i = 0; i < nfp_prog->prog_len; i++) { 2303 int err; 2304 2305 err = nfp_ustore_check_valid_no_ecc(nfp_prog->prog[i]); 2306 if (err) 2307 return err; 2308 2309 nfp_prog->prog[i] = nfp_ustore_calc_ecc_insn(nfp_prog->prog[i]); 2310 2311 ustore[i] = cpu_to_le64(nfp_prog->prog[i]); 2312 } 2313 2314 return 0; 2315 } 2316 2317 /** 2318 * nfp_bpf_jit() - translate BPF code into NFP assembly 2319 * @filter: kernel BPF filter struct 2320 * @prog_mem: memory to store assembler instructions 2321 * @act: action attached to this eBPF program 2322 * @prog_start: offset of the first instruction when loaded 2323 * @prog_done: where to jump on exit 2324 * @prog_sz: size of @prog_mem in instructions 2325 * @res: achieved parameters of translation results 2326 */ 2327 int 2328 nfp_bpf_jit(struct bpf_prog *filter, void *prog_mem, 2329 enum nfp_bpf_action_type act, 2330 unsigned int prog_start, unsigned int prog_done, 2331 unsigned int prog_sz, struct nfp_bpf_result *res) 2332 { 2333 struct nfp_prog *nfp_prog; 2334 int ret; 2335 2336 nfp_prog = kzalloc(sizeof(*nfp_prog), GFP_KERNEL); 2337 if (!nfp_prog) 2338 return -ENOMEM; 2339 2340 INIT_LIST_HEAD(&nfp_prog->insns); 2341 nfp_prog->act = act; 2342 nfp_prog->start_off = prog_start; 2343 nfp_prog->tgt_done = prog_done; 2344 2345 ret = nfp_prog_prepare(nfp_prog, filter->insnsi, filter->len); 2346 if (ret) 2347 goto out; 2348 2349 ret = nfp_prog_verify(nfp_prog, filter); 2350 if (ret) 2351 goto out; 2352 2353 ret = nfp_bpf_optimize(nfp_prog); 2354 if (ret) 2355 goto out; 2356 2357 nfp_prog->num_regs = MAX_BPF_REG; 2358 nfp_prog->regs_per_thread = 32; 2359 2360 nfp_prog->prog = prog_mem; 2361 nfp_prog->__prog_alloc_len = prog_sz; 2362 2363 ret = nfp_translate(nfp_prog); 2364 if (ret) { 2365 pr_err("Translation failed with error %d (translated: %u)\n", 2366 ret, nfp_prog->n_translated); 2367 ret = -EINVAL; 2368 goto out; 2369 } 2370 2371 ret = nfp_bpf_ustore_calc(nfp_prog, (__force __le64 *)prog_mem); 2372 2373 res->n_instr = nfp_prog->prog_len; 2374 res->dense_mode = false; 2375 out: 2376 nfp_prog_free(nfp_prog); 2377 2378 return ret; 2379 } 2380