1 /* 2 * Copyright (C) 2016 Netronome Systems, Inc. 3 * 4 * This software is dual licensed under the GNU General License Version 2, 5 * June 1991 as shown in the file COPYING in the top-level directory of this 6 * source tree or the BSD 2-Clause License provided below. You have the 7 * option to license this software under the complete terms of either license. 8 * 9 * The BSD 2-Clause License: 10 * 11 * Redistribution and use in source and binary forms, with or 12 * without modification, are permitted provided that the following 13 * conditions are met: 14 * 15 * 1. Redistributions of source code must retain the above 16 * copyright notice, this list of conditions and the following 17 * disclaimer. 18 * 19 * 2. Redistributions in binary form must reproduce the above 20 * copyright notice, this list of conditions and the following 21 * disclaimer in the documentation and/or other materials 22 * provided with the distribution. 23 * 24 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, 25 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF 26 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND 27 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS 28 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN 29 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN 30 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE 31 * SOFTWARE. 32 */ 33 34 #define pr_fmt(fmt) "NFP net bpf: " fmt 35 36 #include <linux/kernel.h> 37 #include <linux/bpf.h> 38 #include <linux/filter.h> 39 #include <linux/pkt_cls.h> 40 #include <linux/unistd.h> 41 42 #include "main.h" 43 #include "../nfp_asm.h" 44 45 /* --- NFP prog --- */ 46 /* Foreach "multiple" entries macros provide pos and next<n> pointers. 47 * It's safe to modify the next pointers (but not pos). 48 */ 49 #define nfp_for_each_insn_walk2(nfp_prog, pos, next) \ 50 for (pos = list_first_entry(&(nfp_prog)->insns, typeof(*pos), l), \ 51 next = list_next_entry(pos, l); \ 52 &(nfp_prog)->insns != &pos->l && \ 53 &(nfp_prog)->insns != &next->l; \ 54 pos = nfp_meta_next(pos), \ 55 next = nfp_meta_next(pos)) 56 57 #define nfp_for_each_insn_walk3(nfp_prog, pos, next, next2) \ 58 for (pos = list_first_entry(&(nfp_prog)->insns, typeof(*pos), l), \ 59 next = list_next_entry(pos, l), \ 60 next2 = list_next_entry(next, l); \ 61 &(nfp_prog)->insns != &pos->l && \ 62 &(nfp_prog)->insns != &next->l && \ 63 &(nfp_prog)->insns != &next2->l; \ 64 pos = nfp_meta_next(pos), \ 65 next = nfp_meta_next(pos), \ 66 next2 = nfp_meta_next(next)) 67 68 static bool 69 nfp_meta_has_next(struct nfp_prog *nfp_prog, struct nfp_insn_meta *meta) 70 { 71 return meta->l.next != &nfp_prog->insns; 72 } 73 74 static bool 75 nfp_meta_has_prev(struct nfp_prog *nfp_prog, struct nfp_insn_meta *meta) 76 { 77 return meta->l.prev != &nfp_prog->insns; 78 } 79 80 static void nfp_prog_free(struct nfp_prog *nfp_prog) 81 { 82 struct nfp_insn_meta *meta, *tmp; 83 84 list_for_each_entry_safe(meta, tmp, &nfp_prog->insns, l) { 85 list_del(&meta->l); 86 kfree(meta); 87 } 88 kfree(nfp_prog); 89 } 90 91 static void nfp_prog_push(struct nfp_prog *nfp_prog, u64 insn) 92 { 93 if (nfp_prog->__prog_alloc_len == nfp_prog->prog_len) { 94 nfp_prog->error = -ENOSPC; 95 return; 96 } 97 98 nfp_prog->prog[nfp_prog->prog_len] = insn; 99 nfp_prog->prog_len++; 100 } 101 102 static unsigned int nfp_prog_current_offset(struct nfp_prog *nfp_prog) 103 { 104 return nfp_prog->start_off + nfp_prog->prog_len; 105 } 106 107 static unsigned int 108 nfp_prog_offset_to_index(struct nfp_prog *nfp_prog, unsigned int offset) 109 { 110 return offset - nfp_prog->start_off; 111 } 112 113 /* --- Emitters --- */ 114 static void 115 __emit_cmd(struct nfp_prog *nfp_prog, enum cmd_tgt_map op, 116 u8 mode, u8 xfer, u8 areg, u8 breg, u8 size, bool sync) 117 { 118 enum cmd_ctx_swap ctx; 119 u64 insn; 120 121 if (sync) 122 ctx = CMD_CTX_SWAP; 123 else 124 ctx = CMD_CTX_NO_SWAP; 125 126 insn = FIELD_PREP(OP_CMD_A_SRC, areg) | 127 FIELD_PREP(OP_CMD_CTX, ctx) | 128 FIELD_PREP(OP_CMD_B_SRC, breg) | 129 FIELD_PREP(OP_CMD_TOKEN, cmd_tgt_act[op].token) | 130 FIELD_PREP(OP_CMD_XFER, xfer) | 131 FIELD_PREP(OP_CMD_CNT, size) | 132 FIELD_PREP(OP_CMD_SIG, sync) | 133 FIELD_PREP(OP_CMD_TGT_CMD, cmd_tgt_act[op].tgt_cmd) | 134 FIELD_PREP(OP_CMD_MODE, mode); 135 136 nfp_prog_push(nfp_prog, insn); 137 } 138 139 static void 140 emit_cmd(struct nfp_prog *nfp_prog, enum cmd_tgt_map op, 141 u8 mode, u8 xfer, swreg lreg, swreg rreg, u8 size, bool sync) 142 { 143 struct nfp_insn_re_regs reg; 144 int err; 145 146 err = swreg_to_restricted(reg_none(), lreg, rreg, ®, false); 147 if (err) { 148 nfp_prog->error = err; 149 return; 150 } 151 if (reg.swap) { 152 pr_err("cmd can't swap arguments\n"); 153 nfp_prog->error = -EFAULT; 154 return; 155 } 156 if (reg.dst_lmextn || reg.src_lmextn) { 157 pr_err("cmd can't use LMextn\n"); 158 nfp_prog->error = -EFAULT; 159 return; 160 } 161 162 __emit_cmd(nfp_prog, op, mode, xfer, reg.areg, reg.breg, size, sync); 163 } 164 165 static void 166 __emit_br(struct nfp_prog *nfp_prog, enum br_mask mask, enum br_ev_pip ev_pip, 167 enum br_ctx_signal_state css, u16 addr, u8 defer) 168 { 169 u16 addr_lo, addr_hi; 170 u64 insn; 171 172 addr_lo = addr & (OP_BR_ADDR_LO >> __bf_shf(OP_BR_ADDR_LO)); 173 addr_hi = addr != addr_lo; 174 175 insn = OP_BR_BASE | 176 FIELD_PREP(OP_BR_MASK, mask) | 177 FIELD_PREP(OP_BR_EV_PIP, ev_pip) | 178 FIELD_PREP(OP_BR_CSS, css) | 179 FIELD_PREP(OP_BR_DEFBR, defer) | 180 FIELD_PREP(OP_BR_ADDR_LO, addr_lo) | 181 FIELD_PREP(OP_BR_ADDR_HI, addr_hi); 182 183 nfp_prog_push(nfp_prog, insn); 184 } 185 186 static void emit_br_def(struct nfp_prog *nfp_prog, u16 addr, u8 defer) 187 { 188 if (defer > 2) { 189 pr_err("BUG: branch defer out of bounds %d\n", defer); 190 nfp_prog->error = -EFAULT; 191 return; 192 } 193 __emit_br(nfp_prog, BR_UNC, BR_EV_PIP_UNCOND, BR_CSS_NONE, addr, defer); 194 } 195 196 static void 197 emit_br(struct nfp_prog *nfp_prog, enum br_mask mask, u16 addr, u8 defer) 198 { 199 __emit_br(nfp_prog, mask, 200 mask != BR_UNC ? BR_EV_PIP_COND : BR_EV_PIP_UNCOND, 201 BR_CSS_NONE, addr, defer); 202 } 203 204 static void 205 __emit_br_byte(struct nfp_prog *nfp_prog, u8 areg, u8 breg, bool imm8, 206 u8 byte, bool equal, u16 addr, u8 defer, bool src_lmextn) 207 { 208 u16 addr_lo, addr_hi; 209 u64 insn; 210 211 addr_lo = addr & (OP_BB_ADDR_LO >> __bf_shf(OP_BB_ADDR_LO)); 212 addr_hi = addr != addr_lo; 213 214 insn = OP_BBYTE_BASE | 215 FIELD_PREP(OP_BB_A_SRC, areg) | 216 FIELD_PREP(OP_BB_BYTE, byte) | 217 FIELD_PREP(OP_BB_B_SRC, breg) | 218 FIELD_PREP(OP_BB_I8, imm8) | 219 FIELD_PREP(OP_BB_EQ, equal) | 220 FIELD_PREP(OP_BB_DEFBR, defer) | 221 FIELD_PREP(OP_BB_ADDR_LO, addr_lo) | 222 FIELD_PREP(OP_BB_ADDR_HI, addr_hi) | 223 FIELD_PREP(OP_BB_SRC_LMEXTN, src_lmextn); 224 225 nfp_prog_push(nfp_prog, insn); 226 } 227 228 static void 229 emit_br_byte_neq(struct nfp_prog *nfp_prog, 230 swreg src, u8 imm, u8 byte, u16 addr, u8 defer) 231 { 232 struct nfp_insn_re_regs reg; 233 int err; 234 235 err = swreg_to_restricted(reg_none(), src, reg_imm(imm), ®, true); 236 if (err) { 237 nfp_prog->error = err; 238 return; 239 } 240 241 __emit_br_byte(nfp_prog, reg.areg, reg.breg, reg.i8, byte, false, addr, 242 defer, reg.src_lmextn); 243 } 244 245 static void 246 __emit_immed(struct nfp_prog *nfp_prog, u16 areg, u16 breg, u16 imm_hi, 247 enum immed_width width, bool invert, 248 enum immed_shift shift, bool wr_both, 249 bool dst_lmextn, bool src_lmextn) 250 { 251 u64 insn; 252 253 insn = OP_IMMED_BASE | 254 FIELD_PREP(OP_IMMED_A_SRC, areg) | 255 FIELD_PREP(OP_IMMED_B_SRC, breg) | 256 FIELD_PREP(OP_IMMED_IMM, imm_hi) | 257 FIELD_PREP(OP_IMMED_WIDTH, width) | 258 FIELD_PREP(OP_IMMED_INV, invert) | 259 FIELD_PREP(OP_IMMED_SHIFT, shift) | 260 FIELD_PREP(OP_IMMED_WR_AB, wr_both) | 261 FIELD_PREP(OP_IMMED_SRC_LMEXTN, src_lmextn) | 262 FIELD_PREP(OP_IMMED_DST_LMEXTN, dst_lmextn); 263 264 nfp_prog_push(nfp_prog, insn); 265 } 266 267 static void 268 emit_immed(struct nfp_prog *nfp_prog, swreg dst, u16 imm, 269 enum immed_width width, bool invert, enum immed_shift shift) 270 { 271 struct nfp_insn_ur_regs reg; 272 int err; 273 274 if (swreg_type(dst) == NN_REG_IMM) { 275 nfp_prog->error = -EFAULT; 276 return; 277 } 278 279 err = swreg_to_unrestricted(dst, dst, reg_imm(imm & 0xff), ®); 280 if (err) { 281 nfp_prog->error = err; 282 return; 283 } 284 285 __emit_immed(nfp_prog, reg.areg, reg.breg, imm >> 8, width, 286 invert, shift, reg.wr_both, 287 reg.dst_lmextn, reg.src_lmextn); 288 } 289 290 static void 291 __emit_shf(struct nfp_prog *nfp_prog, u16 dst, enum alu_dst_ab dst_ab, 292 enum shf_sc sc, u8 shift, 293 u16 areg, enum shf_op op, u16 breg, bool i8, bool sw, bool wr_both, 294 bool dst_lmextn, bool src_lmextn) 295 { 296 u64 insn; 297 298 if (!FIELD_FIT(OP_SHF_SHIFT, shift)) { 299 nfp_prog->error = -EFAULT; 300 return; 301 } 302 303 if (sc == SHF_SC_L_SHF) 304 shift = 32 - shift; 305 306 insn = OP_SHF_BASE | 307 FIELD_PREP(OP_SHF_A_SRC, areg) | 308 FIELD_PREP(OP_SHF_SC, sc) | 309 FIELD_PREP(OP_SHF_B_SRC, breg) | 310 FIELD_PREP(OP_SHF_I8, i8) | 311 FIELD_PREP(OP_SHF_SW, sw) | 312 FIELD_PREP(OP_SHF_DST, dst) | 313 FIELD_PREP(OP_SHF_SHIFT, shift) | 314 FIELD_PREP(OP_SHF_OP, op) | 315 FIELD_PREP(OP_SHF_DST_AB, dst_ab) | 316 FIELD_PREP(OP_SHF_WR_AB, wr_both) | 317 FIELD_PREP(OP_SHF_SRC_LMEXTN, src_lmextn) | 318 FIELD_PREP(OP_SHF_DST_LMEXTN, dst_lmextn); 319 320 nfp_prog_push(nfp_prog, insn); 321 } 322 323 static void 324 emit_shf(struct nfp_prog *nfp_prog, swreg dst, 325 swreg lreg, enum shf_op op, swreg rreg, enum shf_sc sc, u8 shift) 326 { 327 struct nfp_insn_re_regs reg; 328 int err; 329 330 err = swreg_to_restricted(dst, lreg, rreg, ®, true); 331 if (err) { 332 nfp_prog->error = err; 333 return; 334 } 335 336 __emit_shf(nfp_prog, reg.dst, reg.dst_ab, sc, shift, 337 reg.areg, op, reg.breg, reg.i8, reg.swap, reg.wr_both, 338 reg.dst_lmextn, reg.src_lmextn); 339 } 340 341 static void 342 __emit_alu(struct nfp_prog *nfp_prog, u16 dst, enum alu_dst_ab dst_ab, 343 u16 areg, enum alu_op op, u16 breg, bool swap, bool wr_both, 344 bool dst_lmextn, bool src_lmextn) 345 { 346 u64 insn; 347 348 insn = OP_ALU_BASE | 349 FIELD_PREP(OP_ALU_A_SRC, areg) | 350 FIELD_PREP(OP_ALU_B_SRC, breg) | 351 FIELD_PREP(OP_ALU_DST, dst) | 352 FIELD_PREP(OP_ALU_SW, swap) | 353 FIELD_PREP(OP_ALU_OP, op) | 354 FIELD_PREP(OP_ALU_DST_AB, dst_ab) | 355 FIELD_PREP(OP_ALU_WR_AB, wr_both) | 356 FIELD_PREP(OP_ALU_SRC_LMEXTN, src_lmextn) | 357 FIELD_PREP(OP_ALU_DST_LMEXTN, dst_lmextn); 358 359 nfp_prog_push(nfp_prog, insn); 360 } 361 362 static void 363 emit_alu(struct nfp_prog *nfp_prog, swreg dst, 364 swreg lreg, enum alu_op op, swreg rreg) 365 { 366 struct nfp_insn_ur_regs reg; 367 int err; 368 369 err = swreg_to_unrestricted(dst, lreg, rreg, ®); 370 if (err) { 371 nfp_prog->error = err; 372 return; 373 } 374 375 __emit_alu(nfp_prog, reg.dst, reg.dst_ab, 376 reg.areg, op, reg.breg, reg.swap, reg.wr_both, 377 reg.dst_lmextn, reg.src_lmextn); 378 } 379 380 static void 381 __emit_ld_field(struct nfp_prog *nfp_prog, enum shf_sc sc, 382 u8 areg, u8 bmask, u8 breg, u8 shift, bool imm8, 383 bool zero, bool swap, bool wr_both, 384 bool dst_lmextn, bool src_lmextn) 385 { 386 u64 insn; 387 388 insn = OP_LDF_BASE | 389 FIELD_PREP(OP_LDF_A_SRC, areg) | 390 FIELD_PREP(OP_LDF_SC, sc) | 391 FIELD_PREP(OP_LDF_B_SRC, breg) | 392 FIELD_PREP(OP_LDF_I8, imm8) | 393 FIELD_PREP(OP_LDF_SW, swap) | 394 FIELD_PREP(OP_LDF_ZF, zero) | 395 FIELD_PREP(OP_LDF_BMASK, bmask) | 396 FIELD_PREP(OP_LDF_SHF, shift) | 397 FIELD_PREP(OP_LDF_WR_AB, wr_both) | 398 FIELD_PREP(OP_LDF_SRC_LMEXTN, src_lmextn) | 399 FIELD_PREP(OP_LDF_DST_LMEXTN, dst_lmextn); 400 401 nfp_prog_push(nfp_prog, insn); 402 } 403 404 static void 405 emit_ld_field_any(struct nfp_prog *nfp_prog, swreg dst, u8 bmask, swreg src, 406 enum shf_sc sc, u8 shift, bool zero) 407 { 408 struct nfp_insn_re_regs reg; 409 int err; 410 411 /* Note: ld_field is special as it uses one of the src regs as dst */ 412 err = swreg_to_restricted(dst, dst, src, ®, true); 413 if (err) { 414 nfp_prog->error = err; 415 return; 416 } 417 418 __emit_ld_field(nfp_prog, sc, reg.areg, bmask, reg.breg, shift, 419 reg.i8, zero, reg.swap, reg.wr_both, 420 reg.dst_lmextn, reg.src_lmextn); 421 } 422 423 static void 424 emit_ld_field(struct nfp_prog *nfp_prog, swreg dst, u8 bmask, swreg src, 425 enum shf_sc sc, u8 shift) 426 { 427 emit_ld_field_any(nfp_prog, dst, bmask, src, sc, shift, false); 428 } 429 430 static void emit_nop(struct nfp_prog *nfp_prog) 431 { 432 __emit_immed(nfp_prog, UR_REG_IMM, UR_REG_IMM, 0, 0, 0, 0, 0, 0, 0); 433 } 434 435 /* --- Wrappers --- */ 436 static bool pack_immed(u32 imm, u16 *val, enum immed_shift *shift) 437 { 438 if (!(imm & 0xffff0000)) { 439 *val = imm; 440 *shift = IMMED_SHIFT_0B; 441 } else if (!(imm & 0xff0000ff)) { 442 *val = imm >> 8; 443 *shift = IMMED_SHIFT_1B; 444 } else if (!(imm & 0x0000ffff)) { 445 *val = imm >> 16; 446 *shift = IMMED_SHIFT_2B; 447 } else { 448 return false; 449 } 450 451 return true; 452 } 453 454 static void wrp_immed(struct nfp_prog *nfp_prog, swreg dst, u32 imm) 455 { 456 enum immed_shift shift; 457 u16 val; 458 459 if (pack_immed(imm, &val, &shift)) { 460 emit_immed(nfp_prog, dst, val, IMMED_WIDTH_ALL, false, shift); 461 } else if (pack_immed(~imm, &val, &shift)) { 462 emit_immed(nfp_prog, dst, val, IMMED_WIDTH_ALL, true, shift); 463 } else { 464 emit_immed(nfp_prog, dst, imm & 0xffff, IMMED_WIDTH_ALL, 465 false, IMMED_SHIFT_0B); 466 emit_immed(nfp_prog, dst, imm >> 16, IMMED_WIDTH_WORD, 467 false, IMMED_SHIFT_2B); 468 } 469 } 470 471 /* ur_load_imm_any() - encode immediate or use tmp register (unrestricted) 472 * If the @imm is small enough encode it directly in operand and return 473 * otherwise load @imm to a spare register and return its encoding. 474 */ 475 static swreg ur_load_imm_any(struct nfp_prog *nfp_prog, u32 imm, swreg tmp_reg) 476 { 477 if (FIELD_FIT(UR_REG_IMM_MAX, imm)) 478 return reg_imm(imm); 479 480 wrp_immed(nfp_prog, tmp_reg, imm); 481 return tmp_reg; 482 } 483 484 /* re_load_imm_any() - encode immediate or use tmp register (restricted) 485 * If the @imm is small enough encode it directly in operand and return 486 * otherwise load @imm to a spare register and return its encoding. 487 */ 488 static swreg re_load_imm_any(struct nfp_prog *nfp_prog, u32 imm, swreg tmp_reg) 489 { 490 if (FIELD_FIT(RE_REG_IMM_MAX, imm)) 491 return reg_imm(imm); 492 493 wrp_immed(nfp_prog, tmp_reg, imm); 494 return tmp_reg; 495 } 496 497 static void 498 wrp_br_special(struct nfp_prog *nfp_prog, enum br_mask mask, 499 enum br_special special) 500 { 501 emit_br(nfp_prog, mask, 0, 0); 502 503 nfp_prog->prog[nfp_prog->prog_len - 1] |= 504 FIELD_PREP(OP_BR_SPECIAL, special); 505 } 506 507 static void wrp_mov(struct nfp_prog *nfp_prog, swreg dst, swreg src) 508 { 509 emit_alu(nfp_prog, dst, reg_none(), ALU_OP_NONE, src); 510 } 511 512 static void wrp_reg_mov(struct nfp_prog *nfp_prog, u16 dst, u16 src) 513 { 514 wrp_mov(nfp_prog, reg_both(dst), reg_b(src)); 515 } 516 517 static int 518 construct_data_ind_ld(struct nfp_prog *nfp_prog, u16 offset, 519 u16 src, bool src_valid, u8 size) 520 { 521 unsigned int i; 522 u16 shift, sz; 523 swreg tmp_reg; 524 525 /* We load the value from the address indicated in @offset and then 526 * shift out the data we don't need. Note: this is big endian! 527 */ 528 sz = size < 4 ? 4 : size; 529 shift = size < 4 ? 4 - size : 0; 530 531 if (src_valid) { 532 /* Calculate the true offset (src_reg + imm) */ 533 tmp_reg = ur_load_imm_any(nfp_prog, offset, imm_b(nfp_prog)); 534 emit_alu(nfp_prog, imm_both(nfp_prog), 535 reg_a(src), ALU_OP_ADD, tmp_reg); 536 /* Check packet length (size guaranteed to fit b/c it's u8) */ 537 emit_alu(nfp_prog, imm_a(nfp_prog), 538 imm_a(nfp_prog), ALU_OP_ADD, reg_imm(size)); 539 emit_alu(nfp_prog, reg_none(), 540 plen_reg(nfp_prog), ALU_OP_SUB, imm_a(nfp_prog)); 541 wrp_br_special(nfp_prog, BR_BLO, OP_BR_GO_ABORT); 542 /* Load data */ 543 emit_cmd(nfp_prog, CMD_TGT_READ8, CMD_MODE_32b, 0, 544 pptr_reg(nfp_prog), imm_b(nfp_prog), sz - 1, true); 545 } else { 546 /* Check packet length */ 547 tmp_reg = ur_load_imm_any(nfp_prog, offset + size, 548 imm_a(nfp_prog)); 549 emit_alu(nfp_prog, reg_none(), 550 plen_reg(nfp_prog), ALU_OP_SUB, tmp_reg); 551 wrp_br_special(nfp_prog, BR_BLO, OP_BR_GO_ABORT); 552 /* Load data */ 553 tmp_reg = re_load_imm_any(nfp_prog, offset, imm_b(nfp_prog)); 554 emit_cmd(nfp_prog, CMD_TGT_READ8, CMD_MODE_32b, 0, 555 pptr_reg(nfp_prog), tmp_reg, sz - 1, true); 556 } 557 558 i = 0; 559 if (shift) 560 emit_shf(nfp_prog, reg_both(0), reg_none(), SHF_OP_NONE, 561 reg_xfer(0), SHF_SC_R_SHF, shift * 8); 562 else 563 for (; i * 4 < size; i++) 564 wrp_mov(nfp_prog, reg_both(i), reg_xfer(i)); 565 566 if (i < 2) 567 wrp_immed(nfp_prog, reg_both(1), 0); 568 569 return 0; 570 } 571 572 static int construct_data_ld(struct nfp_prog *nfp_prog, u16 offset, u8 size) 573 { 574 return construct_data_ind_ld(nfp_prog, offset, 0, false, size); 575 } 576 577 static void 578 wrp_alu_imm(struct nfp_prog *nfp_prog, u8 dst, enum alu_op alu_op, u32 imm) 579 { 580 swreg tmp_reg; 581 582 if (alu_op == ALU_OP_AND) { 583 if (!imm) 584 wrp_immed(nfp_prog, reg_both(dst), 0); 585 if (!imm || !~imm) 586 return; 587 } 588 if (alu_op == ALU_OP_OR) { 589 if (!~imm) 590 wrp_immed(nfp_prog, reg_both(dst), ~0U); 591 if (!imm || !~imm) 592 return; 593 } 594 if (alu_op == ALU_OP_XOR) { 595 if (!~imm) 596 emit_alu(nfp_prog, reg_both(dst), reg_none(), 597 ALU_OP_NEG, reg_b(dst)); 598 if (!imm || !~imm) 599 return; 600 } 601 602 tmp_reg = ur_load_imm_any(nfp_prog, imm, imm_b(nfp_prog)); 603 emit_alu(nfp_prog, reg_both(dst), reg_a(dst), alu_op, tmp_reg); 604 } 605 606 static int 607 wrp_alu64_imm(struct nfp_prog *nfp_prog, struct nfp_insn_meta *meta, 608 enum alu_op alu_op, bool skip) 609 { 610 const struct bpf_insn *insn = &meta->insn; 611 u64 imm = insn->imm; /* sign extend */ 612 613 if (skip) { 614 meta->skip = true; 615 return 0; 616 } 617 618 wrp_alu_imm(nfp_prog, insn->dst_reg * 2, alu_op, imm & ~0U); 619 wrp_alu_imm(nfp_prog, insn->dst_reg * 2 + 1, alu_op, imm >> 32); 620 621 return 0; 622 } 623 624 static int 625 wrp_alu64_reg(struct nfp_prog *nfp_prog, struct nfp_insn_meta *meta, 626 enum alu_op alu_op) 627 { 628 u8 dst = meta->insn.dst_reg * 2, src = meta->insn.src_reg * 2; 629 630 emit_alu(nfp_prog, reg_both(dst), reg_a(dst), alu_op, reg_b(src)); 631 emit_alu(nfp_prog, reg_both(dst + 1), 632 reg_a(dst + 1), alu_op, reg_b(src + 1)); 633 634 return 0; 635 } 636 637 static int 638 wrp_alu32_imm(struct nfp_prog *nfp_prog, struct nfp_insn_meta *meta, 639 enum alu_op alu_op, bool skip) 640 { 641 const struct bpf_insn *insn = &meta->insn; 642 643 if (skip) { 644 meta->skip = true; 645 return 0; 646 } 647 648 wrp_alu_imm(nfp_prog, insn->dst_reg * 2, alu_op, insn->imm); 649 wrp_immed(nfp_prog, reg_both(insn->dst_reg * 2 + 1), 0); 650 651 return 0; 652 } 653 654 static int 655 wrp_alu32_reg(struct nfp_prog *nfp_prog, struct nfp_insn_meta *meta, 656 enum alu_op alu_op) 657 { 658 u8 dst = meta->insn.dst_reg * 2, src = meta->insn.src_reg * 2; 659 660 emit_alu(nfp_prog, reg_both(dst), reg_a(dst), alu_op, reg_b(src)); 661 wrp_immed(nfp_prog, reg_both(meta->insn.dst_reg * 2 + 1), 0); 662 663 return 0; 664 } 665 666 static void 667 wrp_test_reg_one(struct nfp_prog *nfp_prog, u8 dst, enum alu_op alu_op, u8 src, 668 enum br_mask br_mask, u16 off) 669 { 670 emit_alu(nfp_prog, reg_none(), reg_a(dst), alu_op, reg_b(src)); 671 emit_br(nfp_prog, br_mask, off, 0); 672 } 673 674 static int 675 wrp_test_reg(struct nfp_prog *nfp_prog, struct nfp_insn_meta *meta, 676 enum alu_op alu_op, enum br_mask br_mask) 677 { 678 const struct bpf_insn *insn = &meta->insn; 679 680 if (insn->off < 0) /* TODO */ 681 return -EOPNOTSUPP; 682 683 wrp_test_reg_one(nfp_prog, insn->dst_reg * 2, alu_op, 684 insn->src_reg * 2, br_mask, insn->off); 685 wrp_test_reg_one(nfp_prog, insn->dst_reg * 2 + 1, alu_op, 686 insn->src_reg * 2 + 1, br_mask, insn->off); 687 688 return 0; 689 } 690 691 static int 692 wrp_cmp_imm(struct nfp_prog *nfp_prog, struct nfp_insn_meta *meta, 693 enum br_mask br_mask, bool swap) 694 { 695 const struct bpf_insn *insn = &meta->insn; 696 u64 imm = insn->imm; /* sign extend */ 697 u8 reg = insn->dst_reg * 2; 698 swreg tmp_reg; 699 700 if (insn->off < 0) /* TODO */ 701 return -EOPNOTSUPP; 702 703 tmp_reg = ur_load_imm_any(nfp_prog, imm & ~0U, imm_b(nfp_prog)); 704 if (!swap) 705 emit_alu(nfp_prog, reg_none(), reg_a(reg), ALU_OP_SUB, tmp_reg); 706 else 707 emit_alu(nfp_prog, reg_none(), tmp_reg, ALU_OP_SUB, reg_a(reg)); 708 709 tmp_reg = ur_load_imm_any(nfp_prog, imm >> 32, imm_b(nfp_prog)); 710 if (!swap) 711 emit_alu(nfp_prog, reg_none(), 712 reg_a(reg + 1), ALU_OP_SUB_C, tmp_reg); 713 else 714 emit_alu(nfp_prog, reg_none(), 715 tmp_reg, ALU_OP_SUB_C, reg_a(reg + 1)); 716 717 emit_br(nfp_prog, br_mask, insn->off, 0); 718 719 return 0; 720 } 721 722 static int 723 wrp_cmp_reg(struct nfp_prog *nfp_prog, struct nfp_insn_meta *meta, 724 enum br_mask br_mask, bool swap) 725 { 726 const struct bpf_insn *insn = &meta->insn; 727 u8 areg, breg; 728 729 areg = insn->dst_reg * 2; 730 breg = insn->src_reg * 2; 731 732 if (insn->off < 0) /* TODO */ 733 return -EOPNOTSUPP; 734 735 if (swap) { 736 areg ^= breg; 737 breg ^= areg; 738 areg ^= breg; 739 } 740 741 emit_alu(nfp_prog, reg_none(), reg_a(areg), ALU_OP_SUB, reg_b(breg)); 742 emit_alu(nfp_prog, reg_none(), 743 reg_a(areg + 1), ALU_OP_SUB_C, reg_b(breg + 1)); 744 emit_br(nfp_prog, br_mask, insn->off, 0); 745 746 return 0; 747 } 748 749 static void wrp_end32(struct nfp_prog *nfp_prog, swreg reg_in, u8 gpr_out) 750 { 751 emit_ld_field(nfp_prog, reg_both(gpr_out), 0xf, reg_in, 752 SHF_SC_R_ROT, 8); 753 emit_ld_field(nfp_prog, reg_both(gpr_out), 0x5, reg_a(gpr_out), 754 SHF_SC_R_ROT, 16); 755 } 756 757 /* --- Callbacks --- */ 758 static int mov_reg64(struct nfp_prog *nfp_prog, struct nfp_insn_meta *meta) 759 { 760 const struct bpf_insn *insn = &meta->insn; 761 762 wrp_reg_mov(nfp_prog, insn->dst_reg * 2, insn->src_reg * 2); 763 wrp_reg_mov(nfp_prog, insn->dst_reg * 2 + 1, insn->src_reg * 2 + 1); 764 765 return 0; 766 } 767 768 static int mov_imm64(struct nfp_prog *nfp_prog, struct nfp_insn_meta *meta) 769 { 770 u64 imm = meta->insn.imm; /* sign extend */ 771 772 wrp_immed(nfp_prog, reg_both(meta->insn.dst_reg * 2), imm & ~0U); 773 wrp_immed(nfp_prog, reg_both(meta->insn.dst_reg * 2 + 1), imm >> 32); 774 775 return 0; 776 } 777 778 static int xor_reg64(struct nfp_prog *nfp_prog, struct nfp_insn_meta *meta) 779 { 780 return wrp_alu64_reg(nfp_prog, meta, ALU_OP_XOR); 781 } 782 783 static int xor_imm64(struct nfp_prog *nfp_prog, struct nfp_insn_meta *meta) 784 { 785 return wrp_alu64_imm(nfp_prog, meta, ALU_OP_XOR, !meta->insn.imm); 786 } 787 788 static int and_reg64(struct nfp_prog *nfp_prog, struct nfp_insn_meta *meta) 789 { 790 return wrp_alu64_reg(nfp_prog, meta, ALU_OP_AND); 791 } 792 793 static int and_imm64(struct nfp_prog *nfp_prog, struct nfp_insn_meta *meta) 794 { 795 return wrp_alu64_imm(nfp_prog, meta, ALU_OP_AND, !~meta->insn.imm); 796 } 797 798 static int or_reg64(struct nfp_prog *nfp_prog, struct nfp_insn_meta *meta) 799 { 800 return wrp_alu64_reg(nfp_prog, meta, ALU_OP_OR); 801 } 802 803 static int or_imm64(struct nfp_prog *nfp_prog, struct nfp_insn_meta *meta) 804 { 805 return wrp_alu64_imm(nfp_prog, meta, ALU_OP_OR, !meta->insn.imm); 806 } 807 808 static int add_reg64(struct nfp_prog *nfp_prog, struct nfp_insn_meta *meta) 809 { 810 const struct bpf_insn *insn = &meta->insn; 811 812 emit_alu(nfp_prog, reg_both(insn->dst_reg * 2), 813 reg_a(insn->dst_reg * 2), ALU_OP_ADD, 814 reg_b(insn->src_reg * 2)); 815 emit_alu(nfp_prog, reg_both(insn->dst_reg * 2 + 1), 816 reg_a(insn->dst_reg * 2 + 1), ALU_OP_ADD_C, 817 reg_b(insn->src_reg * 2 + 1)); 818 819 return 0; 820 } 821 822 static int add_imm64(struct nfp_prog *nfp_prog, struct nfp_insn_meta *meta) 823 { 824 const struct bpf_insn *insn = &meta->insn; 825 u64 imm = insn->imm; /* sign extend */ 826 827 wrp_alu_imm(nfp_prog, insn->dst_reg * 2, ALU_OP_ADD, imm & ~0U); 828 wrp_alu_imm(nfp_prog, insn->dst_reg * 2 + 1, ALU_OP_ADD_C, imm >> 32); 829 830 return 0; 831 } 832 833 static int sub_reg64(struct nfp_prog *nfp_prog, struct nfp_insn_meta *meta) 834 { 835 const struct bpf_insn *insn = &meta->insn; 836 837 emit_alu(nfp_prog, reg_both(insn->dst_reg * 2), 838 reg_a(insn->dst_reg * 2), ALU_OP_SUB, 839 reg_b(insn->src_reg * 2)); 840 emit_alu(nfp_prog, reg_both(insn->dst_reg * 2 + 1), 841 reg_a(insn->dst_reg * 2 + 1), ALU_OP_SUB_C, 842 reg_b(insn->src_reg * 2 + 1)); 843 844 return 0; 845 } 846 847 static int sub_imm64(struct nfp_prog *nfp_prog, struct nfp_insn_meta *meta) 848 { 849 const struct bpf_insn *insn = &meta->insn; 850 u64 imm = insn->imm; /* sign extend */ 851 852 wrp_alu_imm(nfp_prog, insn->dst_reg * 2, ALU_OP_SUB, imm & ~0U); 853 wrp_alu_imm(nfp_prog, insn->dst_reg * 2 + 1, ALU_OP_SUB_C, imm >> 32); 854 855 return 0; 856 } 857 858 static int shl_imm64(struct nfp_prog *nfp_prog, struct nfp_insn_meta *meta) 859 { 860 const struct bpf_insn *insn = &meta->insn; 861 u8 dst = insn->dst_reg * 2; 862 863 if (insn->imm < 32) { 864 emit_shf(nfp_prog, reg_both(dst + 1), 865 reg_a(dst + 1), SHF_OP_NONE, reg_b(dst), 866 SHF_SC_R_DSHF, 32 - insn->imm); 867 emit_shf(nfp_prog, reg_both(dst), 868 reg_none(), SHF_OP_NONE, reg_b(dst), 869 SHF_SC_L_SHF, insn->imm); 870 } else if (insn->imm == 32) { 871 wrp_reg_mov(nfp_prog, dst + 1, dst); 872 wrp_immed(nfp_prog, reg_both(dst), 0); 873 } else if (insn->imm > 32) { 874 emit_shf(nfp_prog, reg_both(dst + 1), 875 reg_none(), SHF_OP_NONE, reg_b(dst), 876 SHF_SC_L_SHF, insn->imm - 32); 877 wrp_immed(nfp_prog, reg_both(dst), 0); 878 } 879 880 return 0; 881 } 882 883 static int shr_imm64(struct nfp_prog *nfp_prog, struct nfp_insn_meta *meta) 884 { 885 const struct bpf_insn *insn = &meta->insn; 886 u8 dst = insn->dst_reg * 2; 887 888 if (insn->imm < 32) { 889 emit_shf(nfp_prog, reg_both(dst), 890 reg_a(dst + 1), SHF_OP_NONE, reg_b(dst), 891 SHF_SC_R_DSHF, insn->imm); 892 emit_shf(nfp_prog, reg_both(dst + 1), 893 reg_none(), SHF_OP_NONE, reg_b(dst + 1), 894 SHF_SC_R_SHF, insn->imm); 895 } else if (insn->imm == 32) { 896 wrp_reg_mov(nfp_prog, dst, dst + 1); 897 wrp_immed(nfp_prog, reg_both(dst + 1), 0); 898 } else if (insn->imm > 32) { 899 emit_shf(nfp_prog, reg_both(dst), 900 reg_none(), SHF_OP_NONE, reg_b(dst + 1), 901 SHF_SC_R_SHF, insn->imm - 32); 902 wrp_immed(nfp_prog, reg_both(dst + 1), 0); 903 } 904 905 return 0; 906 } 907 908 static int mov_reg(struct nfp_prog *nfp_prog, struct nfp_insn_meta *meta) 909 { 910 const struct bpf_insn *insn = &meta->insn; 911 912 wrp_reg_mov(nfp_prog, insn->dst_reg * 2, insn->src_reg * 2); 913 wrp_immed(nfp_prog, reg_both(insn->dst_reg * 2 + 1), 0); 914 915 return 0; 916 } 917 918 static int mov_imm(struct nfp_prog *nfp_prog, struct nfp_insn_meta *meta) 919 { 920 const struct bpf_insn *insn = &meta->insn; 921 922 wrp_immed(nfp_prog, reg_both(insn->dst_reg * 2), insn->imm); 923 wrp_immed(nfp_prog, reg_both(insn->dst_reg * 2 + 1), 0); 924 925 return 0; 926 } 927 928 static int xor_reg(struct nfp_prog *nfp_prog, struct nfp_insn_meta *meta) 929 { 930 return wrp_alu32_reg(nfp_prog, meta, ALU_OP_XOR); 931 } 932 933 static int xor_imm(struct nfp_prog *nfp_prog, struct nfp_insn_meta *meta) 934 { 935 return wrp_alu32_imm(nfp_prog, meta, ALU_OP_XOR, !~meta->insn.imm); 936 } 937 938 static int and_reg(struct nfp_prog *nfp_prog, struct nfp_insn_meta *meta) 939 { 940 return wrp_alu32_reg(nfp_prog, meta, ALU_OP_AND); 941 } 942 943 static int and_imm(struct nfp_prog *nfp_prog, struct nfp_insn_meta *meta) 944 { 945 return wrp_alu32_imm(nfp_prog, meta, ALU_OP_AND, !~meta->insn.imm); 946 } 947 948 static int or_reg(struct nfp_prog *nfp_prog, struct nfp_insn_meta *meta) 949 { 950 return wrp_alu32_reg(nfp_prog, meta, ALU_OP_OR); 951 } 952 953 static int or_imm(struct nfp_prog *nfp_prog, struct nfp_insn_meta *meta) 954 { 955 return wrp_alu32_imm(nfp_prog, meta, ALU_OP_OR, !meta->insn.imm); 956 } 957 958 static int add_reg(struct nfp_prog *nfp_prog, struct nfp_insn_meta *meta) 959 { 960 return wrp_alu32_reg(nfp_prog, meta, ALU_OP_ADD); 961 } 962 963 static int add_imm(struct nfp_prog *nfp_prog, struct nfp_insn_meta *meta) 964 { 965 return wrp_alu32_imm(nfp_prog, meta, ALU_OP_ADD, !meta->insn.imm); 966 } 967 968 static int sub_reg(struct nfp_prog *nfp_prog, struct nfp_insn_meta *meta) 969 { 970 return wrp_alu32_reg(nfp_prog, meta, ALU_OP_SUB); 971 } 972 973 static int sub_imm(struct nfp_prog *nfp_prog, struct nfp_insn_meta *meta) 974 { 975 return wrp_alu32_imm(nfp_prog, meta, ALU_OP_SUB, !meta->insn.imm); 976 } 977 978 static int shl_imm(struct nfp_prog *nfp_prog, struct nfp_insn_meta *meta) 979 { 980 const struct bpf_insn *insn = &meta->insn; 981 982 if (!insn->imm) 983 return 1; /* TODO: zero shift means indirect */ 984 985 emit_shf(nfp_prog, reg_both(insn->dst_reg * 2), 986 reg_none(), SHF_OP_NONE, reg_b(insn->dst_reg * 2), 987 SHF_SC_L_SHF, insn->imm); 988 wrp_immed(nfp_prog, reg_both(insn->dst_reg * 2 + 1), 0); 989 990 return 0; 991 } 992 993 static int end_reg32(struct nfp_prog *nfp_prog, struct nfp_insn_meta *meta) 994 { 995 const struct bpf_insn *insn = &meta->insn; 996 u8 gpr = insn->dst_reg * 2; 997 998 switch (insn->imm) { 999 case 16: 1000 emit_ld_field(nfp_prog, reg_both(gpr), 0x9, reg_b(gpr), 1001 SHF_SC_R_ROT, 8); 1002 emit_ld_field(nfp_prog, reg_both(gpr), 0xe, reg_a(gpr), 1003 SHF_SC_R_SHF, 16); 1004 1005 wrp_immed(nfp_prog, reg_both(gpr + 1), 0); 1006 break; 1007 case 32: 1008 wrp_end32(nfp_prog, reg_a(gpr), gpr); 1009 wrp_immed(nfp_prog, reg_both(gpr + 1), 0); 1010 break; 1011 case 64: 1012 wrp_mov(nfp_prog, imm_a(nfp_prog), reg_b(gpr + 1)); 1013 1014 wrp_end32(nfp_prog, reg_a(gpr), gpr + 1); 1015 wrp_end32(nfp_prog, imm_a(nfp_prog), gpr); 1016 break; 1017 } 1018 1019 return 0; 1020 } 1021 1022 static int imm_ld8_part2(struct nfp_prog *nfp_prog, struct nfp_insn_meta *meta) 1023 { 1024 wrp_immed(nfp_prog, reg_both(nfp_meta_prev(meta)->insn.dst_reg * 2 + 1), 1025 meta->insn.imm); 1026 1027 return 0; 1028 } 1029 1030 static int imm_ld8(struct nfp_prog *nfp_prog, struct nfp_insn_meta *meta) 1031 { 1032 const struct bpf_insn *insn = &meta->insn; 1033 1034 meta->double_cb = imm_ld8_part2; 1035 wrp_immed(nfp_prog, reg_both(insn->dst_reg * 2), insn->imm); 1036 1037 return 0; 1038 } 1039 1040 static int data_ld1(struct nfp_prog *nfp_prog, struct nfp_insn_meta *meta) 1041 { 1042 return construct_data_ld(nfp_prog, meta->insn.imm, 1); 1043 } 1044 1045 static int data_ld2(struct nfp_prog *nfp_prog, struct nfp_insn_meta *meta) 1046 { 1047 return construct_data_ld(nfp_prog, meta->insn.imm, 2); 1048 } 1049 1050 static int data_ld4(struct nfp_prog *nfp_prog, struct nfp_insn_meta *meta) 1051 { 1052 return construct_data_ld(nfp_prog, meta->insn.imm, 4); 1053 } 1054 1055 static int data_ind_ld1(struct nfp_prog *nfp_prog, struct nfp_insn_meta *meta) 1056 { 1057 return construct_data_ind_ld(nfp_prog, meta->insn.imm, 1058 meta->insn.src_reg * 2, true, 1); 1059 } 1060 1061 static int data_ind_ld2(struct nfp_prog *nfp_prog, struct nfp_insn_meta *meta) 1062 { 1063 return construct_data_ind_ld(nfp_prog, meta->insn.imm, 1064 meta->insn.src_reg * 2, true, 2); 1065 } 1066 1067 static int data_ind_ld4(struct nfp_prog *nfp_prog, struct nfp_insn_meta *meta) 1068 { 1069 return construct_data_ind_ld(nfp_prog, meta->insn.imm, 1070 meta->insn.src_reg * 2, true, 4); 1071 } 1072 1073 static int mem_ldx_skb(struct nfp_prog *nfp_prog, struct nfp_insn_meta *meta, 1074 u8 size) 1075 { 1076 switch (meta->insn.off) { 1077 case offsetof(struct sk_buff, len): 1078 if (size != FIELD_SIZEOF(struct sk_buff, len)) 1079 return -EOPNOTSUPP; 1080 wrp_mov(nfp_prog, 1081 reg_both(meta->insn.dst_reg * 2), plen_reg(nfp_prog)); 1082 break; 1083 default: 1084 return -EOPNOTSUPP; 1085 } 1086 1087 wrp_immed(nfp_prog, reg_both(meta->insn.dst_reg * 2 + 1), 0); 1088 1089 return 0; 1090 } 1091 1092 static int mem_ldx_xdp(struct nfp_prog *nfp_prog, struct nfp_insn_meta *meta, 1093 u8 size) 1094 { 1095 swreg dst = reg_both(meta->insn.dst_reg * 2); 1096 1097 if (size != sizeof(void *)) 1098 return -EINVAL; 1099 1100 switch (meta->insn.off) { 1101 case offsetof(struct xdp_buff, data): 1102 wrp_mov(nfp_prog, dst, pptr_reg(nfp_prog)); 1103 break; 1104 case offsetof(struct xdp_buff, data_end): 1105 emit_alu(nfp_prog, dst, 1106 plen_reg(nfp_prog), ALU_OP_ADD, pptr_reg(nfp_prog)); 1107 break; 1108 default: 1109 return -EOPNOTSUPP; 1110 } 1111 1112 wrp_immed(nfp_prog, reg_both(meta->insn.dst_reg * 2 + 1), 0); 1113 1114 return 0; 1115 } 1116 1117 static int mem_ldx4(struct nfp_prog *nfp_prog, struct nfp_insn_meta *meta) 1118 { 1119 if (nfp_prog->act == NN_ACT_XDP) 1120 return mem_ldx_xdp(nfp_prog, meta, 4); 1121 else 1122 return mem_ldx_skb(nfp_prog, meta, 4); 1123 } 1124 1125 static int mem_stx4_skb(struct nfp_prog *nfp_prog, struct nfp_insn_meta *meta) 1126 { 1127 return -EOPNOTSUPP; 1128 } 1129 1130 static int mem_stx4_xdp(struct nfp_prog *nfp_prog, struct nfp_insn_meta *meta) 1131 { 1132 return -EOPNOTSUPP; 1133 } 1134 1135 static int mem_stx4(struct nfp_prog *nfp_prog, struct nfp_insn_meta *meta) 1136 { 1137 if (nfp_prog->act == NN_ACT_XDP) 1138 return mem_stx4_xdp(nfp_prog, meta); 1139 return mem_stx4_skb(nfp_prog, meta); 1140 } 1141 1142 static int jump(struct nfp_prog *nfp_prog, struct nfp_insn_meta *meta) 1143 { 1144 if (meta->insn.off < 0) /* TODO */ 1145 return -EOPNOTSUPP; 1146 emit_br(nfp_prog, BR_UNC, meta->insn.off, 0); 1147 1148 return 0; 1149 } 1150 1151 static int jeq_imm(struct nfp_prog *nfp_prog, struct nfp_insn_meta *meta) 1152 { 1153 const struct bpf_insn *insn = &meta->insn; 1154 u64 imm = insn->imm; /* sign extend */ 1155 swreg or1, or2, tmp_reg; 1156 1157 or1 = reg_a(insn->dst_reg * 2); 1158 or2 = reg_b(insn->dst_reg * 2 + 1); 1159 1160 if (insn->off < 0) /* TODO */ 1161 return -EOPNOTSUPP; 1162 1163 if (imm & ~0U) { 1164 tmp_reg = ur_load_imm_any(nfp_prog, imm & ~0U, imm_b(nfp_prog)); 1165 emit_alu(nfp_prog, imm_a(nfp_prog), 1166 reg_a(insn->dst_reg * 2), ALU_OP_XOR, tmp_reg); 1167 or1 = imm_a(nfp_prog); 1168 } 1169 1170 if (imm >> 32) { 1171 tmp_reg = ur_load_imm_any(nfp_prog, imm >> 32, imm_b(nfp_prog)); 1172 emit_alu(nfp_prog, imm_b(nfp_prog), 1173 reg_a(insn->dst_reg * 2 + 1), ALU_OP_XOR, tmp_reg); 1174 or2 = imm_b(nfp_prog); 1175 } 1176 1177 emit_alu(nfp_prog, reg_none(), or1, ALU_OP_OR, or2); 1178 emit_br(nfp_prog, BR_BEQ, insn->off, 0); 1179 1180 return 0; 1181 } 1182 1183 static int jgt_imm(struct nfp_prog *nfp_prog, struct nfp_insn_meta *meta) 1184 { 1185 return wrp_cmp_imm(nfp_prog, meta, BR_BLO, true); 1186 } 1187 1188 static int jge_imm(struct nfp_prog *nfp_prog, struct nfp_insn_meta *meta) 1189 { 1190 return wrp_cmp_imm(nfp_prog, meta, BR_BHS, false); 1191 } 1192 1193 static int jlt_imm(struct nfp_prog *nfp_prog, struct nfp_insn_meta *meta) 1194 { 1195 return wrp_cmp_imm(nfp_prog, meta, BR_BLO, false); 1196 } 1197 1198 static int jle_imm(struct nfp_prog *nfp_prog, struct nfp_insn_meta *meta) 1199 { 1200 return wrp_cmp_imm(nfp_prog, meta, BR_BHS, true); 1201 } 1202 1203 static int jset_imm(struct nfp_prog *nfp_prog, struct nfp_insn_meta *meta) 1204 { 1205 const struct bpf_insn *insn = &meta->insn; 1206 u64 imm = insn->imm; /* sign extend */ 1207 swreg tmp_reg; 1208 1209 if (insn->off < 0) /* TODO */ 1210 return -EOPNOTSUPP; 1211 1212 if (!imm) { 1213 meta->skip = true; 1214 return 0; 1215 } 1216 1217 if (imm & ~0U) { 1218 tmp_reg = ur_load_imm_any(nfp_prog, imm & ~0U, imm_b(nfp_prog)); 1219 emit_alu(nfp_prog, reg_none(), 1220 reg_a(insn->dst_reg * 2), ALU_OP_AND, tmp_reg); 1221 emit_br(nfp_prog, BR_BNE, insn->off, 0); 1222 } 1223 1224 if (imm >> 32) { 1225 tmp_reg = ur_load_imm_any(nfp_prog, imm >> 32, imm_b(nfp_prog)); 1226 emit_alu(nfp_prog, reg_none(), 1227 reg_a(insn->dst_reg * 2 + 1), ALU_OP_AND, tmp_reg); 1228 emit_br(nfp_prog, BR_BNE, insn->off, 0); 1229 } 1230 1231 return 0; 1232 } 1233 1234 static int jne_imm(struct nfp_prog *nfp_prog, struct nfp_insn_meta *meta) 1235 { 1236 const struct bpf_insn *insn = &meta->insn; 1237 u64 imm = insn->imm; /* sign extend */ 1238 swreg tmp_reg; 1239 1240 if (insn->off < 0) /* TODO */ 1241 return -EOPNOTSUPP; 1242 1243 if (!imm) { 1244 emit_alu(nfp_prog, reg_none(), reg_a(insn->dst_reg * 2), 1245 ALU_OP_OR, reg_b(insn->dst_reg * 2 + 1)); 1246 emit_br(nfp_prog, BR_BNE, insn->off, 0); 1247 return 0; 1248 } 1249 1250 tmp_reg = ur_load_imm_any(nfp_prog, imm & ~0U, imm_b(nfp_prog)); 1251 emit_alu(nfp_prog, reg_none(), 1252 reg_a(insn->dst_reg * 2), ALU_OP_XOR, tmp_reg); 1253 emit_br(nfp_prog, BR_BNE, insn->off, 0); 1254 1255 tmp_reg = ur_load_imm_any(nfp_prog, imm >> 32, imm_b(nfp_prog)); 1256 emit_alu(nfp_prog, reg_none(), 1257 reg_a(insn->dst_reg * 2 + 1), ALU_OP_XOR, tmp_reg); 1258 emit_br(nfp_prog, BR_BNE, insn->off, 0); 1259 1260 return 0; 1261 } 1262 1263 static int jeq_reg(struct nfp_prog *nfp_prog, struct nfp_insn_meta *meta) 1264 { 1265 const struct bpf_insn *insn = &meta->insn; 1266 1267 if (insn->off < 0) /* TODO */ 1268 return -EOPNOTSUPP; 1269 1270 emit_alu(nfp_prog, imm_a(nfp_prog), reg_a(insn->dst_reg * 2), 1271 ALU_OP_XOR, reg_b(insn->src_reg * 2)); 1272 emit_alu(nfp_prog, imm_b(nfp_prog), reg_a(insn->dst_reg * 2 + 1), 1273 ALU_OP_XOR, reg_b(insn->src_reg * 2 + 1)); 1274 emit_alu(nfp_prog, reg_none(), 1275 imm_a(nfp_prog), ALU_OP_OR, imm_b(nfp_prog)); 1276 emit_br(nfp_prog, BR_BEQ, insn->off, 0); 1277 1278 return 0; 1279 } 1280 1281 static int jgt_reg(struct nfp_prog *nfp_prog, struct nfp_insn_meta *meta) 1282 { 1283 return wrp_cmp_reg(nfp_prog, meta, BR_BLO, true); 1284 } 1285 1286 static int jge_reg(struct nfp_prog *nfp_prog, struct nfp_insn_meta *meta) 1287 { 1288 return wrp_cmp_reg(nfp_prog, meta, BR_BHS, false); 1289 } 1290 1291 static int jlt_reg(struct nfp_prog *nfp_prog, struct nfp_insn_meta *meta) 1292 { 1293 return wrp_cmp_reg(nfp_prog, meta, BR_BLO, false); 1294 } 1295 1296 static int jle_reg(struct nfp_prog *nfp_prog, struct nfp_insn_meta *meta) 1297 { 1298 return wrp_cmp_reg(nfp_prog, meta, BR_BHS, true); 1299 } 1300 1301 static int jset_reg(struct nfp_prog *nfp_prog, struct nfp_insn_meta *meta) 1302 { 1303 return wrp_test_reg(nfp_prog, meta, ALU_OP_AND, BR_BNE); 1304 } 1305 1306 static int jne_reg(struct nfp_prog *nfp_prog, struct nfp_insn_meta *meta) 1307 { 1308 return wrp_test_reg(nfp_prog, meta, ALU_OP_XOR, BR_BNE); 1309 } 1310 1311 static int goto_out(struct nfp_prog *nfp_prog, struct nfp_insn_meta *meta) 1312 { 1313 wrp_br_special(nfp_prog, BR_UNC, OP_BR_GO_OUT); 1314 1315 return 0; 1316 } 1317 1318 static const instr_cb_t instr_cb[256] = { 1319 [BPF_ALU64 | BPF_MOV | BPF_X] = mov_reg64, 1320 [BPF_ALU64 | BPF_MOV | BPF_K] = mov_imm64, 1321 [BPF_ALU64 | BPF_XOR | BPF_X] = xor_reg64, 1322 [BPF_ALU64 | BPF_XOR | BPF_K] = xor_imm64, 1323 [BPF_ALU64 | BPF_AND | BPF_X] = and_reg64, 1324 [BPF_ALU64 | BPF_AND | BPF_K] = and_imm64, 1325 [BPF_ALU64 | BPF_OR | BPF_X] = or_reg64, 1326 [BPF_ALU64 | BPF_OR | BPF_K] = or_imm64, 1327 [BPF_ALU64 | BPF_ADD | BPF_X] = add_reg64, 1328 [BPF_ALU64 | BPF_ADD | BPF_K] = add_imm64, 1329 [BPF_ALU64 | BPF_SUB | BPF_X] = sub_reg64, 1330 [BPF_ALU64 | BPF_SUB | BPF_K] = sub_imm64, 1331 [BPF_ALU64 | BPF_LSH | BPF_K] = shl_imm64, 1332 [BPF_ALU64 | BPF_RSH | BPF_K] = shr_imm64, 1333 [BPF_ALU | BPF_MOV | BPF_X] = mov_reg, 1334 [BPF_ALU | BPF_MOV | BPF_K] = mov_imm, 1335 [BPF_ALU | BPF_XOR | BPF_X] = xor_reg, 1336 [BPF_ALU | BPF_XOR | BPF_K] = xor_imm, 1337 [BPF_ALU | BPF_AND | BPF_X] = and_reg, 1338 [BPF_ALU | BPF_AND | BPF_K] = and_imm, 1339 [BPF_ALU | BPF_OR | BPF_X] = or_reg, 1340 [BPF_ALU | BPF_OR | BPF_K] = or_imm, 1341 [BPF_ALU | BPF_ADD | BPF_X] = add_reg, 1342 [BPF_ALU | BPF_ADD | BPF_K] = add_imm, 1343 [BPF_ALU | BPF_SUB | BPF_X] = sub_reg, 1344 [BPF_ALU | BPF_SUB | BPF_K] = sub_imm, 1345 [BPF_ALU | BPF_LSH | BPF_K] = shl_imm, 1346 [BPF_ALU | BPF_END | BPF_X] = end_reg32, 1347 [BPF_LD | BPF_IMM | BPF_DW] = imm_ld8, 1348 [BPF_LD | BPF_ABS | BPF_B] = data_ld1, 1349 [BPF_LD | BPF_ABS | BPF_H] = data_ld2, 1350 [BPF_LD | BPF_ABS | BPF_W] = data_ld4, 1351 [BPF_LD | BPF_IND | BPF_B] = data_ind_ld1, 1352 [BPF_LD | BPF_IND | BPF_H] = data_ind_ld2, 1353 [BPF_LD | BPF_IND | BPF_W] = data_ind_ld4, 1354 [BPF_LDX | BPF_MEM | BPF_W] = mem_ldx4, 1355 [BPF_STX | BPF_MEM | BPF_W] = mem_stx4, 1356 [BPF_JMP | BPF_JA | BPF_K] = jump, 1357 [BPF_JMP | BPF_JEQ | BPF_K] = jeq_imm, 1358 [BPF_JMP | BPF_JGT | BPF_K] = jgt_imm, 1359 [BPF_JMP | BPF_JGE | BPF_K] = jge_imm, 1360 [BPF_JMP | BPF_JLT | BPF_K] = jlt_imm, 1361 [BPF_JMP | BPF_JLE | BPF_K] = jle_imm, 1362 [BPF_JMP | BPF_JSET | BPF_K] = jset_imm, 1363 [BPF_JMP | BPF_JNE | BPF_K] = jne_imm, 1364 [BPF_JMP | BPF_JEQ | BPF_X] = jeq_reg, 1365 [BPF_JMP | BPF_JGT | BPF_X] = jgt_reg, 1366 [BPF_JMP | BPF_JGE | BPF_X] = jge_reg, 1367 [BPF_JMP | BPF_JLT | BPF_X] = jlt_reg, 1368 [BPF_JMP | BPF_JLE | BPF_X] = jle_reg, 1369 [BPF_JMP | BPF_JSET | BPF_X] = jset_reg, 1370 [BPF_JMP | BPF_JNE | BPF_X] = jne_reg, 1371 [BPF_JMP | BPF_EXIT] = goto_out, 1372 }; 1373 1374 /* --- Misc code --- */ 1375 static void br_set_offset(u64 *instr, u16 offset) 1376 { 1377 u16 addr_lo, addr_hi; 1378 1379 addr_lo = offset & (OP_BR_ADDR_LO >> __bf_shf(OP_BR_ADDR_LO)); 1380 addr_hi = offset != addr_lo; 1381 *instr &= ~(OP_BR_ADDR_HI | OP_BR_ADDR_LO); 1382 *instr |= FIELD_PREP(OP_BR_ADDR_HI, addr_hi); 1383 *instr |= FIELD_PREP(OP_BR_ADDR_LO, addr_lo); 1384 } 1385 1386 /* --- Assembler logic --- */ 1387 static int nfp_fixup_branches(struct nfp_prog *nfp_prog) 1388 { 1389 struct nfp_insn_meta *meta, *next; 1390 u32 off, br_idx; 1391 u32 idx; 1392 1393 nfp_for_each_insn_walk2(nfp_prog, meta, next) { 1394 if (meta->skip) 1395 continue; 1396 if (BPF_CLASS(meta->insn.code) != BPF_JMP) 1397 continue; 1398 1399 br_idx = nfp_prog_offset_to_index(nfp_prog, next->off) - 1; 1400 if (!nfp_is_br(nfp_prog->prog[br_idx])) { 1401 pr_err("Fixup found block not ending in branch %d %02x %016llx!!\n", 1402 br_idx, meta->insn.code, nfp_prog->prog[br_idx]); 1403 return -ELOOP; 1404 } 1405 /* Leave special branches for later */ 1406 if (FIELD_GET(OP_BR_SPECIAL, nfp_prog->prog[br_idx])) 1407 continue; 1408 1409 /* Find the target offset in assembler realm */ 1410 off = meta->insn.off; 1411 if (!off) { 1412 pr_err("Fixup found zero offset!!\n"); 1413 return -ELOOP; 1414 } 1415 1416 while (off && nfp_meta_has_next(nfp_prog, next)) { 1417 next = nfp_meta_next(next); 1418 off--; 1419 } 1420 if (off) { 1421 pr_err("Fixup found too large jump!! %d\n", off); 1422 return -ELOOP; 1423 } 1424 1425 if (next->skip) { 1426 pr_err("Branch landing on removed instruction!!\n"); 1427 return -ELOOP; 1428 } 1429 1430 for (idx = nfp_prog_offset_to_index(nfp_prog, meta->off); 1431 idx <= br_idx; idx++) { 1432 if (!nfp_is_br(nfp_prog->prog[idx])) 1433 continue; 1434 br_set_offset(&nfp_prog->prog[idx], next->off); 1435 } 1436 } 1437 1438 /* Fixup 'goto out's separately, they can be scattered around */ 1439 for (br_idx = 0; br_idx < nfp_prog->prog_len; br_idx++) { 1440 enum br_special special; 1441 1442 if ((nfp_prog->prog[br_idx] & OP_BR_BASE_MASK) != OP_BR_BASE) 1443 continue; 1444 1445 special = FIELD_GET(OP_BR_SPECIAL, nfp_prog->prog[br_idx]); 1446 switch (special) { 1447 case OP_BR_NORMAL: 1448 break; 1449 case OP_BR_GO_OUT: 1450 br_set_offset(&nfp_prog->prog[br_idx], 1451 nfp_prog->tgt_out); 1452 break; 1453 case OP_BR_GO_ABORT: 1454 br_set_offset(&nfp_prog->prog[br_idx], 1455 nfp_prog->tgt_abort); 1456 break; 1457 } 1458 1459 nfp_prog->prog[br_idx] &= ~OP_BR_SPECIAL; 1460 } 1461 1462 return 0; 1463 } 1464 1465 static void nfp_intro(struct nfp_prog *nfp_prog) 1466 { 1467 wrp_immed(nfp_prog, plen_reg(nfp_prog), GENMASK(13, 0)); 1468 emit_alu(nfp_prog, plen_reg(nfp_prog), 1469 plen_reg(nfp_prog), ALU_OP_AND, pv_len(nfp_prog)); 1470 } 1471 1472 static void nfp_outro_tc_legacy(struct nfp_prog *nfp_prog) 1473 { 1474 const u8 act2code[] = { 1475 [NN_ACT_TC_DROP] = 0x22, 1476 [NN_ACT_TC_REDIR] = 0x24 1477 }; 1478 /* Target for aborts */ 1479 nfp_prog->tgt_abort = nfp_prog_current_offset(nfp_prog); 1480 wrp_immed(nfp_prog, reg_both(0), 0); 1481 1482 /* Target for normal exits */ 1483 nfp_prog->tgt_out = nfp_prog_current_offset(nfp_prog); 1484 /* Legacy TC mode: 1485 * 0 0x11 -> pass, count as stat0 1486 * -1 drop 0x22 -> drop, count as stat1 1487 * redir 0x24 -> redir, count as stat1 1488 * ife mark 0x21 -> pass, count as stat1 1489 * ife + tx 0x24 -> redir, count as stat1 1490 */ 1491 emit_br_byte_neq(nfp_prog, reg_b(0), 0xff, 0, nfp_prog->tgt_done, 2); 1492 wrp_mov(nfp_prog, reg_a(0), NFP_BPF_ABI_FLAGS); 1493 emit_ld_field(nfp_prog, reg_a(0), 0xc, reg_imm(0x11), SHF_SC_L_SHF, 16); 1494 1495 emit_br(nfp_prog, BR_UNC, nfp_prog->tgt_done, 1); 1496 emit_ld_field(nfp_prog, reg_a(0), 0xc, reg_imm(act2code[nfp_prog->act]), 1497 SHF_SC_L_SHF, 16); 1498 } 1499 1500 static void nfp_outro_tc_da(struct nfp_prog *nfp_prog) 1501 { 1502 /* TC direct-action mode: 1503 * 0,1 ok NOT SUPPORTED[1] 1504 * 2 drop 0x22 -> drop, count as stat1 1505 * 4,5 nuke 0x02 -> drop 1506 * 7 redir 0x44 -> redir, count as stat2 1507 * * unspec 0x11 -> pass, count as stat0 1508 * 1509 * [1] We can't support OK and RECLASSIFY because we can't tell TC 1510 * the exact decision made. We are forced to support UNSPEC 1511 * to handle aborts so that's the only one we handle for passing 1512 * packets up the stack. 1513 */ 1514 /* Target for aborts */ 1515 nfp_prog->tgt_abort = nfp_prog_current_offset(nfp_prog); 1516 1517 emit_br_def(nfp_prog, nfp_prog->tgt_done, 2); 1518 1519 wrp_mov(nfp_prog, reg_a(0), NFP_BPF_ABI_FLAGS); 1520 emit_ld_field(nfp_prog, reg_a(0), 0xc, reg_imm(0x11), SHF_SC_L_SHF, 16); 1521 1522 /* Target for normal exits */ 1523 nfp_prog->tgt_out = nfp_prog_current_offset(nfp_prog); 1524 1525 /* if R0 > 7 jump to abort */ 1526 emit_alu(nfp_prog, reg_none(), reg_imm(7), ALU_OP_SUB, reg_b(0)); 1527 emit_br(nfp_prog, BR_BLO, nfp_prog->tgt_abort, 0); 1528 wrp_mov(nfp_prog, reg_a(0), NFP_BPF_ABI_FLAGS); 1529 1530 wrp_immed(nfp_prog, reg_b(2), 0x41221211); 1531 wrp_immed(nfp_prog, reg_b(3), 0x41001211); 1532 1533 emit_shf(nfp_prog, reg_a(1), 1534 reg_none(), SHF_OP_NONE, reg_b(0), SHF_SC_L_SHF, 2); 1535 1536 emit_alu(nfp_prog, reg_none(), reg_a(1), ALU_OP_OR, reg_imm(0)); 1537 emit_shf(nfp_prog, reg_a(2), 1538 reg_imm(0xf), SHF_OP_AND, reg_b(2), SHF_SC_R_SHF, 0); 1539 1540 emit_alu(nfp_prog, reg_none(), reg_a(1), ALU_OP_OR, reg_imm(0)); 1541 emit_shf(nfp_prog, reg_b(2), 1542 reg_imm(0xf), SHF_OP_AND, reg_b(3), SHF_SC_R_SHF, 0); 1543 1544 emit_br_def(nfp_prog, nfp_prog->tgt_done, 2); 1545 1546 emit_shf(nfp_prog, reg_b(2), 1547 reg_a(2), SHF_OP_OR, reg_b(2), SHF_SC_L_SHF, 4); 1548 emit_ld_field(nfp_prog, reg_a(0), 0xc, reg_b(2), SHF_SC_L_SHF, 16); 1549 } 1550 1551 static void nfp_outro_xdp(struct nfp_prog *nfp_prog) 1552 { 1553 /* XDP return codes: 1554 * 0 aborted 0x82 -> drop, count as stat3 1555 * 1 drop 0x22 -> drop, count as stat1 1556 * 2 pass 0x11 -> pass, count as stat0 1557 * 3 tx 0x44 -> redir, count as stat2 1558 * * unknown 0x82 -> drop, count as stat3 1559 */ 1560 /* Target for aborts */ 1561 nfp_prog->tgt_abort = nfp_prog_current_offset(nfp_prog); 1562 1563 emit_br_def(nfp_prog, nfp_prog->tgt_done, 2); 1564 1565 wrp_mov(nfp_prog, reg_a(0), NFP_BPF_ABI_FLAGS); 1566 emit_ld_field(nfp_prog, reg_a(0), 0xc, reg_imm(0x82), SHF_SC_L_SHF, 16); 1567 1568 /* Target for normal exits */ 1569 nfp_prog->tgt_out = nfp_prog_current_offset(nfp_prog); 1570 1571 /* if R0 > 3 jump to abort */ 1572 emit_alu(nfp_prog, reg_none(), reg_imm(3), ALU_OP_SUB, reg_b(0)); 1573 emit_br(nfp_prog, BR_BLO, nfp_prog->tgt_abort, 0); 1574 1575 wrp_immed(nfp_prog, reg_b(2), 0x44112282); 1576 1577 emit_shf(nfp_prog, reg_a(1), 1578 reg_none(), SHF_OP_NONE, reg_b(0), SHF_SC_L_SHF, 3); 1579 1580 emit_alu(nfp_prog, reg_none(), reg_a(1), ALU_OP_OR, reg_imm(0)); 1581 emit_shf(nfp_prog, reg_b(2), 1582 reg_imm(0xff), SHF_OP_AND, reg_b(2), SHF_SC_R_SHF, 0); 1583 1584 emit_br_def(nfp_prog, nfp_prog->tgt_done, 2); 1585 1586 wrp_mov(nfp_prog, reg_a(0), NFP_BPF_ABI_FLAGS); 1587 emit_ld_field(nfp_prog, reg_a(0), 0xc, reg_b(2), SHF_SC_L_SHF, 16); 1588 } 1589 1590 static void nfp_outro(struct nfp_prog *nfp_prog) 1591 { 1592 switch (nfp_prog->act) { 1593 case NN_ACT_DIRECT: 1594 nfp_outro_tc_da(nfp_prog); 1595 break; 1596 case NN_ACT_TC_DROP: 1597 case NN_ACT_TC_REDIR: 1598 nfp_outro_tc_legacy(nfp_prog); 1599 break; 1600 case NN_ACT_XDP: 1601 nfp_outro_xdp(nfp_prog); 1602 break; 1603 } 1604 } 1605 1606 static int nfp_translate(struct nfp_prog *nfp_prog) 1607 { 1608 struct nfp_insn_meta *meta; 1609 int i, err; 1610 1611 nfp_intro(nfp_prog); 1612 if (nfp_prog->error) 1613 return nfp_prog->error; 1614 1615 list_for_each_entry(meta, &nfp_prog->insns, l) { 1616 instr_cb_t cb = instr_cb[meta->insn.code]; 1617 1618 meta->off = nfp_prog_current_offset(nfp_prog); 1619 1620 if (meta->skip) { 1621 nfp_prog->n_translated++; 1622 continue; 1623 } 1624 1625 if (nfp_meta_has_prev(nfp_prog, meta) && 1626 nfp_meta_prev(meta)->double_cb) 1627 cb = nfp_meta_prev(meta)->double_cb; 1628 if (!cb) 1629 return -ENOENT; 1630 err = cb(nfp_prog, meta); 1631 if (err) 1632 return err; 1633 1634 nfp_prog->n_translated++; 1635 } 1636 1637 nfp_outro(nfp_prog); 1638 if (nfp_prog->error) 1639 return nfp_prog->error; 1640 1641 for (i = 0; i < NFP_USTORE_PREFETCH_WINDOW; i++) 1642 emit_nop(nfp_prog); 1643 if (nfp_prog->error) 1644 return nfp_prog->error; 1645 1646 return nfp_fixup_branches(nfp_prog); 1647 } 1648 1649 static int 1650 nfp_prog_prepare(struct nfp_prog *nfp_prog, const struct bpf_insn *prog, 1651 unsigned int cnt) 1652 { 1653 unsigned int i; 1654 1655 for (i = 0; i < cnt; i++) { 1656 struct nfp_insn_meta *meta; 1657 1658 meta = kzalloc(sizeof(*meta), GFP_KERNEL); 1659 if (!meta) 1660 return -ENOMEM; 1661 1662 meta->insn = prog[i]; 1663 meta->n = i; 1664 1665 list_add_tail(&meta->l, &nfp_prog->insns); 1666 } 1667 1668 return 0; 1669 } 1670 1671 /* --- Optimizations --- */ 1672 static void nfp_bpf_opt_reg_init(struct nfp_prog *nfp_prog) 1673 { 1674 struct nfp_insn_meta *meta; 1675 1676 list_for_each_entry(meta, &nfp_prog->insns, l) { 1677 struct bpf_insn insn = meta->insn; 1678 1679 /* Programs converted from cBPF start with register xoring */ 1680 if (insn.code == (BPF_ALU64 | BPF_XOR | BPF_X) && 1681 insn.src_reg == insn.dst_reg) 1682 continue; 1683 1684 /* Programs start with R6 = R1 but we ignore the skb pointer */ 1685 if (insn.code == (BPF_ALU64 | BPF_MOV | BPF_X) && 1686 insn.src_reg == 1 && insn.dst_reg == 6) 1687 meta->skip = true; 1688 1689 /* Return as soon as something doesn't match */ 1690 if (!meta->skip) 1691 return; 1692 } 1693 } 1694 1695 /* Remove masking after load since our load guarantees this is not needed */ 1696 static void nfp_bpf_opt_ld_mask(struct nfp_prog *nfp_prog) 1697 { 1698 struct nfp_insn_meta *meta1, *meta2; 1699 const s32 exp_mask[] = { 1700 [BPF_B] = 0x000000ffU, 1701 [BPF_H] = 0x0000ffffU, 1702 [BPF_W] = 0xffffffffU, 1703 }; 1704 1705 nfp_for_each_insn_walk2(nfp_prog, meta1, meta2) { 1706 struct bpf_insn insn, next; 1707 1708 insn = meta1->insn; 1709 next = meta2->insn; 1710 1711 if (BPF_CLASS(insn.code) != BPF_LD) 1712 continue; 1713 if (BPF_MODE(insn.code) != BPF_ABS && 1714 BPF_MODE(insn.code) != BPF_IND) 1715 continue; 1716 1717 if (next.code != (BPF_ALU64 | BPF_AND | BPF_K)) 1718 continue; 1719 1720 if (!exp_mask[BPF_SIZE(insn.code)]) 1721 continue; 1722 if (exp_mask[BPF_SIZE(insn.code)] != next.imm) 1723 continue; 1724 1725 if (next.src_reg || next.dst_reg) 1726 continue; 1727 1728 meta2->skip = true; 1729 } 1730 } 1731 1732 static void nfp_bpf_opt_ld_shift(struct nfp_prog *nfp_prog) 1733 { 1734 struct nfp_insn_meta *meta1, *meta2, *meta3; 1735 1736 nfp_for_each_insn_walk3(nfp_prog, meta1, meta2, meta3) { 1737 struct bpf_insn insn, next1, next2; 1738 1739 insn = meta1->insn; 1740 next1 = meta2->insn; 1741 next2 = meta3->insn; 1742 1743 if (BPF_CLASS(insn.code) != BPF_LD) 1744 continue; 1745 if (BPF_MODE(insn.code) != BPF_ABS && 1746 BPF_MODE(insn.code) != BPF_IND) 1747 continue; 1748 if (BPF_SIZE(insn.code) != BPF_W) 1749 continue; 1750 1751 if (!(next1.code == (BPF_LSH | BPF_K | BPF_ALU64) && 1752 next2.code == (BPF_RSH | BPF_K | BPF_ALU64)) && 1753 !(next1.code == (BPF_RSH | BPF_K | BPF_ALU64) && 1754 next2.code == (BPF_LSH | BPF_K | BPF_ALU64))) 1755 continue; 1756 1757 if (next1.src_reg || next1.dst_reg || 1758 next2.src_reg || next2.dst_reg) 1759 continue; 1760 1761 if (next1.imm != 0x20 || next2.imm != 0x20) 1762 continue; 1763 1764 meta2->skip = true; 1765 meta3->skip = true; 1766 } 1767 } 1768 1769 static int nfp_bpf_optimize(struct nfp_prog *nfp_prog) 1770 { 1771 nfp_bpf_opt_reg_init(nfp_prog); 1772 1773 nfp_bpf_opt_ld_mask(nfp_prog); 1774 nfp_bpf_opt_ld_shift(nfp_prog); 1775 1776 return 0; 1777 } 1778 1779 static int nfp_bpf_ustore_calc(struct nfp_prog *nfp_prog, __le64 *ustore) 1780 { 1781 int i; 1782 1783 for (i = 0; i < nfp_prog->prog_len; i++) { 1784 int err; 1785 1786 err = nfp_ustore_check_valid_no_ecc(nfp_prog->prog[i]); 1787 if (err) 1788 return err; 1789 1790 nfp_prog->prog[i] = nfp_ustore_calc_ecc_insn(nfp_prog->prog[i]); 1791 1792 ustore[i] = cpu_to_le64(nfp_prog->prog[i]); 1793 } 1794 1795 return 0; 1796 } 1797 1798 /** 1799 * nfp_bpf_jit() - translate BPF code into NFP assembly 1800 * @filter: kernel BPF filter struct 1801 * @prog_mem: memory to store assembler instructions 1802 * @act: action attached to this eBPF program 1803 * @prog_start: offset of the first instruction when loaded 1804 * @prog_done: where to jump on exit 1805 * @prog_sz: size of @prog_mem in instructions 1806 * @res: achieved parameters of translation results 1807 */ 1808 int 1809 nfp_bpf_jit(struct bpf_prog *filter, void *prog_mem, 1810 enum nfp_bpf_action_type act, 1811 unsigned int prog_start, unsigned int prog_done, 1812 unsigned int prog_sz, struct nfp_bpf_result *res) 1813 { 1814 struct nfp_prog *nfp_prog; 1815 int ret; 1816 1817 nfp_prog = kzalloc(sizeof(*nfp_prog), GFP_KERNEL); 1818 if (!nfp_prog) 1819 return -ENOMEM; 1820 1821 INIT_LIST_HEAD(&nfp_prog->insns); 1822 nfp_prog->act = act; 1823 nfp_prog->start_off = prog_start; 1824 nfp_prog->tgt_done = prog_done; 1825 1826 ret = nfp_prog_prepare(nfp_prog, filter->insnsi, filter->len); 1827 if (ret) 1828 goto out; 1829 1830 ret = nfp_prog_verify(nfp_prog, filter); 1831 if (ret) 1832 goto out; 1833 1834 ret = nfp_bpf_optimize(nfp_prog); 1835 if (ret) 1836 goto out; 1837 1838 nfp_prog->num_regs = MAX_BPF_REG; 1839 nfp_prog->regs_per_thread = 32; 1840 1841 nfp_prog->prog = prog_mem; 1842 nfp_prog->__prog_alloc_len = prog_sz; 1843 1844 ret = nfp_translate(nfp_prog); 1845 if (ret) { 1846 pr_err("Translation failed with error %d (translated: %u)\n", 1847 ret, nfp_prog->n_translated); 1848 ret = -EINVAL; 1849 goto out; 1850 } 1851 1852 ret = nfp_bpf_ustore_calc(nfp_prog, (__force __le64 *)prog_mem); 1853 1854 res->n_instr = nfp_prog->prog_len; 1855 res->dense_mode = false; 1856 out: 1857 nfp_prog_free(nfp_prog); 1858 1859 return ret; 1860 } 1861