1 /* 2 * sonic.c 3 * 4 * (C) 2005 Finn Thain 5 * 6 * Converted to DMA API, added zero-copy buffer handling, and 7 * (from the mac68k project) introduced dhd's support for 16-bit cards. 8 * 9 * (C) 1996,1998 by Thomas Bogendoerfer (tsbogend@alpha.franken.de) 10 * 11 * This driver is based on work from Andreas Busse, but most of 12 * the code is rewritten. 13 * 14 * (C) 1995 by Andreas Busse (andy@waldorf-gmbh.de) 15 * 16 * Core code included by system sonic drivers 17 * 18 * And... partially rewritten again by David Huggins-Daines in order 19 * to cope with screwed up Macintosh NICs that may or may not use 20 * 16-bit DMA. 21 * 22 * (C) 1999 David Huggins-Daines <dhd@debian.org> 23 * 24 */ 25 26 /* 27 * Sources: Olivetti M700-10 Risc Personal Computer hardware handbook, 28 * National Semiconductors data sheet for the DP83932B Sonic Ethernet 29 * controller, and the files "8390.c" and "skeleton.c" in this directory. 30 * 31 * Additional sources: Nat Semi data sheet for the DP83932C and Nat Semi 32 * Application Note AN-746, the files "lance.c" and "ibmlana.c". See also 33 * the NetBSD file "sys/arch/mac68k/dev/if_sn.c". 34 */ 35 36 static unsigned int version_printed; 37 38 static int sonic_debug = -1; 39 module_param(sonic_debug, int, 0); 40 MODULE_PARM_DESC(sonic_debug, "debug message level"); 41 42 static void sonic_msg_init(struct net_device *dev) 43 { 44 struct sonic_local *lp = netdev_priv(dev); 45 46 lp->msg_enable = netif_msg_init(sonic_debug, 0); 47 48 if (version_printed++ == 0) 49 netif_dbg(lp, drv, dev, "%s", version); 50 } 51 52 /* 53 * Open/initialize the SONIC controller. 54 * 55 * This routine should set everything up anew at each open, even 56 * registers that "should" only need to be set once at boot, so that 57 * there is non-reboot way to recover if something goes wrong. 58 */ 59 static int sonic_open(struct net_device *dev) 60 { 61 struct sonic_local *lp = netdev_priv(dev); 62 int i; 63 64 netif_dbg(lp, ifup, dev, "%s: initializing sonic driver\n", __func__); 65 66 for (i = 0; i < SONIC_NUM_RRS; i++) { 67 struct sk_buff *skb = netdev_alloc_skb(dev, SONIC_RBSIZE + 2); 68 if (skb == NULL) { 69 while(i > 0) { /* free any that were allocated successfully */ 70 i--; 71 dev_kfree_skb(lp->rx_skb[i]); 72 lp->rx_skb[i] = NULL; 73 } 74 printk(KERN_ERR "%s: couldn't allocate receive buffers\n", 75 dev->name); 76 return -ENOMEM; 77 } 78 /* align IP header unless DMA requires otherwise */ 79 if (SONIC_BUS_SCALE(lp->dma_bitmode) == 2) 80 skb_reserve(skb, 2); 81 lp->rx_skb[i] = skb; 82 } 83 84 for (i = 0; i < SONIC_NUM_RRS; i++) { 85 dma_addr_t laddr = dma_map_single(lp->device, skb_put(lp->rx_skb[i], SONIC_RBSIZE), 86 SONIC_RBSIZE, DMA_FROM_DEVICE); 87 if (!laddr) { 88 while(i > 0) { /* free any that were mapped successfully */ 89 i--; 90 dma_unmap_single(lp->device, lp->rx_laddr[i], SONIC_RBSIZE, DMA_FROM_DEVICE); 91 lp->rx_laddr[i] = (dma_addr_t)0; 92 } 93 for (i = 0; i < SONIC_NUM_RRS; i++) { 94 dev_kfree_skb(lp->rx_skb[i]); 95 lp->rx_skb[i] = NULL; 96 } 97 printk(KERN_ERR "%s: couldn't map rx DMA buffers\n", 98 dev->name); 99 return -ENOMEM; 100 } 101 lp->rx_laddr[i] = laddr; 102 } 103 104 /* 105 * Initialize the SONIC 106 */ 107 sonic_init(dev); 108 109 netif_start_queue(dev); 110 111 netif_dbg(lp, ifup, dev, "%s: Initialization done\n", __func__); 112 113 return 0; 114 } 115 116 117 /* 118 * Close the SONIC device 119 */ 120 static int sonic_close(struct net_device *dev) 121 { 122 struct sonic_local *lp = netdev_priv(dev); 123 int i; 124 125 netif_dbg(lp, ifdown, dev, "%s\n", __func__); 126 127 netif_stop_queue(dev); 128 129 /* 130 * stop the SONIC, disable interrupts 131 */ 132 SONIC_WRITE(SONIC_IMR, 0); 133 SONIC_WRITE(SONIC_ISR, 0x7fff); 134 SONIC_WRITE(SONIC_CMD, SONIC_CR_RST); 135 136 /* unmap and free skbs that haven't been transmitted */ 137 for (i = 0; i < SONIC_NUM_TDS; i++) { 138 if(lp->tx_laddr[i]) { 139 dma_unmap_single(lp->device, lp->tx_laddr[i], lp->tx_len[i], DMA_TO_DEVICE); 140 lp->tx_laddr[i] = (dma_addr_t)0; 141 } 142 if(lp->tx_skb[i]) { 143 dev_kfree_skb(lp->tx_skb[i]); 144 lp->tx_skb[i] = NULL; 145 } 146 } 147 148 /* unmap and free the receive buffers */ 149 for (i = 0; i < SONIC_NUM_RRS; i++) { 150 if(lp->rx_laddr[i]) { 151 dma_unmap_single(lp->device, lp->rx_laddr[i], SONIC_RBSIZE, DMA_FROM_DEVICE); 152 lp->rx_laddr[i] = (dma_addr_t)0; 153 } 154 if(lp->rx_skb[i]) { 155 dev_kfree_skb(lp->rx_skb[i]); 156 lp->rx_skb[i] = NULL; 157 } 158 } 159 160 return 0; 161 } 162 163 static void sonic_tx_timeout(struct net_device *dev) 164 { 165 struct sonic_local *lp = netdev_priv(dev); 166 int i; 167 /* 168 * put the Sonic into software-reset mode and 169 * disable all interrupts before releasing DMA buffers 170 */ 171 SONIC_WRITE(SONIC_IMR, 0); 172 SONIC_WRITE(SONIC_ISR, 0x7fff); 173 SONIC_WRITE(SONIC_CMD, SONIC_CR_RST); 174 /* We could resend the original skbs. Easier to re-initialise. */ 175 for (i = 0; i < SONIC_NUM_TDS; i++) { 176 if(lp->tx_laddr[i]) { 177 dma_unmap_single(lp->device, lp->tx_laddr[i], lp->tx_len[i], DMA_TO_DEVICE); 178 lp->tx_laddr[i] = (dma_addr_t)0; 179 } 180 if(lp->tx_skb[i]) { 181 dev_kfree_skb(lp->tx_skb[i]); 182 lp->tx_skb[i] = NULL; 183 } 184 } 185 /* Try to restart the adaptor. */ 186 sonic_init(dev); 187 lp->stats.tx_errors++; 188 netif_trans_update(dev); /* prevent tx timeout */ 189 netif_wake_queue(dev); 190 } 191 192 /* 193 * transmit packet 194 * 195 * Appends new TD during transmission thus avoiding any TX interrupts 196 * until we run out of TDs. 197 * This routine interacts closely with the ISR in that it may, 198 * set tx_skb[i] 199 * reset the status flags of the new TD 200 * set and reset EOL flags 201 * stop the tx queue 202 * The ISR interacts with this routine in various ways. It may, 203 * reset tx_skb[i] 204 * test the EOL and status flags of the TDs 205 * wake the tx queue 206 * Concurrently with all of this, the SONIC is potentially writing to 207 * the status flags of the TDs. 208 * Until some mutual exclusion is added, this code will not work with SMP. However, 209 * MIPS Jazz machines and m68k Macs were all uni-processor machines. 210 */ 211 212 static int sonic_send_packet(struct sk_buff *skb, struct net_device *dev) 213 { 214 struct sonic_local *lp = netdev_priv(dev); 215 dma_addr_t laddr; 216 int length; 217 int entry = lp->next_tx; 218 219 netif_dbg(lp, tx_queued, dev, "%s: skb=%p\n", __func__, skb); 220 221 length = skb->len; 222 if (length < ETH_ZLEN) { 223 if (skb_padto(skb, ETH_ZLEN)) 224 return NETDEV_TX_OK; 225 length = ETH_ZLEN; 226 } 227 228 /* 229 * Map the packet data into the logical DMA address space 230 */ 231 232 laddr = dma_map_single(lp->device, skb->data, length, DMA_TO_DEVICE); 233 if (!laddr) { 234 printk(KERN_ERR "%s: failed to map tx DMA buffer.\n", dev->name); 235 dev_kfree_skb(skb); 236 return NETDEV_TX_BUSY; 237 } 238 239 sonic_tda_put(dev, entry, SONIC_TD_STATUS, 0); /* clear status */ 240 sonic_tda_put(dev, entry, SONIC_TD_FRAG_COUNT, 1); /* single fragment */ 241 sonic_tda_put(dev, entry, SONIC_TD_PKTSIZE, length); /* length of packet */ 242 sonic_tda_put(dev, entry, SONIC_TD_FRAG_PTR_L, laddr & 0xffff); 243 sonic_tda_put(dev, entry, SONIC_TD_FRAG_PTR_H, laddr >> 16); 244 sonic_tda_put(dev, entry, SONIC_TD_FRAG_SIZE, length); 245 sonic_tda_put(dev, entry, SONIC_TD_LINK, 246 sonic_tda_get(dev, entry, SONIC_TD_LINK) | SONIC_EOL); 247 248 /* 249 * Must set tx_skb[entry] only after clearing status, and 250 * before clearing EOL and before stopping queue 251 */ 252 wmb(); 253 lp->tx_len[entry] = length; 254 lp->tx_laddr[entry] = laddr; 255 lp->tx_skb[entry] = skb; 256 257 wmb(); 258 sonic_tda_put(dev, lp->eol_tx, SONIC_TD_LINK, 259 sonic_tda_get(dev, lp->eol_tx, SONIC_TD_LINK) & ~SONIC_EOL); 260 lp->eol_tx = entry; 261 262 lp->next_tx = (entry + 1) & SONIC_TDS_MASK; 263 if (lp->tx_skb[lp->next_tx] != NULL) { 264 /* The ring is full, the ISR has yet to process the next TD. */ 265 netif_dbg(lp, tx_queued, dev, "%s: stopping queue\n", __func__); 266 netif_stop_queue(dev); 267 /* after this packet, wait for ISR to free up some TDAs */ 268 } else netif_start_queue(dev); 269 270 netif_dbg(lp, tx_queued, dev, "%s: issuing Tx command\n", __func__); 271 272 SONIC_WRITE(SONIC_CMD, SONIC_CR_TXP); 273 274 return NETDEV_TX_OK; 275 } 276 277 /* 278 * The typical workload of the driver: 279 * Handle the network interface interrupts. 280 */ 281 static irqreturn_t sonic_interrupt(int irq, void *dev_id) 282 { 283 struct net_device *dev = dev_id; 284 struct sonic_local *lp = netdev_priv(dev); 285 int status; 286 287 if (!(status = SONIC_READ(SONIC_ISR) & SONIC_IMR_DEFAULT)) 288 return IRQ_NONE; 289 290 do { 291 if (status & SONIC_INT_PKTRX) { 292 netif_dbg(lp, intr, dev, "%s: packet rx\n", __func__); 293 sonic_rx(dev); /* got packet(s) */ 294 SONIC_WRITE(SONIC_ISR, SONIC_INT_PKTRX); /* clear the interrupt */ 295 } 296 297 if (status & SONIC_INT_TXDN) { 298 int entry = lp->cur_tx; 299 int td_status; 300 int freed_some = 0; 301 302 /* At this point, cur_tx is the index of a TD that is one of: 303 * unallocated/freed (status set & tx_skb[entry] clear) 304 * allocated and sent (status set & tx_skb[entry] set ) 305 * allocated and not yet sent (status clear & tx_skb[entry] set ) 306 * still being allocated by sonic_send_packet (status clear & tx_skb[entry] clear) 307 */ 308 309 netif_dbg(lp, intr, dev, "%s: tx done\n", __func__); 310 311 while (lp->tx_skb[entry] != NULL) { 312 if ((td_status = sonic_tda_get(dev, entry, SONIC_TD_STATUS)) == 0) 313 break; 314 315 if (td_status & 0x0001) { 316 lp->stats.tx_packets++; 317 lp->stats.tx_bytes += sonic_tda_get(dev, entry, SONIC_TD_PKTSIZE); 318 } else { 319 lp->stats.tx_errors++; 320 if (td_status & 0x0642) 321 lp->stats.tx_aborted_errors++; 322 if (td_status & 0x0180) 323 lp->stats.tx_carrier_errors++; 324 if (td_status & 0x0020) 325 lp->stats.tx_window_errors++; 326 if (td_status & 0x0004) 327 lp->stats.tx_fifo_errors++; 328 } 329 330 /* We must free the original skb */ 331 dev_kfree_skb_irq(lp->tx_skb[entry]); 332 lp->tx_skb[entry] = NULL; 333 /* and unmap DMA buffer */ 334 dma_unmap_single(lp->device, lp->tx_laddr[entry], lp->tx_len[entry], DMA_TO_DEVICE); 335 lp->tx_laddr[entry] = (dma_addr_t)0; 336 freed_some = 1; 337 338 if (sonic_tda_get(dev, entry, SONIC_TD_LINK) & SONIC_EOL) { 339 entry = (entry + 1) & SONIC_TDS_MASK; 340 break; 341 } 342 entry = (entry + 1) & SONIC_TDS_MASK; 343 } 344 345 if (freed_some || lp->tx_skb[entry] == NULL) 346 netif_wake_queue(dev); /* The ring is no longer full */ 347 lp->cur_tx = entry; 348 SONIC_WRITE(SONIC_ISR, SONIC_INT_TXDN); /* clear the interrupt */ 349 } 350 351 /* 352 * check error conditions 353 */ 354 if (status & SONIC_INT_RFO) { 355 netif_dbg(lp, rx_err, dev, "%s: rx fifo overrun\n", 356 __func__); 357 lp->stats.rx_fifo_errors++; 358 SONIC_WRITE(SONIC_ISR, SONIC_INT_RFO); /* clear the interrupt */ 359 } 360 if (status & SONIC_INT_RDE) { 361 netif_dbg(lp, rx_err, dev, "%s: rx descriptors exhausted\n", 362 __func__); 363 lp->stats.rx_dropped++; 364 SONIC_WRITE(SONIC_ISR, SONIC_INT_RDE); /* clear the interrupt */ 365 } 366 if (status & SONIC_INT_RBAE) { 367 netif_dbg(lp, rx_err, dev, "%s: rx buffer area exceeded\n", 368 __func__); 369 lp->stats.rx_dropped++; 370 SONIC_WRITE(SONIC_ISR, SONIC_INT_RBAE); /* clear the interrupt */ 371 } 372 373 /* counter overruns; all counters are 16bit wide */ 374 if (status & SONIC_INT_FAE) { 375 lp->stats.rx_frame_errors += 65536; 376 SONIC_WRITE(SONIC_ISR, SONIC_INT_FAE); /* clear the interrupt */ 377 } 378 if (status & SONIC_INT_CRC) { 379 lp->stats.rx_crc_errors += 65536; 380 SONIC_WRITE(SONIC_ISR, SONIC_INT_CRC); /* clear the interrupt */ 381 } 382 if (status & SONIC_INT_MP) { 383 lp->stats.rx_missed_errors += 65536; 384 SONIC_WRITE(SONIC_ISR, SONIC_INT_MP); /* clear the interrupt */ 385 } 386 387 /* transmit error */ 388 if (status & SONIC_INT_TXER) { 389 if (SONIC_READ(SONIC_TCR) & SONIC_TCR_FU) 390 netif_dbg(lp, tx_err, dev, "%s: tx fifo underrun\n", 391 __func__); 392 SONIC_WRITE(SONIC_ISR, SONIC_INT_TXER); /* clear the interrupt */ 393 } 394 395 /* bus retry */ 396 if (status & SONIC_INT_BR) { 397 printk(KERN_ERR "%s: Bus retry occurred! Device interrupt disabled.\n", 398 dev->name); 399 /* ... to help debug DMA problems causing endless interrupts. */ 400 /* Bounce the eth interface to turn on the interrupt again. */ 401 SONIC_WRITE(SONIC_IMR, 0); 402 SONIC_WRITE(SONIC_ISR, SONIC_INT_BR); /* clear the interrupt */ 403 } 404 405 /* load CAM done */ 406 if (status & SONIC_INT_LCD) 407 SONIC_WRITE(SONIC_ISR, SONIC_INT_LCD); /* clear the interrupt */ 408 } while((status = SONIC_READ(SONIC_ISR) & SONIC_IMR_DEFAULT)); 409 return IRQ_HANDLED; 410 } 411 412 /* 413 * We have a good packet(s), pass it/them up the network stack. 414 */ 415 static void sonic_rx(struct net_device *dev) 416 { 417 struct sonic_local *lp = netdev_priv(dev); 418 int status; 419 int entry = lp->cur_rx; 420 421 while (sonic_rda_get(dev, entry, SONIC_RD_IN_USE) == 0) { 422 struct sk_buff *used_skb; 423 struct sk_buff *new_skb; 424 dma_addr_t new_laddr; 425 u16 bufadr_l; 426 u16 bufadr_h; 427 int pkt_len; 428 429 status = sonic_rda_get(dev, entry, SONIC_RD_STATUS); 430 if (status & SONIC_RCR_PRX) { 431 /* Malloc up new buffer. */ 432 new_skb = netdev_alloc_skb(dev, SONIC_RBSIZE + 2); 433 if (new_skb == NULL) { 434 lp->stats.rx_dropped++; 435 break; 436 } 437 /* provide 16 byte IP header alignment unless DMA requires otherwise */ 438 if(SONIC_BUS_SCALE(lp->dma_bitmode) == 2) 439 skb_reserve(new_skb, 2); 440 441 new_laddr = dma_map_single(lp->device, skb_put(new_skb, SONIC_RBSIZE), 442 SONIC_RBSIZE, DMA_FROM_DEVICE); 443 if (!new_laddr) { 444 dev_kfree_skb(new_skb); 445 printk(KERN_ERR "%s: Failed to map rx buffer, dropping packet.\n", dev->name); 446 lp->stats.rx_dropped++; 447 break; 448 } 449 450 /* now we have a new skb to replace it, pass the used one up the stack */ 451 dma_unmap_single(lp->device, lp->rx_laddr[entry], SONIC_RBSIZE, DMA_FROM_DEVICE); 452 used_skb = lp->rx_skb[entry]; 453 pkt_len = sonic_rda_get(dev, entry, SONIC_RD_PKTLEN); 454 skb_trim(used_skb, pkt_len); 455 used_skb->protocol = eth_type_trans(used_skb, dev); 456 netif_rx(used_skb); 457 lp->stats.rx_packets++; 458 lp->stats.rx_bytes += pkt_len; 459 460 /* and insert the new skb */ 461 lp->rx_laddr[entry] = new_laddr; 462 lp->rx_skb[entry] = new_skb; 463 464 bufadr_l = (unsigned long)new_laddr & 0xffff; 465 bufadr_h = (unsigned long)new_laddr >> 16; 466 sonic_rra_put(dev, entry, SONIC_RR_BUFADR_L, bufadr_l); 467 sonic_rra_put(dev, entry, SONIC_RR_BUFADR_H, bufadr_h); 468 } else { 469 /* This should only happen, if we enable accepting broken packets. */ 470 lp->stats.rx_errors++; 471 if (status & SONIC_RCR_FAER) 472 lp->stats.rx_frame_errors++; 473 if (status & SONIC_RCR_CRCR) 474 lp->stats.rx_crc_errors++; 475 } 476 if (status & SONIC_RCR_LPKT) { 477 /* 478 * this was the last packet out of the current receive buffer 479 * give the buffer back to the SONIC 480 */ 481 lp->cur_rwp += SIZEOF_SONIC_RR * SONIC_BUS_SCALE(lp->dma_bitmode); 482 if (lp->cur_rwp >= lp->rra_end) lp->cur_rwp = lp->rra_laddr & 0xffff; 483 SONIC_WRITE(SONIC_RWP, lp->cur_rwp); 484 if (SONIC_READ(SONIC_ISR) & SONIC_INT_RBE) { 485 netif_dbg(lp, rx_err, dev, "%s: rx buffer exhausted\n", 486 __func__); 487 SONIC_WRITE(SONIC_ISR, SONIC_INT_RBE); /* clear the flag */ 488 } 489 } else 490 printk(KERN_ERR "%s: rx desc without RCR_LPKT. Shouldn't happen !?\n", 491 dev->name); 492 /* 493 * give back the descriptor 494 */ 495 sonic_rda_put(dev, entry, SONIC_RD_LINK, 496 sonic_rda_get(dev, entry, SONIC_RD_LINK) | SONIC_EOL); 497 sonic_rda_put(dev, entry, SONIC_RD_IN_USE, 1); 498 sonic_rda_put(dev, lp->eol_rx, SONIC_RD_LINK, 499 sonic_rda_get(dev, lp->eol_rx, SONIC_RD_LINK) & ~SONIC_EOL); 500 lp->eol_rx = entry; 501 lp->cur_rx = entry = (entry + 1) & SONIC_RDS_MASK; 502 } 503 /* 504 * If any worth-while packets have been received, netif_rx() 505 * has done a mark_bh(NET_BH) for us and will work on them 506 * when we get to the bottom-half routine. 507 */ 508 } 509 510 511 /* 512 * Get the current statistics. 513 * This may be called with the device open or closed. 514 */ 515 static struct net_device_stats *sonic_get_stats(struct net_device *dev) 516 { 517 struct sonic_local *lp = netdev_priv(dev); 518 519 /* read the tally counter from the SONIC and reset them */ 520 lp->stats.rx_crc_errors += SONIC_READ(SONIC_CRCT); 521 SONIC_WRITE(SONIC_CRCT, 0xffff); 522 lp->stats.rx_frame_errors += SONIC_READ(SONIC_FAET); 523 SONIC_WRITE(SONIC_FAET, 0xffff); 524 lp->stats.rx_missed_errors += SONIC_READ(SONIC_MPT); 525 SONIC_WRITE(SONIC_MPT, 0xffff); 526 527 return &lp->stats; 528 } 529 530 531 /* 532 * Set or clear the multicast filter for this adaptor. 533 */ 534 static void sonic_multicast_list(struct net_device *dev) 535 { 536 struct sonic_local *lp = netdev_priv(dev); 537 unsigned int rcr; 538 struct netdev_hw_addr *ha; 539 unsigned char *addr; 540 int i; 541 542 rcr = SONIC_READ(SONIC_RCR) & ~(SONIC_RCR_PRO | SONIC_RCR_AMC); 543 rcr |= SONIC_RCR_BRD; /* accept broadcast packets */ 544 545 if (dev->flags & IFF_PROMISC) { /* set promiscuous mode */ 546 rcr |= SONIC_RCR_PRO; 547 } else { 548 if ((dev->flags & IFF_ALLMULTI) || 549 (netdev_mc_count(dev) > 15)) { 550 rcr |= SONIC_RCR_AMC; 551 } else { 552 netif_dbg(lp, ifup, dev, "%s: mc_count %d\n", __func__, 553 netdev_mc_count(dev)); 554 sonic_set_cam_enable(dev, 1); /* always enable our own address */ 555 i = 1; 556 netdev_for_each_mc_addr(ha, dev) { 557 addr = ha->addr; 558 sonic_cda_put(dev, i, SONIC_CD_CAP0, addr[1] << 8 | addr[0]); 559 sonic_cda_put(dev, i, SONIC_CD_CAP1, addr[3] << 8 | addr[2]); 560 sonic_cda_put(dev, i, SONIC_CD_CAP2, addr[5] << 8 | addr[4]); 561 sonic_set_cam_enable(dev, sonic_get_cam_enable(dev) | (1 << i)); 562 i++; 563 } 564 SONIC_WRITE(SONIC_CDC, 16); 565 /* issue Load CAM command */ 566 SONIC_WRITE(SONIC_CDP, lp->cda_laddr & 0xffff); 567 SONIC_WRITE(SONIC_CMD, SONIC_CR_LCAM); 568 } 569 } 570 571 netif_dbg(lp, ifup, dev, "%s: setting RCR=%x\n", __func__, rcr); 572 573 SONIC_WRITE(SONIC_RCR, rcr); 574 } 575 576 577 /* 578 * Initialize the SONIC ethernet controller. 579 */ 580 static int sonic_init(struct net_device *dev) 581 { 582 unsigned int cmd; 583 struct sonic_local *lp = netdev_priv(dev); 584 int i; 585 586 /* 587 * put the Sonic into software-reset mode and 588 * disable all interrupts 589 */ 590 SONIC_WRITE(SONIC_IMR, 0); 591 SONIC_WRITE(SONIC_ISR, 0x7fff); 592 SONIC_WRITE(SONIC_CMD, SONIC_CR_RST); 593 594 /* 595 * clear software reset flag, disable receiver, clear and 596 * enable interrupts, then completely initialize the SONIC 597 */ 598 SONIC_WRITE(SONIC_CMD, 0); 599 SONIC_WRITE(SONIC_CMD, SONIC_CR_RXDIS); 600 601 /* 602 * initialize the receive resource area 603 */ 604 netif_dbg(lp, ifup, dev, "%s: initialize receive resource area\n", 605 __func__); 606 607 for (i = 0; i < SONIC_NUM_RRS; i++) { 608 u16 bufadr_l = (unsigned long)lp->rx_laddr[i] & 0xffff; 609 u16 bufadr_h = (unsigned long)lp->rx_laddr[i] >> 16; 610 sonic_rra_put(dev, i, SONIC_RR_BUFADR_L, bufadr_l); 611 sonic_rra_put(dev, i, SONIC_RR_BUFADR_H, bufadr_h); 612 sonic_rra_put(dev, i, SONIC_RR_BUFSIZE_L, SONIC_RBSIZE >> 1); 613 sonic_rra_put(dev, i, SONIC_RR_BUFSIZE_H, 0); 614 } 615 616 /* initialize all RRA registers */ 617 lp->rra_end = (lp->rra_laddr + SONIC_NUM_RRS * SIZEOF_SONIC_RR * 618 SONIC_BUS_SCALE(lp->dma_bitmode)) & 0xffff; 619 lp->cur_rwp = (lp->rra_laddr + (SONIC_NUM_RRS - 1) * SIZEOF_SONIC_RR * 620 SONIC_BUS_SCALE(lp->dma_bitmode)) & 0xffff; 621 622 SONIC_WRITE(SONIC_RSA, lp->rra_laddr & 0xffff); 623 SONIC_WRITE(SONIC_REA, lp->rra_end); 624 SONIC_WRITE(SONIC_RRP, lp->rra_laddr & 0xffff); 625 SONIC_WRITE(SONIC_RWP, lp->cur_rwp); 626 SONIC_WRITE(SONIC_URRA, lp->rra_laddr >> 16); 627 SONIC_WRITE(SONIC_EOBC, (SONIC_RBSIZE >> 1) - (lp->dma_bitmode ? 2 : 1)); 628 629 /* load the resource pointers */ 630 netif_dbg(lp, ifup, dev, "%s: issuing RRRA command\n", __func__); 631 632 SONIC_WRITE(SONIC_CMD, SONIC_CR_RRRA); 633 i = 0; 634 while (i++ < 100) { 635 if (SONIC_READ(SONIC_CMD) & SONIC_CR_RRRA) 636 break; 637 } 638 639 netif_dbg(lp, ifup, dev, "%s: status=%x, i=%d\n", __func__, 640 SONIC_READ(SONIC_CMD), i); 641 642 /* 643 * Initialize the receive descriptors so that they 644 * become a circular linked list, ie. let the last 645 * descriptor point to the first again. 646 */ 647 netif_dbg(lp, ifup, dev, "%s: initialize receive descriptors\n", 648 __func__); 649 650 for (i=0; i<SONIC_NUM_RDS; i++) { 651 sonic_rda_put(dev, i, SONIC_RD_STATUS, 0); 652 sonic_rda_put(dev, i, SONIC_RD_PKTLEN, 0); 653 sonic_rda_put(dev, i, SONIC_RD_PKTPTR_L, 0); 654 sonic_rda_put(dev, i, SONIC_RD_PKTPTR_H, 0); 655 sonic_rda_put(dev, i, SONIC_RD_SEQNO, 0); 656 sonic_rda_put(dev, i, SONIC_RD_IN_USE, 1); 657 sonic_rda_put(dev, i, SONIC_RD_LINK, 658 lp->rda_laddr + 659 ((i+1) * SIZEOF_SONIC_RD * SONIC_BUS_SCALE(lp->dma_bitmode))); 660 } 661 /* fix last descriptor */ 662 sonic_rda_put(dev, SONIC_NUM_RDS - 1, SONIC_RD_LINK, 663 (lp->rda_laddr & 0xffff) | SONIC_EOL); 664 lp->eol_rx = SONIC_NUM_RDS - 1; 665 lp->cur_rx = 0; 666 SONIC_WRITE(SONIC_URDA, lp->rda_laddr >> 16); 667 SONIC_WRITE(SONIC_CRDA, lp->rda_laddr & 0xffff); 668 669 /* 670 * initialize transmit descriptors 671 */ 672 netif_dbg(lp, ifup, dev, "%s: initialize transmit descriptors\n", 673 __func__); 674 675 for (i = 0; i < SONIC_NUM_TDS; i++) { 676 sonic_tda_put(dev, i, SONIC_TD_STATUS, 0); 677 sonic_tda_put(dev, i, SONIC_TD_CONFIG, 0); 678 sonic_tda_put(dev, i, SONIC_TD_PKTSIZE, 0); 679 sonic_tda_put(dev, i, SONIC_TD_FRAG_COUNT, 0); 680 sonic_tda_put(dev, i, SONIC_TD_LINK, 681 (lp->tda_laddr & 0xffff) + 682 (i + 1) * SIZEOF_SONIC_TD * SONIC_BUS_SCALE(lp->dma_bitmode)); 683 lp->tx_skb[i] = NULL; 684 } 685 /* fix last descriptor */ 686 sonic_tda_put(dev, SONIC_NUM_TDS - 1, SONIC_TD_LINK, 687 (lp->tda_laddr & 0xffff)); 688 689 SONIC_WRITE(SONIC_UTDA, lp->tda_laddr >> 16); 690 SONIC_WRITE(SONIC_CTDA, lp->tda_laddr & 0xffff); 691 lp->cur_tx = lp->next_tx = 0; 692 lp->eol_tx = SONIC_NUM_TDS - 1; 693 694 /* 695 * put our own address to CAM desc[0] 696 */ 697 sonic_cda_put(dev, 0, SONIC_CD_CAP0, dev->dev_addr[1] << 8 | dev->dev_addr[0]); 698 sonic_cda_put(dev, 0, SONIC_CD_CAP1, dev->dev_addr[3] << 8 | dev->dev_addr[2]); 699 sonic_cda_put(dev, 0, SONIC_CD_CAP2, dev->dev_addr[5] << 8 | dev->dev_addr[4]); 700 sonic_set_cam_enable(dev, 1); 701 702 for (i = 0; i < 16; i++) 703 sonic_cda_put(dev, i, SONIC_CD_ENTRY_POINTER, i); 704 705 /* 706 * initialize CAM registers 707 */ 708 SONIC_WRITE(SONIC_CDP, lp->cda_laddr & 0xffff); 709 SONIC_WRITE(SONIC_CDC, 16); 710 711 /* 712 * load the CAM 713 */ 714 SONIC_WRITE(SONIC_CMD, SONIC_CR_LCAM); 715 716 i = 0; 717 while (i++ < 100) { 718 if (SONIC_READ(SONIC_ISR) & SONIC_INT_LCD) 719 break; 720 } 721 netif_dbg(lp, ifup, dev, "%s: CMD=%x, ISR=%x, i=%d\n", __func__, 722 SONIC_READ(SONIC_CMD), SONIC_READ(SONIC_ISR), i); 723 724 /* 725 * enable receiver, disable loopback 726 * and enable all interrupts 727 */ 728 SONIC_WRITE(SONIC_CMD, SONIC_CR_RXEN | SONIC_CR_STP); 729 SONIC_WRITE(SONIC_RCR, SONIC_RCR_DEFAULT); 730 SONIC_WRITE(SONIC_TCR, SONIC_TCR_DEFAULT); 731 SONIC_WRITE(SONIC_ISR, 0x7fff); 732 SONIC_WRITE(SONIC_IMR, SONIC_IMR_DEFAULT); 733 734 cmd = SONIC_READ(SONIC_CMD); 735 if ((cmd & SONIC_CR_RXEN) == 0 || (cmd & SONIC_CR_STP) == 0) 736 printk(KERN_ERR "sonic_init: failed, status=%x\n", cmd); 737 738 netif_dbg(lp, ifup, dev, "%s: new status=%x\n", __func__, 739 SONIC_READ(SONIC_CMD)); 740 741 return 0; 742 } 743 744 MODULE_LICENSE("GPL"); 745