1 /* SPDX-License-Identifier: BSD-3-Clause */ 2 /* Copyright (C) 2023 Microchip Technology Inc. and its subsidiaries. 3 * Microchip VCAP API 4 */ 5 6 /* This file is autogenerated by cml-utils 2023-01-17 16:52:16 +0100. 7 * Commit ID: 229ec79be5df142c1f335a01d0e63232d4feb2ba 8 */ 9 10 #ifndef __VCAP_AG_API__ 11 #define __VCAP_AG_API__ 12 13 enum vcap_type { 14 VCAP_TYPE_ES2, 15 VCAP_TYPE_IS0, 16 VCAP_TYPE_IS2, 17 VCAP_TYPE_MAX 18 }; 19 20 /* Keyfieldset names with origin information */ 21 enum vcap_keyfield_set { 22 VCAP_KFS_NO_VALUE, /* initial value */ 23 VCAP_KFS_ARP, /* sparx5 is2 X6, sparx5 es2 X6, lan966x is2 X2 */ 24 VCAP_KFS_ETAG, /* sparx5 is0 X2 */ 25 VCAP_KFS_IP4_OTHER, /* sparx5 is2 X6, sparx5 es2 X6, lan966x is2 X2 */ 26 VCAP_KFS_IP4_TCP_UDP, /* sparx5 is2 X6, sparx5 es2 X6, lan966x is2 X2 */ 27 VCAP_KFS_IP4_VID, /* sparx5 es2 X3 */ 28 VCAP_KFS_IP6_OTHER, /* lan966x is2 X4 */ 29 VCAP_KFS_IP6_STD, /* sparx5 is2 X6, lan966x is2 X2 */ 30 VCAP_KFS_IP6_TCP_UDP, /* lan966x is2 X4 */ 31 VCAP_KFS_IP6_VID, /* sparx5 es2 X6 */ 32 VCAP_KFS_IP_7TUPLE, /* sparx5 is2 X12, sparx5 es2 X12 */ 33 VCAP_KFS_LL_FULL, /* sparx5 is0 X6 */ 34 VCAP_KFS_MAC_ETYPE, /* sparx5 is2 X6, sparx5 es2 X6, lan966x is2 X2 */ 35 VCAP_KFS_MAC_LLC, /* lan966x is2 X2 */ 36 VCAP_KFS_MAC_SNAP, /* lan966x is2 X2 */ 37 VCAP_KFS_NORMAL_5TUPLE_IP4, /* sparx5 is0 X6 */ 38 VCAP_KFS_NORMAL_7TUPLE, /* sparx5 is0 X12 */ 39 VCAP_KFS_OAM, /* lan966x is2 X2 */ 40 VCAP_KFS_PURE_5TUPLE_IP4, /* sparx5 is0 X3 */ 41 VCAP_KFS_SMAC_SIP4, /* lan966x is2 X1 */ 42 VCAP_KFS_SMAC_SIP6, /* lan966x is2 X2 */ 43 }; 44 45 /* List of keyfields with description 46 * 47 * Keys ending in _IS are booleans derived from frame data 48 * Keys ending in _CLS are classified frame data 49 * 50 * VCAP_KF_8021BR_ECID_BASE: W12, sparx5: is0 51 * Used by 802.1BR Bridge Port Extension in an E-Tag 52 * VCAP_KF_8021BR_ECID_EXT: W8, sparx5: is0 53 * Used by 802.1BR Bridge Port Extension in an E-Tag 54 * VCAP_KF_8021BR_E_TAGGED: W1, sparx5: is0 55 * Set for frames containing an E-TAG (802.1BR Ethertype 893f) 56 * VCAP_KF_8021BR_GRP: W2, sparx5: is0 57 * E-Tag group bits in 802.1BR Bridge Port Extension 58 * VCAP_KF_8021BR_IGR_ECID_BASE: W12, sparx5: is0 59 * Used by 802.1BR Bridge Port Extension in an E-Tag 60 * VCAP_KF_8021BR_IGR_ECID_EXT: W8, sparx5: is0 61 * Used by 802.1BR Bridge Port Extension in an E-Tag 62 * VCAP_KF_8021Q_DEI0: W1, sparx5: is0 63 * First DEI in multiple vlan tags (outer tag or default port tag) 64 * VCAP_KF_8021Q_DEI1: W1, sparx5: is0 65 * Second DEI in multiple vlan tags (inner tag) 66 * VCAP_KF_8021Q_DEI2: W1, sparx5: is0 67 * Third DEI in multiple vlan tags (not always available) 68 * VCAP_KF_8021Q_DEI_CLS: W1, sparx5: is2/es2, lan966x: is2 69 * Classified DEI 70 * VCAP_KF_8021Q_PCP0: W3, sparx5: is0 71 * First PCP in multiple vlan tags (outer tag or default port tag) 72 * VCAP_KF_8021Q_PCP1: W3, sparx5: is0 73 * Second PCP in multiple vlan tags (inner tag) 74 * VCAP_KF_8021Q_PCP2: W3, sparx5: is0 75 * Third PCP in multiple vlan tags (not always available) 76 * VCAP_KF_8021Q_PCP_CLS: W3, sparx5: is2/es2, lan966x: is2 77 * Classified PCP 78 * VCAP_KF_8021Q_TPID0: W3, sparx5: is0 79 * First TPIC in multiple vlan tags (outer tag or default port tag) 80 * VCAP_KF_8021Q_TPID1: W3, sparx5: is0 81 * Second TPID in multiple vlan tags (inner tag) 82 * VCAP_KF_8021Q_TPID2: W3, sparx5: is0 83 * Third TPID in multiple vlan tags (not always available) 84 * VCAP_KF_8021Q_VID0: W12, sparx5: is0 85 * First VID in multiple vlan tags (outer tag or default port tag) 86 * VCAP_KF_8021Q_VID1: W12, sparx5: is0 87 * Second VID in multiple vlan tags (inner tag) 88 * VCAP_KF_8021Q_VID2: W12, sparx5: is0 89 * Third VID in multiple vlan tags (not always available) 90 * VCAP_KF_8021Q_VID_CLS: sparx5 is2 W13, sparx5 es2 W13, lan966x is2 W12 91 * Classified VID 92 * VCAP_KF_8021Q_VLAN_TAGGED_IS: W1, sparx5: is2/es2, lan966x: is2 93 * Sparx5: Set if frame was received with a VLAN tag, LAN966x: Set if frame has 94 * one or more Q-tags. Independent of port VLAN awareness 95 * VCAP_KF_8021Q_VLAN_TAGS: W3, sparx5: is0 96 * Number of VLAN tags in frame: 0: Untagged, 1: Single tagged, 3: Double 97 * tagged, 7: Triple tagged 98 * VCAP_KF_ACL_GRP_ID: W8, sparx5: es2 99 * Used in interface map table 100 * VCAP_KF_ARP_ADDR_SPACE_OK_IS: W1, sparx5: is2/es2, lan966x: is2 101 * Set if hardware address is Ethernet 102 * VCAP_KF_ARP_LEN_OK_IS: W1, sparx5: is2/es2, lan966x: is2 103 * Set if hardware address length = 6 (Ethernet) and IP address length = 4 (IP). 104 * VCAP_KF_ARP_OPCODE: W2, sparx5: is2/es2, lan966x: is2 105 * ARP opcode 106 * VCAP_KF_ARP_OPCODE_UNKNOWN_IS: W1, sparx5: is2/es2, lan966x: is2 107 * Set if not one of the codes defined in VCAP_KF_ARP_OPCODE 108 * VCAP_KF_ARP_PROTO_SPACE_OK_IS: W1, sparx5: is2/es2, lan966x: is2 109 * Set if protocol address space is 0x0800 110 * VCAP_KF_ARP_SENDER_MATCH_IS: W1, sparx5: is2/es2, lan966x: is2 111 * Sender Hardware Address = SMAC (ARP) 112 * VCAP_KF_ARP_TGT_MATCH_IS: W1, sparx5: is2/es2, lan966x: is2 113 * Target Hardware Address = SMAC (RARP) 114 * VCAP_KF_COSID_CLS: W3, sparx5: es2 115 * Class of service 116 * VCAP_KF_ES0_ISDX_KEY_ENA: W1, sparx5: es2 117 * The value taken from the IFH .FWD.ES0_ISDX_KEY_ENA 118 * VCAP_KF_ETYPE: W16, sparx5: is0/is2/es2, lan966x: is2 119 * Ethernet type 120 * VCAP_KF_ETYPE_LEN_IS: W1, sparx5: is0/is2/es2 121 * Set if frame has EtherType >= 0x600 122 * VCAP_KF_HOST_MATCH: W1, lan966x: is2 123 * The action from the SMAC_SIP4 or SMAC_SIP6 lookups. Used for IP source 124 * guarding. 125 * VCAP_KF_IF_EGR_PORT_MASK: W32, sparx5: es2 126 * Egress port mask, one bit per port 127 * VCAP_KF_IF_EGR_PORT_MASK_RNG: W3, sparx5: es2 128 * Select which 32 port group is available in IF_EGR_PORT (or virtual ports or 129 * CPU queue) 130 * VCAP_KF_IF_IGR_PORT: sparx5 is0 W7, sparx5 es2 W9, lan966x is2 W4 131 * Sparx5: Logical ingress port number retrieved from 132 * ANA_CL::PORT_ID_CFG.LPORT_NUM or ERLEG, LAN966x: ingress port nunmber 133 * VCAP_KF_IF_IGR_PORT_MASK: sparx5 is0 W65, sparx5 is2 W32, sparx5 is2 W65, 134 * lan966x is2 W9 135 * Ingress port mask, one bit per port/erleg 136 * VCAP_KF_IF_IGR_PORT_MASK_L3: W1, sparx5: is2 137 * If set, IF_IGR_PORT_MASK, IF_IGR_PORT_MASK_RNG, and IF_IGR_PORT_MASK_SEL are 138 * used to specify L3 interfaces 139 * VCAP_KF_IF_IGR_PORT_MASK_RNG: W4, sparx5: is2 140 * Range selector for IF_IGR_PORT_MASK. Specifies which group of 32 ports are 141 * available in IF_IGR_PORT_MASK 142 * VCAP_KF_IF_IGR_PORT_MASK_SEL: W2, sparx5: is0/is2 143 * Mode selector for IF_IGR_PORT_MASK, applicable when IF_IGR_PORT_MASK_L3 == 0. 144 * Mapping: 0: DEFAULT 1: LOOPBACK 2: MASQUERADE 3: CPU_VD 145 * VCAP_KF_IF_IGR_PORT_SEL: W1, sparx5: es2 146 * Selector for IF_IGR_PORT: physical port number or ERLEG 147 * VCAP_KF_IP4_IS: W1, sparx5: is0/is2/es2, lan966x: is2 148 * Set if frame has EtherType = 0x800 and IP version = 4 149 * VCAP_KF_IP_MC_IS: W1, sparx5: is0 150 * Set if frame is IPv4 frame and frame's destination MAC address is an IPv4 151 * multicast address (0x01005E0 /25). Set if frame is IPv6 frame and frame's 152 * destination MAC address is an IPv6 multicast address (0x3333/16). 153 * VCAP_KF_IP_PAYLOAD_5TUPLE: W32, sparx5: is0 154 * Payload bytes after IP header 155 * VCAP_KF_IP_SNAP_IS: W1, sparx5: is0 156 * Set if frame is IPv4, IPv6, or SNAP frame 157 * VCAP_KF_ISDX_CLS: W12, sparx5: is2/es2 158 * Classified ISDX 159 * VCAP_KF_ISDX_GT0_IS: W1, sparx5: is2/es2, lan966x: is2 160 * Set if classified ISDX > 0 161 * VCAP_KF_L2_BC_IS: W1, sparx5: is0/is2/es2, lan966x: is2 162 * Set if frame's destination MAC address is the broadcast address 163 * (FF-FF-FF-FF-FF-FF). 164 * VCAP_KF_L2_DMAC: W48, sparx5: is0/is2/es2, lan966x: is2 165 * Destination MAC address 166 * VCAP_KF_L2_FRM_TYPE: W4, lan966x: is2 167 * Frame subtype for specific EtherTypes (MRP, DLR) 168 * VCAP_KF_L2_FWD_IS: W1, sparx5: is2 169 * Set if the frame is allowed to be forwarded to front ports 170 * VCAP_KF_L2_LLC: W40, lan966x: is2 171 * LLC header and data after up to two VLAN tags and the type/length field 172 * VCAP_KF_L2_MC_IS: W1, sparx5: is0/is2/es2, lan966x: is2 173 * Set if frame's destination MAC address is a multicast address (bit 40 = 1). 174 * VCAP_KF_L2_PAYLOAD0: W16, lan966x: is2 175 * Payload bytes 0-1 after the frame's EtherType 176 * VCAP_KF_L2_PAYLOAD1: W8, lan966x: is2 177 * Payload byte 4 after the frame's EtherType. This is specifically for PTP 178 * frames. 179 * VCAP_KF_L2_PAYLOAD2: W3, lan966x: is2 180 * Bits 7, 2, and 1 from payload byte 6 after the frame's EtherType. This is 181 * specifically for PTP frames. 182 * VCAP_KF_L2_PAYLOAD_ETYPE: W64, sparx5: is2/es2 183 * Byte 0-7 of L2 payload after Type/Len field and overloading for OAM 184 * VCAP_KF_L2_SMAC: W48, sparx5: is0/is2/es2, lan966x: is2 185 * Source MAC address 186 * VCAP_KF_L2_SNAP: W40, lan966x: is2 187 * SNAP header after LLC header (AA-AA-03) 188 * VCAP_KF_L3_DIP_EQ_SIP_IS: W1, sparx5: is2/es2, lan966x: is2 189 * Set if Src IP matches Dst IP address 190 * VCAP_KF_L3_DPL_CLS: W1, sparx5: es2 191 * The frames drop precedence level 192 * VCAP_KF_L3_DSCP: W6, sparx5: is0 193 * Frame's DSCP value 194 * VCAP_KF_L3_DST_IS: W1, sparx5: is2 195 * Set if lookup is done for egress router leg 196 * VCAP_KF_L3_FRAGMENT: W1, lan966x: is2 197 * Set if IPv4 frame is fragmented 198 * VCAP_KF_L3_FRAGMENT_TYPE: W2, sparx5: is0/is2/es2 199 * L3 Fragmentation type (none, initial, suspicious, valid follow up) 200 * VCAP_KF_L3_FRAG_INVLD_L4_LEN: W1, sparx5: is0/is2 201 * Set if frame's L4 length is less than ANA_CL:COMMON:CLM_FRAGMENT_CFG.L4_MIN_L 202 * EN 203 * VCAP_KF_L3_FRAG_OFS_GT0: W1, lan966x: is2 204 * Set if IPv4 frame is fragmented and it is not the first fragment 205 * VCAP_KF_L3_IP4_DIP: W32, sparx5: is0/is2/es2, lan966x: is2 206 * Destination IPv4 Address 207 * VCAP_KF_L3_IP4_SIP: W32, sparx5: is0/is2/es2, lan966x: is2 208 * Source IPv4 Address 209 * VCAP_KF_L3_IP6_DIP: W128, sparx5: is0/is2/es2, lan966x: is2 210 * Sparx5: Full IPv6 DIP, LAN966x: Either Full IPv6 DIP or a subset depending on 211 * frame type 212 * VCAP_KF_L3_IP6_SIP: W128, sparx5: is0/is2/es2, lan966x: is2 213 * Sparx5: Full IPv6 SIP, LAN966x: Either Full IPv6 SIP or a subset depending on 214 * frame type 215 * VCAP_KF_L3_IP_PROTO: W8, sparx5: is0/is2/es2, lan966x: is2 216 * IPv4 frames: IP protocol. IPv6 frames: Next header, same as for IPV4 217 * VCAP_KF_L3_OPTIONS_IS: W1, sparx5: is0/is2/es2, lan966x: is2 218 * Set if IPv4 frame contains options (IP len > 5) 219 * VCAP_KF_L3_PAYLOAD: sparx5 is2 W96, sparx5 is2 W40, sparx5 es2 W96, lan966x 220 * is2 W56 221 * Sparx5: Payload bytes after IP header. IPv4: IPv4 options are not parsed so 222 * payload is always taken 20 bytes after the start of the IPv4 header, LAN966x: 223 * Bytes 0-6 after IP header 224 * VCAP_KF_L3_RT_IS: W1, sparx5: is2/es2 225 * Set if frame has hit a router leg 226 * VCAP_KF_L3_TOS: W8, sparx5: is2/es2, lan966x: is2 227 * Sparx5: Frame's IPv4/IPv6 DSCP and ECN fields, LAN966x: IP TOS field 228 * VCAP_KF_L3_TTL_GT0: W1, sparx5: is2/es2, lan966x: is2 229 * Set if IPv4 TTL / IPv6 hop limit is greater than 0 230 * VCAP_KF_L4_1588_DOM: W8, lan966x: is2 231 * PTP over UDP: domainNumber 232 * VCAP_KF_L4_1588_VER: W4, lan966x: is2 233 * PTP over UDP: version 234 * VCAP_KF_L4_ACK: W1, sparx5: is2/es2, lan966x: is2 235 * Sparx5 and LAN966x: TCP flag ACK, LAN966x only: PTP over UDP: flagField bit 2 236 * (unicastFlag) 237 * VCAP_KF_L4_DPORT: W16, sparx5: is2/es2, lan966x: is2 238 * Sparx5: TCP/UDP destination port. Overloading for IP_7TUPLE: Non-TCP/UDP IP 239 * frames: L4_DPORT = L3_IP_PROTO, LAN966x: TCP/UDP destination port 240 * VCAP_KF_L4_FIN: W1, sparx5: is2/es2, lan966x: is2 241 * TCP flag FIN, LAN966x: TCP flag FIN, and for PTP over UDP: messageType bit 1 242 * VCAP_KF_L4_PAYLOAD: W64, sparx5: is2/es2 243 * Payload bytes after TCP/UDP header Overloading for IP_7TUPLE: Non TCP/UDP 244 * frames: Payload bytes 0-7 after IP header. IPv4 options are not parsed so 245 * payload is always taken 20 bytes after the start of the IPv4 header for non 246 * TCP/UDP IPv4 frames 247 * VCAP_KF_L4_PSH: W1, sparx5: is2/es2, lan966x: is2 248 * Sparx5: TCP flag PSH, LAN966x: TCP: TCP flag PSH. PTP over UDP: flagField bit 249 * 1 (twoStepFlag) 250 * VCAP_KF_L4_RNG: sparx5 is0 W8, sparx5 is2 W16, sparx5 es2 W16, lan966x is2 W8 251 * Range checker bitmask (one for each range checker). Input into range checkers 252 * is taken from classified results (VID, DSCP) and frame (SPORT, DPORT, ETYPE, 253 * outer VID, inner VID) 254 * VCAP_KF_L4_RST: W1, sparx5: is2/es2, lan966x: is2 255 * Sparx5: TCP flag RST , LAN966x: TCP: TCP flag RST. PTP over UDP: messageType 256 * bit 3 257 * VCAP_KF_L4_SEQUENCE_EQ0_IS: W1, sparx5: is2/es2, lan966x: is2 258 * Set if TCP sequence number is 0, LAN966x: Overlayed with PTP over UDP: 259 * messageType bit 0 260 * VCAP_KF_L4_SPORT: W16, sparx5: is0/is2/es2, lan966x: is2 261 * TCP/UDP source port 262 * VCAP_KF_L4_SPORT_EQ_DPORT_IS: W1, sparx5: is2/es2, lan966x: is2 263 * Set if UDP or TCP source port equals UDP or TCP destination port 264 * VCAP_KF_L4_SYN: W1, sparx5: is2/es2, lan966x: is2 265 * Sparx5: TCP flag SYN, LAN966x: TCP: TCP flag SYN. PTP over UDP: messageType 266 * bit 2 267 * VCAP_KF_L4_URG: W1, sparx5: is2/es2, lan966x: is2 268 * Sparx5: TCP flag URG, LAN966x: TCP: TCP flag URG. PTP over UDP: flagField bit 269 * 7 (reserved) 270 * VCAP_KF_LOOKUP_FIRST_IS: W1, sparx5: is0/is2/es2, lan966x: is2 271 * Selects between entries relevant for first and second lookup. Set for first 272 * lookup, cleared for second lookup. 273 * VCAP_KF_LOOKUP_GEN_IDX: W12, sparx5: is0 274 * Generic index - for chaining CLM instances 275 * VCAP_KF_LOOKUP_GEN_IDX_SEL: W2, sparx5: is0 276 * Select the mode of the Generic Index 277 * VCAP_KF_LOOKUP_PAG: W8, sparx5: is2, lan966x: is2 278 * Classified Policy Association Group: chains rules from IS1/CLM to IS2 279 * VCAP_KF_MIRROR_PROBE: W2, sparx5: es2 280 * Identifies frame copies generated as a result of mirroring 281 * VCAP_KF_OAM_CCM_CNTS_EQ0: W1, sparx5: is2/es2, lan966x: is2 282 * Dual-ended loss measurement counters in CCM frames are all zero 283 * VCAP_KF_OAM_DETECTED: W1, lan966x: is2 284 * This is missing in the datasheet, but present in the OAM keyset in XML 285 * VCAP_KF_OAM_FLAGS: W8, lan966x: is2 286 * Frame's OAM flags 287 * VCAP_KF_OAM_MEL_FLAGS: W7, lan966x: is2 288 * Encoding of MD level/MEG level (MEL) 289 * VCAP_KF_OAM_MEPID: W16, lan966x: is2 290 * CCM frame's OAM MEP ID 291 * VCAP_KF_OAM_OPCODE: W8, lan966x: is2 292 * Frame's OAM opcode 293 * VCAP_KF_OAM_VER: W5, lan966x: is2 294 * Frame's OAM version 295 * VCAP_KF_OAM_Y1731_IS: W1, sparx5: is2/es2, lan966x: is2 296 * Set if frame's EtherType = 0x8902 297 * VCAP_KF_PROT_ACTIVE: W1, sparx5: es2 298 * Protection is active 299 * VCAP_KF_TCP_IS: W1, sparx5: is0/is2/es2, lan966x: is2 300 * Set if frame is IPv4 TCP frame (IP protocol = 6) or IPv6 TCP frames (Next 301 * header = 6) 302 * VCAP_KF_TCP_UDP_IS: W1, sparx5: is0/is2/es2 303 * Set if frame is IPv4/IPv6 TCP or UDP frame (IP protocol/next header equals 6 304 * or 17) 305 * VCAP_KF_TYPE: sparx5 is0 W2, sparx5 is0 W1, sparx5 is2 W4, sparx5 is2 W2, 306 * sparx5 es2 W3, lan966x is2 W4, lan966x is2 W2 307 * Keyset type id - set by the API 308 */ 309 310 /* Keyfield names */ 311 enum vcap_key_field { 312 VCAP_KF_NO_VALUE, /* initial value */ 313 VCAP_KF_8021BR_ECID_BASE, 314 VCAP_KF_8021BR_ECID_EXT, 315 VCAP_KF_8021BR_E_TAGGED, 316 VCAP_KF_8021BR_GRP, 317 VCAP_KF_8021BR_IGR_ECID_BASE, 318 VCAP_KF_8021BR_IGR_ECID_EXT, 319 VCAP_KF_8021Q_DEI0, 320 VCAP_KF_8021Q_DEI1, 321 VCAP_KF_8021Q_DEI2, 322 VCAP_KF_8021Q_DEI_CLS, 323 VCAP_KF_8021Q_PCP0, 324 VCAP_KF_8021Q_PCP1, 325 VCAP_KF_8021Q_PCP2, 326 VCAP_KF_8021Q_PCP_CLS, 327 VCAP_KF_8021Q_TPID0, 328 VCAP_KF_8021Q_TPID1, 329 VCAP_KF_8021Q_TPID2, 330 VCAP_KF_8021Q_VID0, 331 VCAP_KF_8021Q_VID1, 332 VCAP_KF_8021Q_VID2, 333 VCAP_KF_8021Q_VID_CLS, 334 VCAP_KF_8021Q_VLAN_TAGGED_IS, 335 VCAP_KF_8021Q_VLAN_TAGS, 336 VCAP_KF_ACL_GRP_ID, 337 VCAP_KF_ARP_ADDR_SPACE_OK_IS, 338 VCAP_KF_ARP_LEN_OK_IS, 339 VCAP_KF_ARP_OPCODE, 340 VCAP_KF_ARP_OPCODE_UNKNOWN_IS, 341 VCAP_KF_ARP_PROTO_SPACE_OK_IS, 342 VCAP_KF_ARP_SENDER_MATCH_IS, 343 VCAP_KF_ARP_TGT_MATCH_IS, 344 VCAP_KF_COSID_CLS, 345 VCAP_KF_ES0_ISDX_KEY_ENA, 346 VCAP_KF_ETYPE, 347 VCAP_KF_ETYPE_LEN_IS, 348 VCAP_KF_HOST_MATCH, 349 VCAP_KF_IF_EGR_PORT_MASK, 350 VCAP_KF_IF_EGR_PORT_MASK_RNG, 351 VCAP_KF_IF_IGR_PORT, 352 VCAP_KF_IF_IGR_PORT_MASK, 353 VCAP_KF_IF_IGR_PORT_MASK_L3, 354 VCAP_KF_IF_IGR_PORT_MASK_RNG, 355 VCAP_KF_IF_IGR_PORT_MASK_SEL, 356 VCAP_KF_IF_IGR_PORT_SEL, 357 VCAP_KF_IP4_IS, 358 VCAP_KF_IP_MC_IS, 359 VCAP_KF_IP_PAYLOAD_5TUPLE, 360 VCAP_KF_IP_SNAP_IS, 361 VCAP_KF_ISDX_CLS, 362 VCAP_KF_ISDX_GT0_IS, 363 VCAP_KF_L2_BC_IS, 364 VCAP_KF_L2_DMAC, 365 VCAP_KF_L2_FRM_TYPE, 366 VCAP_KF_L2_FWD_IS, 367 VCAP_KF_L2_LLC, 368 VCAP_KF_L2_MC_IS, 369 VCAP_KF_L2_PAYLOAD0, 370 VCAP_KF_L2_PAYLOAD1, 371 VCAP_KF_L2_PAYLOAD2, 372 VCAP_KF_L2_PAYLOAD_ETYPE, 373 VCAP_KF_L2_SMAC, 374 VCAP_KF_L2_SNAP, 375 VCAP_KF_L3_DIP_EQ_SIP_IS, 376 VCAP_KF_L3_DPL_CLS, 377 VCAP_KF_L3_DSCP, 378 VCAP_KF_L3_DST_IS, 379 VCAP_KF_L3_FRAGMENT, 380 VCAP_KF_L3_FRAGMENT_TYPE, 381 VCAP_KF_L3_FRAG_INVLD_L4_LEN, 382 VCAP_KF_L3_FRAG_OFS_GT0, 383 VCAP_KF_L3_IP4_DIP, 384 VCAP_KF_L3_IP4_SIP, 385 VCAP_KF_L3_IP6_DIP, 386 VCAP_KF_L3_IP6_SIP, 387 VCAP_KF_L3_IP_PROTO, 388 VCAP_KF_L3_OPTIONS_IS, 389 VCAP_KF_L3_PAYLOAD, 390 VCAP_KF_L3_RT_IS, 391 VCAP_KF_L3_TOS, 392 VCAP_KF_L3_TTL_GT0, 393 VCAP_KF_L4_1588_DOM, 394 VCAP_KF_L4_1588_VER, 395 VCAP_KF_L4_ACK, 396 VCAP_KF_L4_DPORT, 397 VCAP_KF_L4_FIN, 398 VCAP_KF_L4_PAYLOAD, 399 VCAP_KF_L4_PSH, 400 VCAP_KF_L4_RNG, 401 VCAP_KF_L4_RST, 402 VCAP_KF_L4_SEQUENCE_EQ0_IS, 403 VCAP_KF_L4_SPORT, 404 VCAP_KF_L4_SPORT_EQ_DPORT_IS, 405 VCAP_KF_L4_SYN, 406 VCAP_KF_L4_URG, 407 VCAP_KF_LOOKUP_FIRST_IS, 408 VCAP_KF_LOOKUP_GEN_IDX, 409 VCAP_KF_LOOKUP_GEN_IDX_SEL, 410 VCAP_KF_LOOKUP_PAG, 411 VCAP_KF_MIRROR_PROBE, 412 VCAP_KF_OAM_CCM_CNTS_EQ0, 413 VCAP_KF_OAM_DETECTED, 414 VCAP_KF_OAM_FLAGS, 415 VCAP_KF_OAM_MEL_FLAGS, 416 VCAP_KF_OAM_MEPID, 417 VCAP_KF_OAM_OPCODE, 418 VCAP_KF_OAM_VER, 419 VCAP_KF_OAM_Y1731_IS, 420 VCAP_KF_PROT_ACTIVE, 421 VCAP_KF_TCP_IS, 422 VCAP_KF_TCP_UDP_IS, 423 VCAP_KF_TYPE, 424 }; 425 426 /* Actionset names with origin information */ 427 enum vcap_actionfield_set { 428 VCAP_AFS_NO_VALUE, /* initial value */ 429 VCAP_AFS_BASE_TYPE, /* sparx5 is2 X3, sparx5 es2 X3, lan966x is2 X2 */ 430 VCAP_AFS_CLASSIFICATION, /* sparx5 is0 X2 */ 431 VCAP_AFS_CLASS_REDUCED, /* sparx5 is0 X1 */ 432 VCAP_AFS_FULL, /* sparx5 is0 X3 */ 433 VCAP_AFS_SMAC_SIP, /* lan966x is2 X1 */ 434 }; 435 436 /* List of actionfields with description 437 * 438 * VCAP_AF_ACL_ID: W6, lan966x: is2 439 * Logical ID for the entry. This ID is extracted together with the frame in the 440 * CPU extraction header. Only applicable to actions with CPU_COPY_ENA or 441 * HIT_ME_ONCE set. 442 * VCAP_AF_CLS_VID_SEL: W3, sparx5: is0 443 * Controls the classified VID: 0: VID_NONE: No action. 1: VID_ADD: New VID = 444 * old VID + VID_VAL. 2: VID_REPLACE: New VID = VID_VAL. 3: VID_FIRST_TAG: New 445 * VID = VID from frame's first tag (outer tag) if available, otherwise VID_VAL. 446 * 4: VID_SECOND_TAG: New VID = VID from frame's second tag (middle tag) if 447 * available, otherwise VID_VAL. 5: VID_THIRD_TAG: New VID = VID from frame's 448 * third tag (inner tag) if available, otherwise VID_VAL. 449 * VCAP_AF_CNT_ID: sparx5 is2 W12, sparx5 es2 W11 450 * Counter ID, used per lookup to index the 4K frame counters (ANA_ACL:CNT_TBL). 451 * Multiple VCAP IS2 entries can use the same counter. 452 * VCAP_AF_COPY_PORT_NUM: W7, sparx5: es2 453 * QSYS port number when FWD_MODE is redirect or copy 454 * VCAP_AF_COPY_QUEUE_NUM: W16, sparx5: es2 455 * QSYS queue number when FWD_MODE is redirect or copy 456 * VCAP_AF_CPU_COPY_ENA: W1, sparx5: is2/es2, lan966x: is2 457 * Setting this bit to 1 causes all frames that hit this action to be copied to 458 * the CPU extraction queue specified in CPU_QUEUE_NUM. 459 * VCAP_AF_CPU_QUEUE_NUM: W3, sparx5: is2/es2, lan966x: is2 460 * CPU queue number. Used when CPU_COPY_ENA is set. 461 * VCAP_AF_DEI_ENA: W1, sparx5: is0 462 * If set, use DEI_VAL as classified DEI value. Otherwise, DEI from basic 463 * classification is used 464 * VCAP_AF_DEI_VAL: W1, sparx5: is0 465 * See DEI_ENA 466 * VCAP_AF_DP_ENA: W1, sparx5: is0 467 * If set, use DP_VAL as classified drop precedence level. Otherwise, drop 468 * precedence level from basic classification is used. 469 * VCAP_AF_DP_VAL: W2, sparx5: is0 470 * See DP_ENA. 471 * VCAP_AF_DSCP_ENA: W1, sparx5: is0 472 * If set, use DSCP_VAL as classified DSCP value. Otherwise, DSCP value from 473 * basic classification is used. 474 * VCAP_AF_DSCP_VAL: W6, sparx5: is0 475 * See DSCP_ENA. 476 * VCAP_AF_ES2_REW_CMD: W3, sparx5: es2 477 * Command forwarded to REW: 0: No action. 1: SWAP MAC addresses. 2: Do L2CP 478 * DMAC translation when entering or leaving a tunnel. 479 * VCAP_AF_FWD_KILL_ENA: W1, lan966x: is2 480 * Setting this bit to 1 denies forwarding of the frame forwarding to any front 481 * port. The frame can still be copied to the CPU by other actions. 482 * VCAP_AF_FWD_MODE: W2, sparx5: es2 483 * Forward selector: 0: Forward. 1: Discard. 2: Redirect. 3: Copy. 484 * VCAP_AF_HIT_ME_ONCE: W1, sparx5: is2/es2, lan966x: is2 485 * Setting this bit to 1 causes the first frame that hits this action where the 486 * HIT_CNT counter is zero to be copied to the CPU extraction queue specified in 487 * CPU_QUEUE_NUM. The HIT_CNT counter is then incremented and any frames that 488 * hit this action later are not copied to the CPU. To re-enable the HIT_ME_ONCE 489 * functionality, the HIT_CNT counter must be cleared. 490 * VCAP_AF_HOST_MATCH: W1, lan966x: is2 491 * Used for IP source guarding. If set, it signals that the host is a valid (for 492 * instance a valid combination of source MAC address and source IP address). 493 * HOST_MATCH is input to the IS2 keys. 494 * VCAP_AF_IGNORE_PIPELINE_CTRL: W1, sparx5: is2/es2 495 * Ignore ingress pipeline control. This enforces the use of the VCAP IS2 action 496 * even when the pipeline control has terminated the frame before VCAP IS2. 497 * VCAP_AF_INTR_ENA: W1, sparx5: is2/es2 498 * If set, an interrupt is triggered when this rule is hit 499 * VCAP_AF_ISDX_ADD_REPLACE_SEL: W1, sparx5: is0 500 * Controls the classified ISDX. 0: New ISDX = old ISDX + ISDX_VAL. 1: New ISDX 501 * = ISDX_VAL. 502 * VCAP_AF_ISDX_ENA: W1, lan966x: is2 503 * Setting this bit to 1 causes the classified ISDX to be set to the value of 504 * POLICE_IDX[8:0]. 505 * VCAP_AF_ISDX_VAL: W12, sparx5: is0 506 * See isdx_add_replace_sel 507 * VCAP_AF_LRN_DIS: W1, sparx5: is2, lan966x: is2 508 * Setting this bit to 1 disables learning of frames hitting this action. 509 * VCAP_AF_MAP_IDX: W9, sparx5: is0 510 * Index for QoS mapping table lookup 511 * VCAP_AF_MAP_KEY: W3, sparx5: is0 512 * Key type for QoS mapping table lookup. 0: DEI0, PCP0 (outer tag). 1: DEI1, 513 * PCP1 (middle tag). 2: DEI2, PCP2 (inner tag). 3: MPLS TC. 4: PCP0 (outer 514 * tag). 5: E-DEI, E-PCP (E-TAG). 6: DSCP if available, otherwise none. 7: DSCP 515 * if available, otherwise DEI0, PCP0 (outer tag) if available using MAP_IDX+8, 516 * otherwise none 517 * VCAP_AF_MAP_LOOKUP_SEL: W2, sparx5: is0 518 * Selects which of the two QoS Mapping Table lookups that MAP_KEY and MAP_IDX 519 * are applied to. 0: No changes to the QoS Mapping Table lookup. 1: Update key 520 * type and index for QoS Mapping Table lookup #0. 2: Update key type and index 521 * for QoS Mapping Table lookup #1. 3: Reserved. 522 * VCAP_AF_MASK_MODE: sparx5 is0 W3, sparx5 is2 W3, lan966x is2 W2 523 * Controls the PORT_MASK use. Sparx5: 0: OR_DSTMASK, 1: AND_VLANMASK, 2: 524 * REPLACE_PGID, 3: REPLACE_ALL, 4: REDIR_PGID, 5: OR_PGID_MASK, 6: VSTAX, 7: 525 * Not applicable. LAN966X: 0: No action, 1: Permit/deny (AND), 2: Policy 526 * forwarding (DMAC lookup), 3: Redirect. The CPU port is untouched by 527 * MASK_MODE. 528 * VCAP_AF_MATCH_ID: W16, sparx5: is2 529 * Logical ID for the entry. The MATCH_ID is extracted together with the frame 530 * if the frame is forwarded to the CPU (CPU_COPY_ENA). The result is placed in 531 * IFH.CL_RSLT. 532 * VCAP_AF_MATCH_ID_MASK: W16, sparx5: is2 533 * Mask used by MATCH_ID. 534 * VCAP_AF_MIRROR_ENA: W1, lan966x: is2 535 * Setting this bit to 1 causes frames to be mirrored to the mirror target port 536 * (ANA::MIRRPORPORTS). 537 * VCAP_AF_MIRROR_PROBE: W2, sparx5: is2 538 * Mirroring performed according to configuration of a mirror probe. 0: No 539 * mirroring. 1: Mirror probe 0. 2: Mirror probe 1. 3: Mirror probe 2 540 * VCAP_AF_MIRROR_PROBE_ID: W2, sparx5: es2 541 * Signals a mirror probe to be placed in the IFH. Only possible when FWD_MODE 542 * is copy. 0: No mirroring. 1-3: Use mirror probe 0-2. 543 * VCAP_AF_NXT_IDX: W12, sparx5: is0 544 * Index used as part of key (field G_IDX) in the next lookup. 545 * VCAP_AF_NXT_IDX_CTRL: W3, sparx5: is0 546 * Controls the generation of the G_IDX used in the VCAP CLM next lookup 547 * VCAP_AF_PAG_OVERRIDE_MASK: W8, sparx5: is0 548 * Bits set in this mask will override PAG_VAL from port profile. New PAG = (PAG 549 * (input) AND ~PAG_OVERRIDE_MASK) OR (PAG_VAL AND PAG_OVERRIDE_MASK) 550 * VCAP_AF_PAG_VAL: W8, sparx5: is0 551 * See PAG_OVERRIDE_MASK. 552 * VCAP_AF_PCP_ENA: W1, sparx5: is0 553 * If set, use PCP_VAL as classified PCP value. Otherwise, PCP from basic 554 * classification is used. 555 * VCAP_AF_PCP_VAL: W3, sparx5: is0 556 * See PCP_ENA. 557 * VCAP_AF_PIPELINE_FORCE_ENA: W1, sparx5: is2 558 * If set, use PIPELINE_PT unconditionally and set PIPELINE_ACT = NONE if 559 * PIPELINE_PT == NONE. Overrules previous settings of pipeline point. 560 * VCAP_AF_PIPELINE_PT: W5, sparx5: is2 561 * Pipeline point used if PIPELINE_FORCE_ENA is set 562 * VCAP_AF_POLICE_ENA: W1, sparx5: is2/es2, lan966x: is2 563 * Setting this bit to 1 causes frames that hit this action to be policed by the 564 * ACL policer specified in POLICE_IDX. Only applies to the first lookup. 565 * VCAP_AF_POLICE_IDX: sparx5 is2 W6, sparx5 es2 W6, lan966x is2 W9 566 * Selects VCAP policer used when policing frames (POLICE_ENA) 567 * VCAP_AF_POLICE_REMARK: W1, sparx5: es2 568 * If set, frames exceeding policer rates are marked as yellow but not 569 * discarded. 570 * VCAP_AF_POLICE_VCAP_ONLY: W1, lan966x: is2 571 * Disable policing from QoS, and port policers. Only the VCAP policer selected 572 * by POLICE_IDX is active. Only applies to the second lookup. 573 * VCAP_AF_PORT_MASK: sparx5 is0 W65, sparx5 is2 W68, lan966x is2 W8 574 * Port mask applied to the forwarding decision based on MASK_MODE. 575 * VCAP_AF_QOS_ENA: W1, sparx5: is0 576 * If set, use QOS_VAL as classified QoS class. Otherwise, QoS class from basic 577 * classification is used. 578 * VCAP_AF_QOS_VAL: W3, sparx5: is0 579 * See QOS_ENA. 580 * VCAP_AF_REW_OP: W16, lan966x: is2 581 * Rewriter operation command. 582 * VCAP_AF_RT_DIS: W1, sparx5: is2 583 * If set, routing is disallowed. Only applies when IS_INNER_ACL is 0. See also 584 * IGR_ACL_ENA, EGR_ACL_ENA, and RLEG_STAT_IDX. 585 * VCAP_AF_TYPE: W1, sparx5: is0 586 * Actionset type id - Set by the API 587 * VCAP_AF_VID_VAL: W13, sparx5: is0 588 * New VID Value 589 */ 590 591 /* Actionfield names */ 592 enum vcap_action_field { 593 VCAP_AF_NO_VALUE, /* initial value */ 594 VCAP_AF_ACL_ID, 595 VCAP_AF_CLS_VID_SEL, 596 VCAP_AF_CNT_ID, 597 VCAP_AF_COPY_PORT_NUM, 598 VCAP_AF_COPY_QUEUE_NUM, 599 VCAP_AF_CPU_COPY_ENA, 600 VCAP_AF_CPU_QUEUE_NUM, 601 VCAP_AF_DEI_ENA, 602 VCAP_AF_DEI_VAL, 603 VCAP_AF_DP_ENA, 604 VCAP_AF_DP_VAL, 605 VCAP_AF_DSCP_ENA, 606 VCAP_AF_DSCP_VAL, 607 VCAP_AF_ES2_REW_CMD, 608 VCAP_AF_FWD_KILL_ENA, 609 VCAP_AF_FWD_MODE, 610 VCAP_AF_HIT_ME_ONCE, 611 VCAP_AF_HOST_MATCH, 612 VCAP_AF_IGNORE_PIPELINE_CTRL, 613 VCAP_AF_INTR_ENA, 614 VCAP_AF_ISDX_ADD_REPLACE_SEL, 615 VCAP_AF_ISDX_ENA, 616 VCAP_AF_ISDX_VAL, 617 VCAP_AF_LRN_DIS, 618 VCAP_AF_MAP_IDX, 619 VCAP_AF_MAP_KEY, 620 VCAP_AF_MAP_LOOKUP_SEL, 621 VCAP_AF_MASK_MODE, 622 VCAP_AF_MATCH_ID, 623 VCAP_AF_MATCH_ID_MASK, 624 VCAP_AF_MIRROR_ENA, 625 VCAP_AF_MIRROR_PROBE, 626 VCAP_AF_MIRROR_PROBE_ID, 627 VCAP_AF_NXT_IDX, 628 VCAP_AF_NXT_IDX_CTRL, 629 VCAP_AF_PAG_OVERRIDE_MASK, 630 VCAP_AF_PAG_VAL, 631 VCAP_AF_PCP_ENA, 632 VCAP_AF_PCP_VAL, 633 VCAP_AF_PIPELINE_FORCE_ENA, 634 VCAP_AF_PIPELINE_PT, 635 VCAP_AF_POLICE_ENA, 636 VCAP_AF_POLICE_IDX, 637 VCAP_AF_POLICE_REMARK, 638 VCAP_AF_POLICE_VCAP_ONLY, 639 VCAP_AF_PORT_MASK, 640 VCAP_AF_QOS_ENA, 641 VCAP_AF_QOS_VAL, 642 VCAP_AF_REW_OP, 643 VCAP_AF_RT_DIS, 644 VCAP_AF_TYPE, 645 VCAP_AF_VID_VAL, 646 }; 647 648 #endif /* __VCAP_AG_API__ */ 649