1 /* SPDX-License-Identifier: BSD-3-Clause */
2 /* Copyright (C) 2022 Microchip Technology Inc. and its subsidiaries.
3  * Microchip VCAP API
4  */
5 
6 /* This file is autogenerated by cml-utils 2022-10-13 10:04:41 +0200.
7  * Commit ID: fd7cafd175899f0672c73afb3a30fc872500ae86
8  */
9 
10 #ifndef __VCAP_AG_API__
11 #define __VCAP_AG_API__
12 
13 enum vcap_type {
14 	VCAP_TYPE_ES2,
15 	VCAP_TYPE_IS0,
16 	VCAP_TYPE_IS2,
17 	VCAP_TYPE_MAX
18 };
19 
20 /* Keyfieldset names with origin information */
21 enum vcap_keyfield_set {
22 	VCAP_KFS_NO_VALUE,          /* initial value */
23 	VCAP_KFS_ARP,               /* sparx5 is2 X6, sparx5 es2 X6 */
24 	VCAP_KFS_ETAG,              /* sparx5 is0 X2 */
25 	VCAP_KFS_IP4_OTHER,         /* sparx5 is2 X6, sparx5 es2 X6 */
26 	VCAP_KFS_IP4_TCP_UDP,       /* sparx5 is2 X6, sparx5 es2 X6 */
27 	VCAP_KFS_IP4_VID,           /* sparx5 es2 X3 */
28 	VCAP_KFS_IP6_STD,           /* sparx5 is2 X6 */
29 	VCAP_KFS_IP6_VID,           /* sparx5 is2 X6, sparx5 es2 X6 */
30 	VCAP_KFS_IP_7TUPLE,         /* sparx5 is2 X12, sparx5 es2 X12 */
31 	VCAP_KFS_LL_FULL,           /* sparx5 is0 X6 */
32 	VCAP_KFS_MAC_ETYPE,         /* sparx5 is2 X6, sparx5 es2 X6 */
33 	VCAP_KFS_MLL,               /* sparx5 is0 X3 */
34 	VCAP_KFS_NORMAL,            /* sparx5 is0 X6 */
35 	VCAP_KFS_NORMAL_5TUPLE_IP4,  /* sparx5 is0 X6 */
36 	VCAP_KFS_NORMAL_7TUPLE,     /* sparx5 is0 X12 */
37 	VCAP_KFS_PURE_5TUPLE_IP4,   /* sparx5 is0 X3 */
38 	VCAP_KFS_TRI_VID,           /* sparx5 is0 X2 */
39 	VCAP_KFS_MAC_LLC,           /* lan966x is2 X2 */
40 	VCAP_KFS_MAC_SNAP,          /* lan966x is2 X2 */
41 	VCAP_KFS_OAM,               /* lan966x is2 X2 */
42 	VCAP_KFS_IP6_TCP_UDP,       /* lan966x is2 X4 */
43 	VCAP_KFS_IP6_OTHER,         /* lan966x is2 X4 */
44 	VCAP_KFS_SMAC_SIP4,         /* lan966x is2 X1 */
45 	VCAP_KFS_SMAC_SIP6,         /* lan966x is2 X2 */
46 };
47 
48 /* List of keyfields with description
49  *
50  * Keys ending in _IS are booleans derived from frame data
51  * Keys ending in _CLS are classified frame data
52  *
53  * VCAP_KF_8021BR_ECID_BASE: W12, sparx5: is0
54  *   Used by 802.1BR Bridge Port Extension in an E-Tag
55  * VCAP_KF_8021BR_ECID_EXT: W8, sparx5: is0
56  *   Used by 802.1BR Bridge Port Extension in an E-Tag
57  * VCAP_KF_8021BR_E_TAGGED: W1, sparx5: is0
58  *   Set for frames containing an E-TAG (802.1BR Ethertype 893f)
59  * VCAP_KF_8021BR_GRP: W2, sparx5: is0
60  *   E-Tag group bits in 802.1BR Bridge Port Extension
61  * VCAP_KF_8021BR_IGR_ECID_BASE: W12, sparx5: is0
62  *   Used by 802.1BR Bridge Port Extension in an E-Tag
63  * VCAP_KF_8021BR_IGR_ECID_EXT: W8, sparx5: is0
64  *   Used by 802.1BR Bridge Port Extension in an E-Tag
65  * VCAP_KF_8021Q_DEI0: W1, sparx5: is0
66  *   First DEI in multiple vlan tags (outer tag or default port tag)
67  * VCAP_KF_8021Q_DEI1: W1, sparx5: is0
68  *   Second DEI in multiple vlan tags (inner tag)
69  * VCAP_KF_8021Q_DEI2: W1, sparx5: is0
70  *   Third DEI in multiple vlan tags (not always available)
71  * VCAP_KF_8021Q_DEI_CLS: W1, sparx5: is2/es2, lan966x: is2
72  *   Classified DEI
73  * VCAP_KF_8021Q_PCP0: W3, sparx5: is0
74  *   First PCP in multiple vlan tags (outer tag or default port tag)
75  * VCAP_KF_8021Q_PCP1: W3, sparx5: is0
76  *   Second PCP in multiple vlan tags (inner tag)
77  * VCAP_KF_8021Q_PCP2: W3, sparx5: is0
78  *   Third PCP in multiple vlan tags (not always available)
79  * VCAP_KF_8021Q_PCP_CLS: W3, sparx5: is2/es2, lan966x: is2
80  *   Classified PCP
81  * VCAP_KF_8021Q_TPID0: W3, sparx5: is0
82  *   First TPIC in multiple vlan tags (outer tag or default port tag)
83  * VCAP_KF_8021Q_TPID1: W3, sparx5: is0
84  *   Second TPID in multiple vlan tags (inner tag)
85  * VCAP_KF_8021Q_TPID2: W3, sparx5: is0
86  *   Third TPID in multiple vlan tags (not always available)
87  * VCAP_KF_8021Q_VID0: W12, sparx5: is0
88  *   First VID in multiple vlan tags (outer tag or default port tag)
89  * VCAP_KF_8021Q_VID1: W12, sparx5: is0
90  *   Second VID in multiple vlan tags (inner tag)
91  * VCAP_KF_8021Q_VID2: W12, sparx5: is0
92  *   Third VID in multiple vlan tags (not always available)
93  * VCAP_KF_8021Q_VID_CLS: W13, sparx5: is2/es2, lan966x is2 W12
94  *   Classified VID
95  * VCAP_KF_8021Q_VLAN_TAGGED_IS: W1, sparx5: is2/es2, lan966x: is2
96  *   Sparx5: Set if frame was received with a VLAN tag, LAN966x: Set if frame has
97  *   one or more Q-tags. Independent of port VLAN awareness
98  * VCAP_KF_8021Q_VLAN_TAGS: W3, sparx5: is0
99  *   Number of VLAN tags in frame: 0: Untagged, 1: Single tagged, 3: Double
100  *   tagged, 7: Triple tagged
101  * VCAP_KF_ACL_GRP_ID: W8, sparx5: es2
102  *   Used in interface map table
103  * VCAP_KF_ARP_ADDR_SPACE_OK_IS: W1, sparx5: is2/es2, lan966x: is2
104  *   Set if hardware address is Ethernet
105  * VCAP_KF_ARP_LEN_OK_IS: W1, sparx5: is2/es2, lan966x: is2
106  *   Set if hardware address length = 6 (Ethernet) and IP address length = 4 (IP).
107  * VCAP_KF_ARP_OPCODE: W2, sparx5: is2/es2, lan966x: i2
108  *   ARP opcode
109  * VCAP_KF_ARP_OPCODE_UNKNOWN_IS: W1, sparx5: is2/es2, lan966x: is2
110  *   Set if not one of the codes defined in VCAP_KF_ARP_OPCODE
111  * VCAP_KF_ARP_PROTO_SPACE_OK_IS: W1, sparx5: is2/es2, lan966x: is2
112  *   Set if protocol address space is 0x0800
113  * VCAP_KF_ARP_SENDER_MATCH_IS: W1, sparx5: is2/es2, lan966x: is2
114  *   Sender Hardware Address = SMAC (ARP)
115  * VCAP_KF_ARP_TGT_MATCH_IS: W1, sparx5: is2/es2, lan966x: is2
116  *   Target Hardware Address = SMAC (RARP)
117  * VCAP_KF_COSID_CLS: W3, sparx5: es2
118  *   Class of service
119  * VCAP_KF_DST_ENTRY: W1, sparx5: is0
120  *   Selects whether the frame’s destination or source information is used for
121  *   fields L2_SMAC and L3_IP4_SIP
122  * VCAP_KF_ES0_ISDX_KEY_ENA: W1, sparx5: es2
123  *   The value taken from the IFH .FWD.ES0_ISDX_KEY_ENA
124  * VCAP_KF_ETYPE: W16, sparx5: is0/is2/es2, lan966x: is2
125  *   Ethernet type
126  * VCAP_KF_ETYPE_LEN_IS: W1, sparx5: is0/is2/es2
127  *   Set if frame has EtherType >= 0x600
128  * VCAP_KF_ETYPE_MPLS: W2, sparx5: is0
129  *   Type of MPLS Ethertype (or not)
130  * VCAP_KF_IF_EGR_PORT_MASK: W32, sparx5: es2
131  *   Egress port mask, one bit per port
132  * VCAP_KF_IF_EGR_PORT_MASK_RNG: W3, sparx5: es2
133  *   Select which 32 port group is available in IF_EGR_PORT (or virtual ports or
134  *   CPU queue)
135  * VCAP_KF_IF_IGR_PORT: sparx5 is0 W7, sparx5 es2 W9
136  *   Sparx5: Logical ingress port number retrieved from
137  *   ANA_CL::PORT_ID_CFG.LPORT_NUM or ERLEG, LAN966x: ingress port nunmber
138  * VCAP_KF_IF_IGR_PORT_MASK: sparx5 is0 W65, sparx5 is2 W32, sparx5 is2 W65,
139  *   lan966x is2 W9
140  *   Ingress port mask, one bit per port/erleg
141  * VCAP_KF_IF_IGR_PORT_MASK_L3: W1, sparx5: is2
142  *   If set, IF_IGR_PORT_MASK, IF_IGR_PORT_MASK_RNG, and IF_IGR_PORT_MASK_SEL are
143  *   used to specify L3 interfaces
144  * VCAP_KF_IF_IGR_PORT_MASK_RNG: W4, sparx5: is2
145  *   Range selector for IF_IGR_PORT_MASK.  Specifies which group of 32 ports are
146  *   available in IF_IGR_PORT_MASK
147  * VCAP_KF_IF_IGR_PORT_MASK_SEL: W2, sparx5: is0/is2
148  *   Mode selector for IF_IGR_PORT_MASK, applicable when IF_IGR_PORT_MASK_L3 == 0.
149  *   Mapping: 0: DEFAULT 1: LOOPBACK 2: MASQUERADE 3: CPU_VD
150  * VCAP_KF_IF_IGR_PORT_SEL: W1, sparx5: es2
151  *   Selector for IF_IGR_PORT: physical port number or ERLEG
152  * VCAP_KF_IP4_IS: W1, sparx5: is0/is2/es2, lan966x: is2
153  *   Set if frame has EtherType = 0x800 and IP version = 4
154  * VCAP_KF_IP_MC_IS: W1, sparx5: is0
155  *   Set if frame is IPv4 frame and frame’s destination MAC address is an IPv4
156  *   multicast address (0x01005E0 /25). Set if frame is IPv6 frame and frame’s
157  *   destination MAC address is an IPv6 multicast address (0x3333/16).
158  * VCAP_KF_IP_PAYLOAD_5TUPLE: W32, sparx5: is0
159  *   Payload bytes after IP header
160  * VCAP_KF_IP_SNAP_IS: W1, sparx5: is0
161  *   Set if frame is IPv4, IPv6, or SNAP frame
162  * VCAP_KF_ISDX_CLS: W12, sparx5: is2/es2
163  *   Classified ISDX
164  * VCAP_KF_ISDX_GT0_IS: W1, sparx5: is2/es2, lan966x: is2
165  *   Set if classified ISDX > 0
166  * VCAP_KF_L2_BC_IS: W1, sparx5: is0/is2/es2, lan966x: is2
167  *   Set if frame’s destination MAC address is the broadcast address
168  *   (FF-FF-FF-FF-FF-FF).
169  * VCAP_KF_L2_DMAC: W48, sparx5: is0/is2/es2, lan966x: is2
170  *   Destination MAC address
171  * VCAP_KF_L2_FWD_IS: W1, sparx5: is2
172  *   Set if the frame is allowed to be forwarded to front ports
173  * VCAP_KF_L2_MC_IS: W1, sparx5: is0/is2/es2, lan9966x is2
174  *   Set if frame’s destination MAC address is a multicast address (bit 40 = 1).
175  * VCAP_KF_L2_PAYLOAD_ETYPE: W64, sparx5: is2/es2
176  *   Byte 0-7 of L2 payload after Type/Len field and overloading for OAM
177  * VCAP_KF_L2_SMAC: W48, sparx5: is0/is2/es2, lan966x is2
178  *   Source MAC address
179  * VCAP_KF_L3_DIP_EQ_SIP_IS: W1, sparx5: is2/es2, lan966x: is2
180  *   Set if Src IP matches Dst IP address
181  * VCAP_KF_L3_DMAC_DIP_MATCH: W1, sparx5: is2
182  *   Match found in DIP security lookup in ANA_L3
183  * VCAP_KF_L3_DPL_CLS: W1, sparx5: es2
184  *   The frames drop precedence level
185  * VCAP_KF_L3_DSCP: W6, sparx5: is0
186  *   Frame’s DSCP value
187  * VCAP_KF_L3_DST_IS: W1, sparx5: is2
188  *   Set if lookup is done for egress router leg
189  * VCAP_KF_L3_FRAGMENT_TYPE: W2, sparx5: is0/is2/es2
190  *   L3 Fragmentation type (none, initial, suspicious, valid follow up)
191  * VCAP_KF_L3_FRAG_INVLD_L4_LEN: W1, sparx5: is0/is2
192  *   Set if frame's L4 length is less than ANA_CL:COMMON:CLM_FRAGMENT_CFG.L4_MIN_L
193  *   EN
194  * VCAP_KF_L3_IP4_DIP: W32, sparx5: is0/is2/es2, lan966x: is2
195  *   Destination IPv4 Address
196  * VCAP_KF_L3_IP4_SIP: W32, sparx5: is0/is2/es2, lan966x: is2
197  *   Source IPv4 Address
198  * VCAP_KF_L3_IP6_DIP: W128, sparx5: is0/is2/es2, lan966x: is2
199  *   Sparx5: Full IPv6 DIP, LAN966x: Either Full IPv6 DIP or a subset depending on
200  *   frame type
201  * VCAP_KF_L3_IP6_SIP: W128, sparx5: is0/is2/es2, lan966x: is2
202  *   Sparx5: Full IPv6 SIP, LAN966x: Either Full IPv6 SIP or a subset depending on
203  *   frame type
204  * VCAP_KF_L3_IP_PROTO: W8, sparx5: is0/is2/es2, lan966x: is2
205  *   IPv4 frames: IP protocol. IPv6 frames: Next header, same as for IPV4
206  * VCAP_KF_L3_OPTIONS_IS: W1, sparx5: is0/is2/es2, lan966x: is2
207  *   Set if IPv4 frame contains options (IP len > 5)
208  * VCAP_KF_L3_PAYLOAD: sparx5 is2 W96, sparx5 is2 W40, sparx5 es2 W96,
209  *   lan966x is2 W56
210  *   Sparx5: Payload bytes after IP header. IPv4: IPv4 options are not parsed so
211  *   payload is always taken 20 bytes after the start of the IPv4 header, LAN966x:
212  *   Bytes 0-6 after IP header
213  * VCAP_KF_L3_RT_IS: W1, sparx5: is2/es2
214  *   Set if frame has hit a router leg
215  * VCAP_KF_L3_SMAC_SIP_MATCH: W1, sparx5: is2
216  *   Match found in SIP security lookup in ANA_L3
217  * VCAP_KF_L3_TOS: W8, sparx5: is2/es2, lan966x: is2
218  *   Sparx5: Frame's IPv4/IPv6 DSCP and ECN fields, LAN966x: IP TOS field
219  * VCAP_KF_L3_TTL_GT0: W1, sparx5: is2/es2, lan966x: is2
220  *   Set if IPv4 TTL / IPv6 hop limit is greater than 0
221  * VCAP_KF_L4_ACK: W1, sparx5: is2/es2, lan966x: is2
222  *   Sparx5 and LAN966x: TCP flag ACK, LAN966x only: PTP over UDP: flagField bit 2
223  *   (unicastFlag)
224  * VCAP_KF_L4_DPORT: W16, sparx5: is2/es2, lan966x: is2
225  *   Sparx5: TCP/UDP destination port. Overloading for IP_7TUPLE: Non-TCP/UDP IP
226  *   frames: L4_DPORT = L3_IP_PROTO, LAN966x: TCP/UDP destination port
227  * VCAP_KF_L4_FIN: W1, sparx5: is2/es2
228  *   TCP flag FIN, LAN966x: TCP flag FIN, and for PTP over UDP: messageType bit 1
229  * VCAP_KF_L4_PAYLOAD: W64, sparx5: is2/es2
230  *   Payload bytes after TCP/UDP header Overloading for IP_7TUPLE: Non TCP/UDP
231  *   frames: Payload bytes 0–7 after IP header. IPv4 options are not parsed so
232  *   payload is always taken 20 bytes after the start of the IPv4 header for non
233  *   TCP/UDP IPv4 frames
234  * VCAP_KF_L4_PSH: W1, sparx5: is2/es2, lan966x: is2
235  *   Sparx5: TCP flag PSH, LAN966x: TCP: TCP flag PSH. PTP over UDP: flagField bit
236  *   1 (twoStepFlag)
237  * VCAP_KF_L4_RNG: sparx5 is0 W8, sparx5 is2 W16, sparx5 es2 W16, lan966x: is2
238  *   Range checker bitmask (one for each range checker). Input into range checkers
239  *   is taken from classified results (VID, DSCP) and frame (SPORT, DPORT, ETYPE,
240  *   outer VID, inner VID)
241  * VCAP_KF_L4_RST: W1, sparx5: is2/es2, lan966x: is2
242  *   Sparx5: TCP flag RST , LAN966x: TCP: TCP flag RST. PTP over UDP: messageType
243  *   bit 3
244  * VCAP_KF_L4_SEQUENCE_EQ0_IS: W1, sparx5: is2/es2, lan966x: is2
245  *   Set if TCP sequence number is 0, LAN966x: Overlayed with PTP over UDP:
246  *   messageType bit 0
247  * VCAP_KF_L4_SPORT: W16, sparx5: is0/is2/es2, lan966x: is2
248  *   TCP/UDP source port
249  * VCAP_KF_L4_SPORT_EQ_DPORT_IS: W1, sparx5: is2/es2, lan966x: is2
250  *   Set if UDP or TCP source port equals UDP or TCP destination port
251  * VCAP_KF_L4_SYN: W1, sparx5: is2/es2, lan966x: is2
252  *   Sparx5: TCP flag SYN, LAN966x: TCP: TCP flag SYN. PTP over UDP: messageType
253  *   bit 2
254  * VCAP_KF_L4_URG: W1, sparx5: is2/es2, lan966x: is2
255  *   Sparx5: TCP flag URG, LAN966x: TCP: TCP flag URG. PTP over UDP: flagField bit
256  *   7 (reserved)
257  * VCAP_KF_LOOKUP_FIRST_IS: W1, sparx5: is0/is2/es2, lan966x: is2
258  *   Selects between entries relevant for first and second lookup. Set for first
259  *   lookup, cleared for second lookup.
260  * VCAP_KF_LOOKUP_GEN_IDX: W12, sparx5: is0
261  *   Generic index - for chaining CLM instances
262  * VCAP_KF_LOOKUP_GEN_IDX_SEL: W2, sparx5: is0
263  *   Select the mode of the Generic Index
264  * VCAP_KF_LOOKUP_PAG: W8, sparx5: is2, lan966x: is2
265  *   Classified Policy Association Group: chains rules from IS1/CLM to IS2
266  * VCAP_KF_OAM_CCM_CNTS_EQ0: W1, sparx5: is2/es2, lan966x: is2
267  *   Dual-ended loss measurement counters in CCM frames are all zero
268  * VCAP_KF_OAM_MEL_FLAGS: W7, sparx5: is0, lan966x: is2
269  *   Encoding of MD level/MEG level (MEL)
270  * VCAP_KF_OAM_Y1731_IS: W1, sparx5: is0/is2/es2, lan966x: is2
271  *   Set if frame’s EtherType = 0x8902
272  * VCAP_KF_PROT_ACTIVE: W1, sparx5: es2
273  *   Protection is active
274  * VCAP_KF_TCP_IS: W1, sparx5: is0/is2/es2, lan966x: is2
275  *   Set if frame is IPv4 TCP frame (IP protocol = 6) or IPv6 TCP frames (Next
276  *   header = 6)
277  * VCAP_KF_TCP_UDP_IS: W1, sparx5: is0/is2/es2, lan966x: is2
278  *   Set if frame is IPv4/IPv6 TCP or UDP frame (IP protocol/next header equals 6
279  *   or 17)
280  * VCAP_KF_TYPE: sparx5 is0 W2, sparx5 is0 W1, sparx5 is2 W4, sparx5 is2 W2,
281  *   sparx5 es2 W3, lan966x: is2
282  *   Keyset type id - set by the API
283  * VCAP_KF_HOST_MATCH: W1, lan966x: is2
284  *   The action from the SMAC_SIP4 or SMAC_SIP6 lookups. Used for IP source
285  *   guarding.
286  * VCAP_KF_L2_FRM_TYPE: W4, lan966x: is2
287  *   Frame subtype for specific EtherTypes (MRP, DLR)
288  * VCAP_KF_L2_PAYLOAD0: W16, lan966x: is2
289  *   Payload bytes 0-1 after the frame’s EtherType
290  * VCAP_KF_L2_PAYLOAD1: W8, lan966x: is2
291  *   Payload byte 4 after the frame’s EtherType. This is specifically for PTP
292  *   frames.
293  * VCAP_KF_L2_PAYLOAD2: W3, lan966x: is2
294  *   Bits 7, 2, and 1 from payload byte 6 after the frame’s EtherType. This is
295  *   specifically for PTP frames.
296  * VCAP_KF_L2_LLC: W40, lan966x: is2
297  *   LLC header and data after up to two VLAN tags and the type/length field
298  * VCAP_KF_L3_FRAGMENT: W1, lan966x: is2
299  *   Set if IPv4 frame is fragmented
300  * VCAP_KF_L3_FRAG_OFS_GT0: W1, lan966x: is2
301  *   Set if IPv4 frame is fragmented and it is not the first fragment
302  * VCAP_KF_L2_SNAP: W40, lan966x: is2
303  *   SNAP header after LLC header (AA-AA-03)
304  * VCAP_KF_L4_1588_DOM: W8, lan966x: is2
305  *   PTP over UDP: domainNumber
306  * VCAP_KF_L4_1588_VER: W4, lan966x: is2
307  *   PTP over UDP: version
308  * VCAP_KF_OAM_MEPID: W16, lan966x: is2
309  *   CCM frame’s OAM MEP ID
310  * VCAP_KF_OAM_OPCODE: W8, lan966x: is2
311  *   Frame’s OAM opcode
312  * VCAP_KF_OAM_VER: W5, lan966x: is2
313  *   Frame’s OAM version
314  * VCAP_KF_OAM_FLAGS: W8, lan966x: is2
315  *   Frame’s OAM flags
316  * VCAP_KF_OAM_DETECTED: W1, lan966x: is2
317  *   This is missing in the datasheet, but present in the OAM keyset in XML
318  */
319 
320 /* Keyfield names */
321 enum vcap_key_field {
322 	VCAP_KF_NO_VALUE,  /* initial value */
323 	VCAP_KF_8021BR_ECID_BASE,
324 	VCAP_KF_8021BR_ECID_EXT,
325 	VCAP_KF_8021BR_E_TAGGED,
326 	VCAP_KF_8021BR_GRP,
327 	VCAP_KF_8021BR_IGR_ECID_BASE,
328 	VCAP_KF_8021BR_IGR_ECID_EXT,
329 	VCAP_KF_8021Q_DEI0,
330 	VCAP_KF_8021Q_DEI1,
331 	VCAP_KF_8021Q_DEI2,
332 	VCAP_KF_8021Q_DEI_CLS,
333 	VCAP_KF_8021Q_PCP0,
334 	VCAP_KF_8021Q_PCP1,
335 	VCAP_KF_8021Q_PCP2,
336 	VCAP_KF_8021Q_PCP_CLS,
337 	VCAP_KF_8021Q_TPID0,
338 	VCAP_KF_8021Q_TPID1,
339 	VCAP_KF_8021Q_TPID2,
340 	VCAP_KF_8021Q_VID0,
341 	VCAP_KF_8021Q_VID1,
342 	VCAP_KF_8021Q_VID2,
343 	VCAP_KF_8021Q_VID_CLS,
344 	VCAP_KF_8021Q_VLAN_TAGGED_IS,
345 	VCAP_KF_8021Q_VLAN_TAGS,
346 	VCAP_KF_ACL_GRP_ID,
347 	VCAP_KF_ARP_ADDR_SPACE_OK_IS,
348 	VCAP_KF_ARP_LEN_OK_IS,
349 	VCAP_KF_ARP_OPCODE,
350 	VCAP_KF_ARP_OPCODE_UNKNOWN_IS,
351 	VCAP_KF_ARP_PROTO_SPACE_OK_IS,
352 	VCAP_KF_ARP_SENDER_MATCH_IS,
353 	VCAP_KF_ARP_TGT_MATCH_IS,
354 	VCAP_KF_COSID_CLS,
355 	VCAP_KF_DST_ENTRY,
356 	VCAP_KF_ES0_ISDX_KEY_ENA,
357 	VCAP_KF_ETYPE,
358 	VCAP_KF_ETYPE_LEN_IS,
359 	VCAP_KF_ETYPE_MPLS,
360 	VCAP_KF_IF_EGR_PORT_MASK,
361 	VCAP_KF_IF_EGR_PORT_MASK_RNG,
362 	VCAP_KF_IF_IGR_PORT,
363 	VCAP_KF_IF_IGR_PORT_MASK,
364 	VCAP_KF_IF_IGR_PORT_MASK_L3,
365 	VCAP_KF_IF_IGR_PORT_MASK_RNG,
366 	VCAP_KF_IF_IGR_PORT_MASK_SEL,
367 	VCAP_KF_IF_IGR_PORT_SEL,
368 	VCAP_KF_IP4_IS,
369 	VCAP_KF_IP_MC_IS,
370 	VCAP_KF_IP_PAYLOAD_5TUPLE,
371 	VCAP_KF_IP_SNAP_IS,
372 	VCAP_KF_ISDX_CLS,
373 	VCAP_KF_ISDX_GT0_IS,
374 	VCAP_KF_L2_BC_IS,
375 	VCAP_KF_L2_DMAC,
376 	VCAP_KF_L2_FWD_IS,
377 	VCAP_KF_L2_MC_IS,
378 	VCAP_KF_L2_PAYLOAD_ETYPE,
379 	VCAP_KF_L2_SMAC,
380 	VCAP_KF_L3_DIP_EQ_SIP_IS,
381 	VCAP_KF_L3_DMAC_DIP_MATCH,
382 	VCAP_KF_L3_DPL_CLS,
383 	VCAP_KF_L3_DSCP,
384 	VCAP_KF_L3_DST_IS,
385 	VCAP_KF_L3_FRAGMENT_TYPE,
386 	VCAP_KF_L3_FRAG_INVLD_L4_LEN,
387 	VCAP_KF_L3_IP4_DIP,
388 	VCAP_KF_L3_IP4_SIP,
389 	VCAP_KF_L3_IP6_DIP,
390 	VCAP_KF_L3_IP6_SIP,
391 	VCAP_KF_L3_IP_PROTO,
392 	VCAP_KF_L3_OPTIONS_IS,
393 	VCAP_KF_L3_PAYLOAD,
394 	VCAP_KF_L3_RT_IS,
395 	VCAP_KF_L3_SMAC_SIP_MATCH,
396 	VCAP_KF_L3_TOS,
397 	VCAP_KF_L3_TTL_GT0,
398 	VCAP_KF_L4_ACK,
399 	VCAP_KF_L4_DPORT,
400 	VCAP_KF_L4_FIN,
401 	VCAP_KF_L4_PAYLOAD,
402 	VCAP_KF_L4_PSH,
403 	VCAP_KF_L4_RNG,
404 	VCAP_KF_L4_RST,
405 	VCAP_KF_L4_SEQUENCE_EQ0_IS,
406 	VCAP_KF_L4_SPORT,
407 	VCAP_KF_L4_SPORT_EQ_DPORT_IS,
408 	VCAP_KF_L4_SYN,
409 	VCAP_KF_L4_URG,
410 	VCAP_KF_LOOKUP_FIRST_IS,
411 	VCAP_KF_LOOKUP_GEN_IDX,
412 	VCAP_KF_LOOKUP_GEN_IDX_SEL,
413 	VCAP_KF_LOOKUP_PAG,
414 	VCAP_KF_MIRROR_ENA,
415 	VCAP_KF_OAM_CCM_CNTS_EQ0,
416 	VCAP_KF_OAM_MEL_FLAGS,
417 	VCAP_KF_OAM_Y1731_IS,
418 	VCAP_KF_PROT_ACTIVE,
419 	VCAP_KF_TCP_IS,
420 	VCAP_KF_TCP_UDP_IS,
421 	VCAP_KF_TYPE,
422 	VCAP_KF_HOST_MATCH,
423 	VCAP_KF_L2_FRM_TYPE,
424 	VCAP_KF_L2_PAYLOAD0,
425 	VCAP_KF_L2_PAYLOAD1,
426 	VCAP_KF_L2_PAYLOAD2,
427 	VCAP_KF_L2_LLC,
428 	VCAP_KF_L3_FRAGMENT,
429 	VCAP_KF_L3_FRAG_OFS_GT0,
430 	VCAP_KF_L2_SNAP,
431 	VCAP_KF_L4_1588_DOM,
432 	VCAP_KF_L4_1588_VER,
433 	VCAP_KF_OAM_MEPID,
434 	VCAP_KF_OAM_OPCODE,
435 	VCAP_KF_OAM_VER,
436 	VCAP_KF_OAM_FLAGS,
437 	VCAP_KF_OAM_DETECTED,
438 };
439 
440 /* Actionset names with origin information */
441 enum vcap_actionfield_set {
442 	VCAP_AFS_NO_VALUE,          /* initial value */
443 	VCAP_AFS_BASE_TYPE,         /* sparx5 is2 X3, sparx5 es2 X3, lan966x is2 X2 */
444 	VCAP_AFS_CLASSIFICATION,    /* sparx5 is0 X2 */
445 	VCAP_AFS_CLASS_REDUCED,     /* sparx5 is0 X1 */
446 	VCAP_AFS_FULL,              /* sparx5 is0 X3 */
447 	VCAP_AFS_MLBS,              /* sparx5 is0 X2 */
448 	VCAP_AFS_MLBS_REDUCED,      /* sparx5 is0 X1 */
449 	VCAP_AFS_SMAC_SIP,          /* lan966x is2 x1 */
450 };
451 
452 /* List of actionfields with description
453  *
454  * VCAP_AF_CLS_VID_SEL: W3, sparx5: is0
455  *   Controls the classified VID: 0: VID_NONE: No action. 1: VID_ADD: New VID =
456  *   old VID + VID_VAL. 2: VID_REPLACE: New VID = VID_VAL. 3: VID_FIRST_TAG: New
457  *   VID = VID from frame's first tag (outer tag) if available, otherwise VID_VAL.
458  *   4: VID_SECOND_TAG: New VID = VID from frame's second tag (middle tag) if
459  *   available, otherwise VID_VAL. 5: VID_THIRD_TAG: New VID = VID from frame's
460  *   third tag (inner tag) if available, otherwise VID_VAL.
461  * VCAP_AF_CNT_ID: sparx5 is2 W12, sparx5 es2 W11
462  *   Counter ID, used per lookup to index the 4K frame counters (ANA_ACL:CNT_TBL).
463  *   Multiple VCAP IS2 entries can use the same counter.
464  * VCAP_AF_COPY_PORT_NUM: W7, sparx5: es2
465  *   QSYS port number when FWD_MODE is redirect or copy
466  * VCAP_AF_COPY_QUEUE_NUM: W16, sparx5: es2
467  *   QSYS queue number when FWD_MODE is redirect or copy
468  * VCAP_AF_CPU_COPY_ENA: W1, sparx5: is2/es2, lan966x: is2
469  *   Setting this bit to 1 causes all frames that hit this action to be copied to
470  *   the CPU extraction queue specified in CPU_QUEUE_NUM.
471  * VCAP_AF_CPU_QUEUE_NUM: W3, sparx5: is2/es2, lan966x: is2
472  *   CPU queue number. Used when CPU_COPY_ENA is set.
473  * VCAP_AF_DEI_ENA: W1, sparx5: is0
474  *   If set, use DEI_VAL as classified DEI value. Otherwise, DEI from basic
475  *   classification is used
476  * VCAP_AF_DEI_VAL: W1, sparx5: is0
477  *   See DEI_ENA
478  * VCAP_AF_DP_ENA: W1, sparx5: is0
479  *   If set, use DP_VAL as classified drop precedence level. Otherwise, drop
480  *   precedence level from basic classification is used.
481  * VCAP_AF_DP_VAL: W2, sparx5: is0
482  *   See DP_ENA.
483  * VCAP_AF_DSCP_ENA: W1, sparx5: is0
484  *   If set, use DSCP_VAL as classified DSCP value. Otherwise, DSCP value from
485  *   basic classification is used.
486  * VCAP_AF_DSCP_VAL: W6, sparx5: is0
487  *   See DSCP_ENA.
488  * VCAP_AF_ES2_REW_CMD: W3, sparx5: es2
489  *   Command forwarded to REW: 0: No action. 1: SWAP MAC addresses. 2: Do L2CP
490  *   DMAC translation when entering or leaving a tunnel.
491  * VCAP_AF_FWD_MODE: W2, sparx5: es2
492  *   Forward selector: 0: Forward. 1: Discard. 2: Redirect. 3: Copy.
493  * VCAP_AF_HIT_ME_ONCE: W1, sparx5: is2/es2, lan966x: is2
494  *   Setting this bit to 1 causes the first frame that hits this action where the
495  *   HIT_CNT counter is zero to be copied to the CPU extraction queue specified in
496  *   CPU_QUEUE_NUM. The HIT_CNT counter is then incremented and any frames that
497  *   hit this action later are not copied to the CPU. To re-enable the HIT_ME_ONCE
498  *   functionality, the HIT_CNT counter must be cleared.
499  * VCAP_AF_IGNORE_PIPELINE_CTRL: W1, sparx5: is2/es2
500  *   Ignore ingress pipeline control. This enforces the use of the VCAP IS2 action
501  *   even when the pipeline control has terminated the frame before VCAP IS2.
502  * VCAP_AF_INTR_ENA: W1, sparx5: is2/es2
503  *   If set, an interrupt is triggered when this rule is hit
504  * VCAP_AF_ISDX_ADD_REPLACE_SEL: W1, sparx5: is0
505  *   Controls the classified ISDX. 0: New ISDX = old ISDX + ISDX_VAL. 1: New ISDX
506  *   = ISDX_VAL.
507  * VCAP_AF_ISDX_VAL: W12, sparx5: is0
508  *   See isdx_add_replace_sel
509  * VCAP_AF_LRN_DIS: W1, sparx5: is2, lan966x: is2
510  *   Setting this bit to 1 disables learning of frames hitting this action.
511  * VCAP_AF_MAP_IDX: W9, sparx5: is0
512  *   Index for QoS mapping table lookup
513  * VCAP_AF_MAP_KEY: W3, sparx5: is0
514  *   Key type for QoS mapping table lookup. 0: DEI0, PCP0 (outer tag). 1: DEI1,
515  *   PCP1 (middle tag). 2: DEI2, PCP2 (inner tag). 3: MPLS TC. 4: PCP0 (outer
516  *   tag). 5: E-DEI, E-PCP (E-TAG). 6: DSCP if available, otherwise none. 7: DSCP
517  *   if available, otherwise DEI0, PCP0 (outer tag) if available using MAP_IDX+8,
518  *   otherwise none
519  * VCAP_AF_MAP_LOOKUP_SEL: W2, sparx5: is0
520  *   Selects which of the two QoS Mapping Table lookups that MAP_KEY and MAP_IDX
521  *   are applied to. 0: No changes to the QoS Mapping Table lookup. 1: Update key
522  *   type and index for QoS Mapping Table lookup #0. 2: Update key type and index
523  *   for QoS Mapping Table lookup #1. 3: Reserved.
524  * VCAP_AF_MASK_MODE: W3, sparx5: is0/is2, lan966x is2 W2
525  *   Controls the PORT_MASK use. Sparx5: 0: OR_DSTMASK, 1: AND_VLANMASK, 2:
526  *   REPLACE_PGID, 3: REPLACE_ALL, 4: REDIR_PGID, 5: OR_PGID_MASK, 6: VSTAX, 7:
527  *   Not applicable. LAN966X: 0: No action, 1: Permit/deny (AND), 2: Policy
528  *   forwarding (DMAC lookup), 3: Redirect. The CPU port is untouched by
529  *   MASK_MODE.
530  * VCAP_AF_MATCH_ID: W16, sparx5: is0/is2
531  *   Logical ID for the entry. The MATCH_ID is extracted together with the frame
532  *   if the frame is forwarded to the CPU (CPU_COPY_ENA). The result is placed in
533  *   IFH.CL_RSLT.
534  * VCAP_AF_MATCH_ID_MASK: W16, sparx5: is0/is2
535  *   Mask used by MATCH_ID.
536  * VCAP_AF_MIRROR_PROBE: W2, sparx5: is2
537  *   Mirroring performed according to configuration of a mirror probe. 0: No
538  *   mirroring. 1: Mirror probe 0. 2: Mirror probe 1. 3: Mirror probe 2
539  * VCAP_AF_MIRROR_PROBE_ID: W2, sparx5: es2
540  *   Signals a mirror probe to be placed in the IFH. Only possible when FWD_MODE
541  *   is copy. 0: No mirroring. 1–3: Use mirror probe 0-2.
542  * VCAP_AF_NXT_IDX: W12, sparx5: is0
543  *   Index used as part of key (field G_IDX) in the next lookup.
544  * VCAP_AF_NXT_IDX_CTRL: W3, sparx5: is0
545  *   Controls the generation of the G_IDX used in the VCAP CLM next lookup
546  * VCAP_AF_PAG_OVERRIDE_MASK: W8, sparx5: is0
547  *   Bits set in this mask will override PAG_VAL from port profile.  New PAG =
548  *   (PAG (input) AND ~PAG_OVERRIDE_MASK) OR (PAG_VAL AND PAG_OVERRIDE_MASK)
549  * VCAP_AF_PAG_VAL: W8, sparx5: is0
550  *   See PAG_OVERRIDE_MASK.
551  * VCAP_AF_PCP_ENA: W1, sparx5: is0
552  *   If set, use PCP_VAL as classified PCP value. Otherwise, PCP from basic
553  *   classification is used.
554  * VCAP_AF_PCP_VAL: W3, sparx5: is0
555  *   See PCP_ENA.
556  * VCAP_AF_PIPELINE_FORCE_ENA: sparx5 is0 W2, sparx5 is2 W1
557  *   If set, use PIPELINE_PT unconditionally and set PIPELINE_ACT = NONE if
558  *   PIPELINE_PT == NONE. Overrules previous settings of pipeline point.
559  * VCAP_AF_PIPELINE_PT: W5, sparx5: is0/is2
560  *   Pipeline point used if PIPELINE_FORCE_ENA is set
561  * VCAP_AF_POLICE_ENA: W1, sparx5: is2/es2, lan966x: is2
562  *   Setting this bit to 1 causes frames that hit this action to be policed by the
563  *   ACL policer specified in POLICE_IDX. Only applies to the first lookup.
564  * VCAP_AF_POLICE_IDX: W6, sparx5: is2/es2, lan966x: is2 W9
565  *   Selects VCAP policer used when policing frames (POLICE_ENA)
566  * VCAP_AF_POLICE_REMARK: W1, sparx5: es2
567  *   If set, frames exceeding policer rates are marked as yellow but not
568  *   discarded.
569  * VCAP_AF_PORT_MASK: sparx5 is0 W65, sparx5 is2 W68, lan966x is2 W8
570  *   Port mask applied to the forwarding decision based on MASK_MODE.
571  * VCAP_AF_QOS_ENA: W1, sparx5: is0
572  *   If set, use QOS_VAL as classified QoS class. Otherwise, QoS class from basic
573  *   classification is used.
574  * VCAP_AF_QOS_VAL: W3, sparx5: is0
575  *   See QOS_ENA.
576  * VCAP_AF_RT_DIS: W1, sparx5: is2
577  *   If set, routing is disallowed. Only applies when IS_INNER_ACL is 0. See also
578  *   IGR_ACL_ENA, EGR_ACL_ENA, and RLEG_STAT_IDX.
579  * VCAP_AF_TYPE: W1, sparx5: is0
580  *   Actionset type id - Set by the API
581  * VCAP_AF_VID_VAL: W13, sparx5: is0
582  *   New VID Value
583  * VCAP_AF_MIRROR_ENA: W1, lan966x: is2
584  *   Setting this bit to 1 causes frames to be mirrored to the mirror target
585  *   port (ANA::MIRRPORPORTS).
586  * VCAP_AF_POLICE_VCAP_ONLY: W1, lan966x: is2
587  *   Disable policing from QoS, and port policers. Only the VCAP policer
588  *   selected by POLICE_IDX is active. Only applies to the second lookup.
589  * VCAP_AF_REW_OP: W16, lan966x: is2
590  *   Rewriter operation command.
591  * VCAP_AF_ISDX_ENA: W1, lan966x: is2
592  *   Setting this bit to 1 causes the classified ISDX to be set to the value of
593  *   POLICE_IDX[8:0].
594  * VCAP_AF_ACL_ID: W6, lan966x: is2
595  *   Logical ID for the entry. This ID is extracted together with the frame in
596  *   the CPU extraction header. Only applicable to actions with CPU_COPY_ENA or
597  *   HIT_ME_ONCE set.
598  * VCAP_AF_FWD_KILL_ENA: W1, lan966x: is2
599  *   Setting this bit to 1 denies forwarding of the frame forwarding to any
600  *   front port. The frame can still be copied to the CPU by other actions.
601  * VCAP_AF_HOST_MATCH: W1, lan966x: is2
602  *  Used for IP source guarding. If set, it signals that the host is a valid
603  *  (for instance a valid combination of source MAC address and source IP
604  *  address). HOST_MATCH is input to the IS2 keys.
605  */
606 
607 /* Actionfield names */
608 enum vcap_action_field {
609 	VCAP_AF_NO_VALUE,  /* initial value */
610 	VCAP_AF_ACL_MAC,
611 	VCAP_AF_ACL_RT_MODE,
612 	VCAP_AF_CLS_VID_SEL,
613 	VCAP_AF_CNT_ID,
614 	VCAP_AF_COPY_PORT_NUM,
615 	VCAP_AF_COPY_QUEUE_NUM,
616 	VCAP_AF_COSID_ENA,
617 	VCAP_AF_COSID_VAL,
618 	VCAP_AF_CPU_COPY_ENA,
619 	VCAP_AF_CPU_DIS,
620 	VCAP_AF_CPU_ENA,
621 	VCAP_AF_CPU_Q,
622 	VCAP_AF_CPU_QUEUE_NUM,
623 	VCAP_AF_CUSTOM_ACE_ENA,
624 	VCAP_AF_CUSTOM_ACE_OFFSET,
625 	VCAP_AF_DEI_ENA,
626 	VCAP_AF_DEI_VAL,
627 	VCAP_AF_DLB_OFFSET,
628 	VCAP_AF_DMAC_OFFSET_ENA,
629 	VCAP_AF_DP_ENA,
630 	VCAP_AF_DP_VAL,
631 	VCAP_AF_DSCP_ENA,
632 	VCAP_AF_DSCP_VAL,
633 	VCAP_AF_EGR_ACL_ENA,
634 	VCAP_AF_ES2_REW_CMD,
635 	VCAP_AF_FWD_DIS,
636 	VCAP_AF_FWD_MODE,
637 	VCAP_AF_FWD_TYPE,
638 	VCAP_AF_GVID_ADD_REPLACE_SEL,
639 	VCAP_AF_HIT_ME_ONCE,
640 	VCAP_AF_IGNORE_PIPELINE_CTRL,
641 	VCAP_AF_IGR_ACL_ENA,
642 	VCAP_AF_INJ_MASQ_ENA,
643 	VCAP_AF_INJ_MASQ_LPORT,
644 	VCAP_AF_INJ_MASQ_PORT,
645 	VCAP_AF_INTR_ENA,
646 	VCAP_AF_ISDX_ADD_REPLACE_SEL,
647 	VCAP_AF_ISDX_VAL,
648 	VCAP_AF_IS_INNER_ACL,
649 	VCAP_AF_L3_MAC_UPDATE_DIS,
650 	VCAP_AF_LOG_MSG_INTERVAL,
651 	VCAP_AF_LPM_AFFIX_ENA,
652 	VCAP_AF_LPM_AFFIX_VAL,
653 	VCAP_AF_LPORT_ENA,
654 	VCAP_AF_LRN_DIS,
655 	VCAP_AF_MAP_IDX,
656 	VCAP_AF_MAP_KEY,
657 	VCAP_AF_MAP_LOOKUP_SEL,
658 	VCAP_AF_MASK_MODE,
659 	VCAP_AF_MATCH_ID,
660 	VCAP_AF_MATCH_ID_MASK,
661 	VCAP_AF_MIP_SEL,
662 	VCAP_AF_MIRROR_PROBE,
663 	VCAP_AF_MIRROR_PROBE_ID,
664 	VCAP_AF_MPLS_IP_CTRL_ENA,
665 	VCAP_AF_MPLS_MEP_ENA,
666 	VCAP_AF_MPLS_MIP_ENA,
667 	VCAP_AF_MPLS_OAM_FLAVOR,
668 	VCAP_AF_MPLS_OAM_TYPE,
669 	VCAP_AF_NUM_VLD_LABELS,
670 	VCAP_AF_NXT_IDX,
671 	VCAP_AF_NXT_IDX_CTRL,
672 	VCAP_AF_NXT_KEY_TYPE,
673 	VCAP_AF_NXT_NORMALIZE,
674 	VCAP_AF_NXT_NORM_W16_OFFSET,
675 	VCAP_AF_NXT_NORM_W32_OFFSET,
676 	VCAP_AF_NXT_OFFSET_FROM_TYPE,
677 	VCAP_AF_NXT_TYPE_AFTER_OFFSET,
678 	VCAP_AF_OAM_IP_BFD_ENA,
679 	VCAP_AF_OAM_TWAMP_ENA,
680 	VCAP_AF_OAM_Y1731_SEL,
681 	VCAP_AF_PAG_OVERRIDE_MASK,
682 	VCAP_AF_PAG_VAL,
683 	VCAP_AF_PCP_ENA,
684 	VCAP_AF_PCP_VAL,
685 	VCAP_AF_PIPELINE_ACT_SEL,
686 	VCAP_AF_PIPELINE_FORCE_ENA,
687 	VCAP_AF_PIPELINE_PT,
688 	VCAP_AF_PIPELINE_PT_REDUCED,
689 	VCAP_AF_POLICE_ENA,
690 	VCAP_AF_POLICE_IDX,
691 	VCAP_AF_POLICE_REMARK,
692 	VCAP_AF_PORT_MASK,
693 	VCAP_AF_PTP_MASTER_SEL,
694 	VCAP_AF_QOS_ENA,
695 	VCAP_AF_QOS_VAL,
696 	VCAP_AF_REW_CMD,
697 	VCAP_AF_RLEG_DMAC_CHK_DIS,
698 	VCAP_AF_RLEG_STAT_IDX,
699 	VCAP_AF_RSDX_ENA,
700 	VCAP_AF_RSDX_VAL,
701 	VCAP_AF_RSVD_LBL_VAL,
702 	VCAP_AF_RT_DIS,
703 	VCAP_AF_RT_SEL,
704 	VCAP_AF_S2_KEY_SEL_ENA,
705 	VCAP_AF_S2_KEY_SEL_IDX,
706 	VCAP_AF_SAM_SEQ_ENA,
707 	VCAP_AF_SIP_IDX,
708 	VCAP_AF_SWAP_MAC_ENA,
709 	VCAP_AF_TCP_UDP_DPORT,
710 	VCAP_AF_TCP_UDP_ENA,
711 	VCAP_AF_TCP_UDP_SPORT,
712 	VCAP_AF_TC_ENA,
713 	VCAP_AF_TC_LABEL,
714 	VCAP_AF_TPID_SEL,
715 	VCAP_AF_TTL_DECR_DIS,
716 	VCAP_AF_TTL_ENA,
717 	VCAP_AF_TTL_LABEL,
718 	VCAP_AF_TTL_UPDATE_ENA,
719 	VCAP_AF_TYPE,
720 	VCAP_AF_VID_VAL,
721 	VCAP_AF_VLAN_POP_CNT,
722 	VCAP_AF_VLAN_POP_CNT_ENA,
723 	VCAP_AF_VLAN_PUSH_CNT,
724 	VCAP_AF_VLAN_PUSH_CNT_ENA,
725 	VCAP_AF_VLAN_WAS_TAGGED,
726 	VCAP_AF_MIRROR_ENA,
727 	VCAP_AF_POLICE_VCAP_ONLY,
728 	VCAP_AF_REW_OP,
729 	VCAP_AF_ISDX_ENA,
730 	VCAP_AF_ACL_ID,
731 	VCAP_AF_FWD_KILL_ENA,
732 	VCAP_AF_HOST_MATCH,
733 };
734 
735 #endif /* __VCAP_AG_API__ */
736