1 /* SPDX-License-Identifier: BSD-3-Clause */
2 /* Copyright (C) 2023 Microchip Technology Inc. and its subsidiaries.
3  * Microchip VCAP API
4  */
5 
6 /* This file is autogenerated by cml-utils 2023-02-16 11:41:14 +0100.
7  * Commit ID: be85f176b3a151fa748dcaf97c8824a5c2e065f3
8  */
9 
10 #ifndef __VCAP_AG_API__
11 #define __VCAP_AG_API__
12 
13 enum vcap_type {
14 	VCAP_TYPE_ES0,
15 	VCAP_TYPE_ES2,
16 	VCAP_TYPE_IS0,
17 	VCAP_TYPE_IS1,
18 	VCAP_TYPE_IS2,
19 	VCAP_TYPE_MAX
20 };
21 
22 /* Keyfieldset names with origin information */
23 enum vcap_keyfield_set {
24 	VCAP_KFS_NO_VALUE,          /* initial value */
25 	VCAP_KFS_5TUPLE_IP4,        /* lan966x is1 X2 */
26 	VCAP_KFS_5TUPLE_IP6,        /* lan966x is1 X4 */
27 	VCAP_KFS_7TUPLE,            /* lan966x is1 X4 */
28 	VCAP_KFS_ARP,               /* sparx5 is2 X6, sparx5 es2 X6, lan966x is2 X2 */
29 	VCAP_KFS_DBL_VID,           /* lan966x is1 X1 */
30 	VCAP_KFS_DMAC_VID,          /* lan966x is1 X1 */
31 	VCAP_KFS_ETAG,              /* sparx5 is0 X2 */
32 	VCAP_KFS_IP4_OTHER,         /* sparx5 is2 X6, sparx5 es2 X6, lan966x is2 X2 */
33 	VCAP_KFS_IP4_TCP_UDP,       /* sparx5 is2 X6, sparx5 es2 X6, lan966x is2 X2 */
34 	VCAP_KFS_IP4_VID,           /* sparx5 es2 X3 */
35 	VCAP_KFS_IP6_OTHER,         /* lan966x is2 X4 */
36 	VCAP_KFS_IP6_STD,           /* sparx5 is2 X6, sparx5 es2 X6, lan966x is2 X2 */
37 	VCAP_KFS_IP6_TCP_UDP,       /* lan966x is2 X4 */
38 	VCAP_KFS_IP6_VID,           /* sparx5 es2 X6 */
39 	VCAP_KFS_IP_7TUPLE,         /* sparx5 is2 X12, sparx5 es2 X12 */
40 	VCAP_KFS_ISDX,              /* sparx5 es0 X1 */
41 	VCAP_KFS_LL_FULL,           /* sparx5 is0 X6 */
42 	VCAP_KFS_MAC_ETYPE,         /* sparx5 is2 X6, sparx5 es2 X6, lan966x is2 X2 */
43 	VCAP_KFS_MAC_LLC,           /* lan966x is2 X2 */
44 	VCAP_KFS_MAC_SNAP,          /* lan966x is2 X2 */
45 	VCAP_KFS_NORMAL,            /* lan966x is1 X2 */
46 	VCAP_KFS_NORMAL_5TUPLE_IP4,  /* sparx5 is0 X6 */
47 	VCAP_KFS_NORMAL_7TUPLE,     /* sparx5 is0 X12 */
48 	VCAP_KFS_NORMAL_IP6,        /* lan966x is1 X4 */
49 	VCAP_KFS_OAM,               /* lan966x is2 X2 */
50 	VCAP_KFS_PURE_5TUPLE_IP4,   /* sparx5 is0 X3 */
51 	VCAP_KFS_RT,                /* lan966x is1 X1 */
52 	VCAP_KFS_SMAC_SIP4,         /* lan966x is2 X1 */
53 	VCAP_KFS_SMAC_SIP6,         /* lan966x is2 X2 */
54 };
55 
56 /* List of keyfields with description
57  *
58  * Keys ending in _IS are booleans derived from frame data
59  * Keys ending in _CLS are classified frame data
60  *
61  * VCAP_KF_8021BR_ECID_BASE: W12, sparx5: is0
62  *   Used by 802.1BR Bridge Port Extension in an E-Tag
63  * VCAP_KF_8021BR_ECID_EXT: W8, sparx5: is0
64  *   Used by 802.1BR Bridge Port Extension in an E-Tag
65  * VCAP_KF_8021BR_E_TAGGED: W1, sparx5: is0
66  *   Set for frames containing an E-TAG (802.1BR Ethertype 893f)
67  * VCAP_KF_8021BR_GRP: W2, sparx5: is0
68  *   E-Tag group bits in 802.1BR Bridge Port Extension
69  * VCAP_KF_8021BR_IGR_ECID_BASE: W12, sparx5: is0
70  *   Used by 802.1BR Bridge Port Extension in an E-Tag
71  * VCAP_KF_8021BR_IGR_ECID_EXT: W8, sparx5: is0
72  *   Used by 802.1BR Bridge Port Extension in an E-Tag
73  * VCAP_KF_8021CB_R_TAGGED_IS: W1, lan966x: is1
74  *   Set if frame contains an RTAG: IEEE 802.1CB (FRER Redundancy tag, Ethertype
75  *   0xf1c1)
76  * VCAP_KF_8021Q_DEI0: W1, sparx5: is0, lan966x: is1
77  *   First DEI in multiple vlan tags (outer tag or default port tag)
78  * VCAP_KF_8021Q_DEI1: W1, sparx5: is0, lan966x: is1
79  *   Second DEI in multiple vlan tags (inner tag)
80  * VCAP_KF_8021Q_DEI2: W1, sparx5: is0
81  *   Third DEI in multiple vlan tags (not always available)
82  * VCAP_KF_8021Q_DEI_CLS: W1, sparx5: is2/es2, lan966x: is2
83  *   Classified DEI
84  * VCAP_KF_8021Q_PCP0: W3, sparx5: is0, lan966x: is1
85  *   First PCP in multiple vlan tags (outer tag or default port tag)
86  * VCAP_KF_8021Q_PCP1: W3, sparx5: is0, lan966x: is1
87  *   Second PCP in multiple vlan tags (inner tag)
88  * VCAP_KF_8021Q_PCP2: W3, sparx5: is0
89  *   Third PCP in multiple vlan tags (not always available)
90  * VCAP_KF_8021Q_PCP_CLS: W3, sparx5: is2/es2, lan966x: is2
91  *   Classified PCP
92  * VCAP_KF_8021Q_TPID: W3, sparx5: es0
93  *   TPID for outer tag: 0: Customer TPID 1: Service TPID (88A8 or programmable)
94  * VCAP_KF_8021Q_TPID0: sparx5 is0 W3, lan966x is1 W1
95  *   First TPIC in multiple vlan tags (outer tag or default port tag)
96  * VCAP_KF_8021Q_TPID1: sparx5 is0 W3, lan966x is1 W1
97  *   Second TPID in multiple vlan tags (inner tag)
98  * VCAP_KF_8021Q_TPID2: W3, sparx5: is0
99  *   Third TPID in multiple vlan tags (not always available)
100  * VCAP_KF_8021Q_VID0: W12, sparx5: is0, lan966x: is1
101  *   First VID in multiple vlan tags (outer tag or default port tag)
102  * VCAP_KF_8021Q_VID1: W12, sparx5: is0, lan966x: is1
103  *   Second VID in multiple vlan tags (inner tag)
104  * VCAP_KF_8021Q_VID2: W12, sparx5: is0
105  *   Third VID in multiple vlan tags (not always available)
106  * VCAP_KF_8021Q_VID_CLS: sparx5 is2 W13, sparx5 es0 W13, sparx5 es2 W13,
107  *   lan966x is2 W12
108  *   Classified VID
109  * VCAP_KF_8021Q_VLAN_DBL_TAGGED_IS: W1, lan966x: is1
110  *   Set if frame has two or more Q-tags. Independent of port VLAN awareness
111  * VCAP_KF_8021Q_VLAN_TAGGED_IS: W1, sparx5: is2/es2, lan966x: is1/is2
112  *   Sparx5: Set if frame was received with a VLAN tag, LAN966x: Set if frame has
113  *   one or more Q-tags. Independent of port VLAN awareness
114  * VCAP_KF_8021Q_VLAN_TAGS: W3, sparx5: is0
115  *   Number of VLAN tags in frame: 0: Untagged, 1: Single tagged, 3: Double
116  *   tagged, 7: Triple tagged
117  * VCAP_KF_ACL_GRP_ID: W8, sparx5: es2
118  *   Used in interface map table
119  * VCAP_KF_ARP_ADDR_SPACE_OK_IS: W1, sparx5: is2/es2, lan966x: is2
120  *   Set if hardware address is Ethernet
121  * VCAP_KF_ARP_LEN_OK_IS: W1, sparx5: is2/es2, lan966x: is2
122  *   Set if hardware address length = 6 (Ethernet) and IP address length = 4 (IP).
123  * VCAP_KF_ARP_OPCODE: W2, sparx5: is2/es2, lan966x: is2
124  *   ARP opcode
125  * VCAP_KF_ARP_OPCODE_UNKNOWN_IS: W1, sparx5: is2/es2, lan966x: is2
126  *   Set if not one of the codes defined in VCAP_KF_ARP_OPCODE
127  * VCAP_KF_ARP_PROTO_SPACE_OK_IS: W1, sparx5: is2/es2, lan966x: is2
128  *   Set if protocol address space is 0x0800
129  * VCAP_KF_ARP_SENDER_MATCH_IS: W1, sparx5: is2/es2, lan966x: is2
130  *   Sender Hardware Address = SMAC (ARP)
131  * VCAP_KF_ARP_TGT_MATCH_IS: W1, sparx5: is2/es2, lan966x: is2
132  *   Target Hardware Address = SMAC (RARP)
133  * VCAP_KF_COSID_CLS: W3, sparx5: es0/es2
134  *   Class of service
135  * VCAP_KF_ES0_ISDX_KEY_ENA: W1, sparx5: es2
136  *   The value taken from the IFH .FWD.ES0_ISDX_KEY_ENA
137  * VCAP_KF_ETYPE: W16, sparx5: is0/is2/es2, lan966x: is1/is2
138  *   Ethernet type
139  * VCAP_KF_ETYPE_LEN_IS: W1, sparx5: is0/is2/es2, lan966x: is1
140  *   Set if frame has EtherType >= 0x600
141  * VCAP_KF_HOST_MATCH: W1, lan966x: is2
142  *   The action from the SMAC_SIP4 or SMAC_SIP6 lookups. Used for IP source
143  *   guarding.
144  * VCAP_KF_IF_EGR_PORT_MASK: W32, sparx5: es2
145  *   Egress port mask, one bit per port
146  * VCAP_KF_IF_EGR_PORT_MASK_RNG: W3, sparx5: es2
147  *   Select which 32 port group is available in IF_EGR_PORT (or virtual ports or
148  *   CPU queue)
149  * VCAP_KF_IF_EGR_PORT_NO: W7, sparx5: es0
150  *   Egress port number
151  * VCAP_KF_IF_IGR_PORT: sparx5 is0 W7, sparx5 es2 W9, lan966x is1 W3, lan966x
152  *   is2 W4
153  *   Sparx5: Logical ingress port number retrieved from
154  *   ANA_CL::PORT_ID_CFG.LPORT_NUM or ERLEG, LAN966x: ingress port nunmber
155  * VCAP_KF_IF_IGR_PORT_MASK: sparx5 is0 W65, sparx5 is2 W32, sparx5 is2 W65,
156  *   lan966x is1 W9, lan966x is2 W9
157  *   Ingress port mask, one bit per port/erleg
158  * VCAP_KF_IF_IGR_PORT_MASK_L3: W1, sparx5: is2
159  *   If set, IF_IGR_PORT_MASK, IF_IGR_PORT_MASK_RNG, and IF_IGR_PORT_MASK_SEL are
160  *   used to specify L3 interfaces
161  * VCAP_KF_IF_IGR_PORT_MASK_RNG: W4, sparx5: is2
162  *   Range selector for IF_IGR_PORT_MASK.  Specifies which group of 32 ports are
163  *   available in IF_IGR_PORT_MASK
164  * VCAP_KF_IF_IGR_PORT_MASK_SEL: W2, sparx5: is0/is2
165  *   Mode selector for IF_IGR_PORT_MASK, applicable when IF_IGR_PORT_MASK_L3 == 0.
166  *   Mapping: 0: DEFAULT 1: LOOPBACK 2: MASQUERADE 3: CPU_VD
167  * VCAP_KF_IF_IGR_PORT_SEL: W1, sparx5: es2
168  *   Selector for IF_IGR_PORT: physical port number or ERLEG
169  * VCAP_KF_IP4_IS: W1, sparx5: is0/is2/es2, lan966x: is1/is2
170  *   Set if frame has EtherType = 0x800 and IP version = 4
171  * VCAP_KF_IP_MC_IS: W1, sparx5: is0, lan966x: is1
172  *   Set if frame is IPv4 frame and frame's destination MAC address is an IPv4
173  *   multicast address (0x01005E0 /25). Set if frame is IPv6 frame and frame's
174  *   destination MAC address is an IPv6 multicast address (0x3333/16).
175  * VCAP_KF_IP_PAYLOAD_5TUPLE: W32, sparx5: is0, lan966x: is1
176  *   Payload bytes after IP header
177  * VCAP_KF_IP_PAYLOAD_S1_IP6: W112, lan966x: is1
178  *   Payload after IPv6 header
179  * VCAP_KF_IP_SNAP_IS: W1, sparx5: is0, lan966x: is1
180  *   Set if frame is IPv4, IPv6, or SNAP frame
181  * VCAP_KF_ISDX_CLS: W12, sparx5: is2/es0/es2
182  *   Classified ISDX
183  * VCAP_KF_ISDX_GT0_IS: W1, sparx5: is2/es0/es2, lan966x: is2
184  *   Set if classified ISDX > 0
185  * VCAP_KF_L2_BC_IS: W1, sparx5: is0/is2/es2, lan966x: is1/is2
186  *   Set if frame's destination MAC address is the broadcast address
187  *   (FF-FF-FF-FF-FF-FF).
188  * VCAP_KF_L2_DMAC: W48, sparx5: is0/is2/es2, lan966x: is1/is2
189  *   Destination MAC address
190  * VCAP_KF_L2_FRM_TYPE: W4, lan966x: is2
191  *   Frame subtype for specific EtherTypes (MRP, DLR)
192  * VCAP_KF_L2_FWD_IS: W1, sparx5: is2
193  *   Set if the frame is allowed to be forwarded to front ports
194  * VCAP_KF_L2_LLC: W40, lan966x: is2
195  *   LLC header and data after up to two VLAN tags and the type/length field
196  * VCAP_KF_L2_MAC: W48, lan966x: is1
197  *   MAC address (FIRST=1: SMAC, FIRST=0: DMAC)
198  * VCAP_KF_L2_MC_IS: W1, sparx5: is0/is2/es2, lan966x: is1/is2
199  *   Set if frame's destination MAC address is a multicast address (bit 40 = 1).
200  * VCAP_KF_L2_PAYLOAD0: W16, lan966x: is2
201  *   Payload bytes 0-1 after the frame's EtherType
202  * VCAP_KF_L2_PAYLOAD1: W8, lan966x: is2
203  *   Payload byte 4 after the frame's EtherType. This is specifically for PTP
204  *   frames.
205  * VCAP_KF_L2_PAYLOAD2: W3, lan966x: is2
206  *   Bits 7, 2, and 1 from payload byte 6 after the frame's EtherType. This is
207  *   specifically for PTP frames.
208  * VCAP_KF_L2_PAYLOAD_ETYPE: W64, sparx5: is2/es2
209  *   Byte 0-7 of L2 payload after Type/Len field and overloading for OAM
210  * VCAP_KF_L2_SMAC: W48, sparx5: is0/is2/es2, lan966x: is1/is2
211  *   Source MAC address
212  * VCAP_KF_L2_SNAP: W40, lan966x: is2
213  *   SNAP header after LLC header (AA-AA-03)
214  * VCAP_KF_L3_DIP_EQ_SIP_IS: W1, sparx5: is2/es2, lan966x: is2
215  *   Set if Src IP matches Dst IP address
216  * VCAP_KF_L3_DPL_CLS: W1, sparx5: es0/es2
217  *   The frames drop precedence level
218  * VCAP_KF_L3_DSCP: W6, sparx5: is0, lan966x: is1
219  *   Frame's DSCP value
220  * VCAP_KF_L3_DST_IS: W1, sparx5: is2
221  *   Set if lookup is done for egress router leg
222  * VCAP_KF_L3_FRAGMENT: W1, lan966x: is1/is2
223  *   Set if IPv4 frame is fragmented
224  * VCAP_KF_L3_FRAGMENT_TYPE: W2, sparx5: is0/is2/es2
225  *   L3 Fragmentation type (none, initial, suspicious, valid follow up)
226  * VCAP_KF_L3_FRAG_INVLD_L4_LEN: W1, sparx5: is0/is2
227  *   Set if frame's L4 length is less than ANA_CL:COMMON:CLM_FRAGMENT_CFG.L4_MIN_L
228  *   EN
229  * VCAP_KF_L3_FRAG_OFS_GT0: W1, lan966x: is1/is2
230  *   Set if IPv4 frame is fragmented and it is not the first fragment
231  * VCAP_KF_L3_IP4_DIP: W32, sparx5: is0/is2/es2, lan966x: is1/is2
232  *   Destination IPv4 Address
233  * VCAP_KF_L3_IP4_SIP: W32, sparx5: is0/is2/es2, lan966x: is1/is2
234  *   Source IPv4 Address
235  * VCAP_KF_L3_IP6_DIP: sparx5 is0 W128, sparx5 is2 W128, sparx5 es2 W128,
236  *   lan966x is1 W64, lan966x is1 W128, lan966x is2 W128
237  *   Sparx5: Full IPv6 DIP, LAN966x: Either Full IPv6 DIP or a subset depending on
238  *   frame type
239  * VCAP_KF_L3_IP6_DIP_MSB: W16, lan966x: is1
240  *   MS 16bits of IPv6 DIP
241  * VCAP_KF_L3_IP6_SIP: sparx5 is0 W128, sparx5 is2 W128, sparx5 es2 W128,
242  *   lan966x is1 W128, lan966x is1 W64, lan966x is2 W128
243  *   Sparx5: Full IPv6 SIP, LAN966x: Either Full IPv6 SIP or a subset depending on
244  *   frame type
245  * VCAP_KF_L3_IP6_SIP_MSB: W16, lan966x: is1
246  *   MS 16bits of IPv6 DIP
247  * VCAP_KF_L3_IP_PROTO: W8, sparx5: is0/is2/es2, lan966x: is1/is2
248  *   IPv4 frames: IP protocol. IPv6 frames: Next header, same as for IPV4
249  * VCAP_KF_L3_OPTIONS_IS: W1, sparx5: is0/is2/es2, lan966x: is1/is2
250  *   Set if IPv4 frame contains options (IP len > 5)
251  * VCAP_KF_L3_PAYLOAD: sparx5 is2 W96, sparx5 is2 W40, sparx5 es2 W96, sparx5
252  *   es2 W40, lan966x is2 W56
253  *   Sparx5: Payload bytes after IP header. IPv4: IPv4 options are not parsed so
254  *   payload is always taken 20 bytes after the start of the IPv4 header, LAN966x:
255  *   Bytes 0-6 after IP header
256  * VCAP_KF_L3_RT_IS: W1, sparx5: is2/es2
257  *   Set if frame has hit a router leg
258  * VCAP_KF_L3_TOS: W8, sparx5: is2/es2, lan966x: is2
259  *   Sparx5: Frame's IPv4/IPv6 DSCP and ECN fields, LAN966x: IP TOS field
260  * VCAP_KF_L3_TTL_GT0: W1, sparx5: is2/es2, lan966x: is2
261  *   Set if IPv4 TTL / IPv6 hop limit is greater than 0
262  * VCAP_KF_L4_1588_DOM: W8, lan966x: is2
263  *   PTP over UDP: domainNumber
264  * VCAP_KF_L4_1588_VER: W4, lan966x: is2
265  *   PTP over UDP: version
266  * VCAP_KF_L4_ACK: W1, sparx5: is2/es2, lan966x: is2
267  *   Sparx5 and LAN966x: TCP flag ACK, LAN966x only: PTP over UDP: flagField bit 2
268  *   (unicastFlag)
269  * VCAP_KF_L4_DPORT: W16, sparx5: is2/es2, lan966x: is2
270  *   Sparx5: TCP/UDP destination port. Overloading for IP_7TUPLE: Non-TCP/UDP IP
271  *   frames: L4_DPORT = L3_IP_PROTO, LAN966x: TCP/UDP destination port
272  * VCAP_KF_L4_FIN: W1, sparx5: is2/es2, lan966x: is2
273  *   TCP flag FIN, LAN966x: TCP flag FIN, and for PTP over UDP: messageType bit 1
274  * VCAP_KF_L4_PAYLOAD: W64, sparx5: is2/es2
275  *   Payload bytes after TCP/UDP header Overloading for IP_7TUPLE: Non TCP/UDP
276  *   frames: Payload bytes 0-7 after IP header. IPv4 options are not parsed so
277  *   payload is always taken 20 bytes after the start of the IPv4 header for non
278  *   TCP/UDP IPv4 frames
279  * VCAP_KF_L4_PSH: W1, sparx5: is2/es2, lan966x: is2
280  *   Sparx5: TCP flag PSH, LAN966x: TCP: TCP flag PSH. PTP over UDP: flagField bit
281  *   1 (twoStepFlag)
282  * VCAP_KF_L4_RNG: sparx5 is0 W8, sparx5 is2 W16, sparx5 es2 W16, lan966x is1
283  *   W8, lan966x is2 W8
284  *   Range checker bitmask (one for each range checker). Input into range checkers
285  *   is taken from classified results (VID, DSCP) and frame (SPORT, DPORT, ETYPE,
286  *   outer VID, inner VID)
287  * VCAP_KF_L4_RST: W1, sparx5: is2/es2, lan966x: is2
288  *   Sparx5: TCP flag RST , LAN966x: TCP: TCP flag RST. PTP over UDP: messageType
289  *   bit 3
290  * VCAP_KF_L4_SEQUENCE_EQ0_IS: W1, sparx5: is2/es2, lan966x: is2
291  *   Set if TCP sequence number is 0, LAN966x: Overlayed with PTP over UDP:
292  *   messageType bit 0
293  * VCAP_KF_L4_SPORT: W16, sparx5: is0/is2/es2, lan966x: is1/is2
294  *   TCP/UDP source port
295  * VCAP_KF_L4_SPORT_EQ_DPORT_IS: W1, sparx5: is2/es2, lan966x: is2
296  *   Set if UDP or TCP source port equals UDP or TCP destination port
297  * VCAP_KF_L4_SYN: W1, sparx5: is2/es2, lan966x: is2
298  *   Sparx5: TCP flag SYN, LAN966x: TCP: TCP flag SYN. PTP over UDP: messageType
299  *   bit 2
300  * VCAP_KF_L4_URG: W1, sparx5: is2/es2, lan966x: is2
301  *   Sparx5: TCP flag URG, LAN966x: TCP: TCP flag URG. PTP over UDP: flagField bit
302  *   7 (reserved)
303  * VCAP_KF_LOOKUP_FIRST_IS: W1, sparx5: is0/is2/es2, lan966x: is1/is2
304  *   Selects between entries relevant for first and second lookup. Set for first
305  *   lookup, cleared for second lookup.
306  * VCAP_KF_LOOKUP_GEN_IDX: W12, sparx5: is0
307  *   Generic index - for chaining CLM instances
308  * VCAP_KF_LOOKUP_GEN_IDX_SEL: W2, sparx5: is0
309  *   Select the mode of the Generic Index
310  * VCAP_KF_LOOKUP_INDEX: W2, lan966x: is1
311  *   0: First lookup, 1: Second lookup, 2: Third lookup, Similar to VCAP_KF_FIRST
312  *   but with extra info
313  * VCAP_KF_LOOKUP_PAG: W8, sparx5: is2, lan966x: is2
314  *   Classified Policy Association Group: chains rules from IS1/CLM to IS2
315  * VCAP_KF_MIRROR_PROBE: W2, sparx5: es2
316  *   Identifies frame copies generated as a result of mirroring
317  * VCAP_KF_OAM_CCM_CNTS_EQ0: W1, sparx5: is2/es2, lan966x: is2
318  *   Dual-ended loss measurement counters in CCM frames are all zero
319  * VCAP_KF_OAM_DETECTED: W1, lan966x: is2
320  *   This is missing in the datasheet, but present in the OAM keyset in XML
321  * VCAP_KF_OAM_FLAGS: W8, lan966x: is2
322  *   Frame's OAM flags
323  * VCAP_KF_OAM_MEL_FLAGS: W7, lan966x: is2
324  *   Encoding of MD level/MEG level (MEL)
325  * VCAP_KF_OAM_MEPID: W16, lan966x: is2
326  *   CCM frame's OAM MEP ID
327  * VCAP_KF_OAM_OPCODE: W8, lan966x: is2
328  *   Frame's OAM opcode
329  * VCAP_KF_OAM_VER: W5, lan966x: is2
330  *   Frame's OAM version
331  * VCAP_KF_OAM_Y1731_IS: W1, sparx5: is2/es2, lan966x: is2
332  *   Set if frame's EtherType = 0x8902
333  * VCAP_KF_PROT_ACTIVE: W1, sparx5: es0/es2
334  *   Protection is active
335  * VCAP_KF_RT_FRMID: W32, lan966x: is1
336  *   Profinet or OPC-UA FrameId
337  * VCAP_KF_RT_TYPE: W2, lan966x: is1
338  *   Encoding of frame's EtherType: 0: Other, 1: Profinet, 2: OPC-UA, 3: Custom
339  *   (ANA::RT_CUSTOM)
340  * VCAP_KF_RT_VLAN_IDX: W3, lan966x: is1
341  *   Real-time VLAN index from ANA::RT_VLAN_PCP
342  * VCAP_KF_TCP_IS: W1, sparx5: is0/is2/es2, lan966x: is1/is2
343  *   Set if frame is IPv4 TCP frame (IP protocol = 6) or IPv6 TCP frames (Next
344  *   header = 6)
345  * VCAP_KF_TCP_UDP_IS: W1, sparx5: is0/is2/es2, lan966x: is1
346  *   Set if frame is IPv4/IPv6 TCP or UDP frame (IP protocol/next header equals 6
347  *   or 17)
348  * VCAP_KF_TYPE: sparx5 is0 W2, sparx5 is0 W1, sparx5 is2 W4, sparx5 is2 W2,
349  *   sparx5 es0 W1, sparx5 es2 W3, lan966x is1 W1, lan966x is1 W2, lan966x is2 W4,
350  *   lan966x is2 W2
351  *   Keyset type id - set by the API
352  */
353 
354 /* Keyfield names */
355 enum vcap_key_field {
356 	VCAP_KF_NO_VALUE,  /* initial value */
357 	VCAP_KF_8021BR_ECID_BASE,
358 	VCAP_KF_8021BR_ECID_EXT,
359 	VCAP_KF_8021BR_E_TAGGED,
360 	VCAP_KF_8021BR_GRP,
361 	VCAP_KF_8021BR_IGR_ECID_BASE,
362 	VCAP_KF_8021BR_IGR_ECID_EXT,
363 	VCAP_KF_8021CB_R_TAGGED_IS,
364 	VCAP_KF_8021Q_DEI0,
365 	VCAP_KF_8021Q_DEI1,
366 	VCAP_KF_8021Q_DEI2,
367 	VCAP_KF_8021Q_DEI_CLS,
368 	VCAP_KF_8021Q_PCP0,
369 	VCAP_KF_8021Q_PCP1,
370 	VCAP_KF_8021Q_PCP2,
371 	VCAP_KF_8021Q_PCP_CLS,
372 	VCAP_KF_8021Q_TPID,
373 	VCAP_KF_8021Q_TPID0,
374 	VCAP_KF_8021Q_TPID1,
375 	VCAP_KF_8021Q_TPID2,
376 	VCAP_KF_8021Q_VID0,
377 	VCAP_KF_8021Q_VID1,
378 	VCAP_KF_8021Q_VID2,
379 	VCAP_KF_8021Q_VID_CLS,
380 	VCAP_KF_8021Q_VLAN_DBL_TAGGED_IS,
381 	VCAP_KF_8021Q_VLAN_TAGGED_IS,
382 	VCAP_KF_8021Q_VLAN_TAGS,
383 	VCAP_KF_ACL_GRP_ID,
384 	VCAP_KF_ARP_ADDR_SPACE_OK_IS,
385 	VCAP_KF_ARP_LEN_OK_IS,
386 	VCAP_KF_ARP_OPCODE,
387 	VCAP_KF_ARP_OPCODE_UNKNOWN_IS,
388 	VCAP_KF_ARP_PROTO_SPACE_OK_IS,
389 	VCAP_KF_ARP_SENDER_MATCH_IS,
390 	VCAP_KF_ARP_TGT_MATCH_IS,
391 	VCAP_KF_COSID_CLS,
392 	VCAP_KF_ES0_ISDX_KEY_ENA,
393 	VCAP_KF_ETYPE,
394 	VCAP_KF_ETYPE_LEN_IS,
395 	VCAP_KF_HOST_MATCH,
396 	VCAP_KF_IF_EGR_PORT_MASK,
397 	VCAP_KF_IF_EGR_PORT_MASK_RNG,
398 	VCAP_KF_IF_EGR_PORT_NO,
399 	VCAP_KF_IF_IGR_PORT,
400 	VCAP_KF_IF_IGR_PORT_MASK,
401 	VCAP_KF_IF_IGR_PORT_MASK_L3,
402 	VCAP_KF_IF_IGR_PORT_MASK_RNG,
403 	VCAP_KF_IF_IGR_PORT_MASK_SEL,
404 	VCAP_KF_IF_IGR_PORT_SEL,
405 	VCAP_KF_IP4_IS,
406 	VCAP_KF_IP_MC_IS,
407 	VCAP_KF_IP_PAYLOAD_5TUPLE,
408 	VCAP_KF_IP_PAYLOAD_S1_IP6,
409 	VCAP_KF_IP_SNAP_IS,
410 	VCAP_KF_ISDX_CLS,
411 	VCAP_KF_ISDX_GT0_IS,
412 	VCAP_KF_L2_BC_IS,
413 	VCAP_KF_L2_DMAC,
414 	VCAP_KF_L2_FRM_TYPE,
415 	VCAP_KF_L2_FWD_IS,
416 	VCAP_KF_L2_LLC,
417 	VCAP_KF_L2_MAC,
418 	VCAP_KF_L2_MC_IS,
419 	VCAP_KF_L2_PAYLOAD0,
420 	VCAP_KF_L2_PAYLOAD1,
421 	VCAP_KF_L2_PAYLOAD2,
422 	VCAP_KF_L2_PAYLOAD_ETYPE,
423 	VCAP_KF_L2_SMAC,
424 	VCAP_KF_L2_SNAP,
425 	VCAP_KF_L3_DIP_EQ_SIP_IS,
426 	VCAP_KF_L3_DPL_CLS,
427 	VCAP_KF_L3_DSCP,
428 	VCAP_KF_L3_DST_IS,
429 	VCAP_KF_L3_FRAGMENT,
430 	VCAP_KF_L3_FRAGMENT_TYPE,
431 	VCAP_KF_L3_FRAG_INVLD_L4_LEN,
432 	VCAP_KF_L3_FRAG_OFS_GT0,
433 	VCAP_KF_L3_IP4_DIP,
434 	VCAP_KF_L3_IP4_SIP,
435 	VCAP_KF_L3_IP6_DIP,
436 	VCAP_KF_L3_IP6_DIP_MSB,
437 	VCAP_KF_L3_IP6_SIP,
438 	VCAP_KF_L3_IP6_SIP_MSB,
439 	VCAP_KF_L3_IP_PROTO,
440 	VCAP_KF_L3_OPTIONS_IS,
441 	VCAP_KF_L3_PAYLOAD,
442 	VCAP_KF_L3_RT_IS,
443 	VCAP_KF_L3_TOS,
444 	VCAP_KF_L3_TTL_GT0,
445 	VCAP_KF_L4_1588_DOM,
446 	VCAP_KF_L4_1588_VER,
447 	VCAP_KF_L4_ACK,
448 	VCAP_KF_L4_DPORT,
449 	VCAP_KF_L4_FIN,
450 	VCAP_KF_L4_PAYLOAD,
451 	VCAP_KF_L4_PSH,
452 	VCAP_KF_L4_RNG,
453 	VCAP_KF_L4_RST,
454 	VCAP_KF_L4_SEQUENCE_EQ0_IS,
455 	VCAP_KF_L4_SPORT,
456 	VCAP_KF_L4_SPORT_EQ_DPORT_IS,
457 	VCAP_KF_L4_SYN,
458 	VCAP_KF_L4_URG,
459 	VCAP_KF_LOOKUP_FIRST_IS,
460 	VCAP_KF_LOOKUP_GEN_IDX,
461 	VCAP_KF_LOOKUP_GEN_IDX_SEL,
462 	VCAP_KF_LOOKUP_INDEX,
463 	VCAP_KF_LOOKUP_PAG,
464 	VCAP_KF_MIRROR_PROBE,
465 	VCAP_KF_OAM_CCM_CNTS_EQ0,
466 	VCAP_KF_OAM_DETECTED,
467 	VCAP_KF_OAM_FLAGS,
468 	VCAP_KF_OAM_MEL_FLAGS,
469 	VCAP_KF_OAM_MEPID,
470 	VCAP_KF_OAM_OPCODE,
471 	VCAP_KF_OAM_VER,
472 	VCAP_KF_OAM_Y1731_IS,
473 	VCAP_KF_PROT_ACTIVE,
474 	VCAP_KF_RT_FRMID,
475 	VCAP_KF_RT_TYPE,
476 	VCAP_KF_RT_VLAN_IDX,
477 	VCAP_KF_TCP_IS,
478 	VCAP_KF_TCP_UDP_IS,
479 	VCAP_KF_TYPE,
480 };
481 
482 /* Actionset names with origin information */
483 enum vcap_actionfield_set {
484 	VCAP_AFS_NO_VALUE,          /* initial value */
485 	VCAP_AFS_BASE_TYPE,         /* sparx5 is2 X3, sparx5 es2 X3, lan966x is2 X2 */
486 	VCAP_AFS_CLASSIFICATION,    /* sparx5 is0 X2 */
487 	VCAP_AFS_CLASS_REDUCED,     /* sparx5 is0 X1 */
488 	VCAP_AFS_ES0,               /* sparx5 es0 X1 */
489 	VCAP_AFS_FULL,              /* sparx5 is0 X3 */
490 	VCAP_AFS_S1,                /* lan966x is1 X1 */
491 	VCAP_AFS_SMAC_SIP,          /* lan966x is2 X1 */
492 };
493 
494 /* List of actionfields with description
495  *
496  * VCAP_AF_ACL_ID: W6, lan966x: is2
497  *   Logical ID for the entry. This ID is extracted together with the frame in the
498  *   CPU extraction header. Only applicable to actions with CPU_COPY_ENA or
499  *   HIT_ME_ONCE set.
500  * VCAP_AF_CLS_VID_SEL: W3, sparx5: is0
501  *   Controls the classified VID: 0: VID_NONE: No action. 1: VID_ADD: New VID =
502  *   old VID + VID_VAL. 2: VID_REPLACE: New VID = VID_VAL. 3: VID_FIRST_TAG: New
503  *   VID = VID from frame's first tag (outer tag) if available, otherwise VID_VAL.
504  *   4: VID_SECOND_TAG: New VID = VID from frame's second tag (middle tag) if
505  *   available, otherwise VID_VAL. 5: VID_THIRD_TAG: New VID = VID from frame's
506  *   third tag (inner tag) if available, otherwise VID_VAL.
507  * VCAP_AF_CNT_ID: sparx5 is2 W12, sparx5 es2 W11
508  *   Counter ID, used per lookup to index the 4K frame counters (ANA_ACL:CNT_TBL).
509  *   Multiple VCAP IS2 entries can use the same counter.
510  * VCAP_AF_COPY_PORT_NUM: W7, sparx5: es2
511  *   QSYS port number when FWD_MODE is redirect or copy
512  * VCAP_AF_COPY_QUEUE_NUM: W16, sparx5: es2
513  *   QSYS queue number when FWD_MODE is redirect or copy
514  * VCAP_AF_CPU_COPY_ENA: W1, sparx5: is2/es2, lan966x: is2
515  *   Setting this bit to 1 causes all frames that hit this action to be copied to
516  *   the CPU extraction queue specified in CPU_QUEUE_NUM.
517  * VCAP_AF_CPU_QU: W3, sparx5: es0
518  *   CPU extraction queue. Used when FWD_SEL >0 and PIPELINE_ACT = XTR.
519  * VCAP_AF_CPU_QUEUE_NUM: W3, sparx5: is2/es2, lan966x: is2
520  *   CPU queue number. Used when CPU_COPY_ENA is set.
521  * VCAP_AF_CUSTOM_ACE_TYPE_ENA: W4, lan966x: is1
522  *   Enables use of custom keys in IS2. Bits 3:2 control second lookup in IS2
523  *   while bits 1:0 control first lookup. Encoding per lookup: 0: Disabled.  1:
524  *   Extract 40 bytes after position corresponding to the location of the IPv4
525  *   header and use as key.  2: Extract 40 bytes after SMAC and use as key
526  * VCAP_AF_DEI_A_VAL: W1, sparx5: es0
527  *   DEI used in ES0 tag A. See TAG_A_DEI_SEL.
528  * VCAP_AF_DEI_B_VAL: W1, sparx5: es0
529  *   DEI used in ES0 tag B. See TAG_B_DEI_SEL.
530  * VCAP_AF_DEI_C_VAL: W1, sparx5: es0
531  *   DEI used in ES0 tag C. See TAG_C_DEI_SEL.
532  * VCAP_AF_DEI_ENA: W1, sparx5: is0, lan966x: is1
533  *   If set, use DEI_VAL as classified DEI value. Otherwise, DEI from basic
534  *   classification is used
535  * VCAP_AF_DEI_VAL: W1, sparx5: is0, lan966x: is1
536  *   See DEI_ENA
537  * VCAP_AF_DLR_SEL: W2, lan966x: is1
538  *   0: No changes to port-based selection in ANA:PORT:OAM_CFG.DLR_ENA.  1: Enable
539  *   DLR frame processing 2: Disable DLR processing
540  * VCAP_AF_DP_ENA: W1, sparx5: is0, lan966x: is1
541  *   If set, use DP_VAL as classified drop precedence level. Otherwise, drop
542  *   precedence level from basic classification is used.
543  * VCAP_AF_DP_VAL: sparx5 is0 W2, lan966x is1 W1
544  *   See DP_ENA.
545  * VCAP_AF_DSCP_ENA: W1, sparx5: is0, lan966x: is1
546  *   If set, use DSCP_VAL as classified DSCP value. Otherwise, DSCP value from
547  *   basic classification is used.
548  * VCAP_AF_DSCP_SEL: W3, sparx5: es0
549  *   Selects source for DSCP. 0: Controlled by port configuration and IFH. 1:
550  *   Classified DSCP via IFH. 2: DSCP_VAL. 3: Reserved. 4: Mapped using mapping
551  *   table 0, otherwise use DSCP_VAL. 5: Mapped using mapping table 1, otherwise
552  *   use mapping table 0. 6: Mapped using mapping table 2, otherwise use DSCP_VAL.
553  *   7: Mapped using mapping table 3, otherwise use mapping table 2
554  * VCAP_AF_DSCP_VAL: W6, sparx5: is0/es0, lan966x: is1
555  *   See DSCP_ENA.
556  * VCAP_AF_ES2_REW_CMD: W3, sparx5: es2
557  *   Command forwarded to REW: 0: No action. 1: SWAP MAC addresses. 2: Do L2CP
558  *   DMAC translation when entering or leaving a tunnel.
559  * VCAP_AF_ESDX: W13, sparx5: es0
560  *   Egress counter index. Used to index egress counter set as defined in
561  *   REW::STAT_CFG.
562  * VCAP_AF_FWD_KILL_ENA: W1, lan966x: is2
563  *   Setting this bit to 1 denies forwarding of the frame forwarding to any front
564  *   port. The frame can still be copied to the CPU by other actions.
565  * VCAP_AF_FWD_MODE: W2, sparx5: es2
566  *   Forward selector: 0: Forward. 1: Discard. 2: Redirect. 3: Copy.
567  * VCAP_AF_FWD_SEL: W2, sparx5: es0
568  *   ES0 Forward selector. 0: No action. 1: Copy to loopback interface. 2:
569  *   Redirect to loopback interface. 3: Discard
570  * VCAP_AF_HIT_ME_ONCE: W1, sparx5: is2/es2, lan966x: is2
571  *   Setting this bit to 1 causes the first frame that hits this action where the
572  *   HIT_CNT counter is zero to be copied to the CPU extraction queue specified in
573  *   CPU_QUEUE_NUM. The HIT_CNT counter is then incremented and any frames that
574  *   hit this action later are not copied to the CPU. To re-enable the HIT_ME_ONCE
575  *   functionality, the HIT_CNT counter must be cleared.
576  * VCAP_AF_HOST_MATCH: W1, lan966x: is2
577  *   Used for IP source guarding. If set, it signals that the host is a valid (for
578  *   instance a valid combination of source MAC address and source IP address).
579  *   HOST_MATCH is input to the IS2 keys.
580  * VCAP_AF_IGNORE_PIPELINE_CTRL: W1, sparx5: is2/es2
581  *   Ignore ingress pipeline control. This enforces the use of the VCAP IS2 action
582  *   even when the pipeline control has terminated the frame before VCAP IS2.
583  * VCAP_AF_INTR_ENA: W1, sparx5: is2/es2
584  *   If set, an interrupt is triggered when this rule is hit
585  * VCAP_AF_ISDX_ADD_REPLACE_SEL: W1, sparx5: is0
586  *   Controls the classified ISDX. 0: New ISDX = old ISDX + ISDX_VAL. 1: New ISDX
587  *   = ISDX_VAL.
588  * VCAP_AF_ISDX_ADD_VAL: W8, lan966x: is1
589  *   If ISDX_REPLACE_ENA is set, ISDX_ADD_VAL is used directly as the new ISDX.
590  *   Encoding: ISDX_REPLACE_ENA=0, ISDX_ADD_VAL=0: Disabled ISDX_EPLACE_ENA=0,
591  *   ISDX_ADD_VAL>0: Add value to classified ISDX. ISDX_REPLACE_ENA=1: Replace
592  *   with ISDX_ADD_VAL value.
593  * VCAP_AF_ISDX_ENA: W1, lan966x: is2
594  *   Setting this bit to 1 causes the classified ISDX to be set to the value of
595  *   POLICE_IDX[8:0].
596  * VCAP_AF_ISDX_REPLACE_ENA: W1, lan966x: is1
597  *   If set, classified ISDX is set to ISDX_ADD_VAL.
598  * VCAP_AF_ISDX_VAL: W12, sparx5: is0
599  *   See isdx_add_replace_sel
600  * VCAP_AF_LOOP_ENA: W1, sparx5: es0
601  *   0: Forward based on PIPELINE_PT and FWD_SEL
602  * VCAP_AF_LRN_DIS: W1, sparx5: is2, lan966x: is2
603  *   Setting this bit to 1 disables learning of frames hitting this action.
604  * VCAP_AF_MAP_IDX: W9, sparx5: is0
605  *   Index for QoS mapping table lookup
606  * VCAP_AF_MAP_KEY: W3, sparx5: is0
607  *   Key type for QoS mapping table lookup. 0: DEI0, PCP0 (outer tag). 1: DEI1,
608  *   PCP1 (middle tag). 2: DEI2, PCP2 (inner tag). 3: MPLS TC. 4: PCP0 (outer
609  *   tag). 5: E-DEI, E-PCP (E-TAG). 6: DSCP if available, otherwise none. 7: DSCP
610  *   if available, otherwise DEI0, PCP0 (outer tag) if available using MAP_IDX+8,
611  *   otherwise none
612  * VCAP_AF_MAP_LOOKUP_SEL: W2, sparx5: is0
613  *   Selects which of the two QoS Mapping Table lookups that MAP_KEY and MAP_IDX
614  *   are applied to. 0: No changes to the QoS Mapping Table lookup. 1: Update key
615  *   type and index for QoS Mapping Table lookup #0. 2: Update key type and index
616  *   for QoS Mapping Table lookup #1. 3: Reserved.
617  * VCAP_AF_MASK_MODE: sparx5 is0 W3, sparx5 is2 W3, lan966x is2 W2
618  *   Controls the PORT_MASK use. Sparx5: 0: OR_DSTMASK, 1: AND_VLANMASK, 2:
619  *   REPLACE_PGID, 3: REPLACE_ALL, 4: REDIR_PGID, 5: OR_PGID_MASK, 6: VSTAX, 7:
620  *   Not applicable. LAN966X: 0: No action, 1: Permit/deny (AND), 2: Policy
621  *   forwarding (DMAC lookup), 3: Redirect. The CPU port is untouched by
622  *   MASK_MODE.
623  * VCAP_AF_MATCH_ID: W16, sparx5: is2
624  *   Logical ID for the entry. The MATCH_ID is extracted together with the frame
625  *   if the frame is forwarded to the CPU (CPU_COPY_ENA). The result is placed in
626  *   IFH.CL_RSLT.
627  * VCAP_AF_MATCH_ID_MASK: W16, sparx5: is2
628  *   Mask used by MATCH_ID.
629  * VCAP_AF_MIRROR_ENA: W1, lan966x: is2
630  *   Setting this bit to 1 causes frames to be mirrored to the mirror target port
631  *   (ANA::MIRRPORPORTS).
632  * VCAP_AF_MIRROR_PROBE: W2, sparx5: is2
633  *   Mirroring performed according to configuration of a mirror probe. 0: No
634  *   mirroring. 1: Mirror probe 0. 2: Mirror probe 1. 3: Mirror probe 2
635  * VCAP_AF_MIRROR_PROBE_ID: W2, sparx5: es2
636  *   Signals a mirror probe to be placed in the IFH. Only possible when FWD_MODE
637  *   is copy. 0: No mirroring. 1-3: Use mirror probe 0-2.
638  * VCAP_AF_MRP_SEL: W2, lan966x: is1
639  *   0: No changes to port-based selection in ANA:PORT:OAM_CFG.MRP_ENA.  1: Enable
640  *   MRP frame processing 2: Disable MRP processing
641  * VCAP_AF_NXT_IDX: W12, sparx5: is0
642  *   Index used as part of key (field G_IDX) in the next lookup.
643  * VCAP_AF_NXT_IDX_CTRL: W3, sparx5: is0
644  *   Controls the generation of the G_IDX used in the VCAP CLM next lookup
645  * VCAP_AF_OAM_SEL: W3, lan966x: is1
646  *   0: No changes to port-based selection in ANA:PORT:OAM_CFG.OAM_CFG 1: Enable
647  *   OAM frame processing for untagged frames 2: Enable OAM frame processing for
648  *   single frames 3: Enable OAM frame processing for double frames 4: Disable OAM
649  *   frame processing
650  * VCAP_AF_PAG_OVERRIDE_MASK: W8, sparx5: is0, lan966x: is1
651  *   Bits set in this mask will override PAG_VAL from port profile. New PAG = (PAG
652  *   (input) AND ~PAG_OVERRIDE_MASK) OR (PAG_VAL AND PAG_OVERRIDE_MASK)
653  * VCAP_AF_PAG_VAL: W8, sparx5: is0, lan966x: is1
654  *   See PAG_OVERRIDE_MASK.
655  * VCAP_AF_PCP_A_VAL: W3, sparx5: es0
656  *   PCP used in ES0 tag A. See TAG_A_PCP_SEL.
657  * VCAP_AF_PCP_B_VAL: W3, sparx5: es0
658  *   PCP used in ES0 tag B. See TAG_B_PCP_SEL.
659  * VCAP_AF_PCP_C_VAL: W3, sparx5: es0
660  *   PCP used in ES0 tag C. See TAG_C_PCP_SEL.
661  * VCAP_AF_PCP_ENA: W1, sparx5: is0, lan966x: is1
662  *   If set, use PCP_VAL as classified PCP value. Otherwise, PCP from basic
663  *   classification is used.
664  * VCAP_AF_PCP_VAL: W3, sparx5: is0, lan966x: is1
665  *   See PCP_ENA.
666  * VCAP_AF_PIPELINE_ACT: W1, sparx5: es0
667  *   Pipeline action when FWD_SEL > 0. 0: XTR. CPU_QU selects CPU extraction queue
668  *   1: LBK_ASM.
669  * VCAP_AF_PIPELINE_FORCE_ENA: W1, sparx5: is2
670  *   If set, use PIPELINE_PT unconditionally and set PIPELINE_ACT = NONE if
671  *   PIPELINE_PT == NONE. Overrules previous settings of pipeline point.
672  * VCAP_AF_PIPELINE_PT: sparx5 is2 W5, sparx5 es0 W2
673  *   Pipeline point used if PIPELINE_FORCE_ENA is set
674  * VCAP_AF_POLICE_ENA: W1, sparx5: is2/es2, lan966x: is1/is2
675  *   If set, POLICE_IDX is used to lookup ANA::POL.
676  * VCAP_AF_POLICE_IDX: sparx5 is2 W6, sparx5 es2 W6, lan966x is1 W9, lan966x is2
677  *   W9
678  *   Policer index.
679  * VCAP_AF_POLICE_REMARK: W1, sparx5: es2
680  *   If set, frames exceeding policer rates are marked as yellow but not
681  *   discarded.
682  * VCAP_AF_POLICE_VCAP_ONLY: W1, lan966x: is2
683  *   Disable policing from QoS, and port policers. Only the VCAP policer selected
684  *   by POLICE_IDX is active. Only applies to the second lookup.
685  * VCAP_AF_POP_VAL: W2, sparx5: es0
686  *   Controls popping of Q-tags. The final number of Q-tags popped is calculated
687  *   as shown in section 4.28.7.2 VLAN Pop Decision.
688  * VCAP_AF_PORT_MASK: sparx5 is0 W65, sparx5 is2 W68, lan966x is2 W8
689  *   Port mask applied to the forwarding decision based on MASK_MODE.
690  * VCAP_AF_PUSH_CUSTOMER_TAG: W2, sparx5: es0
691  *   Selects tag C mode: 0: Do not push tag C. 1: Push tag C if
692  *   IFH.VSTAX.TAG.WAS_TAGGED = 1. 2: Push tag C if IFH.VSTAX.TAG.WAS_TAGGED = 0.
693  *   3: Push tag C if UNTAG_VID_ENA = 0 or (C-TAG.VID ! = VID_C_VAL).
694  * VCAP_AF_PUSH_INNER_TAG: W1, sparx5: es0
695  *   Controls inner tagging. 0: Do not push ES0 tag B as inner tag. 1: Push ES0
696  *   tag B as inner tag.
697  * VCAP_AF_PUSH_OUTER_TAG: W2, sparx5: es0
698  *   Controls outer tagging. 0: No ES0 tag A: Port tag is allowed if enabled on
699  *   port. 1: ES0 tag A: Push ES0 tag A. No port tag. 2: Force port tag: Always
700  *   push port tag. No ES0 tag A. 3: Force untag: Never push port tag or ES0 tag
701  *   A.
702  * VCAP_AF_QOS_ENA: W1, sparx5: is0, lan966x: is1
703  *   If set, use QOS_VAL as classified QoS class. Otherwise, QoS class from basic
704  *   classification is used.
705  * VCAP_AF_QOS_VAL: W3, sparx5: is0, lan966x: is1
706  *   See QOS_ENA.
707  * VCAP_AF_REW_OP: W16, lan966x: is2
708  *   Rewriter operation command.
709  * VCAP_AF_RT_DIS: W1, sparx5: is2
710  *   If set, routing is disallowed. Only applies when IS_INNER_ACL is 0. See also
711  *   IGR_ACL_ENA, EGR_ACL_ENA, and RLEG_STAT_IDX.
712  * VCAP_AF_SFID_ENA: W1, lan966x: is1
713  *   If set, SFID_VAL is used to lookup ANA::SFID.
714  * VCAP_AF_SFID_VAL: W8, lan966x: is1
715  *   Stream filter identifier.
716  * VCAP_AF_SGID_ENA: W1, lan966x: is1
717  *   If set, SGID_VAL is used to lookup ANA::SGID.
718  * VCAP_AF_SGID_VAL: W8, lan966x: is1
719  *   Stream gate identifier.
720  * VCAP_AF_SWAP_MACS_ENA: W1, sparx5: es0
721  *   This setting is only active when FWD_SEL = 1 or FWD_SEL = 2 and PIPELINE_ACT
722  *   = LBK_ASM. 0: No action. 1: Swap MACs and clear bit 40 in new SMAC.
723  * VCAP_AF_TAG_A_DEI_SEL: W3, sparx5: es0
724  *   Selects PCP for ES0 tag A. 0: Classified DEI. 1: DEI_A_VAL. 2: DP and QoS
725  *   mapped to PCP (per port table). 3: DP.
726  * VCAP_AF_TAG_A_PCP_SEL: W3, sparx5: es0
727  *   Selects PCP for ES0 tag A. 0: Classified PCP. 1: PCP_A_VAL. 2: DP and QoS
728  *   mapped to PCP (per port table). 3: QoS class.
729  * VCAP_AF_TAG_A_TPID_SEL: W3, sparx5: es0
730  *   Selects TPID for ES0 tag A: 0: 0x8100. 1: 0x88A8. 2: Custom
731  *   (REW:PORT:PORT_VLAN_CFG.PORT_TPID). 3: If IFH.TAG_TYPE = 0 then 0x8100 else
732  *   custom.
733  * VCAP_AF_TAG_A_VID_SEL: W2, sparx5: es0
734  *   Selects VID for ES0 tag A. 0: Classified VID + VID_A_VAL. 1: VID_A_VAL.
735  * VCAP_AF_TAG_B_DEI_SEL: W3, sparx5: es0
736  *   Selects PCP for ES0 tag B. 0: Classified DEI. 1: DEI_B_VAL. 2: DP and QoS
737  *   mapped to PCP (per port table). 3: DP.
738  * VCAP_AF_TAG_B_PCP_SEL: W3, sparx5: es0
739  *   Selects PCP for ES0 tag B. 0: Classified PCP. 1: PCP_B_VAL. 2: DP and QoS
740  *   mapped to PCP (per port table). 3: QoS class.
741  * VCAP_AF_TAG_B_TPID_SEL: W3, sparx5: es0
742  *   Selects TPID for ES0 tag B. 0: 0x8100. 1: 0x88A8. 2: Custom
743  *   (REW:PORT:PORT_VLAN_CFG.PORT_TPID). 3: If IFH.TAG_TYPE = 0 then 0x8100 else
744  *   custom.
745  * VCAP_AF_TAG_B_VID_SEL: W2, sparx5: es0
746  *   Selects VID for ES0 tag B. 0: Classified VID + VID_B_VAL. 1: VID_B_VAL.
747  * VCAP_AF_TAG_C_DEI_SEL: W3, sparx5: es0
748  *   Selects DEI source for ES0 tag C. 0: Classified DEI. 1: DEI_C_VAL. 2:
749  *   REW::DP_MAP.DP [IFH.VSTAX.QOS.DP]. 3: DEI of popped VLAN tag if available
750  *   (IFH.VSTAX.TAG.WAS_TAGGED = 1 and tot_pop_cnt>0) else DEI_C_VAL. 4: Mapped
751  *   using mapping table 0, otherwise use DEI_C_VAL. 5: Mapped using mapping table
752  *   1, otherwise use mapping table 0. 6: Mapped using mapping table 2, otherwise
753  *   use DEI_C_VAL. 7: Mapped using mapping table 3, otherwise use mapping table
754  *   2.
755  * VCAP_AF_TAG_C_PCP_SEL: W3, sparx5: es0
756  *   Selects PCP source for ES0 tag C. 0: Classified PCP. 1: PCP_C_VAL. 2:
757  *   Reserved. 3: PCP of popped VLAN tag if available (IFH.VSTAX.TAG.WAS_TAGGED=1
758  *   and tot_pop_cnt>0) else PCP_C_VAL. 4: Mapped using mapping table 0, otherwise
759  *   use PCP_C_VAL. 5: Mapped using mapping table 1, otherwise use mapping table
760  *   0. 6: Mapped using mapping table 2, otherwise use PCP_C_VAL. 7: Mapped using
761  *   mapping table 3, otherwise use mapping table 2.
762  * VCAP_AF_TAG_C_TPID_SEL: W3, sparx5: es0
763  *   Selects TPID for ES0 tag C. 0: 0x8100. 1: 0x88A8. 2: Custom 1. 3: Custom 2.
764  *   4: Custom 3. 5: See TAG_A_TPID_SEL.
765  * VCAP_AF_TAG_C_VID_SEL: W2, sparx5: es0
766  *   Selects VID for ES0 tag C. The resulting VID is termed C-TAG.VID. 0:
767  *   Classified VID. 1: VID_C_VAL. 2: IFH.ENCAP.GVID. 3: Reserved.
768  * VCAP_AF_TYPE: W1, sparx5: is0, lan966x: is1
769  *   Actionset type id - Set by the API
770  * VCAP_AF_UNTAG_VID_ENA: W1, sparx5: es0
771  *   Controls insertion of tag C. Untag or insert mode can be selected. See
772  *   PUSH_CUSTOMER_TAG.
773  * VCAP_AF_VID_A_VAL: W12, sparx5: es0
774  *   VID used in ES0 tag A. See TAG_A_VID_SEL.
775  * VCAP_AF_VID_B_VAL: W12, sparx5: es0
776  *   VID used in ES0 tag B. See TAG_B_VID_SEL.
777  * VCAP_AF_VID_C_VAL: W12, sparx5: es0
778  *   VID used in ES0 tag C. See TAG_C_VID_SEL.
779  * VCAP_AF_VID_REPLACE_ENA: W1, lan966x: is1
780  *   Controls the classified VID: VID_REPLACE_ENA=0: Add VID_ADD_VAL to basic
781  *   classified VID and use result as new classified VID. VID_REPLACE_ENA = 1:
782  *   Replace basic classified VID with VID_VAL value and use as new classified
783  *   VID.
784  * VCAP_AF_VID_VAL: sparx5 is0 W13, lan966x is1 W12
785  *   New VID Value
786  * VCAP_AF_VLAN_POP_CNT: W2, lan966x: is1
787  *   See VLAN_POP_CNT_ENA
788  * VCAP_AF_VLAN_POP_CNT_ENA: W1, lan966x: is1
789  *   If set, use VLAN_POP_CNT as the number of VLAN tags to pop from the incoming
790  *   frame. This number is used by the Rewriter. Otherwise, VLAN_POP_CNT from
791  *   ANA:PORT:VLAN_CFG.VLAN_POP_CNT is used
792  */
793 
794 /* Actionfield names */
795 enum vcap_action_field {
796 	VCAP_AF_NO_VALUE,  /* initial value */
797 	VCAP_AF_ACL_ID,
798 	VCAP_AF_CLS_VID_SEL,
799 	VCAP_AF_CNT_ID,
800 	VCAP_AF_COPY_PORT_NUM,
801 	VCAP_AF_COPY_QUEUE_NUM,
802 	VCAP_AF_CPU_COPY_ENA,
803 	VCAP_AF_CPU_QU,
804 	VCAP_AF_CPU_QUEUE_NUM,
805 	VCAP_AF_CUSTOM_ACE_TYPE_ENA,
806 	VCAP_AF_DEI_A_VAL,
807 	VCAP_AF_DEI_B_VAL,
808 	VCAP_AF_DEI_C_VAL,
809 	VCAP_AF_DEI_ENA,
810 	VCAP_AF_DEI_VAL,
811 	VCAP_AF_DLR_SEL,
812 	VCAP_AF_DP_ENA,
813 	VCAP_AF_DP_VAL,
814 	VCAP_AF_DSCP_ENA,
815 	VCAP_AF_DSCP_SEL,
816 	VCAP_AF_DSCP_VAL,
817 	VCAP_AF_ES2_REW_CMD,
818 	VCAP_AF_ESDX,
819 	VCAP_AF_FWD_KILL_ENA,
820 	VCAP_AF_FWD_MODE,
821 	VCAP_AF_FWD_SEL,
822 	VCAP_AF_HIT_ME_ONCE,
823 	VCAP_AF_HOST_MATCH,
824 	VCAP_AF_IGNORE_PIPELINE_CTRL,
825 	VCAP_AF_INTR_ENA,
826 	VCAP_AF_ISDX_ADD_REPLACE_SEL,
827 	VCAP_AF_ISDX_ADD_VAL,
828 	VCAP_AF_ISDX_ENA,
829 	VCAP_AF_ISDX_REPLACE_ENA,
830 	VCAP_AF_ISDX_VAL,
831 	VCAP_AF_LOOP_ENA,
832 	VCAP_AF_LRN_DIS,
833 	VCAP_AF_MAP_IDX,
834 	VCAP_AF_MAP_KEY,
835 	VCAP_AF_MAP_LOOKUP_SEL,
836 	VCAP_AF_MASK_MODE,
837 	VCAP_AF_MATCH_ID,
838 	VCAP_AF_MATCH_ID_MASK,
839 	VCAP_AF_MIRROR_ENA,
840 	VCAP_AF_MIRROR_PROBE,
841 	VCAP_AF_MIRROR_PROBE_ID,
842 	VCAP_AF_MRP_SEL,
843 	VCAP_AF_NXT_IDX,
844 	VCAP_AF_NXT_IDX_CTRL,
845 	VCAP_AF_OAM_SEL,
846 	VCAP_AF_PAG_OVERRIDE_MASK,
847 	VCAP_AF_PAG_VAL,
848 	VCAP_AF_PCP_A_VAL,
849 	VCAP_AF_PCP_B_VAL,
850 	VCAP_AF_PCP_C_VAL,
851 	VCAP_AF_PCP_ENA,
852 	VCAP_AF_PCP_VAL,
853 	VCAP_AF_PIPELINE_ACT,
854 	VCAP_AF_PIPELINE_FORCE_ENA,
855 	VCAP_AF_PIPELINE_PT,
856 	VCAP_AF_POLICE_ENA,
857 	VCAP_AF_POLICE_IDX,
858 	VCAP_AF_POLICE_REMARK,
859 	VCAP_AF_POLICE_VCAP_ONLY,
860 	VCAP_AF_POP_VAL,
861 	VCAP_AF_PORT_MASK,
862 	VCAP_AF_PUSH_CUSTOMER_TAG,
863 	VCAP_AF_PUSH_INNER_TAG,
864 	VCAP_AF_PUSH_OUTER_TAG,
865 	VCAP_AF_QOS_ENA,
866 	VCAP_AF_QOS_VAL,
867 	VCAP_AF_REW_OP,
868 	VCAP_AF_RT_DIS,
869 	VCAP_AF_SFID_ENA,
870 	VCAP_AF_SFID_VAL,
871 	VCAP_AF_SGID_ENA,
872 	VCAP_AF_SGID_VAL,
873 	VCAP_AF_SWAP_MACS_ENA,
874 	VCAP_AF_TAG_A_DEI_SEL,
875 	VCAP_AF_TAG_A_PCP_SEL,
876 	VCAP_AF_TAG_A_TPID_SEL,
877 	VCAP_AF_TAG_A_VID_SEL,
878 	VCAP_AF_TAG_B_DEI_SEL,
879 	VCAP_AF_TAG_B_PCP_SEL,
880 	VCAP_AF_TAG_B_TPID_SEL,
881 	VCAP_AF_TAG_B_VID_SEL,
882 	VCAP_AF_TAG_C_DEI_SEL,
883 	VCAP_AF_TAG_C_PCP_SEL,
884 	VCAP_AF_TAG_C_TPID_SEL,
885 	VCAP_AF_TAG_C_VID_SEL,
886 	VCAP_AF_TYPE,
887 	VCAP_AF_UNTAG_VID_ENA,
888 	VCAP_AF_VID_A_VAL,
889 	VCAP_AF_VID_B_VAL,
890 	VCAP_AF_VID_C_VAL,
891 	VCAP_AF_VID_REPLACE_ENA,
892 	VCAP_AF_VID_VAL,
893 	VCAP_AF_VLAN_POP_CNT,
894 	VCAP_AF_VLAN_POP_CNT_ENA,
895 };
896 
897 #endif /* __VCAP_AG_API__ */
898