1 /* SPDX-License-Identifier: GPL-2.0+ */ 2 /* Microchip Sparx5 Switch driver VCAP implementation 3 * 4 * Copyright (c) 2022 Microchip Technology Inc. and its subsidiaries. 5 * 6 * The Sparx5 Chip Register Model can be browsed at this location: 7 * https://github.com/microchip-ung/sparx-5_reginfo 8 */ 9 10 #ifndef __SPARX5_VCAP_IMPL_H__ 11 #define __SPARX5_VCAP_IMPL_H__ 12 13 #include <linux/types.h> 14 #include <linux/list.h> 15 16 #include "vcap_api.h" 17 #include "vcap_api_client.h" 18 19 #define SPARX5_VCAP_CID_IS0_L0 VCAP_CID_INGRESS_L0 /* IS0/CLM lookup 0 */ 20 #define SPARX5_VCAP_CID_IS0_L1 VCAP_CID_INGRESS_L1 /* IS0/CLM lookup 1 */ 21 #define SPARX5_VCAP_CID_IS0_L2 VCAP_CID_INGRESS_L2 /* IS0/CLM lookup 2 */ 22 #define SPARX5_VCAP_CID_IS0_L3 VCAP_CID_INGRESS_L3 /* IS0/CLM lookup 3 */ 23 #define SPARX5_VCAP_CID_IS0_L4 VCAP_CID_INGRESS_L4 /* IS0/CLM lookup 4 */ 24 #define SPARX5_VCAP_CID_IS0_L5 VCAP_CID_INGRESS_L5 /* IS0/CLM lookup 5 */ 25 #define SPARX5_VCAP_CID_IS0_MAX \ 26 (VCAP_CID_INGRESS_L5 + VCAP_CID_LOOKUP_SIZE - 1) /* IS0/CLM Max */ 27 28 #define SPARX5_VCAP_CID_IS2_L0 VCAP_CID_INGRESS_STAGE2_L0 /* IS2 lookup 0 */ 29 #define SPARX5_VCAP_CID_IS2_L1 VCAP_CID_INGRESS_STAGE2_L1 /* IS2 lookup 1 */ 30 #define SPARX5_VCAP_CID_IS2_L2 VCAP_CID_INGRESS_STAGE2_L2 /* IS2 lookup 2 */ 31 #define SPARX5_VCAP_CID_IS2_L3 VCAP_CID_INGRESS_STAGE2_L3 /* IS2 lookup 3 */ 32 #define SPARX5_VCAP_CID_IS2_MAX \ 33 (VCAP_CID_INGRESS_STAGE2_L3 + VCAP_CID_LOOKUP_SIZE - 1) /* IS2 Max */ 34 35 #define SPARX5_VCAP_CID_ES2_L0 VCAP_CID_EGRESS_STAGE2_L0 /* ES2 lookup 0 */ 36 #define SPARX5_VCAP_CID_ES2_L1 VCAP_CID_EGRESS_STAGE2_L1 /* ES2 lookup 1 */ 37 #define SPARX5_VCAP_CID_ES2_MAX \ 38 (VCAP_CID_EGRESS_STAGE2_L1 + VCAP_CID_LOOKUP_SIZE - 1) /* ES2 Max */ 39 40 /* IS0 port keyset selection control */ 41 42 /* IS0 ethernet, IPv4, IPv6 traffic type keyset generation */ 43 enum vcap_is0_port_sel_etype { 44 VCAP_IS0_PS_ETYPE_DEFAULT, /* None or follow depending on class */ 45 VCAP_IS0_PS_ETYPE_MLL, 46 VCAP_IS0_PS_ETYPE_SGL_MLBS, 47 VCAP_IS0_PS_ETYPE_DBL_MLBS, 48 VCAP_IS0_PS_ETYPE_TRI_MLBS, 49 VCAP_IS0_PS_ETYPE_TRI_VID, 50 VCAP_IS0_PS_ETYPE_LL_FULL, 51 VCAP_IS0_PS_ETYPE_NORMAL_SRC, 52 VCAP_IS0_PS_ETYPE_NORMAL_DST, 53 VCAP_IS0_PS_ETYPE_NORMAL_7TUPLE, 54 VCAP_IS0_PS_ETYPE_NORMAL_5TUPLE_IP4, 55 VCAP_IS0_PS_ETYPE_PURE_5TUPLE_IP4, 56 VCAP_IS0_PS_ETYPE_DBL_VID_IDX, 57 VCAP_IS0_PS_ETYPE_ETAG, 58 VCAP_IS0_PS_ETYPE_NO_LOOKUP, 59 }; 60 61 /* IS0 MPLS traffic type keyset generation */ 62 enum vcap_is0_port_sel_mpls_uc_mc { 63 VCAP_IS0_PS_MPLS_FOLLOW_ETYPE, 64 VCAP_IS0_PS_MPLS_MLL, 65 VCAP_IS0_PS_MPLS_SGL_MLBS, 66 VCAP_IS0_PS_MPLS_DBL_MLBS, 67 VCAP_IS0_PS_MPLS_TRI_MLBS, 68 VCAP_IS0_PS_MPLS_TRI_VID, 69 VCAP_IS0_PS_MPLS_LL_FULL, 70 VCAP_IS0_PS_MPLS_NORMAL_SRC, 71 VCAP_IS0_PS_MPLS_NORMAL_DST, 72 VCAP_IS0_PS_MPLS_NORMAL_7TUPLE, 73 VCAP_IS0_PS_MPLS_NORMAL_5TUPLE_IP4, 74 VCAP_IS0_PS_MPLS_PURE_5TUPLE_IP4, 75 VCAP_IS0_PS_MPLS_DBL_VID_IDX, 76 VCAP_IS0_PS_MPLS_ETAG, 77 VCAP_IS0_PS_MPLS_NO_LOOKUP, 78 }; 79 80 /* IS0 MBLS traffic type keyset generation */ 81 enum vcap_is0_port_sel_mlbs { 82 VCAP_IS0_PS_MLBS_FOLLOW_ETYPE, 83 VCAP_IS0_PS_MLBS_SGL_MLBS, 84 VCAP_IS0_PS_MLBS_DBL_MLBS, 85 VCAP_IS0_PS_MLBS_TRI_MLBS, 86 VCAP_IS0_PS_MLBS_NO_LOOKUP = 17, 87 }; 88 89 /* IS2 port keyset selection control */ 90 91 /* IS2 non-ethernet traffic type keyset generation */ 92 enum vcap_is2_port_sel_noneth { 93 VCAP_IS2_PS_NONETH_MAC_ETYPE, 94 VCAP_IS2_PS_NONETH_CUSTOM_1, 95 VCAP_IS2_PS_NONETH_CUSTOM_2, 96 VCAP_IS2_PS_NONETH_NO_LOOKUP 97 }; 98 99 /* IS2 IPv4 unicast traffic type keyset generation */ 100 enum vcap_is2_port_sel_ipv4_uc { 101 VCAP_IS2_PS_IPV4_UC_MAC_ETYPE, 102 VCAP_IS2_PS_IPV4_UC_IP4_TCP_UDP_OTHER, 103 VCAP_IS2_PS_IPV4_UC_IP_7TUPLE, 104 }; 105 106 /* IS2 IPv4 multicast traffic type keyset generation */ 107 enum vcap_is2_port_sel_ipv4_mc { 108 VCAP_IS2_PS_IPV4_MC_MAC_ETYPE, 109 VCAP_IS2_PS_IPV4_MC_IP4_TCP_UDP_OTHER, 110 VCAP_IS2_PS_IPV4_MC_IP_7TUPLE, 111 VCAP_IS2_PS_IPV4_MC_IP4_VID, 112 }; 113 114 /* IS2 IPv6 unicast traffic type keyset generation */ 115 enum vcap_is2_port_sel_ipv6_uc { 116 VCAP_IS2_PS_IPV6_UC_MAC_ETYPE, 117 VCAP_IS2_PS_IPV6_UC_IP_7TUPLE, 118 VCAP_IS2_PS_IPV6_UC_IP6_STD, 119 VCAP_IS2_PS_IPV6_UC_IP4_TCP_UDP_OTHER, 120 }; 121 122 /* IS2 IPv6 multicast traffic type keyset generation */ 123 enum vcap_is2_port_sel_ipv6_mc { 124 VCAP_IS2_PS_IPV6_MC_MAC_ETYPE, 125 VCAP_IS2_PS_IPV6_MC_IP_7TUPLE, 126 VCAP_IS2_PS_IPV6_MC_IP6_VID, 127 VCAP_IS2_PS_IPV6_MC_IP6_STD, 128 VCAP_IS2_PS_IPV6_MC_IP4_TCP_UDP_OTHER, 129 }; 130 131 /* IS2 ARP traffic type keyset generation */ 132 enum vcap_is2_port_sel_arp { 133 VCAP_IS2_PS_ARP_MAC_ETYPE, 134 VCAP_IS2_PS_ARP_ARP, 135 }; 136 137 /* ES2 port keyset selection control */ 138 139 /* ES2 IPv4 traffic type keyset generation */ 140 enum vcap_es2_port_sel_ipv4 { 141 VCAP_ES2_PS_IPV4_MAC_ETYPE, 142 VCAP_ES2_PS_IPV4_IP_7TUPLE, 143 VCAP_ES2_PS_IPV4_IP4_TCP_UDP_VID, 144 VCAP_ES2_PS_IPV4_IP4_TCP_UDP_OTHER, 145 VCAP_ES2_PS_IPV4_IP4_VID, 146 VCAP_ES2_PS_IPV4_IP4_OTHER, 147 }; 148 149 /* ES2 IPv6 traffic type keyset generation */ 150 enum vcap_es2_port_sel_ipv6 { 151 VCAP_ES2_PS_IPV6_MAC_ETYPE, 152 VCAP_ES2_PS_IPV6_IP_7TUPLE, 153 VCAP_ES2_PS_IPV6_IP_7TUPLE_VID, 154 VCAP_ES2_PS_IPV6_IP_7TUPLE_STD, 155 VCAP_ES2_PS_IPV6_IP6_VID, 156 VCAP_ES2_PS_IPV6_IP6_STD, 157 VCAP_ES2_PS_IPV6_IP4_DOWNGRADE, 158 }; 159 160 /* ES2 ARP traffic type keyset generation */ 161 enum vcap_es2_port_sel_arp { 162 VCAP_ES2_PS_ARP_MAC_ETYPE, 163 VCAP_ES2_PS_ARP_ARP, 164 }; 165 166 /* Get the port keyset for the vcap lookup */ 167 int sparx5_vcap_get_port_keyset(struct net_device *ndev, 168 struct vcap_admin *admin, 169 int cid, 170 u16 l3_proto, 171 struct vcap_keyset_list *kslist); 172 173 /* Check if the ethertype is supported by the vcap port classification */ 174 bool sparx5_vcap_is_known_etype(struct vcap_admin *admin, u16 etype); 175 176 #endif /* __SPARX5_VCAP_IMPL_H__ */ 177