1 /* SPDX-License-Identifier: GPL-2.0+ */ 2 /* Microchip Sparx5 Switch driver 3 * 4 * Copyright (c) 2022 Microchip Technology Inc. and its subsidiaries. 5 */ 6 7 #ifndef __SPARX5_QOS_H__ 8 #define __SPARX5_QOS_H__ 9 10 #include <linux/netdevice.h> 11 12 /* Number of Layers */ 13 #define SPX5_HSCH_LAYER_CNT 3 14 15 /* Scheduling elements per layer */ 16 #define SPX5_HSCH_L0_SE_CNT 5040 17 #define SPX5_HSCH_L1_SE_CNT 64 18 #define SPX5_HSCH_L2_SE_CNT 64 19 20 /* Calculate Layer 0 Scheduler Element when using normal hierarchy */ 21 #define SPX5_HSCH_L0_GET_IDX(port, queue) ((64 * (port)) + (8 * (queue))) 22 23 /* Number of leak groups */ 24 #define SPX5_HSCH_LEAK_GRP_CNT 4 25 26 /* Scheduler modes */ 27 #define SPX5_SE_MODE_LINERATE 0 28 #define SPX5_SE_MODE_DATARATE 1 29 30 /* Rate and burst */ 31 #define SPX5_SE_RATE_MAX 262143 32 #define SPX5_SE_BURST_MAX 127 33 #define SPX5_SE_RATE_MIN 1 34 #define SPX5_SE_BURST_MIN 1 35 #define SPX5_SE_BURST_UNIT 4096 36 37 struct sparx5_shaper { 38 u32 mode; 39 u32 rate; 40 u32 burst; 41 }; 42 43 struct sparx5_lg { 44 u32 max_rate; 45 u32 resolution; 46 u32 leak_time; 47 u32 max_ses; 48 }; 49 50 struct sparx5_layer { 51 struct sparx5_lg leak_groups[SPX5_HSCH_LEAK_GRP_CNT]; 52 }; 53 54 int sparx5_qos_init(struct sparx5 *sparx5); 55 56 /* Multi-Queue Priority */ 57 int sparx5_tc_mqprio_add(struct net_device *ndev, u8 num_tc); 58 int sparx5_tc_mqprio_del(struct net_device *ndev); 59 60 /* Token Bucket Filter */ 61 struct tc_tbf_qopt_offload_replace_params; 62 int sparx5_tc_tbf_add(struct sparx5_port *port, 63 struct tc_tbf_qopt_offload_replace_params *params, 64 u32 layer, u32 idx); 65 int sparx5_tc_tbf_del(struct sparx5_port *port, u32 layer, u32 idx); 66 67 #endif /* __SPARX5_QOS_H__ */ 68