1 // SPDX-License-Identifier: GPL-2.0+
2 
3 #include <linux/module.h>
4 #include <linux/if_bridge.h>
5 #include <linux/if_vlan.h>
6 #include <linux/iopoll.h>
7 #include <linux/ip.h>
8 #include <linux/of_platform.h>
9 #include <linux/of_net.h>
10 #include <linux/phy/phy.h>
11 #include <linux/reset.h>
12 #include <net/addrconf.h>
13 
14 #include "lan966x_main.h"
15 
16 #define XTR_EOF_0			0x00000080U
17 #define XTR_EOF_1			0x01000080U
18 #define XTR_EOF_2			0x02000080U
19 #define XTR_EOF_3			0x03000080U
20 #define XTR_PRUNED			0x04000080U
21 #define XTR_ABORT			0x05000080U
22 #define XTR_ESCAPE			0x06000080U
23 #define XTR_NOT_READY			0x07000080U
24 #define XTR_VALID_BYTES(x)		(4 - (((x) >> 24) & 3))
25 
26 #define IO_RANGES 2
27 
28 static const struct of_device_id lan966x_match[] = {
29 	{ .compatible = "microchip,lan966x-switch" },
30 	{ }
31 };
32 MODULE_DEVICE_TABLE(of, lan966x_match);
33 
34 struct lan966x_main_io_resource {
35 	enum lan966x_target id;
36 	phys_addr_t offset;
37 	int range;
38 };
39 
40 static const struct lan966x_main_io_resource lan966x_main_iomap[] =  {
41 	{ TARGET_CPU,                   0xc0000, 0 }, /* 0xe00c0000 */
42 	{ TARGET_FDMA,                  0xc0400, 0 }, /* 0xe00c0400 */
43 	{ TARGET_ORG,                         0, 1 }, /* 0xe2000000 */
44 	{ TARGET_GCB,                    0x4000, 1 }, /* 0xe2004000 */
45 	{ TARGET_QS,                     0x8000, 1 }, /* 0xe2008000 */
46 	{ TARGET_PTP,                    0xc000, 1 }, /* 0xe200c000 */
47 	{ TARGET_CHIP_TOP,              0x10000, 1 }, /* 0xe2010000 */
48 	{ TARGET_REW,                   0x14000, 1 }, /* 0xe2014000 */
49 	{ TARGET_VCAP,                  0x18000, 1 }, /* 0xe2018000 */
50 	{ TARGET_VCAP + 1,              0x20000, 1 }, /* 0xe2020000 */
51 	{ TARGET_VCAP + 2,              0x24000, 1 }, /* 0xe2024000 */
52 	{ TARGET_SYS,                   0x28000, 1 }, /* 0xe2028000 */
53 	{ TARGET_DEV,                   0x34000, 1 }, /* 0xe2034000 */
54 	{ TARGET_DEV +  1,              0x38000, 1 }, /* 0xe2038000 */
55 	{ TARGET_DEV +  2,              0x3c000, 1 }, /* 0xe203c000 */
56 	{ TARGET_DEV +  3,              0x40000, 1 }, /* 0xe2040000 */
57 	{ TARGET_DEV +  4,              0x44000, 1 }, /* 0xe2044000 */
58 	{ TARGET_DEV +  5,              0x48000, 1 }, /* 0xe2048000 */
59 	{ TARGET_DEV +  6,              0x4c000, 1 }, /* 0xe204c000 */
60 	{ TARGET_DEV +  7,              0x50000, 1 }, /* 0xe2050000 */
61 	{ TARGET_QSYS,                 0x100000, 1 }, /* 0xe2100000 */
62 	{ TARGET_AFI,                  0x120000, 1 }, /* 0xe2120000 */
63 	{ TARGET_ANA,                  0x140000, 1 }, /* 0xe2140000 */
64 };
65 
66 static int lan966x_create_targets(struct platform_device *pdev,
67 				  struct lan966x *lan966x)
68 {
69 	struct resource *iores[IO_RANGES];
70 	void __iomem *begin[IO_RANGES];
71 	int idx;
72 
73 	/* Initially map the entire range and after that update each target to
74 	 * point inside the region at the correct offset. It is possible that
75 	 * other devices access the same region so don't add any checks about
76 	 * this.
77 	 */
78 	for (idx = 0; idx < IO_RANGES; idx++) {
79 		iores[idx] = platform_get_resource(pdev, IORESOURCE_MEM,
80 						   idx);
81 		if (!iores[idx]) {
82 			dev_err(&pdev->dev, "Invalid resource\n");
83 			return -EINVAL;
84 		}
85 
86 		begin[idx] = devm_ioremap(&pdev->dev,
87 					  iores[idx]->start,
88 					  resource_size(iores[idx]));
89 		if (!begin[idx]) {
90 			dev_err(&pdev->dev, "Unable to get registers: %s\n",
91 				iores[idx]->name);
92 			return -ENOMEM;
93 		}
94 	}
95 
96 	for (idx = 0; idx < ARRAY_SIZE(lan966x_main_iomap); idx++) {
97 		const struct lan966x_main_io_resource *iomap =
98 			&lan966x_main_iomap[idx];
99 
100 		lan966x->regs[iomap->id] = begin[iomap->range] + iomap->offset;
101 	}
102 
103 	return 0;
104 }
105 
106 static bool lan966x_port_unique_address(struct net_device *dev)
107 {
108 	struct lan966x_port *port = netdev_priv(dev);
109 	struct lan966x *lan966x = port->lan966x;
110 	int p;
111 
112 	for (p = 0; p < lan966x->num_phys_ports; ++p) {
113 		port = lan966x->ports[p];
114 		if (!port || port->dev == dev)
115 			continue;
116 
117 		if (ether_addr_equal(dev->dev_addr, port->dev->dev_addr))
118 			return false;
119 	}
120 
121 	return true;
122 }
123 
124 static int lan966x_port_set_mac_address(struct net_device *dev, void *p)
125 {
126 	struct lan966x_port *port = netdev_priv(dev);
127 	struct lan966x *lan966x = port->lan966x;
128 	const struct sockaddr *addr = p;
129 	int ret;
130 
131 	if (ether_addr_equal(addr->sa_data, dev->dev_addr))
132 		return 0;
133 
134 	/* Learn the new net device MAC address in the mac table. */
135 	ret = lan966x_mac_cpu_learn(lan966x, addr->sa_data, HOST_PVID);
136 	if (ret)
137 		return ret;
138 
139 	/* If there is another port with the same address as the dev, then don't
140 	 * delete it from the MAC table
141 	 */
142 	if (!lan966x_port_unique_address(dev))
143 		goto out;
144 
145 	/* Then forget the previous one. */
146 	ret = lan966x_mac_cpu_forget(lan966x, dev->dev_addr, HOST_PVID);
147 	if (ret)
148 		return ret;
149 
150 out:
151 	eth_hw_addr_set(dev, addr->sa_data);
152 	return ret;
153 }
154 
155 static int lan966x_port_get_phys_port_name(struct net_device *dev,
156 					   char *buf, size_t len)
157 {
158 	struct lan966x_port *port = netdev_priv(dev);
159 	int ret;
160 
161 	ret = snprintf(buf, len, "p%d", port->chip_port);
162 	if (ret >= len)
163 		return -EINVAL;
164 
165 	return 0;
166 }
167 
168 static int lan966x_port_open(struct net_device *dev)
169 {
170 	struct lan966x_port *port = netdev_priv(dev);
171 	struct lan966x *lan966x = port->lan966x;
172 	int err;
173 
174 	/* Enable receiving frames on the port, and activate auto-learning of
175 	 * MAC addresses.
176 	 */
177 	lan_rmw(ANA_PORT_CFG_LEARNAUTO_SET(1) |
178 		ANA_PORT_CFG_RECV_ENA_SET(1) |
179 		ANA_PORT_CFG_PORTID_VAL_SET(port->chip_port),
180 		ANA_PORT_CFG_LEARNAUTO |
181 		ANA_PORT_CFG_RECV_ENA |
182 		ANA_PORT_CFG_PORTID_VAL,
183 		lan966x, ANA_PORT_CFG(port->chip_port));
184 
185 	err = phylink_fwnode_phy_connect(port->phylink, port->fwnode, 0);
186 	if (err) {
187 		netdev_err(dev, "Could not attach to PHY\n");
188 		return err;
189 	}
190 
191 	phylink_start(port->phylink);
192 
193 	return 0;
194 }
195 
196 static int lan966x_port_stop(struct net_device *dev)
197 {
198 	struct lan966x_port *port = netdev_priv(dev);
199 
200 	lan966x_port_config_down(port);
201 	phylink_stop(port->phylink);
202 	phylink_disconnect_phy(port->phylink);
203 
204 	return 0;
205 }
206 
207 static int lan966x_port_inj_status(struct lan966x *lan966x)
208 {
209 	return lan_rd(lan966x, QS_INJ_STATUS);
210 }
211 
212 static int lan966x_port_inj_ready(struct lan966x *lan966x, u8 grp)
213 {
214 	u32 val;
215 
216 	if (lan_rd(lan966x, QS_INJ_STATUS) & QS_INJ_STATUS_FIFO_RDY_SET(BIT(grp)))
217 		return 0;
218 
219 	return readx_poll_timeout_atomic(lan966x_port_inj_status, lan966x, val,
220 					 QS_INJ_STATUS_FIFO_RDY_GET(val) & BIT(grp),
221 					 READL_SLEEP_US, READL_TIMEOUT_US);
222 }
223 
224 static int lan966x_port_ifh_xmit(struct sk_buff *skb,
225 				 __be32 *ifh,
226 				 struct net_device *dev)
227 {
228 	struct lan966x_port *port = netdev_priv(dev);
229 	struct lan966x *lan966x = port->lan966x;
230 	u32 i, count, last;
231 	u8 grp = 0;
232 	u32 val;
233 	int err;
234 
235 	val = lan_rd(lan966x, QS_INJ_STATUS);
236 	if (!(QS_INJ_STATUS_FIFO_RDY_GET(val) & BIT(grp)) ||
237 	    (QS_INJ_STATUS_WMARK_REACHED_GET(val) & BIT(grp)))
238 		goto err;
239 
240 	/* Write start of frame */
241 	lan_wr(QS_INJ_CTRL_GAP_SIZE_SET(1) |
242 	       QS_INJ_CTRL_SOF_SET(1),
243 	       lan966x, QS_INJ_CTRL(grp));
244 
245 	/* Write IFH header */
246 	for (i = 0; i < IFH_LEN; ++i) {
247 		/* Wait until the fifo is ready */
248 		err = lan966x_port_inj_ready(lan966x, grp);
249 		if (err)
250 			goto err;
251 
252 		lan_wr((__force u32)ifh[i], lan966x, QS_INJ_WR(grp));
253 	}
254 
255 	/* Write frame */
256 	count = DIV_ROUND_UP(skb->len, 4);
257 	last = skb->len % 4;
258 	for (i = 0; i < count; ++i) {
259 		/* Wait until the fifo is ready */
260 		err = lan966x_port_inj_ready(lan966x, grp);
261 		if (err)
262 			goto err;
263 
264 		lan_wr(((u32 *)skb->data)[i], lan966x, QS_INJ_WR(grp));
265 	}
266 
267 	/* Add padding */
268 	while (i < (LAN966X_BUFFER_MIN_SZ / 4)) {
269 		/* Wait until the fifo is ready */
270 		err = lan966x_port_inj_ready(lan966x, grp);
271 		if (err)
272 			goto err;
273 
274 		lan_wr(0, lan966x, QS_INJ_WR(grp));
275 		++i;
276 	}
277 
278 	/* Inidcate EOF and valid bytes in the last word */
279 	lan_wr(QS_INJ_CTRL_GAP_SIZE_SET(1) |
280 	       QS_INJ_CTRL_VLD_BYTES_SET(skb->len < LAN966X_BUFFER_MIN_SZ ?
281 				     0 : last) |
282 	       QS_INJ_CTRL_EOF_SET(1),
283 	       lan966x, QS_INJ_CTRL(grp));
284 
285 	/* Add dummy CRC */
286 	lan_wr(0, lan966x, QS_INJ_WR(grp));
287 	skb_tx_timestamp(skb);
288 
289 	dev->stats.tx_packets++;
290 	dev->stats.tx_bytes += skb->len;
291 
292 	if (skb_shinfo(skb)->tx_flags & SKBTX_HW_TSTAMP &&
293 	    LAN966X_SKB_CB(skb)->rew_op == IFH_REW_OP_TWO_STEP_PTP)
294 		return NETDEV_TX_OK;
295 
296 	dev_consume_skb_any(skb);
297 	return NETDEV_TX_OK;
298 
299 err:
300 	if (skb_shinfo(skb)->tx_flags & SKBTX_HW_TSTAMP &&
301 	    LAN966X_SKB_CB(skb)->rew_op == IFH_REW_OP_TWO_STEP_PTP)
302 		lan966x_ptp_txtstamp_release(port, skb);
303 
304 	return NETDEV_TX_BUSY;
305 }
306 
307 static void lan966x_ifh_set(u8 *ifh, size_t val, size_t pos, size_t length)
308 {
309 	int i = 0;
310 
311 	do {
312 		u8 p = IFH_LEN_BYTES - (pos + i) / 8 - 1;
313 		u8 v = val >> i & 0xff;
314 
315 		/* There is no need to check for limits of the array, as these
316 		 * will never be written
317 		 */
318 		ifh[p] |= v << ((pos + i) % 8);
319 		ifh[p - 1] |= v >> (8 - (pos + i) % 8);
320 
321 		i += 8;
322 	} while (i < length);
323 }
324 
325 void lan966x_ifh_set_bypass(void *ifh, u64 bypass)
326 {
327 	lan966x_ifh_set(ifh, bypass, IFH_POS_BYPASS, IFH_WID_BYPASS);
328 }
329 
330 void lan966x_ifh_set_port(void *ifh, u64 port)
331 {
332 	lan966x_ifh_set(ifh, port, IFH_POS_DSTS, IFH_WID_DSTS);
333 }
334 
335 static void lan966x_ifh_set_qos_class(void *ifh, u64 qos)
336 {
337 	lan966x_ifh_set(ifh, qos, IFH_POS_QOS_CLASS, IFH_WID_QOS_CLASS);
338 }
339 
340 static void lan966x_ifh_set_ipv(void *ifh, u64 ipv)
341 {
342 	lan966x_ifh_set(ifh, ipv, IFH_POS_IPV, IFH_WID_IPV);
343 }
344 
345 static void lan966x_ifh_set_vid(void *ifh, u64 vid)
346 {
347 	lan966x_ifh_set(ifh, vid, IFH_POS_TCI, IFH_WID_TCI);
348 }
349 
350 static void lan966x_ifh_set_rew_op(void *ifh, u64 rew_op)
351 {
352 	lan966x_ifh_set(ifh, rew_op, IFH_POS_REW_CMD, IFH_WID_REW_CMD);
353 }
354 
355 static void lan966x_ifh_set_timestamp(void *ifh, u64 timestamp)
356 {
357 	lan966x_ifh_set(ifh, timestamp, IFH_POS_TIMESTAMP, IFH_WID_TIMESTAMP);
358 }
359 
360 static netdev_tx_t lan966x_port_xmit(struct sk_buff *skb,
361 				     struct net_device *dev)
362 {
363 	struct lan966x_port *port = netdev_priv(dev);
364 	struct lan966x *lan966x = port->lan966x;
365 	__be32 ifh[IFH_LEN];
366 	int err;
367 
368 	memset(ifh, 0x0, sizeof(__be32) * IFH_LEN);
369 
370 	lan966x_ifh_set_bypass(ifh, 1);
371 	lan966x_ifh_set_port(ifh, BIT_ULL(port->chip_port));
372 	lan966x_ifh_set_qos_class(ifh, skb->priority >= 7 ? 0x7 : skb->priority);
373 	lan966x_ifh_set_ipv(ifh, skb->priority >= 7 ? 0x7 : skb->priority);
374 	lan966x_ifh_set_vid(ifh, skb_vlan_tag_get(skb));
375 
376 	if (port->lan966x->ptp && skb_shinfo(skb)->tx_flags & SKBTX_HW_TSTAMP) {
377 		err = lan966x_ptp_txtstamp_request(port, skb);
378 		if (err)
379 			return err;
380 
381 		lan966x_ifh_set_rew_op(ifh, LAN966X_SKB_CB(skb)->rew_op);
382 		lan966x_ifh_set_timestamp(ifh, LAN966X_SKB_CB(skb)->ts_id);
383 	}
384 
385 	spin_lock(&lan966x->tx_lock);
386 	if (port->lan966x->fdma)
387 		err = lan966x_fdma_xmit(skb, ifh, dev);
388 	else
389 		err = lan966x_port_ifh_xmit(skb, ifh, dev);
390 	spin_unlock(&lan966x->tx_lock);
391 
392 	return err;
393 }
394 
395 static int lan966x_port_change_mtu(struct net_device *dev, int new_mtu)
396 {
397 	struct lan966x_port *port = netdev_priv(dev);
398 	struct lan966x *lan966x = port->lan966x;
399 	int old_mtu = dev->mtu;
400 	int err;
401 
402 	lan_wr(DEV_MAC_MAXLEN_CFG_MAX_LEN_SET(LAN966X_HW_MTU(new_mtu)),
403 	       lan966x, DEV_MAC_MAXLEN_CFG(port->chip_port));
404 	dev->mtu = new_mtu;
405 
406 	if (!lan966x->fdma)
407 		return 0;
408 
409 	err = lan966x_fdma_change_mtu(lan966x);
410 	if (err) {
411 		lan_wr(DEV_MAC_MAXLEN_CFG_MAX_LEN_SET(LAN966X_HW_MTU(old_mtu)),
412 		       lan966x, DEV_MAC_MAXLEN_CFG(port->chip_port));
413 		dev->mtu = old_mtu;
414 	}
415 
416 	return err;
417 }
418 
419 static int lan966x_mc_unsync(struct net_device *dev, const unsigned char *addr)
420 {
421 	struct lan966x_port *port = netdev_priv(dev);
422 	struct lan966x *lan966x = port->lan966x;
423 
424 	return lan966x_mac_forget(lan966x, addr, HOST_PVID, ENTRYTYPE_LOCKED);
425 }
426 
427 static int lan966x_mc_sync(struct net_device *dev, const unsigned char *addr)
428 {
429 	struct lan966x_port *port = netdev_priv(dev);
430 	struct lan966x *lan966x = port->lan966x;
431 
432 	return lan966x_mac_cpu_learn(lan966x, addr, HOST_PVID);
433 }
434 
435 static void lan966x_port_set_rx_mode(struct net_device *dev)
436 {
437 	__dev_mc_sync(dev, lan966x_mc_sync, lan966x_mc_unsync);
438 }
439 
440 static int lan966x_port_get_parent_id(struct net_device *dev,
441 				      struct netdev_phys_item_id *ppid)
442 {
443 	struct lan966x_port *port = netdev_priv(dev);
444 	struct lan966x *lan966x = port->lan966x;
445 
446 	ppid->id_len = sizeof(lan966x->base_mac);
447 	memcpy(&ppid->id, &lan966x->base_mac, ppid->id_len);
448 
449 	return 0;
450 }
451 
452 static int lan966x_port_ioctl(struct net_device *dev, struct ifreq *ifr,
453 			      int cmd)
454 {
455 	struct lan966x_port *port = netdev_priv(dev);
456 	int err;
457 
458 	if (cmd == SIOCSHWTSTAMP) {
459 		err = lan966x_ptp_setup_traps(port, ifr);
460 		if (err)
461 			return err;
462 	}
463 
464 	if (!phy_has_hwtstamp(dev->phydev) && port->lan966x->ptp) {
465 		switch (cmd) {
466 		case SIOCSHWTSTAMP:
467 			err = lan966x_ptp_hwtstamp_set(port, ifr);
468 			if (err)
469 				lan966x_ptp_del_traps(port);
470 
471 			return err;
472 		case SIOCGHWTSTAMP:
473 			return lan966x_ptp_hwtstamp_get(port, ifr);
474 		}
475 	}
476 
477 	if (!dev->phydev)
478 		return -ENODEV;
479 
480 	err = phy_mii_ioctl(dev->phydev, ifr, cmd);
481 	if (err && cmd == SIOCSHWTSTAMP)
482 		lan966x_ptp_del_traps(port);
483 
484 	return err;
485 }
486 
487 static const struct net_device_ops lan966x_port_netdev_ops = {
488 	.ndo_open			= lan966x_port_open,
489 	.ndo_stop			= lan966x_port_stop,
490 	.ndo_start_xmit			= lan966x_port_xmit,
491 	.ndo_change_mtu			= lan966x_port_change_mtu,
492 	.ndo_set_rx_mode		= lan966x_port_set_rx_mode,
493 	.ndo_get_phys_port_name		= lan966x_port_get_phys_port_name,
494 	.ndo_get_stats64		= lan966x_stats_get,
495 	.ndo_set_mac_address		= lan966x_port_set_mac_address,
496 	.ndo_get_port_parent_id		= lan966x_port_get_parent_id,
497 	.ndo_eth_ioctl			= lan966x_port_ioctl,
498 	.ndo_setup_tc			= lan966x_tc_setup,
499 	.ndo_bpf			= lan966x_xdp,
500 	.ndo_xdp_xmit			= lan966x_xdp_xmit,
501 };
502 
503 bool lan966x_netdevice_check(const struct net_device *dev)
504 {
505 	return dev->netdev_ops == &lan966x_port_netdev_ops;
506 }
507 
508 bool lan966x_hw_offload(struct lan966x *lan966x, u32 port, struct sk_buff *skb)
509 {
510 	u32 val;
511 
512 	/* The IGMP and MLD frames are not forward by the HW if
513 	 * multicast snooping is enabled, therefor don't mark as
514 	 * offload to allow the SW to forward the frames accordingly.
515 	 */
516 	val = lan_rd(lan966x, ANA_CPU_FWD_CFG(port));
517 	if (!(val & (ANA_CPU_FWD_CFG_IGMP_REDIR_ENA |
518 		     ANA_CPU_FWD_CFG_MLD_REDIR_ENA)))
519 		return true;
520 
521 	if (eth_type_vlan(skb->protocol)) {
522 		skb = skb_vlan_untag(skb);
523 		if (unlikely(!skb))
524 			return false;
525 	}
526 
527 	if (skb->protocol == htons(ETH_P_IP) &&
528 	    ip_hdr(skb)->protocol == IPPROTO_IGMP)
529 		return false;
530 
531 	if (IS_ENABLED(CONFIG_IPV6) &&
532 	    skb->protocol == htons(ETH_P_IPV6) &&
533 	    ipv6_addr_is_multicast(&ipv6_hdr(skb)->daddr) &&
534 	    !ipv6_mc_check_mld(skb))
535 		return false;
536 
537 	return true;
538 }
539 
540 static int lan966x_port_xtr_status(struct lan966x *lan966x, u8 grp)
541 {
542 	return lan_rd(lan966x, QS_XTR_RD(grp));
543 }
544 
545 static int lan966x_port_xtr_ready(struct lan966x *lan966x, u8 grp)
546 {
547 	u32 val;
548 
549 	return read_poll_timeout(lan966x_port_xtr_status, val,
550 				 val != XTR_NOT_READY,
551 				 READL_SLEEP_US, READL_TIMEOUT_US, false,
552 				 lan966x, grp);
553 }
554 
555 static int lan966x_rx_frame_word(struct lan966x *lan966x, u8 grp, u32 *rval)
556 {
557 	u32 bytes_valid;
558 	u32 val;
559 	int err;
560 
561 	val = lan_rd(lan966x, QS_XTR_RD(grp));
562 	if (val == XTR_NOT_READY) {
563 		err = lan966x_port_xtr_ready(lan966x, grp);
564 		if (err)
565 			return -EIO;
566 	}
567 
568 	switch (val) {
569 	case XTR_ABORT:
570 		return -EIO;
571 	case XTR_EOF_0:
572 	case XTR_EOF_1:
573 	case XTR_EOF_2:
574 	case XTR_EOF_3:
575 	case XTR_PRUNED:
576 		bytes_valid = XTR_VALID_BYTES(val);
577 		val = lan_rd(lan966x, QS_XTR_RD(grp));
578 		if (val == XTR_ESCAPE)
579 			*rval = lan_rd(lan966x, QS_XTR_RD(grp));
580 		else
581 			*rval = val;
582 
583 		return bytes_valid;
584 	case XTR_ESCAPE:
585 		*rval = lan_rd(lan966x, QS_XTR_RD(grp));
586 
587 		return 4;
588 	default:
589 		*rval = val;
590 
591 		return 4;
592 	}
593 }
594 
595 static u64 lan966x_ifh_get(u8 *ifh, size_t pos, size_t length)
596 {
597 	u64 val = 0;
598 	u8 v;
599 
600 	for (int i = 0; i < length ; i++) {
601 		int j = pos + i;
602 		int k = j % 8;
603 
604 		if (i == 0 || k == 0)
605 			v = ifh[IFH_LEN_BYTES - (j / 8) - 1];
606 
607 		if (v & (1 << k))
608 			val |= (1ULL << i);
609 	}
610 
611 	return val;
612 }
613 
614 void lan966x_ifh_get_src_port(void *ifh, u64 *src_port)
615 {
616 	*src_port = lan966x_ifh_get(ifh, IFH_POS_SRCPORT, IFH_WID_SRCPORT);
617 }
618 
619 static void lan966x_ifh_get_len(void *ifh, u64 *len)
620 {
621 	*len = lan966x_ifh_get(ifh, IFH_POS_LEN, IFH_WID_LEN);
622 }
623 
624 void lan966x_ifh_get_timestamp(void *ifh, u64 *timestamp)
625 {
626 	*timestamp = lan966x_ifh_get(ifh, IFH_POS_TIMESTAMP, IFH_WID_TIMESTAMP);
627 }
628 
629 static irqreturn_t lan966x_xtr_irq_handler(int irq, void *args)
630 {
631 	struct lan966x *lan966x = args;
632 	int i, grp = 0, err = 0;
633 
634 	if (!(lan_rd(lan966x, QS_XTR_DATA_PRESENT) & BIT(grp)))
635 		return IRQ_NONE;
636 
637 	do {
638 		u64 src_port, len, timestamp;
639 		struct net_device *dev;
640 		struct sk_buff *skb;
641 		int sz = 0, buf_len;
642 		u32 ifh[IFH_LEN];
643 		u32 *buf;
644 		u32 val;
645 
646 		for (i = 0; i < IFH_LEN; i++) {
647 			err = lan966x_rx_frame_word(lan966x, grp, &ifh[i]);
648 			if (err != 4)
649 				goto recover;
650 		}
651 
652 		err = 0;
653 
654 		lan966x_ifh_get_src_port(ifh, &src_port);
655 		lan966x_ifh_get_len(ifh, &len);
656 		lan966x_ifh_get_timestamp(ifh, &timestamp);
657 
658 		WARN_ON(src_port >= lan966x->num_phys_ports);
659 
660 		dev = lan966x->ports[src_port]->dev;
661 		skb = netdev_alloc_skb(dev, len);
662 		if (unlikely(!skb)) {
663 			netdev_err(dev, "Unable to allocate sk_buff\n");
664 			err = -ENOMEM;
665 			break;
666 		}
667 		buf_len = len - ETH_FCS_LEN;
668 		buf = (u32 *)skb_put(skb, buf_len);
669 
670 		len = 0;
671 		do {
672 			sz = lan966x_rx_frame_word(lan966x, grp, &val);
673 			if (sz < 0) {
674 				kfree_skb(skb);
675 				goto recover;
676 			}
677 
678 			*buf++ = val;
679 			len += sz;
680 		} while (len < buf_len);
681 
682 		/* Read the FCS */
683 		sz = lan966x_rx_frame_word(lan966x, grp, &val);
684 		if (sz < 0) {
685 			kfree_skb(skb);
686 			goto recover;
687 		}
688 
689 		/* Update the statistics if part of the FCS was read before */
690 		len -= ETH_FCS_LEN - sz;
691 
692 		if (unlikely(dev->features & NETIF_F_RXFCS)) {
693 			buf = (u32 *)skb_put(skb, ETH_FCS_LEN);
694 			*buf = val;
695 		}
696 
697 		lan966x_ptp_rxtstamp(lan966x, skb, src_port, timestamp);
698 		skb->protocol = eth_type_trans(skb, dev);
699 
700 		if (lan966x->bridge_mask & BIT(src_port)) {
701 			skb->offload_fwd_mark = 1;
702 
703 			skb_reset_network_header(skb);
704 			if (!lan966x_hw_offload(lan966x, src_port, skb))
705 				skb->offload_fwd_mark = 0;
706 		}
707 
708 		if (!skb_defer_rx_timestamp(skb))
709 			netif_rx(skb);
710 
711 		dev->stats.rx_bytes += len;
712 		dev->stats.rx_packets++;
713 
714 recover:
715 		if (sz < 0 || err)
716 			lan_rd(lan966x, QS_XTR_RD(grp));
717 
718 	} while (lan_rd(lan966x, QS_XTR_DATA_PRESENT) & BIT(grp));
719 
720 	return IRQ_HANDLED;
721 }
722 
723 static irqreturn_t lan966x_ana_irq_handler(int irq, void *args)
724 {
725 	struct lan966x *lan966x = args;
726 
727 	return lan966x_mac_irq_handler(lan966x);
728 }
729 
730 static void lan966x_cleanup_ports(struct lan966x *lan966x)
731 {
732 	struct lan966x_port *port;
733 	int p;
734 
735 	for (p = 0; p < lan966x->num_phys_ports; p++) {
736 		port = lan966x->ports[p];
737 		if (!port)
738 			continue;
739 
740 		if (port->dev)
741 			unregister_netdev(port->dev);
742 
743 		lan966x_xdp_port_deinit(port);
744 		if (lan966x->fdma && lan966x->fdma_ndev == port->dev)
745 			lan966x_fdma_netdev_deinit(lan966x, port->dev);
746 
747 		if (port->phylink) {
748 			rtnl_lock();
749 			lan966x_port_stop(port->dev);
750 			rtnl_unlock();
751 			phylink_destroy(port->phylink);
752 			port->phylink = NULL;
753 		}
754 
755 		if (port->fwnode)
756 			fwnode_handle_put(port->fwnode);
757 	}
758 
759 	disable_irq(lan966x->xtr_irq);
760 	lan966x->xtr_irq = -ENXIO;
761 
762 	if (lan966x->ana_irq > 0) {
763 		disable_irq(lan966x->ana_irq);
764 		lan966x->ana_irq = -ENXIO;
765 	}
766 
767 	if (lan966x->fdma)
768 		devm_free_irq(lan966x->dev, lan966x->fdma_irq, lan966x);
769 
770 	if (lan966x->ptp_irq > 0)
771 		devm_free_irq(lan966x->dev, lan966x->ptp_irq, lan966x);
772 
773 	if (lan966x->ptp_ext_irq > 0)
774 		devm_free_irq(lan966x->dev, lan966x->ptp_ext_irq, lan966x);
775 }
776 
777 static int lan966x_probe_port(struct lan966x *lan966x, u32 p,
778 			      phy_interface_t phy_mode,
779 			      struct fwnode_handle *portnp)
780 {
781 	struct lan966x_port *port;
782 	struct phylink *phylink;
783 	struct net_device *dev;
784 	int err;
785 
786 	if (p >= lan966x->num_phys_ports)
787 		return -EINVAL;
788 
789 	dev = devm_alloc_etherdev_mqs(lan966x->dev,
790 				      sizeof(struct lan966x_port),
791 				      NUM_PRIO_QUEUES, 1);
792 	if (!dev)
793 		return -ENOMEM;
794 
795 	SET_NETDEV_DEV(dev, lan966x->dev);
796 	port = netdev_priv(dev);
797 	port->dev = dev;
798 	port->lan966x = lan966x;
799 	port->chip_port = p;
800 	lan966x->ports[p] = port;
801 
802 	dev->max_mtu = ETH_MAX_MTU;
803 
804 	dev->netdev_ops = &lan966x_port_netdev_ops;
805 	dev->ethtool_ops = &lan966x_ethtool_ops;
806 	dev->features |= NETIF_F_HW_VLAN_CTAG_TX |
807 			 NETIF_F_HW_VLAN_STAG_TX |
808 			 NETIF_F_HW_TC;
809 	dev->hw_features |= NETIF_F_HW_TC;
810 	dev->needed_headroom = IFH_LEN_BYTES;
811 
812 	eth_hw_addr_gen(dev, lan966x->base_mac, p + 1);
813 
814 	lan966x_mac_learn(lan966x, PGID_CPU, dev->dev_addr, HOST_PVID,
815 			  ENTRYTYPE_LOCKED);
816 
817 	port->phylink_config.dev = &port->dev->dev;
818 	port->phylink_config.type = PHYLINK_NETDEV;
819 	port->phylink_pcs.poll = true;
820 	port->phylink_pcs.ops = &lan966x_phylink_pcs_ops;
821 
822 	port->phylink_config.mac_capabilities = MAC_ASYM_PAUSE | MAC_SYM_PAUSE |
823 		MAC_10 | MAC_100 | MAC_1000FD | MAC_2500FD;
824 
825 	phy_interface_set_rgmii(port->phylink_config.supported_interfaces);
826 	__set_bit(PHY_INTERFACE_MODE_MII,
827 		  port->phylink_config.supported_interfaces);
828 	__set_bit(PHY_INTERFACE_MODE_GMII,
829 		  port->phylink_config.supported_interfaces);
830 	__set_bit(PHY_INTERFACE_MODE_SGMII,
831 		  port->phylink_config.supported_interfaces);
832 	__set_bit(PHY_INTERFACE_MODE_QSGMII,
833 		  port->phylink_config.supported_interfaces);
834 	__set_bit(PHY_INTERFACE_MODE_QUSGMII,
835 		  port->phylink_config.supported_interfaces);
836 	__set_bit(PHY_INTERFACE_MODE_1000BASEX,
837 		  port->phylink_config.supported_interfaces);
838 	__set_bit(PHY_INTERFACE_MODE_2500BASEX,
839 		  port->phylink_config.supported_interfaces);
840 
841 	phylink = phylink_create(&port->phylink_config,
842 				 portnp,
843 				 phy_mode,
844 				 &lan966x_phylink_mac_ops);
845 	if (IS_ERR(phylink)) {
846 		port->dev = NULL;
847 		return PTR_ERR(phylink);
848 	}
849 
850 	port->phylink = phylink;
851 
852 	if (lan966x->fdma)
853 		dev->xdp_features = NETDEV_XDP_ACT_BASIC |
854 				    NETDEV_XDP_ACT_REDIRECT |
855 				    NETDEV_XDP_ACT_NDO_XMIT;
856 
857 	err = register_netdev(dev);
858 	if (err) {
859 		dev_err(lan966x->dev, "register_netdev failed\n");
860 		return err;
861 	}
862 
863 	lan966x_vlan_port_set_vlan_aware(port, 0);
864 	lan966x_vlan_port_set_vid(port, HOST_PVID, false, false);
865 	lan966x_vlan_port_apply(port);
866 
867 	return 0;
868 }
869 
870 static void lan966x_init(struct lan966x *lan966x)
871 {
872 	u32 p, i;
873 
874 	/* MAC table initialization */
875 	lan966x_mac_init(lan966x);
876 
877 	lan966x_vlan_init(lan966x);
878 
879 	/* Flush queues */
880 	lan_wr(lan_rd(lan966x, QS_XTR_FLUSH) |
881 	       GENMASK(1, 0),
882 	       lan966x, QS_XTR_FLUSH);
883 
884 	/* Allow to drain */
885 	mdelay(1);
886 
887 	/* All Queues normal */
888 	lan_wr(lan_rd(lan966x, QS_XTR_FLUSH) &
889 	       ~(GENMASK(1, 0)),
890 	       lan966x, QS_XTR_FLUSH);
891 
892 	/* Set MAC age time to default value, the entry is aged after
893 	 * 2 * AGE_PERIOD
894 	 */
895 	lan_wr(ANA_AUTOAGE_AGE_PERIOD_SET(BR_DEFAULT_AGEING_TIME / 2 / HZ),
896 	       lan966x, ANA_AUTOAGE);
897 
898 	/* Disable learning for frames discarded by VLAN ingress filtering */
899 	lan_rmw(ANA_ADVLEARN_VLAN_CHK_SET(1),
900 		ANA_ADVLEARN_VLAN_CHK,
901 		lan966x, ANA_ADVLEARN);
902 
903 	/* Setup frame ageing - "2 sec" - The unit is 6.5 us on lan966x */
904 	lan_wr(SYS_FRM_AGING_AGE_TX_ENA_SET(1) |
905 	       (20000000 / 65),
906 	       lan966x,  SYS_FRM_AGING);
907 
908 	/* Map the 8 CPU extraction queues to CPU port */
909 	lan_wr(0, lan966x, QSYS_CPU_GROUP_MAP);
910 
911 	/* Do byte-swap and expect status after last data word
912 	 * Extraction: Mode: manual extraction) | Byte_swap
913 	 */
914 	lan_wr(QS_XTR_GRP_CFG_MODE_SET(lan966x->fdma ? 2 : 1) |
915 	       QS_XTR_GRP_CFG_BYTE_SWAP_SET(1),
916 	       lan966x, QS_XTR_GRP_CFG(0));
917 
918 	/* Injection: Mode: manual injection | Byte_swap */
919 	lan_wr(QS_INJ_GRP_CFG_MODE_SET(lan966x->fdma ? 2 : 1) |
920 	       QS_INJ_GRP_CFG_BYTE_SWAP_SET(1),
921 	       lan966x, QS_INJ_GRP_CFG(0));
922 
923 	lan_rmw(QS_INJ_CTRL_GAP_SIZE_SET(0),
924 		QS_INJ_CTRL_GAP_SIZE,
925 		lan966x, QS_INJ_CTRL(0));
926 
927 	/* Enable IFH insertion/parsing on CPU ports */
928 	lan_wr(SYS_PORT_MODE_INCL_INJ_HDR_SET(1) |
929 	       SYS_PORT_MODE_INCL_XTR_HDR_SET(1),
930 	       lan966x, SYS_PORT_MODE(CPU_PORT));
931 
932 	/* Setup flooding PGIDs */
933 	lan_wr(ANA_FLOODING_IPMC_FLD_MC4_DATA_SET(PGID_MCIPV4) |
934 	       ANA_FLOODING_IPMC_FLD_MC4_CTRL_SET(PGID_MC) |
935 	       ANA_FLOODING_IPMC_FLD_MC6_DATA_SET(PGID_MCIPV6) |
936 	       ANA_FLOODING_IPMC_FLD_MC6_CTRL_SET(PGID_MC),
937 	       lan966x, ANA_FLOODING_IPMC);
938 
939 	/* There are 8 priorities */
940 	for (i = 0; i < 8; ++i)
941 		lan_rmw(ANA_FLOODING_FLD_MULTICAST_SET(PGID_MC) |
942 			ANA_FLOODING_FLD_UNICAST_SET(PGID_UC) |
943 			ANA_FLOODING_FLD_BROADCAST_SET(PGID_BC),
944 			ANA_FLOODING_FLD_MULTICAST |
945 			ANA_FLOODING_FLD_UNICAST |
946 			ANA_FLOODING_FLD_BROADCAST,
947 			lan966x, ANA_FLOODING(i));
948 
949 	for (i = 0; i < PGID_ENTRIES; ++i)
950 		/* Set all the entries to obey VLAN_VLAN */
951 		lan_rmw(ANA_PGID_CFG_OBEY_VLAN_SET(1),
952 			ANA_PGID_CFG_OBEY_VLAN,
953 			lan966x, ANA_PGID_CFG(i));
954 
955 	for (p = 0; p < lan966x->num_phys_ports; p++) {
956 		/* Disable bridging by default */
957 		lan_rmw(ANA_PGID_PGID_SET(0x0),
958 			ANA_PGID_PGID,
959 			lan966x, ANA_PGID(p + PGID_SRC));
960 
961 		/* Do not forward BPDU frames to the front ports and copy them
962 		 * to CPU
963 		 */
964 		lan_wr(0xffff, lan966x, ANA_CPU_FWD_BPDU_CFG(p));
965 	}
966 
967 	/* Set source buffer size for each priority and each port to 1500 bytes */
968 	for (i = 0; i <= QSYS_Q_RSRV; ++i) {
969 		lan_wr(1500 / 64, lan966x, QSYS_RES_CFG(i));
970 		lan_wr(1500 / 64, lan966x, QSYS_RES_CFG(512 + i));
971 	}
972 
973 	/* Enable switching to/from cpu port */
974 	lan_wr(QSYS_SW_PORT_MODE_PORT_ENA_SET(1) |
975 	       QSYS_SW_PORT_MODE_SCH_NEXT_CFG_SET(1) |
976 	       QSYS_SW_PORT_MODE_INGRESS_DROP_MODE_SET(1),
977 	       lan966x,  QSYS_SW_PORT_MODE(CPU_PORT));
978 
979 	/* Configure and enable the CPU port */
980 	lan_rmw(ANA_PGID_PGID_SET(0),
981 		ANA_PGID_PGID,
982 		lan966x, ANA_PGID(CPU_PORT));
983 	lan_rmw(ANA_PGID_PGID_SET(BIT(CPU_PORT)),
984 		ANA_PGID_PGID,
985 		lan966x, ANA_PGID(PGID_CPU));
986 
987 	/* Multicast to all other ports */
988 	lan_rmw(GENMASK(lan966x->num_phys_ports - 1, 0),
989 		ANA_PGID_PGID,
990 		lan966x, ANA_PGID(PGID_MC));
991 
992 	/* This will be controlled by mrouter ports */
993 	lan_rmw(GENMASK(lan966x->num_phys_ports - 1, 0),
994 		ANA_PGID_PGID,
995 		lan966x, ANA_PGID(PGID_MCIPV4));
996 
997 	lan_rmw(GENMASK(lan966x->num_phys_ports - 1, 0),
998 		ANA_PGID_PGID,
999 		lan966x, ANA_PGID(PGID_MCIPV6));
1000 
1001 	/* Unicast to all other ports */
1002 	lan_rmw(GENMASK(lan966x->num_phys_ports - 1, 0),
1003 		ANA_PGID_PGID,
1004 		lan966x, ANA_PGID(PGID_UC));
1005 
1006 	/* Broadcast to the CPU port and to other ports */
1007 	lan_rmw(ANA_PGID_PGID_SET(BIT(CPU_PORT) | GENMASK(lan966x->num_phys_ports - 1, 0)),
1008 		ANA_PGID_PGID,
1009 		lan966x, ANA_PGID(PGID_BC));
1010 
1011 	lan_wr(REW_PORT_CFG_NO_REWRITE_SET(1),
1012 	       lan966x, REW_PORT_CFG(CPU_PORT));
1013 
1014 	lan_rmw(ANA_ANAINTR_INTR_ENA_SET(1),
1015 		ANA_ANAINTR_INTR_ENA,
1016 		lan966x, ANA_ANAINTR);
1017 
1018 	spin_lock_init(&lan966x->tx_lock);
1019 
1020 	lan966x_taprio_init(lan966x);
1021 }
1022 
1023 static int lan966x_ram_init(struct lan966x *lan966x)
1024 {
1025 	return lan_rd(lan966x, SYS_RAM_INIT);
1026 }
1027 
1028 static int lan966x_reset_switch(struct lan966x *lan966x)
1029 {
1030 	struct reset_control *switch_reset;
1031 	int val = 0;
1032 	int ret;
1033 
1034 	switch_reset = devm_reset_control_get_optional_shared(lan966x->dev,
1035 							      "switch");
1036 	if (IS_ERR(switch_reset))
1037 		return dev_err_probe(lan966x->dev, PTR_ERR(switch_reset),
1038 				     "Could not obtain switch reset");
1039 
1040 	reset_control_reset(switch_reset);
1041 
1042 	/* Don't reinitialize the switch core, if it is already initialized. In
1043 	 * case it is initialized twice, some pointers inside the queue system
1044 	 * in HW will get corrupted and then after a while the queue system gets
1045 	 * full and no traffic is passing through the switch. The issue is seen
1046 	 * when loading and unloading the driver and sending traffic through the
1047 	 * switch.
1048 	 */
1049 	if (lan_rd(lan966x, SYS_RESET_CFG) & SYS_RESET_CFG_CORE_ENA)
1050 		return 0;
1051 
1052 	lan_wr(SYS_RESET_CFG_CORE_ENA_SET(0), lan966x, SYS_RESET_CFG);
1053 	lan_wr(SYS_RAM_INIT_RAM_INIT_SET(1), lan966x, SYS_RAM_INIT);
1054 	ret = readx_poll_timeout(lan966x_ram_init, lan966x,
1055 				 val, (val & BIT(1)) == 0, READL_SLEEP_US,
1056 				 READL_TIMEOUT_US);
1057 	if (ret)
1058 		return ret;
1059 
1060 	lan_wr(SYS_RESET_CFG_CORE_ENA_SET(1), lan966x, SYS_RESET_CFG);
1061 
1062 	return 0;
1063 }
1064 
1065 static int lan966x_probe(struct platform_device *pdev)
1066 {
1067 	struct fwnode_handle *ports, *portnp;
1068 	struct lan966x *lan966x;
1069 	u8 mac_addr[ETH_ALEN];
1070 	int err;
1071 
1072 	lan966x = devm_kzalloc(&pdev->dev, sizeof(*lan966x), GFP_KERNEL);
1073 	if (!lan966x)
1074 		return -ENOMEM;
1075 
1076 	platform_set_drvdata(pdev, lan966x);
1077 	lan966x->dev = &pdev->dev;
1078 
1079 	lan966x->debugfs_root = debugfs_create_dir("lan966x", NULL);
1080 
1081 	if (!device_get_mac_address(&pdev->dev, mac_addr)) {
1082 		ether_addr_copy(lan966x->base_mac, mac_addr);
1083 	} else {
1084 		pr_info("MAC addr was not set, use random MAC\n");
1085 		eth_random_addr(lan966x->base_mac);
1086 		lan966x->base_mac[5] &= 0xf0;
1087 	}
1088 
1089 	err = lan966x_create_targets(pdev, lan966x);
1090 	if (err)
1091 		return dev_err_probe(&pdev->dev, err,
1092 				     "Failed to create targets");
1093 
1094 	err = lan966x_reset_switch(lan966x);
1095 	if (err)
1096 		return dev_err_probe(&pdev->dev, err, "Reset failed");
1097 
1098 	lan966x->num_phys_ports = NUM_PHYS_PORTS;
1099 	lan966x->ports = devm_kcalloc(&pdev->dev, lan966x->num_phys_ports,
1100 				      sizeof(struct lan966x_port *),
1101 				      GFP_KERNEL);
1102 	if (!lan966x->ports)
1103 		return -ENOMEM;
1104 
1105 	/* There QS system has 32KB of memory */
1106 	lan966x->shared_queue_sz = LAN966X_BUFFER_MEMORY;
1107 
1108 	/* set irq */
1109 	lan966x->xtr_irq = platform_get_irq_byname(pdev, "xtr");
1110 	if (lan966x->xtr_irq <= 0)
1111 		return -EINVAL;
1112 
1113 	err = devm_request_threaded_irq(&pdev->dev, lan966x->xtr_irq, NULL,
1114 					lan966x_xtr_irq_handler, IRQF_ONESHOT,
1115 					"frame extraction", lan966x);
1116 	if (err) {
1117 		pr_err("Unable to use xtr irq");
1118 		return -ENODEV;
1119 	}
1120 
1121 	lan966x->ana_irq = platform_get_irq_byname(pdev, "ana");
1122 	if (lan966x->ana_irq > 0) {
1123 		err = devm_request_threaded_irq(&pdev->dev, lan966x->ana_irq, NULL,
1124 						lan966x_ana_irq_handler, IRQF_ONESHOT,
1125 						"ana irq", lan966x);
1126 		if (err)
1127 			return dev_err_probe(&pdev->dev, err, "Unable to use ana irq");
1128 	}
1129 
1130 	lan966x->ptp_irq = platform_get_irq_byname(pdev, "ptp");
1131 	if (lan966x->ptp_irq > 0) {
1132 		err = devm_request_threaded_irq(&pdev->dev, lan966x->ptp_irq, NULL,
1133 						lan966x_ptp_irq_handler, IRQF_ONESHOT,
1134 						"ptp irq", lan966x);
1135 		if (err)
1136 			return dev_err_probe(&pdev->dev, err, "Unable to use ptp irq");
1137 
1138 		lan966x->ptp = 1;
1139 	}
1140 
1141 	lan966x->fdma_irq = platform_get_irq_byname(pdev, "fdma");
1142 	if (lan966x->fdma_irq > 0) {
1143 		err = devm_request_irq(&pdev->dev, lan966x->fdma_irq,
1144 				       lan966x_fdma_irq_handler, 0,
1145 				       "fdma irq", lan966x);
1146 		if (err)
1147 			return dev_err_probe(&pdev->dev, err, "Unable to use fdma irq");
1148 
1149 		lan966x->fdma = true;
1150 	}
1151 
1152 	if (lan966x->ptp) {
1153 		lan966x->ptp_ext_irq = platform_get_irq_byname(pdev, "ptp-ext");
1154 		if (lan966x->ptp_ext_irq > 0) {
1155 			err = devm_request_threaded_irq(&pdev->dev,
1156 							lan966x->ptp_ext_irq, NULL,
1157 							lan966x_ptp_ext_irq_handler,
1158 							IRQF_ONESHOT,
1159 							"ptp-ext irq", lan966x);
1160 			if (err)
1161 				return dev_err_probe(&pdev->dev, err,
1162 						     "Unable to use ptp-ext irq");
1163 		}
1164 	}
1165 
1166 	ports = device_get_named_child_node(&pdev->dev, "ethernet-ports");
1167 	if (!ports)
1168 		return dev_err_probe(&pdev->dev, -ENODEV,
1169 				     "no ethernet-ports child found\n");
1170 
1171 	/* init switch */
1172 	lan966x_init(lan966x);
1173 	lan966x_stats_init(lan966x);
1174 
1175 	/* go over the child nodes */
1176 	fwnode_for_each_available_child_node(ports, portnp) {
1177 		phy_interface_t phy_mode;
1178 		struct phy *serdes;
1179 		u32 p;
1180 
1181 		if (fwnode_property_read_u32(portnp, "reg", &p))
1182 			continue;
1183 
1184 		phy_mode = fwnode_get_phy_mode(portnp);
1185 		err = lan966x_probe_port(lan966x, p, phy_mode, portnp);
1186 		if (err)
1187 			goto cleanup_ports;
1188 
1189 		/* Read needed configuration */
1190 		lan966x->ports[p]->config.portmode = phy_mode;
1191 		lan966x->ports[p]->fwnode = fwnode_handle_get(portnp);
1192 
1193 		serdes = devm_of_phy_optional_get(lan966x->dev,
1194 						  to_of_node(portnp), NULL);
1195 		if (IS_ERR(serdes)) {
1196 			err = PTR_ERR(serdes);
1197 			goto cleanup_ports;
1198 		}
1199 		lan966x->ports[p]->serdes = serdes;
1200 
1201 		lan966x_port_init(lan966x->ports[p]);
1202 		err = lan966x_xdp_port_init(lan966x->ports[p]);
1203 		if (err)
1204 			goto cleanup_ports;
1205 	}
1206 
1207 	fwnode_handle_put(ports);
1208 
1209 	lan966x_mdb_init(lan966x);
1210 	err = lan966x_fdb_init(lan966x);
1211 	if (err)
1212 		goto cleanup_ports;
1213 
1214 	err = lan966x_ptp_init(lan966x);
1215 	if (err)
1216 		goto cleanup_fdb;
1217 
1218 	err = lan966x_fdma_init(lan966x);
1219 	if (err)
1220 		goto cleanup_ptp;
1221 
1222 	err = lan966x_vcap_init(lan966x);
1223 	if (err)
1224 		goto cleanup_fdma;
1225 
1226 	lan966x_dcb_init(lan966x);
1227 
1228 	return 0;
1229 
1230 cleanup_fdma:
1231 	lan966x_fdma_deinit(lan966x);
1232 
1233 cleanup_ptp:
1234 	lan966x_ptp_deinit(lan966x);
1235 
1236 cleanup_fdb:
1237 	lan966x_fdb_deinit(lan966x);
1238 
1239 cleanup_ports:
1240 	fwnode_handle_put(ports);
1241 	fwnode_handle_put(portnp);
1242 
1243 	lan966x_cleanup_ports(lan966x);
1244 
1245 	cancel_delayed_work_sync(&lan966x->stats_work);
1246 	destroy_workqueue(lan966x->stats_queue);
1247 	mutex_destroy(&lan966x->stats_lock);
1248 
1249 	return err;
1250 }
1251 
1252 static int lan966x_remove(struct platform_device *pdev)
1253 {
1254 	struct lan966x *lan966x = platform_get_drvdata(pdev);
1255 
1256 	lan966x_taprio_deinit(lan966x);
1257 	lan966x_vcap_deinit(lan966x);
1258 	lan966x_fdma_deinit(lan966x);
1259 	lan966x_cleanup_ports(lan966x);
1260 
1261 	cancel_delayed_work_sync(&lan966x->stats_work);
1262 	destroy_workqueue(lan966x->stats_queue);
1263 	mutex_destroy(&lan966x->stats_lock);
1264 
1265 	lan966x_mac_purge_entries(lan966x);
1266 	lan966x_mdb_deinit(lan966x);
1267 	lan966x_fdb_deinit(lan966x);
1268 	lan966x_ptp_deinit(lan966x);
1269 
1270 	debugfs_remove_recursive(lan966x->debugfs_root);
1271 
1272 	return 0;
1273 }
1274 
1275 static struct platform_driver lan966x_driver = {
1276 	.probe = lan966x_probe,
1277 	.remove = lan966x_remove,
1278 	.driver = {
1279 		.name = "lan966x-switch",
1280 		.of_match_table = lan966x_match,
1281 	},
1282 };
1283 
1284 static int __init lan966x_switch_driver_init(void)
1285 {
1286 	int ret;
1287 
1288 	lan966x_register_notifier_blocks();
1289 
1290 	ret = platform_driver_register(&lan966x_driver);
1291 	if (ret)
1292 		goto err;
1293 
1294 	return 0;
1295 
1296 err:
1297 	lan966x_unregister_notifier_blocks();
1298 	return ret;
1299 }
1300 
1301 static void __exit lan966x_switch_driver_exit(void)
1302 {
1303 	platform_driver_unregister(&lan966x_driver);
1304 	lan966x_unregister_notifier_blocks();
1305 }
1306 
1307 module_init(lan966x_switch_driver_init);
1308 module_exit(lan966x_switch_driver_exit);
1309 
1310 MODULE_DESCRIPTION("Microchip LAN966X switch driver");
1311 MODULE_AUTHOR("Horatiu Vultur <horatiu.vultur@microchip.com>");
1312 MODULE_LICENSE("Dual MIT/GPL");
1313