1 // SPDX-License-Identifier: GPL-2.0+ 2 3 #include <linux/module.h> 4 #include <linux/if_bridge.h> 5 #include <linux/if_vlan.h> 6 #include <linux/iopoll.h> 7 #include <linux/ip.h> 8 #include <linux/of_platform.h> 9 #include <linux/of_net.h> 10 #include <linux/packing.h> 11 #include <linux/phy/phy.h> 12 #include <linux/reset.h> 13 #include <net/addrconf.h> 14 15 #include "lan966x_main.h" 16 17 #define XTR_EOF_0 0x00000080U 18 #define XTR_EOF_1 0x01000080U 19 #define XTR_EOF_2 0x02000080U 20 #define XTR_EOF_3 0x03000080U 21 #define XTR_PRUNED 0x04000080U 22 #define XTR_ABORT 0x05000080U 23 #define XTR_ESCAPE 0x06000080U 24 #define XTR_NOT_READY 0x07000080U 25 #define XTR_VALID_BYTES(x) (4 - (((x) >> 24) & 3)) 26 27 #define READL_SLEEP_US 10 28 #define READL_TIMEOUT_US 100000000 29 30 #define IO_RANGES 2 31 32 static const struct of_device_id lan966x_match[] = { 33 { .compatible = "microchip,lan966x-switch" }, 34 { } 35 }; 36 MODULE_DEVICE_TABLE(of, lan966x_match); 37 38 struct lan966x_main_io_resource { 39 enum lan966x_target id; 40 phys_addr_t offset; 41 int range; 42 }; 43 44 static const struct lan966x_main_io_resource lan966x_main_iomap[] = { 45 { TARGET_CPU, 0xc0000, 0 }, /* 0xe00c0000 */ 46 { TARGET_ORG, 0, 1 }, /* 0xe2000000 */ 47 { TARGET_GCB, 0x4000, 1 }, /* 0xe2004000 */ 48 { TARGET_QS, 0x8000, 1 }, /* 0xe2008000 */ 49 { TARGET_PTP, 0xc000, 1 }, /* 0xe200c000 */ 50 { TARGET_CHIP_TOP, 0x10000, 1 }, /* 0xe2010000 */ 51 { TARGET_REW, 0x14000, 1 }, /* 0xe2014000 */ 52 { TARGET_SYS, 0x28000, 1 }, /* 0xe2028000 */ 53 { TARGET_DEV, 0x34000, 1 }, /* 0xe2034000 */ 54 { TARGET_DEV + 1, 0x38000, 1 }, /* 0xe2038000 */ 55 { TARGET_DEV + 2, 0x3c000, 1 }, /* 0xe203c000 */ 56 { TARGET_DEV + 3, 0x40000, 1 }, /* 0xe2040000 */ 57 { TARGET_DEV + 4, 0x44000, 1 }, /* 0xe2044000 */ 58 { TARGET_DEV + 5, 0x48000, 1 }, /* 0xe2048000 */ 59 { TARGET_DEV + 6, 0x4c000, 1 }, /* 0xe204c000 */ 60 { TARGET_DEV + 7, 0x50000, 1 }, /* 0xe2050000 */ 61 { TARGET_QSYS, 0x100000, 1 }, /* 0xe2100000 */ 62 { TARGET_AFI, 0x120000, 1 }, /* 0xe2120000 */ 63 { TARGET_ANA, 0x140000, 1 }, /* 0xe2140000 */ 64 }; 65 66 static int lan966x_create_targets(struct platform_device *pdev, 67 struct lan966x *lan966x) 68 { 69 struct resource *iores[IO_RANGES]; 70 void __iomem *begin[IO_RANGES]; 71 int idx; 72 73 /* Initially map the entire range and after that update each target to 74 * point inside the region at the correct offset. It is possible that 75 * other devices access the same region so don't add any checks about 76 * this. 77 */ 78 for (idx = 0; idx < IO_RANGES; idx++) { 79 iores[idx] = platform_get_resource(pdev, IORESOURCE_MEM, 80 idx); 81 if (!iores[idx]) { 82 dev_err(&pdev->dev, "Invalid resource\n"); 83 return -EINVAL; 84 } 85 86 begin[idx] = devm_ioremap(&pdev->dev, 87 iores[idx]->start, 88 resource_size(iores[idx])); 89 if (!begin[idx]) { 90 dev_err(&pdev->dev, "Unable to get registers: %s\n", 91 iores[idx]->name); 92 return -ENOMEM; 93 } 94 } 95 96 for (idx = 0; idx < ARRAY_SIZE(lan966x_main_iomap); idx++) { 97 const struct lan966x_main_io_resource *iomap = 98 &lan966x_main_iomap[idx]; 99 100 lan966x->regs[iomap->id] = begin[iomap->range] + iomap->offset; 101 } 102 103 return 0; 104 } 105 106 static int lan966x_port_set_mac_address(struct net_device *dev, void *p) 107 { 108 struct lan966x_port *port = netdev_priv(dev); 109 struct lan966x *lan966x = port->lan966x; 110 const struct sockaddr *addr = p; 111 int ret; 112 113 /* Learn the new net device MAC address in the mac table. */ 114 ret = lan966x_mac_cpu_learn(lan966x, addr->sa_data, HOST_PVID); 115 if (ret) 116 return ret; 117 118 /* Then forget the previous one. */ 119 ret = lan966x_mac_cpu_forget(lan966x, dev->dev_addr, HOST_PVID); 120 if (ret) 121 return ret; 122 123 eth_hw_addr_set(dev, addr->sa_data); 124 return ret; 125 } 126 127 static int lan966x_port_get_phys_port_name(struct net_device *dev, 128 char *buf, size_t len) 129 { 130 struct lan966x_port *port = netdev_priv(dev); 131 int ret; 132 133 ret = snprintf(buf, len, "p%d", port->chip_port); 134 if (ret >= len) 135 return -EINVAL; 136 137 return 0; 138 } 139 140 static int lan966x_port_open(struct net_device *dev) 141 { 142 struct lan966x_port *port = netdev_priv(dev); 143 struct lan966x *lan966x = port->lan966x; 144 int err; 145 146 /* Enable receiving frames on the port, and activate auto-learning of 147 * MAC addresses. 148 */ 149 lan_rmw(ANA_PORT_CFG_LEARNAUTO_SET(1) | 150 ANA_PORT_CFG_RECV_ENA_SET(1) | 151 ANA_PORT_CFG_PORTID_VAL_SET(port->chip_port), 152 ANA_PORT_CFG_LEARNAUTO | 153 ANA_PORT_CFG_RECV_ENA | 154 ANA_PORT_CFG_PORTID_VAL, 155 lan966x, ANA_PORT_CFG(port->chip_port)); 156 157 err = phylink_fwnode_phy_connect(port->phylink, port->fwnode, 0); 158 if (err) { 159 netdev_err(dev, "Could not attach to PHY\n"); 160 return err; 161 } 162 163 phylink_start(port->phylink); 164 165 return 0; 166 } 167 168 static int lan966x_port_stop(struct net_device *dev) 169 { 170 struct lan966x_port *port = netdev_priv(dev); 171 172 lan966x_port_config_down(port); 173 phylink_stop(port->phylink); 174 phylink_disconnect_phy(port->phylink); 175 176 return 0; 177 } 178 179 static int lan966x_port_inj_status(struct lan966x *lan966x) 180 { 181 return lan_rd(lan966x, QS_INJ_STATUS); 182 } 183 184 static int lan966x_port_inj_ready(struct lan966x *lan966x, u8 grp) 185 { 186 u32 val; 187 188 if (lan_rd(lan966x, QS_INJ_STATUS) & QS_INJ_STATUS_FIFO_RDY_SET(BIT(grp))) 189 return 0; 190 191 return readx_poll_timeout_atomic(lan966x_port_inj_status, lan966x, val, 192 QS_INJ_STATUS_FIFO_RDY_GET(val) & BIT(grp), 193 READL_SLEEP_US, READL_TIMEOUT_US); 194 } 195 196 static int lan966x_port_ifh_xmit(struct sk_buff *skb, 197 __be32 *ifh, 198 struct net_device *dev) 199 { 200 struct lan966x_port *port = netdev_priv(dev); 201 struct lan966x *lan966x = port->lan966x; 202 u32 i, count, last; 203 u8 grp = 0; 204 u32 val; 205 int err; 206 207 val = lan_rd(lan966x, QS_INJ_STATUS); 208 if (!(QS_INJ_STATUS_FIFO_RDY_GET(val) & BIT(grp)) || 209 (QS_INJ_STATUS_WMARK_REACHED_GET(val) & BIT(grp))) 210 goto err; 211 212 /* Write start of frame */ 213 lan_wr(QS_INJ_CTRL_GAP_SIZE_SET(1) | 214 QS_INJ_CTRL_SOF_SET(1), 215 lan966x, QS_INJ_CTRL(grp)); 216 217 /* Write IFH header */ 218 for (i = 0; i < IFH_LEN; ++i) { 219 /* Wait until the fifo is ready */ 220 err = lan966x_port_inj_ready(lan966x, grp); 221 if (err) 222 goto err; 223 224 lan_wr((__force u32)ifh[i], lan966x, QS_INJ_WR(grp)); 225 } 226 227 /* Write frame */ 228 count = DIV_ROUND_UP(skb->len, 4); 229 last = skb->len % 4; 230 for (i = 0; i < count; ++i) { 231 /* Wait until the fifo is ready */ 232 err = lan966x_port_inj_ready(lan966x, grp); 233 if (err) 234 goto err; 235 236 lan_wr(((u32 *)skb->data)[i], lan966x, QS_INJ_WR(grp)); 237 } 238 239 /* Add padding */ 240 while (i < (LAN966X_BUFFER_MIN_SZ / 4)) { 241 /* Wait until the fifo is ready */ 242 err = lan966x_port_inj_ready(lan966x, grp); 243 if (err) 244 goto err; 245 246 lan_wr(0, lan966x, QS_INJ_WR(grp)); 247 ++i; 248 } 249 250 /* Inidcate EOF and valid bytes in the last word */ 251 lan_wr(QS_INJ_CTRL_GAP_SIZE_SET(1) | 252 QS_INJ_CTRL_VLD_BYTES_SET(skb->len < LAN966X_BUFFER_MIN_SZ ? 253 0 : last) | 254 QS_INJ_CTRL_EOF_SET(1), 255 lan966x, QS_INJ_CTRL(grp)); 256 257 /* Add dummy CRC */ 258 lan_wr(0, lan966x, QS_INJ_WR(grp)); 259 skb_tx_timestamp(skb); 260 261 dev->stats.tx_packets++; 262 dev->stats.tx_bytes += skb->len; 263 264 if (skb_shinfo(skb)->tx_flags & SKBTX_HW_TSTAMP && 265 LAN966X_SKB_CB(skb)->rew_op == IFH_REW_OP_TWO_STEP_PTP) 266 return NETDEV_TX_OK; 267 268 dev_consume_skb_any(skb); 269 return NETDEV_TX_OK; 270 271 err: 272 if (skb_shinfo(skb)->tx_flags & SKBTX_HW_TSTAMP && 273 LAN966X_SKB_CB(skb)->rew_op == IFH_REW_OP_TWO_STEP_PTP) 274 lan966x_ptp_txtstamp_release(port, skb); 275 276 return NETDEV_TX_BUSY; 277 } 278 279 static void lan966x_ifh_set_bypass(void *ifh, u64 bypass) 280 { 281 packing(ifh, &bypass, IFH_POS_BYPASS + IFH_WID_BYPASS - 1, 282 IFH_POS_BYPASS, IFH_LEN * 4, PACK, 0); 283 } 284 285 static void lan966x_ifh_set_port(void *ifh, u64 bypass) 286 { 287 packing(ifh, &bypass, IFH_POS_DSTS + IFH_WID_DSTS - 1, 288 IFH_POS_DSTS, IFH_LEN * 4, PACK, 0); 289 } 290 291 static void lan966x_ifh_set_qos_class(void *ifh, u64 bypass) 292 { 293 packing(ifh, &bypass, IFH_POS_QOS_CLASS + IFH_WID_QOS_CLASS - 1, 294 IFH_POS_QOS_CLASS, IFH_LEN * 4, PACK, 0); 295 } 296 297 static void lan966x_ifh_set_ipv(void *ifh, u64 bypass) 298 { 299 packing(ifh, &bypass, IFH_POS_IPV + IFH_WID_IPV - 1, 300 IFH_POS_IPV, IFH_LEN * 4, PACK, 0); 301 } 302 303 static void lan966x_ifh_set_vid(void *ifh, u64 vid) 304 { 305 packing(ifh, &vid, IFH_POS_TCI + IFH_WID_TCI - 1, 306 IFH_POS_TCI, IFH_LEN * 4, PACK, 0); 307 } 308 309 static void lan966x_ifh_set_rew_op(void *ifh, u64 rew_op) 310 { 311 packing(ifh, &rew_op, IFH_POS_REW_CMD + IFH_WID_REW_CMD - 1, 312 IFH_POS_REW_CMD, IFH_LEN * 4, PACK, 0); 313 } 314 315 static void lan966x_ifh_set_timestamp(void *ifh, u64 timestamp) 316 { 317 packing(ifh, ×tamp, IFH_POS_TIMESTAMP + IFH_WID_TIMESTAMP - 1, 318 IFH_POS_TIMESTAMP, IFH_LEN * 4, PACK, 0); 319 } 320 321 static int lan966x_port_xmit(struct sk_buff *skb, struct net_device *dev) 322 { 323 struct lan966x_port *port = netdev_priv(dev); 324 struct lan966x *lan966x = port->lan966x; 325 __be32 ifh[IFH_LEN]; 326 int err; 327 328 memset(ifh, 0x0, sizeof(__be32) * IFH_LEN); 329 330 lan966x_ifh_set_bypass(ifh, 1); 331 lan966x_ifh_set_port(ifh, BIT_ULL(port->chip_port)); 332 lan966x_ifh_set_qos_class(ifh, skb->priority >= 7 ? 0x7 : skb->priority); 333 lan966x_ifh_set_ipv(ifh, skb->priority >= 7 ? 0x7 : skb->priority); 334 lan966x_ifh_set_vid(ifh, skb_vlan_tag_get(skb)); 335 336 if (port->lan966x->ptp && skb_shinfo(skb)->tx_flags & SKBTX_HW_TSTAMP) { 337 err = lan966x_ptp_txtstamp_request(port, skb); 338 if (err) 339 return err; 340 341 lan966x_ifh_set_rew_op(ifh, LAN966X_SKB_CB(skb)->rew_op); 342 lan966x_ifh_set_timestamp(ifh, LAN966X_SKB_CB(skb)->ts_id); 343 } 344 345 spin_lock(&lan966x->tx_lock); 346 err = lan966x_port_ifh_xmit(skb, ifh, dev); 347 spin_unlock(&lan966x->tx_lock); 348 349 return err; 350 } 351 352 static int lan966x_port_change_mtu(struct net_device *dev, int new_mtu) 353 { 354 struct lan966x_port *port = netdev_priv(dev); 355 struct lan966x *lan966x = port->lan966x; 356 357 lan_wr(DEV_MAC_MAXLEN_CFG_MAX_LEN_SET(new_mtu), 358 lan966x, DEV_MAC_MAXLEN_CFG(port->chip_port)); 359 dev->mtu = new_mtu; 360 361 return 0; 362 } 363 364 static int lan966x_mc_unsync(struct net_device *dev, const unsigned char *addr) 365 { 366 struct lan966x_port *port = netdev_priv(dev); 367 struct lan966x *lan966x = port->lan966x; 368 369 return lan966x_mac_forget(lan966x, addr, HOST_PVID, ENTRYTYPE_LOCKED); 370 } 371 372 static int lan966x_mc_sync(struct net_device *dev, const unsigned char *addr) 373 { 374 struct lan966x_port *port = netdev_priv(dev); 375 struct lan966x *lan966x = port->lan966x; 376 377 return lan966x_mac_cpu_learn(lan966x, addr, HOST_PVID); 378 } 379 380 static void lan966x_port_set_rx_mode(struct net_device *dev) 381 { 382 __dev_mc_sync(dev, lan966x_mc_sync, lan966x_mc_unsync); 383 } 384 385 static int lan966x_port_get_parent_id(struct net_device *dev, 386 struct netdev_phys_item_id *ppid) 387 { 388 struct lan966x_port *port = netdev_priv(dev); 389 struct lan966x *lan966x = port->lan966x; 390 391 ppid->id_len = sizeof(lan966x->base_mac); 392 memcpy(&ppid->id, &lan966x->base_mac, ppid->id_len); 393 394 return 0; 395 } 396 397 static int lan966x_port_ioctl(struct net_device *dev, struct ifreq *ifr, 398 int cmd) 399 { 400 struct lan966x_port *port = netdev_priv(dev); 401 402 if (!phy_has_hwtstamp(dev->phydev) && port->lan966x->ptp) { 403 switch (cmd) { 404 case SIOCSHWTSTAMP: 405 return lan966x_ptp_hwtstamp_set(port, ifr); 406 case SIOCGHWTSTAMP: 407 return lan966x_ptp_hwtstamp_get(port, ifr); 408 } 409 } 410 411 if (!dev->phydev) 412 return -ENODEV; 413 414 return phy_mii_ioctl(dev->phydev, ifr, cmd); 415 } 416 417 static const struct net_device_ops lan966x_port_netdev_ops = { 418 .ndo_open = lan966x_port_open, 419 .ndo_stop = lan966x_port_stop, 420 .ndo_start_xmit = lan966x_port_xmit, 421 .ndo_change_mtu = lan966x_port_change_mtu, 422 .ndo_set_rx_mode = lan966x_port_set_rx_mode, 423 .ndo_get_phys_port_name = lan966x_port_get_phys_port_name, 424 .ndo_get_stats64 = lan966x_stats_get, 425 .ndo_set_mac_address = lan966x_port_set_mac_address, 426 .ndo_get_port_parent_id = lan966x_port_get_parent_id, 427 .ndo_eth_ioctl = lan966x_port_ioctl, 428 }; 429 430 bool lan966x_netdevice_check(const struct net_device *dev) 431 { 432 return dev->netdev_ops == &lan966x_port_netdev_ops; 433 } 434 435 static bool lan966x_hw_offload(struct lan966x *lan966x, u32 port, 436 struct sk_buff *skb) 437 { 438 u32 val; 439 440 /* The IGMP and MLD frames are not forward by the HW if 441 * multicast snooping is enabled, therefor don't mark as 442 * offload to allow the SW to forward the frames accordingly. 443 */ 444 val = lan_rd(lan966x, ANA_CPU_FWD_CFG(port)); 445 if (!(val & (ANA_CPU_FWD_CFG_IGMP_REDIR_ENA | 446 ANA_CPU_FWD_CFG_MLD_REDIR_ENA))) 447 return true; 448 449 if (eth_type_vlan(skb->protocol)) { 450 skb = skb_vlan_untag(skb); 451 if (unlikely(!skb)) 452 return false; 453 } 454 455 if (skb->protocol == htons(ETH_P_IP) && 456 ip_hdr(skb)->protocol == IPPROTO_IGMP) 457 return false; 458 459 if (IS_ENABLED(CONFIG_IPV6) && 460 skb->protocol == htons(ETH_P_IPV6) && 461 ipv6_addr_is_multicast(&ipv6_hdr(skb)->daddr) && 462 !ipv6_mc_check_mld(skb)) 463 return false; 464 465 return true; 466 } 467 468 static int lan966x_port_xtr_status(struct lan966x *lan966x, u8 grp) 469 { 470 return lan_rd(lan966x, QS_XTR_RD(grp)); 471 } 472 473 static int lan966x_port_xtr_ready(struct lan966x *lan966x, u8 grp) 474 { 475 u32 val; 476 477 return read_poll_timeout(lan966x_port_xtr_status, val, 478 val != XTR_NOT_READY, 479 READL_SLEEP_US, READL_TIMEOUT_US, false, 480 lan966x, grp); 481 } 482 483 static int lan966x_rx_frame_word(struct lan966x *lan966x, u8 grp, u32 *rval) 484 { 485 u32 bytes_valid; 486 u32 val; 487 int err; 488 489 val = lan_rd(lan966x, QS_XTR_RD(grp)); 490 if (val == XTR_NOT_READY) { 491 err = lan966x_port_xtr_ready(lan966x, grp); 492 if (err) 493 return -EIO; 494 } 495 496 switch (val) { 497 case XTR_ABORT: 498 return -EIO; 499 case XTR_EOF_0: 500 case XTR_EOF_1: 501 case XTR_EOF_2: 502 case XTR_EOF_3: 503 case XTR_PRUNED: 504 bytes_valid = XTR_VALID_BYTES(val); 505 val = lan_rd(lan966x, QS_XTR_RD(grp)); 506 if (val == XTR_ESCAPE) 507 *rval = lan_rd(lan966x, QS_XTR_RD(grp)); 508 else 509 *rval = val; 510 511 return bytes_valid; 512 case XTR_ESCAPE: 513 *rval = lan_rd(lan966x, QS_XTR_RD(grp)); 514 515 return 4; 516 default: 517 *rval = val; 518 519 return 4; 520 } 521 } 522 523 static void lan966x_ifh_get_src_port(void *ifh, u64 *src_port) 524 { 525 packing(ifh, src_port, IFH_POS_SRCPORT + IFH_WID_SRCPORT - 1, 526 IFH_POS_SRCPORT, IFH_LEN * 4, UNPACK, 0); 527 } 528 529 static void lan966x_ifh_get_len(void *ifh, u64 *len) 530 { 531 packing(ifh, len, IFH_POS_LEN + IFH_WID_LEN - 1, 532 IFH_POS_LEN, IFH_LEN * 4, UNPACK, 0); 533 } 534 535 static void lan966x_ifh_get_timestamp(void *ifh, u64 *timestamp) 536 { 537 packing(ifh, timestamp, IFH_POS_TIMESTAMP + IFH_WID_TIMESTAMP - 1, 538 IFH_POS_TIMESTAMP, IFH_LEN * 4, UNPACK, 0); 539 } 540 541 static irqreturn_t lan966x_xtr_irq_handler(int irq, void *args) 542 { 543 struct lan966x *lan966x = args; 544 int i, grp = 0, err = 0; 545 546 if (!(lan_rd(lan966x, QS_XTR_DATA_PRESENT) & BIT(grp))) 547 return IRQ_NONE; 548 549 do { 550 u64 src_port, len, timestamp; 551 struct net_device *dev; 552 struct sk_buff *skb; 553 int sz = 0, buf_len; 554 u32 ifh[IFH_LEN]; 555 u32 *buf; 556 u32 val; 557 558 for (i = 0; i < IFH_LEN; i++) { 559 err = lan966x_rx_frame_word(lan966x, grp, &ifh[i]); 560 if (err != 4) 561 goto recover; 562 } 563 564 err = 0; 565 566 lan966x_ifh_get_src_port(ifh, &src_port); 567 lan966x_ifh_get_len(ifh, &len); 568 lan966x_ifh_get_timestamp(ifh, ×tamp); 569 570 WARN_ON(src_port >= lan966x->num_phys_ports); 571 572 dev = lan966x->ports[src_port]->dev; 573 skb = netdev_alloc_skb(dev, len); 574 if (unlikely(!skb)) { 575 netdev_err(dev, "Unable to allocate sk_buff\n"); 576 err = -ENOMEM; 577 break; 578 } 579 buf_len = len - ETH_FCS_LEN; 580 buf = (u32 *)skb_put(skb, buf_len); 581 582 len = 0; 583 do { 584 sz = lan966x_rx_frame_word(lan966x, grp, &val); 585 if (sz < 0) { 586 kfree_skb(skb); 587 goto recover; 588 } 589 590 *buf++ = val; 591 len += sz; 592 } while (len < buf_len); 593 594 /* Read the FCS */ 595 sz = lan966x_rx_frame_word(lan966x, grp, &val); 596 if (sz < 0) { 597 kfree_skb(skb); 598 goto recover; 599 } 600 601 /* Update the statistics if part of the FCS was read before */ 602 len -= ETH_FCS_LEN - sz; 603 604 if (unlikely(dev->features & NETIF_F_RXFCS)) { 605 buf = (u32 *)skb_put(skb, ETH_FCS_LEN); 606 *buf = val; 607 } 608 609 lan966x_ptp_rxtstamp(lan966x, skb, timestamp); 610 skb->protocol = eth_type_trans(skb, dev); 611 612 if (lan966x->bridge_mask & BIT(src_port)) { 613 skb->offload_fwd_mark = 1; 614 615 skb_reset_network_header(skb); 616 if (!lan966x_hw_offload(lan966x, src_port, skb)) 617 skb->offload_fwd_mark = 0; 618 } 619 620 if (!skb_defer_rx_timestamp(skb)) 621 netif_rx(skb); 622 623 dev->stats.rx_bytes += len; 624 dev->stats.rx_packets++; 625 626 recover: 627 if (sz < 0 || err) 628 lan_rd(lan966x, QS_XTR_RD(grp)); 629 630 } while (lan_rd(lan966x, QS_XTR_DATA_PRESENT) & BIT(grp)); 631 632 return IRQ_HANDLED; 633 } 634 635 static irqreturn_t lan966x_ana_irq_handler(int irq, void *args) 636 { 637 struct lan966x *lan966x = args; 638 639 return lan966x_mac_irq_handler(lan966x); 640 } 641 642 static void lan966x_cleanup_ports(struct lan966x *lan966x) 643 { 644 struct lan966x_port *port; 645 int p; 646 647 for (p = 0; p < lan966x->num_phys_ports; p++) { 648 port = lan966x->ports[p]; 649 if (!port) 650 continue; 651 652 if (port->dev) 653 unregister_netdev(port->dev); 654 655 if (port->phylink) { 656 rtnl_lock(); 657 lan966x_port_stop(port->dev); 658 rtnl_unlock(); 659 phylink_destroy(port->phylink); 660 port->phylink = NULL; 661 } 662 663 if (port->fwnode) 664 fwnode_handle_put(port->fwnode); 665 } 666 667 disable_irq(lan966x->xtr_irq); 668 lan966x->xtr_irq = -ENXIO; 669 670 if (lan966x->ana_irq) { 671 disable_irq(lan966x->ana_irq); 672 lan966x->ana_irq = -ENXIO; 673 } 674 675 if (lan966x->ptp_irq) 676 devm_free_irq(lan966x->dev, lan966x->ptp_irq, lan966x); 677 } 678 679 static int lan966x_probe_port(struct lan966x *lan966x, u32 p, 680 phy_interface_t phy_mode, 681 struct fwnode_handle *portnp) 682 { 683 struct lan966x_port *port; 684 struct phylink *phylink; 685 struct net_device *dev; 686 int err; 687 688 if (p >= lan966x->num_phys_ports) 689 return -EINVAL; 690 691 dev = devm_alloc_etherdev_mqs(lan966x->dev, 692 sizeof(struct lan966x_port), 8, 1); 693 if (!dev) 694 return -ENOMEM; 695 696 SET_NETDEV_DEV(dev, lan966x->dev); 697 port = netdev_priv(dev); 698 port->dev = dev; 699 port->lan966x = lan966x; 700 port->chip_port = p; 701 lan966x->ports[p] = port; 702 703 dev->max_mtu = ETH_MAX_MTU; 704 705 dev->netdev_ops = &lan966x_port_netdev_ops; 706 dev->ethtool_ops = &lan966x_ethtool_ops; 707 dev->features |= NETIF_F_HW_VLAN_CTAG_TX | 708 NETIF_F_HW_VLAN_STAG_TX; 709 dev->needed_headroom = IFH_LEN * sizeof(u32); 710 711 eth_hw_addr_gen(dev, lan966x->base_mac, p + 1); 712 713 lan966x_mac_learn(lan966x, PGID_CPU, dev->dev_addr, HOST_PVID, 714 ENTRYTYPE_LOCKED); 715 716 port->phylink_config.dev = &port->dev->dev; 717 port->phylink_config.type = PHYLINK_NETDEV; 718 port->phylink_pcs.poll = true; 719 port->phylink_pcs.ops = &lan966x_phylink_pcs_ops; 720 721 port->phylink_config.mac_capabilities = MAC_ASYM_PAUSE | MAC_SYM_PAUSE | 722 MAC_10 | MAC_100 | MAC_1000FD | MAC_2500FD; 723 724 __set_bit(PHY_INTERFACE_MODE_MII, 725 port->phylink_config.supported_interfaces); 726 __set_bit(PHY_INTERFACE_MODE_GMII, 727 port->phylink_config.supported_interfaces); 728 __set_bit(PHY_INTERFACE_MODE_SGMII, 729 port->phylink_config.supported_interfaces); 730 __set_bit(PHY_INTERFACE_MODE_QSGMII, 731 port->phylink_config.supported_interfaces); 732 __set_bit(PHY_INTERFACE_MODE_1000BASEX, 733 port->phylink_config.supported_interfaces); 734 __set_bit(PHY_INTERFACE_MODE_2500BASEX, 735 port->phylink_config.supported_interfaces); 736 737 phylink = phylink_create(&port->phylink_config, 738 portnp, 739 phy_mode, 740 &lan966x_phylink_mac_ops); 741 if (IS_ERR(phylink)) { 742 port->dev = NULL; 743 return PTR_ERR(phylink); 744 } 745 746 port->phylink = phylink; 747 748 err = register_netdev(dev); 749 if (err) { 750 dev_err(lan966x->dev, "register_netdev failed\n"); 751 return err; 752 } 753 754 lan966x_vlan_port_set_vlan_aware(port, 0); 755 lan966x_vlan_port_set_vid(port, HOST_PVID, false, false); 756 lan966x_vlan_port_apply(port); 757 758 return 0; 759 } 760 761 static void lan966x_init(struct lan966x *lan966x) 762 { 763 u32 p, i; 764 765 /* MAC table initialization */ 766 lan966x_mac_init(lan966x); 767 768 lan966x_vlan_init(lan966x); 769 770 /* Flush queues */ 771 lan_wr(lan_rd(lan966x, QS_XTR_FLUSH) | 772 GENMASK(1, 0), 773 lan966x, QS_XTR_FLUSH); 774 775 /* Allow to drain */ 776 mdelay(1); 777 778 /* All Queues normal */ 779 lan_wr(lan_rd(lan966x, QS_XTR_FLUSH) & 780 ~(GENMASK(1, 0)), 781 lan966x, QS_XTR_FLUSH); 782 783 /* Set MAC age time to default value, the entry is aged after 784 * 2 * AGE_PERIOD 785 */ 786 lan_wr(ANA_AUTOAGE_AGE_PERIOD_SET(BR_DEFAULT_AGEING_TIME / 2 / HZ), 787 lan966x, ANA_AUTOAGE); 788 789 /* Disable learning for frames discarded by VLAN ingress filtering */ 790 lan_rmw(ANA_ADVLEARN_VLAN_CHK_SET(1), 791 ANA_ADVLEARN_VLAN_CHK, 792 lan966x, ANA_ADVLEARN); 793 794 /* Setup frame ageing - "2 sec" - The unit is 6.5 us on lan966x */ 795 lan_wr(SYS_FRM_AGING_AGE_TX_ENA_SET(1) | 796 (20000000 / 65), 797 lan966x, SYS_FRM_AGING); 798 799 /* Map the 8 CPU extraction queues to CPU port */ 800 lan_wr(0, lan966x, QSYS_CPU_GROUP_MAP); 801 802 /* Do byte-swap and expect status after last data word 803 * Extraction: Mode: manual extraction) | Byte_swap 804 */ 805 lan_wr(QS_XTR_GRP_CFG_MODE_SET(1) | 806 QS_XTR_GRP_CFG_BYTE_SWAP_SET(1), 807 lan966x, QS_XTR_GRP_CFG(0)); 808 809 /* Injection: Mode: manual injection | Byte_swap */ 810 lan_wr(QS_INJ_GRP_CFG_MODE_SET(1) | 811 QS_INJ_GRP_CFG_BYTE_SWAP_SET(1), 812 lan966x, QS_INJ_GRP_CFG(0)); 813 814 lan_rmw(QS_INJ_CTRL_GAP_SIZE_SET(0), 815 QS_INJ_CTRL_GAP_SIZE, 816 lan966x, QS_INJ_CTRL(0)); 817 818 /* Enable IFH insertion/parsing on CPU ports */ 819 lan_wr(SYS_PORT_MODE_INCL_INJ_HDR_SET(1) | 820 SYS_PORT_MODE_INCL_XTR_HDR_SET(1), 821 lan966x, SYS_PORT_MODE(CPU_PORT)); 822 823 /* Setup flooding PGIDs */ 824 lan_wr(ANA_FLOODING_IPMC_FLD_MC4_DATA_SET(PGID_MCIPV4) | 825 ANA_FLOODING_IPMC_FLD_MC4_CTRL_SET(PGID_MC) | 826 ANA_FLOODING_IPMC_FLD_MC6_DATA_SET(PGID_MCIPV6) | 827 ANA_FLOODING_IPMC_FLD_MC6_CTRL_SET(PGID_MC), 828 lan966x, ANA_FLOODING_IPMC); 829 830 /* There are 8 priorities */ 831 for (i = 0; i < 8; ++i) 832 lan_rmw(ANA_FLOODING_FLD_MULTICAST_SET(PGID_MC) | 833 ANA_FLOODING_FLD_UNICAST_SET(PGID_UC) | 834 ANA_FLOODING_FLD_BROADCAST_SET(PGID_BC), 835 ANA_FLOODING_FLD_MULTICAST | 836 ANA_FLOODING_FLD_UNICAST | 837 ANA_FLOODING_FLD_BROADCAST, 838 lan966x, ANA_FLOODING(i)); 839 840 for (i = 0; i < PGID_ENTRIES; ++i) 841 /* Set all the entries to obey VLAN_VLAN */ 842 lan_rmw(ANA_PGID_CFG_OBEY_VLAN_SET(1), 843 ANA_PGID_CFG_OBEY_VLAN, 844 lan966x, ANA_PGID_CFG(i)); 845 846 for (p = 0; p < lan966x->num_phys_ports; p++) { 847 /* Disable bridging by default */ 848 lan_rmw(ANA_PGID_PGID_SET(0x0), 849 ANA_PGID_PGID, 850 lan966x, ANA_PGID(p + PGID_SRC)); 851 852 /* Do not forward BPDU frames to the front ports and copy them 853 * to CPU 854 */ 855 lan_wr(0xffff, lan966x, ANA_CPU_FWD_BPDU_CFG(p)); 856 } 857 858 /* Set source buffer size for each priority and each port to 1500 bytes */ 859 for (i = 0; i <= QSYS_Q_RSRV; ++i) { 860 lan_wr(1500 / 64, lan966x, QSYS_RES_CFG(i)); 861 lan_wr(1500 / 64, lan966x, QSYS_RES_CFG(512 + i)); 862 } 863 864 /* Enable switching to/from cpu port */ 865 lan_wr(QSYS_SW_PORT_MODE_PORT_ENA_SET(1) | 866 QSYS_SW_PORT_MODE_SCH_NEXT_CFG_SET(1) | 867 QSYS_SW_PORT_MODE_INGRESS_DROP_MODE_SET(1), 868 lan966x, QSYS_SW_PORT_MODE(CPU_PORT)); 869 870 /* Configure and enable the CPU port */ 871 lan_rmw(ANA_PGID_PGID_SET(0), 872 ANA_PGID_PGID, 873 lan966x, ANA_PGID(CPU_PORT)); 874 lan_rmw(ANA_PGID_PGID_SET(BIT(CPU_PORT)), 875 ANA_PGID_PGID, 876 lan966x, ANA_PGID(PGID_CPU)); 877 878 /* Multicast to all other ports */ 879 lan_rmw(GENMASK(lan966x->num_phys_ports - 1, 0), 880 ANA_PGID_PGID, 881 lan966x, ANA_PGID(PGID_MC)); 882 883 /* This will be controlled by mrouter ports */ 884 lan_rmw(GENMASK(lan966x->num_phys_ports - 1, 0), 885 ANA_PGID_PGID, 886 lan966x, ANA_PGID(PGID_MCIPV4)); 887 888 lan_rmw(GENMASK(lan966x->num_phys_ports - 1, 0), 889 ANA_PGID_PGID, 890 lan966x, ANA_PGID(PGID_MCIPV6)); 891 892 /* Unicast to all other ports */ 893 lan_rmw(GENMASK(lan966x->num_phys_ports - 1, 0), 894 ANA_PGID_PGID, 895 lan966x, ANA_PGID(PGID_UC)); 896 897 /* Broadcast to the CPU port and to other ports */ 898 lan_rmw(ANA_PGID_PGID_SET(BIT(CPU_PORT) | GENMASK(lan966x->num_phys_ports - 1, 0)), 899 ANA_PGID_PGID, 900 lan966x, ANA_PGID(PGID_BC)); 901 902 lan_wr(REW_PORT_CFG_NO_REWRITE_SET(1), 903 lan966x, REW_PORT_CFG(CPU_PORT)); 904 905 lan_rmw(ANA_ANAINTR_INTR_ENA_SET(1), 906 ANA_ANAINTR_INTR_ENA, 907 lan966x, ANA_ANAINTR); 908 909 spin_lock_init(&lan966x->tx_lock); 910 } 911 912 static int lan966x_ram_init(struct lan966x *lan966x) 913 { 914 return lan_rd(lan966x, SYS_RAM_INIT); 915 } 916 917 static int lan966x_reset_switch(struct lan966x *lan966x) 918 { 919 struct reset_control *switch_reset, *phy_reset; 920 int val = 0; 921 int ret; 922 923 switch_reset = devm_reset_control_get_shared(lan966x->dev, "switch"); 924 if (IS_ERR(switch_reset)) 925 return dev_err_probe(lan966x->dev, PTR_ERR(switch_reset), 926 "Could not obtain switch reset"); 927 928 phy_reset = devm_reset_control_get_shared(lan966x->dev, "phy"); 929 if (IS_ERR(phy_reset)) 930 return dev_err_probe(lan966x->dev, PTR_ERR(phy_reset), 931 "Could not obtain phy reset\n"); 932 933 reset_control_reset(switch_reset); 934 reset_control_reset(phy_reset); 935 936 lan_wr(SYS_RESET_CFG_CORE_ENA_SET(0), lan966x, SYS_RESET_CFG); 937 lan_wr(SYS_RAM_INIT_RAM_INIT_SET(1), lan966x, SYS_RAM_INIT); 938 ret = readx_poll_timeout(lan966x_ram_init, lan966x, 939 val, (val & BIT(1)) == 0, READL_SLEEP_US, 940 READL_TIMEOUT_US); 941 if (ret) 942 return ret; 943 944 lan_wr(SYS_RESET_CFG_CORE_ENA_SET(1), lan966x, SYS_RESET_CFG); 945 946 return 0; 947 } 948 949 static int lan966x_probe(struct platform_device *pdev) 950 { 951 struct fwnode_handle *ports, *portnp; 952 struct lan966x *lan966x; 953 u8 mac_addr[ETH_ALEN]; 954 int err, i; 955 956 lan966x = devm_kzalloc(&pdev->dev, sizeof(*lan966x), GFP_KERNEL); 957 if (!lan966x) 958 return -ENOMEM; 959 960 platform_set_drvdata(pdev, lan966x); 961 lan966x->dev = &pdev->dev; 962 963 if (!device_get_mac_address(&pdev->dev, mac_addr)) { 964 ether_addr_copy(lan966x->base_mac, mac_addr); 965 } else { 966 pr_info("MAC addr was not set, use random MAC\n"); 967 eth_random_addr(lan966x->base_mac); 968 lan966x->base_mac[5] &= 0xf0; 969 } 970 971 ports = device_get_named_child_node(&pdev->dev, "ethernet-ports"); 972 if (!ports) 973 return dev_err_probe(&pdev->dev, -ENODEV, 974 "no ethernet-ports child found\n"); 975 976 err = lan966x_create_targets(pdev, lan966x); 977 if (err) 978 return dev_err_probe(&pdev->dev, err, 979 "Failed to create targets"); 980 981 err = lan966x_reset_switch(lan966x); 982 if (err) 983 return dev_err_probe(&pdev->dev, err, "Reset failed"); 984 985 i = 0; 986 fwnode_for_each_available_child_node(ports, portnp) 987 ++i; 988 989 lan966x->num_phys_ports = i; 990 lan966x->ports = devm_kcalloc(&pdev->dev, lan966x->num_phys_ports, 991 sizeof(struct lan966x_port *), 992 GFP_KERNEL); 993 if (!lan966x->ports) 994 return -ENOMEM; 995 996 /* There QS system has 32KB of memory */ 997 lan966x->shared_queue_sz = LAN966X_BUFFER_MEMORY; 998 999 /* set irq */ 1000 lan966x->xtr_irq = platform_get_irq_byname(pdev, "xtr"); 1001 if (lan966x->xtr_irq <= 0) 1002 return -EINVAL; 1003 1004 err = devm_request_threaded_irq(&pdev->dev, lan966x->xtr_irq, NULL, 1005 lan966x_xtr_irq_handler, IRQF_ONESHOT, 1006 "frame extraction", lan966x); 1007 if (err) { 1008 pr_err("Unable to use xtr irq"); 1009 return -ENODEV; 1010 } 1011 1012 lan966x->ana_irq = platform_get_irq_byname(pdev, "ana"); 1013 if (lan966x->ana_irq) { 1014 err = devm_request_threaded_irq(&pdev->dev, lan966x->ana_irq, NULL, 1015 lan966x_ana_irq_handler, IRQF_ONESHOT, 1016 "ana irq", lan966x); 1017 if (err) 1018 return dev_err_probe(&pdev->dev, err, "Unable to use ana irq"); 1019 } 1020 1021 lan966x->ptp_irq = platform_get_irq_byname(pdev, "ptp"); 1022 if (lan966x->ptp_irq > 0) { 1023 err = devm_request_threaded_irq(&pdev->dev, lan966x->ptp_irq, NULL, 1024 lan966x_ptp_irq_handler, IRQF_ONESHOT, 1025 "ptp irq", lan966x); 1026 if (err) 1027 return dev_err_probe(&pdev->dev, err, "Unable to use ptp irq"); 1028 1029 lan966x->ptp = 1; 1030 } 1031 1032 /* init switch */ 1033 lan966x_init(lan966x); 1034 lan966x_stats_init(lan966x); 1035 1036 /* go over the child nodes */ 1037 fwnode_for_each_available_child_node(ports, portnp) { 1038 phy_interface_t phy_mode; 1039 struct phy *serdes; 1040 u32 p; 1041 1042 if (fwnode_property_read_u32(portnp, "reg", &p)) 1043 continue; 1044 1045 phy_mode = fwnode_get_phy_mode(portnp); 1046 err = lan966x_probe_port(lan966x, p, phy_mode, portnp); 1047 if (err) 1048 goto cleanup_ports; 1049 1050 /* Read needed configuration */ 1051 lan966x->ports[p]->config.portmode = phy_mode; 1052 lan966x->ports[p]->fwnode = fwnode_handle_get(portnp); 1053 1054 serdes = devm_of_phy_get(lan966x->dev, to_of_node(portnp), NULL); 1055 if (!IS_ERR(serdes)) 1056 lan966x->ports[p]->serdes = serdes; 1057 1058 lan966x_port_init(lan966x->ports[p]); 1059 } 1060 1061 lan966x_mdb_init(lan966x); 1062 err = lan966x_fdb_init(lan966x); 1063 if (err) 1064 goto cleanup_ports; 1065 1066 err = lan966x_ptp_init(lan966x); 1067 if (err) 1068 goto cleanup_fdb; 1069 1070 return 0; 1071 1072 cleanup_fdb: 1073 lan966x_fdb_deinit(lan966x); 1074 1075 cleanup_ports: 1076 fwnode_handle_put(portnp); 1077 1078 lan966x_cleanup_ports(lan966x); 1079 1080 cancel_delayed_work_sync(&lan966x->stats_work); 1081 destroy_workqueue(lan966x->stats_queue); 1082 mutex_destroy(&lan966x->stats_lock); 1083 1084 return err; 1085 } 1086 1087 static int lan966x_remove(struct platform_device *pdev) 1088 { 1089 struct lan966x *lan966x = platform_get_drvdata(pdev); 1090 1091 lan966x_cleanup_ports(lan966x); 1092 1093 cancel_delayed_work_sync(&lan966x->stats_work); 1094 destroy_workqueue(lan966x->stats_queue); 1095 mutex_destroy(&lan966x->stats_lock); 1096 1097 lan966x_mac_purge_entries(lan966x); 1098 lan966x_mdb_deinit(lan966x); 1099 lan966x_fdb_deinit(lan966x); 1100 lan966x_ptp_deinit(lan966x); 1101 1102 return 0; 1103 } 1104 1105 static struct platform_driver lan966x_driver = { 1106 .probe = lan966x_probe, 1107 .remove = lan966x_remove, 1108 .driver = { 1109 .name = "lan966x-switch", 1110 .of_match_table = lan966x_match, 1111 }, 1112 }; 1113 1114 static int __init lan966x_switch_driver_init(void) 1115 { 1116 int ret; 1117 1118 lan966x_register_notifier_blocks(); 1119 1120 ret = platform_driver_register(&lan966x_driver); 1121 if (ret) 1122 goto err; 1123 1124 return 0; 1125 1126 err: 1127 lan966x_unregister_notifier_blocks(); 1128 return ret; 1129 } 1130 1131 static void __exit lan966x_switch_driver_exit(void) 1132 { 1133 platform_driver_unregister(&lan966x_driver); 1134 lan966x_unregister_notifier_blocks(); 1135 } 1136 1137 module_init(lan966x_switch_driver_init); 1138 module_exit(lan966x_switch_driver_exit); 1139 1140 MODULE_DESCRIPTION("Microchip LAN966X switch driver"); 1141 MODULE_AUTHOR("Horatiu Vultur <horatiu.vultur@microchip.com>"); 1142 MODULE_LICENSE("Dual MIT/GPL"); 1143