1 /* SPDX-License-Identifier: GPL-2.0+ */ 2 /* Copyright (C) 2018 Microchip Technology Inc. */ 3 4 #include <linux/module.h> 5 #include <linux/pci.h> 6 #include <linux/netdevice.h> 7 #include <linux/etherdevice.h> 8 #include <linux/crc32.h> 9 #include <linux/microchipphy.h> 10 #include <linux/net_tstamp.h> 11 #include <linux/of_mdio.h> 12 #include <linux/of_net.h> 13 #include <linux/phy.h> 14 #include <linux/phy_fixed.h> 15 #include <linux/rtnetlink.h> 16 #include <linux/iopoll.h> 17 #include <linux/crc16.h> 18 #include "lan743x_main.h" 19 #include "lan743x_ethtool.h" 20 21 #define MMD_ACCESS_ADDRESS 0 22 #define MMD_ACCESS_WRITE 1 23 #define MMD_ACCESS_READ 2 24 #define MMD_ACCESS_READ_INC 3 25 #define PCS_POWER_STATE_DOWN 0x6 26 #define PCS_POWER_STATE_UP 0x4 27 28 static void pci11x1x_strap_get_status(struct lan743x_adapter *adapter) 29 { 30 u32 chip_rev; 31 u32 cfg_load; 32 u32 hw_cfg; 33 u32 strap; 34 int ret; 35 36 /* Timeout = 100 (i.e. 1 sec (10 msce * 100)) */ 37 ret = lan743x_hs_syslock_acquire(adapter, 100); 38 if (ret < 0) { 39 netif_err(adapter, drv, adapter->netdev, 40 "Sys Lock acquire failed ret:%d\n", ret); 41 return; 42 } 43 44 cfg_load = lan743x_csr_read(adapter, ETH_SYS_CONFIG_LOAD_STARTED_REG); 45 lan743x_hs_syslock_release(adapter); 46 hw_cfg = lan743x_csr_read(adapter, HW_CFG); 47 48 if (cfg_load & GEN_SYS_LOAD_STARTED_REG_ETH_ || 49 hw_cfg & HW_CFG_RST_PROTECT_) { 50 strap = lan743x_csr_read(adapter, STRAP_READ); 51 if (strap & STRAP_READ_SGMII_EN_) 52 adapter->is_sgmii_en = true; 53 else 54 adapter->is_sgmii_en = false; 55 } else { 56 chip_rev = lan743x_csr_read(adapter, FPGA_REV); 57 if (chip_rev) { 58 if (chip_rev & FPGA_SGMII_OP) 59 adapter->is_sgmii_en = true; 60 else 61 adapter->is_sgmii_en = false; 62 } else { 63 adapter->is_sgmii_en = false; 64 } 65 } 66 netif_dbg(adapter, drv, adapter->netdev, 67 "SGMII I/F %sable\n", adapter->is_sgmii_en ? "En" : "Dis"); 68 } 69 70 static bool is_pci11x1x_chip(struct lan743x_adapter *adapter) 71 { 72 struct lan743x_csr *csr = &adapter->csr; 73 u32 id_rev = csr->id_rev; 74 75 if (((id_rev & 0xFFFF0000) == ID_REV_ID_A011_) || 76 ((id_rev & 0xFFFF0000) == ID_REV_ID_A041_)) { 77 return true; 78 } 79 return false; 80 } 81 82 static void lan743x_pci_cleanup(struct lan743x_adapter *adapter) 83 { 84 pci_release_selected_regions(adapter->pdev, 85 pci_select_bars(adapter->pdev, 86 IORESOURCE_MEM)); 87 pci_disable_device(adapter->pdev); 88 } 89 90 static int lan743x_pci_init(struct lan743x_adapter *adapter, 91 struct pci_dev *pdev) 92 { 93 unsigned long bars = 0; 94 int ret; 95 96 adapter->pdev = pdev; 97 ret = pci_enable_device_mem(pdev); 98 if (ret) 99 goto return_error; 100 101 netif_info(adapter, probe, adapter->netdev, 102 "PCI: Vendor ID = 0x%04X, Device ID = 0x%04X\n", 103 pdev->vendor, pdev->device); 104 bars = pci_select_bars(pdev, IORESOURCE_MEM); 105 if (!test_bit(0, &bars)) 106 goto disable_device; 107 108 ret = pci_request_selected_regions(pdev, bars, DRIVER_NAME); 109 if (ret) 110 goto disable_device; 111 112 pci_set_master(pdev); 113 return 0; 114 115 disable_device: 116 pci_disable_device(adapter->pdev); 117 118 return_error: 119 return ret; 120 } 121 122 u32 lan743x_csr_read(struct lan743x_adapter *adapter, int offset) 123 { 124 return ioread32(&adapter->csr.csr_address[offset]); 125 } 126 127 void lan743x_csr_write(struct lan743x_adapter *adapter, int offset, 128 u32 data) 129 { 130 iowrite32(data, &adapter->csr.csr_address[offset]); 131 } 132 133 #define LAN743X_CSR_READ_OP(offset) lan743x_csr_read(adapter, offset) 134 135 static int lan743x_csr_light_reset(struct lan743x_adapter *adapter) 136 { 137 u32 data; 138 139 data = lan743x_csr_read(adapter, HW_CFG); 140 data |= HW_CFG_LRST_; 141 lan743x_csr_write(adapter, HW_CFG, data); 142 143 return readx_poll_timeout(LAN743X_CSR_READ_OP, HW_CFG, data, 144 !(data & HW_CFG_LRST_), 100000, 10000000); 145 } 146 147 static int lan743x_csr_wait_for_bit(struct lan743x_adapter *adapter, 148 int offset, u32 bit_mask, 149 int target_value, int usleep_min, 150 int usleep_max, int count) 151 { 152 u32 data; 153 154 return readx_poll_timeout(LAN743X_CSR_READ_OP, offset, data, 155 target_value == ((data & bit_mask) ? 1 : 0), 156 usleep_max, usleep_min * count); 157 } 158 159 static int lan743x_csr_init(struct lan743x_adapter *adapter) 160 { 161 struct lan743x_csr *csr = &adapter->csr; 162 resource_size_t bar_start, bar_length; 163 int result; 164 165 bar_start = pci_resource_start(adapter->pdev, 0); 166 bar_length = pci_resource_len(adapter->pdev, 0); 167 csr->csr_address = devm_ioremap(&adapter->pdev->dev, 168 bar_start, bar_length); 169 if (!csr->csr_address) { 170 result = -ENOMEM; 171 goto clean_up; 172 } 173 174 csr->id_rev = lan743x_csr_read(adapter, ID_REV); 175 csr->fpga_rev = lan743x_csr_read(adapter, FPGA_REV); 176 netif_info(adapter, probe, adapter->netdev, 177 "ID_REV = 0x%08X, FPGA_REV = %d.%d\n", 178 csr->id_rev, FPGA_REV_GET_MAJOR_(csr->fpga_rev), 179 FPGA_REV_GET_MINOR_(csr->fpga_rev)); 180 if (!ID_REV_IS_VALID_CHIP_ID_(csr->id_rev)) { 181 result = -ENODEV; 182 goto clean_up; 183 } 184 185 csr->flags = LAN743X_CSR_FLAG_SUPPORTS_INTR_AUTO_SET_CLR; 186 switch (csr->id_rev & ID_REV_CHIP_REV_MASK_) { 187 case ID_REV_CHIP_REV_A0_: 188 csr->flags |= LAN743X_CSR_FLAG_IS_A0; 189 csr->flags &= ~LAN743X_CSR_FLAG_SUPPORTS_INTR_AUTO_SET_CLR; 190 break; 191 case ID_REV_CHIP_REV_B0_: 192 csr->flags |= LAN743X_CSR_FLAG_IS_B0; 193 break; 194 } 195 196 result = lan743x_csr_light_reset(adapter); 197 if (result) 198 goto clean_up; 199 return 0; 200 clean_up: 201 return result; 202 } 203 204 static void lan743x_intr_software_isr(struct lan743x_adapter *adapter) 205 { 206 struct lan743x_intr *intr = &adapter->intr; 207 208 /* disable the interrupt to prevent repeated re-triggering */ 209 lan743x_csr_write(adapter, INT_EN_CLR, INT_BIT_SW_GP_); 210 intr->software_isr_flag = true; 211 wake_up(&intr->software_isr_wq); 212 } 213 214 static void lan743x_tx_isr(void *context, u32 int_sts, u32 flags) 215 { 216 struct lan743x_tx *tx = context; 217 struct lan743x_adapter *adapter = tx->adapter; 218 bool enable_flag = true; 219 220 lan743x_csr_read(adapter, INT_EN_SET); 221 if (flags & LAN743X_VECTOR_FLAG_SOURCE_ENABLE_CLEAR) { 222 lan743x_csr_write(adapter, INT_EN_CLR, 223 INT_BIT_DMA_TX_(tx->channel_number)); 224 } 225 226 if (int_sts & INT_BIT_DMA_TX_(tx->channel_number)) { 227 u32 ioc_bit = DMAC_INT_BIT_TX_IOC_(tx->channel_number); 228 u32 dmac_int_sts; 229 u32 dmac_int_en; 230 231 if (flags & LAN743X_VECTOR_FLAG_SOURCE_STATUS_READ) 232 dmac_int_sts = lan743x_csr_read(adapter, DMAC_INT_STS); 233 else 234 dmac_int_sts = ioc_bit; 235 if (flags & LAN743X_VECTOR_FLAG_SOURCE_ENABLE_CHECK) 236 dmac_int_en = lan743x_csr_read(adapter, 237 DMAC_INT_EN_SET); 238 else 239 dmac_int_en = ioc_bit; 240 241 dmac_int_en &= ioc_bit; 242 dmac_int_sts &= dmac_int_en; 243 if (dmac_int_sts & ioc_bit) { 244 napi_schedule(&tx->napi); 245 enable_flag = false;/* poll func will enable later */ 246 } 247 } 248 249 if (enable_flag) 250 /* enable isr */ 251 lan743x_csr_write(adapter, INT_EN_SET, 252 INT_BIT_DMA_TX_(tx->channel_number)); 253 } 254 255 static void lan743x_rx_isr(void *context, u32 int_sts, u32 flags) 256 { 257 struct lan743x_rx *rx = context; 258 struct lan743x_adapter *adapter = rx->adapter; 259 bool enable_flag = true; 260 261 if (flags & LAN743X_VECTOR_FLAG_SOURCE_ENABLE_CLEAR) { 262 lan743x_csr_write(adapter, INT_EN_CLR, 263 INT_BIT_DMA_RX_(rx->channel_number)); 264 } 265 266 if (int_sts & INT_BIT_DMA_RX_(rx->channel_number)) { 267 u32 rx_frame_bit = DMAC_INT_BIT_RXFRM_(rx->channel_number); 268 u32 dmac_int_sts; 269 u32 dmac_int_en; 270 271 if (flags & LAN743X_VECTOR_FLAG_SOURCE_STATUS_READ) 272 dmac_int_sts = lan743x_csr_read(adapter, DMAC_INT_STS); 273 else 274 dmac_int_sts = rx_frame_bit; 275 if (flags & LAN743X_VECTOR_FLAG_SOURCE_ENABLE_CHECK) 276 dmac_int_en = lan743x_csr_read(adapter, 277 DMAC_INT_EN_SET); 278 else 279 dmac_int_en = rx_frame_bit; 280 281 dmac_int_en &= rx_frame_bit; 282 dmac_int_sts &= dmac_int_en; 283 if (dmac_int_sts & rx_frame_bit) { 284 napi_schedule(&rx->napi); 285 enable_flag = false;/* poll funct will enable later */ 286 } 287 } 288 289 if (enable_flag) { 290 /* enable isr */ 291 lan743x_csr_write(adapter, INT_EN_SET, 292 INT_BIT_DMA_RX_(rx->channel_number)); 293 } 294 } 295 296 static void lan743x_intr_shared_isr(void *context, u32 int_sts, u32 flags) 297 { 298 struct lan743x_adapter *adapter = context; 299 unsigned int channel; 300 301 if (int_sts & INT_BIT_ALL_RX_) { 302 for (channel = 0; channel < LAN743X_USED_RX_CHANNELS; 303 channel++) { 304 u32 int_bit = INT_BIT_DMA_RX_(channel); 305 306 if (int_sts & int_bit) { 307 lan743x_rx_isr(&adapter->rx[channel], 308 int_bit, flags); 309 int_sts &= ~int_bit; 310 } 311 } 312 } 313 if (int_sts & INT_BIT_ALL_TX_) { 314 for (channel = 0; channel < adapter->used_tx_channels; 315 channel++) { 316 u32 int_bit = INT_BIT_DMA_TX_(channel); 317 318 if (int_sts & int_bit) { 319 lan743x_tx_isr(&adapter->tx[channel], 320 int_bit, flags); 321 int_sts &= ~int_bit; 322 } 323 } 324 } 325 if (int_sts & INT_BIT_ALL_OTHER_) { 326 if (int_sts & INT_BIT_SW_GP_) { 327 lan743x_intr_software_isr(adapter); 328 int_sts &= ~INT_BIT_SW_GP_; 329 } 330 if (int_sts & INT_BIT_1588_) { 331 lan743x_ptp_isr(adapter); 332 int_sts &= ~INT_BIT_1588_; 333 } 334 } 335 if (int_sts) 336 lan743x_csr_write(adapter, INT_EN_CLR, int_sts); 337 } 338 339 static irqreturn_t lan743x_intr_entry_isr(int irq, void *ptr) 340 { 341 struct lan743x_vector *vector = ptr; 342 struct lan743x_adapter *adapter = vector->adapter; 343 irqreturn_t result = IRQ_NONE; 344 u32 int_enables; 345 u32 int_sts; 346 347 if (vector->flags & LAN743X_VECTOR_FLAG_SOURCE_STATUS_READ) { 348 int_sts = lan743x_csr_read(adapter, INT_STS); 349 } else if (vector->flags & 350 (LAN743X_VECTOR_FLAG_SOURCE_STATUS_R2C | 351 LAN743X_VECTOR_FLAG_SOURCE_ENABLE_R2C)) { 352 int_sts = lan743x_csr_read(adapter, INT_STS_R2C); 353 } else { 354 /* use mask as implied status */ 355 int_sts = vector->int_mask | INT_BIT_MAS_; 356 } 357 358 if (!(int_sts & INT_BIT_MAS_)) 359 goto irq_done; 360 361 if (vector->flags & LAN743X_VECTOR_FLAG_VECTOR_ENABLE_ISR_CLEAR) 362 /* disable vector interrupt */ 363 lan743x_csr_write(adapter, 364 INT_VEC_EN_CLR, 365 INT_VEC_EN_(vector->vector_index)); 366 367 if (vector->flags & LAN743X_VECTOR_FLAG_MASTER_ENABLE_CLEAR) 368 /* disable master interrupt */ 369 lan743x_csr_write(adapter, INT_EN_CLR, INT_BIT_MAS_); 370 371 if (vector->flags & LAN743X_VECTOR_FLAG_SOURCE_ENABLE_CHECK) { 372 int_enables = lan743x_csr_read(adapter, INT_EN_SET); 373 } else { 374 /* use vector mask as implied enable mask */ 375 int_enables = vector->int_mask; 376 } 377 378 int_sts &= int_enables; 379 int_sts &= vector->int_mask; 380 if (int_sts) { 381 if (vector->handler) { 382 vector->handler(vector->context, 383 int_sts, vector->flags); 384 } else { 385 /* disable interrupts on this vector */ 386 lan743x_csr_write(adapter, INT_EN_CLR, 387 vector->int_mask); 388 } 389 result = IRQ_HANDLED; 390 } 391 392 if (vector->flags & LAN743X_VECTOR_FLAG_MASTER_ENABLE_SET) 393 /* enable master interrupt */ 394 lan743x_csr_write(adapter, INT_EN_SET, INT_BIT_MAS_); 395 396 if (vector->flags & LAN743X_VECTOR_FLAG_VECTOR_ENABLE_ISR_SET) 397 /* enable vector interrupt */ 398 lan743x_csr_write(adapter, 399 INT_VEC_EN_SET, 400 INT_VEC_EN_(vector->vector_index)); 401 irq_done: 402 return result; 403 } 404 405 static int lan743x_intr_test_isr(struct lan743x_adapter *adapter) 406 { 407 struct lan743x_intr *intr = &adapter->intr; 408 int ret; 409 410 intr->software_isr_flag = false; 411 412 /* enable and activate test interrupt */ 413 lan743x_csr_write(adapter, INT_EN_SET, INT_BIT_SW_GP_); 414 lan743x_csr_write(adapter, INT_SET, INT_BIT_SW_GP_); 415 416 ret = wait_event_timeout(intr->software_isr_wq, 417 intr->software_isr_flag, 418 msecs_to_jiffies(200)); 419 420 /* disable test interrupt */ 421 lan743x_csr_write(adapter, INT_EN_CLR, INT_BIT_SW_GP_); 422 423 return ret > 0 ? 0 : -ENODEV; 424 } 425 426 static int lan743x_intr_register_isr(struct lan743x_adapter *adapter, 427 int vector_index, u32 flags, 428 u32 int_mask, 429 lan743x_vector_handler handler, 430 void *context) 431 { 432 struct lan743x_vector *vector = &adapter->intr.vector_list 433 [vector_index]; 434 int ret; 435 436 vector->adapter = adapter; 437 vector->flags = flags; 438 vector->vector_index = vector_index; 439 vector->int_mask = int_mask; 440 vector->handler = handler; 441 vector->context = context; 442 443 ret = request_irq(vector->irq, 444 lan743x_intr_entry_isr, 445 (flags & LAN743X_VECTOR_FLAG_IRQ_SHARED) ? 446 IRQF_SHARED : 0, DRIVER_NAME, vector); 447 if (ret) { 448 vector->handler = NULL; 449 vector->context = NULL; 450 vector->int_mask = 0; 451 vector->flags = 0; 452 } 453 return ret; 454 } 455 456 static void lan743x_intr_unregister_isr(struct lan743x_adapter *adapter, 457 int vector_index) 458 { 459 struct lan743x_vector *vector = &adapter->intr.vector_list 460 [vector_index]; 461 462 free_irq(vector->irq, vector); 463 vector->handler = NULL; 464 vector->context = NULL; 465 vector->int_mask = 0; 466 vector->flags = 0; 467 } 468 469 static u32 lan743x_intr_get_vector_flags(struct lan743x_adapter *adapter, 470 u32 int_mask) 471 { 472 int index; 473 474 for (index = 0; index < adapter->max_vector_count; index++) { 475 if (adapter->intr.vector_list[index].int_mask & int_mask) 476 return adapter->intr.vector_list[index].flags; 477 } 478 return 0; 479 } 480 481 static void lan743x_intr_close(struct lan743x_adapter *adapter) 482 { 483 struct lan743x_intr *intr = &adapter->intr; 484 int index = 0; 485 486 lan743x_csr_write(adapter, INT_EN_CLR, INT_BIT_MAS_); 487 if (adapter->is_pci11x1x) 488 lan743x_csr_write(adapter, INT_VEC_EN_CLR, 0x0000FFFF); 489 else 490 lan743x_csr_write(adapter, INT_VEC_EN_CLR, 0x000000FF); 491 492 for (index = 0; index < intr->number_of_vectors; index++) { 493 if (intr->flags & INTR_FLAG_IRQ_REQUESTED(index)) { 494 lan743x_intr_unregister_isr(adapter, index); 495 intr->flags &= ~INTR_FLAG_IRQ_REQUESTED(index); 496 } 497 } 498 499 if (intr->flags & INTR_FLAG_MSI_ENABLED) { 500 pci_disable_msi(adapter->pdev); 501 intr->flags &= ~INTR_FLAG_MSI_ENABLED; 502 } 503 504 if (intr->flags & INTR_FLAG_MSIX_ENABLED) { 505 pci_disable_msix(adapter->pdev); 506 intr->flags &= ~INTR_FLAG_MSIX_ENABLED; 507 } 508 } 509 510 static int lan743x_intr_open(struct lan743x_adapter *adapter) 511 { 512 struct msix_entry msix_entries[PCI11X1X_MAX_VECTOR_COUNT]; 513 struct lan743x_intr *intr = &adapter->intr; 514 unsigned int used_tx_channels; 515 u32 int_vec_en_auto_clr = 0; 516 u8 max_vector_count; 517 u32 int_vec_map0 = 0; 518 u32 int_vec_map1 = 0; 519 int ret = -ENODEV; 520 int index = 0; 521 u32 flags = 0; 522 523 intr->number_of_vectors = 0; 524 525 /* Try to set up MSIX interrupts */ 526 max_vector_count = adapter->max_vector_count; 527 memset(&msix_entries[0], 0, 528 sizeof(struct msix_entry) * max_vector_count); 529 for (index = 0; index < max_vector_count; index++) 530 msix_entries[index].entry = index; 531 used_tx_channels = adapter->used_tx_channels; 532 ret = pci_enable_msix_range(adapter->pdev, 533 msix_entries, 1, 534 1 + used_tx_channels + 535 LAN743X_USED_RX_CHANNELS); 536 537 if (ret > 0) { 538 intr->flags |= INTR_FLAG_MSIX_ENABLED; 539 intr->number_of_vectors = ret; 540 intr->using_vectors = true; 541 for (index = 0; index < intr->number_of_vectors; index++) 542 intr->vector_list[index].irq = msix_entries 543 [index].vector; 544 netif_info(adapter, ifup, adapter->netdev, 545 "using MSIX interrupts, number of vectors = %d\n", 546 intr->number_of_vectors); 547 } 548 549 /* If MSIX failed try to setup using MSI interrupts */ 550 if (!intr->number_of_vectors) { 551 if (!(adapter->csr.flags & LAN743X_CSR_FLAG_IS_A0)) { 552 if (!pci_enable_msi(adapter->pdev)) { 553 intr->flags |= INTR_FLAG_MSI_ENABLED; 554 intr->number_of_vectors = 1; 555 intr->using_vectors = true; 556 intr->vector_list[0].irq = 557 adapter->pdev->irq; 558 netif_info(adapter, ifup, adapter->netdev, 559 "using MSI interrupts, number of vectors = %d\n", 560 intr->number_of_vectors); 561 } 562 } 563 } 564 565 /* If MSIX, and MSI failed, setup using legacy interrupt */ 566 if (!intr->number_of_vectors) { 567 intr->number_of_vectors = 1; 568 intr->using_vectors = false; 569 intr->vector_list[0].irq = intr->irq; 570 netif_info(adapter, ifup, adapter->netdev, 571 "using legacy interrupts\n"); 572 } 573 574 /* At this point we must have at least one irq */ 575 lan743x_csr_write(adapter, INT_VEC_EN_CLR, 0xFFFFFFFF); 576 577 /* map all interrupts to vector 0 */ 578 lan743x_csr_write(adapter, INT_VEC_MAP0, 0x00000000); 579 lan743x_csr_write(adapter, INT_VEC_MAP1, 0x00000000); 580 lan743x_csr_write(adapter, INT_VEC_MAP2, 0x00000000); 581 flags = LAN743X_VECTOR_FLAG_SOURCE_STATUS_READ | 582 LAN743X_VECTOR_FLAG_SOURCE_STATUS_W2C | 583 LAN743X_VECTOR_FLAG_SOURCE_ENABLE_CHECK | 584 LAN743X_VECTOR_FLAG_SOURCE_ENABLE_CLEAR; 585 586 if (intr->using_vectors) { 587 flags |= LAN743X_VECTOR_FLAG_VECTOR_ENABLE_ISR_CLEAR | 588 LAN743X_VECTOR_FLAG_VECTOR_ENABLE_ISR_SET; 589 } else { 590 flags |= LAN743X_VECTOR_FLAG_MASTER_ENABLE_CLEAR | 591 LAN743X_VECTOR_FLAG_MASTER_ENABLE_SET | 592 LAN743X_VECTOR_FLAG_IRQ_SHARED; 593 } 594 595 if (adapter->csr.flags & LAN743X_CSR_FLAG_SUPPORTS_INTR_AUTO_SET_CLR) { 596 flags &= ~LAN743X_VECTOR_FLAG_SOURCE_STATUS_READ; 597 flags &= ~LAN743X_VECTOR_FLAG_SOURCE_STATUS_W2C; 598 flags &= ~LAN743X_VECTOR_FLAG_SOURCE_ENABLE_CLEAR; 599 flags &= ~LAN743X_VECTOR_FLAG_SOURCE_ENABLE_CHECK; 600 flags |= LAN743X_VECTOR_FLAG_SOURCE_STATUS_R2C; 601 flags |= LAN743X_VECTOR_FLAG_SOURCE_ENABLE_R2C; 602 } 603 604 init_waitqueue_head(&intr->software_isr_wq); 605 606 ret = lan743x_intr_register_isr(adapter, 0, flags, 607 INT_BIT_ALL_RX_ | INT_BIT_ALL_TX_ | 608 INT_BIT_ALL_OTHER_, 609 lan743x_intr_shared_isr, adapter); 610 if (ret) 611 goto clean_up; 612 intr->flags |= INTR_FLAG_IRQ_REQUESTED(0); 613 614 if (intr->using_vectors) 615 lan743x_csr_write(adapter, INT_VEC_EN_SET, 616 INT_VEC_EN_(0)); 617 618 if (!(adapter->csr.flags & LAN743X_CSR_FLAG_IS_A0)) { 619 lan743x_csr_write(adapter, INT_MOD_CFG0, LAN743X_INT_MOD); 620 lan743x_csr_write(adapter, INT_MOD_CFG1, LAN743X_INT_MOD); 621 lan743x_csr_write(adapter, INT_MOD_CFG2, LAN743X_INT_MOD); 622 lan743x_csr_write(adapter, INT_MOD_CFG3, LAN743X_INT_MOD); 623 lan743x_csr_write(adapter, INT_MOD_CFG4, LAN743X_INT_MOD); 624 lan743x_csr_write(adapter, INT_MOD_CFG5, LAN743X_INT_MOD); 625 lan743x_csr_write(adapter, INT_MOD_CFG6, LAN743X_INT_MOD); 626 lan743x_csr_write(adapter, INT_MOD_CFG7, LAN743X_INT_MOD); 627 if (adapter->is_pci11x1x) { 628 lan743x_csr_write(adapter, INT_MOD_CFG8, LAN743X_INT_MOD); 629 lan743x_csr_write(adapter, INT_MOD_CFG9, LAN743X_INT_MOD); 630 lan743x_csr_write(adapter, INT_MOD_MAP0, 0x00007654); 631 lan743x_csr_write(adapter, INT_MOD_MAP1, 0x00003210); 632 } else { 633 lan743x_csr_write(adapter, INT_MOD_MAP0, 0x00005432); 634 lan743x_csr_write(adapter, INT_MOD_MAP1, 0x00000001); 635 } 636 lan743x_csr_write(adapter, INT_MOD_MAP2, 0x00FFFFFF); 637 } 638 639 /* enable interrupts */ 640 lan743x_csr_write(adapter, INT_EN_SET, INT_BIT_MAS_); 641 ret = lan743x_intr_test_isr(adapter); 642 if (ret) 643 goto clean_up; 644 645 if (intr->number_of_vectors > 1) { 646 int number_of_tx_vectors = intr->number_of_vectors - 1; 647 648 if (number_of_tx_vectors > used_tx_channels) 649 number_of_tx_vectors = used_tx_channels; 650 flags = LAN743X_VECTOR_FLAG_SOURCE_STATUS_READ | 651 LAN743X_VECTOR_FLAG_SOURCE_STATUS_W2C | 652 LAN743X_VECTOR_FLAG_SOURCE_ENABLE_CHECK | 653 LAN743X_VECTOR_FLAG_SOURCE_ENABLE_CLEAR | 654 LAN743X_VECTOR_FLAG_VECTOR_ENABLE_ISR_CLEAR | 655 LAN743X_VECTOR_FLAG_VECTOR_ENABLE_ISR_SET; 656 657 if (adapter->csr.flags & 658 LAN743X_CSR_FLAG_SUPPORTS_INTR_AUTO_SET_CLR) { 659 flags = LAN743X_VECTOR_FLAG_VECTOR_ENABLE_AUTO_SET | 660 LAN743X_VECTOR_FLAG_SOURCE_ENABLE_AUTO_SET | 661 LAN743X_VECTOR_FLAG_SOURCE_ENABLE_AUTO_CLEAR | 662 LAN743X_VECTOR_FLAG_SOURCE_STATUS_AUTO_CLEAR; 663 } 664 665 for (index = 0; index < number_of_tx_vectors; index++) { 666 u32 int_bit = INT_BIT_DMA_TX_(index); 667 int vector = index + 1; 668 669 /* map TX interrupt to vector */ 670 int_vec_map1 |= INT_VEC_MAP1_TX_VEC_(index, vector); 671 lan743x_csr_write(adapter, INT_VEC_MAP1, int_vec_map1); 672 673 /* Remove TX interrupt from shared mask */ 674 intr->vector_list[0].int_mask &= ~int_bit; 675 ret = lan743x_intr_register_isr(adapter, vector, flags, 676 int_bit, lan743x_tx_isr, 677 &adapter->tx[index]); 678 if (ret) 679 goto clean_up; 680 intr->flags |= INTR_FLAG_IRQ_REQUESTED(vector); 681 if (!(flags & 682 LAN743X_VECTOR_FLAG_VECTOR_ENABLE_AUTO_SET)) 683 lan743x_csr_write(adapter, INT_VEC_EN_SET, 684 INT_VEC_EN_(vector)); 685 } 686 } 687 if ((intr->number_of_vectors - used_tx_channels) > 1) { 688 int number_of_rx_vectors = intr->number_of_vectors - 689 used_tx_channels - 1; 690 691 if (number_of_rx_vectors > LAN743X_USED_RX_CHANNELS) 692 number_of_rx_vectors = LAN743X_USED_RX_CHANNELS; 693 694 flags = LAN743X_VECTOR_FLAG_SOURCE_STATUS_READ | 695 LAN743X_VECTOR_FLAG_SOURCE_STATUS_W2C | 696 LAN743X_VECTOR_FLAG_SOURCE_ENABLE_CHECK | 697 LAN743X_VECTOR_FLAG_SOURCE_ENABLE_CLEAR | 698 LAN743X_VECTOR_FLAG_VECTOR_ENABLE_ISR_CLEAR | 699 LAN743X_VECTOR_FLAG_VECTOR_ENABLE_ISR_SET; 700 701 if (adapter->csr.flags & 702 LAN743X_CSR_FLAG_SUPPORTS_INTR_AUTO_SET_CLR) { 703 flags = LAN743X_VECTOR_FLAG_VECTOR_ENABLE_AUTO_CLEAR | 704 LAN743X_VECTOR_FLAG_VECTOR_ENABLE_AUTO_SET | 705 LAN743X_VECTOR_FLAG_SOURCE_ENABLE_AUTO_SET | 706 LAN743X_VECTOR_FLAG_SOURCE_ENABLE_AUTO_CLEAR | 707 LAN743X_VECTOR_FLAG_SOURCE_STATUS_AUTO_CLEAR; 708 } 709 for (index = 0; index < number_of_rx_vectors; index++) { 710 int vector = index + 1 + used_tx_channels; 711 u32 int_bit = INT_BIT_DMA_RX_(index); 712 713 /* map RX interrupt to vector */ 714 int_vec_map0 |= INT_VEC_MAP0_RX_VEC_(index, vector); 715 lan743x_csr_write(adapter, INT_VEC_MAP0, int_vec_map0); 716 if (flags & 717 LAN743X_VECTOR_FLAG_VECTOR_ENABLE_AUTO_CLEAR) { 718 int_vec_en_auto_clr |= INT_VEC_EN_(vector); 719 lan743x_csr_write(adapter, INT_VEC_EN_AUTO_CLR, 720 int_vec_en_auto_clr); 721 } 722 723 /* Remove RX interrupt from shared mask */ 724 intr->vector_list[0].int_mask &= ~int_bit; 725 ret = lan743x_intr_register_isr(adapter, vector, flags, 726 int_bit, lan743x_rx_isr, 727 &adapter->rx[index]); 728 if (ret) 729 goto clean_up; 730 intr->flags |= INTR_FLAG_IRQ_REQUESTED(vector); 731 732 lan743x_csr_write(adapter, INT_VEC_EN_SET, 733 INT_VEC_EN_(vector)); 734 } 735 } 736 return 0; 737 738 clean_up: 739 lan743x_intr_close(adapter); 740 return ret; 741 } 742 743 static int lan743x_dp_write(struct lan743x_adapter *adapter, 744 u32 select, u32 addr, u32 length, u32 *buf) 745 { 746 u32 dp_sel; 747 int i; 748 749 if (lan743x_csr_wait_for_bit(adapter, DP_SEL, DP_SEL_DPRDY_, 750 1, 40, 100, 100)) 751 return -EIO; 752 dp_sel = lan743x_csr_read(adapter, DP_SEL); 753 dp_sel &= ~DP_SEL_MASK_; 754 dp_sel |= select; 755 lan743x_csr_write(adapter, DP_SEL, dp_sel); 756 757 for (i = 0; i < length; i++) { 758 lan743x_csr_write(adapter, DP_ADDR, addr + i); 759 lan743x_csr_write(adapter, DP_DATA_0, buf[i]); 760 lan743x_csr_write(adapter, DP_CMD, DP_CMD_WRITE_); 761 if (lan743x_csr_wait_for_bit(adapter, DP_SEL, DP_SEL_DPRDY_, 762 1, 40, 100, 100)) 763 return -EIO; 764 } 765 766 return 0; 767 } 768 769 static u32 lan743x_mac_mii_access(u16 id, u16 index, int read) 770 { 771 u32 ret; 772 773 ret = (id << MAC_MII_ACC_PHY_ADDR_SHIFT_) & 774 MAC_MII_ACC_PHY_ADDR_MASK_; 775 ret |= (index << MAC_MII_ACC_MIIRINDA_SHIFT_) & 776 MAC_MII_ACC_MIIRINDA_MASK_; 777 778 if (read) 779 ret |= MAC_MII_ACC_MII_READ_; 780 else 781 ret |= MAC_MII_ACC_MII_WRITE_; 782 ret |= MAC_MII_ACC_MII_BUSY_; 783 784 return ret; 785 } 786 787 static int lan743x_mac_mii_wait_till_not_busy(struct lan743x_adapter *adapter) 788 { 789 u32 data; 790 791 return readx_poll_timeout(LAN743X_CSR_READ_OP, MAC_MII_ACC, data, 792 !(data & MAC_MII_ACC_MII_BUSY_), 0, 1000000); 793 } 794 795 static int lan743x_mdiobus_read_c22(struct mii_bus *bus, int phy_id, int index) 796 { 797 struct lan743x_adapter *adapter = bus->priv; 798 u32 val, mii_access; 799 int ret; 800 801 /* comfirm MII not busy */ 802 ret = lan743x_mac_mii_wait_till_not_busy(adapter); 803 if (ret < 0) 804 return ret; 805 806 /* set the address, index & direction (read from PHY) */ 807 mii_access = lan743x_mac_mii_access(phy_id, index, MAC_MII_READ); 808 lan743x_csr_write(adapter, MAC_MII_ACC, mii_access); 809 ret = lan743x_mac_mii_wait_till_not_busy(adapter); 810 if (ret < 0) 811 return ret; 812 813 val = lan743x_csr_read(adapter, MAC_MII_DATA); 814 return (int)(val & 0xFFFF); 815 } 816 817 static int lan743x_mdiobus_write_c22(struct mii_bus *bus, 818 int phy_id, int index, u16 regval) 819 { 820 struct lan743x_adapter *adapter = bus->priv; 821 u32 val, mii_access; 822 int ret; 823 824 /* confirm MII not busy */ 825 ret = lan743x_mac_mii_wait_till_not_busy(adapter); 826 if (ret < 0) 827 return ret; 828 val = (u32)regval; 829 lan743x_csr_write(adapter, MAC_MII_DATA, val); 830 831 /* set the address, index & direction (write to PHY) */ 832 mii_access = lan743x_mac_mii_access(phy_id, index, MAC_MII_WRITE); 833 lan743x_csr_write(adapter, MAC_MII_ACC, mii_access); 834 ret = lan743x_mac_mii_wait_till_not_busy(adapter); 835 return ret; 836 } 837 838 static u32 lan743x_mac_mmd_access(int id, int dev_addr, int op) 839 { 840 u32 ret; 841 842 ret = (id << MAC_MII_ACC_PHY_ADDR_SHIFT_) & 843 MAC_MII_ACC_PHY_ADDR_MASK_; 844 ret |= (dev_addr << MAC_MII_ACC_MIIMMD_SHIFT_) & 845 MAC_MII_ACC_MIIMMD_MASK_; 846 if (op == MMD_ACCESS_WRITE) 847 ret |= MAC_MII_ACC_MIICMD_WRITE_; 848 else if (op == MMD_ACCESS_READ) 849 ret |= MAC_MII_ACC_MIICMD_READ_; 850 else if (op == MMD_ACCESS_READ_INC) 851 ret |= MAC_MII_ACC_MIICMD_READ_INC_; 852 else 853 ret |= MAC_MII_ACC_MIICMD_ADDR_; 854 ret |= (MAC_MII_ACC_MII_BUSY_ | MAC_MII_ACC_MIICL45_); 855 856 return ret; 857 } 858 859 static int lan743x_mdiobus_read_c45(struct mii_bus *bus, int phy_id, 860 int dev_addr, int index) 861 { 862 struct lan743x_adapter *adapter = bus->priv; 863 u32 mmd_access; 864 int ret; 865 866 /* comfirm MII not busy */ 867 ret = lan743x_mac_mii_wait_till_not_busy(adapter); 868 if (ret < 0) 869 return ret; 870 871 /* Load Register Address */ 872 lan743x_csr_write(adapter, MAC_MII_DATA, index); 873 mmd_access = lan743x_mac_mmd_access(phy_id, dev_addr, 874 MMD_ACCESS_ADDRESS); 875 lan743x_csr_write(adapter, MAC_MII_ACC, mmd_access); 876 ret = lan743x_mac_mii_wait_till_not_busy(adapter); 877 if (ret < 0) 878 return ret; 879 880 /* Read Data */ 881 mmd_access = lan743x_mac_mmd_access(phy_id, dev_addr, 882 MMD_ACCESS_READ); 883 lan743x_csr_write(adapter, MAC_MII_ACC, mmd_access); 884 ret = lan743x_mac_mii_wait_till_not_busy(adapter); 885 if (ret < 0) 886 return ret; 887 888 ret = lan743x_csr_read(adapter, MAC_MII_DATA); 889 return (int)(ret & 0xFFFF); 890 } 891 892 static int lan743x_mdiobus_write_c45(struct mii_bus *bus, int phy_id, 893 int dev_addr, int index, u16 regval) 894 { 895 struct lan743x_adapter *adapter = bus->priv; 896 u32 mmd_access; 897 int ret; 898 899 /* confirm MII not busy */ 900 ret = lan743x_mac_mii_wait_till_not_busy(adapter); 901 if (ret < 0) 902 return ret; 903 904 /* Load Register Address */ 905 lan743x_csr_write(adapter, MAC_MII_DATA, (u32)index); 906 mmd_access = lan743x_mac_mmd_access(phy_id, dev_addr, 907 MMD_ACCESS_ADDRESS); 908 lan743x_csr_write(adapter, MAC_MII_ACC, mmd_access); 909 ret = lan743x_mac_mii_wait_till_not_busy(adapter); 910 if (ret < 0) 911 return ret; 912 913 /* Write Data */ 914 lan743x_csr_write(adapter, MAC_MII_DATA, (u32)regval); 915 mmd_access = lan743x_mac_mmd_access(phy_id, dev_addr, 916 MMD_ACCESS_WRITE); 917 lan743x_csr_write(adapter, MAC_MII_ACC, mmd_access); 918 919 return lan743x_mac_mii_wait_till_not_busy(adapter); 920 } 921 922 static int lan743x_sgmii_wait_till_not_busy(struct lan743x_adapter *adapter) 923 { 924 u32 data; 925 int ret; 926 927 ret = readx_poll_timeout(LAN743X_CSR_READ_OP, SGMII_ACC, data, 928 !(data & SGMII_ACC_SGMII_BZY_), 100, 1000000); 929 if (ret < 0) 930 netif_err(adapter, drv, adapter->netdev, 931 "%s: error %d sgmii wait timeout\n", __func__, ret); 932 933 return ret; 934 } 935 936 int lan743x_sgmii_read(struct lan743x_adapter *adapter, u8 mmd, u16 addr) 937 { 938 u32 mmd_access; 939 int ret; 940 u32 val; 941 942 if (mmd > 31) { 943 netif_err(adapter, probe, adapter->netdev, 944 "%s mmd should <= 31\n", __func__); 945 return -EINVAL; 946 } 947 948 mutex_lock(&adapter->sgmii_rw_lock); 949 /* Load Register Address */ 950 mmd_access = mmd << SGMII_ACC_SGMII_MMD_SHIFT_; 951 mmd_access |= (addr | SGMII_ACC_SGMII_BZY_); 952 lan743x_csr_write(adapter, SGMII_ACC, mmd_access); 953 ret = lan743x_sgmii_wait_till_not_busy(adapter); 954 if (ret < 0) 955 goto sgmii_unlock; 956 957 val = lan743x_csr_read(adapter, SGMII_DATA); 958 ret = (int)(val & SGMII_DATA_MASK_); 959 960 sgmii_unlock: 961 mutex_unlock(&adapter->sgmii_rw_lock); 962 963 return ret; 964 } 965 966 static int lan743x_sgmii_write(struct lan743x_adapter *adapter, 967 u8 mmd, u16 addr, u16 val) 968 { 969 u32 mmd_access; 970 int ret; 971 972 if (mmd > 31) { 973 netif_err(adapter, probe, adapter->netdev, 974 "%s mmd should <= 31\n", __func__); 975 return -EINVAL; 976 } 977 mutex_lock(&adapter->sgmii_rw_lock); 978 /* Load Register Data */ 979 lan743x_csr_write(adapter, SGMII_DATA, (u32)(val & SGMII_DATA_MASK_)); 980 /* Load Register Address */ 981 mmd_access = mmd << SGMII_ACC_SGMII_MMD_SHIFT_; 982 mmd_access |= (addr | SGMII_ACC_SGMII_BZY_ | SGMII_ACC_SGMII_WR_); 983 lan743x_csr_write(adapter, SGMII_ACC, mmd_access); 984 ret = lan743x_sgmii_wait_till_not_busy(adapter); 985 mutex_unlock(&adapter->sgmii_rw_lock); 986 987 return ret; 988 } 989 990 static int lan743x_sgmii_mpll_set(struct lan743x_adapter *adapter, 991 u16 baud) 992 { 993 int mpllctrl0; 994 int mpllctrl1; 995 int miscctrl1; 996 int ret; 997 998 mpllctrl0 = lan743x_sgmii_read(adapter, MDIO_MMD_VEND2, 999 VR_MII_GEN2_4_MPLL_CTRL0); 1000 if (mpllctrl0 < 0) 1001 return mpllctrl0; 1002 1003 mpllctrl0 &= ~VR_MII_MPLL_CTRL0_USE_REFCLK_PAD_; 1004 if (baud == VR_MII_BAUD_RATE_1P25GBPS) { 1005 mpllctrl1 = VR_MII_MPLL_MULTIPLIER_100; 1006 /* mpll_baud_clk/4 */ 1007 miscctrl1 = 0xA; 1008 } else { 1009 mpllctrl1 = VR_MII_MPLL_MULTIPLIER_125; 1010 /* mpll_baud_clk/2 */ 1011 miscctrl1 = 0x5; 1012 } 1013 1014 ret = lan743x_sgmii_write(adapter, MDIO_MMD_VEND2, 1015 VR_MII_GEN2_4_MPLL_CTRL0, mpllctrl0); 1016 if (ret < 0) 1017 return ret; 1018 1019 ret = lan743x_sgmii_write(adapter, MDIO_MMD_VEND2, 1020 VR_MII_GEN2_4_MPLL_CTRL1, mpllctrl1); 1021 if (ret < 0) 1022 return ret; 1023 1024 return lan743x_sgmii_write(adapter, MDIO_MMD_VEND2, 1025 VR_MII_GEN2_4_MISC_CTRL1, miscctrl1); 1026 } 1027 1028 static int lan743x_sgmii_2_5G_mode_set(struct lan743x_adapter *adapter, 1029 bool enable) 1030 { 1031 if (enable) 1032 return lan743x_sgmii_mpll_set(adapter, 1033 VR_MII_BAUD_RATE_3P125GBPS); 1034 else 1035 return lan743x_sgmii_mpll_set(adapter, 1036 VR_MII_BAUD_RATE_1P25GBPS); 1037 } 1038 1039 static int lan743x_is_sgmii_2_5G_mode(struct lan743x_adapter *adapter, 1040 bool *status) 1041 { 1042 int ret; 1043 1044 ret = lan743x_sgmii_read(adapter, MDIO_MMD_VEND2, 1045 VR_MII_GEN2_4_MPLL_CTRL1); 1046 if (ret < 0) 1047 return ret; 1048 1049 if (ret == VR_MII_MPLL_MULTIPLIER_125 || 1050 ret == VR_MII_MPLL_MULTIPLIER_50) 1051 *status = true; 1052 else 1053 *status = false; 1054 1055 return 0; 1056 } 1057 1058 static int lan743x_sgmii_aneg_update(struct lan743x_adapter *adapter) 1059 { 1060 enum lan743x_sgmii_lsd lsd = adapter->sgmii_lsd; 1061 int mii_ctrl; 1062 int dgt_ctrl; 1063 int an_ctrl; 1064 int ret; 1065 1066 if (lsd == LINK_2500_MASTER || lsd == LINK_2500_SLAVE) 1067 /* Switch to 2.5 Gbps */ 1068 ret = lan743x_sgmii_2_5G_mode_set(adapter, true); 1069 else 1070 /* Switch to 10/100/1000 Mbps clock */ 1071 ret = lan743x_sgmii_2_5G_mode_set(adapter, false); 1072 if (ret < 0) 1073 return ret; 1074 1075 /* Enable SGMII Auto NEG */ 1076 mii_ctrl = lan743x_sgmii_read(adapter, MDIO_MMD_VEND2, MII_BMCR); 1077 if (mii_ctrl < 0) 1078 return mii_ctrl; 1079 1080 an_ctrl = lan743x_sgmii_read(adapter, MDIO_MMD_VEND2, VR_MII_AN_CTRL); 1081 if (an_ctrl < 0) 1082 return an_ctrl; 1083 1084 dgt_ctrl = lan743x_sgmii_read(adapter, MDIO_MMD_VEND2, 1085 VR_MII_DIG_CTRL1); 1086 if (dgt_ctrl < 0) 1087 return dgt_ctrl; 1088 1089 if (lsd == LINK_2500_MASTER || lsd == LINK_2500_SLAVE) { 1090 mii_ctrl &= ~(BMCR_ANENABLE | BMCR_ANRESTART | BMCR_SPEED100); 1091 mii_ctrl |= BMCR_SPEED1000; 1092 dgt_ctrl |= VR_MII_DIG_CTRL1_CL37_TMR_OVR_RIDE_; 1093 dgt_ctrl &= ~VR_MII_DIG_CTRL1_MAC_AUTO_SW_; 1094 /* In order for Auto-Negotiation to operate properly at 1095 * 2.5 Gbps the 1.6ms link timer values must be adjusted 1096 * The VR_MII_LINK_TIMER_CTRL Register must be set to 1097 * 16'h7A1 and The CL37_TMR_OVR_RIDE bit of the 1098 * VR_MII_DIG_CTRL1 Register set to 1 1099 */ 1100 ret = lan743x_sgmii_write(adapter, MDIO_MMD_VEND2, 1101 VR_MII_LINK_TIMER_CTRL, 0x7A1); 1102 if (ret < 0) 1103 return ret; 1104 } else { 1105 mii_ctrl |= (BMCR_ANENABLE | BMCR_ANRESTART); 1106 an_ctrl &= ~VR_MII_AN_CTRL_SGMII_LINK_STS_; 1107 dgt_ctrl &= ~VR_MII_DIG_CTRL1_CL37_TMR_OVR_RIDE_; 1108 dgt_ctrl |= VR_MII_DIG_CTRL1_MAC_AUTO_SW_; 1109 } 1110 1111 ret = lan743x_sgmii_write(adapter, MDIO_MMD_VEND2, MII_BMCR, 1112 mii_ctrl); 1113 if (ret < 0) 1114 return ret; 1115 1116 ret = lan743x_sgmii_write(adapter, MDIO_MMD_VEND2, 1117 VR_MII_DIG_CTRL1, dgt_ctrl); 1118 if (ret < 0) 1119 return ret; 1120 1121 return lan743x_sgmii_write(adapter, MDIO_MMD_VEND2, 1122 VR_MII_AN_CTRL, an_ctrl); 1123 } 1124 1125 static int lan743x_pcs_seq_state(struct lan743x_adapter *adapter, u8 state) 1126 { 1127 u8 wait_cnt = 0; 1128 u32 dig_sts; 1129 1130 do { 1131 dig_sts = lan743x_sgmii_read(adapter, MDIO_MMD_VEND2, 1132 VR_MII_DIG_STS); 1133 if (((dig_sts & VR_MII_DIG_STS_PSEQ_STATE_MASK_) >> 1134 VR_MII_DIG_STS_PSEQ_STATE_POS_) == state) 1135 break; 1136 usleep_range(1000, 2000); 1137 } while (wait_cnt++ < 10); 1138 1139 if (wait_cnt >= 10) 1140 return -ETIMEDOUT; 1141 1142 return 0; 1143 } 1144 1145 static int lan743x_sgmii_config(struct lan743x_adapter *adapter) 1146 { 1147 struct net_device *netdev = adapter->netdev; 1148 struct phy_device *phydev = netdev->phydev; 1149 enum lan743x_sgmii_lsd lsd = POWER_DOWN; 1150 int mii_ctl; 1151 bool status; 1152 int ret; 1153 1154 switch (phydev->speed) { 1155 case SPEED_2500: 1156 if (phydev->master_slave_state == MASTER_SLAVE_STATE_MASTER) 1157 lsd = LINK_2500_MASTER; 1158 else 1159 lsd = LINK_2500_SLAVE; 1160 break; 1161 case SPEED_1000: 1162 if (phydev->master_slave_state == MASTER_SLAVE_STATE_MASTER) 1163 lsd = LINK_1000_MASTER; 1164 else 1165 lsd = LINK_1000_SLAVE; 1166 break; 1167 case SPEED_100: 1168 if (phydev->duplex) 1169 lsd = LINK_100FD; 1170 else 1171 lsd = LINK_100HD; 1172 break; 1173 case SPEED_10: 1174 if (phydev->duplex) 1175 lsd = LINK_10FD; 1176 else 1177 lsd = LINK_10HD; 1178 break; 1179 default: 1180 netif_err(adapter, drv, adapter->netdev, 1181 "Invalid speed %d\n", phydev->speed); 1182 return -EINVAL; 1183 } 1184 1185 adapter->sgmii_lsd = lsd; 1186 ret = lan743x_sgmii_aneg_update(adapter); 1187 if (ret < 0) { 1188 netif_err(adapter, drv, adapter->netdev, 1189 "error %d SGMII cfg failed\n", ret); 1190 return ret; 1191 } 1192 1193 ret = lan743x_is_sgmii_2_5G_mode(adapter, &status); 1194 if (ret < 0) { 1195 netif_err(adapter, drv, adapter->netdev, 1196 "erro %d SGMII get mode failed\n", ret); 1197 return ret; 1198 } 1199 1200 if (status) 1201 netif_dbg(adapter, drv, adapter->netdev, 1202 "SGMII 2.5G mode enable\n"); 1203 else 1204 netif_dbg(adapter, drv, adapter->netdev, 1205 "SGMII 1G mode enable\n"); 1206 1207 /* SGMII/1000/2500BASE-X PCS power down */ 1208 mii_ctl = lan743x_sgmii_read(adapter, MDIO_MMD_VEND2, MII_BMCR); 1209 if (mii_ctl < 0) 1210 return mii_ctl; 1211 1212 mii_ctl |= BMCR_PDOWN; 1213 ret = lan743x_sgmii_write(adapter, MDIO_MMD_VEND2, MII_BMCR, mii_ctl); 1214 if (ret < 0) 1215 return ret; 1216 1217 ret = lan743x_pcs_seq_state(adapter, PCS_POWER_STATE_DOWN); 1218 if (ret < 0) 1219 return ret; 1220 1221 /* SGMII/1000/2500BASE-X PCS power up */ 1222 mii_ctl &= ~BMCR_PDOWN; 1223 ret = lan743x_sgmii_write(adapter, MDIO_MMD_VEND2, MII_BMCR, mii_ctl); 1224 if (ret < 0) 1225 return ret; 1226 1227 ret = lan743x_pcs_seq_state(adapter, PCS_POWER_STATE_UP); 1228 if (ret < 0) 1229 return ret; 1230 1231 return 0; 1232 } 1233 1234 static void lan743x_mac_set_address(struct lan743x_adapter *adapter, 1235 u8 *addr) 1236 { 1237 u32 addr_lo, addr_hi; 1238 1239 addr_lo = addr[0] | 1240 addr[1] << 8 | 1241 addr[2] << 16 | 1242 addr[3] << 24; 1243 addr_hi = addr[4] | 1244 addr[5] << 8; 1245 lan743x_csr_write(adapter, MAC_RX_ADDRL, addr_lo); 1246 lan743x_csr_write(adapter, MAC_RX_ADDRH, addr_hi); 1247 1248 ether_addr_copy(adapter->mac_address, addr); 1249 netif_info(adapter, drv, adapter->netdev, 1250 "MAC address set to %pM\n", addr); 1251 } 1252 1253 static int lan743x_mac_init(struct lan743x_adapter *adapter) 1254 { 1255 bool mac_address_valid = true; 1256 struct net_device *netdev; 1257 u32 mac_addr_hi = 0; 1258 u32 mac_addr_lo = 0; 1259 u32 data; 1260 1261 netdev = adapter->netdev; 1262 1263 /* disable auto duplex, and speed detection. Phylib does that */ 1264 data = lan743x_csr_read(adapter, MAC_CR); 1265 data &= ~(MAC_CR_ADD_ | MAC_CR_ASD_); 1266 data |= MAC_CR_CNTR_RST_; 1267 lan743x_csr_write(adapter, MAC_CR, data); 1268 1269 if (!is_valid_ether_addr(adapter->mac_address)) { 1270 mac_addr_hi = lan743x_csr_read(adapter, MAC_RX_ADDRH); 1271 mac_addr_lo = lan743x_csr_read(adapter, MAC_RX_ADDRL); 1272 adapter->mac_address[0] = mac_addr_lo & 0xFF; 1273 adapter->mac_address[1] = (mac_addr_lo >> 8) & 0xFF; 1274 adapter->mac_address[2] = (mac_addr_lo >> 16) & 0xFF; 1275 adapter->mac_address[3] = (mac_addr_lo >> 24) & 0xFF; 1276 adapter->mac_address[4] = mac_addr_hi & 0xFF; 1277 adapter->mac_address[5] = (mac_addr_hi >> 8) & 0xFF; 1278 1279 if (((mac_addr_hi & 0x0000FFFF) == 0x0000FFFF) && 1280 mac_addr_lo == 0xFFFFFFFF) { 1281 mac_address_valid = false; 1282 } else if (!is_valid_ether_addr(adapter->mac_address)) { 1283 mac_address_valid = false; 1284 } 1285 1286 if (!mac_address_valid) 1287 eth_random_addr(adapter->mac_address); 1288 } 1289 lan743x_mac_set_address(adapter, adapter->mac_address); 1290 eth_hw_addr_set(netdev, adapter->mac_address); 1291 1292 return 0; 1293 } 1294 1295 static int lan743x_mac_open(struct lan743x_adapter *adapter) 1296 { 1297 u32 temp; 1298 1299 temp = lan743x_csr_read(adapter, MAC_RX); 1300 lan743x_csr_write(adapter, MAC_RX, temp | MAC_RX_RXEN_); 1301 temp = lan743x_csr_read(adapter, MAC_TX); 1302 lan743x_csr_write(adapter, MAC_TX, temp | MAC_TX_TXEN_); 1303 return 0; 1304 } 1305 1306 static void lan743x_mac_close(struct lan743x_adapter *adapter) 1307 { 1308 u32 temp; 1309 1310 temp = lan743x_csr_read(adapter, MAC_TX); 1311 temp &= ~MAC_TX_TXEN_; 1312 lan743x_csr_write(adapter, MAC_TX, temp); 1313 lan743x_csr_wait_for_bit(adapter, MAC_TX, MAC_TX_TXD_, 1314 1, 1000, 20000, 100); 1315 1316 temp = lan743x_csr_read(adapter, MAC_RX); 1317 temp &= ~MAC_RX_RXEN_; 1318 lan743x_csr_write(adapter, MAC_RX, temp); 1319 lan743x_csr_wait_for_bit(adapter, MAC_RX, MAC_RX_RXD_, 1320 1, 1000, 20000, 100); 1321 } 1322 1323 void lan743x_mac_flow_ctrl_set_enables(struct lan743x_adapter *adapter, 1324 bool tx_enable, bool rx_enable) 1325 { 1326 u32 flow_setting = 0; 1327 1328 /* set maximum pause time because when fifo space frees 1329 * up a zero value pause frame will be sent to release the pause 1330 */ 1331 flow_setting = MAC_FLOW_CR_FCPT_MASK_; 1332 if (tx_enable) 1333 flow_setting |= MAC_FLOW_CR_TX_FCEN_; 1334 if (rx_enable) 1335 flow_setting |= MAC_FLOW_CR_RX_FCEN_; 1336 lan743x_csr_write(adapter, MAC_FLOW, flow_setting); 1337 } 1338 1339 static int lan743x_mac_set_mtu(struct lan743x_adapter *adapter, int new_mtu) 1340 { 1341 int enabled = 0; 1342 u32 mac_rx = 0; 1343 1344 mac_rx = lan743x_csr_read(adapter, MAC_RX); 1345 if (mac_rx & MAC_RX_RXEN_) { 1346 enabled = 1; 1347 if (mac_rx & MAC_RX_RXD_) { 1348 lan743x_csr_write(adapter, MAC_RX, mac_rx); 1349 mac_rx &= ~MAC_RX_RXD_; 1350 } 1351 mac_rx &= ~MAC_RX_RXEN_; 1352 lan743x_csr_write(adapter, MAC_RX, mac_rx); 1353 lan743x_csr_wait_for_bit(adapter, MAC_RX, MAC_RX_RXD_, 1354 1, 1000, 20000, 100); 1355 lan743x_csr_write(adapter, MAC_RX, mac_rx | MAC_RX_RXD_); 1356 } 1357 1358 mac_rx &= ~(MAC_RX_MAX_SIZE_MASK_); 1359 mac_rx |= (((new_mtu + ETH_HLEN + ETH_FCS_LEN) 1360 << MAC_RX_MAX_SIZE_SHIFT_) & MAC_RX_MAX_SIZE_MASK_); 1361 lan743x_csr_write(adapter, MAC_RX, mac_rx); 1362 1363 if (enabled) { 1364 mac_rx |= MAC_RX_RXEN_; 1365 lan743x_csr_write(adapter, MAC_RX, mac_rx); 1366 } 1367 return 0; 1368 } 1369 1370 /* PHY */ 1371 static int lan743x_phy_reset(struct lan743x_adapter *adapter) 1372 { 1373 u32 data; 1374 1375 /* Only called with in probe, and before mdiobus_register */ 1376 1377 data = lan743x_csr_read(adapter, PMT_CTL); 1378 data |= PMT_CTL_ETH_PHY_RST_; 1379 lan743x_csr_write(adapter, PMT_CTL, data); 1380 1381 return readx_poll_timeout(LAN743X_CSR_READ_OP, PMT_CTL, data, 1382 (!(data & PMT_CTL_ETH_PHY_RST_) && 1383 (data & PMT_CTL_READY_)), 1384 50000, 1000000); 1385 } 1386 1387 static void lan743x_phy_update_flowcontrol(struct lan743x_adapter *adapter, 1388 u16 local_adv, u16 remote_adv) 1389 { 1390 struct lan743x_phy *phy = &adapter->phy; 1391 u8 cap; 1392 1393 if (phy->fc_autoneg) 1394 cap = mii_resolve_flowctrl_fdx(local_adv, remote_adv); 1395 else 1396 cap = phy->fc_request_control; 1397 1398 lan743x_mac_flow_ctrl_set_enables(adapter, 1399 cap & FLOW_CTRL_TX, 1400 cap & FLOW_CTRL_RX); 1401 } 1402 1403 static int lan743x_phy_init(struct lan743x_adapter *adapter) 1404 { 1405 return lan743x_phy_reset(adapter); 1406 } 1407 1408 static void lan743x_phy_link_status_change(struct net_device *netdev) 1409 { 1410 struct lan743x_adapter *adapter = netdev_priv(netdev); 1411 struct phy_device *phydev = netdev->phydev; 1412 u32 data; 1413 1414 phy_print_status(phydev); 1415 if (phydev->state == PHY_RUNNING) { 1416 int remote_advertisement = 0; 1417 int local_advertisement = 0; 1418 1419 data = lan743x_csr_read(adapter, MAC_CR); 1420 1421 /* set duplex mode */ 1422 if (phydev->duplex) 1423 data |= MAC_CR_DPX_; 1424 else 1425 data &= ~MAC_CR_DPX_; 1426 1427 /* set bus speed */ 1428 switch (phydev->speed) { 1429 case SPEED_10: 1430 data &= ~MAC_CR_CFG_H_; 1431 data &= ~MAC_CR_CFG_L_; 1432 break; 1433 case SPEED_100: 1434 data &= ~MAC_CR_CFG_H_; 1435 data |= MAC_CR_CFG_L_; 1436 break; 1437 case SPEED_1000: 1438 data |= MAC_CR_CFG_H_; 1439 data &= ~MAC_CR_CFG_L_; 1440 break; 1441 case SPEED_2500: 1442 data |= MAC_CR_CFG_H_; 1443 data |= MAC_CR_CFG_L_; 1444 break; 1445 } 1446 lan743x_csr_write(adapter, MAC_CR, data); 1447 1448 local_advertisement = 1449 linkmode_adv_to_mii_adv_t(phydev->advertising); 1450 remote_advertisement = 1451 linkmode_adv_to_mii_adv_t(phydev->lp_advertising); 1452 1453 lan743x_phy_update_flowcontrol(adapter, local_advertisement, 1454 remote_advertisement); 1455 lan743x_ptp_update_latency(adapter, phydev->speed); 1456 if (phydev->interface == PHY_INTERFACE_MODE_SGMII || 1457 phydev->interface == PHY_INTERFACE_MODE_1000BASEX || 1458 phydev->interface == PHY_INTERFACE_MODE_2500BASEX) 1459 lan743x_sgmii_config(adapter); 1460 } 1461 } 1462 1463 static void lan743x_phy_close(struct lan743x_adapter *adapter) 1464 { 1465 struct net_device *netdev = adapter->netdev; 1466 1467 phy_stop(netdev->phydev); 1468 phy_disconnect(netdev->phydev); 1469 } 1470 1471 static void lan743x_phy_interface_select(struct lan743x_adapter *adapter) 1472 { 1473 u32 id_rev; 1474 u32 data; 1475 1476 data = lan743x_csr_read(adapter, MAC_CR); 1477 id_rev = adapter->csr.id_rev & ID_REV_ID_MASK_; 1478 1479 if (adapter->is_pci11x1x && adapter->is_sgmii_en) 1480 adapter->phy_interface = PHY_INTERFACE_MODE_SGMII; 1481 else if (id_rev == ID_REV_ID_LAN7430_) 1482 adapter->phy_interface = PHY_INTERFACE_MODE_GMII; 1483 else if ((id_rev == ID_REV_ID_LAN7431_) && (data & MAC_CR_MII_EN_)) 1484 adapter->phy_interface = PHY_INTERFACE_MODE_MII; 1485 else 1486 adapter->phy_interface = PHY_INTERFACE_MODE_RGMII; 1487 } 1488 1489 static int lan743x_phy_open(struct lan743x_adapter *adapter) 1490 { 1491 struct net_device *netdev = adapter->netdev; 1492 struct lan743x_phy *phy = &adapter->phy; 1493 struct fixed_phy_status fphy_status = { 1494 .link = 1, 1495 .speed = SPEED_1000, 1496 .duplex = DUPLEX_FULL, 1497 }; 1498 struct phy_device *phydev; 1499 int ret = -EIO; 1500 1501 /* try devicetree phy, or fixed link */ 1502 phydev = of_phy_get_and_connect(netdev, adapter->pdev->dev.of_node, 1503 lan743x_phy_link_status_change); 1504 1505 if (!phydev) { 1506 /* try internal phy */ 1507 phydev = phy_find_first(adapter->mdiobus); 1508 if (!phydev) { 1509 if ((adapter->csr.id_rev & ID_REV_ID_MASK_) == 1510 ID_REV_ID_LAN7431_) { 1511 phydev = fixed_phy_register(PHY_POLL, 1512 &fphy_status, NULL); 1513 if (IS_ERR(phydev)) { 1514 netdev_err(netdev, "No PHY/fixed_PHY found\n"); 1515 return -EIO; 1516 } 1517 } else { 1518 goto return_error; 1519 } 1520 } 1521 1522 lan743x_phy_interface_select(adapter); 1523 1524 ret = phy_connect_direct(netdev, phydev, 1525 lan743x_phy_link_status_change, 1526 adapter->phy_interface); 1527 if (ret) 1528 goto return_error; 1529 } 1530 1531 /* MAC doesn't support 1000T Half */ 1532 phy_remove_link_mode(phydev, ETHTOOL_LINK_MODE_1000baseT_Half_BIT); 1533 1534 /* support both flow controls */ 1535 phy_support_asym_pause(phydev); 1536 phy->fc_request_control = (FLOW_CTRL_RX | FLOW_CTRL_TX); 1537 phy->fc_autoneg = phydev->autoneg; 1538 1539 phy_start(phydev); 1540 phy_start_aneg(phydev); 1541 phy_attached_info(phydev); 1542 return 0; 1543 1544 return_error: 1545 return ret; 1546 } 1547 1548 static void lan743x_rfe_open(struct lan743x_adapter *adapter) 1549 { 1550 lan743x_csr_write(adapter, RFE_RSS_CFG, 1551 RFE_RSS_CFG_UDP_IPV6_EX_ | 1552 RFE_RSS_CFG_TCP_IPV6_EX_ | 1553 RFE_RSS_CFG_IPV6_EX_ | 1554 RFE_RSS_CFG_UDP_IPV6_ | 1555 RFE_RSS_CFG_TCP_IPV6_ | 1556 RFE_RSS_CFG_IPV6_ | 1557 RFE_RSS_CFG_UDP_IPV4_ | 1558 RFE_RSS_CFG_TCP_IPV4_ | 1559 RFE_RSS_CFG_IPV4_ | 1560 RFE_RSS_CFG_VALID_HASH_BITS_ | 1561 RFE_RSS_CFG_RSS_QUEUE_ENABLE_ | 1562 RFE_RSS_CFG_RSS_HASH_STORE_ | 1563 RFE_RSS_CFG_RSS_ENABLE_); 1564 } 1565 1566 static void lan743x_rfe_update_mac_address(struct lan743x_adapter *adapter) 1567 { 1568 u8 *mac_addr; 1569 u32 mac_addr_hi = 0; 1570 u32 mac_addr_lo = 0; 1571 1572 /* Add mac address to perfect Filter */ 1573 mac_addr = adapter->mac_address; 1574 mac_addr_lo = ((((u32)(mac_addr[0])) << 0) | 1575 (((u32)(mac_addr[1])) << 8) | 1576 (((u32)(mac_addr[2])) << 16) | 1577 (((u32)(mac_addr[3])) << 24)); 1578 mac_addr_hi = ((((u32)(mac_addr[4])) << 0) | 1579 (((u32)(mac_addr[5])) << 8)); 1580 1581 lan743x_csr_write(adapter, RFE_ADDR_FILT_LO(0), mac_addr_lo); 1582 lan743x_csr_write(adapter, RFE_ADDR_FILT_HI(0), 1583 mac_addr_hi | RFE_ADDR_FILT_HI_VALID_); 1584 } 1585 1586 static void lan743x_rfe_set_multicast(struct lan743x_adapter *adapter) 1587 { 1588 struct net_device *netdev = adapter->netdev; 1589 u32 hash_table[DP_SEL_VHF_HASH_LEN]; 1590 u32 rfctl; 1591 u32 data; 1592 1593 rfctl = lan743x_csr_read(adapter, RFE_CTL); 1594 rfctl &= ~(RFE_CTL_AU_ | RFE_CTL_AM_ | 1595 RFE_CTL_DA_PERFECT_ | RFE_CTL_MCAST_HASH_); 1596 rfctl |= RFE_CTL_AB_; 1597 if (netdev->flags & IFF_PROMISC) { 1598 rfctl |= RFE_CTL_AM_ | RFE_CTL_AU_; 1599 } else { 1600 if (netdev->flags & IFF_ALLMULTI) 1601 rfctl |= RFE_CTL_AM_; 1602 } 1603 1604 if (netdev->features & NETIF_F_RXCSUM) 1605 rfctl |= RFE_CTL_IP_COE_ | RFE_CTL_TCP_UDP_COE_; 1606 1607 memset(hash_table, 0, DP_SEL_VHF_HASH_LEN * sizeof(u32)); 1608 if (netdev_mc_count(netdev)) { 1609 struct netdev_hw_addr *ha; 1610 int i; 1611 1612 rfctl |= RFE_CTL_DA_PERFECT_; 1613 i = 1; 1614 netdev_for_each_mc_addr(ha, netdev) { 1615 /* set first 32 into Perfect Filter */ 1616 if (i < 33) { 1617 lan743x_csr_write(adapter, 1618 RFE_ADDR_FILT_HI(i), 0); 1619 data = ha->addr[3]; 1620 data = ha->addr[2] | (data << 8); 1621 data = ha->addr[1] | (data << 8); 1622 data = ha->addr[0] | (data << 8); 1623 lan743x_csr_write(adapter, 1624 RFE_ADDR_FILT_LO(i), data); 1625 data = ha->addr[5]; 1626 data = ha->addr[4] | (data << 8); 1627 data |= RFE_ADDR_FILT_HI_VALID_; 1628 lan743x_csr_write(adapter, 1629 RFE_ADDR_FILT_HI(i), data); 1630 } else { 1631 u32 bitnum = (ether_crc(ETH_ALEN, ha->addr) >> 1632 23) & 0x1FF; 1633 hash_table[bitnum / 32] |= (1 << (bitnum % 32)); 1634 rfctl |= RFE_CTL_MCAST_HASH_; 1635 } 1636 i++; 1637 } 1638 } 1639 1640 lan743x_dp_write(adapter, DP_SEL_RFE_RAM, 1641 DP_SEL_VHF_VLAN_LEN, 1642 DP_SEL_VHF_HASH_LEN, hash_table); 1643 lan743x_csr_write(adapter, RFE_CTL, rfctl); 1644 } 1645 1646 static int lan743x_dmac_init(struct lan743x_adapter *adapter) 1647 { 1648 u32 data = 0; 1649 1650 lan743x_csr_write(adapter, DMAC_CMD, DMAC_CMD_SWR_); 1651 lan743x_csr_wait_for_bit(adapter, DMAC_CMD, DMAC_CMD_SWR_, 1652 0, 1000, 20000, 100); 1653 switch (DEFAULT_DMA_DESCRIPTOR_SPACING) { 1654 case DMA_DESCRIPTOR_SPACING_16: 1655 data = DMAC_CFG_MAX_DSPACE_16_; 1656 break; 1657 case DMA_DESCRIPTOR_SPACING_32: 1658 data = DMAC_CFG_MAX_DSPACE_32_; 1659 break; 1660 case DMA_DESCRIPTOR_SPACING_64: 1661 data = DMAC_CFG_MAX_DSPACE_64_; 1662 break; 1663 case DMA_DESCRIPTOR_SPACING_128: 1664 data = DMAC_CFG_MAX_DSPACE_128_; 1665 break; 1666 default: 1667 return -EPERM; 1668 } 1669 if (!(adapter->csr.flags & LAN743X_CSR_FLAG_IS_A0)) 1670 data |= DMAC_CFG_COAL_EN_; 1671 data |= DMAC_CFG_CH_ARB_SEL_RX_HIGH_; 1672 data |= DMAC_CFG_MAX_READ_REQ_SET_(6); 1673 lan743x_csr_write(adapter, DMAC_CFG, data); 1674 data = DMAC_COAL_CFG_TIMER_LIMIT_SET_(1); 1675 data |= DMAC_COAL_CFG_TIMER_TX_START_; 1676 data |= DMAC_COAL_CFG_FLUSH_INTS_; 1677 data |= DMAC_COAL_CFG_INT_EXIT_COAL_; 1678 data |= DMAC_COAL_CFG_CSR_EXIT_COAL_; 1679 data |= DMAC_COAL_CFG_TX_THRES_SET_(0x0A); 1680 data |= DMAC_COAL_CFG_RX_THRES_SET_(0x0C); 1681 lan743x_csr_write(adapter, DMAC_COAL_CFG, data); 1682 data = DMAC_OBFF_TX_THRES_SET_(0x08); 1683 data |= DMAC_OBFF_RX_THRES_SET_(0x0A); 1684 lan743x_csr_write(adapter, DMAC_OBFF_CFG, data); 1685 return 0; 1686 } 1687 1688 static int lan743x_dmac_tx_get_state(struct lan743x_adapter *adapter, 1689 int tx_channel) 1690 { 1691 u32 dmac_cmd = 0; 1692 1693 dmac_cmd = lan743x_csr_read(adapter, DMAC_CMD); 1694 return DMAC_CHANNEL_STATE_SET((dmac_cmd & 1695 DMAC_CMD_START_T_(tx_channel)), 1696 (dmac_cmd & 1697 DMAC_CMD_STOP_T_(tx_channel))); 1698 } 1699 1700 static int lan743x_dmac_tx_wait_till_stopped(struct lan743x_adapter *adapter, 1701 int tx_channel) 1702 { 1703 int timeout = 100; 1704 int result = 0; 1705 1706 while (timeout && 1707 ((result = lan743x_dmac_tx_get_state(adapter, tx_channel)) == 1708 DMAC_CHANNEL_STATE_STOP_PENDING)) { 1709 usleep_range(1000, 20000); 1710 timeout--; 1711 } 1712 if (result == DMAC_CHANNEL_STATE_STOP_PENDING) 1713 result = -ENODEV; 1714 return result; 1715 } 1716 1717 static int lan743x_dmac_rx_get_state(struct lan743x_adapter *adapter, 1718 int rx_channel) 1719 { 1720 u32 dmac_cmd = 0; 1721 1722 dmac_cmd = lan743x_csr_read(adapter, DMAC_CMD); 1723 return DMAC_CHANNEL_STATE_SET((dmac_cmd & 1724 DMAC_CMD_START_R_(rx_channel)), 1725 (dmac_cmd & 1726 DMAC_CMD_STOP_R_(rx_channel))); 1727 } 1728 1729 static int lan743x_dmac_rx_wait_till_stopped(struct lan743x_adapter *adapter, 1730 int rx_channel) 1731 { 1732 int timeout = 100; 1733 int result = 0; 1734 1735 while (timeout && 1736 ((result = lan743x_dmac_rx_get_state(adapter, rx_channel)) == 1737 DMAC_CHANNEL_STATE_STOP_PENDING)) { 1738 usleep_range(1000, 20000); 1739 timeout--; 1740 } 1741 if (result == DMAC_CHANNEL_STATE_STOP_PENDING) 1742 result = -ENODEV; 1743 return result; 1744 } 1745 1746 static void lan743x_tx_release_desc(struct lan743x_tx *tx, 1747 int descriptor_index, bool cleanup) 1748 { 1749 struct lan743x_tx_buffer_info *buffer_info = NULL; 1750 struct lan743x_tx_descriptor *descriptor = NULL; 1751 u32 descriptor_type = 0; 1752 bool ignore_sync; 1753 1754 descriptor = &tx->ring_cpu_ptr[descriptor_index]; 1755 buffer_info = &tx->buffer_info[descriptor_index]; 1756 if (!(buffer_info->flags & TX_BUFFER_INFO_FLAG_ACTIVE)) 1757 goto done; 1758 1759 descriptor_type = le32_to_cpu(descriptor->data0) & 1760 TX_DESC_DATA0_DTYPE_MASK_; 1761 if (descriptor_type == TX_DESC_DATA0_DTYPE_DATA_) 1762 goto clean_up_data_descriptor; 1763 else 1764 goto clear_active; 1765 1766 clean_up_data_descriptor: 1767 if (buffer_info->dma_ptr) { 1768 if (buffer_info->flags & 1769 TX_BUFFER_INFO_FLAG_SKB_FRAGMENT) { 1770 dma_unmap_page(&tx->adapter->pdev->dev, 1771 buffer_info->dma_ptr, 1772 buffer_info->buffer_length, 1773 DMA_TO_DEVICE); 1774 } else { 1775 dma_unmap_single(&tx->adapter->pdev->dev, 1776 buffer_info->dma_ptr, 1777 buffer_info->buffer_length, 1778 DMA_TO_DEVICE); 1779 } 1780 buffer_info->dma_ptr = 0; 1781 buffer_info->buffer_length = 0; 1782 } 1783 if (!buffer_info->skb) 1784 goto clear_active; 1785 1786 if (!(buffer_info->flags & TX_BUFFER_INFO_FLAG_TIMESTAMP_REQUESTED)) { 1787 dev_kfree_skb_any(buffer_info->skb); 1788 goto clear_skb; 1789 } 1790 1791 if (cleanup) { 1792 lan743x_ptp_unrequest_tx_timestamp(tx->adapter); 1793 dev_kfree_skb_any(buffer_info->skb); 1794 } else { 1795 ignore_sync = (buffer_info->flags & 1796 TX_BUFFER_INFO_FLAG_IGNORE_SYNC) != 0; 1797 lan743x_ptp_tx_timestamp_skb(tx->adapter, 1798 buffer_info->skb, ignore_sync); 1799 } 1800 1801 clear_skb: 1802 buffer_info->skb = NULL; 1803 1804 clear_active: 1805 buffer_info->flags &= ~TX_BUFFER_INFO_FLAG_ACTIVE; 1806 1807 done: 1808 memset(buffer_info, 0, sizeof(*buffer_info)); 1809 memset(descriptor, 0, sizeof(*descriptor)); 1810 } 1811 1812 static int lan743x_tx_next_index(struct lan743x_tx *tx, int index) 1813 { 1814 return ((++index) % tx->ring_size); 1815 } 1816 1817 static void lan743x_tx_release_completed_descriptors(struct lan743x_tx *tx) 1818 { 1819 while (le32_to_cpu(*tx->head_cpu_ptr) != (tx->last_head)) { 1820 lan743x_tx_release_desc(tx, tx->last_head, false); 1821 tx->last_head = lan743x_tx_next_index(tx, tx->last_head); 1822 } 1823 } 1824 1825 static void lan743x_tx_release_all_descriptors(struct lan743x_tx *tx) 1826 { 1827 u32 original_head = 0; 1828 1829 original_head = tx->last_head; 1830 do { 1831 lan743x_tx_release_desc(tx, tx->last_head, true); 1832 tx->last_head = lan743x_tx_next_index(tx, tx->last_head); 1833 } while (tx->last_head != original_head); 1834 memset(tx->ring_cpu_ptr, 0, 1835 sizeof(*tx->ring_cpu_ptr) * (tx->ring_size)); 1836 memset(tx->buffer_info, 0, 1837 sizeof(*tx->buffer_info) * (tx->ring_size)); 1838 } 1839 1840 static int lan743x_tx_get_desc_cnt(struct lan743x_tx *tx, 1841 struct sk_buff *skb) 1842 { 1843 int result = 1; /* 1 for the main skb buffer */ 1844 int nr_frags = 0; 1845 1846 if (skb_is_gso(skb)) 1847 result++; /* requires an extension descriptor */ 1848 nr_frags = skb_shinfo(skb)->nr_frags; 1849 result += nr_frags; /* 1 for each fragment buffer */ 1850 return result; 1851 } 1852 1853 static int lan743x_tx_get_avail_desc(struct lan743x_tx *tx) 1854 { 1855 int last_head = tx->last_head; 1856 int last_tail = tx->last_tail; 1857 1858 if (last_tail >= last_head) 1859 return tx->ring_size - last_tail + last_head - 1; 1860 else 1861 return last_head - last_tail - 1; 1862 } 1863 1864 void lan743x_tx_set_timestamping_mode(struct lan743x_tx *tx, 1865 bool enable_timestamping, 1866 bool enable_onestep_sync) 1867 { 1868 if (enable_timestamping) 1869 tx->ts_flags |= TX_TS_FLAG_TIMESTAMPING_ENABLED; 1870 else 1871 tx->ts_flags &= ~TX_TS_FLAG_TIMESTAMPING_ENABLED; 1872 if (enable_onestep_sync) 1873 tx->ts_flags |= TX_TS_FLAG_ONE_STEP_SYNC; 1874 else 1875 tx->ts_flags &= ~TX_TS_FLAG_ONE_STEP_SYNC; 1876 } 1877 1878 static int lan743x_tx_frame_start(struct lan743x_tx *tx, 1879 unsigned char *first_buffer, 1880 unsigned int first_buffer_length, 1881 unsigned int frame_length, 1882 bool time_stamp, 1883 bool check_sum) 1884 { 1885 /* called only from within lan743x_tx_xmit_frame. 1886 * assuming tx->ring_lock has already been acquired. 1887 */ 1888 struct lan743x_tx_descriptor *tx_descriptor = NULL; 1889 struct lan743x_tx_buffer_info *buffer_info = NULL; 1890 struct lan743x_adapter *adapter = tx->adapter; 1891 struct device *dev = &adapter->pdev->dev; 1892 dma_addr_t dma_ptr; 1893 1894 tx->frame_flags |= TX_FRAME_FLAG_IN_PROGRESS; 1895 tx->frame_first = tx->last_tail; 1896 tx->frame_tail = tx->frame_first; 1897 1898 tx_descriptor = &tx->ring_cpu_ptr[tx->frame_tail]; 1899 buffer_info = &tx->buffer_info[tx->frame_tail]; 1900 dma_ptr = dma_map_single(dev, first_buffer, first_buffer_length, 1901 DMA_TO_DEVICE); 1902 if (dma_mapping_error(dev, dma_ptr)) 1903 return -ENOMEM; 1904 1905 tx_descriptor->data1 = cpu_to_le32(DMA_ADDR_LOW32(dma_ptr)); 1906 tx_descriptor->data2 = cpu_to_le32(DMA_ADDR_HIGH32(dma_ptr)); 1907 tx_descriptor->data3 = cpu_to_le32((frame_length << 16) & 1908 TX_DESC_DATA3_FRAME_LENGTH_MSS_MASK_); 1909 1910 buffer_info->skb = NULL; 1911 buffer_info->dma_ptr = dma_ptr; 1912 buffer_info->buffer_length = first_buffer_length; 1913 buffer_info->flags |= TX_BUFFER_INFO_FLAG_ACTIVE; 1914 1915 tx->frame_data0 = (first_buffer_length & 1916 TX_DESC_DATA0_BUF_LENGTH_MASK_) | 1917 TX_DESC_DATA0_DTYPE_DATA_ | 1918 TX_DESC_DATA0_FS_ | 1919 TX_DESC_DATA0_FCS_; 1920 if (time_stamp) 1921 tx->frame_data0 |= TX_DESC_DATA0_TSE_; 1922 1923 if (check_sum) 1924 tx->frame_data0 |= TX_DESC_DATA0_ICE_ | 1925 TX_DESC_DATA0_IPE_ | 1926 TX_DESC_DATA0_TPE_; 1927 1928 /* data0 will be programmed in one of other frame assembler functions */ 1929 return 0; 1930 } 1931 1932 static void lan743x_tx_frame_add_lso(struct lan743x_tx *tx, 1933 unsigned int frame_length, 1934 int nr_frags) 1935 { 1936 /* called only from within lan743x_tx_xmit_frame. 1937 * assuming tx->ring_lock has already been acquired. 1938 */ 1939 struct lan743x_tx_descriptor *tx_descriptor = NULL; 1940 struct lan743x_tx_buffer_info *buffer_info = NULL; 1941 1942 /* wrap up previous descriptor */ 1943 tx->frame_data0 |= TX_DESC_DATA0_EXT_; 1944 if (nr_frags <= 0) { 1945 tx->frame_data0 |= TX_DESC_DATA0_LS_; 1946 tx->frame_data0 |= TX_DESC_DATA0_IOC_; 1947 } 1948 tx_descriptor = &tx->ring_cpu_ptr[tx->frame_tail]; 1949 tx_descriptor->data0 = cpu_to_le32(tx->frame_data0); 1950 1951 /* move to next descriptor */ 1952 tx->frame_tail = lan743x_tx_next_index(tx, tx->frame_tail); 1953 tx_descriptor = &tx->ring_cpu_ptr[tx->frame_tail]; 1954 buffer_info = &tx->buffer_info[tx->frame_tail]; 1955 1956 /* add extension descriptor */ 1957 tx_descriptor->data1 = 0; 1958 tx_descriptor->data2 = 0; 1959 tx_descriptor->data3 = 0; 1960 1961 buffer_info->skb = NULL; 1962 buffer_info->dma_ptr = 0; 1963 buffer_info->buffer_length = 0; 1964 buffer_info->flags |= TX_BUFFER_INFO_FLAG_ACTIVE; 1965 1966 tx->frame_data0 = (frame_length & TX_DESC_DATA0_EXT_PAY_LENGTH_MASK_) | 1967 TX_DESC_DATA0_DTYPE_EXT_ | 1968 TX_DESC_DATA0_EXT_LSO_; 1969 1970 /* data0 will be programmed in one of other frame assembler functions */ 1971 } 1972 1973 static int lan743x_tx_frame_add_fragment(struct lan743x_tx *tx, 1974 const skb_frag_t *fragment, 1975 unsigned int frame_length) 1976 { 1977 /* called only from within lan743x_tx_xmit_frame 1978 * assuming tx->ring_lock has already been acquired 1979 */ 1980 struct lan743x_tx_descriptor *tx_descriptor = NULL; 1981 struct lan743x_tx_buffer_info *buffer_info = NULL; 1982 struct lan743x_adapter *adapter = tx->adapter; 1983 struct device *dev = &adapter->pdev->dev; 1984 unsigned int fragment_length = 0; 1985 dma_addr_t dma_ptr; 1986 1987 fragment_length = skb_frag_size(fragment); 1988 if (!fragment_length) 1989 return 0; 1990 1991 /* wrap up previous descriptor */ 1992 tx_descriptor = &tx->ring_cpu_ptr[tx->frame_tail]; 1993 tx_descriptor->data0 = cpu_to_le32(tx->frame_data0); 1994 1995 /* move to next descriptor */ 1996 tx->frame_tail = lan743x_tx_next_index(tx, tx->frame_tail); 1997 tx_descriptor = &tx->ring_cpu_ptr[tx->frame_tail]; 1998 buffer_info = &tx->buffer_info[tx->frame_tail]; 1999 dma_ptr = skb_frag_dma_map(dev, fragment, 2000 0, fragment_length, 2001 DMA_TO_DEVICE); 2002 if (dma_mapping_error(dev, dma_ptr)) { 2003 int desc_index; 2004 2005 /* cleanup all previously setup descriptors */ 2006 desc_index = tx->frame_first; 2007 while (desc_index != tx->frame_tail) { 2008 lan743x_tx_release_desc(tx, desc_index, true); 2009 desc_index = lan743x_tx_next_index(tx, desc_index); 2010 } 2011 dma_wmb(); 2012 tx->frame_flags &= ~TX_FRAME_FLAG_IN_PROGRESS; 2013 tx->frame_first = 0; 2014 tx->frame_data0 = 0; 2015 tx->frame_tail = 0; 2016 return -ENOMEM; 2017 } 2018 2019 tx_descriptor->data1 = cpu_to_le32(DMA_ADDR_LOW32(dma_ptr)); 2020 tx_descriptor->data2 = cpu_to_le32(DMA_ADDR_HIGH32(dma_ptr)); 2021 tx_descriptor->data3 = cpu_to_le32((frame_length << 16) & 2022 TX_DESC_DATA3_FRAME_LENGTH_MSS_MASK_); 2023 2024 buffer_info->skb = NULL; 2025 buffer_info->dma_ptr = dma_ptr; 2026 buffer_info->buffer_length = fragment_length; 2027 buffer_info->flags |= TX_BUFFER_INFO_FLAG_ACTIVE; 2028 buffer_info->flags |= TX_BUFFER_INFO_FLAG_SKB_FRAGMENT; 2029 2030 tx->frame_data0 = (fragment_length & TX_DESC_DATA0_BUF_LENGTH_MASK_) | 2031 TX_DESC_DATA0_DTYPE_DATA_ | 2032 TX_DESC_DATA0_FCS_; 2033 2034 /* data0 will be programmed in one of other frame assembler functions */ 2035 return 0; 2036 } 2037 2038 static void lan743x_tx_frame_end(struct lan743x_tx *tx, 2039 struct sk_buff *skb, 2040 bool time_stamp, 2041 bool ignore_sync) 2042 { 2043 /* called only from within lan743x_tx_xmit_frame 2044 * assuming tx->ring_lock has already been acquired 2045 */ 2046 struct lan743x_tx_descriptor *tx_descriptor = NULL; 2047 struct lan743x_tx_buffer_info *buffer_info = NULL; 2048 struct lan743x_adapter *adapter = tx->adapter; 2049 u32 tx_tail_flags = 0; 2050 2051 /* wrap up previous descriptor */ 2052 if ((tx->frame_data0 & TX_DESC_DATA0_DTYPE_MASK_) == 2053 TX_DESC_DATA0_DTYPE_DATA_) { 2054 tx->frame_data0 |= TX_DESC_DATA0_LS_; 2055 tx->frame_data0 |= TX_DESC_DATA0_IOC_; 2056 } 2057 2058 tx_descriptor = &tx->ring_cpu_ptr[tx->frame_tail]; 2059 buffer_info = &tx->buffer_info[tx->frame_tail]; 2060 buffer_info->skb = skb; 2061 if (time_stamp) 2062 buffer_info->flags |= TX_BUFFER_INFO_FLAG_TIMESTAMP_REQUESTED; 2063 if (ignore_sync) 2064 buffer_info->flags |= TX_BUFFER_INFO_FLAG_IGNORE_SYNC; 2065 2066 tx_descriptor->data0 = cpu_to_le32(tx->frame_data0); 2067 tx->frame_tail = lan743x_tx_next_index(tx, tx->frame_tail); 2068 tx->last_tail = tx->frame_tail; 2069 2070 dma_wmb(); 2071 2072 if (tx->vector_flags & LAN743X_VECTOR_FLAG_VECTOR_ENABLE_AUTO_SET) 2073 tx_tail_flags |= TX_TAIL_SET_TOP_INT_VEC_EN_; 2074 if (tx->vector_flags & LAN743X_VECTOR_FLAG_SOURCE_ENABLE_AUTO_SET) 2075 tx_tail_flags |= TX_TAIL_SET_DMAC_INT_EN_ | 2076 TX_TAIL_SET_TOP_INT_EN_; 2077 2078 lan743x_csr_write(adapter, TX_TAIL(tx->channel_number), 2079 tx_tail_flags | tx->frame_tail); 2080 tx->frame_flags &= ~TX_FRAME_FLAG_IN_PROGRESS; 2081 } 2082 2083 static netdev_tx_t lan743x_tx_xmit_frame(struct lan743x_tx *tx, 2084 struct sk_buff *skb) 2085 { 2086 int required_number_of_descriptors = 0; 2087 unsigned int start_frame_length = 0; 2088 netdev_tx_t retval = NETDEV_TX_OK; 2089 unsigned int frame_length = 0; 2090 unsigned int head_length = 0; 2091 unsigned long irq_flags = 0; 2092 bool do_timestamp = false; 2093 bool ignore_sync = false; 2094 struct netdev_queue *txq; 2095 int nr_frags = 0; 2096 bool gso = false; 2097 int j; 2098 2099 required_number_of_descriptors = lan743x_tx_get_desc_cnt(tx, skb); 2100 2101 spin_lock_irqsave(&tx->ring_lock, irq_flags); 2102 if (required_number_of_descriptors > 2103 lan743x_tx_get_avail_desc(tx)) { 2104 if (required_number_of_descriptors > (tx->ring_size - 1)) { 2105 dev_kfree_skb_irq(skb); 2106 } else { 2107 /* save how many descriptors we needed to restart the queue */ 2108 tx->rqd_descriptors = required_number_of_descriptors; 2109 retval = NETDEV_TX_BUSY; 2110 txq = netdev_get_tx_queue(tx->adapter->netdev, 2111 tx->channel_number); 2112 netif_tx_stop_queue(txq); 2113 } 2114 goto unlock; 2115 } 2116 2117 /* space available, transmit skb */ 2118 if ((skb_shinfo(skb)->tx_flags & SKBTX_HW_TSTAMP) && 2119 (tx->ts_flags & TX_TS_FLAG_TIMESTAMPING_ENABLED) && 2120 (lan743x_ptp_request_tx_timestamp(tx->adapter))) { 2121 skb_shinfo(skb)->tx_flags |= SKBTX_IN_PROGRESS; 2122 do_timestamp = true; 2123 if (tx->ts_flags & TX_TS_FLAG_ONE_STEP_SYNC) 2124 ignore_sync = true; 2125 } 2126 head_length = skb_headlen(skb); 2127 frame_length = skb_pagelen(skb); 2128 nr_frags = skb_shinfo(skb)->nr_frags; 2129 start_frame_length = frame_length; 2130 gso = skb_is_gso(skb); 2131 if (gso) { 2132 start_frame_length = max(skb_shinfo(skb)->gso_size, 2133 (unsigned short)8); 2134 } 2135 2136 if (lan743x_tx_frame_start(tx, 2137 skb->data, head_length, 2138 start_frame_length, 2139 do_timestamp, 2140 skb->ip_summed == CHECKSUM_PARTIAL)) { 2141 dev_kfree_skb_irq(skb); 2142 goto unlock; 2143 } 2144 tx->frame_count++; 2145 2146 if (gso) 2147 lan743x_tx_frame_add_lso(tx, frame_length, nr_frags); 2148 2149 if (nr_frags <= 0) 2150 goto finish; 2151 2152 for (j = 0; j < nr_frags; j++) { 2153 const skb_frag_t *frag = &(skb_shinfo(skb)->frags[j]); 2154 2155 if (lan743x_tx_frame_add_fragment(tx, frag, frame_length)) { 2156 /* upon error no need to call 2157 * lan743x_tx_frame_end 2158 * frame assembler clean up was performed inside 2159 * lan743x_tx_frame_add_fragment 2160 */ 2161 dev_kfree_skb_irq(skb); 2162 goto unlock; 2163 } 2164 } 2165 2166 finish: 2167 lan743x_tx_frame_end(tx, skb, do_timestamp, ignore_sync); 2168 2169 unlock: 2170 spin_unlock_irqrestore(&tx->ring_lock, irq_flags); 2171 return retval; 2172 } 2173 2174 static int lan743x_tx_napi_poll(struct napi_struct *napi, int weight) 2175 { 2176 struct lan743x_tx *tx = container_of(napi, struct lan743x_tx, napi); 2177 struct lan743x_adapter *adapter = tx->adapter; 2178 unsigned long irq_flags = 0; 2179 struct netdev_queue *txq; 2180 u32 ioc_bit = 0; 2181 2182 ioc_bit = DMAC_INT_BIT_TX_IOC_(tx->channel_number); 2183 lan743x_csr_read(adapter, DMAC_INT_STS); 2184 if (tx->vector_flags & LAN743X_VECTOR_FLAG_SOURCE_STATUS_W2C) 2185 lan743x_csr_write(adapter, DMAC_INT_STS, ioc_bit); 2186 spin_lock_irqsave(&tx->ring_lock, irq_flags); 2187 2188 /* clean up tx ring */ 2189 lan743x_tx_release_completed_descriptors(tx); 2190 txq = netdev_get_tx_queue(adapter->netdev, tx->channel_number); 2191 if (netif_tx_queue_stopped(txq)) { 2192 if (tx->rqd_descriptors) { 2193 if (tx->rqd_descriptors <= 2194 lan743x_tx_get_avail_desc(tx)) { 2195 tx->rqd_descriptors = 0; 2196 netif_tx_wake_queue(txq); 2197 } 2198 } else { 2199 netif_tx_wake_queue(txq); 2200 } 2201 } 2202 spin_unlock_irqrestore(&tx->ring_lock, irq_flags); 2203 2204 if (!napi_complete(napi)) 2205 goto done; 2206 2207 /* enable isr */ 2208 lan743x_csr_write(adapter, INT_EN_SET, 2209 INT_BIT_DMA_TX_(tx->channel_number)); 2210 lan743x_csr_read(adapter, INT_STS); 2211 2212 done: 2213 return 0; 2214 } 2215 2216 static void lan743x_tx_ring_cleanup(struct lan743x_tx *tx) 2217 { 2218 if (tx->head_cpu_ptr) { 2219 dma_free_coherent(&tx->adapter->pdev->dev, 2220 sizeof(*tx->head_cpu_ptr), tx->head_cpu_ptr, 2221 tx->head_dma_ptr); 2222 tx->head_cpu_ptr = NULL; 2223 tx->head_dma_ptr = 0; 2224 } 2225 kfree(tx->buffer_info); 2226 tx->buffer_info = NULL; 2227 2228 if (tx->ring_cpu_ptr) { 2229 dma_free_coherent(&tx->adapter->pdev->dev, 2230 tx->ring_allocation_size, tx->ring_cpu_ptr, 2231 tx->ring_dma_ptr); 2232 tx->ring_allocation_size = 0; 2233 tx->ring_cpu_ptr = NULL; 2234 tx->ring_dma_ptr = 0; 2235 } 2236 tx->ring_size = 0; 2237 } 2238 2239 static int lan743x_tx_ring_init(struct lan743x_tx *tx) 2240 { 2241 size_t ring_allocation_size = 0; 2242 void *cpu_ptr = NULL; 2243 dma_addr_t dma_ptr; 2244 int ret = -ENOMEM; 2245 2246 tx->ring_size = LAN743X_TX_RING_SIZE; 2247 if (tx->ring_size & ~TX_CFG_B_TX_RING_LEN_MASK_) { 2248 ret = -EINVAL; 2249 goto cleanup; 2250 } 2251 if (dma_set_mask_and_coherent(&tx->adapter->pdev->dev, 2252 DMA_BIT_MASK(64))) { 2253 dev_warn(&tx->adapter->pdev->dev, 2254 "lan743x_: No suitable DMA available\n"); 2255 ret = -ENOMEM; 2256 goto cleanup; 2257 } 2258 ring_allocation_size = ALIGN(tx->ring_size * 2259 sizeof(struct lan743x_tx_descriptor), 2260 PAGE_SIZE); 2261 dma_ptr = 0; 2262 cpu_ptr = dma_alloc_coherent(&tx->adapter->pdev->dev, 2263 ring_allocation_size, &dma_ptr, GFP_KERNEL); 2264 if (!cpu_ptr) { 2265 ret = -ENOMEM; 2266 goto cleanup; 2267 } 2268 2269 tx->ring_allocation_size = ring_allocation_size; 2270 tx->ring_cpu_ptr = (struct lan743x_tx_descriptor *)cpu_ptr; 2271 tx->ring_dma_ptr = dma_ptr; 2272 2273 cpu_ptr = kcalloc(tx->ring_size, sizeof(*tx->buffer_info), GFP_KERNEL); 2274 if (!cpu_ptr) { 2275 ret = -ENOMEM; 2276 goto cleanup; 2277 } 2278 tx->buffer_info = (struct lan743x_tx_buffer_info *)cpu_ptr; 2279 dma_ptr = 0; 2280 cpu_ptr = dma_alloc_coherent(&tx->adapter->pdev->dev, 2281 sizeof(*tx->head_cpu_ptr), &dma_ptr, 2282 GFP_KERNEL); 2283 if (!cpu_ptr) { 2284 ret = -ENOMEM; 2285 goto cleanup; 2286 } 2287 2288 tx->head_cpu_ptr = cpu_ptr; 2289 tx->head_dma_ptr = dma_ptr; 2290 if (tx->head_dma_ptr & 0x3) { 2291 ret = -ENOMEM; 2292 goto cleanup; 2293 } 2294 2295 return 0; 2296 2297 cleanup: 2298 lan743x_tx_ring_cleanup(tx); 2299 return ret; 2300 } 2301 2302 static void lan743x_tx_close(struct lan743x_tx *tx) 2303 { 2304 struct lan743x_adapter *adapter = tx->adapter; 2305 2306 lan743x_csr_write(adapter, 2307 DMAC_CMD, 2308 DMAC_CMD_STOP_T_(tx->channel_number)); 2309 lan743x_dmac_tx_wait_till_stopped(adapter, tx->channel_number); 2310 2311 lan743x_csr_write(adapter, 2312 DMAC_INT_EN_CLR, 2313 DMAC_INT_BIT_TX_IOC_(tx->channel_number)); 2314 lan743x_csr_write(adapter, INT_EN_CLR, 2315 INT_BIT_DMA_TX_(tx->channel_number)); 2316 napi_disable(&tx->napi); 2317 netif_napi_del(&tx->napi); 2318 2319 lan743x_csr_write(adapter, FCT_TX_CTL, 2320 FCT_TX_CTL_DIS_(tx->channel_number)); 2321 lan743x_csr_wait_for_bit(adapter, FCT_TX_CTL, 2322 FCT_TX_CTL_EN_(tx->channel_number), 2323 0, 1000, 20000, 100); 2324 2325 lan743x_tx_release_all_descriptors(tx); 2326 2327 tx->rqd_descriptors = 0; 2328 2329 lan743x_tx_ring_cleanup(tx); 2330 } 2331 2332 static int lan743x_tx_open(struct lan743x_tx *tx) 2333 { 2334 struct lan743x_adapter *adapter = NULL; 2335 u32 data = 0; 2336 int ret; 2337 2338 adapter = tx->adapter; 2339 ret = lan743x_tx_ring_init(tx); 2340 if (ret) 2341 return ret; 2342 2343 /* initialize fifo */ 2344 lan743x_csr_write(adapter, FCT_TX_CTL, 2345 FCT_TX_CTL_RESET_(tx->channel_number)); 2346 lan743x_csr_wait_for_bit(adapter, FCT_TX_CTL, 2347 FCT_TX_CTL_RESET_(tx->channel_number), 2348 0, 1000, 20000, 100); 2349 2350 /* enable fifo */ 2351 lan743x_csr_write(adapter, FCT_TX_CTL, 2352 FCT_TX_CTL_EN_(tx->channel_number)); 2353 2354 /* reset tx channel */ 2355 lan743x_csr_write(adapter, DMAC_CMD, 2356 DMAC_CMD_TX_SWR_(tx->channel_number)); 2357 lan743x_csr_wait_for_bit(adapter, DMAC_CMD, 2358 DMAC_CMD_TX_SWR_(tx->channel_number), 2359 0, 1000, 20000, 100); 2360 2361 /* Write TX_BASE_ADDR */ 2362 lan743x_csr_write(adapter, 2363 TX_BASE_ADDRH(tx->channel_number), 2364 DMA_ADDR_HIGH32(tx->ring_dma_ptr)); 2365 lan743x_csr_write(adapter, 2366 TX_BASE_ADDRL(tx->channel_number), 2367 DMA_ADDR_LOW32(tx->ring_dma_ptr)); 2368 2369 /* Write TX_CFG_B */ 2370 data = lan743x_csr_read(adapter, TX_CFG_B(tx->channel_number)); 2371 data &= ~TX_CFG_B_TX_RING_LEN_MASK_; 2372 data |= ((tx->ring_size) & TX_CFG_B_TX_RING_LEN_MASK_); 2373 if (!(adapter->csr.flags & LAN743X_CSR_FLAG_IS_A0)) 2374 data |= TX_CFG_B_TDMABL_512_; 2375 lan743x_csr_write(adapter, TX_CFG_B(tx->channel_number), data); 2376 2377 /* Write TX_CFG_A */ 2378 data = TX_CFG_A_TX_TMR_HPWB_SEL_IOC_ | TX_CFG_A_TX_HP_WB_EN_; 2379 if (!(adapter->csr.flags & LAN743X_CSR_FLAG_IS_A0)) { 2380 data |= TX_CFG_A_TX_HP_WB_ON_INT_TMR_; 2381 data |= TX_CFG_A_TX_PF_THRES_SET_(0x10); 2382 data |= TX_CFG_A_TX_PF_PRI_THRES_SET_(0x04); 2383 data |= TX_CFG_A_TX_HP_WB_THRES_SET_(0x07); 2384 } 2385 lan743x_csr_write(adapter, TX_CFG_A(tx->channel_number), data); 2386 2387 /* Write TX_HEAD_WRITEBACK_ADDR */ 2388 lan743x_csr_write(adapter, 2389 TX_HEAD_WRITEBACK_ADDRH(tx->channel_number), 2390 DMA_ADDR_HIGH32(tx->head_dma_ptr)); 2391 lan743x_csr_write(adapter, 2392 TX_HEAD_WRITEBACK_ADDRL(tx->channel_number), 2393 DMA_ADDR_LOW32(tx->head_dma_ptr)); 2394 2395 /* set last head */ 2396 tx->last_head = lan743x_csr_read(adapter, TX_HEAD(tx->channel_number)); 2397 2398 /* write TX_TAIL */ 2399 tx->last_tail = 0; 2400 lan743x_csr_write(adapter, TX_TAIL(tx->channel_number), 2401 (u32)(tx->last_tail)); 2402 tx->vector_flags = lan743x_intr_get_vector_flags(adapter, 2403 INT_BIT_DMA_TX_ 2404 (tx->channel_number)); 2405 netif_napi_add_tx_weight(adapter->netdev, 2406 &tx->napi, lan743x_tx_napi_poll, 2407 NAPI_POLL_WEIGHT); 2408 napi_enable(&tx->napi); 2409 2410 data = 0; 2411 if (tx->vector_flags & LAN743X_VECTOR_FLAG_SOURCE_ENABLE_AUTO_CLEAR) 2412 data |= TX_CFG_C_TX_TOP_INT_EN_AUTO_CLR_; 2413 if (tx->vector_flags & LAN743X_VECTOR_FLAG_SOURCE_STATUS_AUTO_CLEAR) 2414 data |= TX_CFG_C_TX_DMA_INT_STS_AUTO_CLR_; 2415 if (tx->vector_flags & LAN743X_VECTOR_FLAG_SOURCE_STATUS_R2C) 2416 data |= TX_CFG_C_TX_INT_STS_R2C_MODE_MASK_; 2417 if (tx->vector_flags & LAN743X_VECTOR_FLAG_SOURCE_ENABLE_R2C) 2418 data |= TX_CFG_C_TX_INT_EN_R2C_; 2419 lan743x_csr_write(adapter, TX_CFG_C(tx->channel_number), data); 2420 2421 if (!(tx->vector_flags & LAN743X_VECTOR_FLAG_SOURCE_ENABLE_AUTO_SET)) 2422 lan743x_csr_write(adapter, INT_EN_SET, 2423 INT_BIT_DMA_TX_(tx->channel_number)); 2424 lan743x_csr_write(adapter, DMAC_INT_EN_SET, 2425 DMAC_INT_BIT_TX_IOC_(tx->channel_number)); 2426 2427 /* start dmac channel */ 2428 lan743x_csr_write(adapter, DMAC_CMD, 2429 DMAC_CMD_START_T_(tx->channel_number)); 2430 return 0; 2431 } 2432 2433 static int lan743x_rx_next_index(struct lan743x_rx *rx, int index) 2434 { 2435 return ((++index) % rx->ring_size); 2436 } 2437 2438 static void lan743x_rx_update_tail(struct lan743x_rx *rx, int index) 2439 { 2440 /* update the tail once per 8 descriptors */ 2441 if ((index & 7) == 7) 2442 lan743x_csr_write(rx->adapter, RX_TAIL(rx->channel_number), 2443 index); 2444 } 2445 2446 static int lan743x_rx_init_ring_element(struct lan743x_rx *rx, int index, 2447 gfp_t gfp) 2448 { 2449 struct net_device *netdev = rx->adapter->netdev; 2450 struct device *dev = &rx->adapter->pdev->dev; 2451 struct lan743x_rx_buffer_info *buffer_info; 2452 unsigned int buffer_length, used_length; 2453 struct lan743x_rx_descriptor *descriptor; 2454 struct sk_buff *skb; 2455 dma_addr_t dma_ptr; 2456 2457 buffer_length = netdev->mtu + ETH_HLEN + ETH_FCS_LEN + RX_HEAD_PADDING; 2458 2459 descriptor = &rx->ring_cpu_ptr[index]; 2460 buffer_info = &rx->buffer_info[index]; 2461 skb = __netdev_alloc_skb(netdev, buffer_length, gfp); 2462 if (!skb) 2463 return -ENOMEM; 2464 dma_ptr = dma_map_single(dev, skb->data, buffer_length, DMA_FROM_DEVICE); 2465 if (dma_mapping_error(dev, dma_ptr)) { 2466 dev_kfree_skb_any(skb); 2467 return -ENOMEM; 2468 } 2469 if (buffer_info->dma_ptr) { 2470 /* sync used area of buffer only */ 2471 if (le32_to_cpu(descriptor->data0) & RX_DESC_DATA0_LS_) 2472 /* frame length is valid only if LS bit is set. 2473 * it's a safe upper bound for the used area in this 2474 * buffer. 2475 */ 2476 used_length = min(RX_DESC_DATA0_FRAME_LENGTH_GET_ 2477 (le32_to_cpu(descriptor->data0)), 2478 buffer_info->buffer_length); 2479 else 2480 used_length = buffer_info->buffer_length; 2481 dma_sync_single_for_cpu(dev, buffer_info->dma_ptr, 2482 used_length, 2483 DMA_FROM_DEVICE); 2484 dma_unmap_single_attrs(dev, buffer_info->dma_ptr, 2485 buffer_info->buffer_length, 2486 DMA_FROM_DEVICE, 2487 DMA_ATTR_SKIP_CPU_SYNC); 2488 } 2489 2490 buffer_info->skb = skb; 2491 buffer_info->dma_ptr = dma_ptr; 2492 buffer_info->buffer_length = buffer_length; 2493 descriptor->data1 = cpu_to_le32(DMA_ADDR_LOW32(buffer_info->dma_ptr)); 2494 descriptor->data2 = cpu_to_le32(DMA_ADDR_HIGH32(buffer_info->dma_ptr)); 2495 descriptor->data3 = 0; 2496 descriptor->data0 = cpu_to_le32((RX_DESC_DATA0_OWN_ | 2497 (buffer_length & RX_DESC_DATA0_BUF_LENGTH_MASK_))); 2498 lan743x_rx_update_tail(rx, index); 2499 2500 return 0; 2501 } 2502 2503 static void lan743x_rx_reuse_ring_element(struct lan743x_rx *rx, int index) 2504 { 2505 struct lan743x_rx_buffer_info *buffer_info; 2506 struct lan743x_rx_descriptor *descriptor; 2507 2508 descriptor = &rx->ring_cpu_ptr[index]; 2509 buffer_info = &rx->buffer_info[index]; 2510 2511 descriptor->data1 = cpu_to_le32(DMA_ADDR_LOW32(buffer_info->dma_ptr)); 2512 descriptor->data2 = cpu_to_le32(DMA_ADDR_HIGH32(buffer_info->dma_ptr)); 2513 descriptor->data3 = 0; 2514 descriptor->data0 = cpu_to_le32((RX_DESC_DATA0_OWN_ | 2515 ((buffer_info->buffer_length) & 2516 RX_DESC_DATA0_BUF_LENGTH_MASK_))); 2517 lan743x_rx_update_tail(rx, index); 2518 } 2519 2520 static void lan743x_rx_release_ring_element(struct lan743x_rx *rx, int index) 2521 { 2522 struct lan743x_rx_buffer_info *buffer_info; 2523 struct lan743x_rx_descriptor *descriptor; 2524 2525 descriptor = &rx->ring_cpu_ptr[index]; 2526 buffer_info = &rx->buffer_info[index]; 2527 2528 memset(descriptor, 0, sizeof(*descriptor)); 2529 2530 if (buffer_info->dma_ptr) { 2531 dma_unmap_single(&rx->adapter->pdev->dev, 2532 buffer_info->dma_ptr, 2533 buffer_info->buffer_length, 2534 DMA_FROM_DEVICE); 2535 buffer_info->dma_ptr = 0; 2536 } 2537 2538 if (buffer_info->skb) { 2539 dev_kfree_skb(buffer_info->skb); 2540 buffer_info->skb = NULL; 2541 } 2542 2543 memset(buffer_info, 0, sizeof(*buffer_info)); 2544 } 2545 2546 static struct sk_buff * 2547 lan743x_rx_trim_skb(struct sk_buff *skb, int frame_length) 2548 { 2549 if (skb_linearize(skb)) { 2550 dev_kfree_skb_irq(skb); 2551 return NULL; 2552 } 2553 frame_length = max_t(int, 0, frame_length - ETH_FCS_LEN); 2554 if (skb->len > frame_length) { 2555 skb->tail -= skb->len - frame_length; 2556 skb->len = frame_length; 2557 } 2558 return skb; 2559 } 2560 2561 static int lan743x_rx_process_buffer(struct lan743x_rx *rx) 2562 { 2563 int current_head_index = le32_to_cpu(*rx->head_cpu_ptr); 2564 struct lan743x_rx_descriptor *descriptor, *desc_ext; 2565 struct net_device *netdev = rx->adapter->netdev; 2566 int result = RX_PROCESS_RESULT_NOTHING_TO_DO; 2567 struct lan743x_rx_buffer_info *buffer_info; 2568 int frame_length, buffer_length; 2569 bool is_ice, is_tce, is_icsm; 2570 int extension_index = -1; 2571 bool is_last, is_first; 2572 struct sk_buff *skb; 2573 2574 if (current_head_index < 0 || current_head_index >= rx->ring_size) 2575 goto done; 2576 2577 if (rx->last_head < 0 || rx->last_head >= rx->ring_size) 2578 goto done; 2579 2580 if (rx->last_head == current_head_index) 2581 goto done; 2582 2583 descriptor = &rx->ring_cpu_ptr[rx->last_head]; 2584 if (le32_to_cpu(descriptor->data0) & RX_DESC_DATA0_OWN_) 2585 goto done; 2586 buffer_info = &rx->buffer_info[rx->last_head]; 2587 2588 is_last = le32_to_cpu(descriptor->data0) & RX_DESC_DATA0_LS_; 2589 is_first = le32_to_cpu(descriptor->data0) & RX_DESC_DATA0_FS_; 2590 2591 if (is_last && le32_to_cpu(descriptor->data0) & RX_DESC_DATA0_EXT_) { 2592 /* extension is expected to follow */ 2593 int index = lan743x_rx_next_index(rx, rx->last_head); 2594 2595 if (index == current_head_index) 2596 /* extension not yet available */ 2597 goto done; 2598 desc_ext = &rx->ring_cpu_ptr[index]; 2599 if (le32_to_cpu(desc_ext->data0) & RX_DESC_DATA0_OWN_) 2600 /* extension not yet available */ 2601 goto done; 2602 if (!(le32_to_cpu(desc_ext->data0) & RX_DESC_DATA0_EXT_)) 2603 goto move_forward; 2604 extension_index = index; 2605 } 2606 2607 /* Only the last buffer in a multi-buffer frame contains the total frame 2608 * length. The chip occasionally sends more buffers than strictly 2609 * required to reach the total frame length. 2610 * Handle this by adding all buffers to the skb in their entirety. 2611 * Once the real frame length is known, trim the skb. 2612 */ 2613 frame_length = 2614 RX_DESC_DATA0_FRAME_LENGTH_GET_(le32_to_cpu(descriptor->data0)); 2615 buffer_length = buffer_info->buffer_length; 2616 is_ice = le32_to_cpu(descriptor->data1) & RX_DESC_DATA1_STATUS_ICE_; 2617 is_tce = le32_to_cpu(descriptor->data1) & RX_DESC_DATA1_STATUS_TCE_; 2618 is_icsm = le32_to_cpu(descriptor->data1) & RX_DESC_DATA1_STATUS_ICSM_; 2619 2620 netdev_dbg(netdev, "%s%schunk: %d/%d", 2621 is_first ? "first " : " ", 2622 is_last ? "last " : " ", 2623 frame_length, buffer_length); 2624 2625 /* save existing skb, allocate new skb and map to dma */ 2626 skb = buffer_info->skb; 2627 if (lan743x_rx_init_ring_element(rx, rx->last_head, 2628 GFP_ATOMIC | GFP_DMA)) { 2629 /* failed to allocate next skb. 2630 * Memory is very low. 2631 * Drop this packet and reuse buffer. 2632 */ 2633 lan743x_rx_reuse_ring_element(rx, rx->last_head); 2634 /* drop packet that was being assembled */ 2635 dev_kfree_skb_irq(rx->skb_head); 2636 rx->skb_head = NULL; 2637 goto process_extension; 2638 } 2639 2640 /* add buffers to skb via skb->frag_list */ 2641 if (is_first) { 2642 skb_reserve(skb, RX_HEAD_PADDING); 2643 skb_put(skb, buffer_length - RX_HEAD_PADDING); 2644 if (rx->skb_head) 2645 dev_kfree_skb_irq(rx->skb_head); 2646 rx->skb_head = skb; 2647 } else if (rx->skb_head) { 2648 skb_put(skb, buffer_length); 2649 if (skb_shinfo(rx->skb_head)->frag_list) 2650 rx->skb_tail->next = skb; 2651 else 2652 skb_shinfo(rx->skb_head)->frag_list = skb; 2653 rx->skb_tail = skb; 2654 rx->skb_head->len += skb->len; 2655 rx->skb_head->data_len += skb->len; 2656 rx->skb_head->truesize += skb->truesize; 2657 } else { 2658 /* packet to assemble has already been dropped because one or 2659 * more of its buffers could not be allocated 2660 */ 2661 netdev_dbg(netdev, "drop buffer intended for dropped packet"); 2662 dev_kfree_skb_irq(skb); 2663 } 2664 2665 process_extension: 2666 if (extension_index >= 0) { 2667 u32 ts_sec; 2668 u32 ts_nsec; 2669 2670 ts_sec = le32_to_cpu(desc_ext->data1); 2671 ts_nsec = (le32_to_cpu(desc_ext->data2) & 2672 RX_DESC_DATA2_TS_NS_MASK_); 2673 if (rx->skb_head) 2674 skb_hwtstamps(rx->skb_head)->hwtstamp = 2675 ktime_set(ts_sec, ts_nsec); 2676 lan743x_rx_reuse_ring_element(rx, extension_index); 2677 rx->last_head = extension_index; 2678 netdev_dbg(netdev, "process extension"); 2679 } 2680 2681 if (is_last && rx->skb_head) 2682 rx->skb_head = lan743x_rx_trim_skb(rx->skb_head, frame_length); 2683 2684 if (is_last && rx->skb_head) { 2685 rx->skb_head->protocol = eth_type_trans(rx->skb_head, 2686 rx->adapter->netdev); 2687 if (rx->adapter->netdev->features & NETIF_F_RXCSUM) { 2688 if (!is_ice && !is_tce && !is_icsm) 2689 skb->ip_summed = CHECKSUM_UNNECESSARY; 2690 } 2691 netdev_dbg(netdev, "sending %d byte frame to OS", 2692 rx->skb_head->len); 2693 napi_gro_receive(&rx->napi, rx->skb_head); 2694 rx->skb_head = NULL; 2695 } 2696 2697 move_forward: 2698 /* push tail and head forward */ 2699 rx->last_tail = rx->last_head; 2700 rx->last_head = lan743x_rx_next_index(rx, rx->last_head); 2701 result = RX_PROCESS_RESULT_BUFFER_RECEIVED; 2702 done: 2703 return result; 2704 } 2705 2706 static int lan743x_rx_napi_poll(struct napi_struct *napi, int weight) 2707 { 2708 struct lan743x_rx *rx = container_of(napi, struct lan743x_rx, napi); 2709 struct lan743x_adapter *adapter = rx->adapter; 2710 int result = RX_PROCESS_RESULT_NOTHING_TO_DO; 2711 u32 rx_tail_flags = 0; 2712 int count; 2713 2714 if (rx->vector_flags & LAN743X_VECTOR_FLAG_SOURCE_STATUS_W2C) { 2715 /* clear int status bit before reading packet */ 2716 lan743x_csr_write(adapter, DMAC_INT_STS, 2717 DMAC_INT_BIT_RXFRM_(rx->channel_number)); 2718 } 2719 for (count = 0; count < weight; count++) { 2720 result = lan743x_rx_process_buffer(rx); 2721 if (result == RX_PROCESS_RESULT_NOTHING_TO_DO) 2722 break; 2723 } 2724 rx->frame_count += count; 2725 if (count == weight || result == RX_PROCESS_RESULT_BUFFER_RECEIVED) 2726 return weight; 2727 2728 if (!napi_complete_done(napi, count)) 2729 return count; 2730 2731 /* re-arm interrupts, must write to rx tail on some chip variants */ 2732 if (rx->vector_flags & LAN743X_VECTOR_FLAG_VECTOR_ENABLE_AUTO_SET) 2733 rx_tail_flags |= RX_TAIL_SET_TOP_INT_VEC_EN_; 2734 if (rx->vector_flags & LAN743X_VECTOR_FLAG_SOURCE_ENABLE_AUTO_SET) { 2735 rx_tail_flags |= RX_TAIL_SET_TOP_INT_EN_; 2736 } else { 2737 lan743x_csr_write(adapter, INT_EN_SET, 2738 INT_BIT_DMA_RX_(rx->channel_number)); 2739 } 2740 2741 if (rx_tail_flags) 2742 lan743x_csr_write(adapter, RX_TAIL(rx->channel_number), 2743 rx_tail_flags | rx->last_tail); 2744 2745 return count; 2746 } 2747 2748 static void lan743x_rx_ring_cleanup(struct lan743x_rx *rx) 2749 { 2750 if (rx->buffer_info && rx->ring_cpu_ptr) { 2751 int index; 2752 2753 for (index = 0; index < rx->ring_size; index++) 2754 lan743x_rx_release_ring_element(rx, index); 2755 } 2756 2757 if (rx->head_cpu_ptr) { 2758 dma_free_coherent(&rx->adapter->pdev->dev, 2759 sizeof(*rx->head_cpu_ptr), rx->head_cpu_ptr, 2760 rx->head_dma_ptr); 2761 rx->head_cpu_ptr = NULL; 2762 rx->head_dma_ptr = 0; 2763 } 2764 2765 kfree(rx->buffer_info); 2766 rx->buffer_info = NULL; 2767 2768 if (rx->ring_cpu_ptr) { 2769 dma_free_coherent(&rx->adapter->pdev->dev, 2770 rx->ring_allocation_size, rx->ring_cpu_ptr, 2771 rx->ring_dma_ptr); 2772 rx->ring_allocation_size = 0; 2773 rx->ring_cpu_ptr = NULL; 2774 rx->ring_dma_ptr = 0; 2775 } 2776 2777 rx->ring_size = 0; 2778 rx->last_head = 0; 2779 } 2780 2781 static int lan743x_rx_ring_init(struct lan743x_rx *rx) 2782 { 2783 size_t ring_allocation_size = 0; 2784 dma_addr_t dma_ptr = 0; 2785 void *cpu_ptr = NULL; 2786 int ret = -ENOMEM; 2787 int index = 0; 2788 2789 rx->ring_size = LAN743X_RX_RING_SIZE; 2790 if (rx->ring_size <= 1) { 2791 ret = -EINVAL; 2792 goto cleanup; 2793 } 2794 if (rx->ring_size & ~RX_CFG_B_RX_RING_LEN_MASK_) { 2795 ret = -EINVAL; 2796 goto cleanup; 2797 } 2798 if (dma_set_mask_and_coherent(&rx->adapter->pdev->dev, 2799 DMA_BIT_MASK(64))) { 2800 dev_warn(&rx->adapter->pdev->dev, 2801 "lan743x_: No suitable DMA available\n"); 2802 ret = -ENOMEM; 2803 goto cleanup; 2804 } 2805 ring_allocation_size = ALIGN(rx->ring_size * 2806 sizeof(struct lan743x_rx_descriptor), 2807 PAGE_SIZE); 2808 dma_ptr = 0; 2809 cpu_ptr = dma_alloc_coherent(&rx->adapter->pdev->dev, 2810 ring_allocation_size, &dma_ptr, GFP_KERNEL); 2811 if (!cpu_ptr) { 2812 ret = -ENOMEM; 2813 goto cleanup; 2814 } 2815 rx->ring_allocation_size = ring_allocation_size; 2816 rx->ring_cpu_ptr = (struct lan743x_rx_descriptor *)cpu_ptr; 2817 rx->ring_dma_ptr = dma_ptr; 2818 2819 cpu_ptr = kcalloc(rx->ring_size, sizeof(*rx->buffer_info), 2820 GFP_KERNEL); 2821 if (!cpu_ptr) { 2822 ret = -ENOMEM; 2823 goto cleanup; 2824 } 2825 rx->buffer_info = (struct lan743x_rx_buffer_info *)cpu_ptr; 2826 dma_ptr = 0; 2827 cpu_ptr = dma_alloc_coherent(&rx->adapter->pdev->dev, 2828 sizeof(*rx->head_cpu_ptr), &dma_ptr, 2829 GFP_KERNEL); 2830 if (!cpu_ptr) { 2831 ret = -ENOMEM; 2832 goto cleanup; 2833 } 2834 2835 rx->head_cpu_ptr = cpu_ptr; 2836 rx->head_dma_ptr = dma_ptr; 2837 if (rx->head_dma_ptr & 0x3) { 2838 ret = -ENOMEM; 2839 goto cleanup; 2840 } 2841 2842 rx->last_head = 0; 2843 for (index = 0; index < rx->ring_size; index++) { 2844 ret = lan743x_rx_init_ring_element(rx, index, GFP_KERNEL); 2845 if (ret) 2846 goto cleanup; 2847 } 2848 return 0; 2849 2850 cleanup: 2851 netif_warn(rx->adapter, ifup, rx->adapter->netdev, 2852 "Error allocating memory for LAN743x\n"); 2853 2854 lan743x_rx_ring_cleanup(rx); 2855 return ret; 2856 } 2857 2858 static void lan743x_rx_close(struct lan743x_rx *rx) 2859 { 2860 struct lan743x_adapter *adapter = rx->adapter; 2861 2862 lan743x_csr_write(adapter, FCT_RX_CTL, 2863 FCT_RX_CTL_DIS_(rx->channel_number)); 2864 lan743x_csr_wait_for_bit(adapter, FCT_RX_CTL, 2865 FCT_RX_CTL_EN_(rx->channel_number), 2866 0, 1000, 20000, 100); 2867 2868 lan743x_csr_write(adapter, DMAC_CMD, 2869 DMAC_CMD_STOP_R_(rx->channel_number)); 2870 lan743x_dmac_rx_wait_till_stopped(adapter, rx->channel_number); 2871 2872 lan743x_csr_write(adapter, DMAC_INT_EN_CLR, 2873 DMAC_INT_BIT_RXFRM_(rx->channel_number)); 2874 lan743x_csr_write(adapter, INT_EN_CLR, 2875 INT_BIT_DMA_RX_(rx->channel_number)); 2876 napi_disable(&rx->napi); 2877 2878 netif_napi_del(&rx->napi); 2879 2880 lan743x_rx_ring_cleanup(rx); 2881 } 2882 2883 static int lan743x_rx_open(struct lan743x_rx *rx) 2884 { 2885 struct lan743x_adapter *adapter = rx->adapter; 2886 u32 data = 0; 2887 int ret; 2888 2889 rx->frame_count = 0; 2890 ret = lan743x_rx_ring_init(rx); 2891 if (ret) 2892 goto return_error; 2893 2894 netif_napi_add(adapter->netdev, &rx->napi, lan743x_rx_napi_poll); 2895 2896 lan743x_csr_write(adapter, DMAC_CMD, 2897 DMAC_CMD_RX_SWR_(rx->channel_number)); 2898 lan743x_csr_wait_for_bit(adapter, DMAC_CMD, 2899 DMAC_CMD_RX_SWR_(rx->channel_number), 2900 0, 1000, 20000, 100); 2901 2902 /* set ring base address */ 2903 lan743x_csr_write(adapter, 2904 RX_BASE_ADDRH(rx->channel_number), 2905 DMA_ADDR_HIGH32(rx->ring_dma_ptr)); 2906 lan743x_csr_write(adapter, 2907 RX_BASE_ADDRL(rx->channel_number), 2908 DMA_ADDR_LOW32(rx->ring_dma_ptr)); 2909 2910 /* set rx write back address */ 2911 lan743x_csr_write(adapter, 2912 RX_HEAD_WRITEBACK_ADDRH(rx->channel_number), 2913 DMA_ADDR_HIGH32(rx->head_dma_ptr)); 2914 lan743x_csr_write(adapter, 2915 RX_HEAD_WRITEBACK_ADDRL(rx->channel_number), 2916 DMA_ADDR_LOW32(rx->head_dma_ptr)); 2917 data = RX_CFG_A_RX_HP_WB_EN_; 2918 if (!(adapter->csr.flags & LAN743X_CSR_FLAG_IS_A0)) { 2919 data |= (RX_CFG_A_RX_WB_ON_INT_TMR_ | 2920 RX_CFG_A_RX_WB_THRES_SET_(0x7) | 2921 RX_CFG_A_RX_PF_THRES_SET_(16) | 2922 RX_CFG_A_RX_PF_PRI_THRES_SET_(4)); 2923 } 2924 2925 /* set RX_CFG_A */ 2926 lan743x_csr_write(adapter, 2927 RX_CFG_A(rx->channel_number), data); 2928 2929 /* set RX_CFG_B */ 2930 data = lan743x_csr_read(adapter, RX_CFG_B(rx->channel_number)); 2931 data &= ~RX_CFG_B_RX_PAD_MASK_; 2932 if (!RX_HEAD_PADDING) 2933 data |= RX_CFG_B_RX_PAD_0_; 2934 else 2935 data |= RX_CFG_B_RX_PAD_2_; 2936 data &= ~RX_CFG_B_RX_RING_LEN_MASK_; 2937 data |= ((rx->ring_size) & RX_CFG_B_RX_RING_LEN_MASK_); 2938 data |= RX_CFG_B_TS_ALL_RX_; 2939 if (!(adapter->csr.flags & LAN743X_CSR_FLAG_IS_A0)) 2940 data |= RX_CFG_B_RDMABL_512_; 2941 2942 lan743x_csr_write(adapter, RX_CFG_B(rx->channel_number), data); 2943 rx->vector_flags = lan743x_intr_get_vector_flags(adapter, 2944 INT_BIT_DMA_RX_ 2945 (rx->channel_number)); 2946 2947 /* set RX_CFG_C */ 2948 data = 0; 2949 if (rx->vector_flags & LAN743X_VECTOR_FLAG_SOURCE_ENABLE_AUTO_CLEAR) 2950 data |= RX_CFG_C_RX_TOP_INT_EN_AUTO_CLR_; 2951 if (rx->vector_flags & LAN743X_VECTOR_FLAG_SOURCE_STATUS_AUTO_CLEAR) 2952 data |= RX_CFG_C_RX_DMA_INT_STS_AUTO_CLR_; 2953 if (rx->vector_flags & LAN743X_VECTOR_FLAG_SOURCE_STATUS_R2C) 2954 data |= RX_CFG_C_RX_INT_STS_R2C_MODE_MASK_; 2955 if (rx->vector_flags & LAN743X_VECTOR_FLAG_SOURCE_ENABLE_R2C) 2956 data |= RX_CFG_C_RX_INT_EN_R2C_; 2957 lan743x_csr_write(adapter, RX_CFG_C(rx->channel_number), data); 2958 2959 rx->last_tail = ((u32)(rx->ring_size - 1)); 2960 lan743x_csr_write(adapter, RX_TAIL(rx->channel_number), 2961 rx->last_tail); 2962 rx->last_head = lan743x_csr_read(adapter, RX_HEAD(rx->channel_number)); 2963 if (rx->last_head) { 2964 ret = -EIO; 2965 goto napi_delete; 2966 } 2967 2968 napi_enable(&rx->napi); 2969 2970 lan743x_csr_write(adapter, INT_EN_SET, 2971 INT_BIT_DMA_RX_(rx->channel_number)); 2972 lan743x_csr_write(adapter, DMAC_INT_STS, 2973 DMAC_INT_BIT_RXFRM_(rx->channel_number)); 2974 lan743x_csr_write(adapter, DMAC_INT_EN_SET, 2975 DMAC_INT_BIT_RXFRM_(rx->channel_number)); 2976 lan743x_csr_write(adapter, DMAC_CMD, 2977 DMAC_CMD_START_R_(rx->channel_number)); 2978 2979 /* initialize fifo */ 2980 lan743x_csr_write(adapter, FCT_RX_CTL, 2981 FCT_RX_CTL_RESET_(rx->channel_number)); 2982 lan743x_csr_wait_for_bit(adapter, FCT_RX_CTL, 2983 FCT_RX_CTL_RESET_(rx->channel_number), 2984 0, 1000, 20000, 100); 2985 lan743x_csr_write(adapter, FCT_FLOW(rx->channel_number), 2986 FCT_FLOW_CTL_REQ_EN_ | 2987 FCT_FLOW_CTL_ON_THRESHOLD_SET_(0x2A) | 2988 FCT_FLOW_CTL_OFF_THRESHOLD_SET_(0xA)); 2989 2990 /* enable fifo */ 2991 lan743x_csr_write(adapter, FCT_RX_CTL, 2992 FCT_RX_CTL_EN_(rx->channel_number)); 2993 return 0; 2994 2995 napi_delete: 2996 netif_napi_del(&rx->napi); 2997 lan743x_rx_ring_cleanup(rx); 2998 2999 return_error: 3000 return ret; 3001 } 3002 3003 static int lan743x_netdev_close(struct net_device *netdev) 3004 { 3005 struct lan743x_adapter *adapter = netdev_priv(netdev); 3006 int index; 3007 3008 for (index = 0; index < adapter->used_tx_channels; index++) 3009 lan743x_tx_close(&adapter->tx[index]); 3010 3011 for (index = 0; index < LAN743X_USED_RX_CHANNELS; index++) 3012 lan743x_rx_close(&adapter->rx[index]); 3013 3014 lan743x_ptp_close(adapter); 3015 3016 lan743x_phy_close(adapter); 3017 3018 lan743x_mac_close(adapter); 3019 3020 lan743x_intr_close(adapter); 3021 3022 return 0; 3023 } 3024 3025 static int lan743x_netdev_open(struct net_device *netdev) 3026 { 3027 struct lan743x_adapter *adapter = netdev_priv(netdev); 3028 int index; 3029 int ret; 3030 3031 ret = lan743x_intr_open(adapter); 3032 if (ret) 3033 goto return_error; 3034 3035 ret = lan743x_mac_open(adapter); 3036 if (ret) 3037 goto close_intr; 3038 3039 ret = lan743x_phy_open(adapter); 3040 if (ret) 3041 goto close_mac; 3042 3043 ret = lan743x_ptp_open(adapter); 3044 if (ret) 3045 goto close_phy; 3046 3047 lan743x_rfe_open(adapter); 3048 3049 for (index = 0; index < LAN743X_USED_RX_CHANNELS; index++) { 3050 ret = lan743x_rx_open(&adapter->rx[index]); 3051 if (ret) 3052 goto close_rx; 3053 } 3054 3055 for (index = 0; index < adapter->used_tx_channels; index++) { 3056 ret = lan743x_tx_open(&adapter->tx[index]); 3057 if (ret) 3058 goto close_tx; 3059 } 3060 return 0; 3061 3062 close_tx: 3063 for (index = 0; index < adapter->used_tx_channels; index++) { 3064 if (adapter->tx[index].ring_cpu_ptr) 3065 lan743x_tx_close(&adapter->tx[index]); 3066 } 3067 3068 close_rx: 3069 for (index = 0; index < LAN743X_USED_RX_CHANNELS; index++) { 3070 if (adapter->rx[index].ring_cpu_ptr) 3071 lan743x_rx_close(&adapter->rx[index]); 3072 } 3073 lan743x_ptp_close(adapter); 3074 3075 close_phy: 3076 lan743x_phy_close(adapter); 3077 3078 close_mac: 3079 lan743x_mac_close(adapter); 3080 3081 close_intr: 3082 lan743x_intr_close(adapter); 3083 3084 return_error: 3085 netif_warn(adapter, ifup, adapter->netdev, 3086 "Error opening LAN743x\n"); 3087 return ret; 3088 } 3089 3090 static netdev_tx_t lan743x_netdev_xmit_frame(struct sk_buff *skb, 3091 struct net_device *netdev) 3092 { 3093 struct lan743x_adapter *adapter = netdev_priv(netdev); 3094 u8 ch = 0; 3095 3096 if (adapter->is_pci11x1x) 3097 ch = skb->queue_mapping % PCI11X1X_USED_TX_CHANNELS; 3098 3099 return lan743x_tx_xmit_frame(&adapter->tx[ch], skb); 3100 } 3101 3102 static int lan743x_netdev_ioctl(struct net_device *netdev, 3103 struct ifreq *ifr, int cmd) 3104 { 3105 if (!netif_running(netdev)) 3106 return -EINVAL; 3107 if (cmd == SIOCSHWTSTAMP) 3108 return lan743x_ptp_ioctl(netdev, ifr, cmd); 3109 return phy_mii_ioctl(netdev->phydev, ifr, cmd); 3110 } 3111 3112 static void lan743x_netdev_set_multicast(struct net_device *netdev) 3113 { 3114 struct lan743x_adapter *adapter = netdev_priv(netdev); 3115 3116 lan743x_rfe_set_multicast(adapter); 3117 } 3118 3119 static int lan743x_netdev_change_mtu(struct net_device *netdev, int new_mtu) 3120 { 3121 struct lan743x_adapter *adapter = netdev_priv(netdev); 3122 int ret = 0; 3123 3124 ret = lan743x_mac_set_mtu(adapter, new_mtu); 3125 if (!ret) 3126 netdev->mtu = new_mtu; 3127 return ret; 3128 } 3129 3130 static void lan743x_netdev_get_stats64(struct net_device *netdev, 3131 struct rtnl_link_stats64 *stats) 3132 { 3133 struct lan743x_adapter *adapter = netdev_priv(netdev); 3134 3135 stats->rx_packets = lan743x_csr_read(adapter, STAT_RX_TOTAL_FRAMES); 3136 stats->tx_packets = lan743x_csr_read(adapter, STAT_TX_TOTAL_FRAMES); 3137 stats->rx_bytes = lan743x_csr_read(adapter, 3138 STAT_RX_UNICAST_BYTE_COUNT) + 3139 lan743x_csr_read(adapter, 3140 STAT_RX_BROADCAST_BYTE_COUNT) + 3141 lan743x_csr_read(adapter, 3142 STAT_RX_MULTICAST_BYTE_COUNT); 3143 stats->tx_bytes = lan743x_csr_read(adapter, 3144 STAT_TX_UNICAST_BYTE_COUNT) + 3145 lan743x_csr_read(adapter, 3146 STAT_TX_BROADCAST_BYTE_COUNT) + 3147 lan743x_csr_read(adapter, 3148 STAT_TX_MULTICAST_BYTE_COUNT); 3149 stats->rx_errors = lan743x_csr_read(adapter, STAT_RX_FCS_ERRORS) + 3150 lan743x_csr_read(adapter, 3151 STAT_RX_ALIGNMENT_ERRORS) + 3152 lan743x_csr_read(adapter, STAT_RX_JABBER_ERRORS) + 3153 lan743x_csr_read(adapter, 3154 STAT_RX_UNDERSIZE_FRAME_ERRORS) + 3155 lan743x_csr_read(adapter, 3156 STAT_RX_OVERSIZE_FRAME_ERRORS); 3157 stats->tx_errors = lan743x_csr_read(adapter, STAT_TX_FCS_ERRORS) + 3158 lan743x_csr_read(adapter, 3159 STAT_TX_EXCESS_DEFERRAL_ERRORS) + 3160 lan743x_csr_read(adapter, STAT_TX_CARRIER_ERRORS); 3161 stats->rx_dropped = lan743x_csr_read(adapter, 3162 STAT_RX_DROPPED_FRAMES); 3163 stats->tx_dropped = lan743x_csr_read(adapter, 3164 STAT_TX_EXCESSIVE_COLLISION); 3165 stats->multicast = lan743x_csr_read(adapter, 3166 STAT_RX_MULTICAST_FRAMES) + 3167 lan743x_csr_read(adapter, 3168 STAT_TX_MULTICAST_FRAMES); 3169 stats->collisions = lan743x_csr_read(adapter, 3170 STAT_TX_SINGLE_COLLISIONS) + 3171 lan743x_csr_read(adapter, 3172 STAT_TX_MULTIPLE_COLLISIONS) + 3173 lan743x_csr_read(adapter, 3174 STAT_TX_LATE_COLLISIONS); 3175 } 3176 3177 static int lan743x_netdev_set_mac_address(struct net_device *netdev, 3178 void *addr) 3179 { 3180 struct lan743x_adapter *adapter = netdev_priv(netdev); 3181 struct sockaddr *sock_addr = addr; 3182 int ret; 3183 3184 ret = eth_prepare_mac_addr_change(netdev, sock_addr); 3185 if (ret) 3186 return ret; 3187 eth_hw_addr_set(netdev, sock_addr->sa_data); 3188 lan743x_mac_set_address(adapter, sock_addr->sa_data); 3189 lan743x_rfe_update_mac_address(adapter); 3190 return 0; 3191 } 3192 3193 static const struct net_device_ops lan743x_netdev_ops = { 3194 .ndo_open = lan743x_netdev_open, 3195 .ndo_stop = lan743x_netdev_close, 3196 .ndo_start_xmit = lan743x_netdev_xmit_frame, 3197 .ndo_eth_ioctl = lan743x_netdev_ioctl, 3198 .ndo_set_rx_mode = lan743x_netdev_set_multicast, 3199 .ndo_change_mtu = lan743x_netdev_change_mtu, 3200 .ndo_get_stats64 = lan743x_netdev_get_stats64, 3201 .ndo_set_mac_address = lan743x_netdev_set_mac_address, 3202 }; 3203 3204 static void lan743x_hardware_cleanup(struct lan743x_adapter *adapter) 3205 { 3206 lan743x_csr_write(adapter, INT_EN_CLR, 0xFFFFFFFF); 3207 } 3208 3209 static void lan743x_mdiobus_cleanup(struct lan743x_adapter *adapter) 3210 { 3211 mdiobus_unregister(adapter->mdiobus); 3212 } 3213 3214 static void lan743x_full_cleanup(struct lan743x_adapter *adapter) 3215 { 3216 unregister_netdev(adapter->netdev); 3217 3218 lan743x_mdiobus_cleanup(adapter); 3219 lan743x_hardware_cleanup(adapter); 3220 lan743x_pci_cleanup(adapter); 3221 } 3222 3223 static int lan743x_hardware_init(struct lan743x_adapter *adapter, 3224 struct pci_dev *pdev) 3225 { 3226 struct lan743x_tx *tx; 3227 int index; 3228 int ret; 3229 3230 adapter->is_pci11x1x = is_pci11x1x_chip(adapter); 3231 if (adapter->is_pci11x1x) { 3232 adapter->max_tx_channels = PCI11X1X_MAX_TX_CHANNELS; 3233 adapter->used_tx_channels = PCI11X1X_USED_TX_CHANNELS; 3234 adapter->max_vector_count = PCI11X1X_MAX_VECTOR_COUNT; 3235 pci11x1x_strap_get_status(adapter); 3236 spin_lock_init(&adapter->eth_syslock_spinlock); 3237 mutex_init(&adapter->sgmii_rw_lock); 3238 } else { 3239 adapter->max_tx_channels = LAN743X_MAX_TX_CHANNELS; 3240 adapter->used_tx_channels = LAN743X_USED_TX_CHANNELS; 3241 adapter->max_vector_count = LAN743X_MAX_VECTOR_COUNT; 3242 } 3243 3244 adapter->intr.irq = adapter->pdev->irq; 3245 lan743x_csr_write(adapter, INT_EN_CLR, 0xFFFFFFFF); 3246 3247 ret = lan743x_gpio_init(adapter); 3248 if (ret) 3249 return ret; 3250 3251 ret = lan743x_mac_init(adapter); 3252 if (ret) 3253 return ret; 3254 3255 ret = lan743x_phy_init(adapter); 3256 if (ret) 3257 return ret; 3258 3259 ret = lan743x_ptp_init(adapter); 3260 if (ret) 3261 return ret; 3262 3263 lan743x_rfe_update_mac_address(adapter); 3264 3265 ret = lan743x_dmac_init(adapter); 3266 if (ret) 3267 return ret; 3268 3269 for (index = 0; index < LAN743X_USED_RX_CHANNELS; index++) { 3270 adapter->rx[index].adapter = adapter; 3271 adapter->rx[index].channel_number = index; 3272 } 3273 3274 for (index = 0; index < adapter->used_tx_channels; index++) { 3275 tx = &adapter->tx[index]; 3276 tx->adapter = adapter; 3277 tx->channel_number = index; 3278 spin_lock_init(&tx->ring_lock); 3279 } 3280 3281 return 0; 3282 } 3283 3284 static int lan743x_mdiobus_init(struct lan743x_adapter *adapter) 3285 { 3286 u32 sgmii_ctl; 3287 int ret; 3288 3289 adapter->mdiobus = devm_mdiobus_alloc(&adapter->pdev->dev); 3290 if (!(adapter->mdiobus)) { 3291 ret = -ENOMEM; 3292 goto return_error; 3293 } 3294 3295 adapter->mdiobus->priv = (void *)adapter; 3296 if (adapter->is_pci11x1x) { 3297 if (adapter->is_sgmii_en) { 3298 sgmii_ctl = lan743x_csr_read(adapter, SGMII_CTL); 3299 sgmii_ctl |= SGMII_CTL_SGMII_ENABLE_; 3300 sgmii_ctl &= ~SGMII_CTL_SGMII_POWER_DN_; 3301 lan743x_csr_write(adapter, SGMII_CTL, sgmii_ctl); 3302 netif_dbg(adapter, drv, adapter->netdev, 3303 "SGMII operation\n"); 3304 adapter->mdiobus->read = lan743x_mdiobus_read_c22; 3305 adapter->mdiobus->write = lan743x_mdiobus_write_c22; 3306 adapter->mdiobus->read_c45 = lan743x_mdiobus_read_c45; 3307 adapter->mdiobus->write_c45 = lan743x_mdiobus_write_c45; 3308 adapter->mdiobus->name = "lan743x-mdiobus-c45"; 3309 netif_dbg(adapter, drv, adapter->netdev, 3310 "lan743x-mdiobus-c45\n"); 3311 } else { 3312 sgmii_ctl = lan743x_csr_read(adapter, SGMII_CTL); 3313 sgmii_ctl &= ~SGMII_CTL_SGMII_ENABLE_; 3314 sgmii_ctl |= SGMII_CTL_SGMII_POWER_DN_; 3315 lan743x_csr_write(adapter, SGMII_CTL, sgmii_ctl); 3316 netif_dbg(adapter, drv, adapter->netdev, 3317 "RGMII operation\n"); 3318 // Only C22 support when RGMII I/F 3319 adapter->mdiobus->read = lan743x_mdiobus_read_c22; 3320 adapter->mdiobus->write = lan743x_mdiobus_write_c22; 3321 adapter->mdiobus->name = "lan743x-mdiobus"; 3322 netif_dbg(adapter, drv, adapter->netdev, 3323 "lan743x-mdiobus\n"); 3324 } 3325 } else { 3326 adapter->mdiobus->read = lan743x_mdiobus_read_c22; 3327 adapter->mdiobus->write = lan743x_mdiobus_write_c22; 3328 adapter->mdiobus->name = "lan743x-mdiobus"; 3329 netif_dbg(adapter, drv, adapter->netdev, "lan743x-mdiobus\n"); 3330 } 3331 3332 snprintf(adapter->mdiobus->id, MII_BUS_ID_SIZE, 3333 "pci-%s", pci_name(adapter->pdev)); 3334 3335 if ((adapter->csr.id_rev & ID_REV_ID_MASK_) == ID_REV_ID_LAN7430_) 3336 /* LAN7430 uses internal phy at address 1 */ 3337 adapter->mdiobus->phy_mask = ~(u32)BIT(1); 3338 3339 /* register mdiobus */ 3340 ret = mdiobus_register(adapter->mdiobus); 3341 if (ret < 0) 3342 goto return_error; 3343 return 0; 3344 3345 return_error: 3346 return ret; 3347 } 3348 3349 /* lan743x_pcidev_probe - Device Initialization Routine 3350 * @pdev: PCI device information struct 3351 * @id: entry in lan743x_pci_tbl 3352 * 3353 * Returns 0 on success, negative on failure 3354 * 3355 * initializes an adapter identified by a pci_dev structure. 3356 * The OS initialization, configuring of the adapter private structure, 3357 * and a hardware reset occur. 3358 **/ 3359 static int lan743x_pcidev_probe(struct pci_dev *pdev, 3360 const struct pci_device_id *id) 3361 { 3362 struct lan743x_adapter *adapter = NULL; 3363 struct net_device *netdev = NULL; 3364 int ret = -ENODEV; 3365 3366 if (id->device == PCI_DEVICE_ID_SMSC_A011 || 3367 id->device == PCI_DEVICE_ID_SMSC_A041) { 3368 netdev = devm_alloc_etherdev_mqs(&pdev->dev, 3369 sizeof(struct lan743x_adapter), 3370 PCI11X1X_USED_TX_CHANNELS, 3371 LAN743X_USED_RX_CHANNELS); 3372 } else { 3373 netdev = devm_alloc_etherdev_mqs(&pdev->dev, 3374 sizeof(struct lan743x_adapter), 3375 LAN743X_USED_TX_CHANNELS, 3376 LAN743X_USED_RX_CHANNELS); 3377 } 3378 3379 if (!netdev) 3380 goto return_error; 3381 3382 SET_NETDEV_DEV(netdev, &pdev->dev); 3383 pci_set_drvdata(pdev, netdev); 3384 adapter = netdev_priv(netdev); 3385 adapter->netdev = netdev; 3386 adapter->msg_enable = NETIF_MSG_DRV | NETIF_MSG_PROBE | 3387 NETIF_MSG_LINK | NETIF_MSG_IFUP | 3388 NETIF_MSG_IFDOWN | NETIF_MSG_TX_QUEUED; 3389 netdev->max_mtu = LAN743X_MAX_FRAME_SIZE; 3390 3391 of_get_mac_address(pdev->dev.of_node, adapter->mac_address); 3392 3393 ret = lan743x_pci_init(adapter, pdev); 3394 if (ret) 3395 goto return_error; 3396 3397 ret = lan743x_csr_init(adapter); 3398 if (ret) 3399 goto cleanup_pci; 3400 3401 ret = lan743x_hardware_init(adapter, pdev); 3402 if (ret) 3403 goto cleanup_pci; 3404 3405 ret = lan743x_mdiobus_init(adapter); 3406 if (ret) 3407 goto cleanup_hardware; 3408 3409 adapter->netdev->netdev_ops = &lan743x_netdev_ops; 3410 adapter->netdev->ethtool_ops = &lan743x_ethtool_ops; 3411 adapter->netdev->features = NETIF_F_SG | NETIF_F_TSO | 3412 NETIF_F_HW_CSUM | NETIF_F_RXCSUM; 3413 adapter->netdev->hw_features = adapter->netdev->features; 3414 3415 /* carrier off reporting is important to ethtool even BEFORE open */ 3416 netif_carrier_off(netdev); 3417 3418 ret = register_netdev(adapter->netdev); 3419 if (ret < 0) 3420 goto cleanup_mdiobus; 3421 return 0; 3422 3423 cleanup_mdiobus: 3424 lan743x_mdiobus_cleanup(adapter); 3425 3426 cleanup_hardware: 3427 lan743x_hardware_cleanup(adapter); 3428 3429 cleanup_pci: 3430 lan743x_pci_cleanup(adapter); 3431 3432 return_error: 3433 pr_warn("Initialization failed\n"); 3434 return ret; 3435 } 3436 3437 /** 3438 * lan743x_pcidev_remove - Device Removal Routine 3439 * @pdev: PCI device information struct 3440 * 3441 * this is called by the PCI subsystem to alert the driver 3442 * that it should release a PCI device. This could be caused by a 3443 * Hot-Plug event, or because the driver is going to be removed from 3444 * memory. 3445 **/ 3446 static void lan743x_pcidev_remove(struct pci_dev *pdev) 3447 { 3448 struct net_device *netdev = pci_get_drvdata(pdev); 3449 struct lan743x_adapter *adapter = netdev_priv(netdev); 3450 3451 lan743x_full_cleanup(adapter); 3452 } 3453 3454 static void lan743x_pcidev_shutdown(struct pci_dev *pdev) 3455 { 3456 struct net_device *netdev = pci_get_drvdata(pdev); 3457 struct lan743x_adapter *adapter = netdev_priv(netdev); 3458 3459 rtnl_lock(); 3460 netif_device_detach(netdev); 3461 3462 /* close netdev when netdev is at running state. 3463 * For instance, it is true when system goes to sleep by pm-suspend 3464 * However, it is false when system goes to sleep by suspend GUI menu 3465 */ 3466 if (netif_running(netdev)) 3467 lan743x_netdev_close(netdev); 3468 rtnl_unlock(); 3469 3470 #ifdef CONFIG_PM 3471 pci_save_state(pdev); 3472 #endif 3473 3474 /* clean up lan743x portion */ 3475 lan743x_hardware_cleanup(adapter); 3476 } 3477 3478 #ifdef CONFIG_PM_SLEEP 3479 static u16 lan743x_pm_wakeframe_crc16(const u8 *buf, int len) 3480 { 3481 return bitrev16(crc16(0xFFFF, buf, len)); 3482 } 3483 3484 static void lan743x_pm_set_wol(struct lan743x_adapter *adapter) 3485 { 3486 const u8 ipv4_multicast[3] = { 0x01, 0x00, 0x5E }; 3487 const u8 ipv6_multicast[3] = { 0x33, 0x33 }; 3488 const u8 arp_type[2] = { 0x08, 0x06 }; 3489 int mask_index; 3490 u32 sopass; 3491 u32 pmtctl; 3492 u32 wucsr; 3493 u32 macrx; 3494 u16 crc; 3495 3496 for (mask_index = 0; mask_index < MAC_NUM_OF_WUF_CFG; mask_index++) 3497 lan743x_csr_write(adapter, MAC_WUF_CFG(mask_index), 0); 3498 3499 /* clear wake settings */ 3500 pmtctl = lan743x_csr_read(adapter, PMT_CTL); 3501 pmtctl |= PMT_CTL_WUPS_MASK_; 3502 pmtctl &= ~(PMT_CTL_GPIO_WAKEUP_EN_ | PMT_CTL_EEE_WAKEUP_EN_ | 3503 PMT_CTL_WOL_EN_ | PMT_CTL_MAC_D3_RX_CLK_OVR_ | 3504 PMT_CTL_RX_FCT_RFE_D3_CLK_OVR_ | PMT_CTL_ETH_PHY_WAKE_EN_); 3505 3506 macrx = lan743x_csr_read(adapter, MAC_RX); 3507 3508 wucsr = 0; 3509 mask_index = 0; 3510 3511 pmtctl |= PMT_CTL_ETH_PHY_D3_COLD_OVR_ | PMT_CTL_ETH_PHY_D3_OVR_; 3512 3513 if (adapter->wolopts & WAKE_PHY) { 3514 pmtctl |= PMT_CTL_ETH_PHY_EDPD_PLL_CTL_; 3515 pmtctl |= PMT_CTL_ETH_PHY_WAKE_EN_; 3516 } 3517 if (adapter->wolopts & WAKE_MAGIC) { 3518 wucsr |= MAC_WUCSR_MPEN_; 3519 macrx |= MAC_RX_RXEN_; 3520 pmtctl |= PMT_CTL_WOL_EN_ | PMT_CTL_MAC_D3_RX_CLK_OVR_; 3521 } 3522 if (adapter->wolopts & WAKE_UCAST) { 3523 wucsr |= MAC_WUCSR_RFE_WAKE_EN_ | MAC_WUCSR_PFDA_EN_; 3524 macrx |= MAC_RX_RXEN_; 3525 pmtctl |= PMT_CTL_WOL_EN_ | PMT_CTL_MAC_D3_RX_CLK_OVR_; 3526 pmtctl |= PMT_CTL_RX_FCT_RFE_D3_CLK_OVR_; 3527 } 3528 if (adapter->wolopts & WAKE_BCAST) { 3529 wucsr |= MAC_WUCSR_RFE_WAKE_EN_ | MAC_WUCSR_BCST_EN_; 3530 macrx |= MAC_RX_RXEN_; 3531 pmtctl |= PMT_CTL_WOL_EN_ | PMT_CTL_MAC_D3_RX_CLK_OVR_; 3532 pmtctl |= PMT_CTL_RX_FCT_RFE_D3_CLK_OVR_; 3533 } 3534 if (adapter->wolopts & WAKE_MCAST) { 3535 /* IPv4 multicast */ 3536 crc = lan743x_pm_wakeframe_crc16(ipv4_multicast, 3); 3537 lan743x_csr_write(adapter, MAC_WUF_CFG(mask_index), 3538 MAC_WUF_CFG_EN_ | MAC_WUF_CFG_TYPE_MCAST_ | 3539 (0 << MAC_WUF_CFG_OFFSET_SHIFT_) | 3540 (crc & MAC_WUF_CFG_CRC16_MASK_)); 3541 lan743x_csr_write(adapter, MAC_WUF_MASK0(mask_index), 7); 3542 lan743x_csr_write(adapter, MAC_WUF_MASK1(mask_index), 0); 3543 lan743x_csr_write(adapter, MAC_WUF_MASK2(mask_index), 0); 3544 lan743x_csr_write(adapter, MAC_WUF_MASK3(mask_index), 0); 3545 mask_index++; 3546 3547 /* IPv6 multicast */ 3548 crc = lan743x_pm_wakeframe_crc16(ipv6_multicast, 2); 3549 lan743x_csr_write(adapter, MAC_WUF_CFG(mask_index), 3550 MAC_WUF_CFG_EN_ | MAC_WUF_CFG_TYPE_MCAST_ | 3551 (0 << MAC_WUF_CFG_OFFSET_SHIFT_) | 3552 (crc & MAC_WUF_CFG_CRC16_MASK_)); 3553 lan743x_csr_write(adapter, MAC_WUF_MASK0(mask_index), 3); 3554 lan743x_csr_write(adapter, MAC_WUF_MASK1(mask_index), 0); 3555 lan743x_csr_write(adapter, MAC_WUF_MASK2(mask_index), 0); 3556 lan743x_csr_write(adapter, MAC_WUF_MASK3(mask_index), 0); 3557 mask_index++; 3558 3559 wucsr |= MAC_WUCSR_RFE_WAKE_EN_ | MAC_WUCSR_WAKE_EN_; 3560 macrx |= MAC_RX_RXEN_; 3561 pmtctl |= PMT_CTL_WOL_EN_ | PMT_CTL_MAC_D3_RX_CLK_OVR_; 3562 pmtctl |= PMT_CTL_RX_FCT_RFE_D3_CLK_OVR_; 3563 } 3564 if (adapter->wolopts & WAKE_ARP) { 3565 /* set MAC_WUF_CFG & WUF_MASK 3566 * for packettype (offset 12,13) = ARP (0x0806) 3567 */ 3568 crc = lan743x_pm_wakeframe_crc16(arp_type, 2); 3569 lan743x_csr_write(adapter, MAC_WUF_CFG(mask_index), 3570 MAC_WUF_CFG_EN_ | MAC_WUF_CFG_TYPE_ALL_ | 3571 (0 << MAC_WUF_CFG_OFFSET_SHIFT_) | 3572 (crc & MAC_WUF_CFG_CRC16_MASK_)); 3573 lan743x_csr_write(adapter, MAC_WUF_MASK0(mask_index), 0x3000); 3574 lan743x_csr_write(adapter, MAC_WUF_MASK1(mask_index), 0); 3575 lan743x_csr_write(adapter, MAC_WUF_MASK2(mask_index), 0); 3576 lan743x_csr_write(adapter, MAC_WUF_MASK3(mask_index), 0); 3577 mask_index++; 3578 3579 wucsr |= MAC_WUCSR_RFE_WAKE_EN_ | MAC_WUCSR_WAKE_EN_; 3580 macrx |= MAC_RX_RXEN_; 3581 pmtctl |= PMT_CTL_WOL_EN_ | PMT_CTL_MAC_D3_RX_CLK_OVR_; 3582 pmtctl |= PMT_CTL_RX_FCT_RFE_D3_CLK_OVR_; 3583 } 3584 3585 if (adapter->wolopts & WAKE_MAGICSECURE) { 3586 sopass = *(u32 *)adapter->sopass; 3587 lan743x_csr_write(adapter, MAC_MP_SO_LO, sopass); 3588 sopass = *(u16 *)&adapter->sopass[4]; 3589 lan743x_csr_write(adapter, MAC_MP_SO_HI, sopass); 3590 wucsr |= MAC_MP_SO_EN_; 3591 } 3592 3593 lan743x_csr_write(adapter, MAC_WUCSR, wucsr); 3594 lan743x_csr_write(adapter, PMT_CTL, pmtctl); 3595 lan743x_csr_write(adapter, MAC_RX, macrx); 3596 } 3597 3598 static int lan743x_pm_suspend(struct device *dev) 3599 { 3600 struct pci_dev *pdev = to_pci_dev(dev); 3601 struct net_device *netdev = pci_get_drvdata(pdev); 3602 struct lan743x_adapter *adapter = netdev_priv(netdev); 3603 u32 data; 3604 3605 lan743x_pcidev_shutdown(pdev); 3606 3607 /* clear all wakes */ 3608 lan743x_csr_write(adapter, MAC_WUCSR, 0); 3609 lan743x_csr_write(adapter, MAC_WUCSR2, 0); 3610 lan743x_csr_write(adapter, MAC_WK_SRC, 0xFFFFFFFF); 3611 3612 if (adapter->wolopts) 3613 lan743x_pm_set_wol(adapter); 3614 3615 if (adapter->is_pci11x1x) { 3616 /* Save HW_CFG to config again in PM resume */ 3617 data = lan743x_csr_read(adapter, HW_CFG); 3618 adapter->hw_cfg = data; 3619 data |= (HW_CFG_RST_PROTECT_PCIE_ | 3620 HW_CFG_D3_RESET_DIS_ | 3621 HW_CFG_D3_VAUX_OVR_ | 3622 HW_CFG_HOT_RESET_DIS_ | 3623 HW_CFG_RST_PROTECT_); 3624 lan743x_csr_write(adapter, HW_CFG, data); 3625 } 3626 3627 /* Host sets PME_En, put D3hot */ 3628 return pci_prepare_to_sleep(pdev); 3629 } 3630 3631 static int lan743x_pm_resume(struct device *dev) 3632 { 3633 struct pci_dev *pdev = to_pci_dev(dev); 3634 struct net_device *netdev = pci_get_drvdata(pdev); 3635 struct lan743x_adapter *adapter = netdev_priv(netdev); 3636 int ret; 3637 3638 pci_set_power_state(pdev, PCI_D0); 3639 pci_restore_state(pdev); 3640 pci_save_state(pdev); 3641 3642 /* Restore HW_CFG that was saved during pm suspend */ 3643 if (adapter->is_pci11x1x) 3644 lan743x_csr_write(adapter, HW_CFG, adapter->hw_cfg); 3645 3646 ret = lan743x_hardware_init(adapter, pdev); 3647 if (ret) { 3648 netif_err(adapter, probe, adapter->netdev, 3649 "lan743x_hardware_init returned %d\n", ret); 3650 lan743x_pci_cleanup(adapter); 3651 return ret; 3652 } 3653 3654 /* open netdev when netdev is at running state while resume. 3655 * For instance, it is true when system wakesup after pm-suspend 3656 * However, it is false when system wakes up after suspend GUI menu 3657 */ 3658 if (netif_running(netdev)) 3659 lan743x_netdev_open(netdev); 3660 3661 netif_device_attach(netdev); 3662 ret = lan743x_csr_read(adapter, MAC_WK_SRC); 3663 netif_info(adapter, drv, adapter->netdev, 3664 "Wakeup source : 0x%08X\n", ret); 3665 3666 return 0; 3667 } 3668 3669 static const struct dev_pm_ops lan743x_pm_ops = { 3670 SET_SYSTEM_SLEEP_PM_OPS(lan743x_pm_suspend, lan743x_pm_resume) 3671 }; 3672 #endif /* CONFIG_PM_SLEEP */ 3673 3674 static const struct pci_device_id lan743x_pcidev_tbl[] = { 3675 { PCI_DEVICE(PCI_VENDOR_ID_SMSC, PCI_DEVICE_ID_SMSC_LAN7430) }, 3676 { PCI_DEVICE(PCI_VENDOR_ID_SMSC, PCI_DEVICE_ID_SMSC_LAN7431) }, 3677 { PCI_DEVICE(PCI_VENDOR_ID_SMSC, PCI_DEVICE_ID_SMSC_A011) }, 3678 { PCI_DEVICE(PCI_VENDOR_ID_SMSC, PCI_DEVICE_ID_SMSC_A041) }, 3679 { 0, } 3680 }; 3681 3682 MODULE_DEVICE_TABLE(pci, lan743x_pcidev_tbl); 3683 3684 static struct pci_driver lan743x_pcidev_driver = { 3685 .name = DRIVER_NAME, 3686 .id_table = lan743x_pcidev_tbl, 3687 .probe = lan743x_pcidev_probe, 3688 .remove = lan743x_pcidev_remove, 3689 #ifdef CONFIG_PM_SLEEP 3690 .driver.pm = &lan743x_pm_ops, 3691 #endif 3692 .shutdown = lan743x_pcidev_shutdown, 3693 }; 3694 3695 module_pci_driver(lan743x_pcidev_driver); 3696 3697 MODULE_AUTHOR(DRIVER_AUTHOR); 3698 MODULE_DESCRIPTION(DRIVER_DESC); 3699 MODULE_LICENSE("GPL"); 3700