1 /* SPDX-License-Identifier: GPL-2.0+ */ 2 /* Copyright (C) 2018 Microchip Technology Inc. */ 3 4 #include <linux/module.h> 5 #include <linux/pci.h> 6 #include <linux/netdevice.h> 7 #include <linux/etherdevice.h> 8 #include <linux/crc32.h> 9 #include <linux/microchipphy.h> 10 #include <linux/net_tstamp.h> 11 #include <linux/of_mdio.h> 12 #include <linux/of_net.h> 13 #include <linux/phy.h> 14 #include <linux/phy_fixed.h> 15 #include <linux/rtnetlink.h> 16 #include <linux/iopoll.h> 17 #include <linux/crc16.h> 18 #include "lan743x_main.h" 19 #include "lan743x_ethtool.h" 20 21 #define MMD_ACCESS_ADDRESS 0 22 #define MMD_ACCESS_WRITE 1 23 #define MMD_ACCESS_READ 2 24 #define MMD_ACCESS_READ_INC 3 25 #define PCS_POWER_STATE_DOWN 0x6 26 #define PCS_POWER_STATE_UP 0x4 27 28 static void pci11x1x_strap_get_status(struct lan743x_adapter *adapter) 29 { 30 u32 chip_rev; 31 u32 cfg_load; 32 u32 hw_cfg; 33 u32 strap; 34 int ret; 35 36 /* Timeout = 100 (i.e. 1 sec (10 msce * 100)) */ 37 ret = lan743x_hs_syslock_acquire(adapter, 100); 38 if (ret < 0) { 39 netif_err(adapter, drv, adapter->netdev, 40 "Sys Lock acquire failed ret:%d\n", ret); 41 return; 42 } 43 44 cfg_load = lan743x_csr_read(adapter, ETH_SYS_CONFIG_LOAD_STARTED_REG); 45 lan743x_hs_syslock_release(adapter); 46 hw_cfg = lan743x_csr_read(adapter, HW_CFG); 47 48 if (cfg_load & GEN_SYS_LOAD_STARTED_REG_ETH_ || 49 hw_cfg & HW_CFG_RST_PROTECT_) { 50 strap = lan743x_csr_read(adapter, STRAP_READ); 51 if (strap & STRAP_READ_SGMII_EN_) 52 adapter->is_sgmii_en = true; 53 else 54 adapter->is_sgmii_en = false; 55 } else { 56 chip_rev = lan743x_csr_read(adapter, FPGA_REV); 57 if (chip_rev) { 58 if (chip_rev & FPGA_SGMII_OP) 59 adapter->is_sgmii_en = true; 60 else 61 adapter->is_sgmii_en = false; 62 } else { 63 adapter->is_sgmii_en = false; 64 } 65 } 66 netif_dbg(adapter, drv, adapter->netdev, 67 "SGMII I/F %sable\n", adapter->is_sgmii_en ? "En" : "Dis"); 68 } 69 70 static bool is_pci11x1x_chip(struct lan743x_adapter *adapter) 71 { 72 struct lan743x_csr *csr = &adapter->csr; 73 u32 id_rev = csr->id_rev; 74 75 if (((id_rev & 0xFFFF0000) == ID_REV_ID_A011_) || 76 ((id_rev & 0xFFFF0000) == ID_REV_ID_A041_)) { 77 return true; 78 } 79 return false; 80 } 81 82 static void lan743x_pci_cleanup(struct lan743x_adapter *adapter) 83 { 84 pci_release_selected_regions(adapter->pdev, 85 pci_select_bars(adapter->pdev, 86 IORESOURCE_MEM)); 87 pci_disable_device(adapter->pdev); 88 } 89 90 static int lan743x_pci_init(struct lan743x_adapter *adapter, 91 struct pci_dev *pdev) 92 { 93 unsigned long bars = 0; 94 int ret; 95 96 adapter->pdev = pdev; 97 ret = pci_enable_device_mem(pdev); 98 if (ret) 99 goto return_error; 100 101 netif_info(adapter, probe, adapter->netdev, 102 "PCI: Vendor ID = 0x%04X, Device ID = 0x%04X\n", 103 pdev->vendor, pdev->device); 104 bars = pci_select_bars(pdev, IORESOURCE_MEM); 105 if (!test_bit(0, &bars)) 106 goto disable_device; 107 108 ret = pci_request_selected_regions(pdev, bars, DRIVER_NAME); 109 if (ret) 110 goto disable_device; 111 112 pci_set_master(pdev); 113 return 0; 114 115 disable_device: 116 pci_disable_device(adapter->pdev); 117 118 return_error: 119 return ret; 120 } 121 122 u32 lan743x_csr_read(struct lan743x_adapter *adapter, int offset) 123 { 124 return ioread32(&adapter->csr.csr_address[offset]); 125 } 126 127 void lan743x_csr_write(struct lan743x_adapter *adapter, int offset, 128 u32 data) 129 { 130 iowrite32(data, &adapter->csr.csr_address[offset]); 131 } 132 133 #define LAN743X_CSR_READ_OP(offset) lan743x_csr_read(adapter, offset) 134 135 static int lan743x_csr_light_reset(struct lan743x_adapter *adapter) 136 { 137 u32 data; 138 139 data = lan743x_csr_read(adapter, HW_CFG); 140 data |= HW_CFG_LRST_; 141 lan743x_csr_write(adapter, HW_CFG, data); 142 143 return readx_poll_timeout(LAN743X_CSR_READ_OP, HW_CFG, data, 144 !(data & HW_CFG_LRST_), 100000, 10000000); 145 } 146 147 static int lan743x_csr_wait_for_bit(struct lan743x_adapter *adapter, 148 int offset, u32 bit_mask, 149 int target_value, int usleep_min, 150 int usleep_max, int count) 151 { 152 u32 data; 153 154 return readx_poll_timeout(LAN743X_CSR_READ_OP, offset, data, 155 target_value == !!(data & bit_mask), 156 usleep_max, usleep_min * count); 157 } 158 159 static int lan743x_csr_init(struct lan743x_adapter *adapter) 160 { 161 struct lan743x_csr *csr = &adapter->csr; 162 resource_size_t bar_start, bar_length; 163 164 bar_start = pci_resource_start(adapter->pdev, 0); 165 bar_length = pci_resource_len(adapter->pdev, 0); 166 csr->csr_address = devm_ioremap(&adapter->pdev->dev, 167 bar_start, bar_length); 168 if (!csr->csr_address) 169 return -ENOMEM; 170 171 csr->id_rev = lan743x_csr_read(adapter, ID_REV); 172 csr->fpga_rev = lan743x_csr_read(adapter, FPGA_REV); 173 netif_info(adapter, probe, adapter->netdev, 174 "ID_REV = 0x%08X, FPGA_REV = %d.%d\n", 175 csr->id_rev, FPGA_REV_GET_MAJOR_(csr->fpga_rev), 176 FPGA_REV_GET_MINOR_(csr->fpga_rev)); 177 if (!ID_REV_IS_VALID_CHIP_ID_(csr->id_rev)) 178 return -ENODEV; 179 180 csr->flags = LAN743X_CSR_FLAG_SUPPORTS_INTR_AUTO_SET_CLR; 181 switch (csr->id_rev & ID_REV_CHIP_REV_MASK_) { 182 case ID_REV_CHIP_REV_A0_: 183 csr->flags |= LAN743X_CSR_FLAG_IS_A0; 184 csr->flags &= ~LAN743X_CSR_FLAG_SUPPORTS_INTR_AUTO_SET_CLR; 185 break; 186 case ID_REV_CHIP_REV_B0_: 187 csr->flags |= LAN743X_CSR_FLAG_IS_B0; 188 break; 189 } 190 191 return lan743x_csr_light_reset(adapter); 192 } 193 194 static void lan743x_intr_software_isr(struct lan743x_adapter *adapter) 195 { 196 struct lan743x_intr *intr = &adapter->intr; 197 198 /* disable the interrupt to prevent repeated re-triggering */ 199 lan743x_csr_write(adapter, INT_EN_CLR, INT_BIT_SW_GP_); 200 intr->software_isr_flag = true; 201 wake_up(&intr->software_isr_wq); 202 } 203 204 static void lan743x_tx_isr(void *context, u32 int_sts, u32 flags) 205 { 206 struct lan743x_tx *tx = context; 207 struct lan743x_adapter *adapter = tx->adapter; 208 bool enable_flag = true; 209 210 lan743x_csr_read(adapter, INT_EN_SET); 211 if (flags & LAN743X_VECTOR_FLAG_SOURCE_ENABLE_CLEAR) { 212 lan743x_csr_write(adapter, INT_EN_CLR, 213 INT_BIT_DMA_TX_(tx->channel_number)); 214 } 215 216 if (int_sts & INT_BIT_DMA_TX_(tx->channel_number)) { 217 u32 ioc_bit = DMAC_INT_BIT_TX_IOC_(tx->channel_number); 218 u32 dmac_int_sts; 219 u32 dmac_int_en; 220 221 if (flags & LAN743X_VECTOR_FLAG_SOURCE_STATUS_READ) 222 dmac_int_sts = lan743x_csr_read(adapter, DMAC_INT_STS); 223 else 224 dmac_int_sts = ioc_bit; 225 if (flags & LAN743X_VECTOR_FLAG_SOURCE_ENABLE_CHECK) 226 dmac_int_en = lan743x_csr_read(adapter, 227 DMAC_INT_EN_SET); 228 else 229 dmac_int_en = ioc_bit; 230 231 dmac_int_en &= ioc_bit; 232 dmac_int_sts &= dmac_int_en; 233 if (dmac_int_sts & ioc_bit) { 234 napi_schedule(&tx->napi); 235 enable_flag = false;/* poll func will enable later */ 236 } 237 } 238 239 if (enable_flag) 240 /* enable isr */ 241 lan743x_csr_write(adapter, INT_EN_SET, 242 INT_BIT_DMA_TX_(tx->channel_number)); 243 } 244 245 static void lan743x_rx_isr(void *context, u32 int_sts, u32 flags) 246 { 247 struct lan743x_rx *rx = context; 248 struct lan743x_adapter *adapter = rx->adapter; 249 bool enable_flag = true; 250 251 if (flags & LAN743X_VECTOR_FLAG_SOURCE_ENABLE_CLEAR) { 252 lan743x_csr_write(adapter, INT_EN_CLR, 253 INT_BIT_DMA_RX_(rx->channel_number)); 254 } 255 256 if (int_sts & INT_BIT_DMA_RX_(rx->channel_number)) { 257 u32 rx_frame_bit = DMAC_INT_BIT_RXFRM_(rx->channel_number); 258 u32 dmac_int_sts; 259 u32 dmac_int_en; 260 261 if (flags & LAN743X_VECTOR_FLAG_SOURCE_STATUS_READ) 262 dmac_int_sts = lan743x_csr_read(adapter, DMAC_INT_STS); 263 else 264 dmac_int_sts = rx_frame_bit; 265 if (flags & LAN743X_VECTOR_FLAG_SOURCE_ENABLE_CHECK) 266 dmac_int_en = lan743x_csr_read(adapter, 267 DMAC_INT_EN_SET); 268 else 269 dmac_int_en = rx_frame_bit; 270 271 dmac_int_en &= rx_frame_bit; 272 dmac_int_sts &= dmac_int_en; 273 if (dmac_int_sts & rx_frame_bit) { 274 napi_schedule(&rx->napi); 275 enable_flag = false;/* poll funct will enable later */ 276 } 277 } 278 279 if (enable_flag) { 280 /* enable isr */ 281 lan743x_csr_write(adapter, INT_EN_SET, 282 INT_BIT_DMA_RX_(rx->channel_number)); 283 } 284 } 285 286 static void lan743x_intr_shared_isr(void *context, u32 int_sts, u32 flags) 287 { 288 struct lan743x_adapter *adapter = context; 289 unsigned int channel; 290 291 if (int_sts & INT_BIT_ALL_RX_) { 292 for (channel = 0; channel < LAN743X_USED_RX_CHANNELS; 293 channel++) { 294 u32 int_bit = INT_BIT_DMA_RX_(channel); 295 296 if (int_sts & int_bit) { 297 lan743x_rx_isr(&adapter->rx[channel], 298 int_bit, flags); 299 int_sts &= ~int_bit; 300 } 301 } 302 } 303 if (int_sts & INT_BIT_ALL_TX_) { 304 for (channel = 0; channel < adapter->used_tx_channels; 305 channel++) { 306 u32 int_bit = INT_BIT_DMA_TX_(channel); 307 308 if (int_sts & int_bit) { 309 lan743x_tx_isr(&adapter->tx[channel], 310 int_bit, flags); 311 int_sts &= ~int_bit; 312 } 313 } 314 } 315 if (int_sts & INT_BIT_ALL_OTHER_) { 316 if (int_sts & INT_BIT_SW_GP_) { 317 lan743x_intr_software_isr(adapter); 318 int_sts &= ~INT_BIT_SW_GP_; 319 } 320 if (int_sts & INT_BIT_1588_) { 321 lan743x_ptp_isr(adapter); 322 int_sts &= ~INT_BIT_1588_; 323 } 324 } 325 if (int_sts) 326 lan743x_csr_write(adapter, INT_EN_CLR, int_sts); 327 } 328 329 static irqreturn_t lan743x_intr_entry_isr(int irq, void *ptr) 330 { 331 struct lan743x_vector *vector = ptr; 332 struct lan743x_adapter *adapter = vector->adapter; 333 irqreturn_t result = IRQ_NONE; 334 u32 int_enables; 335 u32 int_sts; 336 337 if (vector->flags & LAN743X_VECTOR_FLAG_SOURCE_STATUS_READ) { 338 int_sts = lan743x_csr_read(adapter, INT_STS); 339 } else if (vector->flags & 340 (LAN743X_VECTOR_FLAG_SOURCE_STATUS_R2C | 341 LAN743X_VECTOR_FLAG_SOURCE_ENABLE_R2C)) { 342 int_sts = lan743x_csr_read(adapter, INT_STS_R2C); 343 } else { 344 /* use mask as implied status */ 345 int_sts = vector->int_mask | INT_BIT_MAS_; 346 } 347 348 if (!(int_sts & INT_BIT_MAS_)) 349 goto irq_done; 350 351 if (vector->flags & LAN743X_VECTOR_FLAG_VECTOR_ENABLE_ISR_CLEAR) 352 /* disable vector interrupt */ 353 lan743x_csr_write(adapter, 354 INT_VEC_EN_CLR, 355 INT_VEC_EN_(vector->vector_index)); 356 357 if (vector->flags & LAN743X_VECTOR_FLAG_MASTER_ENABLE_CLEAR) 358 /* disable master interrupt */ 359 lan743x_csr_write(adapter, INT_EN_CLR, INT_BIT_MAS_); 360 361 if (vector->flags & LAN743X_VECTOR_FLAG_SOURCE_ENABLE_CHECK) { 362 int_enables = lan743x_csr_read(adapter, INT_EN_SET); 363 } else { 364 /* use vector mask as implied enable mask */ 365 int_enables = vector->int_mask; 366 } 367 368 int_sts &= int_enables; 369 int_sts &= vector->int_mask; 370 if (int_sts) { 371 if (vector->handler) { 372 vector->handler(vector->context, 373 int_sts, vector->flags); 374 } else { 375 /* disable interrupts on this vector */ 376 lan743x_csr_write(adapter, INT_EN_CLR, 377 vector->int_mask); 378 } 379 result = IRQ_HANDLED; 380 } 381 382 if (vector->flags & LAN743X_VECTOR_FLAG_MASTER_ENABLE_SET) 383 /* enable master interrupt */ 384 lan743x_csr_write(adapter, INT_EN_SET, INT_BIT_MAS_); 385 386 if (vector->flags & LAN743X_VECTOR_FLAG_VECTOR_ENABLE_ISR_SET) 387 /* enable vector interrupt */ 388 lan743x_csr_write(adapter, 389 INT_VEC_EN_SET, 390 INT_VEC_EN_(vector->vector_index)); 391 irq_done: 392 return result; 393 } 394 395 static int lan743x_intr_test_isr(struct lan743x_adapter *adapter) 396 { 397 struct lan743x_intr *intr = &adapter->intr; 398 int ret; 399 400 intr->software_isr_flag = false; 401 402 /* enable and activate test interrupt */ 403 lan743x_csr_write(adapter, INT_EN_SET, INT_BIT_SW_GP_); 404 lan743x_csr_write(adapter, INT_SET, INT_BIT_SW_GP_); 405 406 ret = wait_event_timeout(intr->software_isr_wq, 407 intr->software_isr_flag, 408 msecs_to_jiffies(200)); 409 410 /* disable test interrupt */ 411 lan743x_csr_write(adapter, INT_EN_CLR, INT_BIT_SW_GP_); 412 413 return ret > 0 ? 0 : -ENODEV; 414 } 415 416 static int lan743x_intr_register_isr(struct lan743x_adapter *adapter, 417 int vector_index, u32 flags, 418 u32 int_mask, 419 lan743x_vector_handler handler, 420 void *context) 421 { 422 struct lan743x_vector *vector = &adapter->intr.vector_list 423 [vector_index]; 424 int ret; 425 426 vector->adapter = adapter; 427 vector->flags = flags; 428 vector->vector_index = vector_index; 429 vector->int_mask = int_mask; 430 vector->handler = handler; 431 vector->context = context; 432 433 ret = request_irq(vector->irq, 434 lan743x_intr_entry_isr, 435 (flags & LAN743X_VECTOR_FLAG_IRQ_SHARED) ? 436 IRQF_SHARED : 0, DRIVER_NAME, vector); 437 if (ret) { 438 vector->handler = NULL; 439 vector->context = NULL; 440 vector->int_mask = 0; 441 vector->flags = 0; 442 } 443 return ret; 444 } 445 446 static void lan743x_intr_unregister_isr(struct lan743x_adapter *adapter, 447 int vector_index) 448 { 449 struct lan743x_vector *vector = &adapter->intr.vector_list 450 [vector_index]; 451 452 free_irq(vector->irq, vector); 453 vector->handler = NULL; 454 vector->context = NULL; 455 vector->int_mask = 0; 456 vector->flags = 0; 457 } 458 459 static u32 lan743x_intr_get_vector_flags(struct lan743x_adapter *adapter, 460 u32 int_mask) 461 { 462 int index; 463 464 for (index = 0; index < adapter->max_vector_count; index++) { 465 if (adapter->intr.vector_list[index].int_mask & int_mask) 466 return adapter->intr.vector_list[index].flags; 467 } 468 return 0; 469 } 470 471 static void lan743x_intr_close(struct lan743x_adapter *adapter) 472 { 473 struct lan743x_intr *intr = &adapter->intr; 474 int index = 0; 475 476 lan743x_csr_write(adapter, INT_EN_CLR, INT_BIT_MAS_); 477 if (adapter->is_pci11x1x) 478 lan743x_csr_write(adapter, INT_VEC_EN_CLR, 0x0000FFFF); 479 else 480 lan743x_csr_write(adapter, INT_VEC_EN_CLR, 0x000000FF); 481 482 for (index = 0; index < intr->number_of_vectors; index++) { 483 if (intr->flags & INTR_FLAG_IRQ_REQUESTED(index)) { 484 lan743x_intr_unregister_isr(adapter, index); 485 intr->flags &= ~INTR_FLAG_IRQ_REQUESTED(index); 486 } 487 } 488 489 if (intr->flags & INTR_FLAG_MSI_ENABLED) { 490 pci_disable_msi(adapter->pdev); 491 intr->flags &= ~INTR_FLAG_MSI_ENABLED; 492 } 493 494 if (intr->flags & INTR_FLAG_MSIX_ENABLED) { 495 pci_disable_msix(adapter->pdev); 496 intr->flags &= ~INTR_FLAG_MSIX_ENABLED; 497 } 498 } 499 500 static int lan743x_intr_open(struct lan743x_adapter *adapter) 501 { 502 struct msix_entry msix_entries[PCI11X1X_MAX_VECTOR_COUNT]; 503 struct lan743x_intr *intr = &adapter->intr; 504 unsigned int used_tx_channels; 505 u32 int_vec_en_auto_clr = 0; 506 u8 max_vector_count; 507 u32 int_vec_map0 = 0; 508 u32 int_vec_map1 = 0; 509 int ret = -ENODEV; 510 int index = 0; 511 u32 flags = 0; 512 513 intr->number_of_vectors = 0; 514 515 /* Try to set up MSIX interrupts */ 516 max_vector_count = adapter->max_vector_count; 517 memset(&msix_entries[0], 0, 518 sizeof(struct msix_entry) * max_vector_count); 519 for (index = 0; index < max_vector_count; index++) 520 msix_entries[index].entry = index; 521 used_tx_channels = adapter->used_tx_channels; 522 ret = pci_enable_msix_range(adapter->pdev, 523 msix_entries, 1, 524 1 + used_tx_channels + 525 LAN743X_USED_RX_CHANNELS); 526 527 if (ret > 0) { 528 intr->flags |= INTR_FLAG_MSIX_ENABLED; 529 intr->number_of_vectors = ret; 530 intr->using_vectors = true; 531 for (index = 0; index < intr->number_of_vectors; index++) 532 intr->vector_list[index].irq = msix_entries 533 [index].vector; 534 netif_info(adapter, ifup, adapter->netdev, 535 "using MSIX interrupts, number of vectors = %d\n", 536 intr->number_of_vectors); 537 } 538 539 /* If MSIX failed try to setup using MSI interrupts */ 540 if (!intr->number_of_vectors) { 541 if (!(adapter->csr.flags & LAN743X_CSR_FLAG_IS_A0)) { 542 if (!pci_enable_msi(adapter->pdev)) { 543 intr->flags |= INTR_FLAG_MSI_ENABLED; 544 intr->number_of_vectors = 1; 545 intr->using_vectors = true; 546 intr->vector_list[0].irq = 547 adapter->pdev->irq; 548 netif_info(adapter, ifup, adapter->netdev, 549 "using MSI interrupts, number of vectors = %d\n", 550 intr->number_of_vectors); 551 } 552 } 553 } 554 555 /* If MSIX, and MSI failed, setup using legacy interrupt */ 556 if (!intr->number_of_vectors) { 557 intr->number_of_vectors = 1; 558 intr->using_vectors = false; 559 intr->vector_list[0].irq = intr->irq; 560 netif_info(adapter, ifup, adapter->netdev, 561 "using legacy interrupts\n"); 562 } 563 564 /* At this point we must have at least one irq */ 565 lan743x_csr_write(adapter, INT_VEC_EN_CLR, 0xFFFFFFFF); 566 567 /* map all interrupts to vector 0 */ 568 lan743x_csr_write(adapter, INT_VEC_MAP0, 0x00000000); 569 lan743x_csr_write(adapter, INT_VEC_MAP1, 0x00000000); 570 lan743x_csr_write(adapter, INT_VEC_MAP2, 0x00000000); 571 flags = LAN743X_VECTOR_FLAG_SOURCE_STATUS_READ | 572 LAN743X_VECTOR_FLAG_SOURCE_STATUS_W2C | 573 LAN743X_VECTOR_FLAG_SOURCE_ENABLE_CHECK | 574 LAN743X_VECTOR_FLAG_SOURCE_ENABLE_CLEAR; 575 576 if (intr->using_vectors) { 577 flags |= LAN743X_VECTOR_FLAG_VECTOR_ENABLE_ISR_CLEAR | 578 LAN743X_VECTOR_FLAG_VECTOR_ENABLE_ISR_SET; 579 } else { 580 flags |= LAN743X_VECTOR_FLAG_MASTER_ENABLE_CLEAR | 581 LAN743X_VECTOR_FLAG_MASTER_ENABLE_SET | 582 LAN743X_VECTOR_FLAG_IRQ_SHARED; 583 } 584 585 if (adapter->csr.flags & LAN743X_CSR_FLAG_SUPPORTS_INTR_AUTO_SET_CLR) { 586 flags &= ~LAN743X_VECTOR_FLAG_SOURCE_STATUS_READ; 587 flags &= ~LAN743X_VECTOR_FLAG_SOURCE_STATUS_W2C; 588 flags &= ~LAN743X_VECTOR_FLAG_SOURCE_ENABLE_CLEAR; 589 flags &= ~LAN743X_VECTOR_FLAG_SOURCE_ENABLE_CHECK; 590 flags |= LAN743X_VECTOR_FLAG_SOURCE_STATUS_R2C; 591 flags |= LAN743X_VECTOR_FLAG_SOURCE_ENABLE_R2C; 592 } 593 594 init_waitqueue_head(&intr->software_isr_wq); 595 596 ret = lan743x_intr_register_isr(adapter, 0, flags, 597 INT_BIT_ALL_RX_ | INT_BIT_ALL_TX_ | 598 INT_BIT_ALL_OTHER_, 599 lan743x_intr_shared_isr, adapter); 600 if (ret) 601 goto clean_up; 602 intr->flags |= INTR_FLAG_IRQ_REQUESTED(0); 603 604 if (intr->using_vectors) 605 lan743x_csr_write(adapter, INT_VEC_EN_SET, 606 INT_VEC_EN_(0)); 607 608 if (!(adapter->csr.flags & LAN743X_CSR_FLAG_IS_A0)) { 609 lan743x_csr_write(adapter, INT_MOD_CFG0, LAN743X_INT_MOD); 610 lan743x_csr_write(adapter, INT_MOD_CFG1, LAN743X_INT_MOD); 611 lan743x_csr_write(adapter, INT_MOD_CFG2, LAN743X_INT_MOD); 612 lan743x_csr_write(adapter, INT_MOD_CFG3, LAN743X_INT_MOD); 613 lan743x_csr_write(adapter, INT_MOD_CFG4, LAN743X_INT_MOD); 614 lan743x_csr_write(adapter, INT_MOD_CFG5, LAN743X_INT_MOD); 615 lan743x_csr_write(adapter, INT_MOD_CFG6, LAN743X_INT_MOD); 616 lan743x_csr_write(adapter, INT_MOD_CFG7, LAN743X_INT_MOD); 617 if (adapter->is_pci11x1x) { 618 lan743x_csr_write(adapter, INT_MOD_CFG8, LAN743X_INT_MOD); 619 lan743x_csr_write(adapter, INT_MOD_CFG9, LAN743X_INT_MOD); 620 lan743x_csr_write(adapter, INT_MOD_MAP0, 0x00007654); 621 lan743x_csr_write(adapter, INT_MOD_MAP1, 0x00003210); 622 } else { 623 lan743x_csr_write(adapter, INT_MOD_MAP0, 0x00005432); 624 lan743x_csr_write(adapter, INT_MOD_MAP1, 0x00000001); 625 } 626 lan743x_csr_write(adapter, INT_MOD_MAP2, 0x00FFFFFF); 627 } 628 629 /* enable interrupts */ 630 lan743x_csr_write(adapter, INT_EN_SET, INT_BIT_MAS_); 631 ret = lan743x_intr_test_isr(adapter); 632 if (ret) 633 goto clean_up; 634 635 if (intr->number_of_vectors > 1) { 636 int number_of_tx_vectors = intr->number_of_vectors - 1; 637 638 if (number_of_tx_vectors > used_tx_channels) 639 number_of_tx_vectors = used_tx_channels; 640 flags = LAN743X_VECTOR_FLAG_SOURCE_STATUS_READ | 641 LAN743X_VECTOR_FLAG_SOURCE_STATUS_W2C | 642 LAN743X_VECTOR_FLAG_SOURCE_ENABLE_CHECK | 643 LAN743X_VECTOR_FLAG_SOURCE_ENABLE_CLEAR | 644 LAN743X_VECTOR_FLAG_VECTOR_ENABLE_ISR_CLEAR | 645 LAN743X_VECTOR_FLAG_VECTOR_ENABLE_ISR_SET; 646 647 if (adapter->csr.flags & 648 LAN743X_CSR_FLAG_SUPPORTS_INTR_AUTO_SET_CLR) { 649 flags = LAN743X_VECTOR_FLAG_VECTOR_ENABLE_AUTO_SET | 650 LAN743X_VECTOR_FLAG_SOURCE_ENABLE_AUTO_SET | 651 LAN743X_VECTOR_FLAG_SOURCE_ENABLE_AUTO_CLEAR | 652 LAN743X_VECTOR_FLAG_SOURCE_STATUS_AUTO_CLEAR; 653 } 654 655 for (index = 0; index < number_of_tx_vectors; index++) { 656 u32 int_bit = INT_BIT_DMA_TX_(index); 657 int vector = index + 1; 658 659 /* map TX interrupt to vector */ 660 int_vec_map1 |= INT_VEC_MAP1_TX_VEC_(index, vector); 661 lan743x_csr_write(adapter, INT_VEC_MAP1, int_vec_map1); 662 663 /* Remove TX interrupt from shared mask */ 664 intr->vector_list[0].int_mask &= ~int_bit; 665 ret = lan743x_intr_register_isr(adapter, vector, flags, 666 int_bit, lan743x_tx_isr, 667 &adapter->tx[index]); 668 if (ret) 669 goto clean_up; 670 intr->flags |= INTR_FLAG_IRQ_REQUESTED(vector); 671 if (!(flags & 672 LAN743X_VECTOR_FLAG_VECTOR_ENABLE_AUTO_SET)) 673 lan743x_csr_write(adapter, INT_VEC_EN_SET, 674 INT_VEC_EN_(vector)); 675 } 676 } 677 if ((intr->number_of_vectors - used_tx_channels) > 1) { 678 int number_of_rx_vectors = intr->number_of_vectors - 679 used_tx_channels - 1; 680 681 if (number_of_rx_vectors > LAN743X_USED_RX_CHANNELS) 682 number_of_rx_vectors = LAN743X_USED_RX_CHANNELS; 683 684 flags = LAN743X_VECTOR_FLAG_SOURCE_STATUS_READ | 685 LAN743X_VECTOR_FLAG_SOURCE_STATUS_W2C | 686 LAN743X_VECTOR_FLAG_SOURCE_ENABLE_CHECK | 687 LAN743X_VECTOR_FLAG_SOURCE_ENABLE_CLEAR | 688 LAN743X_VECTOR_FLAG_VECTOR_ENABLE_ISR_CLEAR | 689 LAN743X_VECTOR_FLAG_VECTOR_ENABLE_ISR_SET; 690 691 if (adapter->csr.flags & 692 LAN743X_CSR_FLAG_SUPPORTS_INTR_AUTO_SET_CLR) { 693 flags = LAN743X_VECTOR_FLAG_VECTOR_ENABLE_AUTO_CLEAR | 694 LAN743X_VECTOR_FLAG_VECTOR_ENABLE_AUTO_SET | 695 LAN743X_VECTOR_FLAG_SOURCE_ENABLE_AUTO_SET | 696 LAN743X_VECTOR_FLAG_SOURCE_ENABLE_AUTO_CLEAR | 697 LAN743X_VECTOR_FLAG_SOURCE_STATUS_AUTO_CLEAR; 698 } 699 for (index = 0; index < number_of_rx_vectors; index++) { 700 int vector = index + 1 + used_tx_channels; 701 u32 int_bit = INT_BIT_DMA_RX_(index); 702 703 /* map RX interrupt to vector */ 704 int_vec_map0 |= INT_VEC_MAP0_RX_VEC_(index, vector); 705 lan743x_csr_write(adapter, INT_VEC_MAP0, int_vec_map0); 706 if (flags & 707 LAN743X_VECTOR_FLAG_VECTOR_ENABLE_AUTO_CLEAR) { 708 int_vec_en_auto_clr |= INT_VEC_EN_(vector); 709 lan743x_csr_write(adapter, INT_VEC_EN_AUTO_CLR, 710 int_vec_en_auto_clr); 711 } 712 713 /* Remove RX interrupt from shared mask */ 714 intr->vector_list[0].int_mask &= ~int_bit; 715 ret = lan743x_intr_register_isr(adapter, vector, flags, 716 int_bit, lan743x_rx_isr, 717 &adapter->rx[index]); 718 if (ret) 719 goto clean_up; 720 intr->flags |= INTR_FLAG_IRQ_REQUESTED(vector); 721 722 lan743x_csr_write(adapter, INT_VEC_EN_SET, 723 INT_VEC_EN_(vector)); 724 } 725 } 726 return 0; 727 728 clean_up: 729 lan743x_intr_close(adapter); 730 return ret; 731 } 732 733 static int lan743x_dp_write(struct lan743x_adapter *adapter, 734 u32 select, u32 addr, u32 length, u32 *buf) 735 { 736 u32 dp_sel; 737 int i; 738 739 if (lan743x_csr_wait_for_bit(adapter, DP_SEL, DP_SEL_DPRDY_, 740 1, 40, 100, 100)) 741 return -EIO; 742 dp_sel = lan743x_csr_read(adapter, DP_SEL); 743 dp_sel &= ~DP_SEL_MASK_; 744 dp_sel |= select; 745 lan743x_csr_write(adapter, DP_SEL, dp_sel); 746 747 for (i = 0; i < length; i++) { 748 lan743x_csr_write(adapter, DP_ADDR, addr + i); 749 lan743x_csr_write(adapter, DP_DATA_0, buf[i]); 750 lan743x_csr_write(adapter, DP_CMD, DP_CMD_WRITE_); 751 if (lan743x_csr_wait_for_bit(adapter, DP_SEL, DP_SEL_DPRDY_, 752 1, 40, 100, 100)) 753 return -EIO; 754 } 755 756 return 0; 757 } 758 759 static u32 lan743x_mac_mii_access(u16 id, u16 index, int read) 760 { 761 u32 ret; 762 763 ret = (id << MAC_MII_ACC_PHY_ADDR_SHIFT_) & 764 MAC_MII_ACC_PHY_ADDR_MASK_; 765 ret |= (index << MAC_MII_ACC_MIIRINDA_SHIFT_) & 766 MAC_MII_ACC_MIIRINDA_MASK_; 767 768 if (read) 769 ret |= MAC_MII_ACC_MII_READ_; 770 else 771 ret |= MAC_MII_ACC_MII_WRITE_; 772 ret |= MAC_MII_ACC_MII_BUSY_; 773 774 return ret; 775 } 776 777 static int lan743x_mac_mii_wait_till_not_busy(struct lan743x_adapter *adapter) 778 { 779 u32 data; 780 781 return readx_poll_timeout(LAN743X_CSR_READ_OP, MAC_MII_ACC, data, 782 !(data & MAC_MII_ACC_MII_BUSY_), 0, 1000000); 783 } 784 785 static int lan743x_mdiobus_read_c22(struct mii_bus *bus, int phy_id, int index) 786 { 787 struct lan743x_adapter *adapter = bus->priv; 788 u32 val, mii_access; 789 int ret; 790 791 /* comfirm MII not busy */ 792 ret = lan743x_mac_mii_wait_till_not_busy(adapter); 793 if (ret < 0) 794 return ret; 795 796 /* set the address, index & direction (read from PHY) */ 797 mii_access = lan743x_mac_mii_access(phy_id, index, MAC_MII_READ); 798 lan743x_csr_write(adapter, MAC_MII_ACC, mii_access); 799 ret = lan743x_mac_mii_wait_till_not_busy(adapter); 800 if (ret < 0) 801 return ret; 802 803 val = lan743x_csr_read(adapter, MAC_MII_DATA); 804 return (int)(val & 0xFFFF); 805 } 806 807 static int lan743x_mdiobus_write_c22(struct mii_bus *bus, 808 int phy_id, int index, u16 regval) 809 { 810 struct lan743x_adapter *adapter = bus->priv; 811 u32 val, mii_access; 812 int ret; 813 814 /* confirm MII not busy */ 815 ret = lan743x_mac_mii_wait_till_not_busy(adapter); 816 if (ret < 0) 817 return ret; 818 val = (u32)regval; 819 lan743x_csr_write(adapter, MAC_MII_DATA, val); 820 821 /* set the address, index & direction (write to PHY) */ 822 mii_access = lan743x_mac_mii_access(phy_id, index, MAC_MII_WRITE); 823 lan743x_csr_write(adapter, MAC_MII_ACC, mii_access); 824 ret = lan743x_mac_mii_wait_till_not_busy(adapter); 825 return ret; 826 } 827 828 static u32 lan743x_mac_mmd_access(int id, int dev_addr, int op) 829 { 830 u32 ret; 831 832 ret = (id << MAC_MII_ACC_PHY_ADDR_SHIFT_) & 833 MAC_MII_ACC_PHY_ADDR_MASK_; 834 ret |= (dev_addr << MAC_MII_ACC_MIIMMD_SHIFT_) & 835 MAC_MII_ACC_MIIMMD_MASK_; 836 if (op == MMD_ACCESS_WRITE) 837 ret |= MAC_MII_ACC_MIICMD_WRITE_; 838 else if (op == MMD_ACCESS_READ) 839 ret |= MAC_MII_ACC_MIICMD_READ_; 840 else if (op == MMD_ACCESS_READ_INC) 841 ret |= MAC_MII_ACC_MIICMD_READ_INC_; 842 else 843 ret |= MAC_MII_ACC_MIICMD_ADDR_; 844 ret |= (MAC_MII_ACC_MII_BUSY_ | MAC_MII_ACC_MIICL45_); 845 846 return ret; 847 } 848 849 static int lan743x_mdiobus_read_c45(struct mii_bus *bus, int phy_id, 850 int dev_addr, int index) 851 { 852 struct lan743x_adapter *adapter = bus->priv; 853 u32 mmd_access; 854 int ret; 855 856 /* comfirm MII not busy */ 857 ret = lan743x_mac_mii_wait_till_not_busy(adapter); 858 if (ret < 0) 859 return ret; 860 861 /* Load Register Address */ 862 lan743x_csr_write(adapter, MAC_MII_DATA, index); 863 mmd_access = lan743x_mac_mmd_access(phy_id, dev_addr, 864 MMD_ACCESS_ADDRESS); 865 lan743x_csr_write(adapter, MAC_MII_ACC, mmd_access); 866 ret = lan743x_mac_mii_wait_till_not_busy(adapter); 867 if (ret < 0) 868 return ret; 869 870 /* Read Data */ 871 mmd_access = lan743x_mac_mmd_access(phy_id, dev_addr, 872 MMD_ACCESS_READ); 873 lan743x_csr_write(adapter, MAC_MII_ACC, mmd_access); 874 ret = lan743x_mac_mii_wait_till_not_busy(adapter); 875 if (ret < 0) 876 return ret; 877 878 ret = lan743x_csr_read(adapter, MAC_MII_DATA); 879 return (int)(ret & 0xFFFF); 880 } 881 882 static int lan743x_mdiobus_write_c45(struct mii_bus *bus, int phy_id, 883 int dev_addr, int index, u16 regval) 884 { 885 struct lan743x_adapter *adapter = bus->priv; 886 u32 mmd_access; 887 int ret; 888 889 /* confirm MII not busy */ 890 ret = lan743x_mac_mii_wait_till_not_busy(adapter); 891 if (ret < 0) 892 return ret; 893 894 /* Load Register Address */ 895 lan743x_csr_write(adapter, MAC_MII_DATA, (u32)index); 896 mmd_access = lan743x_mac_mmd_access(phy_id, dev_addr, 897 MMD_ACCESS_ADDRESS); 898 lan743x_csr_write(adapter, MAC_MII_ACC, mmd_access); 899 ret = lan743x_mac_mii_wait_till_not_busy(adapter); 900 if (ret < 0) 901 return ret; 902 903 /* Write Data */ 904 lan743x_csr_write(adapter, MAC_MII_DATA, (u32)regval); 905 mmd_access = lan743x_mac_mmd_access(phy_id, dev_addr, 906 MMD_ACCESS_WRITE); 907 lan743x_csr_write(adapter, MAC_MII_ACC, mmd_access); 908 909 return lan743x_mac_mii_wait_till_not_busy(adapter); 910 } 911 912 static int lan743x_sgmii_wait_till_not_busy(struct lan743x_adapter *adapter) 913 { 914 u32 data; 915 int ret; 916 917 ret = readx_poll_timeout(LAN743X_CSR_READ_OP, SGMII_ACC, data, 918 !(data & SGMII_ACC_SGMII_BZY_), 100, 1000000); 919 if (ret < 0) 920 netif_err(adapter, drv, adapter->netdev, 921 "%s: error %d sgmii wait timeout\n", __func__, ret); 922 923 return ret; 924 } 925 926 int lan743x_sgmii_read(struct lan743x_adapter *adapter, u8 mmd, u16 addr) 927 { 928 u32 mmd_access; 929 int ret; 930 u32 val; 931 932 if (mmd > 31) { 933 netif_err(adapter, probe, adapter->netdev, 934 "%s mmd should <= 31\n", __func__); 935 return -EINVAL; 936 } 937 938 mutex_lock(&adapter->sgmii_rw_lock); 939 /* Load Register Address */ 940 mmd_access = mmd << SGMII_ACC_SGMII_MMD_SHIFT_; 941 mmd_access |= (addr | SGMII_ACC_SGMII_BZY_); 942 lan743x_csr_write(adapter, SGMII_ACC, mmd_access); 943 ret = lan743x_sgmii_wait_till_not_busy(adapter); 944 if (ret < 0) 945 goto sgmii_unlock; 946 947 val = lan743x_csr_read(adapter, SGMII_DATA); 948 ret = (int)(val & SGMII_DATA_MASK_); 949 950 sgmii_unlock: 951 mutex_unlock(&adapter->sgmii_rw_lock); 952 953 return ret; 954 } 955 956 static int lan743x_sgmii_write(struct lan743x_adapter *adapter, 957 u8 mmd, u16 addr, u16 val) 958 { 959 u32 mmd_access; 960 int ret; 961 962 if (mmd > 31) { 963 netif_err(adapter, probe, adapter->netdev, 964 "%s mmd should <= 31\n", __func__); 965 return -EINVAL; 966 } 967 mutex_lock(&adapter->sgmii_rw_lock); 968 /* Load Register Data */ 969 lan743x_csr_write(adapter, SGMII_DATA, (u32)(val & SGMII_DATA_MASK_)); 970 /* Load Register Address */ 971 mmd_access = mmd << SGMII_ACC_SGMII_MMD_SHIFT_; 972 mmd_access |= (addr | SGMII_ACC_SGMII_BZY_ | SGMII_ACC_SGMII_WR_); 973 lan743x_csr_write(adapter, SGMII_ACC, mmd_access); 974 ret = lan743x_sgmii_wait_till_not_busy(adapter); 975 mutex_unlock(&adapter->sgmii_rw_lock); 976 977 return ret; 978 } 979 980 static int lan743x_sgmii_mpll_set(struct lan743x_adapter *adapter, 981 u16 baud) 982 { 983 int mpllctrl0; 984 int mpllctrl1; 985 int miscctrl1; 986 int ret; 987 988 mpllctrl0 = lan743x_sgmii_read(adapter, MDIO_MMD_VEND2, 989 VR_MII_GEN2_4_MPLL_CTRL0); 990 if (mpllctrl0 < 0) 991 return mpllctrl0; 992 993 mpllctrl0 &= ~VR_MII_MPLL_CTRL0_USE_REFCLK_PAD_; 994 if (baud == VR_MII_BAUD_RATE_1P25GBPS) { 995 mpllctrl1 = VR_MII_MPLL_MULTIPLIER_100; 996 /* mpll_baud_clk/4 */ 997 miscctrl1 = 0xA; 998 } else { 999 mpllctrl1 = VR_MII_MPLL_MULTIPLIER_125; 1000 /* mpll_baud_clk/2 */ 1001 miscctrl1 = 0x5; 1002 } 1003 1004 ret = lan743x_sgmii_write(adapter, MDIO_MMD_VEND2, 1005 VR_MII_GEN2_4_MPLL_CTRL0, mpllctrl0); 1006 if (ret < 0) 1007 return ret; 1008 1009 ret = lan743x_sgmii_write(adapter, MDIO_MMD_VEND2, 1010 VR_MII_GEN2_4_MPLL_CTRL1, mpllctrl1); 1011 if (ret < 0) 1012 return ret; 1013 1014 return lan743x_sgmii_write(adapter, MDIO_MMD_VEND2, 1015 VR_MII_GEN2_4_MISC_CTRL1, miscctrl1); 1016 } 1017 1018 static int lan743x_sgmii_2_5G_mode_set(struct lan743x_adapter *adapter, 1019 bool enable) 1020 { 1021 if (enable) 1022 return lan743x_sgmii_mpll_set(adapter, 1023 VR_MII_BAUD_RATE_3P125GBPS); 1024 else 1025 return lan743x_sgmii_mpll_set(adapter, 1026 VR_MII_BAUD_RATE_1P25GBPS); 1027 } 1028 1029 static int lan743x_is_sgmii_2_5G_mode(struct lan743x_adapter *adapter, 1030 bool *status) 1031 { 1032 int ret; 1033 1034 ret = lan743x_sgmii_read(adapter, MDIO_MMD_VEND2, 1035 VR_MII_GEN2_4_MPLL_CTRL1); 1036 if (ret < 0) 1037 return ret; 1038 1039 if (ret == VR_MII_MPLL_MULTIPLIER_125 || 1040 ret == VR_MII_MPLL_MULTIPLIER_50) 1041 *status = true; 1042 else 1043 *status = false; 1044 1045 return 0; 1046 } 1047 1048 static int lan743x_sgmii_aneg_update(struct lan743x_adapter *adapter) 1049 { 1050 enum lan743x_sgmii_lsd lsd = adapter->sgmii_lsd; 1051 int mii_ctrl; 1052 int dgt_ctrl; 1053 int an_ctrl; 1054 int ret; 1055 1056 if (lsd == LINK_2500_MASTER || lsd == LINK_2500_SLAVE) 1057 /* Switch to 2.5 Gbps */ 1058 ret = lan743x_sgmii_2_5G_mode_set(adapter, true); 1059 else 1060 /* Switch to 10/100/1000 Mbps clock */ 1061 ret = lan743x_sgmii_2_5G_mode_set(adapter, false); 1062 if (ret < 0) 1063 return ret; 1064 1065 /* Enable SGMII Auto NEG */ 1066 mii_ctrl = lan743x_sgmii_read(adapter, MDIO_MMD_VEND2, MII_BMCR); 1067 if (mii_ctrl < 0) 1068 return mii_ctrl; 1069 1070 an_ctrl = lan743x_sgmii_read(adapter, MDIO_MMD_VEND2, VR_MII_AN_CTRL); 1071 if (an_ctrl < 0) 1072 return an_ctrl; 1073 1074 dgt_ctrl = lan743x_sgmii_read(adapter, MDIO_MMD_VEND2, 1075 VR_MII_DIG_CTRL1); 1076 if (dgt_ctrl < 0) 1077 return dgt_ctrl; 1078 1079 if (lsd == LINK_2500_MASTER || lsd == LINK_2500_SLAVE) { 1080 mii_ctrl &= ~(BMCR_ANENABLE | BMCR_ANRESTART | BMCR_SPEED100); 1081 mii_ctrl |= BMCR_SPEED1000; 1082 dgt_ctrl |= VR_MII_DIG_CTRL1_CL37_TMR_OVR_RIDE_; 1083 dgt_ctrl &= ~VR_MII_DIG_CTRL1_MAC_AUTO_SW_; 1084 /* In order for Auto-Negotiation to operate properly at 1085 * 2.5 Gbps the 1.6ms link timer values must be adjusted 1086 * The VR_MII_LINK_TIMER_CTRL Register must be set to 1087 * 16'h7A1 and The CL37_TMR_OVR_RIDE bit of the 1088 * VR_MII_DIG_CTRL1 Register set to 1 1089 */ 1090 ret = lan743x_sgmii_write(adapter, MDIO_MMD_VEND2, 1091 VR_MII_LINK_TIMER_CTRL, 0x7A1); 1092 if (ret < 0) 1093 return ret; 1094 } else { 1095 mii_ctrl |= (BMCR_ANENABLE | BMCR_ANRESTART); 1096 an_ctrl &= ~VR_MII_AN_CTRL_SGMII_LINK_STS_; 1097 dgt_ctrl &= ~VR_MII_DIG_CTRL1_CL37_TMR_OVR_RIDE_; 1098 dgt_ctrl |= VR_MII_DIG_CTRL1_MAC_AUTO_SW_; 1099 } 1100 1101 ret = lan743x_sgmii_write(adapter, MDIO_MMD_VEND2, MII_BMCR, 1102 mii_ctrl); 1103 if (ret < 0) 1104 return ret; 1105 1106 ret = lan743x_sgmii_write(adapter, MDIO_MMD_VEND2, 1107 VR_MII_DIG_CTRL1, dgt_ctrl); 1108 if (ret < 0) 1109 return ret; 1110 1111 return lan743x_sgmii_write(adapter, MDIO_MMD_VEND2, 1112 VR_MII_AN_CTRL, an_ctrl); 1113 } 1114 1115 static int lan743x_pcs_seq_state(struct lan743x_adapter *adapter, u8 state) 1116 { 1117 u8 wait_cnt = 0; 1118 u32 dig_sts; 1119 1120 do { 1121 dig_sts = lan743x_sgmii_read(adapter, MDIO_MMD_VEND2, 1122 VR_MII_DIG_STS); 1123 if (((dig_sts & VR_MII_DIG_STS_PSEQ_STATE_MASK_) >> 1124 VR_MII_DIG_STS_PSEQ_STATE_POS_) == state) 1125 break; 1126 usleep_range(1000, 2000); 1127 } while (wait_cnt++ < 10); 1128 1129 if (wait_cnt >= 10) 1130 return -ETIMEDOUT; 1131 1132 return 0; 1133 } 1134 1135 static int lan743x_sgmii_config(struct lan743x_adapter *adapter) 1136 { 1137 struct net_device *netdev = adapter->netdev; 1138 struct phy_device *phydev = netdev->phydev; 1139 enum lan743x_sgmii_lsd lsd = POWER_DOWN; 1140 int mii_ctl; 1141 bool status; 1142 int ret; 1143 1144 switch (phydev->speed) { 1145 case SPEED_2500: 1146 if (phydev->master_slave_state == MASTER_SLAVE_STATE_MASTER) 1147 lsd = LINK_2500_MASTER; 1148 else 1149 lsd = LINK_2500_SLAVE; 1150 break; 1151 case SPEED_1000: 1152 if (phydev->master_slave_state == MASTER_SLAVE_STATE_MASTER) 1153 lsd = LINK_1000_MASTER; 1154 else 1155 lsd = LINK_1000_SLAVE; 1156 break; 1157 case SPEED_100: 1158 if (phydev->duplex) 1159 lsd = LINK_100FD; 1160 else 1161 lsd = LINK_100HD; 1162 break; 1163 case SPEED_10: 1164 if (phydev->duplex) 1165 lsd = LINK_10FD; 1166 else 1167 lsd = LINK_10HD; 1168 break; 1169 default: 1170 netif_err(adapter, drv, adapter->netdev, 1171 "Invalid speed %d\n", phydev->speed); 1172 return -EINVAL; 1173 } 1174 1175 adapter->sgmii_lsd = lsd; 1176 ret = lan743x_sgmii_aneg_update(adapter); 1177 if (ret < 0) { 1178 netif_err(adapter, drv, adapter->netdev, 1179 "error %d SGMII cfg failed\n", ret); 1180 return ret; 1181 } 1182 1183 ret = lan743x_is_sgmii_2_5G_mode(adapter, &status); 1184 if (ret < 0) { 1185 netif_err(adapter, drv, adapter->netdev, 1186 "erro %d SGMII get mode failed\n", ret); 1187 return ret; 1188 } 1189 1190 if (status) 1191 netif_dbg(adapter, drv, adapter->netdev, 1192 "SGMII 2.5G mode enable\n"); 1193 else 1194 netif_dbg(adapter, drv, adapter->netdev, 1195 "SGMII 1G mode enable\n"); 1196 1197 /* SGMII/1000/2500BASE-X PCS power down */ 1198 mii_ctl = lan743x_sgmii_read(adapter, MDIO_MMD_VEND2, MII_BMCR); 1199 if (mii_ctl < 0) 1200 return mii_ctl; 1201 1202 mii_ctl |= BMCR_PDOWN; 1203 ret = lan743x_sgmii_write(adapter, MDIO_MMD_VEND2, MII_BMCR, mii_ctl); 1204 if (ret < 0) 1205 return ret; 1206 1207 ret = lan743x_pcs_seq_state(adapter, PCS_POWER_STATE_DOWN); 1208 if (ret < 0) 1209 return ret; 1210 1211 /* SGMII/1000/2500BASE-X PCS power up */ 1212 mii_ctl &= ~BMCR_PDOWN; 1213 ret = lan743x_sgmii_write(adapter, MDIO_MMD_VEND2, MII_BMCR, mii_ctl); 1214 if (ret < 0) 1215 return ret; 1216 1217 ret = lan743x_pcs_seq_state(adapter, PCS_POWER_STATE_UP); 1218 if (ret < 0) 1219 return ret; 1220 1221 return 0; 1222 } 1223 1224 static void lan743x_mac_set_address(struct lan743x_adapter *adapter, 1225 u8 *addr) 1226 { 1227 u32 addr_lo, addr_hi; 1228 1229 addr_lo = addr[0] | 1230 addr[1] << 8 | 1231 addr[2] << 16 | 1232 addr[3] << 24; 1233 addr_hi = addr[4] | 1234 addr[5] << 8; 1235 lan743x_csr_write(adapter, MAC_RX_ADDRL, addr_lo); 1236 lan743x_csr_write(adapter, MAC_RX_ADDRH, addr_hi); 1237 1238 ether_addr_copy(adapter->mac_address, addr); 1239 netif_info(adapter, drv, adapter->netdev, 1240 "MAC address set to %pM\n", addr); 1241 } 1242 1243 static int lan743x_mac_init(struct lan743x_adapter *adapter) 1244 { 1245 bool mac_address_valid = true; 1246 struct net_device *netdev; 1247 u32 mac_addr_hi = 0; 1248 u32 mac_addr_lo = 0; 1249 u32 data; 1250 1251 netdev = adapter->netdev; 1252 1253 /* disable auto duplex, and speed detection. Phylib does that */ 1254 data = lan743x_csr_read(adapter, MAC_CR); 1255 data &= ~(MAC_CR_ADD_ | MAC_CR_ASD_); 1256 data |= MAC_CR_CNTR_RST_; 1257 lan743x_csr_write(adapter, MAC_CR, data); 1258 1259 if (!is_valid_ether_addr(adapter->mac_address)) { 1260 mac_addr_hi = lan743x_csr_read(adapter, MAC_RX_ADDRH); 1261 mac_addr_lo = lan743x_csr_read(adapter, MAC_RX_ADDRL); 1262 adapter->mac_address[0] = mac_addr_lo & 0xFF; 1263 adapter->mac_address[1] = (mac_addr_lo >> 8) & 0xFF; 1264 adapter->mac_address[2] = (mac_addr_lo >> 16) & 0xFF; 1265 adapter->mac_address[3] = (mac_addr_lo >> 24) & 0xFF; 1266 adapter->mac_address[4] = mac_addr_hi & 0xFF; 1267 adapter->mac_address[5] = (mac_addr_hi >> 8) & 0xFF; 1268 1269 if (((mac_addr_hi & 0x0000FFFF) == 0x0000FFFF) && 1270 mac_addr_lo == 0xFFFFFFFF) { 1271 mac_address_valid = false; 1272 } else if (!is_valid_ether_addr(adapter->mac_address)) { 1273 mac_address_valid = false; 1274 } 1275 1276 if (!mac_address_valid) 1277 eth_random_addr(adapter->mac_address); 1278 } 1279 lan743x_mac_set_address(adapter, adapter->mac_address); 1280 eth_hw_addr_set(netdev, adapter->mac_address); 1281 1282 return 0; 1283 } 1284 1285 static int lan743x_mac_open(struct lan743x_adapter *adapter) 1286 { 1287 u32 temp; 1288 1289 temp = lan743x_csr_read(adapter, MAC_RX); 1290 lan743x_csr_write(adapter, MAC_RX, temp | MAC_RX_RXEN_); 1291 temp = lan743x_csr_read(adapter, MAC_TX); 1292 lan743x_csr_write(adapter, MAC_TX, temp | MAC_TX_TXEN_); 1293 return 0; 1294 } 1295 1296 static void lan743x_mac_close(struct lan743x_adapter *adapter) 1297 { 1298 u32 temp; 1299 1300 temp = lan743x_csr_read(adapter, MAC_TX); 1301 temp &= ~MAC_TX_TXEN_; 1302 lan743x_csr_write(adapter, MAC_TX, temp); 1303 lan743x_csr_wait_for_bit(adapter, MAC_TX, MAC_TX_TXD_, 1304 1, 1000, 20000, 100); 1305 1306 temp = lan743x_csr_read(adapter, MAC_RX); 1307 temp &= ~MAC_RX_RXEN_; 1308 lan743x_csr_write(adapter, MAC_RX, temp); 1309 lan743x_csr_wait_for_bit(adapter, MAC_RX, MAC_RX_RXD_, 1310 1, 1000, 20000, 100); 1311 } 1312 1313 void lan743x_mac_flow_ctrl_set_enables(struct lan743x_adapter *adapter, 1314 bool tx_enable, bool rx_enable) 1315 { 1316 u32 flow_setting = 0; 1317 1318 /* set maximum pause time because when fifo space frees 1319 * up a zero value pause frame will be sent to release the pause 1320 */ 1321 flow_setting = MAC_FLOW_CR_FCPT_MASK_; 1322 if (tx_enable) 1323 flow_setting |= MAC_FLOW_CR_TX_FCEN_; 1324 if (rx_enable) 1325 flow_setting |= MAC_FLOW_CR_RX_FCEN_; 1326 lan743x_csr_write(adapter, MAC_FLOW, flow_setting); 1327 } 1328 1329 static int lan743x_mac_set_mtu(struct lan743x_adapter *adapter, int new_mtu) 1330 { 1331 int enabled = 0; 1332 u32 mac_rx = 0; 1333 1334 mac_rx = lan743x_csr_read(adapter, MAC_RX); 1335 if (mac_rx & MAC_RX_RXEN_) { 1336 enabled = 1; 1337 if (mac_rx & MAC_RX_RXD_) { 1338 lan743x_csr_write(adapter, MAC_RX, mac_rx); 1339 mac_rx &= ~MAC_RX_RXD_; 1340 } 1341 mac_rx &= ~MAC_RX_RXEN_; 1342 lan743x_csr_write(adapter, MAC_RX, mac_rx); 1343 lan743x_csr_wait_for_bit(adapter, MAC_RX, MAC_RX_RXD_, 1344 1, 1000, 20000, 100); 1345 lan743x_csr_write(adapter, MAC_RX, mac_rx | MAC_RX_RXD_); 1346 } 1347 1348 mac_rx &= ~(MAC_RX_MAX_SIZE_MASK_); 1349 mac_rx |= (((new_mtu + ETH_HLEN + ETH_FCS_LEN) 1350 << MAC_RX_MAX_SIZE_SHIFT_) & MAC_RX_MAX_SIZE_MASK_); 1351 lan743x_csr_write(adapter, MAC_RX, mac_rx); 1352 1353 if (enabled) { 1354 mac_rx |= MAC_RX_RXEN_; 1355 lan743x_csr_write(adapter, MAC_RX, mac_rx); 1356 } 1357 return 0; 1358 } 1359 1360 /* PHY */ 1361 static int lan743x_phy_reset(struct lan743x_adapter *adapter) 1362 { 1363 u32 data; 1364 1365 /* Only called with in probe, and before mdiobus_register */ 1366 1367 data = lan743x_csr_read(adapter, PMT_CTL); 1368 data |= PMT_CTL_ETH_PHY_RST_; 1369 lan743x_csr_write(adapter, PMT_CTL, data); 1370 1371 return readx_poll_timeout(LAN743X_CSR_READ_OP, PMT_CTL, data, 1372 (!(data & PMT_CTL_ETH_PHY_RST_) && 1373 (data & PMT_CTL_READY_)), 1374 50000, 1000000); 1375 } 1376 1377 static void lan743x_phy_update_flowcontrol(struct lan743x_adapter *adapter, 1378 u16 local_adv, u16 remote_adv) 1379 { 1380 struct lan743x_phy *phy = &adapter->phy; 1381 u8 cap; 1382 1383 if (phy->fc_autoneg) 1384 cap = mii_resolve_flowctrl_fdx(local_adv, remote_adv); 1385 else 1386 cap = phy->fc_request_control; 1387 1388 lan743x_mac_flow_ctrl_set_enables(adapter, 1389 cap & FLOW_CTRL_TX, 1390 cap & FLOW_CTRL_RX); 1391 } 1392 1393 static int lan743x_phy_init(struct lan743x_adapter *adapter) 1394 { 1395 return lan743x_phy_reset(adapter); 1396 } 1397 1398 static void lan743x_phy_link_status_change(struct net_device *netdev) 1399 { 1400 struct lan743x_adapter *adapter = netdev_priv(netdev); 1401 struct phy_device *phydev = netdev->phydev; 1402 u32 data; 1403 1404 phy_print_status(phydev); 1405 if (phydev->state == PHY_RUNNING) { 1406 int remote_advertisement = 0; 1407 int local_advertisement = 0; 1408 1409 data = lan743x_csr_read(adapter, MAC_CR); 1410 1411 /* set duplex mode */ 1412 if (phydev->duplex) 1413 data |= MAC_CR_DPX_; 1414 else 1415 data &= ~MAC_CR_DPX_; 1416 1417 /* set bus speed */ 1418 switch (phydev->speed) { 1419 case SPEED_10: 1420 data &= ~MAC_CR_CFG_H_; 1421 data &= ~MAC_CR_CFG_L_; 1422 break; 1423 case SPEED_100: 1424 data &= ~MAC_CR_CFG_H_; 1425 data |= MAC_CR_CFG_L_; 1426 break; 1427 case SPEED_1000: 1428 data |= MAC_CR_CFG_H_; 1429 data &= ~MAC_CR_CFG_L_; 1430 break; 1431 case SPEED_2500: 1432 data |= MAC_CR_CFG_H_; 1433 data |= MAC_CR_CFG_L_; 1434 break; 1435 } 1436 lan743x_csr_write(adapter, MAC_CR, data); 1437 1438 local_advertisement = 1439 linkmode_adv_to_mii_adv_t(phydev->advertising); 1440 remote_advertisement = 1441 linkmode_adv_to_mii_adv_t(phydev->lp_advertising); 1442 1443 lan743x_phy_update_flowcontrol(adapter, local_advertisement, 1444 remote_advertisement); 1445 lan743x_ptp_update_latency(adapter, phydev->speed); 1446 if (phydev->interface == PHY_INTERFACE_MODE_SGMII || 1447 phydev->interface == PHY_INTERFACE_MODE_1000BASEX || 1448 phydev->interface == PHY_INTERFACE_MODE_2500BASEX) 1449 lan743x_sgmii_config(adapter); 1450 } 1451 } 1452 1453 static void lan743x_phy_close(struct lan743x_adapter *adapter) 1454 { 1455 struct net_device *netdev = adapter->netdev; 1456 1457 phy_stop(netdev->phydev); 1458 phy_disconnect(netdev->phydev); 1459 } 1460 1461 static void lan743x_phy_interface_select(struct lan743x_adapter *adapter) 1462 { 1463 u32 id_rev; 1464 u32 data; 1465 1466 data = lan743x_csr_read(adapter, MAC_CR); 1467 id_rev = adapter->csr.id_rev & ID_REV_ID_MASK_; 1468 1469 if (adapter->is_pci11x1x && adapter->is_sgmii_en) 1470 adapter->phy_interface = PHY_INTERFACE_MODE_SGMII; 1471 else if (id_rev == ID_REV_ID_LAN7430_) 1472 adapter->phy_interface = PHY_INTERFACE_MODE_GMII; 1473 else if ((id_rev == ID_REV_ID_LAN7431_) && (data & MAC_CR_MII_EN_)) 1474 adapter->phy_interface = PHY_INTERFACE_MODE_MII; 1475 else 1476 adapter->phy_interface = PHY_INTERFACE_MODE_RGMII; 1477 } 1478 1479 static int lan743x_phy_open(struct lan743x_adapter *adapter) 1480 { 1481 struct net_device *netdev = adapter->netdev; 1482 struct lan743x_phy *phy = &adapter->phy; 1483 struct fixed_phy_status fphy_status = { 1484 .link = 1, 1485 .speed = SPEED_1000, 1486 .duplex = DUPLEX_FULL, 1487 }; 1488 struct phy_device *phydev; 1489 int ret = -EIO; 1490 1491 /* try devicetree phy, or fixed link */ 1492 phydev = of_phy_get_and_connect(netdev, adapter->pdev->dev.of_node, 1493 lan743x_phy_link_status_change); 1494 1495 if (!phydev) { 1496 /* try internal phy */ 1497 phydev = phy_find_first(adapter->mdiobus); 1498 if (!phydev) { 1499 if ((adapter->csr.id_rev & ID_REV_ID_MASK_) == 1500 ID_REV_ID_LAN7431_) { 1501 phydev = fixed_phy_register(PHY_POLL, 1502 &fphy_status, NULL); 1503 if (IS_ERR(phydev)) { 1504 netdev_err(netdev, "No PHY/fixed_PHY found\n"); 1505 return -EIO; 1506 } 1507 } else { 1508 goto return_error; 1509 } 1510 } 1511 1512 lan743x_phy_interface_select(adapter); 1513 1514 ret = phy_connect_direct(netdev, phydev, 1515 lan743x_phy_link_status_change, 1516 adapter->phy_interface); 1517 if (ret) 1518 goto return_error; 1519 } 1520 1521 /* MAC doesn't support 1000T Half */ 1522 phy_remove_link_mode(phydev, ETHTOOL_LINK_MODE_1000baseT_Half_BIT); 1523 1524 /* support both flow controls */ 1525 phy_support_asym_pause(phydev); 1526 phy->fc_request_control = (FLOW_CTRL_RX | FLOW_CTRL_TX); 1527 phy->fc_autoneg = phydev->autoneg; 1528 1529 phy_start(phydev); 1530 phy_start_aneg(phydev); 1531 phy_attached_info(phydev); 1532 return 0; 1533 1534 return_error: 1535 return ret; 1536 } 1537 1538 static void lan743x_rfe_open(struct lan743x_adapter *adapter) 1539 { 1540 lan743x_csr_write(adapter, RFE_RSS_CFG, 1541 RFE_RSS_CFG_UDP_IPV6_EX_ | 1542 RFE_RSS_CFG_TCP_IPV6_EX_ | 1543 RFE_RSS_CFG_IPV6_EX_ | 1544 RFE_RSS_CFG_UDP_IPV6_ | 1545 RFE_RSS_CFG_TCP_IPV6_ | 1546 RFE_RSS_CFG_IPV6_ | 1547 RFE_RSS_CFG_UDP_IPV4_ | 1548 RFE_RSS_CFG_TCP_IPV4_ | 1549 RFE_RSS_CFG_IPV4_ | 1550 RFE_RSS_CFG_VALID_HASH_BITS_ | 1551 RFE_RSS_CFG_RSS_QUEUE_ENABLE_ | 1552 RFE_RSS_CFG_RSS_HASH_STORE_ | 1553 RFE_RSS_CFG_RSS_ENABLE_); 1554 } 1555 1556 static void lan743x_rfe_update_mac_address(struct lan743x_adapter *adapter) 1557 { 1558 u8 *mac_addr; 1559 u32 mac_addr_hi = 0; 1560 u32 mac_addr_lo = 0; 1561 1562 /* Add mac address to perfect Filter */ 1563 mac_addr = adapter->mac_address; 1564 mac_addr_lo = ((((u32)(mac_addr[0])) << 0) | 1565 (((u32)(mac_addr[1])) << 8) | 1566 (((u32)(mac_addr[2])) << 16) | 1567 (((u32)(mac_addr[3])) << 24)); 1568 mac_addr_hi = ((((u32)(mac_addr[4])) << 0) | 1569 (((u32)(mac_addr[5])) << 8)); 1570 1571 lan743x_csr_write(adapter, RFE_ADDR_FILT_LO(0), mac_addr_lo); 1572 lan743x_csr_write(adapter, RFE_ADDR_FILT_HI(0), 1573 mac_addr_hi | RFE_ADDR_FILT_HI_VALID_); 1574 } 1575 1576 static void lan743x_rfe_set_multicast(struct lan743x_adapter *adapter) 1577 { 1578 struct net_device *netdev = adapter->netdev; 1579 u32 hash_table[DP_SEL_VHF_HASH_LEN]; 1580 u32 rfctl; 1581 u32 data; 1582 1583 rfctl = lan743x_csr_read(adapter, RFE_CTL); 1584 rfctl &= ~(RFE_CTL_AU_ | RFE_CTL_AM_ | 1585 RFE_CTL_DA_PERFECT_ | RFE_CTL_MCAST_HASH_); 1586 rfctl |= RFE_CTL_AB_; 1587 if (netdev->flags & IFF_PROMISC) { 1588 rfctl |= RFE_CTL_AM_ | RFE_CTL_AU_; 1589 } else { 1590 if (netdev->flags & IFF_ALLMULTI) 1591 rfctl |= RFE_CTL_AM_; 1592 } 1593 1594 if (netdev->features & NETIF_F_RXCSUM) 1595 rfctl |= RFE_CTL_IP_COE_ | RFE_CTL_TCP_UDP_COE_; 1596 1597 memset(hash_table, 0, DP_SEL_VHF_HASH_LEN * sizeof(u32)); 1598 if (netdev_mc_count(netdev)) { 1599 struct netdev_hw_addr *ha; 1600 int i; 1601 1602 rfctl |= RFE_CTL_DA_PERFECT_; 1603 i = 1; 1604 netdev_for_each_mc_addr(ha, netdev) { 1605 /* set first 32 into Perfect Filter */ 1606 if (i < 33) { 1607 lan743x_csr_write(adapter, 1608 RFE_ADDR_FILT_HI(i), 0); 1609 data = ha->addr[3]; 1610 data = ha->addr[2] | (data << 8); 1611 data = ha->addr[1] | (data << 8); 1612 data = ha->addr[0] | (data << 8); 1613 lan743x_csr_write(adapter, 1614 RFE_ADDR_FILT_LO(i), data); 1615 data = ha->addr[5]; 1616 data = ha->addr[4] | (data << 8); 1617 data |= RFE_ADDR_FILT_HI_VALID_; 1618 lan743x_csr_write(adapter, 1619 RFE_ADDR_FILT_HI(i), data); 1620 } else { 1621 u32 bitnum = (ether_crc(ETH_ALEN, ha->addr) >> 1622 23) & 0x1FF; 1623 hash_table[bitnum / 32] |= (1 << (bitnum % 32)); 1624 rfctl |= RFE_CTL_MCAST_HASH_; 1625 } 1626 i++; 1627 } 1628 } 1629 1630 lan743x_dp_write(adapter, DP_SEL_RFE_RAM, 1631 DP_SEL_VHF_VLAN_LEN, 1632 DP_SEL_VHF_HASH_LEN, hash_table); 1633 lan743x_csr_write(adapter, RFE_CTL, rfctl); 1634 } 1635 1636 static int lan743x_dmac_init(struct lan743x_adapter *adapter) 1637 { 1638 u32 data = 0; 1639 1640 lan743x_csr_write(adapter, DMAC_CMD, DMAC_CMD_SWR_); 1641 lan743x_csr_wait_for_bit(adapter, DMAC_CMD, DMAC_CMD_SWR_, 1642 0, 1000, 20000, 100); 1643 switch (DEFAULT_DMA_DESCRIPTOR_SPACING) { 1644 case DMA_DESCRIPTOR_SPACING_16: 1645 data = DMAC_CFG_MAX_DSPACE_16_; 1646 break; 1647 case DMA_DESCRIPTOR_SPACING_32: 1648 data = DMAC_CFG_MAX_DSPACE_32_; 1649 break; 1650 case DMA_DESCRIPTOR_SPACING_64: 1651 data = DMAC_CFG_MAX_DSPACE_64_; 1652 break; 1653 case DMA_DESCRIPTOR_SPACING_128: 1654 data = DMAC_CFG_MAX_DSPACE_128_; 1655 break; 1656 default: 1657 return -EPERM; 1658 } 1659 if (!(adapter->csr.flags & LAN743X_CSR_FLAG_IS_A0)) 1660 data |= DMAC_CFG_COAL_EN_; 1661 data |= DMAC_CFG_CH_ARB_SEL_RX_HIGH_; 1662 data |= DMAC_CFG_MAX_READ_REQ_SET_(6); 1663 lan743x_csr_write(adapter, DMAC_CFG, data); 1664 data = DMAC_COAL_CFG_TIMER_LIMIT_SET_(1); 1665 data |= DMAC_COAL_CFG_TIMER_TX_START_; 1666 data |= DMAC_COAL_CFG_FLUSH_INTS_; 1667 data |= DMAC_COAL_CFG_INT_EXIT_COAL_; 1668 data |= DMAC_COAL_CFG_CSR_EXIT_COAL_; 1669 data |= DMAC_COAL_CFG_TX_THRES_SET_(0x0A); 1670 data |= DMAC_COAL_CFG_RX_THRES_SET_(0x0C); 1671 lan743x_csr_write(adapter, DMAC_COAL_CFG, data); 1672 data = DMAC_OBFF_TX_THRES_SET_(0x08); 1673 data |= DMAC_OBFF_RX_THRES_SET_(0x0A); 1674 lan743x_csr_write(adapter, DMAC_OBFF_CFG, data); 1675 return 0; 1676 } 1677 1678 static int lan743x_dmac_tx_get_state(struct lan743x_adapter *adapter, 1679 int tx_channel) 1680 { 1681 u32 dmac_cmd = 0; 1682 1683 dmac_cmd = lan743x_csr_read(adapter, DMAC_CMD); 1684 return DMAC_CHANNEL_STATE_SET((dmac_cmd & 1685 DMAC_CMD_START_T_(tx_channel)), 1686 (dmac_cmd & 1687 DMAC_CMD_STOP_T_(tx_channel))); 1688 } 1689 1690 static int lan743x_dmac_tx_wait_till_stopped(struct lan743x_adapter *adapter, 1691 int tx_channel) 1692 { 1693 int timeout = 100; 1694 int result = 0; 1695 1696 while (timeout && 1697 ((result = lan743x_dmac_tx_get_state(adapter, tx_channel)) == 1698 DMAC_CHANNEL_STATE_STOP_PENDING)) { 1699 usleep_range(1000, 20000); 1700 timeout--; 1701 } 1702 if (result == DMAC_CHANNEL_STATE_STOP_PENDING) 1703 result = -ENODEV; 1704 return result; 1705 } 1706 1707 static int lan743x_dmac_rx_get_state(struct lan743x_adapter *adapter, 1708 int rx_channel) 1709 { 1710 u32 dmac_cmd = 0; 1711 1712 dmac_cmd = lan743x_csr_read(adapter, DMAC_CMD); 1713 return DMAC_CHANNEL_STATE_SET((dmac_cmd & 1714 DMAC_CMD_START_R_(rx_channel)), 1715 (dmac_cmd & 1716 DMAC_CMD_STOP_R_(rx_channel))); 1717 } 1718 1719 static int lan743x_dmac_rx_wait_till_stopped(struct lan743x_adapter *adapter, 1720 int rx_channel) 1721 { 1722 int timeout = 100; 1723 int result = 0; 1724 1725 while (timeout && 1726 ((result = lan743x_dmac_rx_get_state(adapter, rx_channel)) == 1727 DMAC_CHANNEL_STATE_STOP_PENDING)) { 1728 usleep_range(1000, 20000); 1729 timeout--; 1730 } 1731 if (result == DMAC_CHANNEL_STATE_STOP_PENDING) 1732 result = -ENODEV; 1733 return result; 1734 } 1735 1736 static void lan743x_tx_release_desc(struct lan743x_tx *tx, 1737 int descriptor_index, bool cleanup) 1738 { 1739 struct lan743x_tx_buffer_info *buffer_info = NULL; 1740 struct lan743x_tx_descriptor *descriptor = NULL; 1741 u32 descriptor_type = 0; 1742 bool ignore_sync; 1743 1744 descriptor = &tx->ring_cpu_ptr[descriptor_index]; 1745 buffer_info = &tx->buffer_info[descriptor_index]; 1746 if (!(buffer_info->flags & TX_BUFFER_INFO_FLAG_ACTIVE)) 1747 goto done; 1748 1749 descriptor_type = le32_to_cpu(descriptor->data0) & 1750 TX_DESC_DATA0_DTYPE_MASK_; 1751 if (descriptor_type == TX_DESC_DATA0_DTYPE_DATA_) 1752 goto clean_up_data_descriptor; 1753 else 1754 goto clear_active; 1755 1756 clean_up_data_descriptor: 1757 if (buffer_info->dma_ptr) { 1758 if (buffer_info->flags & 1759 TX_BUFFER_INFO_FLAG_SKB_FRAGMENT) { 1760 dma_unmap_page(&tx->adapter->pdev->dev, 1761 buffer_info->dma_ptr, 1762 buffer_info->buffer_length, 1763 DMA_TO_DEVICE); 1764 } else { 1765 dma_unmap_single(&tx->adapter->pdev->dev, 1766 buffer_info->dma_ptr, 1767 buffer_info->buffer_length, 1768 DMA_TO_DEVICE); 1769 } 1770 buffer_info->dma_ptr = 0; 1771 buffer_info->buffer_length = 0; 1772 } 1773 if (!buffer_info->skb) 1774 goto clear_active; 1775 1776 if (!(buffer_info->flags & TX_BUFFER_INFO_FLAG_TIMESTAMP_REQUESTED)) { 1777 dev_kfree_skb_any(buffer_info->skb); 1778 goto clear_skb; 1779 } 1780 1781 if (cleanup) { 1782 lan743x_ptp_unrequest_tx_timestamp(tx->adapter); 1783 dev_kfree_skb_any(buffer_info->skb); 1784 } else { 1785 ignore_sync = (buffer_info->flags & 1786 TX_BUFFER_INFO_FLAG_IGNORE_SYNC) != 0; 1787 lan743x_ptp_tx_timestamp_skb(tx->adapter, 1788 buffer_info->skb, ignore_sync); 1789 } 1790 1791 clear_skb: 1792 buffer_info->skb = NULL; 1793 1794 clear_active: 1795 buffer_info->flags &= ~TX_BUFFER_INFO_FLAG_ACTIVE; 1796 1797 done: 1798 memset(buffer_info, 0, sizeof(*buffer_info)); 1799 memset(descriptor, 0, sizeof(*descriptor)); 1800 } 1801 1802 static int lan743x_tx_next_index(struct lan743x_tx *tx, int index) 1803 { 1804 return ((++index) % tx->ring_size); 1805 } 1806 1807 static void lan743x_tx_release_completed_descriptors(struct lan743x_tx *tx) 1808 { 1809 while (le32_to_cpu(*tx->head_cpu_ptr) != (tx->last_head)) { 1810 lan743x_tx_release_desc(tx, tx->last_head, false); 1811 tx->last_head = lan743x_tx_next_index(tx, tx->last_head); 1812 } 1813 } 1814 1815 static void lan743x_tx_release_all_descriptors(struct lan743x_tx *tx) 1816 { 1817 u32 original_head = 0; 1818 1819 original_head = tx->last_head; 1820 do { 1821 lan743x_tx_release_desc(tx, tx->last_head, true); 1822 tx->last_head = lan743x_tx_next_index(tx, tx->last_head); 1823 } while (tx->last_head != original_head); 1824 memset(tx->ring_cpu_ptr, 0, 1825 sizeof(*tx->ring_cpu_ptr) * (tx->ring_size)); 1826 memset(tx->buffer_info, 0, 1827 sizeof(*tx->buffer_info) * (tx->ring_size)); 1828 } 1829 1830 static int lan743x_tx_get_desc_cnt(struct lan743x_tx *tx, 1831 struct sk_buff *skb) 1832 { 1833 int result = 1; /* 1 for the main skb buffer */ 1834 int nr_frags = 0; 1835 1836 if (skb_is_gso(skb)) 1837 result++; /* requires an extension descriptor */ 1838 nr_frags = skb_shinfo(skb)->nr_frags; 1839 result += nr_frags; /* 1 for each fragment buffer */ 1840 return result; 1841 } 1842 1843 static int lan743x_tx_get_avail_desc(struct lan743x_tx *tx) 1844 { 1845 int last_head = tx->last_head; 1846 int last_tail = tx->last_tail; 1847 1848 if (last_tail >= last_head) 1849 return tx->ring_size - last_tail + last_head - 1; 1850 else 1851 return last_head - last_tail - 1; 1852 } 1853 1854 void lan743x_tx_set_timestamping_mode(struct lan743x_tx *tx, 1855 bool enable_timestamping, 1856 bool enable_onestep_sync) 1857 { 1858 if (enable_timestamping) 1859 tx->ts_flags |= TX_TS_FLAG_TIMESTAMPING_ENABLED; 1860 else 1861 tx->ts_flags &= ~TX_TS_FLAG_TIMESTAMPING_ENABLED; 1862 if (enable_onestep_sync) 1863 tx->ts_flags |= TX_TS_FLAG_ONE_STEP_SYNC; 1864 else 1865 tx->ts_flags &= ~TX_TS_FLAG_ONE_STEP_SYNC; 1866 } 1867 1868 static int lan743x_tx_frame_start(struct lan743x_tx *tx, 1869 unsigned char *first_buffer, 1870 unsigned int first_buffer_length, 1871 unsigned int frame_length, 1872 bool time_stamp, 1873 bool check_sum) 1874 { 1875 /* called only from within lan743x_tx_xmit_frame. 1876 * assuming tx->ring_lock has already been acquired. 1877 */ 1878 struct lan743x_tx_descriptor *tx_descriptor = NULL; 1879 struct lan743x_tx_buffer_info *buffer_info = NULL; 1880 struct lan743x_adapter *adapter = tx->adapter; 1881 struct device *dev = &adapter->pdev->dev; 1882 dma_addr_t dma_ptr; 1883 1884 tx->frame_flags |= TX_FRAME_FLAG_IN_PROGRESS; 1885 tx->frame_first = tx->last_tail; 1886 tx->frame_tail = tx->frame_first; 1887 1888 tx_descriptor = &tx->ring_cpu_ptr[tx->frame_tail]; 1889 buffer_info = &tx->buffer_info[tx->frame_tail]; 1890 dma_ptr = dma_map_single(dev, first_buffer, first_buffer_length, 1891 DMA_TO_DEVICE); 1892 if (dma_mapping_error(dev, dma_ptr)) 1893 return -ENOMEM; 1894 1895 tx_descriptor->data1 = cpu_to_le32(DMA_ADDR_LOW32(dma_ptr)); 1896 tx_descriptor->data2 = cpu_to_le32(DMA_ADDR_HIGH32(dma_ptr)); 1897 tx_descriptor->data3 = cpu_to_le32((frame_length << 16) & 1898 TX_DESC_DATA3_FRAME_LENGTH_MSS_MASK_); 1899 1900 buffer_info->skb = NULL; 1901 buffer_info->dma_ptr = dma_ptr; 1902 buffer_info->buffer_length = first_buffer_length; 1903 buffer_info->flags |= TX_BUFFER_INFO_FLAG_ACTIVE; 1904 1905 tx->frame_data0 = (first_buffer_length & 1906 TX_DESC_DATA0_BUF_LENGTH_MASK_) | 1907 TX_DESC_DATA0_DTYPE_DATA_ | 1908 TX_DESC_DATA0_FS_ | 1909 TX_DESC_DATA0_FCS_; 1910 if (time_stamp) 1911 tx->frame_data0 |= TX_DESC_DATA0_TSE_; 1912 1913 if (check_sum) 1914 tx->frame_data0 |= TX_DESC_DATA0_ICE_ | 1915 TX_DESC_DATA0_IPE_ | 1916 TX_DESC_DATA0_TPE_; 1917 1918 /* data0 will be programmed in one of other frame assembler functions */ 1919 return 0; 1920 } 1921 1922 static void lan743x_tx_frame_add_lso(struct lan743x_tx *tx, 1923 unsigned int frame_length, 1924 int nr_frags) 1925 { 1926 /* called only from within lan743x_tx_xmit_frame. 1927 * assuming tx->ring_lock has already been acquired. 1928 */ 1929 struct lan743x_tx_descriptor *tx_descriptor = NULL; 1930 struct lan743x_tx_buffer_info *buffer_info = NULL; 1931 1932 /* wrap up previous descriptor */ 1933 tx->frame_data0 |= TX_DESC_DATA0_EXT_; 1934 if (nr_frags <= 0) { 1935 tx->frame_data0 |= TX_DESC_DATA0_LS_; 1936 tx->frame_data0 |= TX_DESC_DATA0_IOC_; 1937 } 1938 tx_descriptor = &tx->ring_cpu_ptr[tx->frame_tail]; 1939 tx_descriptor->data0 = cpu_to_le32(tx->frame_data0); 1940 1941 /* move to next descriptor */ 1942 tx->frame_tail = lan743x_tx_next_index(tx, tx->frame_tail); 1943 tx_descriptor = &tx->ring_cpu_ptr[tx->frame_tail]; 1944 buffer_info = &tx->buffer_info[tx->frame_tail]; 1945 1946 /* add extension descriptor */ 1947 tx_descriptor->data1 = 0; 1948 tx_descriptor->data2 = 0; 1949 tx_descriptor->data3 = 0; 1950 1951 buffer_info->skb = NULL; 1952 buffer_info->dma_ptr = 0; 1953 buffer_info->buffer_length = 0; 1954 buffer_info->flags |= TX_BUFFER_INFO_FLAG_ACTIVE; 1955 1956 tx->frame_data0 = (frame_length & TX_DESC_DATA0_EXT_PAY_LENGTH_MASK_) | 1957 TX_DESC_DATA0_DTYPE_EXT_ | 1958 TX_DESC_DATA0_EXT_LSO_; 1959 1960 /* data0 will be programmed in one of other frame assembler functions */ 1961 } 1962 1963 static int lan743x_tx_frame_add_fragment(struct lan743x_tx *tx, 1964 const skb_frag_t *fragment, 1965 unsigned int frame_length) 1966 { 1967 /* called only from within lan743x_tx_xmit_frame 1968 * assuming tx->ring_lock has already been acquired 1969 */ 1970 struct lan743x_tx_descriptor *tx_descriptor = NULL; 1971 struct lan743x_tx_buffer_info *buffer_info = NULL; 1972 struct lan743x_adapter *adapter = tx->adapter; 1973 struct device *dev = &adapter->pdev->dev; 1974 unsigned int fragment_length = 0; 1975 dma_addr_t dma_ptr; 1976 1977 fragment_length = skb_frag_size(fragment); 1978 if (!fragment_length) 1979 return 0; 1980 1981 /* wrap up previous descriptor */ 1982 tx_descriptor = &tx->ring_cpu_ptr[tx->frame_tail]; 1983 tx_descriptor->data0 = cpu_to_le32(tx->frame_data0); 1984 1985 /* move to next descriptor */ 1986 tx->frame_tail = lan743x_tx_next_index(tx, tx->frame_tail); 1987 tx_descriptor = &tx->ring_cpu_ptr[tx->frame_tail]; 1988 buffer_info = &tx->buffer_info[tx->frame_tail]; 1989 dma_ptr = skb_frag_dma_map(dev, fragment, 1990 0, fragment_length, 1991 DMA_TO_DEVICE); 1992 if (dma_mapping_error(dev, dma_ptr)) { 1993 int desc_index; 1994 1995 /* cleanup all previously setup descriptors */ 1996 desc_index = tx->frame_first; 1997 while (desc_index != tx->frame_tail) { 1998 lan743x_tx_release_desc(tx, desc_index, true); 1999 desc_index = lan743x_tx_next_index(tx, desc_index); 2000 } 2001 dma_wmb(); 2002 tx->frame_flags &= ~TX_FRAME_FLAG_IN_PROGRESS; 2003 tx->frame_first = 0; 2004 tx->frame_data0 = 0; 2005 tx->frame_tail = 0; 2006 return -ENOMEM; 2007 } 2008 2009 tx_descriptor->data1 = cpu_to_le32(DMA_ADDR_LOW32(dma_ptr)); 2010 tx_descriptor->data2 = cpu_to_le32(DMA_ADDR_HIGH32(dma_ptr)); 2011 tx_descriptor->data3 = cpu_to_le32((frame_length << 16) & 2012 TX_DESC_DATA3_FRAME_LENGTH_MSS_MASK_); 2013 2014 buffer_info->skb = NULL; 2015 buffer_info->dma_ptr = dma_ptr; 2016 buffer_info->buffer_length = fragment_length; 2017 buffer_info->flags |= TX_BUFFER_INFO_FLAG_ACTIVE; 2018 buffer_info->flags |= TX_BUFFER_INFO_FLAG_SKB_FRAGMENT; 2019 2020 tx->frame_data0 = (fragment_length & TX_DESC_DATA0_BUF_LENGTH_MASK_) | 2021 TX_DESC_DATA0_DTYPE_DATA_ | 2022 TX_DESC_DATA0_FCS_; 2023 2024 /* data0 will be programmed in one of other frame assembler functions */ 2025 return 0; 2026 } 2027 2028 static void lan743x_tx_frame_end(struct lan743x_tx *tx, 2029 struct sk_buff *skb, 2030 bool time_stamp, 2031 bool ignore_sync) 2032 { 2033 /* called only from within lan743x_tx_xmit_frame 2034 * assuming tx->ring_lock has already been acquired 2035 */ 2036 struct lan743x_tx_descriptor *tx_descriptor = NULL; 2037 struct lan743x_tx_buffer_info *buffer_info = NULL; 2038 struct lan743x_adapter *adapter = tx->adapter; 2039 u32 tx_tail_flags = 0; 2040 2041 /* wrap up previous descriptor */ 2042 if ((tx->frame_data0 & TX_DESC_DATA0_DTYPE_MASK_) == 2043 TX_DESC_DATA0_DTYPE_DATA_) { 2044 tx->frame_data0 |= TX_DESC_DATA0_LS_; 2045 tx->frame_data0 |= TX_DESC_DATA0_IOC_; 2046 } 2047 2048 tx_descriptor = &tx->ring_cpu_ptr[tx->frame_tail]; 2049 buffer_info = &tx->buffer_info[tx->frame_tail]; 2050 buffer_info->skb = skb; 2051 if (time_stamp) 2052 buffer_info->flags |= TX_BUFFER_INFO_FLAG_TIMESTAMP_REQUESTED; 2053 if (ignore_sync) 2054 buffer_info->flags |= TX_BUFFER_INFO_FLAG_IGNORE_SYNC; 2055 2056 tx_descriptor->data0 = cpu_to_le32(tx->frame_data0); 2057 tx->frame_tail = lan743x_tx_next_index(tx, tx->frame_tail); 2058 tx->last_tail = tx->frame_tail; 2059 2060 dma_wmb(); 2061 2062 if (tx->vector_flags & LAN743X_VECTOR_FLAG_VECTOR_ENABLE_AUTO_SET) 2063 tx_tail_flags |= TX_TAIL_SET_TOP_INT_VEC_EN_; 2064 if (tx->vector_flags & LAN743X_VECTOR_FLAG_SOURCE_ENABLE_AUTO_SET) 2065 tx_tail_flags |= TX_TAIL_SET_DMAC_INT_EN_ | 2066 TX_TAIL_SET_TOP_INT_EN_; 2067 2068 lan743x_csr_write(adapter, TX_TAIL(tx->channel_number), 2069 tx_tail_flags | tx->frame_tail); 2070 tx->frame_flags &= ~TX_FRAME_FLAG_IN_PROGRESS; 2071 } 2072 2073 static netdev_tx_t lan743x_tx_xmit_frame(struct lan743x_tx *tx, 2074 struct sk_buff *skb) 2075 { 2076 int required_number_of_descriptors = 0; 2077 unsigned int start_frame_length = 0; 2078 netdev_tx_t retval = NETDEV_TX_OK; 2079 unsigned int frame_length = 0; 2080 unsigned int head_length = 0; 2081 unsigned long irq_flags = 0; 2082 bool do_timestamp = false; 2083 bool ignore_sync = false; 2084 struct netdev_queue *txq; 2085 int nr_frags = 0; 2086 bool gso = false; 2087 int j; 2088 2089 required_number_of_descriptors = lan743x_tx_get_desc_cnt(tx, skb); 2090 2091 spin_lock_irqsave(&tx->ring_lock, irq_flags); 2092 if (required_number_of_descriptors > 2093 lan743x_tx_get_avail_desc(tx)) { 2094 if (required_number_of_descriptors > (tx->ring_size - 1)) { 2095 dev_kfree_skb_irq(skb); 2096 } else { 2097 /* save how many descriptors we needed to restart the queue */ 2098 tx->rqd_descriptors = required_number_of_descriptors; 2099 retval = NETDEV_TX_BUSY; 2100 txq = netdev_get_tx_queue(tx->adapter->netdev, 2101 tx->channel_number); 2102 netif_tx_stop_queue(txq); 2103 } 2104 goto unlock; 2105 } 2106 2107 /* space available, transmit skb */ 2108 if ((skb_shinfo(skb)->tx_flags & SKBTX_HW_TSTAMP) && 2109 (tx->ts_flags & TX_TS_FLAG_TIMESTAMPING_ENABLED) && 2110 (lan743x_ptp_request_tx_timestamp(tx->adapter))) { 2111 skb_shinfo(skb)->tx_flags |= SKBTX_IN_PROGRESS; 2112 do_timestamp = true; 2113 if (tx->ts_flags & TX_TS_FLAG_ONE_STEP_SYNC) 2114 ignore_sync = true; 2115 } 2116 head_length = skb_headlen(skb); 2117 frame_length = skb_pagelen(skb); 2118 nr_frags = skb_shinfo(skb)->nr_frags; 2119 start_frame_length = frame_length; 2120 gso = skb_is_gso(skb); 2121 if (gso) { 2122 start_frame_length = max(skb_shinfo(skb)->gso_size, 2123 (unsigned short)8); 2124 } 2125 2126 if (lan743x_tx_frame_start(tx, 2127 skb->data, head_length, 2128 start_frame_length, 2129 do_timestamp, 2130 skb->ip_summed == CHECKSUM_PARTIAL)) { 2131 dev_kfree_skb_irq(skb); 2132 goto unlock; 2133 } 2134 tx->frame_count++; 2135 2136 if (gso) 2137 lan743x_tx_frame_add_lso(tx, frame_length, nr_frags); 2138 2139 if (nr_frags <= 0) 2140 goto finish; 2141 2142 for (j = 0; j < nr_frags; j++) { 2143 const skb_frag_t *frag = &(skb_shinfo(skb)->frags[j]); 2144 2145 if (lan743x_tx_frame_add_fragment(tx, frag, frame_length)) { 2146 /* upon error no need to call 2147 * lan743x_tx_frame_end 2148 * frame assembler clean up was performed inside 2149 * lan743x_tx_frame_add_fragment 2150 */ 2151 dev_kfree_skb_irq(skb); 2152 goto unlock; 2153 } 2154 } 2155 2156 finish: 2157 lan743x_tx_frame_end(tx, skb, do_timestamp, ignore_sync); 2158 2159 unlock: 2160 spin_unlock_irqrestore(&tx->ring_lock, irq_flags); 2161 return retval; 2162 } 2163 2164 static int lan743x_tx_napi_poll(struct napi_struct *napi, int weight) 2165 { 2166 struct lan743x_tx *tx = container_of(napi, struct lan743x_tx, napi); 2167 struct lan743x_adapter *adapter = tx->adapter; 2168 unsigned long irq_flags = 0; 2169 struct netdev_queue *txq; 2170 u32 ioc_bit = 0; 2171 2172 ioc_bit = DMAC_INT_BIT_TX_IOC_(tx->channel_number); 2173 lan743x_csr_read(adapter, DMAC_INT_STS); 2174 if (tx->vector_flags & LAN743X_VECTOR_FLAG_SOURCE_STATUS_W2C) 2175 lan743x_csr_write(adapter, DMAC_INT_STS, ioc_bit); 2176 spin_lock_irqsave(&tx->ring_lock, irq_flags); 2177 2178 /* clean up tx ring */ 2179 lan743x_tx_release_completed_descriptors(tx); 2180 txq = netdev_get_tx_queue(adapter->netdev, tx->channel_number); 2181 if (netif_tx_queue_stopped(txq)) { 2182 if (tx->rqd_descriptors) { 2183 if (tx->rqd_descriptors <= 2184 lan743x_tx_get_avail_desc(tx)) { 2185 tx->rqd_descriptors = 0; 2186 netif_tx_wake_queue(txq); 2187 } 2188 } else { 2189 netif_tx_wake_queue(txq); 2190 } 2191 } 2192 spin_unlock_irqrestore(&tx->ring_lock, irq_flags); 2193 2194 if (!napi_complete(napi)) 2195 goto done; 2196 2197 /* enable isr */ 2198 lan743x_csr_write(adapter, INT_EN_SET, 2199 INT_BIT_DMA_TX_(tx->channel_number)); 2200 lan743x_csr_read(adapter, INT_STS); 2201 2202 done: 2203 return 0; 2204 } 2205 2206 static void lan743x_tx_ring_cleanup(struct lan743x_tx *tx) 2207 { 2208 if (tx->head_cpu_ptr) { 2209 dma_free_coherent(&tx->adapter->pdev->dev, 2210 sizeof(*tx->head_cpu_ptr), tx->head_cpu_ptr, 2211 tx->head_dma_ptr); 2212 tx->head_cpu_ptr = NULL; 2213 tx->head_dma_ptr = 0; 2214 } 2215 kfree(tx->buffer_info); 2216 tx->buffer_info = NULL; 2217 2218 if (tx->ring_cpu_ptr) { 2219 dma_free_coherent(&tx->adapter->pdev->dev, 2220 tx->ring_allocation_size, tx->ring_cpu_ptr, 2221 tx->ring_dma_ptr); 2222 tx->ring_allocation_size = 0; 2223 tx->ring_cpu_ptr = NULL; 2224 tx->ring_dma_ptr = 0; 2225 } 2226 tx->ring_size = 0; 2227 } 2228 2229 static int lan743x_tx_ring_init(struct lan743x_tx *tx) 2230 { 2231 size_t ring_allocation_size = 0; 2232 void *cpu_ptr = NULL; 2233 dma_addr_t dma_ptr; 2234 int ret = -ENOMEM; 2235 2236 tx->ring_size = LAN743X_TX_RING_SIZE; 2237 if (tx->ring_size & ~TX_CFG_B_TX_RING_LEN_MASK_) { 2238 ret = -EINVAL; 2239 goto cleanup; 2240 } 2241 if (dma_set_mask_and_coherent(&tx->adapter->pdev->dev, 2242 DMA_BIT_MASK(64))) { 2243 dev_warn(&tx->adapter->pdev->dev, 2244 "lan743x_: No suitable DMA available\n"); 2245 ret = -ENOMEM; 2246 goto cleanup; 2247 } 2248 ring_allocation_size = ALIGN(tx->ring_size * 2249 sizeof(struct lan743x_tx_descriptor), 2250 PAGE_SIZE); 2251 dma_ptr = 0; 2252 cpu_ptr = dma_alloc_coherent(&tx->adapter->pdev->dev, 2253 ring_allocation_size, &dma_ptr, GFP_KERNEL); 2254 if (!cpu_ptr) { 2255 ret = -ENOMEM; 2256 goto cleanup; 2257 } 2258 2259 tx->ring_allocation_size = ring_allocation_size; 2260 tx->ring_cpu_ptr = (struct lan743x_tx_descriptor *)cpu_ptr; 2261 tx->ring_dma_ptr = dma_ptr; 2262 2263 cpu_ptr = kcalloc(tx->ring_size, sizeof(*tx->buffer_info), GFP_KERNEL); 2264 if (!cpu_ptr) { 2265 ret = -ENOMEM; 2266 goto cleanup; 2267 } 2268 tx->buffer_info = (struct lan743x_tx_buffer_info *)cpu_ptr; 2269 dma_ptr = 0; 2270 cpu_ptr = dma_alloc_coherent(&tx->adapter->pdev->dev, 2271 sizeof(*tx->head_cpu_ptr), &dma_ptr, 2272 GFP_KERNEL); 2273 if (!cpu_ptr) { 2274 ret = -ENOMEM; 2275 goto cleanup; 2276 } 2277 2278 tx->head_cpu_ptr = cpu_ptr; 2279 tx->head_dma_ptr = dma_ptr; 2280 if (tx->head_dma_ptr & 0x3) { 2281 ret = -ENOMEM; 2282 goto cleanup; 2283 } 2284 2285 return 0; 2286 2287 cleanup: 2288 lan743x_tx_ring_cleanup(tx); 2289 return ret; 2290 } 2291 2292 static void lan743x_tx_close(struct lan743x_tx *tx) 2293 { 2294 struct lan743x_adapter *adapter = tx->adapter; 2295 2296 lan743x_csr_write(adapter, 2297 DMAC_CMD, 2298 DMAC_CMD_STOP_T_(tx->channel_number)); 2299 lan743x_dmac_tx_wait_till_stopped(adapter, tx->channel_number); 2300 2301 lan743x_csr_write(adapter, 2302 DMAC_INT_EN_CLR, 2303 DMAC_INT_BIT_TX_IOC_(tx->channel_number)); 2304 lan743x_csr_write(adapter, INT_EN_CLR, 2305 INT_BIT_DMA_TX_(tx->channel_number)); 2306 napi_disable(&tx->napi); 2307 netif_napi_del(&tx->napi); 2308 2309 lan743x_csr_write(adapter, FCT_TX_CTL, 2310 FCT_TX_CTL_DIS_(tx->channel_number)); 2311 lan743x_csr_wait_for_bit(adapter, FCT_TX_CTL, 2312 FCT_TX_CTL_EN_(tx->channel_number), 2313 0, 1000, 20000, 100); 2314 2315 lan743x_tx_release_all_descriptors(tx); 2316 2317 tx->rqd_descriptors = 0; 2318 2319 lan743x_tx_ring_cleanup(tx); 2320 } 2321 2322 static int lan743x_tx_open(struct lan743x_tx *tx) 2323 { 2324 struct lan743x_adapter *adapter = NULL; 2325 u32 data = 0; 2326 int ret; 2327 2328 adapter = tx->adapter; 2329 ret = lan743x_tx_ring_init(tx); 2330 if (ret) 2331 return ret; 2332 2333 /* initialize fifo */ 2334 lan743x_csr_write(adapter, FCT_TX_CTL, 2335 FCT_TX_CTL_RESET_(tx->channel_number)); 2336 lan743x_csr_wait_for_bit(adapter, FCT_TX_CTL, 2337 FCT_TX_CTL_RESET_(tx->channel_number), 2338 0, 1000, 20000, 100); 2339 2340 /* enable fifo */ 2341 lan743x_csr_write(adapter, FCT_TX_CTL, 2342 FCT_TX_CTL_EN_(tx->channel_number)); 2343 2344 /* reset tx channel */ 2345 lan743x_csr_write(adapter, DMAC_CMD, 2346 DMAC_CMD_TX_SWR_(tx->channel_number)); 2347 lan743x_csr_wait_for_bit(adapter, DMAC_CMD, 2348 DMAC_CMD_TX_SWR_(tx->channel_number), 2349 0, 1000, 20000, 100); 2350 2351 /* Write TX_BASE_ADDR */ 2352 lan743x_csr_write(adapter, 2353 TX_BASE_ADDRH(tx->channel_number), 2354 DMA_ADDR_HIGH32(tx->ring_dma_ptr)); 2355 lan743x_csr_write(adapter, 2356 TX_BASE_ADDRL(tx->channel_number), 2357 DMA_ADDR_LOW32(tx->ring_dma_ptr)); 2358 2359 /* Write TX_CFG_B */ 2360 data = lan743x_csr_read(adapter, TX_CFG_B(tx->channel_number)); 2361 data &= ~TX_CFG_B_TX_RING_LEN_MASK_; 2362 data |= ((tx->ring_size) & TX_CFG_B_TX_RING_LEN_MASK_); 2363 if (!(adapter->csr.flags & LAN743X_CSR_FLAG_IS_A0)) 2364 data |= TX_CFG_B_TDMABL_512_; 2365 lan743x_csr_write(adapter, TX_CFG_B(tx->channel_number), data); 2366 2367 /* Write TX_CFG_A */ 2368 data = TX_CFG_A_TX_TMR_HPWB_SEL_IOC_ | TX_CFG_A_TX_HP_WB_EN_; 2369 if (!(adapter->csr.flags & LAN743X_CSR_FLAG_IS_A0)) { 2370 data |= TX_CFG_A_TX_HP_WB_ON_INT_TMR_; 2371 data |= TX_CFG_A_TX_PF_THRES_SET_(0x10); 2372 data |= TX_CFG_A_TX_PF_PRI_THRES_SET_(0x04); 2373 data |= TX_CFG_A_TX_HP_WB_THRES_SET_(0x07); 2374 } 2375 lan743x_csr_write(adapter, TX_CFG_A(tx->channel_number), data); 2376 2377 /* Write TX_HEAD_WRITEBACK_ADDR */ 2378 lan743x_csr_write(adapter, 2379 TX_HEAD_WRITEBACK_ADDRH(tx->channel_number), 2380 DMA_ADDR_HIGH32(tx->head_dma_ptr)); 2381 lan743x_csr_write(adapter, 2382 TX_HEAD_WRITEBACK_ADDRL(tx->channel_number), 2383 DMA_ADDR_LOW32(tx->head_dma_ptr)); 2384 2385 /* set last head */ 2386 tx->last_head = lan743x_csr_read(adapter, TX_HEAD(tx->channel_number)); 2387 2388 /* write TX_TAIL */ 2389 tx->last_tail = 0; 2390 lan743x_csr_write(adapter, TX_TAIL(tx->channel_number), 2391 (u32)(tx->last_tail)); 2392 tx->vector_flags = lan743x_intr_get_vector_flags(adapter, 2393 INT_BIT_DMA_TX_ 2394 (tx->channel_number)); 2395 netif_napi_add_tx_weight(adapter->netdev, 2396 &tx->napi, lan743x_tx_napi_poll, 2397 NAPI_POLL_WEIGHT); 2398 napi_enable(&tx->napi); 2399 2400 data = 0; 2401 if (tx->vector_flags & LAN743X_VECTOR_FLAG_SOURCE_ENABLE_AUTO_CLEAR) 2402 data |= TX_CFG_C_TX_TOP_INT_EN_AUTO_CLR_; 2403 if (tx->vector_flags & LAN743X_VECTOR_FLAG_SOURCE_STATUS_AUTO_CLEAR) 2404 data |= TX_CFG_C_TX_DMA_INT_STS_AUTO_CLR_; 2405 if (tx->vector_flags & LAN743X_VECTOR_FLAG_SOURCE_STATUS_R2C) 2406 data |= TX_CFG_C_TX_INT_STS_R2C_MODE_MASK_; 2407 if (tx->vector_flags & LAN743X_VECTOR_FLAG_SOURCE_ENABLE_R2C) 2408 data |= TX_CFG_C_TX_INT_EN_R2C_; 2409 lan743x_csr_write(adapter, TX_CFG_C(tx->channel_number), data); 2410 2411 if (!(tx->vector_flags & LAN743X_VECTOR_FLAG_SOURCE_ENABLE_AUTO_SET)) 2412 lan743x_csr_write(adapter, INT_EN_SET, 2413 INT_BIT_DMA_TX_(tx->channel_number)); 2414 lan743x_csr_write(adapter, DMAC_INT_EN_SET, 2415 DMAC_INT_BIT_TX_IOC_(tx->channel_number)); 2416 2417 /* start dmac channel */ 2418 lan743x_csr_write(adapter, DMAC_CMD, 2419 DMAC_CMD_START_T_(tx->channel_number)); 2420 return 0; 2421 } 2422 2423 static int lan743x_rx_next_index(struct lan743x_rx *rx, int index) 2424 { 2425 return ((++index) % rx->ring_size); 2426 } 2427 2428 static void lan743x_rx_update_tail(struct lan743x_rx *rx, int index) 2429 { 2430 /* update the tail once per 8 descriptors */ 2431 if ((index & 7) == 7) 2432 lan743x_csr_write(rx->adapter, RX_TAIL(rx->channel_number), 2433 index); 2434 } 2435 2436 static int lan743x_rx_init_ring_element(struct lan743x_rx *rx, int index, 2437 gfp_t gfp) 2438 { 2439 struct net_device *netdev = rx->adapter->netdev; 2440 struct device *dev = &rx->adapter->pdev->dev; 2441 struct lan743x_rx_buffer_info *buffer_info; 2442 unsigned int buffer_length, used_length; 2443 struct lan743x_rx_descriptor *descriptor; 2444 struct sk_buff *skb; 2445 dma_addr_t dma_ptr; 2446 2447 buffer_length = netdev->mtu + ETH_HLEN + ETH_FCS_LEN + RX_HEAD_PADDING; 2448 2449 descriptor = &rx->ring_cpu_ptr[index]; 2450 buffer_info = &rx->buffer_info[index]; 2451 skb = __netdev_alloc_skb(netdev, buffer_length, gfp); 2452 if (!skb) 2453 return -ENOMEM; 2454 dma_ptr = dma_map_single(dev, skb->data, buffer_length, DMA_FROM_DEVICE); 2455 if (dma_mapping_error(dev, dma_ptr)) { 2456 dev_kfree_skb_any(skb); 2457 return -ENOMEM; 2458 } 2459 if (buffer_info->dma_ptr) { 2460 /* sync used area of buffer only */ 2461 if (le32_to_cpu(descriptor->data0) & RX_DESC_DATA0_LS_) 2462 /* frame length is valid only if LS bit is set. 2463 * it's a safe upper bound for the used area in this 2464 * buffer. 2465 */ 2466 used_length = min(RX_DESC_DATA0_FRAME_LENGTH_GET_ 2467 (le32_to_cpu(descriptor->data0)), 2468 buffer_info->buffer_length); 2469 else 2470 used_length = buffer_info->buffer_length; 2471 dma_sync_single_for_cpu(dev, buffer_info->dma_ptr, 2472 used_length, 2473 DMA_FROM_DEVICE); 2474 dma_unmap_single_attrs(dev, buffer_info->dma_ptr, 2475 buffer_info->buffer_length, 2476 DMA_FROM_DEVICE, 2477 DMA_ATTR_SKIP_CPU_SYNC); 2478 } 2479 2480 buffer_info->skb = skb; 2481 buffer_info->dma_ptr = dma_ptr; 2482 buffer_info->buffer_length = buffer_length; 2483 descriptor->data1 = cpu_to_le32(DMA_ADDR_LOW32(buffer_info->dma_ptr)); 2484 descriptor->data2 = cpu_to_le32(DMA_ADDR_HIGH32(buffer_info->dma_ptr)); 2485 descriptor->data3 = 0; 2486 descriptor->data0 = cpu_to_le32((RX_DESC_DATA0_OWN_ | 2487 (buffer_length & RX_DESC_DATA0_BUF_LENGTH_MASK_))); 2488 lan743x_rx_update_tail(rx, index); 2489 2490 return 0; 2491 } 2492 2493 static void lan743x_rx_reuse_ring_element(struct lan743x_rx *rx, int index) 2494 { 2495 struct lan743x_rx_buffer_info *buffer_info; 2496 struct lan743x_rx_descriptor *descriptor; 2497 2498 descriptor = &rx->ring_cpu_ptr[index]; 2499 buffer_info = &rx->buffer_info[index]; 2500 2501 descriptor->data1 = cpu_to_le32(DMA_ADDR_LOW32(buffer_info->dma_ptr)); 2502 descriptor->data2 = cpu_to_le32(DMA_ADDR_HIGH32(buffer_info->dma_ptr)); 2503 descriptor->data3 = 0; 2504 descriptor->data0 = cpu_to_le32((RX_DESC_DATA0_OWN_ | 2505 ((buffer_info->buffer_length) & 2506 RX_DESC_DATA0_BUF_LENGTH_MASK_))); 2507 lan743x_rx_update_tail(rx, index); 2508 } 2509 2510 static void lan743x_rx_release_ring_element(struct lan743x_rx *rx, int index) 2511 { 2512 struct lan743x_rx_buffer_info *buffer_info; 2513 struct lan743x_rx_descriptor *descriptor; 2514 2515 descriptor = &rx->ring_cpu_ptr[index]; 2516 buffer_info = &rx->buffer_info[index]; 2517 2518 memset(descriptor, 0, sizeof(*descriptor)); 2519 2520 if (buffer_info->dma_ptr) { 2521 dma_unmap_single(&rx->adapter->pdev->dev, 2522 buffer_info->dma_ptr, 2523 buffer_info->buffer_length, 2524 DMA_FROM_DEVICE); 2525 buffer_info->dma_ptr = 0; 2526 } 2527 2528 if (buffer_info->skb) { 2529 dev_kfree_skb(buffer_info->skb); 2530 buffer_info->skb = NULL; 2531 } 2532 2533 memset(buffer_info, 0, sizeof(*buffer_info)); 2534 } 2535 2536 static struct sk_buff * 2537 lan743x_rx_trim_skb(struct sk_buff *skb, int frame_length) 2538 { 2539 if (skb_linearize(skb)) { 2540 dev_kfree_skb_irq(skb); 2541 return NULL; 2542 } 2543 frame_length = max_t(int, 0, frame_length - ETH_FCS_LEN); 2544 if (skb->len > frame_length) { 2545 skb->tail -= skb->len - frame_length; 2546 skb->len = frame_length; 2547 } 2548 return skb; 2549 } 2550 2551 static int lan743x_rx_process_buffer(struct lan743x_rx *rx) 2552 { 2553 int current_head_index = le32_to_cpu(*rx->head_cpu_ptr); 2554 struct lan743x_rx_descriptor *descriptor, *desc_ext; 2555 struct net_device *netdev = rx->adapter->netdev; 2556 int result = RX_PROCESS_RESULT_NOTHING_TO_DO; 2557 struct lan743x_rx_buffer_info *buffer_info; 2558 int frame_length, buffer_length; 2559 bool is_ice, is_tce, is_icsm; 2560 int extension_index = -1; 2561 bool is_last, is_first; 2562 struct sk_buff *skb; 2563 2564 if (current_head_index < 0 || current_head_index >= rx->ring_size) 2565 goto done; 2566 2567 if (rx->last_head < 0 || rx->last_head >= rx->ring_size) 2568 goto done; 2569 2570 if (rx->last_head == current_head_index) 2571 goto done; 2572 2573 descriptor = &rx->ring_cpu_ptr[rx->last_head]; 2574 if (le32_to_cpu(descriptor->data0) & RX_DESC_DATA0_OWN_) 2575 goto done; 2576 buffer_info = &rx->buffer_info[rx->last_head]; 2577 2578 is_last = le32_to_cpu(descriptor->data0) & RX_DESC_DATA0_LS_; 2579 is_first = le32_to_cpu(descriptor->data0) & RX_DESC_DATA0_FS_; 2580 2581 if (is_last && le32_to_cpu(descriptor->data0) & RX_DESC_DATA0_EXT_) { 2582 /* extension is expected to follow */ 2583 int index = lan743x_rx_next_index(rx, rx->last_head); 2584 2585 if (index == current_head_index) 2586 /* extension not yet available */ 2587 goto done; 2588 desc_ext = &rx->ring_cpu_ptr[index]; 2589 if (le32_to_cpu(desc_ext->data0) & RX_DESC_DATA0_OWN_) 2590 /* extension not yet available */ 2591 goto done; 2592 if (!(le32_to_cpu(desc_ext->data0) & RX_DESC_DATA0_EXT_)) 2593 goto move_forward; 2594 extension_index = index; 2595 } 2596 2597 /* Only the last buffer in a multi-buffer frame contains the total frame 2598 * length. The chip occasionally sends more buffers than strictly 2599 * required to reach the total frame length. 2600 * Handle this by adding all buffers to the skb in their entirety. 2601 * Once the real frame length is known, trim the skb. 2602 */ 2603 frame_length = 2604 RX_DESC_DATA0_FRAME_LENGTH_GET_(le32_to_cpu(descriptor->data0)); 2605 buffer_length = buffer_info->buffer_length; 2606 is_ice = le32_to_cpu(descriptor->data1) & RX_DESC_DATA1_STATUS_ICE_; 2607 is_tce = le32_to_cpu(descriptor->data1) & RX_DESC_DATA1_STATUS_TCE_; 2608 is_icsm = le32_to_cpu(descriptor->data1) & RX_DESC_DATA1_STATUS_ICSM_; 2609 2610 netdev_dbg(netdev, "%s%schunk: %d/%d", 2611 is_first ? "first " : " ", 2612 is_last ? "last " : " ", 2613 frame_length, buffer_length); 2614 2615 /* save existing skb, allocate new skb and map to dma */ 2616 skb = buffer_info->skb; 2617 if (lan743x_rx_init_ring_element(rx, rx->last_head, 2618 GFP_ATOMIC | GFP_DMA)) { 2619 /* failed to allocate next skb. 2620 * Memory is very low. 2621 * Drop this packet and reuse buffer. 2622 */ 2623 lan743x_rx_reuse_ring_element(rx, rx->last_head); 2624 /* drop packet that was being assembled */ 2625 dev_kfree_skb_irq(rx->skb_head); 2626 rx->skb_head = NULL; 2627 goto process_extension; 2628 } 2629 2630 /* add buffers to skb via skb->frag_list */ 2631 if (is_first) { 2632 skb_reserve(skb, RX_HEAD_PADDING); 2633 skb_put(skb, buffer_length - RX_HEAD_PADDING); 2634 if (rx->skb_head) 2635 dev_kfree_skb_irq(rx->skb_head); 2636 rx->skb_head = skb; 2637 } else if (rx->skb_head) { 2638 skb_put(skb, buffer_length); 2639 if (skb_shinfo(rx->skb_head)->frag_list) 2640 rx->skb_tail->next = skb; 2641 else 2642 skb_shinfo(rx->skb_head)->frag_list = skb; 2643 rx->skb_tail = skb; 2644 rx->skb_head->len += skb->len; 2645 rx->skb_head->data_len += skb->len; 2646 rx->skb_head->truesize += skb->truesize; 2647 } else { 2648 /* packet to assemble has already been dropped because one or 2649 * more of its buffers could not be allocated 2650 */ 2651 netdev_dbg(netdev, "drop buffer intended for dropped packet"); 2652 dev_kfree_skb_irq(skb); 2653 } 2654 2655 process_extension: 2656 if (extension_index >= 0) { 2657 u32 ts_sec; 2658 u32 ts_nsec; 2659 2660 ts_sec = le32_to_cpu(desc_ext->data1); 2661 ts_nsec = (le32_to_cpu(desc_ext->data2) & 2662 RX_DESC_DATA2_TS_NS_MASK_); 2663 if (rx->skb_head) 2664 skb_hwtstamps(rx->skb_head)->hwtstamp = 2665 ktime_set(ts_sec, ts_nsec); 2666 lan743x_rx_reuse_ring_element(rx, extension_index); 2667 rx->last_head = extension_index; 2668 netdev_dbg(netdev, "process extension"); 2669 } 2670 2671 if (is_last && rx->skb_head) 2672 rx->skb_head = lan743x_rx_trim_skb(rx->skb_head, frame_length); 2673 2674 if (is_last && rx->skb_head) { 2675 rx->skb_head->protocol = eth_type_trans(rx->skb_head, 2676 rx->adapter->netdev); 2677 if (rx->adapter->netdev->features & NETIF_F_RXCSUM) { 2678 if (!is_ice && !is_tce && !is_icsm) 2679 skb->ip_summed = CHECKSUM_UNNECESSARY; 2680 } 2681 netdev_dbg(netdev, "sending %d byte frame to OS", 2682 rx->skb_head->len); 2683 napi_gro_receive(&rx->napi, rx->skb_head); 2684 rx->skb_head = NULL; 2685 } 2686 2687 move_forward: 2688 /* push tail and head forward */ 2689 rx->last_tail = rx->last_head; 2690 rx->last_head = lan743x_rx_next_index(rx, rx->last_head); 2691 result = RX_PROCESS_RESULT_BUFFER_RECEIVED; 2692 done: 2693 return result; 2694 } 2695 2696 static int lan743x_rx_napi_poll(struct napi_struct *napi, int weight) 2697 { 2698 struct lan743x_rx *rx = container_of(napi, struct lan743x_rx, napi); 2699 struct lan743x_adapter *adapter = rx->adapter; 2700 int result = RX_PROCESS_RESULT_NOTHING_TO_DO; 2701 u32 rx_tail_flags = 0; 2702 int count; 2703 2704 if (rx->vector_flags & LAN743X_VECTOR_FLAG_SOURCE_STATUS_W2C) { 2705 /* clear int status bit before reading packet */ 2706 lan743x_csr_write(adapter, DMAC_INT_STS, 2707 DMAC_INT_BIT_RXFRM_(rx->channel_number)); 2708 } 2709 for (count = 0; count < weight; count++) { 2710 result = lan743x_rx_process_buffer(rx); 2711 if (result == RX_PROCESS_RESULT_NOTHING_TO_DO) 2712 break; 2713 } 2714 rx->frame_count += count; 2715 if (count == weight || result == RX_PROCESS_RESULT_BUFFER_RECEIVED) 2716 return weight; 2717 2718 if (!napi_complete_done(napi, count)) 2719 return count; 2720 2721 /* re-arm interrupts, must write to rx tail on some chip variants */ 2722 if (rx->vector_flags & LAN743X_VECTOR_FLAG_VECTOR_ENABLE_AUTO_SET) 2723 rx_tail_flags |= RX_TAIL_SET_TOP_INT_VEC_EN_; 2724 if (rx->vector_flags & LAN743X_VECTOR_FLAG_SOURCE_ENABLE_AUTO_SET) { 2725 rx_tail_flags |= RX_TAIL_SET_TOP_INT_EN_; 2726 } else { 2727 lan743x_csr_write(adapter, INT_EN_SET, 2728 INT_BIT_DMA_RX_(rx->channel_number)); 2729 } 2730 2731 if (rx_tail_flags) 2732 lan743x_csr_write(adapter, RX_TAIL(rx->channel_number), 2733 rx_tail_flags | rx->last_tail); 2734 2735 return count; 2736 } 2737 2738 static void lan743x_rx_ring_cleanup(struct lan743x_rx *rx) 2739 { 2740 if (rx->buffer_info && rx->ring_cpu_ptr) { 2741 int index; 2742 2743 for (index = 0; index < rx->ring_size; index++) 2744 lan743x_rx_release_ring_element(rx, index); 2745 } 2746 2747 if (rx->head_cpu_ptr) { 2748 dma_free_coherent(&rx->adapter->pdev->dev, 2749 sizeof(*rx->head_cpu_ptr), rx->head_cpu_ptr, 2750 rx->head_dma_ptr); 2751 rx->head_cpu_ptr = NULL; 2752 rx->head_dma_ptr = 0; 2753 } 2754 2755 kfree(rx->buffer_info); 2756 rx->buffer_info = NULL; 2757 2758 if (rx->ring_cpu_ptr) { 2759 dma_free_coherent(&rx->adapter->pdev->dev, 2760 rx->ring_allocation_size, rx->ring_cpu_ptr, 2761 rx->ring_dma_ptr); 2762 rx->ring_allocation_size = 0; 2763 rx->ring_cpu_ptr = NULL; 2764 rx->ring_dma_ptr = 0; 2765 } 2766 2767 rx->ring_size = 0; 2768 rx->last_head = 0; 2769 } 2770 2771 static int lan743x_rx_ring_init(struct lan743x_rx *rx) 2772 { 2773 size_t ring_allocation_size = 0; 2774 dma_addr_t dma_ptr = 0; 2775 void *cpu_ptr = NULL; 2776 int ret = -ENOMEM; 2777 int index = 0; 2778 2779 rx->ring_size = LAN743X_RX_RING_SIZE; 2780 if (rx->ring_size <= 1) { 2781 ret = -EINVAL; 2782 goto cleanup; 2783 } 2784 if (rx->ring_size & ~RX_CFG_B_RX_RING_LEN_MASK_) { 2785 ret = -EINVAL; 2786 goto cleanup; 2787 } 2788 if (dma_set_mask_and_coherent(&rx->adapter->pdev->dev, 2789 DMA_BIT_MASK(64))) { 2790 dev_warn(&rx->adapter->pdev->dev, 2791 "lan743x_: No suitable DMA available\n"); 2792 ret = -ENOMEM; 2793 goto cleanup; 2794 } 2795 ring_allocation_size = ALIGN(rx->ring_size * 2796 sizeof(struct lan743x_rx_descriptor), 2797 PAGE_SIZE); 2798 dma_ptr = 0; 2799 cpu_ptr = dma_alloc_coherent(&rx->adapter->pdev->dev, 2800 ring_allocation_size, &dma_ptr, GFP_KERNEL); 2801 if (!cpu_ptr) { 2802 ret = -ENOMEM; 2803 goto cleanup; 2804 } 2805 rx->ring_allocation_size = ring_allocation_size; 2806 rx->ring_cpu_ptr = (struct lan743x_rx_descriptor *)cpu_ptr; 2807 rx->ring_dma_ptr = dma_ptr; 2808 2809 cpu_ptr = kcalloc(rx->ring_size, sizeof(*rx->buffer_info), 2810 GFP_KERNEL); 2811 if (!cpu_ptr) { 2812 ret = -ENOMEM; 2813 goto cleanup; 2814 } 2815 rx->buffer_info = (struct lan743x_rx_buffer_info *)cpu_ptr; 2816 dma_ptr = 0; 2817 cpu_ptr = dma_alloc_coherent(&rx->adapter->pdev->dev, 2818 sizeof(*rx->head_cpu_ptr), &dma_ptr, 2819 GFP_KERNEL); 2820 if (!cpu_ptr) { 2821 ret = -ENOMEM; 2822 goto cleanup; 2823 } 2824 2825 rx->head_cpu_ptr = cpu_ptr; 2826 rx->head_dma_ptr = dma_ptr; 2827 if (rx->head_dma_ptr & 0x3) { 2828 ret = -ENOMEM; 2829 goto cleanup; 2830 } 2831 2832 rx->last_head = 0; 2833 for (index = 0; index < rx->ring_size; index++) { 2834 ret = lan743x_rx_init_ring_element(rx, index, GFP_KERNEL); 2835 if (ret) 2836 goto cleanup; 2837 } 2838 return 0; 2839 2840 cleanup: 2841 netif_warn(rx->adapter, ifup, rx->adapter->netdev, 2842 "Error allocating memory for LAN743x\n"); 2843 2844 lan743x_rx_ring_cleanup(rx); 2845 return ret; 2846 } 2847 2848 static void lan743x_rx_close(struct lan743x_rx *rx) 2849 { 2850 struct lan743x_adapter *adapter = rx->adapter; 2851 2852 lan743x_csr_write(adapter, FCT_RX_CTL, 2853 FCT_RX_CTL_DIS_(rx->channel_number)); 2854 lan743x_csr_wait_for_bit(adapter, FCT_RX_CTL, 2855 FCT_RX_CTL_EN_(rx->channel_number), 2856 0, 1000, 20000, 100); 2857 2858 lan743x_csr_write(adapter, DMAC_CMD, 2859 DMAC_CMD_STOP_R_(rx->channel_number)); 2860 lan743x_dmac_rx_wait_till_stopped(adapter, rx->channel_number); 2861 2862 lan743x_csr_write(adapter, DMAC_INT_EN_CLR, 2863 DMAC_INT_BIT_RXFRM_(rx->channel_number)); 2864 lan743x_csr_write(adapter, INT_EN_CLR, 2865 INT_BIT_DMA_RX_(rx->channel_number)); 2866 napi_disable(&rx->napi); 2867 2868 netif_napi_del(&rx->napi); 2869 2870 lan743x_rx_ring_cleanup(rx); 2871 } 2872 2873 static int lan743x_rx_open(struct lan743x_rx *rx) 2874 { 2875 struct lan743x_adapter *adapter = rx->adapter; 2876 u32 data = 0; 2877 int ret; 2878 2879 rx->frame_count = 0; 2880 ret = lan743x_rx_ring_init(rx); 2881 if (ret) 2882 goto return_error; 2883 2884 netif_napi_add(adapter->netdev, &rx->napi, lan743x_rx_napi_poll); 2885 2886 lan743x_csr_write(adapter, DMAC_CMD, 2887 DMAC_CMD_RX_SWR_(rx->channel_number)); 2888 lan743x_csr_wait_for_bit(adapter, DMAC_CMD, 2889 DMAC_CMD_RX_SWR_(rx->channel_number), 2890 0, 1000, 20000, 100); 2891 2892 /* set ring base address */ 2893 lan743x_csr_write(adapter, 2894 RX_BASE_ADDRH(rx->channel_number), 2895 DMA_ADDR_HIGH32(rx->ring_dma_ptr)); 2896 lan743x_csr_write(adapter, 2897 RX_BASE_ADDRL(rx->channel_number), 2898 DMA_ADDR_LOW32(rx->ring_dma_ptr)); 2899 2900 /* set rx write back address */ 2901 lan743x_csr_write(adapter, 2902 RX_HEAD_WRITEBACK_ADDRH(rx->channel_number), 2903 DMA_ADDR_HIGH32(rx->head_dma_ptr)); 2904 lan743x_csr_write(adapter, 2905 RX_HEAD_WRITEBACK_ADDRL(rx->channel_number), 2906 DMA_ADDR_LOW32(rx->head_dma_ptr)); 2907 data = RX_CFG_A_RX_HP_WB_EN_; 2908 if (!(adapter->csr.flags & LAN743X_CSR_FLAG_IS_A0)) { 2909 data |= (RX_CFG_A_RX_WB_ON_INT_TMR_ | 2910 RX_CFG_A_RX_WB_THRES_SET_(0x7) | 2911 RX_CFG_A_RX_PF_THRES_SET_(16) | 2912 RX_CFG_A_RX_PF_PRI_THRES_SET_(4)); 2913 } 2914 2915 /* set RX_CFG_A */ 2916 lan743x_csr_write(adapter, 2917 RX_CFG_A(rx->channel_number), data); 2918 2919 /* set RX_CFG_B */ 2920 data = lan743x_csr_read(adapter, RX_CFG_B(rx->channel_number)); 2921 data &= ~RX_CFG_B_RX_PAD_MASK_; 2922 if (!RX_HEAD_PADDING) 2923 data |= RX_CFG_B_RX_PAD_0_; 2924 else 2925 data |= RX_CFG_B_RX_PAD_2_; 2926 data &= ~RX_CFG_B_RX_RING_LEN_MASK_; 2927 data |= ((rx->ring_size) & RX_CFG_B_RX_RING_LEN_MASK_); 2928 data |= RX_CFG_B_TS_ALL_RX_; 2929 if (!(adapter->csr.flags & LAN743X_CSR_FLAG_IS_A0)) 2930 data |= RX_CFG_B_RDMABL_512_; 2931 2932 lan743x_csr_write(adapter, RX_CFG_B(rx->channel_number), data); 2933 rx->vector_flags = lan743x_intr_get_vector_flags(adapter, 2934 INT_BIT_DMA_RX_ 2935 (rx->channel_number)); 2936 2937 /* set RX_CFG_C */ 2938 data = 0; 2939 if (rx->vector_flags & LAN743X_VECTOR_FLAG_SOURCE_ENABLE_AUTO_CLEAR) 2940 data |= RX_CFG_C_RX_TOP_INT_EN_AUTO_CLR_; 2941 if (rx->vector_flags & LAN743X_VECTOR_FLAG_SOURCE_STATUS_AUTO_CLEAR) 2942 data |= RX_CFG_C_RX_DMA_INT_STS_AUTO_CLR_; 2943 if (rx->vector_flags & LAN743X_VECTOR_FLAG_SOURCE_STATUS_R2C) 2944 data |= RX_CFG_C_RX_INT_STS_R2C_MODE_MASK_; 2945 if (rx->vector_flags & LAN743X_VECTOR_FLAG_SOURCE_ENABLE_R2C) 2946 data |= RX_CFG_C_RX_INT_EN_R2C_; 2947 lan743x_csr_write(adapter, RX_CFG_C(rx->channel_number), data); 2948 2949 rx->last_tail = ((u32)(rx->ring_size - 1)); 2950 lan743x_csr_write(adapter, RX_TAIL(rx->channel_number), 2951 rx->last_tail); 2952 rx->last_head = lan743x_csr_read(adapter, RX_HEAD(rx->channel_number)); 2953 if (rx->last_head) { 2954 ret = -EIO; 2955 goto napi_delete; 2956 } 2957 2958 napi_enable(&rx->napi); 2959 2960 lan743x_csr_write(adapter, INT_EN_SET, 2961 INT_BIT_DMA_RX_(rx->channel_number)); 2962 lan743x_csr_write(adapter, DMAC_INT_STS, 2963 DMAC_INT_BIT_RXFRM_(rx->channel_number)); 2964 lan743x_csr_write(adapter, DMAC_INT_EN_SET, 2965 DMAC_INT_BIT_RXFRM_(rx->channel_number)); 2966 lan743x_csr_write(adapter, DMAC_CMD, 2967 DMAC_CMD_START_R_(rx->channel_number)); 2968 2969 /* initialize fifo */ 2970 lan743x_csr_write(adapter, FCT_RX_CTL, 2971 FCT_RX_CTL_RESET_(rx->channel_number)); 2972 lan743x_csr_wait_for_bit(adapter, FCT_RX_CTL, 2973 FCT_RX_CTL_RESET_(rx->channel_number), 2974 0, 1000, 20000, 100); 2975 lan743x_csr_write(adapter, FCT_FLOW(rx->channel_number), 2976 FCT_FLOW_CTL_REQ_EN_ | 2977 FCT_FLOW_CTL_ON_THRESHOLD_SET_(0x2A) | 2978 FCT_FLOW_CTL_OFF_THRESHOLD_SET_(0xA)); 2979 2980 /* enable fifo */ 2981 lan743x_csr_write(adapter, FCT_RX_CTL, 2982 FCT_RX_CTL_EN_(rx->channel_number)); 2983 return 0; 2984 2985 napi_delete: 2986 netif_napi_del(&rx->napi); 2987 lan743x_rx_ring_cleanup(rx); 2988 2989 return_error: 2990 return ret; 2991 } 2992 2993 static int lan743x_netdev_close(struct net_device *netdev) 2994 { 2995 struct lan743x_adapter *adapter = netdev_priv(netdev); 2996 int index; 2997 2998 for (index = 0; index < adapter->used_tx_channels; index++) 2999 lan743x_tx_close(&adapter->tx[index]); 3000 3001 for (index = 0; index < LAN743X_USED_RX_CHANNELS; index++) 3002 lan743x_rx_close(&adapter->rx[index]); 3003 3004 lan743x_ptp_close(adapter); 3005 3006 lan743x_phy_close(adapter); 3007 3008 lan743x_mac_close(adapter); 3009 3010 lan743x_intr_close(adapter); 3011 3012 return 0; 3013 } 3014 3015 static int lan743x_netdev_open(struct net_device *netdev) 3016 { 3017 struct lan743x_adapter *adapter = netdev_priv(netdev); 3018 int index; 3019 int ret; 3020 3021 ret = lan743x_intr_open(adapter); 3022 if (ret) 3023 goto return_error; 3024 3025 ret = lan743x_mac_open(adapter); 3026 if (ret) 3027 goto close_intr; 3028 3029 ret = lan743x_phy_open(adapter); 3030 if (ret) 3031 goto close_mac; 3032 3033 ret = lan743x_ptp_open(adapter); 3034 if (ret) 3035 goto close_phy; 3036 3037 lan743x_rfe_open(adapter); 3038 3039 for (index = 0; index < LAN743X_USED_RX_CHANNELS; index++) { 3040 ret = lan743x_rx_open(&adapter->rx[index]); 3041 if (ret) 3042 goto close_rx; 3043 } 3044 3045 for (index = 0; index < adapter->used_tx_channels; index++) { 3046 ret = lan743x_tx_open(&adapter->tx[index]); 3047 if (ret) 3048 goto close_tx; 3049 } 3050 return 0; 3051 3052 close_tx: 3053 for (index = 0; index < adapter->used_tx_channels; index++) { 3054 if (adapter->tx[index].ring_cpu_ptr) 3055 lan743x_tx_close(&adapter->tx[index]); 3056 } 3057 3058 close_rx: 3059 for (index = 0; index < LAN743X_USED_RX_CHANNELS; index++) { 3060 if (adapter->rx[index].ring_cpu_ptr) 3061 lan743x_rx_close(&adapter->rx[index]); 3062 } 3063 lan743x_ptp_close(adapter); 3064 3065 close_phy: 3066 lan743x_phy_close(adapter); 3067 3068 close_mac: 3069 lan743x_mac_close(adapter); 3070 3071 close_intr: 3072 lan743x_intr_close(adapter); 3073 3074 return_error: 3075 netif_warn(adapter, ifup, adapter->netdev, 3076 "Error opening LAN743x\n"); 3077 return ret; 3078 } 3079 3080 static netdev_tx_t lan743x_netdev_xmit_frame(struct sk_buff *skb, 3081 struct net_device *netdev) 3082 { 3083 struct lan743x_adapter *adapter = netdev_priv(netdev); 3084 u8 ch = 0; 3085 3086 if (adapter->is_pci11x1x) 3087 ch = skb->queue_mapping % PCI11X1X_USED_TX_CHANNELS; 3088 3089 return lan743x_tx_xmit_frame(&adapter->tx[ch], skb); 3090 } 3091 3092 static int lan743x_netdev_ioctl(struct net_device *netdev, 3093 struct ifreq *ifr, int cmd) 3094 { 3095 if (!netif_running(netdev)) 3096 return -EINVAL; 3097 if (cmd == SIOCSHWTSTAMP) 3098 return lan743x_ptp_ioctl(netdev, ifr, cmd); 3099 return phy_mii_ioctl(netdev->phydev, ifr, cmd); 3100 } 3101 3102 static void lan743x_netdev_set_multicast(struct net_device *netdev) 3103 { 3104 struct lan743x_adapter *adapter = netdev_priv(netdev); 3105 3106 lan743x_rfe_set_multicast(adapter); 3107 } 3108 3109 static int lan743x_netdev_change_mtu(struct net_device *netdev, int new_mtu) 3110 { 3111 struct lan743x_adapter *adapter = netdev_priv(netdev); 3112 int ret = 0; 3113 3114 ret = lan743x_mac_set_mtu(adapter, new_mtu); 3115 if (!ret) 3116 netdev->mtu = new_mtu; 3117 return ret; 3118 } 3119 3120 static void lan743x_netdev_get_stats64(struct net_device *netdev, 3121 struct rtnl_link_stats64 *stats) 3122 { 3123 struct lan743x_adapter *adapter = netdev_priv(netdev); 3124 3125 stats->rx_packets = lan743x_csr_read(adapter, STAT_RX_TOTAL_FRAMES); 3126 stats->tx_packets = lan743x_csr_read(adapter, STAT_TX_TOTAL_FRAMES); 3127 stats->rx_bytes = lan743x_csr_read(adapter, 3128 STAT_RX_UNICAST_BYTE_COUNT) + 3129 lan743x_csr_read(adapter, 3130 STAT_RX_BROADCAST_BYTE_COUNT) + 3131 lan743x_csr_read(adapter, 3132 STAT_RX_MULTICAST_BYTE_COUNT); 3133 stats->tx_bytes = lan743x_csr_read(adapter, 3134 STAT_TX_UNICAST_BYTE_COUNT) + 3135 lan743x_csr_read(adapter, 3136 STAT_TX_BROADCAST_BYTE_COUNT) + 3137 lan743x_csr_read(adapter, 3138 STAT_TX_MULTICAST_BYTE_COUNT); 3139 stats->rx_errors = lan743x_csr_read(adapter, STAT_RX_FCS_ERRORS) + 3140 lan743x_csr_read(adapter, 3141 STAT_RX_ALIGNMENT_ERRORS) + 3142 lan743x_csr_read(adapter, STAT_RX_JABBER_ERRORS) + 3143 lan743x_csr_read(adapter, 3144 STAT_RX_UNDERSIZE_FRAME_ERRORS) + 3145 lan743x_csr_read(adapter, 3146 STAT_RX_OVERSIZE_FRAME_ERRORS); 3147 stats->tx_errors = lan743x_csr_read(adapter, STAT_TX_FCS_ERRORS) + 3148 lan743x_csr_read(adapter, 3149 STAT_TX_EXCESS_DEFERRAL_ERRORS) + 3150 lan743x_csr_read(adapter, STAT_TX_CARRIER_ERRORS); 3151 stats->rx_dropped = lan743x_csr_read(adapter, 3152 STAT_RX_DROPPED_FRAMES); 3153 stats->tx_dropped = lan743x_csr_read(adapter, 3154 STAT_TX_EXCESSIVE_COLLISION); 3155 stats->multicast = lan743x_csr_read(adapter, 3156 STAT_RX_MULTICAST_FRAMES) + 3157 lan743x_csr_read(adapter, 3158 STAT_TX_MULTICAST_FRAMES); 3159 stats->collisions = lan743x_csr_read(adapter, 3160 STAT_TX_SINGLE_COLLISIONS) + 3161 lan743x_csr_read(adapter, 3162 STAT_TX_MULTIPLE_COLLISIONS) + 3163 lan743x_csr_read(adapter, 3164 STAT_TX_LATE_COLLISIONS); 3165 } 3166 3167 static int lan743x_netdev_set_mac_address(struct net_device *netdev, 3168 void *addr) 3169 { 3170 struct lan743x_adapter *adapter = netdev_priv(netdev); 3171 struct sockaddr *sock_addr = addr; 3172 int ret; 3173 3174 ret = eth_prepare_mac_addr_change(netdev, sock_addr); 3175 if (ret) 3176 return ret; 3177 eth_hw_addr_set(netdev, sock_addr->sa_data); 3178 lan743x_mac_set_address(adapter, sock_addr->sa_data); 3179 lan743x_rfe_update_mac_address(adapter); 3180 return 0; 3181 } 3182 3183 static const struct net_device_ops lan743x_netdev_ops = { 3184 .ndo_open = lan743x_netdev_open, 3185 .ndo_stop = lan743x_netdev_close, 3186 .ndo_start_xmit = lan743x_netdev_xmit_frame, 3187 .ndo_eth_ioctl = lan743x_netdev_ioctl, 3188 .ndo_set_rx_mode = lan743x_netdev_set_multicast, 3189 .ndo_change_mtu = lan743x_netdev_change_mtu, 3190 .ndo_get_stats64 = lan743x_netdev_get_stats64, 3191 .ndo_set_mac_address = lan743x_netdev_set_mac_address, 3192 }; 3193 3194 static void lan743x_hardware_cleanup(struct lan743x_adapter *adapter) 3195 { 3196 lan743x_csr_write(adapter, INT_EN_CLR, 0xFFFFFFFF); 3197 } 3198 3199 static void lan743x_mdiobus_cleanup(struct lan743x_adapter *adapter) 3200 { 3201 mdiobus_unregister(adapter->mdiobus); 3202 } 3203 3204 static void lan743x_full_cleanup(struct lan743x_adapter *adapter) 3205 { 3206 unregister_netdev(adapter->netdev); 3207 3208 lan743x_mdiobus_cleanup(adapter); 3209 lan743x_hardware_cleanup(adapter); 3210 lan743x_pci_cleanup(adapter); 3211 } 3212 3213 static int lan743x_hardware_init(struct lan743x_adapter *adapter, 3214 struct pci_dev *pdev) 3215 { 3216 struct lan743x_tx *tx; 3217 int index; 3218 int ret; 3219 3220 adapter->is_pci11x1x = is_pci11x1x_chip(adapter); 3221 if (adapter->is_pci11x1x) { 3222 adapter->max_tx_channels = PCI11X1X_MAX_TX_CHANNELS; 3223 adapter->used_tx_channels = PCI11X1X_USED_TX_CHANNELS; 3224 adapter->max_vector_count = PCI11X1X_MAX_VECTOR_COUNT; 3225 pci11x1x_strap_get_status(adapter); 3226 spin_lock_init(&adapter->eth_syslock_spinlock); 3227 mutex_init(&adapter->sgmii_rw_lock); 3228 } else { 3229 adapter->max_tx_channels = LAN743X_MAX_TX_CHANNELS; 3230 adapter->used_tx_channels = LAN743X_USED_TX_CHANNELS; 3231 adapter->max_vector_count = LAN743X_MAX_VECTOR_COUNT; 3232 } 3233 3234 adapter->intr.irq = adapter->pdev->irq; 3235 lan743x_csr_write(adapter, INT_EN_CLR, 0xFFFFFFFF); 3236 3237 ret = lan743x_gpio_init(adapter); 3238 if (ret) 3239 return ret; 3240 3241 ret = lan743x_mac_init(adapter); 3242 if (ret) 3243 return ret; 3244 3245 ret = lan743x_phy_init(adapter); 3246 if (ret) 3247 return ret; 3248 3249 ret = lan743x_ptp_init(adapter); 3250 if (ret) 3251 return ret; 3252 3253 lan743x_rfe_update_mac_address(adapter); 3254 3255 ret = lan743x_dmac_init(adapter); 3256 if (ret) 3257 return ret; 3258 3259 for (index = 0; index < LAN743X_USED_RX_CHANNELS; index++) { 3260 adapter->rx[index].adapter = adapter; 3261 adapter->rx[index].channel_number = index; 3262 } 3263 3264 for (index = 0; index < adapter->used_tx_channels; index++) { 3265 tx = &adapter->tx[index]; 3266 tx->adapter = adapter; 3267 tx->channel_number = index; 3268 spin_lock_init(&tx->ring_lock); 3269 } 3270 3271 return 0; 3272 } 3273 3274 static int lan743x_mdiobus_init(struct lan743x_adapter *adapter) 3275 { 3276 u32 sgmii_ctl; 3277 int ret; 3278 3279 adapter->mdiobus = devm_mdiobus_alloc(&adapter->pdev->dev); 3280 if (!(adapter->mdiobus)) { 3281 ret = -ENOMEM; 3282 goto return_error; 3283 } 3284 3285 adapter->mdiobus->priv = (void *)adapter; 3286 if (adapter->is_pci11x1x) { 3287 if (adapter->is_sgmii_en) { 3288 sgmii_ctl = lan743x_csr_read(adapter, SGMII_CTL); 3289 sgmii_ctl |= SGMII_CTL_SGMII_ENABLE_; 3290 sgmii_ctl &= ~SGMII_CTL_SGMII_POWER_DN_; 3291 lan743x_csr_write(adapter, SGMII_CTL, sgmii_ctl); 3292 netif_dbg(adapter, drv, adapter->netdev, 3293 "SGMII operation\n"); 3294 adapter->mdiobus->read = lan743x_mdiobus_read_c22; 3295 adapter->mdiobus->write = lan743x_mdiobus_write_c22; 3296 adapter->mdiobus->read_c45 = lan743x_mdiobus_read_c45; 3297 adapter->mdiobus->write_c45 = lan743x_mdiobus_write_c45; 3298 adapter->mdiobus->name = "lan743x-mdiobus-c45"; 3299 netif_dbg(adapter, drv, adapter->netdev, 3300 "lan743x-mdiobus-c45\n"); 3301 } else { 3302 sgmii_ctl = lan743x_csr_read(adapter, SGMII_CTL); 3303 sgmii_ctl &= ~SGMII_CTL_SGMII_ENABLE_; 3304 sgmii_ctl |= SGMII_CTL_SGMII_POWER_DN_; 3305 lan743x_csr_write(adapter, SGMII_CTL, sgmii_ctl); 3306 netif_dbg(adapter, drv, adapter->netdev, 3307 "RGMII operation\n"); 3308 // Only C22 support when RGMII I/F 3309 adapter->mdiobus->read = lan743x_mdiobus_read_c22; 3310 adapter->mdiobus->write = lan743x_mdiobus_write_c22; 3311 adapter->mdiobus->name = "lan743x-mdiobus"; 3312 netif_dbg(adapter, drv, adapter->netdev, 3313 "lan743x-mdiobus\n"); 3314 } 3315 } else { 3316 adapter->mdiobus->read = lan743x_mdiobus_read_c22; 3317 adapter->mdiobus->write = lan743x_mdiobus_write_c22; 3318 adapter->mdiobus->name = "lan743x-mdiobus"; 3319 netif_dbg(adapter, drv, adapter->netdev, "lan743x-mdiobus\n"); 3320 } 3321 3322 snprintf(adapter->mdiobus->id, MII_BUS_ID_SIZE, 3323 "pci-%s", pci_name(adapter->pdev)); 3324 3325 if ((adapter->csr.id_rev & ID_REV_ID_MASK_) == ID_REV_ID_LAN7430_) 3326 /* LAN7430 uses internal phy at address 1 */ 3327 adapter->mdiobus->phy_mask = ~(u32)BIT(1); 3328 3329 /* register mdiobus */ 3330 ret = mdiobus_register(adapter->mdiobus); 3331 if (ret < 0) 3332 goto return_error; 3333 return 0; 3334 3335 return_error: 3336 return ret; 3337 } 3338 3339 /* lan743x_pcidev_probe - Device Initialization Routine 3340 * @pdev: PCI device information struct 3341 * @id: entry in lan743x_pci_tbl 3342 * 3343 * Returns 0 on success, negative on failure 3344 * 3345 * initializes an adapter identified by a pci_dev structure. 3346 * The OS initialization, configuring of the adapter private structure, 3347 * and a hardware reset occur. 3348 **/ 3349 static int lan743x_pcidev_probe(struct pci_dev *pdev, 3350 const struct pci_device_id *id) 3351 { 3352 struct lan743x_adapter *adapter = NULL; 3353 struct net_device *netdev = NULL; 3354 int ret = -ENODEV; 3355 3356 if (id->device == PCI_DEVICE_ID_SMSC_A011 || 3357 id->device == PCI_DEVICE_ID_SMSC_A041) { 3358 netdev = devm_alloc_etherdev_mqs(&pdev->dev, 3359 sizeof(struct lan743x_adapter), 3360 PCI11X1X_USED_TX_CHANNELS, 3361 LAN743X_USED_RX_CHANNELS); 3362 } else { 3363 netdev = devm_alloc_etherdev_mqs(&pdev->dev, 3364 sizeof(struct lan743x_adapter), 3365 LAN743X_USED_TX_CHANNELS, 3366 LAN743X_USED_RX_CHANNELS); 3367 } 3368 3369 if (!netdev) 3370 goto return_error; 3371 3372 SET_NETDEV_DEV(netdev, &pdev->dev); 3373 pci_set_drvdata(pdev, netdev); 3374 adapter = netdev_priv(netdev); 3375 adapter->netdev = netdev; 3376 adapter->msg_enable = NETIF_MSG_DRV | NETIF_MSG_PROBE | 3377 NETIF_MSG_LINK | NETIF_MSG_IFUP | 3378 NETIF_MSG_IFDOWN | NETIF_MSG_TX_QUEUED; 3379 netdev->max_mtu = LAN743X_MAX_FRAME_SIZE; 3380 3381 of_get_mac_address(pdev->dev.of_node, adapter->mac_address); 3382 3383 ret = lan743x_pci_init(adapter, pdev); 3384 if (ret) 3385 goto return_error; 3386 3387 ret = lan743x_csr_init(adapter); 3388 if (ret) 3389 goto cleanup_pci; 3390 3391 ret = lan743x_hardware_init(adapter, pdev); 3392 if (ret) 3393 goto cleanup_pci; 3394 3395 ret = lan743x_mdiobus_init(adapter); 3396 if (ret) 3397 goto cleanup_hardware; 3398 3399 adapter->netdev->netdev_ops = &lan743x_netdev_ops; 3400 adapter->netdev->ethtool_ops = &lan743x_ethtool_ops; 3401 adapter->netdev->features = NETIF_F_SG | NETIF_F_TSO | 3402 NETIF_F_HW_CSUM | NETIF_F_RXCSUM; 3403 adapter->netdev->hw_features = adapter->netdev->features; 3404 3405 /* carrier off reporting is important to ethtool even BEFORE open */ 3406 netif_carrier_off(netdev); 3407 3408 ret = register_netdev(adapter->netdev); 3409 if (ret < 0) 3410 goto cleanup_mdiobus; 3411 return 0; 3412 3413 cleanup_mdiobus: 3414 lan743x_mdiobus_cleanup(adapter); 3415 3416 cleanup_hardware: 3417 lan743x_hardware_cleanup(adapter); 3418 3419 cleanup_pci: 3420 lan743x_pci_cleanup(adapter); 3421 3422 return_error: 3423 pr_warn("Initialization failed\n"); 3424 return ret; 3425 } 3426 3427 /** 3428 * lan743x_pcidev_remove - Device Removal Routine 3429 * @pdev: PCI device information struct 3430 * 3431 * this is called by the PCI subsystem to alert the driver 3432 * that it should release a PCI device. This could be caused by a 3433 * Hot-Plug event, or because the driver is going to be removed from 3434 * memory. 3435 **/ 3436 static void lan743x_pcidev_remove(struct pci_dev *pdev) 3437 { 3438 struct net_device *netdev = pci_get_drvdata(pdev); 3439 struct lan743x_adapter *adapter = netdev_priv(netdev); 3440 3441 lan743x_full_cleanup(adapter); 3442 } 3443 3444 static void lan743x_pcidev_shutdown(struct pci_dev *pdev) 3445 { 3446 struct net_device *netdev = pci_get_drvdata(pdev); 3447 struct lan743x_adapter *adapter = netdev_priv(netdev); 3448 3449 rtnl_lock(); 3450 netif_device_detach(netdev); 3451 3452 /* close netdev when netdev is at running state. 3453 * For instance, it is true when system goes to sleep by pm-suspend 3454 * However, it is false when system goes to sleep by suspend GUI menu 3455 */ 3456 if (netif_running(netdev)) 3457 lan743x_netdev_close(netdev); 3458 rtnl_unlock(); 3459 3460 #ifdef CONFIG_PM 3461 pci_save_state(pdev); 3462 #endif 3463 3464 /* clean up lan743x portion */ 3465 lan743x_hardware_cleanup(adapter); 3466 } 3467 3468 #ifdef CONFIG_PM_SLEEP 3469 static u16 lan743x_pm_wakeframe_crc16(const u8 *buf, int len) 3470 { 3471 return bitrev16(crc16(0xFFFF, buf, len)); 3472 } 3473 3474 static void lan743x_pm_set_wol(struct lan743x_adapter *adapter) 3475 { 3476 const u8 ipv4_multicast[3] = { 0x01, 0x00, 0x5E }; 3477 const u8 ipv6_multicast[3] = { 0x33, 0x33 }; 3478 const u8 arp_type[2] = { 0x08, 0x06 }; 3479 int mask_index; 3480 u32 sopass; 3481 u32 pmtctl; 3482 u32 wucsr; 3483 u32 macrx; 3484 u16 crc; 3485 3486 for (mask_index = 0; mask_index < MAC_NUM_OF_WUF_CFG; mask_index++) 3487 lan743x_csr_write(adapter, MAC_WUF_CFG(mask_index), 0); 3488 3489 /* clear wake settings */ 3490 pmtctl = lan743x_csr_read(adapter, PMT_CTL); 3491 pmtctl |= PMT_CTL_WUPS_MASK_; 3492 pmtctl &= ~(PMT_CTL_GPIO_WAKEUP_EN_ | PMT_CTL_EEE_WAKEUP_EN_ | 3493 PMT_CTL_WOL_EN_ | PMT_CTL_MAC_D3_RX_CLK_OVR_ | 3494 PMT_CTL_RX_FCT_RFE_D3_CLK_OVR_ | PMT_CTL_ETH_PHY_WAKE_EN_); 3495 3496 macrx = lan743x_csr_read(adapter, MAC_RX); 3497 3498 wucsr = 0; 3499 mask_index = 0; 3500 3501 pmtctl |= PMT_CTL_ETH_PHY_D3_COLD_OVR_ | PMT_CTL_ETH_PHY_D3_OVR_; 3502 3503 if (adapter->wolopts & WAKE_PHY) { 3504 pmtctl |= PMT_CTL_ETH_PHY_EDPD_PLL_CTL_; 3505 pmtctl |= PMT_CTL_ETH_PHY_WAKE_EN_; 3506 } 3507 if (adapter->wolopts & WAKE_MAGIC) { 3508 wucsr |= MAC_WUCSR_MPEN_; 3509 macrx |= MAC_RX_RXEN_; 3510 pmtctl |= PMT_CTL_WOL_EN_ | PMT_CTL_MAC_D3_RX_CLK_OVR_; 3511 } 3512 if (adapter->wolopts & WAKE_UCAST) { 3513 wucsr |= MAC_WUCSR_RFE_WAKE_EN_ | MAC_WUCSR_PFDA_EN_; 3514 macrx |= MAC_RX_RXEN_; 3515 pmtctl |= PMT_CTL_WOL_EN_ | PMT_CTL_MAC_D3_RX_CLK_OVR_; 3516 pmtctl |= PMT_CTL_RX_FCT_RFE_D3_CLK_OVR_; 3517 } 3518 if (adapter->wolopts & WAKE_BCAST) { 3519 wucsr |= MAC_WUCSR_RFE_WAKE_EN_ | MAC_WUCSR_BCST_EN_; 3520 macrx |= MAC_RX_RXEN_; 3521 pmtctl |= PMT_CTL_WOL_EN_ | PMT_CTL_MAC_D3_RX_CLK_OVR_; 3522 pmtctl |= PMT_CTL_RX_FCT_RFE_D3_CLK_OVR_; 3523 } 3524 if (adapter->wolopts & WAKE_MCAST) { 3525 /* IPv4 multicast */ 3526 crc = lan743x_pm_wakeframe_crc16(ipv4_multicast, 3); 3527 lan743x_csr_write(adapter, MAC_WUF_CFG(mask_index), 3528 MAC_WUF_CFG_EN_ | MAC_WUF_CFG_TYPE_MCAST_ | 3529 (0 << MAC_WUF_CFG_OFFSET_SHIFT_) | 3530 (crc & MAC_WUF_CFG_CRC16_MASK_)); 3531 lan743x_csr_write(adapter, MAC_WUF_MASK0(mask_index), 7); 3532 lan743x_csr_write(adapter, MAC_WUF_MASK1(mask_index), 0); 3533 lan743x_csr_write(adapter, MAC_WUF_MASK2(mask_index), 0); 3534 lan743x_csr_write(adapter, MAC_WUF_MASK3(mask_index), 0); 3535 mask_index++; 3536 3537 /* IPv6 multicast */ 3538 crc = lan743x_pm_wakeframe_crc16(ipv6_multicast, 2); 3539 lan743x_csr_write(adapter, MAC_WUF_CFG(mask_index), 3540 MAC_WUF_CFG_EN_ | MAC_WUF_CFG_TYPE_MCAST_ | 3541 (0 << MAC_WUF_CFG_OFFSET_SHIFT_) | 3542 (crc & MAC_WUF_CFG_CRC16_MASK_)); 3543 lan743x_csr_write(adapter, MAC_WUF_MASK0(mask_index), 3); 3544 lan743x_csr_write(adapter, MAC_WUF_MASK1(mask_index), 0); 3545 lan743x_csr_write(adapter, MAC_WUF_MASK2(mask_index), 0); 3546 lan743x_csr_write(adapter, MAC_WUF_MASK3(mask_index), 0); 3547 mask_index++; 3548 3549 wucsr |= MAC_WUCSR_RFE_WAKE_EN_ | MAC_WUCSR_WAKE_EN_; 3550 macrx |= MAC_RX_RXEN_; 3551 pmtctl |= PMT_CTL_WOL_EN_ | PMT_CTL_MAC_D3_RX_CLK_OVR_; 3552 pmtctl |= PMT_CTL_RX_FCT_RFE_D3_CLK_OVR_; 3553 } 3554 if (adapter->wolopts & WAKE_ARP) { 3555 /* set MAC_WUF_CFG & WUF_MASK 3556 * for packettype (offset 12,13) = ARP (0x0806) 3557 */ 3558 crc = lan743x_pm_wakeframe_crc16(arp_type, 2); 3559 lan743x_csr_write(adapter, MAC_WUF_CFG(mask_index), 3560 MAC_WUF_CFG_EN_ | MAC_WUF_CFG_TYPE_ALL_ | 3561 (0 << MAC_WUF_CFG_OFFSET_SHIFT_) | 3562 (crc & MAC_WUF_CFG_CRC16_MASK_)); 3563 lan743x_csr_write(adapter, MAC_WUF_MASK0(mask_index), 0x3000); 3564 lan743x_csr_write(adapter, MAC_WUF_MASK1(mask_index), 0); 3565 lan743x_csr_write(adapter, MAC_WUF_MASK2(mask_index), 0); 3566 lan743x_csr_write(adapter, MAC_WUF_MASK3(mask_index), 0); 3567 mask_index++; 3568 3569 wucsr |= MAC_WUCSR_RFE_WAKE_EN_ | MAC_WUCSR_WAKE_EN_; 3570 macrx |= MAC_RX_RXEN_; 3571 pmtctl |= PMT_CTL_WOL_EN_ | PMT_CTL_MAC_D3_RX_CLK_OVR_; 3572 pmtctl |= PMT_CTL_RX_FCT_RFE_D3_CLK_OVR_; 3573 } 3574 3575 if (adapter->wolopts & WAKE_MAGICSECURE) { 3576 sopass = *(u32 *)adapter->sopass; 3577 lan743x_csr_write(adapter, MAC_MP_SO_LO, sopass); 3578 sopass = *(u16 *)&adapter->sopass[4]; 3579 lan743x_csr_write(adapter, MAC_MP_SO_HI, sopass); 3580 wucsr |= MAC_MP_SO_EN_; 3581 } 3582 3583 lan743x_csr_write(adapter, MAC_WUCSR, wucsr); 3584 lan743x_csr_write(adapter, PMT_CTL, pmtctl); 3585 lan743x_csr_write(adapter, MAC_RX, macrx); 3586 } 3587 3588 static int lan743x_pm_suspend(struct device *dev) 3589 { 3590 struct pci_dev *pdev = to_pci_dev(dev); 3591 struct net_device *netdev = pci_get_drvdata(pdev); 3592 struct lan743x_adapter *adapter = netdev_priv(netdev); 3593 u32 data; 3594 3595 lan743x_pcidev_shutdown(pdev); 3596 3597 /* clear all wakes */ 3598 lan743x_csr_write(adapter, MAC_WUCSR, 0); 3599 lan743x_csr_write(adapter, MAC_WUCSR2, 0); 3600 lan743x_csr_write(adapter, MAC_WK_SRC, 0xFFFFFFFF); 3601 3602 if (adapter->wolopts) 3603 lan743x_pm_set_wol(adapter); 3604 3605 if (adapter->is_pci11x1x) { 3606 /* Save HW_CFG to config again in PM resume */ 3607 data = lan743x_csr_read(adapter, HW_CFG); 3608 adapter->hw_cfg = data; 3609 data |= (HW_CFG_RST_PROTECT_PCIE_ | 3610 HW_CFG_D3_RESET_DIS_ | 3611 HW_CFG_D3_VAUX_OVR_ | 3612 HW_CFG_HOT_RESET_DIS_ | 3613 HW_CFG_RST_PROTECT_); 3614 lan743x_csr_write(adapter, HW_CFG, data); 3615 } 3616 3617 /* Host sets PME_En, put D3hot */ 3618 return pci_prepare_to_sleep(pdev); 3619 } 3620 3621 static int lan743x_pm_resume(struct device *dev) 3622 { 3623 struct pci_dev *pdev = to_pci_dev(dev); 3624 struct net_device *netdev = pci_get_drvdata(pdev); 3625 struct lan743x_adapter *adapter = netdev_priv(netdev); 3626 int ret; 3627 3628 pci_set_power_state(pdev, PCI_D0); 3629 pci_restore_state(pdev); 3630 pci_save_state(pdev); 3631 3632 /* Restore HW_CFG that was saved during pm suspend */ 3633 if (adapter->is_pci11x1x) 3634 lan743x_csr_write(adapter, HW_CFG, adapter->hw_cfg); 3635 3636 ret = lan743x_hardware_init(adapter, pdev); 3637 if (ret) { 3638 netif_err(adapter, probe, adapter->netdev, 3639 "lan743x_hardware_init returned %d\n", ret); 3640 lan743x_pci_cleanup(adapter); 3641 return ret; 3642 } 3643 3644 /* open netdev when netdev is at running state while resume. 3645 * For instance, it is true when system wakesup after pm-suspend 3646 * However, it is false when system wakes up after suspend GUI menu 3647 */ 3648 if (netif_running(netdev)) 3649 lan743x_netdev_open(netdev); 3650 3651 netif_device_attach(netdev); 3652 ret = lan743x_csr_read(adapter, MAC_WK_SRC); 3653 netif_info(adapter, drv, adapter->netdev, 3654 "Wakeup source : 0x%08X\n", ret); 3655 3656 return 0; 3657 } 3658 3659 static const struct dev_pm_ops lan743x_pm_ops = { 3660 SET_SYSTEM_SLEEP_PM_OPS(lan743x_pm_suspend, lan743x_pm_resume) 3661 }; 3662 #endif /* CONFIG_PM_SLEEP */ 3663 3664 static const struct pci_device_id lan743x_pcidev_tbl[] = { 3665 { PCI_DEVICE(PCI_VENDOR_ID_SMSC, PCI_DEVICE_ID_SMSC_LAN7430) }, 3666 { PCI_DEVICE(PCI_VENDOR_ID_SMSC, PCI_DEVICE_ID_SMSC_LAN7431) }, 3667 { PCI_DEVICE(PCI_VENDOR_ID_SMSC, PCI_DEVICE_ID_SMSC_A011) }, 3668 { PCI_DEVICE(PCI_VENDOR_ID_SMSC, PCI_DEVICE_ID_SMSC_A041) }, 3669 { 0, } 3670 }; 3671 3672 MODULE_DEVICE_TABLE(pci, lan743x_pcidev_tbl); 3673 3674 static struct pci_driver lan743x_pcidev_driver = { 3675 .name = DRIVER_NAME, 3676 .id_table = lan743x_pcidev_tbl, 3677 .probe = lan743x_pcidev_probe, 3678 .remove = lan743x_pcidev_remove, 3679 #ifdef CONFIG_PM_SLEEP 3680 .driver.pm = &lan743x_pm_ops, 3681 #endif 3682 .shutdown = lan743x_pcidev_shutdown, 3683 }; 3684 3685 module_pci_driver(lan743x_pcidev_driver); 3686 3687 MODULE_AUTHOR(DRIVER_AUTHOR); 3688 MODULE_DESCRIPTION(DRIVER_DESC); 3689 MODULE_LICENSE("GPL"); 3690