1 /* SPDX-License-Identifier: GPL-2.0+ */ 2 /* Copyright (C) 2018 Microchip Technology Inc. */ 3 4 #include <linux/module.h> 5 #include <linux/pci.h> 6 #include <linux/netdevice.h> 7 #include <linux/etherdevice.h> 8 #include <linux/crc32.h> 9 #include <linux/microchipphy.h> 10 #include <linux/net_tstamp.h> 11 #include <linux/of_mdio.h> 12 #include <linux/of_net.h> 13 #include <linux/phy.h> 14 #include <linux/phy_fixed.h> 15 #include <linux/rtnetlink.h> 16 #include <linux/iopoll.h> 17 #include <linux/crc16.h> 18 #include "lan743x_main.h" 19 #include "lan743x_ethtool.h" 20 21 static void lan743x_pci_cleanup(struct lan743x_adapter *adapter) 22 { 23 pci_release_selected_regions(adapter->pdev, 24 pci_select_bars(adapter->pdev, 25 IORESOURCE_MEM)); 26 pci_disable_device(adapter->pdev); 27 } 28 29 static int lan743x_pci_init(struct lan743x_adapter *adapter, 30 struct pci_dev *pdev) 31 { 32 unsigned long bars = 0; 33 int ret; 34 35 adapter->pdev = pdev; 36 ret = pci_enable_device_mem(pdev); 37 if (ret) 38 goto return_error; 39 40 netif_info(adapter, probe, adapter->netdev, 41 "PCI: Vendor ID = 0x%04X, Device ID = 0x%04X\n", 42 pdev->vendor, pdev->device); 43 bars = pci_select_bars(pdev, IORESOURCE_MEM); 44 if (!test_bit(0, &bars)) 45 goto disable_device; 46 47 ret = pci_request_selected_regions(pdev, bars, DRIVER_NAME); 48 if (ret) 49 goto disable_device; 50 51 pci_set_master(pdev); 52 return 0; 53 54 disable_device: 55 pci_disable_device(adapter->pdev); 56 57 return_error: 58 return ret; 59 } 60 61 u32 lan743x_csr_read(struct lan743x_adapter *adapter, int offset) 62 { 63 return ioread32(&adapter->csr.csr_address[offset]); 64 } 65 66 void lan743x_csr_write(struct lan743x_adapter *adapter, int offset, 67 u32 data) 68 { 69 iowrite32(data, &adapter->csr.csr_address[offset]); 70 } 71 72 #define LAN743X_CSR_READ_OP(offset) lan743x_csr_read(adapter, offset) 73 74 static int lan743x_csr_light_reset(struct lan743x_adapter *adapter) 75 { 76 u32 data; 77 78 data = lan743x_csr_read(adapter, HW_CFG); 79 data |= HW_CFG_LRST_; 80 lan743x_csr_write(adapter, HW_CFG, data); 81 82 return readx_poll_timeout(LAN743X_CSR_READ_OP, HW_CFG, data, 83 !(data & HW_CFG_LRST_), 100000, 10000000); 84 } 85 86 static int lan743x_csr_wait_for_bit(struct lan743x_adapter *adapter, 87 int offset, u32 bit_mask, 88 int target_value, int usleep_min, 89 int usleep_max, int count) 90 { 91 u32 data; 92 93 return readx_poll_timeout(LAN743X_CSR_READ_OP, offset, data, 94 target_value == ((data & bit_mask) ? 1 : 0), 95 usleep_max, usleep_min * count); 96 } 97 98 static int lan743x_csr_init(struct lan743x_adapter *adapter) 99 { 100 struct lan743x_csr *csr = &adapter->csr; 101 resource_size_t bar_start, bar_length; 102 int result; 103 104 bar_start = pci_resource_start(adapter->pdev, 0); 105 bar_length = pci_resource_len(adapter->pdev, 0); 106 csr->csr_address = devm_ioremap(&adapter->pdev->dev, 107 bar_start, bar_length); 108 if (!csr->csr_address) { 109 result = -ENOMEM; 110 goto clean_up; 111 } 112 113 csr->id_rev = lan743x_csr_read(adapter, ID_REV); 114 csr->fpga_rev = lan743x_csr_read(adapter, FPGA_REV); 115 netif_info(adapter, probe, adapter->netdev, 116 "ID_REV = 0x%08X, FPGA_REV = %d.%d\n", 117 csr->id_rev, FPGA_REV_GET_MAJOR_(csr->fpga_rev), 118 FPGA_REV_GET_MINOR_(csr->fpga_rev)); 119 if (!ID_REV_IS_VALID_CHIP_ID_(csr->id_rev)) { 120 result = -ENODEV; 121 goto clean_up; 122 } 123 124 csr->flags = LAN743X_CSR_FLAG_SUPPORTS_INTR_AUTO_SET_CLR; 125 switch (csr->id_rev & ID_REV_CHIP_REV_MASK_) { 126 case ID_REV_CHIP_REV_A0_: 127 csr->flags |= LAN743X_CSR_FLAG_IS_A0; 128 csr->flags &= ~LAN743X_CSR_FLAG_SUPPORTS_INTR_AUTO_SET_CLR; 129 break; 130 case ID_REV_CHIP_REV_B0_: 131 csr->flags |= LAN743X_CSR_FLAG_IS_B0; 132 break; 133 } 134 135 result = lan743x_csr_light_reset(adapter); 136 if (result) 137 goto clean_up; 138 return 0; 139 clean_up: 140 return result; 141 } 142 143 static void lan743x_intr_software_isr(struct lan743x_adapter *adapter) 144 { 145 struct lan743x_intr *intr = &adapter->intr; 146 147 /* disable the interrupt to prevent repeated re-triggering */ 148 lan743x_csr_write(adapter, INT_EN_CLR, INT_BIT_SW_GP_); 149 intr->software_isr_flag = true; 150 wake_up(&intr->software_isr_wq); 151 } 152 153 static void lan743x_tx_isr(void *context, u32 int_sts, u32 flags) 154 { 155 struct lan743x_tx *tx = context; 156 struct lan743x_adapter *adapter = tx->adapter; 157 bool enable_flag = true; 158 159 lan743x_csr_read(adapter, INT_EN_SET); 160 if (flags & LAN743X_VECTOR_FLAG_SOURCE_ENABLE_CLEAR) { 161 lan743x_csr_write(adapter, INT_EN_CLR, 162 INT_BIT_DMA_TX_(tx->channel_number)); 163 } 164 165 if (int_sts & INT_BIT_DMA_TX_(tx->channel_number)) { 166 u32 ioc_bit = DMAC_INT_BIT_TX_IOC_(tx->channel_number); 167 u32 dmac_int_sts; 168 u32 dmac_int_en; 169 170 if (flags & LAN743X_VECTOR_FLAG_SOURCE_STATUS_READ) 171 dmac_int_sts = lan743x_csr_read(adapter, DMAC_INT_STS); 172 else 173 dmac_int_sts = ioc_bit; 174 if (flags & LAN743X_VECTOR_FLAG_SOURCE_ENABLE_CHECK) 175 dmac_int_en = lan743x_csr_read(adapter, 176 DMAC_INT_EN_SET); 177 else 178 dmac_int_en = ioc_bit; 179 180 dmac_int_en &= ioc_bit; 181 dmac_int_sts &= dmac_int_en; 182 if (dmac_int_sts & ioc_bit) { 183 napi_schedule(&tx->napi); 184 enable_flag = false;/* poll func will enable later */ 185 } 186 } 187 188 if (enable_flag) 189 /* enable isr */ 190 lan743x_csr_write(adapter, INT_EN_SET, 191 INT_BIT_DMA_TX_(tx->channel_number)); 192 } 193 194 static void lan743x_rx_isr(void *context, u32 int_sts, u32 flags) 195 { 196 struct lan743x_rx *rx = context; 197 struct lan743x_adapter *adapter = rx->adapter; 198 bool enable_flag = true; 199 200 if (flags & LAN743X_VECTOR_FLAG_SOURCE_ENABLE_CLEAR) { 201 lan743x_csr_write(adapter, INT_EN_CLR, 202 INT_BIT_DMA_RX_(rx->channel_number)); 203 } 204 205 if (int_sts & INT_BIT_DMA_RX_(rx->channel_number)) { 206 u32 rx_frame_bit = DMAC_INT_BIT_RXFRM_(rx->channel_number); 207 u32 dmac_int_sts; 208 u32 dmac_int_en; 209 210 if (flags & LAN743X_VECTOR_FLAG_SOURCE_STATUS_READ) 211 dmac_int_sts = lan743x_csr_read(adapter, DMAC_INT_STS); 212 else 213 dmac_int_sts = rx_frame_bit; 214 if (flags & LAN743X_VECTOR_FLAG_SOURCE_ENABLE_CHECK) 215 dmac_int_en = lan743x_csr_read(adapter, 216 DMAC_INT_EN_SET); 217 else 218 dmac_int_en = rx_frame_bit; 219 220 dmac_int_en &= rx_frame_bit; 221 dmac_int_sts &= dmac_int_en; 222 if (dmac_int_sts & rx_frame_bit) { 223 napi_schedule(&rx->napi); 224 enable_flag = false;/* poll funct will enable later */ 225 } 226 } 227 228 if (enable_flag) { 229 /* enable isr */ 230 lan743x_csr_write(adapter, INT_EN_SET, 231 INT_BIT_DMA_RX_(rx->channel_number)); 232 } 233 } 234 235 static void lan743x_intr_shared_isr(void *context, u32 int_sts, u32 flags) 236 { 237 struct lan743x_adapter *adapter = context; 238 unsigned int channel; 239 240 if (int_sts & INT_BIT_ALL_RX_) { 241 for (channel = 0; channel < LAN743X_USED_RX_CHANNELS; 242 channel++) { 243 u32 int_bit = INT_BIT_DMA_RX_(channel); 244 245 if (int_sts & int_bit) { 246 lan743x_rx_isr(&adapter->rx[channel], 247 int_bit, flags); 248 int_sts &= ~int_bit; 249 } 250 } 251 } 252 if (int_sts & INT_BIT_ALL_TX_) { 253 for (channel = 0; channel < LAN743X_USED_TX_CHANNELS; 254 channel++) { 255 u32 int_bit = INT_BIT_DMA_TX_(channel); 256 257 if (int_sts & int_bit) { 258 lan743x_tx_isr(&adapter->tx[channel], 259 int_bit, flags); 260 int_sts &= ~int_bit; 261 } 262 } 263 } 264 if (int_sts & INT_BIT_ALL_OTHER_) { 265 if (int_sts & INT_BIT_SW_GP_) { 266 lan743x_intr_software_isr(adapter); 267 int_sts &= ~INT_BIT_SW_GP_; 268 } 269 if (int_sts & INT_BIT_1588_) { 270 lan743x_ptp_isr(adapter); 271 int_sts &= ~INT_BIT_1588_; 272 } 273 } 274 if (int_sts) 275 lan743x_csr_write(adapter, INT_EN_CLR, int_sts); 276 } 277 278 static irqreturn_t lan743x_intr_entry_isr(int irq, void *ptr) 279 { 280 struct lan743x_vector *vector = ptr; 281 struct lan743x_adapter *adapter = vector->adapter; 282 irqreturn_t result = IRQ_NONE; 283 u32 int_enables; 284 u32 int_sts; 285 286 if (vector->flags & LAN743X_VECTOR_FLAG_SOURCE_STATUS_READ) { 287 int_sts = lan743x_csr_read(adapter, INT_STS); 288 } else if (vector->flags & 289 (LAN743X_VECTOR_FLAG_SOURCE_STATUS_R2C | 290 LAN743X_VECTOR_FLAG_SOURCE_ENABLE_R2C)) { 291 int_sts = lan743x_csr_read(adapter, INT_STS_R2C); 292 } else { 293 /* use mask as implied status */ 294 int_sts = vector->int_mask | INT_BIT_MAS_; 295 } 296 297 if (!(int_sts & INT_BIT_MAS_)) 298 goto irq_done; 299 300 if (vector->flags & LAN743X_VECTOR_FLAG_VECTOR_ENABLE_ISR_CLEAR) 301 /* disable vector interrupt */ 302 lan743x_csr_write(adapter, 303 INT_VEC_EN_CLR, 304 INT_VEC_EN_(vector->vector_index)); 305 306 if (vector->flags & LAN743X_VECTOR_FLAG_MASTER_ENABLE_CLEAR) 307 /* disable master interrupt */ 308 lan743x_csr_write(adapter, INT_EN_CLR, INT_BIT_MAS_); 309 310 if (vector->flags & LAN743X_VECTOR_FLAG_SOURCE_ENABLE_CHECK) { 311 int_enables = lan743x_csr_read(adapter, INT_EN_SET); 312 } else { 313 /* use vector mask as implied enable mask */ 314 int_enables = vector->int_mask; 315 } 316 317 int_sts &= int_enables; 318 int_sts &= vector->int_mask; 319 if (int_sts) { 320 if (vector->handler) { 321 vector->handler(vector->context, 322 int_sts, vector->flags); 323 } else { 324 /* disable interrupts on this vector */ 325 lan743x_csr_write(adapter, INT_EN_CLR, 326 vector->int_mask); 327 } 328 result = IRQ_HANDLED; 329 } 330 331 if (vector->flags & LAN743X_VECTOR_FLAG_MASTER_ENABLE_SET) 332 /* enable master interrupt */ 333 lan743x_csr_write(adapter, INT_EN_SET, INT_BIT_MAS_); 334 335 if (vector->flags & LAN743X_VECTOR_FLAG_VECTOR_ENABLE_ISR_SET) 336 /* enable vector interrupt */ 337 lan743x_csr_write(adapter, 338 INT_VEC_EN_SET, 339 INT_VEC_EN_(vector->vector_index)); 340 irq_done: 341 return result; 342 } 343 344 static int lan743x_intr_test_isr(struct lan743x_adapter *adapter) 345 { 346 struct lan743x_intr *intr = &adapter->intr; 347 int ret; 348 349 intr->software_isr_flag = false; 350 351 /* enable and activate test interrupt */ 352 lan743x_csr_write(adapter, INT_EN_SET, INT_BIT_SW_GP_); 353 lan743x_csr_write(adapter, INT_SET, INT_BIT_SW_GP_); 354 355 ret = wait_event_timeout(intr->software_isr_wq, 356 intr->software_isr_flag, 357 msecs_to_jiffies(200)); 358 359 /* disable test interrupt */ 360 lan743x_csr_write(adapter, INT_EN_CLR, INT_BIT_SW_GP_); 361 362 return ret > 0 ? 0 : -ENODEV; 363 } 364 365 static int lan743x_intr_register_isr(struct lan743x_adapter *adapter, 366 int vector_index, u32 flags, 367 u32 int_mask, 368 lan743x_vector_handler handler, 369 void *context) 370 { 371 struct lan743x_vector *vector = &adapter->intr.vector_list 372 [vector_index]; 373 int ret; 374 375 vector->adapter = adapter; 376 vector->flags = flags; 377 vector->vector_index = vector_index; 378 vector->int_mask = int_mask; 379 vector->handler = handler; 380 vector->context = context; 381 382 ret = request_irq(vector->irq, 383 lan743x_intr_entry_isr, 384 (flags & LAN743X_VECTOR_FLAG_IRQ_SHARED) ? 385 IRQF_SHARED : 0, DRIVER_NAME, vector); 386 if (ret) { 387 vector->handler = NULL; 388 vector->context = NULL; 389 vector->int_mask = 0; 390 vector->flags = 0; 391 } 392 return ret; 393 } 394 395 static void lan743x_intr_unregister_isr(struct lan743x_adapter *adapter, 396 int vector_index) 397 { 398 struct lan743x_vector *vector = &adapter->intr.vector_list 399 [vector_index]; 400 401 free_irq(vector->irq, vector); 402 vector->handler = NULL; 403 vector->context = NULL; 404 vector->int_mask = 0; 405 vector->flags = 0; 406 } 407 408 static u32 lan743x_intr_get_vector_flags(struct lan743x_adapter *adapter, 409 u32 int_mask) 410 { 411 int index; 412 413 for (index = 0; index < LAN743X_MAX_VECTOR_COUNT; index++) { 414 if (adapter->intr.vector_list[index].int_mask & int_mask) 415 return adapter->intr.vector_list[index].flags; 416 } 417 return 0; 418 } 419 420 static void lan743x_intr_close(struct lan743x_adapter *adapter) 421 { 422 struct lan743x_intr *intr = &adapter->intr; 423 int index = 0; 424 425 lan743x_csr_write(adapter, INT_EN_CLR, INT_BIT_MAS_); 426 lan743x_csr_write(adapter, INT_VEC_EN_CLR, 0x000000FF); 427 428 for (index = 0; index < LAN743X_MAX_VECTOR_COUNT; index++) { 429 if (intr->flags & INTR_FLAG_IRQ_REQUESTED(index)) { 430 lan743x_intr_unregister_isr(adapter, index); 431 intr->flags &= ~INTR_FLAG_IRQ_REQUESTED(index); 432 } 433 } 434 435 if (intr->flags & INTR_FLAG_MSI_ENABLED) { 436 pci_disable_msi(adapter->pdev); 437 intr->flags &= ~INTR_FLAG_MSI_ENABLED; 438 } 439 440 if (intr->flags & INTR_FLAG_MSIX_ENABLED) { 441 pci_disable_msix(adapter->pdev); 442 intr->flags &= ~INTR_FLAG_MSIX_ENABLED; 443 } 444 } 445 446 static int lan743x_intr_open(struct lan743x_adapter *adapter) 447 { 448 struct msix_entry msix_entries[LAN743X_MAX_VECTOR_COUNT]; 449 struct lan743x_intr *intr = &adapter->intr; 450 u32 int_vec_en_auto_clr = 0; 451 u32 int_vec_map0 = 0; 452 u32 int_vec_map1 = 0; 453 int ret = -ENODEV; 454 int index = 0; 455 u32 flags = 0; 456 457 intr->number_of_vectors = 0; 458 459 /* Try to set up MSIX interrupts */ 460 memset(&msix_entries[0], 0, 461 sizeof(struct msix_entry) * LAN743X_MAX_VECTOR_COUNT); 462 for (index = 0; index < LAN743X_MAX_VECTOR_COUNT; index++) 463 msix_entries[index].entry = index; 464 ret = pci_enable_msix_range(adapter->pdev, 465 msix_entries, 1, 466 1 + LAN743X_USED_TX_CHANNELS + 467 LAN743X_USED_RX_CHANNELS); 468 469 if (ret > 0) { 470 intr->flags |= INTR_FLAG_MSIX_ENABLED; 471 intr->number_of_vectors = ret; 472 intr->using_vectors = true; 473 for (index = 0; index < intr->number_of_vectors; index++) 474 intr->vector_list[index].irq = msix_entries 475 [index].vector; 476 netif_info(adapter, ifup, adapter->netdev, 477 "using MSIX interrupts, number of vectors = %d\n", 478 intr->number_of_vectors); 479 } 480 481 /* If MSIX failed try to setup using MSI interrupts */ 482 if (!intr->number_of_vectors) { 483 if (!(adapter->csr.flags & LAN743X_CSR_FLAG_IS_A0)) { 484 if (!pci_enable_msi(adapter->pdev)) { 485 intr->flags |= INTR_FLAG_MSI_ENABLED; 486 intr->number_of_vectors = 1; 487 intr->using_vectors = true; 488 intr->vector_list[0].irq = 489 adapter->pdev->irq; 490 netif_info(adapter, ifup, adapter->netdev, 491 "using MSI interrupts, number of vectors = %d\n", 492 intr->number_of_vectors); 493 } 494 } 495 } 496 497 /* If MSIX, and MSI failed, setup using legacy interrupt */ 498 if (!intr->number_of_vectors) { 499 intr->number_of_vectors = 1; 500 intr->using_vectors = false; 501 intr->vector_list[0].irq = intr->irq; 502 netif_info(adapter, ifup, adapter->netdev, 503 "using legacy interrupts\n"); 504 } 505 506 /* At this point we must have at least one irq */ 507 lan743x_csr_write(adapter, INT_VEC_EN_CLR, 0xFFFFFFFF); 508 509 /* map all interrupts to vector 0 */ 510 lan743x_csr_write(adapter, INT_VEC_MAP0, 0x00000000); 511 lan743x_csr_write(adapter, INT_VEC_MAP1, 0x00000000); 512 lan743x_csr_write(adapter, INT_VEC_MAP2, 0x00000000); 513 flags = LAN743X_VECTOR_FLAG_SOURCE_STATUS_READ | 514 LAN743X_VECTOR_FLAG_SOURCE_STATUS_W2C | 515 LAN743X_VECTOR_FLAG_SOURCE_ENABLE_CHECK | 516 LAN743X_VECTOR_FLAG_SOURCE_ENABLE_CLEAR; 517 518 if (intr->using_vectors) { 519 flags |= LAN743X_VECTOR_FLAG_VECTOR_ENABLE_ISR_CLEAR | 520 LAN743X_VECTOR_FLAG_VECTOR_ENABLE_ISR_SET; 521 } else { 522 flags |= LAN743X_VECTOR_FLAG_MASTER_ENABLE_CLEAR | 523 LAN743X_VECTOR_FLAG_MASTER_ENABLE_SET | 524 LAN743X_VECTOR_FLAG_IRQ_SHARED; 525 } 526 527 if (adapter->csr.flags & LAN743X_CSR_FLAG_SUPPORTS_INTR_AUTO_SET_CLR) { 528 flags &= ~LAN743X_VECTOR_FLAG_SOURCE_STATUS_READ; 529 flags &= ~LAN743X_VECTOR_FLAG_SOURCE_STATUS_W2C; 530 flags &= ~LAN743X_VECTOR_FLAG_SOURCE_ENABLE_CLEAR; 531 flags &= ~LAN743X_VECTOR_FLAG_SOURCE_ENABLE_CHECK; 532 flags |= LAN743X_VECTOR_FLAG_SOURCE_STATUS_R2C; 533 flags |= LAN743X_VECTOR_FLAG_SOURCE_ENABLE_R2C; 534 } 535 536 init_waitqueue_head(&intr->software_isr_wq); 537 538 ret = lan743x_intr_register_isr(adapter, 0, flags, 539 INT_BIT_ALL_RX_ | INT_BIT_ALL_TX_ | 540 INT_BIT_ALL_OTHER_, 541 lan743x_intr_shared_isr, adapter); 542 if (ret) 543 goto clean_up; 544 intr->flags |= INTR_FLAG_IRQ_REQUESTED(0); 545 546 if (intr->using_vectors) 547 lan743x_csr_write(adapter, INT_VEC_EN_SET, 548 INT_VEC_EN_(0)); 549 550 if (!(adapter->csr.flags & LAN743X_CSR_FLAG_IS_A0)) { 551 lan743x_csr_write(adapter, INT_MOD_CFG0, LAN743X_INT_MOD); 552 lan743x_csr_write(adapter, INT_MOD_CFG1, LAN743X_INT_MOD); 553 lan743x_csr_write(adapter, INT_MOD_CFG2, LAN743X_INT_MOD); 554 lan743x_csr_write(adapter, INT_MOD_CFG3, LAN743X_INT_MOD); 555 lan743x_csr_write(adapter, INT_MOD_CFG4, LAN743X_INT_MOD); 556 lan743x_csr_write(adapter, INT_MOD_CFG5, LAN743X_INT_MOD); 557 lan743x_csr_write(adapter, INT_MOD_CFG6, LAN743X_INT_MOD); 558 lan743x_csr_write(adapter, INT_MOD_CFG7, LAN743X_INT_MOD); 559 lan743x_csr_write(adapter, INT_MOD_MAP0, 0x00005432); 560 lan743x_csr_write(adapter, INT_MOD_MAP1, 0x00000001); 561 lan743x_csr_write(adapter, INT_MOD_MAP2, 0x00FFFFFF); 562 } 563 564 /* enable interrupts */ 565 lan743x_csr_write(adapter, INT_EN_SET, INT_BIT_MAS_); 566 ret = lan743x_intr_test_isr(adapter); 567 if (ret) 568 goto clean_up; 569 570 if (intr->number_of_vectors > 1) { 571 int number_of_tx_vectors = intr->number_of_vectors - 1; 572 573 if (number_of_tx_vectors > LAN743X_USED_TX_CHANNELS) 574 number_of_tx_vectors = LAN743X_USED_TX_CHANNELS; 575 flags = LAN743X_VECTOR_FLAG_SOURCE_STATUS_READ | 576 LAN743X_VECTOR_FLAG_SOURCE_STATUS_W2C | 577 LAN743X_VECTOR_FLAG_SOURCE_ENABLE_CHECK | 578 LAN743X_VECTOR_FLAG_SOURCE_ENABLE_CLEAR | 579 LAN743X_VECTOR_FLAG_VECTOR_ENABLE_ISR_CLEAR | 580 LAN743X_VECTOR_FLAG_VECTOR_ENABLE_ISR_SET; 581 582 if (adapter->csr.flags & 583 LAN743X_CSR_FLAG_SUPPORTS_INTR_AUTO_SET_CLR) { 584 flags = LAN743X_VECTOR_FLAG_VECTOR_ENABLE_AUTO_SET | 585 LAN743X_VECTOR_FLAG_SOURCE_ENABLE_AUTO_SET | 586 LAN743X_VECTOR_FLAG_SOURCE_ENABLE_AUTO_CLEAR | 587 LAN743X_VECTOR_FLAG_SOURCE_STATUS_AUTO_CLEAR; 588 } 589 590 for (index = 0; index < number_of_tx_vectors; index++) { 591 u32 int_bit = INT_BIT_DMA_TX_(index); 592 int vector = index + 1; 593 594 /* map TX interrupt to vector */ 595 int_vec_map1 |= INT_VEC_MAP1_TX_VEC_(index, vector); 596 lan743x_csr_write(adapter, INT_VEC_MAP1, int_vec_map1); 597 598 /* Remove TX interrupt from shared mask */ 599 intr->vector_list[0].int_mask &= ~int_bit; 600 ret = lan743x_intr_register_isr(adapter, vector, flags, 601 int_bit, lan743x_tx_isr, 602 &adapter->tx[index]); 603 if (ret) 604 goto clean_up; 605 intr->flags |= INTR_FLAG_IRQ_REQUESTED(vector); 606 if (!(flags & 607 LAN743X_VECTOR_FLAG_VECTOR_ENABLE_AUTO_SET)) 608 lan743x_csr_write(adapter, INT_VEC_EN_SET, 609 INT_VEC_EN_(vector)); 610 } 611 } 612 if ((intr->number_of_vectors - LAN743X_USED_TX_CHANNELS) > 1) { 613 int number_of_rx_vectors = intr->number_of_vectors - 614 LAN743X_USED_TX_CHANNELS - 1; 615 616 if (number_of_rx_vectors > LAN743X_USED_RX_CHANNELS) 617 number_of_rx_vectors = LAN743X_USED_RX_CHANNELS; 618 619 flags = LAN743X_VECTOR_FLAG_SOURCE_STATUS_READ | 620 LAN743X_VECTOR_FLAG_SOURCE_STATUS_W2C | 621 LAN743X_VECTOR_FLAG_SOURCE_ENABLE_CHECK | 622 LAN743X_VECTOR_FLAG_SOURCE_ENABLE_CLEAR | 623 LAN743X_VECTOR_FLAG_VECTOR_ENABLE_ISR_CLEAR | 624 LAN743X_VECTOR_FLAG_VECTOR_ENABLE_ISR_SET; 625 626 if (adapter->csr.flags & 627 LAN743X_CSR_FLAG_SUPPORTS_INTR_AUTO_SET_CLR) { 628 flags = LAN743X_VECTOR_FLAG_VECTOR_ENABLE_AUTO_CLEAR | 629 LAN743X_VECTOR_FLAG_VECTOR_ENABLE_AUTO_SET | 630 LAN743X_VECTOR_FLAG_SOURCE_ENABLE_AUTO_SET | 631 LAN743X_VECTOR_FLAG_SOURCE_ENABLE_AUTO_CLEAR | 632 LAN743X_VECTOR_FLAG_SOURCE_STATUS_AUTO_CLEAR; 633 } 634 for (index = 0; index < number_of_rx_vectors; index++) { 635 int vector = index + 1 + LAN743X_USED_TX_CHANNELS; 636 u32 int_bit = INT_BIT_DMA_RX_(index); 637 638 /* map RX interrupt to vector */ 639 int_vec_map0 |= INT_VEC_MAP0_RX_VEC_(index, vector); 640 lan743x_csr_write(adapter, INT_VEC_MAP0, int_vec_map0); 641 if (flags & 642 LAN743X_VECTOR_FLAG_VECTOR_ENABLE_AUTO_CLEAR) { 643 int_vec_en_auto_clr |= INT_VEC_EN_(vector); 644 lan743x_csr_write(adapter, INT_VEC_EN_AUTO_CLR, 645 int_vec_en_auto_clr); 646 } 647 648 /* Remove RX interrupt from shared mask */ 649 intr->vector_list[0].int_mask &= ~int_bit; 650 ret = lan743x_intr_register_isr(adapter, vector, flags, 651 int_bit, lan743x_rx_isr, 652 &adapter->rx[index]); 653 if (ret) 654 goto clean_up; 655 intr->flags |= INTR_FLAG_IRQ_REQUESTED(vector); 656 657 lan743x_csr_write(adapter, INT_VEC_EN_SET, 658 INT_VEC_EN_(vector)); 659 } 660 } 661 return 0; 662 663 clean_up: 664 lan743x_intr_close(adapter); 665 return ret; 666 } 667 668 static int lan743x_dp_write(struct lan743x_adapter *adapter, 669 u32 select, u32 addr, u32 length, u32 *buf) 670 { 671 u32 dp_sel; 672 int i; 673 674 if (lan743x_csr_wait_for_bit(adapter, DP_SEL, DP_SEL_DPRDY_, 675 1, 40, 100, 100)) 676 return -EIO; 677 dp_sel = lan743x_csr_read(adapter, DP_SEL); 678 dp_sel &= ~DP_SEL_MASK_; 679 dp_sel |= select; 680 lan743x_csr_write(adapter, DP_SEL, dp_sel); 681 682 for (i = 0; i < length; i++) { 683 lan743x_csr_write(adapter, DP_ADDR, addr + i); 684 lan743x_csr_write(adapter, DP_DATA_0, buf[i]); 685 lan743x_csr_write(adapter, DP_CMD, DP_CMD_WRITE_); 686 if (lan743x_csr_wait_for_bit(adapter, DP_SEL, DP_SEL_DPRDY_, 687 1, 40, 100, 100)) 688 return -EIO; 689 } 690 691 return 0; 692 } 693 694 static u32 lan743x_mac_mii_access(u16 id, u16 index, int read) 695 { 696 u32 ret; 697 698 ret = (id << MAC_MII_ACC_PHY_ADDR_SHIFT_) & 699 MAC_MII_ACC_PHY_ADDR_MASK_; 700 ret |= (index << MAC_MII_ACC_MIIRINDA_SHIFT_) & 701 MAC_MII_ACC_MIIRINDA_MASK_; 702 703 if (read) 704 ret |= MAC_MII_ACC_MII_READ_; 705 else 706 ret |= MAC_MII_ACC_MII_WRITE_; 707 ret |= MAC_MII_ACC_MII_BUSY_; 708 709 return ret; 710 } 711 712 static int lan743x_mac_mii_wait_till_not_busy(struct lan743x_adapter *adapter) 713 { 714 u32 data; 715 716 return readx_poll_timeout(LAN743X_CSR_READ_OP, MAC_MII_ACC, data, 717 !(data & MAC_MII_ACC_MII_BUSY_), 0, 1000000); 718 } 719 720 static int lan743x_mdiobus_read(struct mii_bus *bus, int phy_id, int index) 721 { 722 struct lan743x_adapter *adapter = bus->priv; 723 u32 val, mii_access; 724 int ret; 725 726 /* comfirm MII not busy */ 727 ret = lan743x_mac_mii_wait_till_not_busy(adapter); 728 if (ret < 0) 729 return ret; 730 731 /* set the address, index & direction (read from PHY) */ 732 mii_access = lan743x_mac_mii_access(phy_id, index, MAC_MII_READ); 733 lan743x_csr_write(adapter, MAC_MII_ACC, mii_access); 734 ret = lan743x_mac_mii_wait_till_not_busy(adapter); 735 if (ret < 0) 736 return ret; 737 738 val = lan743x_csr_read(adapter, MAC_MII_DATA); 739 return (int)(val & 0xFFFF); 740 } 741 742 static int lan743x_mdiobus_write(struct mii_bus *bus, 743 int phy_id, int index, u16 regval) 744 { 745 struct lan743x_adapter *adapter = bus->priv; 746 u32 val, mii_access; 747 int ret; 748 749 /* confirm MII not busy */ 750 ret = lan743x_mac_mii_wait_till_not_busy(adapter); 751 if (ret < 0) 752 return ret; 753 val = (u32)regval; 754 lan743x_csr_write(adapter, MAC_MII_DATA, val); 755 756 /* set the address, index & direction (write to PHY) */ 757 mii_access = lan743x_mac_mii_access(phy_id, index, MAC_MII_WRITE); 758 lan743x_csr_write(adapter, MAC_MII_ACC, mii_access); 759 ret = lan743x_mac_mii_wait_till_not_busy(adapter); 760 return ret; 761 } 762 763 static void lan743x_mac_set_address(struct lan743x_adapter *adapter, 764 u8 *addr) 765 { 766 u32 addr_lo, addr_hi; 767 768 addr_lo = addr[0] | 769 addr[1] << 8 | 770 addr[2] << 16 | 771 addr[3] << 24; 772 addr_hi = addr[4] | 773 addr[5] << 8; 774 lan743x_csr_write(adapter, MAC_RX_ADDRL, addr_lo); 775 lan743x_csr_write(adapter, MAC_RX_ADDRH, addr_hi); 776 777 ether_addr_copy(adapter->mac_address, addr); 778 netif_info(adapter, drv, adapter->netdev, 779 "MAC address set to %pM\n", addr); 780 } 781 782 static int lan743x_mac_init(struct lan743x_adapter *adapter) 783 { 784 bool mac_address_valid = true; 785 struct net_device *netdev; 786 u32 mac_addr_hi = 0; 787 u32 mac_addr_lo = 0; 788 u32 data; 789 790 netdev = adapter->netdev; 791 792 /* disable auto duplex, and speed detection. Phylib does that */ 793 data = lan743x_csr_read(adapter, MAC_CR); 794 data &= ~(MAC_CR_ADD_ | MAC_CR_ASD_); 795 data |= MAC_CR_CNTR_RST_; 796 lan743x_csr_write(adapter, MAC_CR, data); 797 798 if (!is_valid_ether_addr(adapter->mac_address)) { 799 mac_addr_hi = lan743x_csr_read(adapter, MAC_RX_ADDRH); 800 mac_addr_lo = lan743x_csr_read(adapter, MAC_RX_ADDRL); 801 adapter->mac_address[0] = mac_addr_lo & 0xFF; 802 adapter->mac_address[1] = (mac_addr_lo >> 8) & 0xFF; 803 adapter->mac_address[2] = (mac_addr_lo >> 16) & 0xFF; 804 adapter->mac_address[3] = (mac_addr_lo >> 24) & 0xFF; 805 adapter->mac_address[4] = mac_addr_hi & 0xFF; 806 adapter->mac_address[5] = (mac_addr_hi >> 8) & 0xFF; 807 808 if (((mac_addr_hi & 0x0000FFFF) == 0x0000FFFF) && 809 mac_addr_lo == 0xFFFFFFFF) { 810 mac_address_valid = false; 811 } else if (!is_valid_ether_addr(adapter->mac_address)) { 812 mac_address_valid = false; 813 } 814 815 if (!mac_address_valid) 816 eth_random_addr(adapter->mac_address); 817 } 818 lan743x_mac_set_address(adapter, adapter->mac_address); 819 eth_hw_addr_set(netdev, adapter->mac_address); 820 821 return 0; 822 } 823 824 static int lan743x_mac_open(struct lan743x_adapter *adapter) 825 { 826 u32 temp; 827 828 temp = lan743x_csr_read(adapter, MAC_RX); 829 lan743x_csr_write(adapter, MAC_RX, temp | MAC_RX_RXEN_); 830 temp = lan743x_csr_read(adapter, MAC_TX); 831 lan743x_csr_write(adapter, MAC_TX, temp | MAC_TX_TXEN_); 832 return 0; 833 } 834 835 static void lan743x_mac_close(struct lan743x_adapter *adapter) 836 { 837 u32 temp; 838 839 temp = lan743x_csr_read(adapter, MAC_TX); 840 temp &= ~MAC_TX_TXEN_; 841 lan743x_csr_write(adapter, MAC_TX, temp); 842 lan743x_csr_wait_for_bit(adapter, MAC_TX, MAC_TX_TXD_, 843 1, 1000, 20000, 100); 844 845 temp = lan743x_csr_read(adapter, MAC_RX); 846 temp &= ~MAC_RX_RXEN_; 847 lan743x_csr_write(adapter, MAC_RX, temp); 848 lan743x_csr_wait_for_bit(adapter, MAC_RX, MAC_RX_RXD_, 849 1, 1000, 20000, 100); 850 } 851 852 static void lan743x_mac_flow_ctrl_set_enables(struct lan743x_adapter *adapter, 853 bool tx_enable, bool rx_enable) 854 { 855 u32 flow_setting = 0; 856 857 /* set maximum pause time because when fifo space frees 858 * up a zero value pause frame will be sent to release the pause 859 */ 860 flow_setting = MAC_FLOW_CR_FCPT_MASK_; 861 if (tx_enable) 862 flow_setting |= MAC_FLOW_CR_TX_FCEN_; 863 if (rx_enable) 864 flow_setting |= MAC_FLOW_CR_RX_FCEN_; 865 lan743x_csr_write(adapter, MAC_FLOW, flow_setting); 866 } 867 868 static int lan743x_mac_set_mtu(struct lan743x_adapter *adapter, int new_mtu) 869 { 870 int enabled = 0; 871 u32 mac_rx = 0; 872 873 mac_rx = lan743x_csr_read(adapter, MAC_RX); 874 if (mac_rx & MAC_RX_RXEN_) { 875 enabled = 1; 876 if (mac_rx & MAC_RX_RXD_) { 877 lan743x_csr_write(adapter, MAC_RX, mac_rx); 878 mac_rx &= ~MAC_RX_RXD_; 879 } 880 mac_rx &= ~MAC_RX_RXEN_; 881 lan743x_csr_write(adapter, MAC_RX, mac_rx); 882 lan743x_csr_wait_for_bit(adapter, MAC_RX, MAC_RX_RXD_, 883 1, 1000, 20000, 100); 884 lan743x_csr_write(adapter, MAC_RX, mac_rx | MAC_RX_RXD_); 885 } 886 887 mac_rx &= ~(MAC_RX_MAX_SIZE_MASK_); 888 mac_rx |= (((new_mtu + ETH_HLEN + ETH_FCS_LEN) 889 << MAC_RX_MAX_SIZE_SHIFT_) & MAC_RX_MAX_SIZE_MASK_); 890 lan743x_csr_write(adapter, MAC_RX, mac_rx); 891 892 if (enabled) { 893 mac_rx |= MAC_RX_RXEN_; 894 lan743x_csr_write(adapter, MAC_RX, mac_rx); 895 } 896 return 0; 897 } 898 899 /* PHY */ 900 static int lan743x_phy_reset(struct lan743x_adapter *adapter) 901 { 902 u32 data; 903 904 /* Only called with in probe, and before mdiobus_register */ 905 906 data = lan743x_csr_read(adapter, PMT_CTL); 907 data |= PMT_CTL_ETH_PHY_RST_; 908 lan743x_csr_write(adapter, PMT_CTL, data); 909 910 return readx_poll_timeout(LAN743X_CSR_READ_OP, PMT_CTL, data, 911 (!(data & PMT_CTL_ETH_PHY_RST_) && 912 (data & PMT_CTL_READY_)), 913 50000, 1000000); 914 } 915 916 static void lan743x_phy_update_flowcontrol(struct lan743x_adapter *adapter, 917 u8 duplex, u16 local_adv, 918 u16 remote_adv) 919 { 920 struct lan743x_phy *phy = &adapter->phy; 921 u8 cap; 922 923 if (phy->fc_autoneg) 924 cap = mii_resolve_flowctrl_fdx(local_adv, remote_adv); 925 else 926 cap = phy->fc_request_control; 927 928 lan743x_mac_flow_ctrl_set_enables(adapter, 929 cap & FLOW_CTRL_TX, 930 cap & FLOW_CTRL_RX); 931 } 932 933 static int lan743x_phy_init(struct lan743x_adapter *adapter) 934 { 935 return lan743x_phy_reset(adapter); 936 } 937 938 static void lan743x_phy_link_status_change(struct net_device *netdev) 939 { 940 struct lan743x_adapter *adapter = netdev_priv(netdev); 941 struct phy_device *phydev = netdev->phydev; 942 u32 data; 943 944 phy_print_status(phydev); 945 if (phydev->state == PHY_RUNNING) { 946 struct ethtool_link_ksettings ksettings; 947 int remote_advertisement = 0; 948 int local_advertisement = 0; 949 950 data = lan743x_csr_read(adapter, MAC_CR); 951 952 /* set interface mode */ 953 if (phy_interface_is_rgmii(phydev)) 954 /* RGMII */ 955 data &= ~MAC_CR_MII_EN_; 956 else 957 /* GMII */ 958 data |= MAC_CR_MII_EN_; 959 960 /* set duplex mode */ 961 if (phydev->duplex) 962 data |= MAC_CR_DPX_; 963 else 964 data &= ~MAC_CR_DPX_; 965 966 /* set bus speed */ 967 switch (phydev->speed) { 968 case SPEED_10: 969 data &= ~MAC_CR_CFG_H_; 970 data &= ~MAC_CR_CFG_L_; 971 break; 972 case SPEED_100: 973 data &= ~MAC_CR_CFG_H_; 974 data |= MAC_CR_CFG_L_; 975 break; 976 case SPEED_1000: 977 data |= MAC_CR_CFG_H_; 978 data &= ~MAC_CR_CFG_L_; 979 break; 980 } 981 lan743x_csr_write(adapter, MAC_CR, data); 982 983 memset(&ksettings, 0, sizeof(ksettings)); 984 phy_ethtool_get_link_ksettings(netdev, &ksettings); 985 local_advertisement = 986 linkmode_adv_to_mii_adv_t(phydev->advertising); 987 remote_advertisement = 988 linkmode_adv_to_mii_adv_t(phydev->lp_advertising); 989 990 lan743x_phy_update_flowcontrol(adapter, 991 ksettings.base.duplex, 992 local_advertisement, 993 remote_advertisement); 994 lan743x_ptp_update_latency(adapter, ksettings.base.speed); 995 } 996 } 997 998 static void lan743x_phy_close(struct lan743x_adapter *adapter) 999 { 1000 struct net_device *netdev = adapter->netdev; 1001 1002 phy_stop(netdev->phydev); 1003 phy_disconnect(netdev->phydev); 1004 netdev->phydev = NULL; 1005 } 1006 1007 static int lan743x_phy_open(struct lan743x_adapter *adapter) 1008 { 1009 struct net_device *netdev = adapter->netdev; 1010 struct lan743x_phy *phy = &adapter->phy; 1011 struct phy_device *phydev; 1012 int ret = -EIO; 1013 1014 /* try devicetree phy, or fixed link */ 1015 phydev = of_phy_get_and_connect(netdev, adapter->pdev->dev.of_node, 1016 lan743x_phy_link_status_change); 1017 1018 if (!phydev) { 1019 /* try internal phy */ 1020 phydev = phy_find_first(adapter->mdiobus); 1021 if (!phydev) 1022 goto return_error; 1023 1024 ret = phy_connect_direct(netdev, phydev, 1025 lan743x_phy_link_status_change, 1026 PHY_INTERFACE_MODE_GMII); 1027 if (ret) 1028 goto return_error; 1029 } 1030 1031 /* MAC doesn't support 1000T Half */ 1032 phy_remove_link_mode(phydev, ETHTOOL_LINK_MODE_1000baseT_Half_BIT); 1033 1034 /* support both flow controls */ 1035 phy_support_asym_pause(phydev); 1036 phy->fc_request_control = (FLOW_CTRL_RX | FLOW_CTRL_TX); 1037 phy->fc_autoneg = phydev->autoneg; 1038 1039 phy_start(phydev); 1040 phy_start_aneg(phydev); 1041 phy_attached_info(phydev); 1042 return 0; 1043 1044 return_error: 1045 return ret; 1046 } 1047 1048 static void lan743x_rfe_open(struct lan743x_adapter *adapter) 1049 { 1050 lan743x_csr_write(adapter, RFE_RSS_CFG, 1051 RFE_RSS_CFG_UDP_IPV6_EX_ | 1052 RFE_RSS_CFG_TCP_IPV6_EX_ | 1053 RFE_RSS_CFG_IPV6_EX_ | 1054 RFE_RSS_CFG_UDP_IPV6_ | 1055 RFE_RSS_CFG_TCP_IPV6_ | 1056 RFE_RSS_CFG_IPV6_ | 1057 RFE_RSS_CFG_UDP_IPV4_ | 1058 RFE_RSS_CFG_TCP_IPV4_ | 1059 RFE_RSS_CFG_IPV4_ | 1060 RFE_RSS_CFG_VALID_HASH_BITS_ | 1061 RFE_RSS_CFG_RSS_QUEUE_ENABLE_ | 1062 RFE_RSS_CFG_RSS_HASH_STORE_ | 1063 RFE_RSS_CFG_RSS_ENABLE_); 1064 } 1065 1066 static void lan743x_rfe_update_mac_address(struct lan743x_adapter *adapter) 1067 { 1068 u8 *mac_addr; 1069 u32 mac_addr_hi = 0; 1070 u32 mac_addr_lo = 0; 1071 1072 /* Add mac address to perfect Filter */ 1073 mac_addr = adapter->mac_address; 1074 mac_addr_lo = ((((u32)(mac_addr[0])) << 0) | 1075 (((u32)(mac_addr[1])) << 8) | 1076 (((u32)(mac_addr[2])) << 16) | 1077 (((u32)(mac_addr[3])) << 24)); 1078 mac_addr_hi = ((((u32)(mac_addr[4])) << 0) | 1079 (((u32)(mac_addr[5])) << 8)); 1080 1081 lan743x_csr_write(adapter, RFE_ADDR_FILT_LO(0), mac_addr_lo); 1082 lan743x_csr_write(adapter, RFE_ADDR_FILT_HI(0), 1083 mac_addr_hi | RFE_ADDR_FILT_HI_VALID_); 1084 } 1085 1086 static void lan743x_rfe_set_multicast(struct lan743x_adapter *adapter) 1087 { 1088 struct net_device *netdev = adapter->netdev; 1089 u32 hash_table[DP_SEL_VHF_HASH_LEN]; 1090 u32 rfctl; 1091 u32 data; 1092 1093 rfctl = lan743x_csr_read(adapter, RFE_CTL); 1094 rfctl &= ~(RFE_CTL_AU_ | RFE_CTL_AM_ | 1095 RFE_CTL_DA_PERFECT_ | RFE_CTL_MCAST_HASH_); 1096 rfctl |= RFE_CTL_AB_; 1097 if (netdev->flags & IFF_PROMISC) { 1098 rfctl |= RFE_CTL_AM_ | RFE_CTL_AU_; 1099 } else { 1100 if (netdev->flags & IFF_ALLMULTI) 1101 rfctl |= RFE_CTL_AM_; 1102 } 1103 1104 memset(hash_table, 0, DP_SEL_VHF_HASH_LEN * sizeof(u32)); 1105 if (netdev_mc_count(netdev)) { 1106 struct netdev_hw_addr *ha; 1107 int i; 1108 1109 rfctl |= RFE_CTL_DA_PERFECT_; 1110 i = 1; 1111 netdev_for_each_mc_addr(ha, netdev) { 1112 /* set first 32 into Perfect Filter */ 1113 if (i < 33) { 1114 lan743x_csr_write(adapter, 1115 RFE_ADDR_FILT_HI(i), 0); 1116 data = ha->addr[3]; 1117 data = ha->addr[2] | (data << 8); 1118 data = ha->addr[1] | (data << 8); 1119 data = ha->addr[0] | (data << 8); 1120 lan743x_csr_write(adapter, 1121 RFE_ADDR_FILT_LO(i), data); 1122 data = ha->addr[5]; 1123 data = ha->addr[4] | (data << 8); 1124 data |= RFE_ADDR_FILT_HI_VALID_; 1125 lan743x_csr_write(adapter, 1126 RFE_ADDR_FILT_HI(i), data); 1127 } else { 1128 u32 bitnum = (ether_crc(ETH_ALEN, ha->addr) >> 1129 23) & 0x1FF; 1130 hash_table[bitnum / 32] |= (1 << (bitnum % 32)); 1131 rfctl |= RFE_CTL_MCAST_HASH_; 1132 } 1133 i++; 1134 } 1135 } 1136 1137 lan743x_dp_write(adapter, DP_SEL_RFE_RAM, 1138 DP_SEL_VHF_VLAN_LEN, 1139 DP_SEL_VHF_HASH_LEN, hash_table); 1140 lan743x_csr_write(adapter, RFE_CTL, rfctl); 1141 } 1142 1143 static int lan743x_dmac_init(struct lan743x_adapter *adapter) 1144 { 1145 u32 data = 0; 1146 1147 lan743x_csr_write(adapter, DMAC_CMD, DMAC_CMD_SWR_); 1148 lan743x_csr_wait_for_bit(adapter, DMAC_CMD, DMAC_CMD_SWR_, 1149 0, 1000, 20000, 100); 1150 switch (DEFAULT_DMA_DESCRIPTOR_SPACING) { 1151 case DMA_DESCRIPTOR_SPACING_16: 1152 data = DMAC_CFG_MAX_DSPACE_16_; 1153 break; 1154 case DMA_DESCRIPTOR_SPACING_32: 1155 data = DMAC_CFG_MAX_DSPACE_32_; 1156 break; 1157 case DMA_DESCRIPTOR_SPACING_64: 1158 data = DMAC_CFG_MAX_DSPACE_64_; 1159 break; 1160 case DMA_DESCRIPTOR_SPACING_128: 1161 data = DMAC_CFG_MAX_DSPACE_128_; 1162 break; 1163 default: 1164 return -EPERM; 1165 } 1166 if (!(adapter->csr.flags & LAN743X_CSR_FLAG_IS_A0)) 1167 data |= DMAC_CFG_COAL_EN_; 1168 data |= DMAC_CFG_CH_ARB_SEL_RX_HIGH_; 1169 data |= DMAC_CFG_MAX_READ_REQ_SET_(6); 1170 lan743x_csr_write(adapter, DMAC_CFG, data); 1171 data = DMAC_COAL_CFG_TIMER_LIMIT_SET_(1); 1172 data |= DMAC_COAL_CFG_TIMER_TX_START_; 1173 data |= DMAC_COAL_CFG_FLUSH_INTS_; 1174 data |= DMAC_COAL_CFG_INT_EXIT_COAL_; 1175 data |= DMAC_COAL_CFG_CSR_EXIT_COAL_; 1176 data |= DMAC_COAL_CFG_TX_THRES_SET_(0x0A); 1177 data |= DMAC_COAL_CFG_RX_THRES_SET_(0x0C); 1178 lan743x_csr_write(adapter, DMAC_COAL_CFG, data); 1179 data = DMAC_OBFF_TX_THRES_SET_(0x08); 1180 data |= DMAC_OBFF_RX_THRES_SET_(0x0A); 1181 lan743x_csr_write(adapter, DMAC_OBFF_CFG, data); 1182 return 0; 1183 } 1184 1185 static int lan743x_dmac_tx_get_state(struct lan743x_adapter *adapter, 1186 int tx_channel) 1187 { 1188 u32 dmac_cmd = 0; 1189 1190 dmac_cmd = lan743x_csr_read(adapter, DMAC_CMD); 1191 return DMAC_CHANNEL_STATE_SET((dmac_cmd & 1192 DMAC_CMD_START_T_(tx_channel)), 1193 (dmac_cmd & 1194 DMAC_CMD_STOP_T_(tx_channel))); 1195 } 1196 1197 static int lan743x_dmac_tx_wait_till_stopped(struct lan743x_adapter *adapter, 1198 int tx_channel) 1199 { 1200 int timeout = 100; 1201 int result = 0; 1202 1203 while (timeout && 1204 ((result = lan743x_dmac_tx_get_state(adapter, tx_channel)) == 1205 DMAC_CHANNEL_STATE_STOP_PENDING)) { 1206 usleep_range(1000, 20000); 1207 timeout--; 1208 } 1209 if (result == DMAC_CHANNEL_STATE_STOP_PENDING) 1210 result = -ENODEV; 1211 return result; 1212 } 1213 1214 static int lan743x_dmac_rx_get_state(struct lan743x_adapter *adapter, 1215 int rx_channel) 1216 { 1217 u32 dmac_cmd = 0; 1218 1219 dmac_cmd = lan743x_csr_read(adapter, DMAC_CMD); 1220 return DMAC_CHANNEL_STATE_SET((dmac_cmd & 1221 DMAC_CMD_START_R_(rx_channel)), 1222 (dmac_cmd & 1223 DMAC_CMD_STOP_R_(rx_channel))); 1224 } 1225 1226 static int lan743x_dmac_rx_wait_till_stopped(struct lan743x_adapter *adapter, 1227 int rx_channel) 1228 { 1229 int timeout = 100; 1230 int result = 0; 1231 1232 while (timeout && 1233 ((result = lan743x_dmac_rx_get_state(adapter, rx_channel)) == 1234 DMAC_CHANNEL_STATE_STOP_PENDING)) { 1235 usleep_range(1000, 20000); 1236 timeout--; 1237 } 1238 if (result == DMAC_CHANNEL_STATE_STOP_PENDING) 1239 result = -ENODEV; 1240 return result; 1241 } 1242 1243 static void lan743x_tx_release_desc(struct lan743x_tx *tx, 1244 int descriptor_index, bool cleanup) 1245 { 1246 struct lan743x_tx_buffer_info *buffer_info = NULL; 1247 struct lan743x_tx_descriptor *descriptor = NULL; 1248 u32 descriptor_type = 0; 1249 bool ignore_sync; 1250 1251 descriptor = &tx->ring_cpu_ptr[descriptor_index]; 1252 buffer_info = &tx->buffer_info[descriptor_index]; 1253 if (!(buffer_info->flags & TX_BUFFER_INFO_FLAG_ACTIVE)) 1254 goto done; 1255 1256 descriptor_type = le32_to_cpu(descriptor->data0) & 1257 TX_DESC_DATA0_DTYPE_MASK_; 1258 if (descriptor_type == TX_DESC_DATA0_DTYPE_DATA_) 1259 goto clean_up_data_descriptor; 1260 else 1261 goto clear_active; 1262 1263 clean_up_data_descriptor: 1264 if (buffer_info->dma_ptr) { 1265 if (buffer_info->flags & 1266 TX_BUFFER_INFO_FLAG_SKB_FRAGMENT) { 1267 dma_unmap_page(&tx->adapter->pdev->dev, 1268 buffer_info->dma_ptr, 1269 buffer_info->buffer_length, 1270 DMA_TO_DEVICE); 1271 } else { 1272 dma_unmap_single(&tx->adapter->pdev->dev, 1273 buffer_info->dma_ptr, 1274 buffer_info->buffer_length, 1275 DMA_TO_DEVICE); 1276 } 1277 buffer_info->dma_ptr = 0; 1278 buffer_info->buffer_length = 0; 1279 } 1280 if (!buffer_info->skb) 1281 goto clear_active; 1282 1283 if (!(buffer_info->flags & TX_BUFFER_INFO_FLAG_TIMESTAMP_REQUESTED)) { 1284 dev_kfree_skb_any(buffer_info->skb); 1285 goto clear_skb; 1286 } 1287 1288 if (cleanup) { 1289 lan743x_ptp_unrequest_tx_timestamp(tx->adapter); 1290 dev_kfree_skb_any(buffer_info->skb); 1291 } else { 1292 ignore_sync = (buffer_info->flags & 1293 TX_BUFFER_INFO_FLAG_IGNORE_SYNC) != 0; 1294 lan743x_ptp_tx_timestamp_skb(tx->adapter, 1295 buffer_info->skb, ignore_sync); 1296 } 1297 1298 clear_skb: 1299 buffer_info->skb = NULL; 1300 1301 clear_active: 1302 buffer_info->flags &= ~TX_BUFFER_INFO_FLAG_ACTIVE; 1303 1304 done: 1305 memset(buffer_info, 0, sizeof(*buffer_info)); 1306 memset(descriptor, 0, sizeof(*descriptor)); 1307 } 1308 1309 static int lan743x_tx_next_index(struct lan743x_tx *tx, int index) 1310 { 1311 return ((++index) % tx->ring_size); 1312 } 1313 1314 static void lan743x_tx_release_completed_descriptors(struct lan743x_tx *tx) 1315 { 1316 while (le32_to_cpu(*tx->head_cpu_ptr) != (tx->last_head)) { 1317 lan743x_tx_release_desc(tx, tx->last_head, false); 1318 tx->last_head = lan743x_tx_next_index(tx, tx->last_head); 1319 } 1320 } 1321 1322 static void lan743x_tx_release_all_descriptors(struct lan743x_tx *tx) 1323 { 1324 u32 original_head = 0; 1325 1326 original_head = tx->last_head; 1327 do { 1328 lan743x_tx_release_desc(tx, tx->last_head, true); 1329 tx->last_head = lan743x_tx_next_index(tx, tx->last_head); 1330 } while (tx->last_head != original_head); 1331 memset(tx->ring_cpu_ptr, 0, 1332 sizeof(*tx->ring_cpu_ptr) * (tx->ring_size)); 1333 memset(tx->buffer_info, 0, 1334 sizeof(*tx->buffer_info) * (tx->ring_size)); 1335 } 1336 1337 static int lan743x_tx_get_desc_cnt(struct lan743x_tx *tx, 1338 struct sk_buff *skb) 1339 { 1340 int result = 1; /* 1 for the main skb buffer */ 1341 int nr_frags = 0; 1342 1343 if (skb_is_gso(skb)) 1344 result++; /* requires an extension descriptor */ 1345 nr_frags = skb_shinfo(skb)->nr_frags; 1346 result += nr_frags; /* 1 for each fragment buffer */ 1347 return result; 1348 } 1349 1350 static int lan743x_tx_get_avail_desc(struct lan743x_tx *tx) 1351 { 1352 int last_head = tx->last_head; 1353 int last_tail = tx->last_tail; 1354 1355 if (last_tail >= last_head) 1356 return tx->ring_size - last_tail + last_head - 1; 1357 else 1358 return last_head - last_tail - 1; 1359 } 1360 1361 void lan743x_tx_set_timestamping_mode(struct lan743x_tx *tx, 1362 bool enable_timestamping, 1363 bool enable_onestep_sync) 1364 { 1365 if (enable_timestamping) 1366 tx->ts_flags |= TX_TS_FLAG_TIMESTAMPING_ENABLED; 1367 else 1368 tx->ts_flags &= ~TX_TS_FLAG_TIMESTAMPING_ENABLED; 1369 if (enable_onestep_sync) 1370 tx->ts_flags |= TX_TS_FLAG_ONE_STEP_SYNC; 1371 else 1372 tx->ts_flags &= ~TX_TS_FLAG_ONE_STEP_SYNC; 1373 } 1374 1375 static int lan743x_tx_frame_start(struct lan743x_tx *tx, 1376 unsigned char *first_buffer, 1377 unsigned int first_buffer_length, 1378 unsigned int frame_length, 1379 bool time_stamp, 1380 bool check_sum) 1381 { 1382 /* called only from within lan743x_tx_xmit_frame. 1383 * assuming tx->ring_lock has already been acquired. 1384 */ 1385 struct lan743x_tx_descriptor *tx_descriptor = NULL; 1386 struct lan743x_tx_buffer_info *buffer_info = NULL; 1387 struct lan743x_adapter *adapter = tx->adapter; 1388 struct device *dev = &adapter->pdev->dev; 1389 dma_addr_t dma_ptr; 1390 1391 tx->frame_flags |= TX_FRAME_FLAG_IN_PROGRESS; 1392 tx->frame_first = tx->last_tail; 1393 tx->frame_tail = tx->frame_first; 1394 1395 tx_descriptor = &tx->ring_cpu_ptr[tx->frame_tail]; 1396 buffer_info = &tx->buffer_info[tx->frame_tail]; 1397 dma_ptr = dma_map_single(dev, first_buffer, first_buffer_length, 1398 DMA_TO_DEVICE); 1399 if (dma_mapping_error(dev, dma_ptr)) 1400 return -ENOMEM; 1401 1402 tx_descriptor->data1 = cpu_to_le32(DMA_ADDR_LOW32(dma_ptr)); 1403 tx_descriptor->data2 = cpu_to_le32(DMA_ADDR_HIGH32(dma_ptr)); 1404 tx_descriptor->data3 = cpu_to_le32((frame_length << 16) & 1405 TX_DESC_DATA3_FRAME_LENGTH_MSS_MASK_); 1406 1407 buffer_info->skb = NULL; 1408 buffer_info->dma_ptr = dma_ptr; 1409 buffer_info->buffer_length = first_buffer_length; 1410 buffer_info->flags |= TX_BUFFER_INFO_FLAG_ACTIVE; 1411 1412 tx->frame_data0 = (first_buffer_length & 1413 TX_DESC_DATA0_BUF_LENGTH_MASK_) | 1414 TX_DESC_DATA0_DTYPE_DATA_ | 1415 TX_DESC_DATA0_FS_ | 1416 TX_DESC_DATA0_FCS_; 1417 if (time_stamp) 1418 tx->frame_data0 |= TX_DESC_DATA0_TSE_; 1419 1420 if (check_sum) 1421 tx->frame_data0 |= TX_DESC_DATA0_ICE_ | 1422 TX_DESC_DATA0_IPE_ | 1423 TX_DESC_DATA0_TPE_; 1424 1425 /* data0 will be programmed in one of other frame assembler functions */ 1426 return 0; 1427 } 1428 1429 static void lan743x_tx_frame_add_lso(struct lan743x_tx *tx, 1430 unsigned int frame_length, 1431 int nr_frags) 1432 { 1433 /* called only from within lan743x_tx_xmit_frame. 1434 * assuming tx->ring_lock has already been acquired. 1435 */ 1436 struct lan743x_tx_descriptor *tx_descriptor = NULL; 1437 struct lan743x_tx_buffer_info *buffer_info = NULL; 1438 1439 /* wrap up previous descriptor */ 1440 tx->frame_data0 |= TX_DESC_DATA0_EXT_; 1441 if (nr_frags <= 0) { 1442 tx->frame_data0 |= TX_DESC_DATA0_LS_; 1443 tx->frame_data0 |= TX_DESC_DATA0_IOC_; 1444 } 1445 tx_descriptor = &tx->ring_cpu_ptr[tx->frame_tail]; 1446 tx_descriptor->data0 = cpu_to_le32(tx->frame_data0); 1447 1448 /* move to next descriptor */ 1449 tx->frame_tail = lan743x_tx_next_index(tx, tx->frame_tail); 1450 tx_descriptor = &tx->ring_cpu_ptr[tx->frame_tail]; 1451 buffer_info = &tx->buffer_info[tx->frame_tail]; 1452 1453 /* add extension descriptor */ 1454 tx_descriptor->data1 = 0; 1455 tx_descriptor->data2 = 0; 1456 tx_descriptor->data3 = 0; 1457 1458 buffer_info->skb = NULL; 1459 buffer_info->dma_ptr = 0; 1460 buffer_info->buffer_length = 0; 1461 buffer_info->flags |= TX_BUFFER_INFO_FLAG_ACTIVE; 1462 1463 tx->frame_data0 = (frame_length & TX_DESC_DATA0_EXT_PAY_LENGTH_MASK_) | 1464 TX_DESC_DATA0_DTYPE_EXT_ | 1465 TX_DESC_DATA0_EXT_LSO_; 1466 1467 /* data0 will be programmed in one of other frame assembler functions */ 1468 } 1469 1470 static int lan743x_tx_frame_add_fragment(struct lan743x_tx *tx, 1471 const skb_frag_t *fragment, 1472 unsigned int frame_length) 1473 { 1474 /* called only from within lan743x_tx_xmit_frame 1475 * assuming tx->ring_lock has already been acquired 1476 */ 1477 struct lan743x_tx_descriptor *tx_descriptor = NULL; 1478 struct lan743x_tx_buffer_info *buffer_info = NULL; 1479 struct lan743x_adapter *adapter = tx->adapter; 1480 struct device *dev = &adapter->pdev->dev; 1481 unsigned int fragment_length = 0; 1482 dma_addr_t dma_ptr; 1483 1484 fragment_length = skb_frag_size(fragment); 1485 if (!fragment_length) 1486 return 0; 1487 1488 /* wrap up previous descriptor */ 1489 tx_descriptor = &tx->ring_cpu_ptr[tx->frame_tail]; 1490 tx_descriptor->data0 = cpu_to_le32(tx->frame_data0); 1491 1492 /* move to next descriptor */ 1493 tx->frame_tail = lan743x_tx_next_index(tx, tx->frame_tail); 1494 tx_descriptor = &tx->ring_cpu_ptr[tx->frame_tail]; 1495 buffer_info = &tx->buffer_info[tx->frame_tail]; 1496 dma_ptr = skb_frag_dma_map(dev, fragment, 1497 0, fragment_length, 1498 DMA_TO_DEVICE); 1499 if (dma_mapping_error(dev, dma_ptr)) { 1500 int desc_index; 1501 1502 /* cleanup all previously setup descriptors */ 1503 desc_index = tx->frame_first; 1504 while (desc_index != tx->frame_tail) { 1505 lan743x_tx_release_desc(tx, desc_index, true); 1506 desc_index = lan743x_tx_next_index(tx, desc_index); 1507 } 1508 dma_wmb(); 1509 tx->frame_flags &= ~TX_FRAME_FLAG_IN_PROGRESS; 1510 tx->frame_first = 0; 1511 tx->frame_data0 = 0; 1512 tx->frame_tail = 0; 1513 return -ENOMEM; 1514 } 1515 1516 tx_descriptor->data1 = cpu_to_le32(DMA_ADDR_LOW32(dma_ptr)); 1517 tx_descriptor->data2 = cpu_to_le32(DMA_ADDR_HIGH32(dma_ptr)); 1518 tx_descriptor->data3 = cpu_to_le32((frame_length << 16) & 1519 TX_DESC_DATA3_FRAME_LENGTH_MSS_MASK_); 1520 1521 buffer_info->skb = NULL; 1522 buffer_info->dma_ptr = dma_ptr; 1523 buffer_info->buffer_length = fragment_length; 1524 buffer_info->flags |= TX_BUFFER_INFO_FLAG_ACTIVE; 1525 buffer_info->flags |= TX_BUFFER_INFO_FLAG_SKB_FRAGMENT; 1526 1527 tx->frame_data0 = (fragment_length & TX_DESC_DATA0_BUF_LENGTH_MASK_) | 1528 TX_DESC_DATA0_DTYPE_DATA_ | 1529 TX_DESC_DATA0_FCS_; 1530 1531 /* data0 will be programmed in one of other frame assembler functions */ 1532 return 0; 1533 } 1534 1535 static void lan743x_tx_frame_end(struct lan743x_tx *tx, 1536 struct sk_buff *skb, 1537 bool time_stamp, 1538 bool ignore_sync) 1539 { 1540 /* called only from within lan743x_tx_xmit_frame 1541 * assuming tx->ring_lock has already been acquired 1542 */ 1543 struct lan743x_tx_descriptor *tx_descriptor = NULL; 1544 struct lan743x_tx_buffer_info *buffer_info = NULL; 1545 struct lan743x_adapter *adapter = tx->adapter; 1546 u32 tx_tail_flags = 0; 1547 1548 /* wrap up previous descriptor */ 1549 if ((tx->frame_data0 & TX_DESC_DATA0_DTYPE_MASK_) == 1550 TX_DESC_DATA0_DTYPE_DATA_) { 1551 tx->frame_data0 |= TX_DESC_DATA0_LS_; 1552 tx->frame_data0 |= TX_DESC_DATA0_IOC_; 1553 } 1554 1555 tx_descriptor = &tx->ring_cpu_ptr[tx->frame_tail]; 1556 buffer_info = &tx->buffer_info[tx->frame_tail]; 1557 buffer_info->skb = skb; 1558 if (time_stamp) 1559 buffer_info->flags |= TX_BUFFER_INFO_FLAG_TIMESTAMP_REQUESTED; 1560 if (ignore_sync) 1561 buffer_info->flags |= TX_BUFFER_INFO_FLAG_IGNORE_SYNC; 1562 1563 tx_descriptor->data0 = cpu_to_le32(tx->frame_data0); 1564 tx->frame_tail = lan743x_tx_next_index(tx, tx->frame_tail); 1565 tx->last_tail = tx->frame_tail; 1566 1567 dma_wmb(); 1568 1569 if (tx->vector_flags & LAN743X_VECTOR_FLAG_VECTOR_ENABLE_AUTO_SET) 1570 tx_tail_flags |= TX_TAIL_SET_TOP_INT_VEC_EN_; 1571 if (tx->vector_flags & LAN743X_VECTOR_FLAG_SOURCE_ENABLE_AUTO_SET) 1572 tx_tail_flags |= TX_TAIL_SET_DMAC_INT_EN_ | 1573 TX_TAIL_SET_TOP_INT_EN_; 1574 1575 lan743x_csr_write(adapter, TX_TAIL(tx->channel_number), 1576 tx_tail_flags | tx->frame_tail); 1577 tx->frame_flags &= ~TX_FRAME_FLAG_IN_PROGRESS; 1578 } 1579 1580 static netdev_tx_t lan743x_tx_xmit_frame(struct lan743x_tx *tx, 1581 struct sk_buff *skb) 1582 { 1583 int required_number_of_descriptors = 0; 1584 unsigned int start_frame_length = 0; 1585 unsigned int frame_length = 0; 1586 unsigned int head_length = 0; 1587 unsigned long irq_flags = 0; 1588 bool do_timestamp = false; 1589 bool ignore_sync = false; 1590 int nr_frags = 0; 1591 bool gso = false; 1592 int j; 1593 1594 required_number_of_descriptors = lan743x_tx_get_desc_cnt(tx, skb); 1595 1596 spin_lock_irqsave(&tx->ring_lock, irq_flags); 1597 if (required_number_of_descriptors > 1598 lan743x_tx_get_avail_desc(tx)) { 1599 if (required_number_of_descriptors > (tx->ring_size - 1)) { 1600 dev_kfree_skb_irq(skb); 1601 } else { 1602 /* save to overflow buffer */ 1603 tx->overflow_skb = skb; 1604 netif_stop_queue(tx->adapter->netdev); 1605 } 1606 goto unlock; 1607 } 1608 1609 /* space available, transmit skb */ 1610 if ((skb_shinfo(skb)->tx_flags & SKBTX_HW_TSTAMP) && 1611 (tx->ts_flags & TX_TS_FLAG_TIMESTAMPING_ENABLED) && 1612 (lan743x_ptp_request_tx_timestamp(tx->adapter))) { 1613 skb_shinfo(skb)->tx_flags |= SKBTX_IN_PROGRESS; 1614 do_timestamp = true; 1615 if (tx->ts_flags & TX_TS_FLAG_ONE_STEP_SYNC) 1616 ignore_sync = true; 1617 } 1618 head_length = skb_headlen(skb); 1619 frame_length = skb_pagelen(skb); 1620 nr_frags = skb_shinfo(skb)->nr_frags; 1621 start_frame_length = frame_length; 1622 gso = skb_is_gso(skb); 1623 if (gso) { 1624 start_frame_length = max(skb_shinfo(skb)->gso_size, 1625 (unsigned short)8); 1626 } 1627 1628 if (lan743x_tx_frame_start(tx, 1629 skb->data, head_length, 1630 start_frame_length, 1631 do_timestamp, 1632 skb->ip_summed == CHECKSUM_PARTIAL)) { 1633 dev_kfree_skb_irq(skb); 1634 goto unlock; 1635 } 1636 1637 if (gso) 1638 lan743x_tx_frame_add_lso(tx, frame_length, nr_frags); 1639 1640 if (nr_frags <= 0) 1641 goto finish; 1642 1643 for (j = 0; j < nr_frags; j++) { 1644 const skb_frag_t *frag = &(skb_shinfo(skb)->frags[j]); 1645 1646 if (lan743x_tx_frame_add_fragment(tx, frag, frame_length)) { 1647 /* upon error no need to call 1648 * lan743x_tx_frame_end 1649 * frame assembler clean up was performed inside 1650 * lan743x_tx_frame_add_fragment 1651 */ 1652 dev_kfree_skb_irq(skb); 1653 goto unlock; 1654 } 1655 } 1656 1657 finish: 1658 lan743x_tx_frame_end(tx, skb, do_timestamp, ignore_sync); 1659 1660 unlock: 1661 spin_unlock_irqrestore(&tx->ring_lock, irq_flags); 1662 return NETDEV_TX_OK; 1663 } 1664 1665 static int lan743x_tx_napi_poll(struct napi_struct *napi, int weight) 1666 { 1667 struct lan743x_tx *tx = container_of(napi, struct lan743x_tx, napi); 1668 struct lan743x_adapter *adapter = tx->adapter; 1669 bool start_transmitter = false; 1670 unsigned long irq_flags = 0; 1671 u32 ioc_bit = 0; 1672 1673 ioc_bit = DMAC_INT_BIT_TX_IOC_(tx->channel_number); 1674 lan743x_csr_read(adapter, DMAC_INT_STS); 1675 if (tx->vector_flags & LAN743X_VECTOR_FLAG_SOURCE_STATUS_W2C) 1676 lan743x_csr_write(adapter, DMAC_INT_STS, ioc_bit); 1677 spin_lock_irqsave(&tx->ring_lock, irq_flags); 1678 1679 /* clean up tx ring */ 1680 lan743x_tx_release_completed_descriptors(tx); 1681 if (netif_queue_stopped(adapter->netdev)) { 1682 if (tx->overflow_skb) { 1683 if (lan743x_tx_get_desc_cnt(tx, tx->overflow_skb) <= 1684 lan743x_tx_get_avail_desc(tx)) 1685 start_transmitter = true; 1686 } else { 1687 netif_wake_queue(adapter->netdev); 1688 } 1689 } 1690 spin_unlock_irqrestore(&tx->ring_lock, irq_flags); 1691 1692 if (start_transmitter) { 1693 /* space is now available, transmit overflow skb */ 1694 lan743x_tx_xmit_frame(tx, tx->overflow_skb); 1695 tx->overflow_skb = NULL; 1696 netif_wake_queue(adapter->netdev); 1697 } 1698 1699 if (!napi_complete(napi)) 1700 goto done; 1701 1702 /* enable isr */ 1703 lan743x_csr_write(adapter, INT_EN_SET, 1704 INT_BIT_DMA_TX_(tx->channel_number)); 1705 lan743x_csr_read(adapter, INT_STS); 1706 1707 done: 1708 return 0; 1709 } 1710 1711 static void lan743x_tx_ring_cleanup(struct lan743x_tx *tx) 1712 { 1713 if (tx->head_cpu_ptr) { 1714 dma_free_coherent(&tx->adapter->pdev->dev, 1715 sizeof(*tx->head_cpu_ptr), tx->head_cpu_ptr, 1716 tx->head_dma_ptr); 1717 tx->head_cpu_ptr = NULL; 1718 tx->head_dma_ptr = 0; 1719 } 1720 kfree(tx->buffer_info); 1721 tx->buffer_info = NULL; 1722 1723 if (tx->ring_cpu_ptr) { 1724 dma_free_coherent(&tx->adapter->pdev->dev, 1725 tx->ring_allocation_size, tx->ring_cpu_ptr, 1726 tx->ring_dma_ptr); 1727 tx->ring_allocation_size = 0; 1728 tx->ring_cpu_ptr = NULL; 1729 tx->ring_dma_ptr = 0; 1730 } 1731 tx->ring_size = 0; 1732 } 1733 1734 static int lan743x_tx_ring_init(struct lan743x_tx *tx) 1735 { 1736 size_t ring_allocation_size = 0; 1737 void *cpu_ptr = NULL; 1738 dma_addr_t dma_ptr; 1739 int ret = -ENOMEM; 1740 1741 tx->ring_size = LAN743X_TX_RING_SIZE; 1742 if (tx->ring_size & ~TX_CFG_B_TX_RING_LEN_MASK_) { 1743 ret = -EINVAL; 1744 goto cleanup; 1745 } 1746 if (dma_set_mask_and_coherent(&tx->adapter->pdev->dev, 1747 DMA_BIT_MASK(64))) { 1748 if (dma_set_mask_and_coherent(&tx->adapter->pdev->dev, 1749 DMA_BIT_MASK(32))) { 1750 dev_warn(&tx->adapter->pdev->dev, 1751 "lan743x_: No suitable DMA available\n"); 1752 ret = -ENOMEM; 1753 goto cleanup; 1754 } 1755 } 1756 ring_allocation_size = ALIGN(tx->ring_size * 1757 sizeof(struct lan743x_tx_descriptor), 1758 PAGE_SIZE); 1759 dma_ptr = 0; 1760 cpu_ptr = dma_alloc_coherent(&tx->adapter->pdev->dev, 1761 ring_allocation_size, &dma_ptr, GFP_KERNEL); 1762 if (!cpu_ptr) { 1763 ret = -ENOMEM; 1764 goto cleanup; 1765 } 1766 1767 tx->ring_allocation_size = ring_allocation_size; 1768 tx->ring_cpu_ptr = (struct lan743x_tx_descriptor *)cpu_ptr; 1769 tx->ring_dma_ptr = dma_ptr; 1770 1771 cpu_ptr = kcalloc(tx->ring_size, sizeof(*tx->buffer_info), GFP_KERNEL); 1772 if (!cpu_ptr) { 1773 ret = -ENOMEM; 1774 goto cleanup; 1775 } 1776 tx->buffer_info = (struct lan743x_tx_buffer_info *)cpu_ptr; 1777 dma_ptr = 0; 1778 cpu_ptr = dma_alloc_coherent(&tx->adapter->pdev->dev, 1779 sizeof(*tx->head_cpu_ptr), &dma_ptr, 1780 GFP_KERNEL); 1781 if (!cpu_ptr) { 1782 ret = -ENOMEM; 1783 goto cleanup; 1784 } 1785 1786 tx->head_cpu_ptr = cpu_ptr; 1787 tx->head_dma_ptr = dma_ptr; 1788 if (tx->head_dma_ptr & 0x3) { 1789 ret = -ENOMEM; 1790 goto cleanup; 1791 } 1792 1793 return 0; 1794 1795 cleanup: 1796 lan743x_tx_ring_cleanup(tx); 1797 return ret; 1798 } 1799 1800 static void lan743x_tx_close(struct lan743x_tx *tx) 1801 { 1802 struct lan743x_adapter *adapter = tx->adapter; 1803 1804 lan743x_csr_write(adapter, 1805 DMAC_CMD, 1806 DMAC_CMD_STOP_T_(tx->channel_number)); 1807 lan743x_dmac_tx_wait_till_stopped(adapter, tx->channel_number); 1808 1809 lan743x_csr_write(adapter, 1810 DMAC_INT_EN_CLR, 1811 DMAC_INT_BIT_TX_IOC_(tx->channel_number)); 1812 lan743x_csr_write(adapter, INT_EN_CLR, 1813 INT_BIT_DMA_TX_(tx->channel_number)); 1814 napi_disable(&tx->napi); 1815 netif_napi_del(&tx->napi); 1816 1817 lan743x_csr_write(adapter, FCT_TX_CTL, 1818 FCT_TX_CTL_DIS_(tx->channel_number)); 1819 lan743x_csr_wait_for_bit(adapter, FCT_TX_CTL, 1820 FCT_TX_CTL_EN_(tx->channel_number), 1821 0, 1000, 20000, 100); 1822 1823 lan743x_tx_release_all_descriptors(tx); 1824 1825 if (tx->overflow_skb) { 1826 dev_kfree_skb(tx->overflow_skb); 1827 tx->overflow_skb = NULL; 1828 } 1829 1830 lan743x_tx_ring_cleanup(tx); 1831 } 1832 1833 static int lan743x_tx_open(struct lan743x_tx *tx) 1834 { 1835 struct lan743x_adapter *adapter = NULL; 1836 u32 data = 0; 1837 int ret; 1838 1839 adapter = tx->adapter; 1840 ret = lan743x_tx_ring_init(tx); 1841 if (ret) 1842 return ret; 1843 1844 /* initialize fifo */ 1845 lan743x_csr_write(adapter, FCT_TX_CTL, 1846 FCT_TX_CTL_RESET_(tx->channel_number)); 1847 lan743x_csr_wait_for_bit(adapter, FCT_TX_CTL, 1848 FCT_TX_CTL_RESET_(tx->channel_number), 1849 0, 1000, 20000, 100); 1850 1851 /* enable fifo */ 1852 lan743x_csr_write(adapter, FCT_TX_CTL, 1853 FCT_TX_CTL_EN_(tx->channel_number)); 1854 1855 /* reset tx channel */ 1856 lan743x_csr_write(adapter, DMAC_CMD, 1857 DMAC_CMD_TX_SWR_(tx->channel_number)); 1858 lan743x_csr_wait_for_bit(adapter, DMAC_CMD, 1859 DMAC_CMD_TX_SWR_(tx->channel_number), 1860 0, 1000, 20000, 100); 1861 1862 /* Write TX_BASE_ADDR */ 1863 lan743x_csr_write(adapter, 1864 TX_BASE_ADDRH(tx->channel_number), 1865 DMA_ADDR_HIGH32(tx->ring_dma_ptr)); 1866 lan743x_csr_write(adapter, 1867 TX_BASE_ADDRL(tx->channel_number), 1868 DMA_ADDR_LOW32(tx->ring_dma_ptr)); 1869 1870 /* Write TX_CFG_B */ 1871 data = lan743x_csr_read(adapter, TX_CFG_B(tx->channel_number)); 1872 data &= ~TX_CFG_B_TX_RING_LEN_MASK_; 1873 data |= ((tx->ring_size) & TX_CFG_B_TX_RING_LEN_MASK_); 1874 if (!(adapter->csr.flags & LAN743X_CSR_FLAG_IS_A0)) 1875 data |= TX_CFG_B_TDMABL_512_; 1876 lan743x_csr_write(adapter, TX_CFG_B(tx->channel_number), data); 1877 1878 /* Write TX_CFG_A */ 1879 data = TX_CFG_A_TX_TMR_HPWB_SEL_IOC_ | TX_CFG_A_TX_HP_WB_EN_; 1880 if (!(adapter->csr.flags & LAN743X_CSR_FLAG_IS_A0)) { 1881 data |= TX_CFG_A_TX_HP_WB_ON_INT_TMR_; 1882 data |= TX_CFG_A_TX_PF_THRES_SET_(0x10); 1883 data |= TX_CFG_A_TX_PF_PRI_THRES_SET_(0x04); 1884 data |= TX_CFG_A_TX_HP_WB_THRES_SET_(0x07); 1885 } 1886 lan743x_csr_write(adapter, TX_CFG_A(tx->channel_number), data); 1887 1888 /* Write TX_HEAD_WRITEBACK_ADDR */ 1889 lan743x_csr_write(adapter, 1890 TX_HEAD_WRITEBACK_ADDRH(tx->channel_number), 1891 DMA_ADDR_HIGH32(tx->head_dma_ptr)); 1892 lan743x_csr_write(adapter, 1893 TX_HEAD_WRITEBACK_ADDRL(tx->channel_number), 1894 DMA_ADDR_LOW32(tx->head_dma_ptr)); 1895 1896 /* set last head */ 1897 tx->last_head = lan743x_csr_read(adapter, TX_HEAD(tx->channel_number)); 1898 1899 /* write TX_TAIL */ 1900 tx->last_tail = 0; 1901 lan743x_csr_write(adapter, TX_TAIL(tx->channel_number), 1902 (u32)(tx->last_tail)); 1903 tx->vector_flags = lan743x_intr_get_vector_flags(adapter, 1904 INT_BIT_DMA_TX_ 1905 (tx->channel_number)); 1906 netif_tx_napi_add(adapter->netdev, 1907 &tx->napi, lan743x_tx_napi_poll, 1908 tx->ring_size - 1); 1909 napi_enable(&tx->napi); 1910 1911 data = 0; 1912 if (tx->vector_flags & LAN743X_VECTOR_FLAG_SOURCE_ENABLE_AUTO_CLEAR) 1913 data |= TX_CFG_C_TX_TOP_INT_EN_AUTO_CLR_; 1914 if (tx->vector_flags & LAN743X_VECTOR_FLAG_SOURCE_STATUS_AUTO_CLEAR) 1915 data |= TX_CFG_C_TX_DMA_INT_STS_AUTO_CLR_; 1916 if (tx->vector_flags & LAN743X_VECTOR_FLAG_SOURCE_STATUS_R2C) 1917 data |= TX_CFG_C_TX_INT_STS_R2C_MODE_MASK_; 1918 if (tx->vector_flags & LAN743X_VECTOR_FLAG_SOURCE_ENABLE_R2C) 1919 data |= TX_CFG_C_TX_INT_EN_R2C_; 1920 lan743x_csr_write(adapter, TX_CFG_C(tx->channel_number), data); 1921 1922 if (!(tx->vector_flags & LAN743X_VECTOR_FLAG_SOURCE_ENABLE_AUTO_SET)) 1923 lan743x_csr_write(adapter, INT_EN_SET, 1924 INT_BIT_DMA_TX_(tx->channel_number)); 1925 lan743x_csr_write(adapter, DMAC_INT_EN_SET, 1926 DMAC_INT_BIT_TX_IOC_(tx->channel_number)); 1927 1928 /* start dmac channel */ 1929 lan743x_csr_write(adapter, DMAC_CMD, 1930 DMAC_CMD_START_T_(tx->channel_number)); 1931 return 0; 1932 } 1933 1934 static int lan743x_rx_next_index(struct lan743x_rx *rx, int index) 1935 { 1936 return ((++index) % rx->ring_size); 1937 } 1938 1939 static void lan743x_rx_update_tail(struct lan743x_rx *rx, int index) 1940 { 1941 /* update the tail once per 8 descriptors */ 1942 if ((index & 7) == 7) 1943 lan743x_csr_write(rx->adapter, RX_TAIL(rx->channel_number), 1944 index); 1945 } 1946 1947 static int lan743x_rx_init_ring_element(struct lan743x_rx *rx, int index, 1948 gfp_t gfp) 1949 { 1950 struct net_device *netdev = rx->adapter->netdev; 1951 struct device *dev = &rx->adapter->pdev->dev; 1952 struct lan743x_rx_buffer_info *buffer_info; 1953 unsigned int buffer_length, used_length; 1954 struct lan743x_rx_descriptor *descriptor; 1955 struct sk_buff *skb; 1956 dma_addr_t dma_ptr; 1957 1958 buffer_length = netdev->mtu + ETH_HLEN + ETH_FCS_LEN + RX_HEAD_PADDING; 1959 1960 descriptor = &rx->ring_cpu_ptr[index]; 1961 buffer_info = &rx->buffer_info[index]; 1962 skb = __netdev_alloc_skb(netdev, buffer_length, gfp); 1963 if (!skb) 1964 return -ENOMEM; 1965 dma_ptr = dma_map_single(dev, skb->data, buffer_length, DMA_FROM_DEVICE); 1966 if (dma_mapping_error(dev, dma_ptr)) { 1967 dev_kfree_skb_any(skb); 1968 return -ENOMEM; 1969 } 1970 if (buffer_info->dma_ptr) { 1971 /* sync used area of buffer only */ 1972 if (le32_to_cpu(descriptor->data0) & RX_DESC_DATA0_LS_) 1973 /* frame length is valid only if LS bit is set. 1974 * it's a safe upper bound for the used area in this 1975 * buffer. 1976 */ 1977 used_length = min(RX_DESC_DATA0_FRAME_LENGTH_GET_ 1978 (le32_to_cpu(descriptor->data0)), 1979 buffer_info->buffer_length); 1980 else 1981 used_length = buffer_info->buffer_length; 1982 dma_sync_single_for_cpu(dev, buffer_info->dma_ptr, 1983 used_length, 1984 DMA_FROM_DEVICE); 1985 dma_unmap_single_attrs(dev, buffer_info->dma_ptr, 1986 buffer_info->buffer_length, 1987 DMA_FROM_DEVICE, 1988 DMA_ATTR_SKIP_CPU_SYNC); 1989 } 1990 1991 buffer_info->skb = skb; 1992 buffer_info->dma_ptr = dma_ptr; 1993 buffer_info->buffer_length = buffer_length; 1994 descriptor->data1 = cpu_to_le32(DMA_ADDR_LOW32(buffer_info->dma_ptr)); 1995 descriptor->data2 = cpu_to_le32(DMA_ADDR_HIGH32(buffer_info->dma_ptr)); 1996 descriptor->data3 = 0; 1997 descriptor->data0 = cpu_to_le32((RX_DESC_DATA0_OWN_ | 1998 (buffer_length & RX_DESC_DATA0_BUF_LENGTH_MASK_))); 1999 lan743x_rx_update_tail(rx, index); 2000 2001 return 0; 2002 } 2003 2004 static void lan743x_rx_reuse_ring_element(struct lan743x_rx *rx, int index) 2005 { 2006 struct lan743x_rx_buffer_info *buffer_info; 2007 struct lan743x_rx_descriptor *descriptor; 2008 2009 descriptor = &rx->ring_cpu_ptr[index]; 2010 buffer_info = &rx->buffer_info[index]; 2011 2012 descriptor->data1 = cpu_to_le32(DMA_ADDR_LOW32(buffer_info->dma_ptr)); 2013 descriptor->data2 = cpu_to_le32(DMA_ADDR_HIGH32(buffer_info->dma_ptr)); 2014 descriptor->data3 = 0; 2015 descriptor->data0 = cpu_to_le32((RX_DESC_DATA0_OWN_ | 2016 ((buffer_info->buffer_length) & 2017 RX_DESC_DATA0_BUF_LENGTH_MASK_))); 2018 lan743x_rx_update_tail(rx, index); 2019 } 2020 2021 static void lan743x_rx_release_ring_element(struct lan743x_rx *rx, int index) 2022 { 2023 struct lan743x_rx_buffer_info *buffer_info; 2024 struct lan743x_rx_descriptor *descriptor; 2025 2026 descriptor = &rx->ring_cpu_ptr[index]; 2027 buffer_info = &rx->buffer_info[index]; 2028 2029 memset(descriptor, 0, sizeof(*descriptor)); 2030 2031 if (buffer_info->dma_ptr) { 2032 dma_unmap_single(&rx->adapter->pdev->dev, 2033 buffer_info->dma_ptr, 2034 buffer_info->buffer_length, 2035 DMA_FROM_DEVICE); 2036 buffer_info->dma_ptr = 0; 2037 } 2038 2039 if (buffer_info->skb) { 2040 dev_kfree_skb(buffer_info->skb); 2041 buffer_info->skb = NULL; 2042 } 2043 2044 memset(buffer_info, 0, sizeof(*buffer_info)); 2045 } 2046 2047 static struct sk_buff * 2048 lan743x_rx_trim_skb(struct sk_buff *skb, int frame_length) 2049 { 2050 if (skb_linearize(skb)) { 2051 dev_kfree_skb_irq(skb); 2052 return NULL; 2053 } 2054 frame_length = max_t(int, 0, frame_length - ETH_FCS_LEN); 2055 if (skb->len > frame_length) { 2056 skb->tail -= skb->len - frame_length; 2057 skb->len = frame_length; 2058 } 2059 return skb; 2060 } 2061 2062 static int lan743x_rx_process_buffer(struct lan743x_rx *rx) 2063 { 2064 int current_head_index = le32_to_cpu(*rx->head_cpu_ptr); 2065 struct lan743x_rx_descriptor *descriptor, *desc_ext; 2066 struct net_device *netdev = rx->adapter->netdev; 2067 int result = RX_PROCESS_RESULT_NOTHING_TO_DO; 2068 struct lan743x_rx_buffer_info *buffer_info; 2069 int frame_length, buffer_length; 2070 int extension_index = -1; 2071 bool is_last, is_first; 2072 struct sk_buff *skb; 2073 2074 if (current_head_index < 0 || current_head_index >= rx->ring_size) 2075 goto done; 2076 2077 if (rx->last_head < 0 || rx->last_head >= rx->ring_size) 2078 goto done; 2079 2080 if (rx->last_head == current_head_index) 2081 goto done; 2082 2083 descriptor = &rx->ring_cpu_ptr[rx->last_head]; 2084 if (le32_to_cpu(descriptor->data0) & RX_DESC_DATA0_OWN_) 2085 goto done; 2086 buffer_info = &rx->buffer_info[rx->last_head]; 2087 2088 is_last = le32_to_cpu(descriptor->data0) & RX_DESC_DATA0_LS_; 2089 is_first = le32_to_cpu(descriptor->data0) & RX_DESC_DATA0_FS_; 2090 2091 if (is_last && le32_to_cpu(descriptor->data0) & RX_DESC_DATA0_EXT_) { 2092 /* extension is expected to follow */ 2093 int index = lan743x_rx_next_index(rx, rx->last_head); 2094 2095 if (index == current_head_index) 2096 /* extension not yet available */ 2097 goto done; 2098 desc_ext = &rx->ring_cpu_ptr[index]; 2099 if (le32_to_cpu(desc_ext->data0) & RX_DESC_DATA0_OWN_) 2100 /* extension not yet available */ 2101 goto done; 2102 if (!(le32_to_cpu(desc_ext->data0) & RX_DESC_DATA0_EXT_)) 2103 goto move_forward; 2104 extension_index = index; 2105 } 2106 2107 /* Only the last buffer in a multi-buffer frame contains the total frame 2108 * length. The chip occasionally sends more buffers than strictly 2109 * required to reach the total frame length. 2110 * Handle this by adding all buffers to the skb in their entirety. 2111 * Once the real frame length is known, trim the skb. 2112 */ 2113 frame_length = 2114 RX_DESC_DATA0_FRAME_LENGTH_GET_(le32_to_cpu(descriptor->data0)); 2115 buffer_length = buffer_info->buffer_length; 2116 2117 netdev_dbg(netdev, "%s%schunk: %d/%d", 2118 is_first ? "first " : " ", 2119 is_last ? "last " : " ", 2120 frame_length, buffer_length); 2121 2122 /* save existing skb, allocate new skb and map to dma */ 2123 skb = buffer_info->skb; 2124 if (lan743x_rx_init_ring_element(rx, rx->last_head, 2125 GFP_ATOMIC | GFP_DMA)) { 2126 /* failed to allocate next skb. 2127 * Memory is very low. 2128 * Drop this packet and reuse buffer. 2129 */ 2130 lan743x_rx_reuse_ring_element(rx, rx->last_head); 2131 /* drop packet that was being assembled */ 2132 dev_kfree_skb_irq(rx->skb_head); 2133 rx->skb_head = NULL; 2134 goto process_extension; 2135 } 2136 2137 /* add buffers to skb via skb->frag_list */ 2138 if (is_first) { 2139 skb_reserve(skb, RX_HEAD_PADDING); 2140 skb_put(skb, buffer_length - RX_HEAD_PADDING); 2141 if (rx->skb_head) 2142 dev_kfree_skb_irq(rx->skb_head); 2143 rx->skb_head = skb; 2144 } else if (rx->skb_head) { 2145 skb_put(skb, buffer_length); 2146 if (skb_shinfo(rx->skb_head)->frag_list) 2147 rx->skb_tail->next = skb; 2148 else 2149 skb_shinfo(rx->skb_head)->frag_list = skb; 2150 rx->skb_tail = skb; 2151 rx->skb_head->len += skb->len; 2152 rx->skb_head->data_len += skb->len; 2153 rx->skb_head->truesize += skb->truesize; 2154 } else { 2155 /* packet to assemble has already been dropped because one or 2156 * more of its buffers could not be allocated 2157 */ 2158 netdev_dbg(netdev, "drop buffer intended for dropped packet"); 2159 dev_kfree_skb_irq(skb); 2160 } 2161 2162 process_extension: 2163 if (extension_index >= 0) { 2164 u32 ts_sec; 2165 u32 ts_nsec; 2166 2167 ts_sec = le32_to_cpu(desc_ext->data1); 2168 ts_nsec = (le32_to_cpu(desc_ext->data2) & 2169 RX_DESC_DATA2_TS_NS_MASK_); 2170 if (rx->skb_head) 2171 skb_hwtstamps(rx->skb_head)->hwtstamp = 2172 ktime_set(ts_sec, ts_nsec); 2173 lan743x_rx_reuse_ring_element(rx, extension_index); 2174 rx->last_head = extension_index; 2175 netdev_dbg(netdev, "process extension"); 2176 } 2177 2178 if (is_last && rx->skb_head) 2179 rx->skb_head = lan743x_rx_trim_skb(rx->skb_head, frame_length); 2180 2181 if (is_last && rx->skb_head) { 2182 rx->skb_head->protocol = eth_type_trans(rx->skb_head, 2183 rx->adapter->netdev); 2184 netdev_dbg(netdev, "sending %d byte frame to OS", 2185 rx->skb_head->len); 2186 napi_gro_receive(&rx->napi, rx->skb_head); 2187 rx->skb_head = NULL; 2188 } 2189 2190 move_forward: 2191 /* push tail and head forward */ 2192 rx->last_tail = rx->last_head; 2193 rx->last_head = lan743x_rx_next_index(rx, rx->last_head); 2194 result = RX_PROCESS_RESULT_BUFFER_RECEIVED; 2195 done: 2196 return result; 2197 } 2198 2199 static int lan743x_rx_napi_poll(struct napi_struct *napi, int weight) 2200 { 2201 struct lan743x_rx *rx = container_of(napi, struct lan743x_rx, napi); 2202 struct lan743x_adapter *adapter = rx->adapter; 2203 int result = RX_PROCESS_RESULT_NOTHING_TO_DO; 2204 u32 rx_tail_flags = 0; 2205 int count; 2206 2207 if (rx->vector_flags & LAN743X_VECTOR_FLAG_SOURCE_STATUS_W2C) { 2208 /* clear int status bit before reading packet */ 2209 lan743x_csr_write(adapter, DMAC_INT_STS, 2210 DMAC_INT_BIT_RXFRM_(rx->channel_number)); 2211 } 2212 for (count = 0; count < weight; count++) { 2213 result = lan743x_rx_process_buffer(rx); 2214 if (result == RX_PROCESS_RESULT_NOTHING_TO_DO) 2215 break; 2216 } 2217 rx->frame_count += count; 2218 if (count == weight || result == RX_PROCESS_RESULT_BUFFER_RECEIVED) 2219 return weight; 2220 2221 if (!napi_complete_done(napi, count)) 2222 return count; 2223 2224 /* re-arm interrupts, must write to rx tail on some chip variants */ 2225 if (rx->vector_flags & LAN743X_VECTOR_FLAG_VECTOR_ENABLE_AUTO_SET) 2226 rx_tail_flags |= RX_TAIL_SET_TOP_INT_VEC_EN_; 2227 if (rx->vector_flags & LAN743X_VECTOR_FLAG_SOURCE_ENABLE_AUTO_SET) { 2228 rx_tail_flags |= RX_TAIL_SET_TOP_INT_EN_; 2229 } else { 2230 lan743x_csr_write(adapter, INT_EN_SET, 2231 INT_BIT_DMA_RX_(rx->channel_number)); 2232 } 2233 2234 if (rx_tail_flags) 2235 lan743x_csr_write(adapter, RX_TAIL(rx->channel_number), 2236 rx_tail_flags | rx->last_tail); 2237 2238 return count; 2239 } 2240 2241 static void lan743x_rx_ring_cleanup(struct lan743x_rx *rx) 2242 { 2243 if (rx->buffer_info && rx->ring_cpu_ptr) { 2244 int index; 2245 2246 for (index = 0; index < rx->ring_size; index++) 2247 lan743x_rx_release_ring_element(rx, index); 2248 } 2249 2250 if (rx->head_cpu_ptr) { 2251 dma_free_coherent(&rx->adapter->pdev->dev, 2252 sizeof(*rx->head_cpu_ptr), rx->head_cpu_ptr, 2253 rx->head_dma_ptr); 2254 rx->head_cpu_ptr = NULL; 2255 rx->head_dma_ptr = 0; 2256 } 2257 2258 kfree(rx->buffer_info); 2259 rx->buffer_info = NULL; 2260 2261 if (rx->ring_cpu_ptr) { 2262 dma_free_coherent(&rx->adapter->pdev->dev, 2263 rx->ring_allocation_size, rx->ring_cpu_ptr, 2264 rx->ring_dma_ptr); 2265 rx->ring_allocation_size = 0; 2266 rx->ring_cpu_ptr = NULL; 2267 rx->ring_dma_ptr = 0; 2268 } 2269 2270 rx->ring_size = 0; 2271 rx->last_head = 0; 2272 } 2273 2274 static int lan743x_rx_ring_init(struct lan743x_rx *rx) 2275 { 2276 size_t ring_allocation_size = 0; 2277 dma_addr_t dma_ptr = 0; 2278 void *cpu_ptr = NULL; 2279 int ret = -ENOMEM; 2280 int index = 0; 2281 2282 rx->ring_size = LAN743X_RX_RING_SIZE; 2283 if (rx->ring_size <= 1) { 2284 ret = -EINVAL; 2285 goto cleanup; 2286 } 2287 if (rx->ring_size & ~RX_CFG_B_RX_RING_LEN_MASK_) { 2288 ret = -EINVAL; 2289 goto cleanup; 2290 } 2291 if (dma_set_mask_and_coherent(&rx->adapter->pdev->dev, 2292 DMA_BIT_MASK(64))) { 2293 if (dma_set_mask_and_coherent(&rx->adapter->pdev->dev, 2294 DMA_BIT_MASK(32))) { 2295 dev_warn(&rx->adapter->pdev->dev, 2296 "lan743x_: No suitable DMA available\n"); 2297 ret = -ENOMEM; 2298 goto cleanup; 2299 } 2300 } 2301 ring_allocation_size = ALIGN(rx->ring_size * 2302 sizeof(struct lan743x_rx_descriptor), 2303 PAGE_SIZE); 2304 dma_ptr = 0; 2305 cpu_ptr = dma_alloc_coherent(&rx->adapter->pdev->dev, 2306 ring_allocation_size, &dma_ptr, GFP_KERNEL); 2307 if (!cpu_ptr) { 2308 ret = -ENOMEM; 2309 goto cleanup; 2310 } 2311 rx->ring_allocation_size = ring_allocation_size; 2312 rx->ring_cpu_ptr = (struct lan743x_rx_descriptor *)cpu_ptr; 2313 rx->ring_dma_ptr = dma_ptr; 2314 2315 cpu_ptr = kcalloc(rx->ring_size, sizeof(*rx->buffer_info), 2316 GFP_KERNEL); 2317 if (!cpu_ptr) { 2318 ret = -ENOMEM; 2319 goto cleanup; 2320 } 2321 rx->buffer_info = (struct lan743x_rx_buffer_info *)cpu_ptr; 2322 dma_ptr = 0; 2323 cpu_ptr = dma_alloc_coherent(&rx->adapter->pdev->dev, 2324 sizeof(*rx->head_cpu_ptr), &dma_ptr, 2325 GFP_KERNEL); 2326 if (!cpu_ptr) { 2327 ret = -ENOMEM; 2328 goto cleanup; 2329 } 2330 2331 rx->head_cpu_ptr = cpu_ptr; 2332 rx->head_dma_ptr = dma_ptr; 2333 if (rx->head_dma_ptr & 0x3) { 2334 ret = -ENOMEM; 2335 goto cleanup; 2336 } 2337 2338 rx->last_head = 0; 2339 for (index = 0; index < rx->ring_size; index++) { 2340 ret = lan743x_rx_init_ring_element(rx, index, GFP_KERNEL); 2341 if (ret) 2342 goto cleanup; 2343 } 2344 return 0; 2345 2346 cleanup: 2347 netif_warn(rx->adapter, ifup, rx->adapter->netdev, 2348 "Error allocating memory for LAN743x\n"); 2349 2350 lan743x_rx_ring_cleanup(rx); 2351 return ret; 2352 } 2353 2354 static void lan743x_rx_close(struct lan743x_rx *rx) 2355 { 2356 struct lan743x_adapter *adapter = rx->adapter; 2357 2358 lan743x_csr_write(adapter, FCT_RX_CTL, 2359 FCT_RX_CTL_DIS_(rx->channel_number)); 2360 lan743x_csr_wait_for_bit(adapter, FCT_RX_CTL, 2361 FCT_RX_CTL_EN_(rx->channel_number), 2362 0, 1000, 20000, 100); 2363 2364 lan743x_csr_write(adapter, DMAC_CMD, 2365 DMAC_CMD_STOP_R_(rx->channel_number)); 2366 lan743x_dmac_rx_wait_till_stopped(adapter, rx->channel_number); 2367 2368 lan743x_csr_write(adapter, DMAC_INT_EN_CLR, 2369 DMAC_INT_BIT_RXFRM_(rx->channel_number)); 2370 lan743x_csr_write(adapter, INT_EN_CLR, 2371 INT_BIT_DMA_RX_(rx->channel_number)); 2372 napi_disable(&rx->napi); 2373 2374 netif_napi_del(&rx->napi); 2375 2376 lan743x_rx_ring_cleanup(rx); 2377 } 2378 2379 static int lan743x_rx_open(struct lan743x_rx *rx) 2380 { 2381 struct lan743x_adapter *adapter = rx->adapter; 2382 u32 data = 0; 2383 int ret; 2384 2385 rx->frame_count = 0; 2386 ret = lan743x_rx_ring_init(rx); 2387 if (ret) 2388 goto return_error; 2389 2390 netif_napi_add(adapter->netdev, 2391 &rx->napi, lan743x_rx_napi_poll, 2392 NAPI_POLL_WEIGHT); 2393 2394 lan743x_csr_write(adapter, DMAC_CMD, 2395 DMAC_CMD_RX_SWR_(rx->channel_number)); 2396 lan743x_csr_wait_for_bit(adapter, DMAC_CMD, 2397 DMAC_CMD_RX_SWR_(rx->channel_number), 2398 0, 1000, 20000, 100); 2399 2400 /* set ring base address */ 2401 lan743x_csr_write(adapter, 2402 RX_BASE_ADDRH(rx->channel_number), 2403 DMA_ADDR_HIGH32(rx->ring_dma_ptr)); 2404 lan743x_csr_write(adapter, 2405 RX_BASE_ADDRL(rx->channel_number), 2406 DMA_ADDR_LOW32(rx->ring_dma_ptr)); 2407 2408 /* set rx write back address */ 2409 lan743x_csr_write(adapter, 2410 RX_HEAD_WRITEBACK_ADDRH(rx->channel_number), 2411 DMA_ADDR_HIGH32(rx->head_dma_ptr)); 2412 lan743x_csr_write(adapter, 2413 RX_HEAD_WRITEBACK_ADDRL(rx->channel_number), 2414 DMA_ADDR_LOW32(rx->head_dma_ptr)); 2415 data = RX_CFG_A_RX_HP_WB_EN_; 2416 if (!(adapter->csr.flags & LAN743X_CSR_FLAG_IS_A0)) { 2417 data |= (RX_CFG_A_RX_WB_ON_INT_TMR_ | 2418 RX_CFG_A_RX_WB_THRES_SET_(0x7) | 2419 RX_CFG_A_RX_PF_THRES_SET_(16) | 2420 RX_CFG_A_RX_PF_PRI_THRES_SET_(4)); 2421 } 2422 2423 /* set RX_CFG_A */ 2424 lan743x_csr_write(adapter, 2425 RX_CFG_A(rx->channel_number), data); 2426 2427 /* set RX_CFG_B */ 2428 data = lan743x_csr_read(adapter, RX_CFG_B(rx->channel_number)); 2429 data &= ~RX_CFG_B_RX_PAD_MASK_; 2430 if (!RX_HEAD_PADDING) 2431 data |= RX_CFG_B_RX_PAD_0_; 2432 else 2433 data |= RX_CFG_B_RX_PAD_2_; 2434 data &= ~RX_CFG_B_RX_RING_LEN_MASK_; 2435 data |= ((rx->ring_size) & RX_CFG_B_RX_RING_LEN_MASK_); 2436 data |= RX_CFG_B_TS_ALL_RX_; 2437 if (!(adapter->csr.flags & LAN743X_CSR_FLAG_IS_A0)) 2438 data |= RX_CFG_B_RDMABL_512_; 2439 2440 lan743x_csr_write(adapter, RX_CFG_B(rx->channel_number), data); 2441 rx->vector_flags = lan743x_intr_get_vector_flags(adapter, 2442 INT_BIT_DMA_RX_ 2443 (rx->channel_number)); 2444 2445 /* set RX_CFG_C */ 2446 data = 0; 2447 if (rx->vector_flags & LAN743X_VECTOR_FLAG_SOURCE_ENABLE_AUTO_CLEAR) 2448 data |= RX_CFG_C_RX_TOP_INT_EN_AUTO_CLR_; 2449 if (rx->vector_flags & LAN743X_VECTOR_FLAG_SOURCE_STATUS_AUTO_CLEAR) 2450 data |= RX_CFG_C_RX_DMA_INT_STS_AUTO_CLR_; 2451 if (rx->vector_flags & LAN743X_VECTOR_FLAG_SOURCE_STATUS_R2C) 2452 data |= RX_CFG_C_RX_INT_STS_R2C_MODE_MASK_; 2453 if (rx->vector_flags & LAN743X_VECTOR_FLAG_SOURCE_ENABLE_R2C) 2454 data |= RX_CFG_C_RX_INT_EN_R2C_; 2455 lan743x_csr_write(adapter, RX_CFG_C(rx->channel_number), data); 2456 2457 rx->last_tail = ((u32)(rx->ring_size - 1)); 2458 lan743x_csr_write(adapter, RX_TAIL(rx->channel_number), 2459 rx->last_tail); 2460 rx->last_head = lan743x_csr_read(adapter, RX_HEAD(rx->channel_number)); 2461 if (rx->last_head) { 2462 ret = -EIO; 2463 goto napi_delete; 2464 } 2465 2466 napi_enable(&rx->napi); 2467 2468 lan743x_csr_write(adapter, INT_EN_SET, 2469 INT_BIT_DMA_RX_(rx->channel_number)); 2470 lan743x_csr_write(adapter, DMAC_INT_STS, 2471 DMAC_INT_BIT_RXFRM_(rx->channel_number)); 2472 lan743x_csr_write(adapter, DMAC_INT_EN_SET, 2473 DMAC_INT_BIT_RXFRM_(rx->channel_number)); 2474 lan743x_csr_write(adapter, DMAC_CMD, 2475 DMAC_CMD_START_R_(rx->channel_number)); 2476 2477 /* initialize fifo */ 2478 lan743x_csr_write(adapter, FCT_RX_CTL, 2479 FCT_RX_CTL_RESET_(rx->channel_number)); 2480 lan743x_csr_wait_for_bit(adapter, FCT_RX_CTL, 2481 FCT_RX_CTL_RESET_(rx->channel_number), 2482 0, 1000, 20000, 100); 2483 lan743x_csr_write(adapter, FCT_FLOW(rx->channel_number), 2484 FCT_FLOW_CTL_REQ_EN_ | 2485 FCT_FLOW_CTL_ON_THRESHOLD_SET_(0x2A) | 2486 FCT_FLOW_CTL_OFF_THRESHOLD_SET_(0xA)); 2487 2488 /* enable fifo */ 2489 lan743x_csr_write(adapter, FCT_RX_CTL, 2490 FCT_RX_CTL_EN_(rx->channel_number)); 2491 return 0; 2492 2493 napi_delete: 2494 netif_napi_del(&rx->napi); 2495 lan743x_rx_ring_cleanup(rx); 2496 2497 return_error: 2498 return ret; 2499 } 2500 2501 static int lan743x_netdev_close(struct net_device *netdev) 2502 { 2503 struct lan743x_adapter *adapter = netdev_priv(netdev); 2504 int index; 2505 2506 lan743x_tx_close(&adapter->tx[0]); 2507 2508 for (index = 0; index < LAN743X_USED_RX_CHANNELS; index++) 2509 lan743x_rx_close(&adapter->rx[index]); 2510 2511 lan743x_ptp_close(adapter); 2512 2513 lan743x_phy_close(adapter); 2514 2515 lan743x_mac_close(adapter); 2516 2517 lan743x_intr_close(adapter); 2518 2519 return 0; 2520 } 2521 2522 static int lan743x_netdev_open(struct net_device *netdev) 2523 { 2524 struct lan743x_adapter *adapter = netdev_priv(netdev); 2525 int index; 2526 int ret; 2527 2528 ret = lan743x_intr_open(adapter); 2529 if (ret) 2530 goto return_error; 2531 2532 ret = lan743x_mac_open(adapter); 2533 if (ret) 2534 goto close_intr; 2535 2536 ret = lan743x_phy_open(adapter); 2537 if (ret) 2538 goto close_mac; 2539 2540 ret = lan743x_ptp_open(adapter); 2541 if (ret) 2542 goto close_phy; 2543 2544 lan743x_rfe_open(adapter); 2545 2546 for (index = 0; index < LAN743X_USED_RX_CHANNELS; index++) { 2547 ret = lan743x_rx_open(&adapter->rx[index]); 2548 if (ret) 2549 goto close_rx; 2550 } 2551 2552 ret = lan743x_tx_open(&adapter->tx[0]); 2553 if (ret) 2554 goto close_rx; 2555 2556 return 0; 2557 2558 close_rx: 2559 for (index = 0; index < LAN743X_USED_RX_CHANNELS; index++) { 2560 if (adapter->rx[index].ring_cpu_ptr) 2561 lan743x_rx_close(&adapter->rx[index]); 2562 } 2563 lan743x_ptp_close(adapter); 2564 2565 close_phy: 2566 lan743x_phy_close(adapter); 2567 2568 close_mac: 2569 lan743x_mac_close(adapter); 2570 2571 close_intr: 2572 lan743x_intr_close(adapter); 2573 2574 return_error: 2575 netif_warn(adapter, ifup, adapter->netdev, 2576 "Error opening LAN743x\n"); 2577 return ret; 2578 } 2579 2580 static netdev_tx_t lan743x_netdev_xmit_frame(struct sk_buff *skb, 2581 struct net_device *netdev) 2582 { 2583 struct lan743x_adapter *adapter = netdev_priv(netdev); 2584 2585 return lan743x_tx_xmit_frame(&adapter->tx[0], skb); 2586 } 2587 2588 static int lan743x_netdev_ioctl(struct net_device *netdev, 2589 struct ifreq *ifr, int cmd) 2590 { 2591 if (!netif_running(netdev)) 2592 return -EINVAL; 2593 if (cmd == SIOCSHWTSTAMP) 2594 return lan743x_ptp_ioctl(netdev, ifr, cmd); 2595 return phy_mii_ioctl(netdev->phydev, ifr, cmd); 2596 } 2597 2598 static void lan743x_netdev_set_multicast(struct net_device *netdev) 2599 { 2600 struct lan743x_adapter *adapter = netdev_priv(netdev); 2601 2602 lan743x_rfe_set_multicast(adapter); 2603 } 2604 2605 static int lan743x_netdev_change_mtu(struct net_device *netdev, int new_mtu) 2606 { 2607 struct lan743x_adapter *adapter = netdev_priv(netdev); 2608 int ret = 0; 2609 2610 ret = lan743x_mac_set_mtu(adapter, new_mtu); 2611 if (!ret) 2612 netdev->mtu = new_mtu; 2613 return ret; 2614 } 2615 2616 static void lan743x_netdev_get_stats64(struct net_device *netdev, 2617 struct rtnl_link_stats64 *stats) 2618 { 2619 struct lan743x_adapter *adapter = netdev_priv(netdev); 2620 2621 stats->rx_packets = lan743x_csr_read(adapter, STAT_RX_TOTAL_FRAMES); 2622 stats->tx_packets = lan743x_csr_read(adapter, STAT_TX_TOTAL_FRAMES); 2623 stats->rx_bytes = lan743x_csr_read(adapter, 2624 STAT_RX_UNICAST_BYTE_COUNT) + 2625 lan743x_csr_read(adapter, 2626 STAT_RX_BROADCAST_BYTE_COUNT) + 2627 lan743x_csr_read(adapter, 2628 STAT_RX_MULTICAST_BYTE_COUNT); 2629 stats->tx_bytes = lan743x_csr_read(adapter, 2630 STAT_TX_UNICAST_BYTE_COUNT) + 2631 lan743x_csr_read(adapter, 2632 STAT_TX_BROADCAST_BYTE_COUNT) + 2633 lan743x_csr_read(adapter, 2634 STAT_TX_MULTICAST_BYTE_COUNT); 2635 stats->rx_errors = lan743x_csr_read(adapter, STAT_RX_FCS_ERRORS) + 2636 lan743x_csr_read(adapter, 2637 STAT_RX_ALIGNMENT_ERRORS) + 2638 lan743x_csr_read(adapter, STAT_RX_JABBER_ERRORS) + 2639 lan743x_csr_read(adapter, 2640 STAT_RX_UNDERSIZE_FRAME_ERRORS) + 2641 lan743x_csr_read(adapter, 2642 STAT_RX_OVERSIZE_FRAME_ERRORS); 2643 stats->tx_errors = lan743x_csr_read(adapter, STAT_TX_FCS_ERRORS) + 2644 lan743x_csr_read(adapter, 2645 STAT_TX_EXCESS_DEFERRAL_ERRORS) + 2646 lan743x_csr_read(adapter, STAT_TX_CARRIER_ERRORS); 2647 stats->rx_dropped = lan743x_csr_read(adapter, 2648 STAT_RX_DROPPED_FRAMES); 2649 stats->tx_dropped = lan743x_csr_read(adapter, 2650 STAT_TX_EXCESSIVE_COLLISION); 2651 stats->multicast = lan743x_csr_read(adapter, 2652 STAT_RX_MULTICAST_FRAMES) + 2653 lan743x_csr_read(adapter, 2654 STAT_TX_MULTICAST_FRAMES); 2655 stats->collisions = lan743x_csr_read(adapter, 2656 STAT_TX_SINGLE_COLLISIONS) + 2657 lan743x_csr_read(adapter, 2658 STAT_TX_MULTIPLE_COLLISIONS) + 2659 lan743x_csr_read(adapter, 2660 STAT_TX_LATE_COLLISIONS); 2661 } 2662 2663 static int lan743x_netdev_set_mac_address(struct net_device *netdev, 2664 void *addr) 2665 { 2666 struct lan743x_adapter *adapter = netdev_priv(netdev); 2667 struct sockaddr *sock_addr = addr; 2668 int ret; 2669 2670 ret = eth_prepare_mac_addr_change(netdev, sock_addr); 2671 if (ret) 2672 return ret; 2673 eth_hw_addr_set(netdev, sock_addr->sa_data); 2674 lan743x_mac_set_address(adapter, sock_addr->sa_data); 2675 lan743x_rfe_update_mac_address(adapter); 2676 return 0; 2677 } 2678 2679 static const struct net_device_ops lan743x_netdev_ops = { 2680 .ndo_open = lan743x_netdev_open, 2681 .ndo_stop = lan743x_netdev_close, 2682 .ndo_start_xmit = lan743x_netdev_xmit_frame, 2683 .ndo_eth_ioctl = lan743x_netdev_ioctl, 2684 .ndo_set_rx_mode = lan743x_netdev_set_multicast, 2685 .ndo_change_mtu = lan743x_netdev_change_mtu, 2686 .ndo_get_stats64 = lan743x_netdev_get_stats64, 2687 .ndo_set_mac_address = lan743x_netdev_set_mac_address, 2688 }; 2689 2690 static void lan743x_hardware_cleanup(struct lan743x_adapter *adapter) 2691 { 2692 lan743x_csr_write(adapter, INT_EN_CLR, 0xFFFFFFFF); 2693 } 2694 2695 static void lan743x_mdiobus_cleanup(struct lan743x_adapter *adapter) 2696 { 2697 mdiobus_unregister(adapter->mdiobus); 2698 } 2699 2700 static void lan743x_full_cleanup(struct lan743x_adapter *adapter) 2701 { 2702 unregister_netdev(adapter->netdev); 2703 2704 lan743x_mdiobus_cleanup(adapter); 2705 lan743x_hardware_cleanup(adapter); 2706 lan743x_pci_cleanup(adapter); 2707 } 2708 2709 static int lan743x_hardware_init(struct lan743x_adapter *adapter, 2710 struct pci_dev *pdev) 2711 { 2712 struct lan743x_tx *tx; 2713 int index; 2714 int ret; 2715 2716 adapter->intr.irq = adapter->pdev->irq; 2717 lan743x_csr_write(adapter, INT_EN_CLR, 0xFFFFFFFF); 2718 2719 ret = lan743x_gpio_init(adapter); 2720 if (ret) 2721 return ret; 2722 2723 ret = lan743x_mac_init(adapter); 2724 if (ret) 2725 return ret; 2726 2727 ret = lan743x_phy_init(adapter); 2728 if (ret) 2729 return ret; 2730 2731 ret = lan743x_ptp_init(adapter); 2732 if (ret) 2733 return ret; 2734 2735 lan743x_rfe_update_mac_address(adapter); 2736 2737 ret = lan743x_dmac_init(adapter); 2738 if (ret) 2739 return ret; 2740 2741 for (index = 0; index < LAN743X_USED_RX_CHANNELS; index++) { 2742 adapter->rx[index].adapter = adapter; 2743 adapter->rx[index].channel_number = index; 2744 } 2745 2746 tx = &adapter->tx[0]; 2747 tx->adapter = adapter; 2748 tx->channel_number = 0; 2749 spin_lock_init(&tx->ring_lock); 2750 return 0; 2751 } 2752 2753 static int lan743x_mdiobus_init(struct lan743x_adapter *adapter) 2754 { 2755 int ret; 2756 2757 adapter->mdiobus = devm_mdiobus_alloc(&adapter->pdev->dev); 2758 if (!(adapter->mdiobus)) { 2759 ret = -ENOMEM; 2760 goto return_error; 2761 } 2762 2763 adapter->mdiobus->priv = (void *)adapter; 2764 adapter->mdiobus->read = lan743x_mdiobus_read; 2765 adapter->mdiobus->write = lan743x_mdiobus_write; 2766 adapter->mdiobus->name = "lan743x-mdiobus"; 2767 snprintf(adapter->mdiobus->id, MII_BUS_ID_SIZE, 2768 "pci-%s", pci_name(adapter->pdev)); 2769 2770 if ((adapter->csr.id_rev & ID_REV_ID_MASK_) == ID_REV_ID_LAN7430_) 2771 /* LAN7430 uses internal phy at address 1 */ 2772 adapter->mdiobus->phy_mask = ~(u32)BIT(1); 2773 2774 /* register mdiobus */ 2775 ret = mdiobus_register(adapter->mdiobus); 2776 if (ret < 0) 2777 goto return_error; 2778 return 0; 2779 2780 return_error: 2781 return ret; 2782 } 2783 2784 /* lan743x_pcidev_probe - Device Initialization Routine 2785 * @pdev: PCI device information struct 2786 * @id: entry in lan743x_pci_tbl 2787 * 2788 * Returns 0 on success, negative on failure 2789 * 2790 * initializes an adapter identified by a pci_dev structure. 2791 * The OS initialization, configuring of the adapter private structure, 2792 * and a hardware reset occur. 2793 **/ 2794 static int lan743x_pcidev_probe(struct pci_dev *pdev, 2795 const struct pci_device_id *id) 2796 { 2797 struct lan743x_adapter *adapter = NULL; 2798 struct net_device *netdev = NULL; 2799 int ret = -ENODEV; 2800 2801 netdev = devm_alloc_etherdev(&pdev->dev, 2802 sizeof(struct lan743x_adapter)); 2803 if (!netdev) 2804 goto return_error; 2805 2806 SET_NETDEV_DEV(netdev, &pdev->dev); 2807 pci_set_drvdata(pdev, netdev); 2808 adapter = netdev_priv(netdev); 2809 adapter->netdev = netdev; 2810 adapter->msg_enable = NETIF_MSG_DRV | NETIF_MSG_PROBE | 2811 NETIF_MSG_LINK | NETIF_MSG_IFUP | 2812 NETIF_MSG_IFDOWN | NETIF_MSG_TX_QUEUED; 2813 netdev->max_mtu = LAN743X_MAX_FRAME_SIZE; 2814 2815 of_get_mac_address(pdev->dev.of_node, adapter->mac_address); 2816 2817 ret = lan743x_pci_init(adapter, pdev); 2818 if (ret) 2819 goto return_error; 2820 2821 ret = lan743x_csr_init(adapter); 2822 if (ret) 2823 goto cleanup_pci; 2824 2825 ret = lan743x_hardware_init(adapter, pdev); 2826 if (ret) 2827 goto cleanup_pci; 2828 2829 ret = lan743x_mdiobus_init(adapter); 2830 if (ret) 2831 goto cleanup_hardware; 2832 2833 adapter->netdev->netdev_ops = &lan743x_netdev_ops; 2834 adapter->netdev->ethtool_ops = &lan743x_ethtool_ops; 2835 adapter->netdev->features = NETIF_F_SG | NETIF_F_TSO | NETIF_F_HW_CSUM; 2836 adapter->netdev->hw_features = adapter->netdev->features; 2837 2838 /* carrier off reporting is important to ethtool even BEFORE open */ 2839 netif_carrier_off(netdev); 2840 2841 ret = register_netdev(adapter->netdev); 2842 if (ret < 0) 2843 goto cleanup_mdiobus; 2844 return 0; 2845 2846 cleanup_mdiobus: 2847 lan743x_mdiobus_cleanup(adapter); 2848 2849 cleanup_hardware: 2850 lan743x_hardware_cleanup(adapter); 2851 2852 cleanup_pci: 2853 lan743x_pci_cleanup(adapter); 2854 2855 return_error: 2856 pr_warn("Initialization failed\n"); 2857 return ret; 2858 } 2859 2860 /** 2861 * lan743x_pcidev_remove - Device Removal Routine 2862 * @pdev: PCI device information struct 2863 * 2864 * this is called by the PCI subsystem to alert the driver 2865 * that it should release a PCI device. This could be caused by a 2866 * Hot-Plug event, or because the driver is going to be removed from 2867 * memory. 2868 **/ 2869 static void lan743x_pcidev_remove(struct pci_dev *pdev) 2870 { 2871 struct net_device *netdev = pci_get_drvdata(pdev); 2872 struct lan743x_adapter *adapter = netdev_priv(netdev); 2873 2874 lan743x_full_cleanup(adapter); 2875 } 2876 2877 static void lan743x_pcidev_shutdown(struct pci_dev *pdev) 2878 { 2879 struct net_device *netdev = pci_get_drvdata(pdev); 2880 struct lan743x_adapter *adapter = netdev_priv(netdev); 2881 2882 rtnl_lock(); 2883 netif_device_detach(netdev); 2884 2885 /* close netdev when netdev is at running state. 2886 * For instance, it is true when system goes to sleep by pm-suspend 2887 * However, it is false when system goes to sleep by suspend GUI menu 2888 */ 2889 if (netif_running(netdev)) 2890 lan743x_netdev_close(netdev); 2891 rtnl_unlock(); 2892 2893 #ifdef CONFIG_PM 2894 pci_save_state(pdev); 2895 #endif 2896 2897 /* clean up lan743x portion */ 2898 lan743x_hardware_cleanup(adapter); 2899 } 2900 2901 #ifdef CONFIG_PM_SLEEP 2902 static u16 lan743x_pm_wakeframe_crc16(const u8 *buf, int len) 2903 { 2904 return bitrev16(crc16(0xFFFF, buf, len)); 2905 } 2906 2907 static void lan743x_pm_set_wol(struct lan743x_adapter *adapter) 2908 { 2909 const u8 ipv4_multicast[3] = { 0x01, 0x00, 0x5E }; 2910 const u8 ipv6_multicast[3] = { 0x33, 0x33 }; 2911 const u8 arp_type[2] = { 0x08, 0x06 }; 2912 int mask_index; 2913 u32 pmtctl; 2914 u32 wucsr; 2915 u32 macrx; 2916 u16 crc; 2917 2918 for (mask_index = 0; mask_index < MAC_NUM_OF_WUF_CFG; mask_index++) 2919 lan743x_csr_write(adapter, MAC_WUF_CFG(mask_index), 0); 2920 2921 /* clear wake settings */ 2922 pmtctl = lan743x_csr_read(adapter, PMT_CTL); 2923 pmtctl |= PMT_CTL_WUPS_MASK_; 2924 pmtctl &= ~(PMT_CTL_GPIO_WAKEUP_EN_ | PMT_CTL_EEE_WAKEUP_EN_ | 2925 PMT_CTL_WOL_EN_ | PMT_CTL_MAC_D3_RX_CLK_OVR_ | 2926 PMT_CTL_RX_FCT_RFE_D3_CLK_OVR_ | PMT_CTL_ETH_PHY_WAKE_EN_); 2927 2928 macrx = lan743x_csr_read(adapter, MAC_RX); 2929 2930 wucsr = 0; 2931 mask_index = 0; 2932 2933 pmtctl |= PMT_CTL_ETH_PHY_D3_COLD_OVR_ | PMT_CTL_ETH_PHY_D3_OVR_; 2934 2935 if (adapter->wolopts & WAKE_PHY) { 2936 pmtctl |= PMT_CTL_ETH_PHY_EDPD_PLL_CTL_; 2937 pmtctl |= PMT_CTL_ETH_PHY_WAKE_EN_; 2938 } 2939 if (adapter->wolopts & WAKE_MAGIC) { 2940 wucsr |= MAC_WUCSR_MPEN_; 2941 macrx |= MAC_RX_RXEN_; 2942 pmtctl |= PMT_CTL_WOL_EN_ | PMT_CTL_MAC_D3_RX_CLK_OVR_; 2943 } 2944 if (adapter->wolopts & WAKE_UCAST) { 2945 wucsr |= MAC_WUCSR_RFE_WAKE_EN_ | MAC_WUCSR_PFDA_EN_; 2946 macrx |= MAC_RX_RXEN_; 2947 pmtctl |= PMT_CTL_WOL_EN_ | PMT_CTL_MAC_D3_RX_CLK_OVR_; 2948 pmtctl |= PMT_CTL_RX_FCT_RFE_D3_CLK_OVR_; 2949 } 2950 if (adapter->wolopts & WAKE_BCAST) { 2951 wucsr |= MAC_WUCSR_RFE_WAKE_EN_ | MAC_WUCSR_BCST_EN_; 2952 macrx |= MAC_RX_RXEN_; 2953 pmtctl |= PMT_CTL_WOL_EN_ | PMT_CTL_MAC_D3_RX_CLK_OVR_; 2954 pmtctl |= PMT_CTL_RX_FCT_RFE_D3_CLK_OVR_; 2955 } 2956 if (adapter->wolopts & WAKE_MCAST) { 2957 /* IPv4 multicast */ 2958 crc = lan743x_pm_wakeframe_crc16(ipv4_multicast, 3); 2959 lan743x_csr_write(adapter, MAC_WUF_CFG(mask_index), 2960 MAC_WUF_CFG_EN_ | MAC_WUF_CFG_TYPE_MCAST_ | 2961 (0 << MAC_WUF_CFG_OFFSET_SHIFT_) | 2962 (crc & MAC_WUF_CFG_CRC16_MASK_)); 2963 lan743x_csr_write(adapter, MAC_WUF_MASK0(mask_index), 7); 2964 lan743x_csr_write(adapter, MAC_WUF_MASK1(mask_index), 0); 2965 lan743x_csr_write(adapter, MAC_WUF_MASK2(mask_index), 0); 2966 lan743x_csr_write(adapter, MAC_WUF_MASK3(mask_index), 0); 2967 mask_index++; 2968 2969 /* IPv6 multicast */ 2970 crc = lan743x_pm_wakeframe_crc16(ipv6_multicast, 2); 2971 lan743x_csr_write(adapter, MAC_WUF_CFG(mask_index), 2972 MAC_WUF_CFG_EN_ | MAC_WUF_CFG_TYPE_MCAST_ | 2973 (0 << MAC_WUF_CFG_OFFSET_SHIFT_) | 2974 (crc & MAC_WUF_CFG_CRC16_MASK_)); 2975 lan743x_csr_write(adapter, MAC_WUF_MASK0(mask_index), 3); 2976 lan743x_csr_write(adapter, MAC_WUF_MASK1(mask_index), 0); 2977 lan743x_csr_write(adapter, MAC_WUF_MASK2(mask_index), 0); 2978 lan743x_csr_write(adapter, MAC_WUF_MASK3(mask_index), 0); 2979 mask_index++; 2980 2981 wucsr |= MAC_WUCSR_RFE_WAKE_EN_ | MAC_WUCSR_WAKE_EN_; 2982 macrx |= MAC_RX_RXEN_; 2983 pmtctl |= PMT_CTL_WOL_EN_ | PMT_CTL_MAC_D3_RX_CLK_OVR_; 2984 pmtctl |= PMT_CTL_RX_FCT_RFE_D3_CLK_OVR_; 2985 } 2986 if (adapter->wolopts & WAKE_ARP) { 2987 /* set MAC_WUF_CFG & WUF_MASK 2988 * for packettype (offset 12,13) = ARP (0x0806) 2989 */ 2990 crc = lan743x_pm_wakeframe_crc16(arp_type, 2); 2991 lan743x_csr_write(adapter, MAC_WUF_CFG(mask_index), 2992 MAC_WUF_CFG_EN_ | MAC_WUF_CFG_TYPE_ALL_ | 2993 (0 << MAC_WUF_CFG_OFFSET_SHIFT_) | 2994 (crc & MAC_WUF_CFG_CRC16_MASK_)); 2995 lan743x_csr_write(adapter, MAC_WUF_MASK0(mask_index), 0x3000); 2996 lan743x_csr_write(adapter, MAC_WUF_MASK1(mask_index), 0); 2997 lan743x_csr_write(adapter, MAC_WUF_MASK2(mask_index), 0); 2998 lan743x_csr_write(adapter, MAC_WUF_MASK3(mask_index), 0); 2999 mask_index++; 3000 3001 wucsr |= MAC_WUCSR_RFE_WAKE_EN_ | MAC_WUCSR_WAKE_EN_; 3002 macrx |= MAC_RX_RXEN_; 3003 pmtctl |= PMT_CTL_WOL_EN_ | PMT_CTL_MAC_D3_RX_CLK_OVR_; 3004 pmtctl |= PMT_CTL_RX_FCT_RFE_D3_CLK_OVR_; 3005 } 3006 3007 lan743x_csr_write(adapter, MAC_WUCSR, wucsr); 3008 lan743x_csr_write(adapter, PMT_CTL, pmtctl); 3009 lan743x_csr_write(adapter, MAC_RX, macrx); 3010 } 3011 3012 static int lan743x_pm_suspend(struct device *dev) 3013 { 3014 struct pci_dev *pdev = to_pci_dev(dev); 3015 struct net_device *netdev = pci_get_drvdata(pdev); 3016 struct lan743x_adapter *adapter = netdev_priv(netdev); 3017 3018 lan743x_pcidev_shutdown(pdev); 3019 3020 /* clear all wakes */ 3021 lan743x_csr_write(adapter, MAC_WUCSR, 0); 3022 lan743x_csr_write(adapter, MAC_WUCSR2, 0); 3023 lan743x_csr_write(adapter, MAC_WK_SRC, 0xFFFFFFFF); 3024 3025 if (adapter->wolopts) 3026 lan743x_pm_set_wol(adapter); 3027 3028 /* Host sets PME_En, put D3hot */ 3029 return pci_prepare_to_sleep(pdev); 3030 } 3031 3032 static int lan743x_pm_resume(struct device *dev) 3033 { 3034 struct pci_dev *pdev = to_pci_dev(dev); 3035 struct net_device *netdev = pci_get_drvdata(pdev); 3036 struct lan743x_adapter *adapter = netdev_priv(netdev); 3037 int ret; 3038 3039 pci_set_power_state(pdev, PCI_D0); 3040 pci_restore_state(pdev); 3041 pci_save_state(pdev); 3042 3043 ret = lan743x_hardware_init(adapter, pdev); 3044 if (ret) { 3045 netif_err(adapter, probe, adapter->netdev, 3046 "lan743x_hardware_init returned %d\n", ret); 3047 lan743x_pci_cleanup(adapter); 3048 return ret; 3049 } 3050 3051 /* open netdev when netdev is at running state while resume. 3052 * For instance, it is true when system wakesup after pm-suspend 3053 * However, it is false when system wakes up after suspend GUI menu 3054 */ 3055 if (netif_running(netdev)) 3056 lan743x_netdev_open(netdev); 3057 3058 netif_device_attach(netdev); 3059 3060 return 0; 3061 } 3062 3063 static const struct dev_pm_ops lan743x_pm_ops = { 3064 SET_SYSTEM_SLEEP_PM_OPS(lan743x_pm_suspend, lan743x_pm_resume) 3065 }; 3066 #endif /* CONFIG_PM_SLEEP */ 3067 3068 static const struct pci_device_id lan743x_pcidev_tbl[] = { 3069 { PCI_DEVICE(PCI_VENDOR_ID_SMSC, PCI_DEVICE_ID_SMSC_LAN7430) }, 3070 { PCI_DEVICE(PCI_VENDOR_ID_SMSC, PCI_DEVICE_ID_SMSC_LAN7431) }, 3071 { 0, } 3072 }; 3073 3074 MODULE_DEVICE_TABLE(pci, lan743x_pcidev_tbl); 3075 3076 static struct pci_driver lan743x_pcidev_driver = { 3077 .name = DRIVER_NAME, 3078 .id_table = lan743x_pcidev_tbl, 3079 .probe = lan743x_pcidev_probe, 3080 .remove = lan743x_pcidev_remove, 3081 #ifdef CONFIG_PM_SLEEP 3082 .driver.pm = &lan743x_pm_ops, 3083 #endif 3084 .shutdown = lan743x_pcidev_shutdown, 3085 }; 3086 3087 module_pci_driver(lan743x_pcidev_driver); 3088 3089 MODULE_AUTHOR(DRIVER_AUTHOR); 3090 MODULE_DESCRIPTION(DRIVER_DESC); 3091 MODULE_LICENSE("GPL"); 3092