1 /* SPDX-License-Identifier: GPL-2.0+ */ 2 /* Copyright (C) 2018 Microchip Technology Inc. */ 3 4 #include <linux/module.h> 5 #include <linux/pci.h> 6 #include <linux/netdevice.h> 7 #include <linux/etherdevice.h> 8 #include <linux/crc32.h> 9 #include <linux/microchipphy.h> 10 #include <linux/net_tstamp.h> 11 #include <linux/of_mdio.h> 12 #include <linux/of_net.h> 13 #include <linux/phy.h> 14 #include <linux/phy_fixed.h> 15 #include <linux/rtnetlink.h> 16 #include <linux/iopoll.h> 17 #include <linux/crc16.h> 18 #include "lan743x_main.h" 19 #include "lan743x_ethtool.h" 20 21 static void lan743x_pci_cleanup(struct lan743x_adapter *adapter) 22 { 23 pci_release_selected_regions(adapter->pdev, 24 pci_select_bars(adapter->pdev, 25 IORESOURCE_MEM)); 26 pci_disable_device(adapter->pdev); 27 } 28 29 static int lan743x_pci_init(struct lan743x_adapter *adapter, 30 struct pci_dev *pdev) 31 { 32 unsigned long bars = 0; 33 int ret; 34 35 adapter->pdev = pdev; 36 ret = pci_enable_device_mem(pdev); 37 if (ret) 38 goto return_error; 39 40 netif_info(adapter, probe, adapter->netdev, 41 "PCI: Vendor ID = 0x%04X, Device ID = 0x%04X\n", 42 pdev->vendor, pdev->device); 43 bars = pci_select_bars(pdev, IORESOURCE_MEM); 44 if (!test_bit(0, &bars)) 45 goto disable_device; 46 47 ret = pci_request_selected_regions(pdev, bars, DRIVER_NAME); 48 if (ret) 49 goto disable_device; 50 51 pci_set_master(pdev); 52 return 0; 53 54 disable_device: 55 pci_disable_device(adapter->pdev); 56 57 return_error: 58 return ret; 59 } 60 61 u32 lan743x_csr_read(struct lan743x_adapter *adapter, int offset) 62 { 63 return ioread32(&adapter->csr.csr_address[offset]); 64 } 65 66 void lan743x_csr_write(struct lan743x_adapter *adapter, int offset, 67 u32 data) 68 { 69 iowrite32(data, &adapter->csr.csr_address[offset]); 70 } 71 72 #define LAN743X_CSR_READ_OP(offset) lan743x_csr_read(adapter, offset) 73 74 static int lan743x_csr_light_reset(struct lan743x_adapter *adapter) 75 { 76 u32 data; 77 78 data = lan743x_csr_read(adapter, HW_CFG); 79 data |= HW_CFG_LRST_; 80 lan743x_csr_write(adapter, HW_CFG, data); 81 82 return readx_poll_timeout(LAN743X_CSR_READ_OP, HW_CFG, data, 83 !(data & HW_CFG_LRST_), 100000, 10000000); 84 } 85 86 static int lan743x_csr_wait_for_bit(struct lan743x_adapter *adapter, 87 int offset, u32 bit_mask, 88 int target_value, int usleep_min, 89 int usleep_max, int count) 90 { 91 u32 data; 92 93 return readx_poll_timeout(LAN743X_CSR_READ_OP, offset, data, 94 target_value == ((data & bit_mask) ? 1 : 0), 95 usleep_max, usleep_min * count); 96 } 97 98 static int lan743x_csr_init(struct lan743x_adapter *adapter) 99 { 100 struct lan743x_csr *csr = &adapter->csr; 101 resource_size_t bar_start, bar_length; 102 int result; 103 104 bar_start = pci_resource_start(adapter->pdev, 0); 105 bar_length = pci_resource_len(adapter->pdev, 0); 106 csr->csr_address = devm_ioremap(&adapter->pdev->dev, 107 bar_start, bar_length); 108 if (!csr->csr_address) { 109 result = -ENOMEM; 110 goto clean_up; 111 } 112 113 csr->id_rev = lan743x_csr_read(adapter, ID_REV); 114 csr->fpga_rev = lan743x_csr_read(adapter, FPGA_REV); 115 netif_info(adapter, probe, adapter->netdev, 116 "ID_REV = 0x%08X, FPGA_REV = %d.%d\n", 117 csr->id_rev, FPGA_REV_GET_MAJOR_(csr->fpga_rev), 118 FPGA_REV_GET_MINOR_(csr->fpga_rev)); 119 if (!ID_REV_IS_VALID_CHIP_ID_(csr->id_rev)) { 120 result = -ENODEV; 121 goto clean_up; 122 } 123 124 csr->flags = LAN743X_CSR_FLAG_SUPPORTS_INTR_AUTO_SET_CLR; 125 switch (csr->id_rev & ID_REV_CHIP_REV_MASK_) { 126 case ID_REV_CHIP_REV_A0_: 127 csr->flags |= LAN743X_CSR_FLAG_IS_A0; 128 csr->flags &= ~LAN743X_CSR_FLAG_SUPPORTS_INTR_AUTO_SET_CLR; 129 break; 130 case ID_REV_CHIP_REV_B0_: 131 csr->flags |= LAN743X_CSR_FLAG_IS_B0; 132 break; 133 } 134 135 result = lan743x_csr_light_reset(adapter); 136 if (result) 137 goto clean_up; 138 return 0; 139 clean_up: 140 return result; 141 } 142 143 static void lan743x_intr_software_isr(struct lan743x_adapter *adapter) 144 { 145 struct lan743x_intr *intr = &adapter->intr; 146 147 /* disable the interrupt to prevent repeated re-triggering */ 148 lan743x_csr_write(adapter, INT_EN_CLR, INT_BIT_SW_GP_); 149 intr->software_isr_flag = true; 150 wake_up(&intr->software_isr_wq); 151 } 152 153 static void lan743x_tx_isr(void *context, u32 int_sts, u32 flags) 154 { 155 struct lan743x_tx *tx = context; 156 struct lan743x_adapter *adapter = tx->adapter; 157 bool enable_flag = true; 158 159 lan743x_csr_read(adapter, INT_EN_SET); 160 if (flags & LAN743X_VECTOR_FLAG_SOURCE_ENABLE_CLEAR) { 161 lan743x_csr_write(adapter, INT_EN_CLR, 162 INT_BIT_DMA_TX_(tx->channel_number)); 163 } 164 165 if (int_sts & INT_BIT_DMA_TX_(tx->channel_number)) { 166 u32 ioc_bit = DMAC_INT_BIT_TX_IOC_(tx->channel_number); 167 u32 dmac_int_sts; 168 u32 dmac_int_en; 169 170 if (flags & LAN743X_VECTOR_FLAG_SOURCE_STATUS_READ) 171 dmac_int_sts = lan743x_csr_read(adapter, DMAC_INT_STS); 172 else 173 dmac_int_sts = ioc_bit; 174 if (flags & LAN743X_VECTOR_FLAG_SOURCE_ENABLE_CHECK) 175 dmac_int_en = lan743x_csr_read(adapter, 176 DMAC_INT_EN_SET); 177 else 178 dmac_int_en = ioc_bit; 179 180 dmac_int_en &= ioc_bit; 181 dmac_int_sts &= dmac_int_en; 182 if (dmac_int_sts & ioc_bit) { 183 napi_schedule(&tx->napi); 184 enable_flag = false;/* poll func will enable later */ 185 } 186 } 187 188 if (enable_flag) 189 /* enable isr */ 190 lan743x_csr_write(adapter, INT_EN_SET, 191 INT_BIT_DMA_TX_(tx->channel_number)); 192 } 193 194 static void lan743x_rx_isr(void *context, u32 int_sts, u32 flags) 195 { 196 struct lan743x_rx *rx = context; 197 struct lan743x_adapter *adapter = rx->adapter; 198 bool enable_flag = true; 199 200 if (flags & LAN743X_VECTOR_FLAG_SOURCE_ENABLE_CLEAR) { 201 lan743x_csr_write(adapter, INT_EN_CLR, 202 INT_BIT_DMA_RX_(rx->channel_number)); 203 } 204 205 if (int_sts & INT_BIT_DMA_RX_(rx->channel_number)) { 206 u32 rx_frame_bit = DMAC_INT_BIT_RXFRM_(rx->channel_number); 207 u32 dmac_int_sts; 208 u32 dmac_int_en; 209 210 if (flags & LAN743X_VECTOR_FLAG_SOURCE_STATUS_READ) 211 dmac_int_sts = lan743x_csr_read(adapter, DMAC_INT_STS); 212 else 213 dmac_int_sts = rx_frame_bit; 214 if (flags & LAN743X_VECTOR_FLAG_SOURCE_ENABLE_CHECK) 215 dmac_int_en = lan743x_csr_read(adapter, 216 DMAC_INT_EN_SET); 217 else 218 dmac_int_en = rx_frame_bit; 219 220 dmac_int_en &= rx_frame_bit; 221 dmac_int_sts &= dmac_int_en; 222 if (dmac_int_sts & rx_frame_bit) { 223 napi_schedule(&rx->napi); 224 enable_flag = false;/* poll funct will enable later */ 225 } 226 } 227 228 if (enable_flag) { 229 /* enable isr */ 230 lan743x_csr_write(adapter, INT_EN_SET, 231 INT_BIT_DMA_RX_(rx->channel_number)); 232 } 233 } 234 235 static void lan743x_intr_shared_isr(void *context, u32 int_sts, u32 flags) 236 { 237 struct lan743x_adapter *adapter = context; 238 unsigned int channel; 239 240 if (int_sts & INT_BIT_ALL_RX_) { 241 for (channel = 0; channel < LAN743X_USED_RX_CHANNELS; 242 channel++) { 243 u32 int_bit = INT_BIT_DMA_RX_(channel); 244 245 if (int_sts & int_bit) { 246 lan743x_rx_isr(&adapter->rx[channel], 247 int_bit, flags); 248 int_sts &= ~int_bit; 249 } 250 } 251 } 252 if (int_sts & INT_BIT_ALL_TX_) { 253 for (channel = 0; channel < LAN743X_USED_TX_CHANNELS; 254 channel++) { 255 u32 int_bit = INT_BIT_DMA_TX_(channel); 256 257 if (int_sts & int_bit) { 258 lan743x_tx_isr(&adapter->tx[channel], 259 int_bit, flags); 260 int_sts &= ~int_bit; 261 } 262 } 263 } 264 if (int_sts & INT_BIT_ALL_OTHER_) { 265 if (int_sts & INT_BIT_SW_GP_) { 266 lan743x_intr_software_isr(adapter); 267 int_sts &= ~INT_BIT_SW_GP_; 268 } 269 if (int_sts & INT_BIT_1588_) { 270 lan743x_ptp_isr(adapter); 271 int_sts &= ~INT_BIT_1588_; 272 } 273 } 274 if (int_sts) 275 lan743x_csr_write(adapter, INT_EN_CLR, int_sts); 276 } 277 278 static irqreturn_t lan743x_intr_entry_isr(int irq, void *ptr) 279 { 280 struct lan743x_vector *vector = ptr; 281 struct lan743x_adapter *adapter = vector->adapter; 282 irqreturn_t result = IRQ_NONE; 283 u32 int_enables; 284 u32 int_sts; 285 286 if (vector->flags & LAN743X_VECTOR_FLAG_SOURCE_STATUS_READ) { 287 int_sts = lan743x_csr_read(adapter, INT_STS); 288 } else if (vector->flags & 289 (LAN743X_VECTOR_FLAG_SOURCE_STATUS_R2C | 290 LAN743X_VECTOR_FLAG_SOURCE_ENABLE_R2C)) { 291 int_sts = lan743x_csr_read(adapter, INT_STS_R2C); 292 } else { 293 /* use mask as implied status */ 294 int_sts = vector->int_mask | INT_BIT_MAS_; 295 } 296 297 if (!(int_sts & INT_BIT_MAS_)) 298 goto irq_done; 299 300 if (vector->flags & LAN743X_VECTOR_FLAG_VECTOR_ENABLE_ISR_CLEAR) 301 /* disable vector interrupt */ 302 lan743x_csr_write(adapter, 303 INT_VEC_EN_CLR, 304 INT_VEC_EN_(vector->vector_index)); 305 306 if (vector->flags & LAN743X_VECTOR_FLAG_MASTER_ENABLE_CLEAR) 307 /* disable master interrupt */ 308 lan743x_csr_write(adapter, INT_EN_CLR, INT_BIT_MAS_); 309 310 if (vector->flags & LAN743X_VECTOR_FLAG_SOURCE_ENABLE_CHECK) { 311 int_enables = lan743x_csr_read(adapter, INT_EN_SET); 312 } else { 313 /* use vector mask as implied enable mask */ 314 int_enables = vector->int_mask; 315 } 316 317 int_sts &= int_enables; 318 int_sts &= vector->int_mask; 319 if (int_sts) { 320 if (vector->handler) { 321 vector->handler(vector->context, 322 int_sts, vector->flags); 323 } else { 324 /* disable interrupts on this vector */ 325 lan743x_csr_write(adapter, INT_EN_CLR, 326 vector->int_mask); 327 } 328 result = IRQ_HANDLED; 329 } 330 331 if (vector->flags & LAN743X_VECTOR_FLAG_MASTER_ENABLE_SET) 332 /* enable master interrupt */ 333 lan743x_csr_write(adapter, INT_EN_SET, INT_BIT_MAS_); 334 335 if (vector->flags & LAN743X_VECTOR_FLAG_VECTOR_ENABLE_ISR_SET) 336 /* enable vector interrupt */ 337 lan743x_csr_write(adapter, 338 INT_VEC_EN_SET, 339 INT_VEC_EN_(vector->vector_index)); 340 irq_done: 341 return result; 342 } 343 344 static int lan743x_intr_test_isr(struct lan743x_adapter *adapter) 345 { 346 struct lan743x_intr *intr = &adapter->intr; 347 int ret; 348 349 intr->software_isr_flag = false; 350 351 /* enable and activate test interrupt */ 352 lan743x_csr_write(adapter, INT_EN_SET, INT_BIT_SW_GP_); 353 lan743x_csr_write(adapter, INT_SET, INT_BIT_SW_GP_); 354 355 ret = wait_event_timeout(intr->software_isr_wq, 356 intr->software_isr_flag, 357 msecs_to_jiffies(200)); 358 359 /* disable test interrupt */ 360 lan743x_csr_write(adapter, INT_EN_CLR, INT_BIT_SW_GP_); 361 362 return ret > 0 ? 0 : -ENODEV; 363 } 364 365 static int lan743x_intr_register_isr(struct lan743x_adapter *adapter, 366 int vector_index, u32 flags, 367 u32 int_mask, 368 lan743x_vector_handler handler, 369 void *context) 370 { 371 struct lan743x_vector *vector = &adapter->intr.vector_list 372 [vector_index]; 373 int ret; 374 375 vector->adapter = adapter; 376 vector->flags = flags; 377 vector->vector_index = vector_index; 378 vector->int_mask = int_mask; 379 vector->handler = handler; 380 vector->context = context; 381 382 ret = request_irq(vector->irq, 383 lan743x_intr_entry_isr, 384 (flags & LAN743X_VECTOR_FLAG_IRQ_SHARED) ? 385 IRQF_SHARED : 0, DRIVER_NAME, vector); 386 if (ret) { 387 vector->handler = NULL; 388 vector->context = NULL; 389 vector->int_mask = 0; 390 vector->flags = 0; 391 } 392 return ret; 393 } 394 395 static void lan743x_intr_unregister_isr(struct lan743x_adapter *adapter, 396 int vector_index) 397 { 398 struct lan743x_vector *vector = &adapter->intr.vector_list 399 [vector_index]; 400 401 free_irq(vector->irq, vector); 402 vector->handler = NULL; 403 vector->context = NULL; 404 vector->int_mask = 0; 405 vector->flags = 0; 406 } 407 408 static u32 lan743x_intr_get_vector_flags(struct lan743x_adapter *adapter, 409 u32 int_mask) 410 { 411 int index; 412 413 for (index = 0; index < LAN743X_MAX_VECTOR_COUNT; index++) { 414 if (adapter->intr.vector_list[index].int_mask & int_mask) 415 return adapter->intr.vector_list[index].flags; 416 } 417 return 0; 418 } 419 420 static void lan743x_intr_close(struct lan743x_adapter *adapter) 421 { 422 struct lan743x_intr *intr = &adapter->intr; 423 int index = 0; 424 425 lan743x_csr_write(adapter, INT_EN_CLR, INT_BIT_MAS_); 426 lan743x_csr_write(adapter, INT_VEC_EN_CLR, 0x000000FF); 427 428 for (index = 0; index < LAN743X_MAX_VECTOR_COUNT; index++) { 429 if (intr->flags & INTR_FLAG_IRQ_REQUESTED(index)) { 430 lan743x_intr_unregister_isr(adapter, index); 431 intr->flags &= ~INTR_FLAG_IRQ_REQUESTED(index); 432 } 433 } 434 435 if (intr->flags & INTR_FLAG_MSI_ENABLED) { 436 pci_disable_msi(adapter->pdev); 437 intr->flags &= ~INTR_FLAG_MSI_ENABLED; 438 } 439 440 if (intr->flags & INTR_FLAG_MSIX_ENABLED) { 441 pci_disable_msix(adapter->pdev); 442 intr->flags &= ~INTR_FLAG_MSIX_ENABLED; 443 } 444 } 445 446 static int lan743x_intr_open(struct lan743x_adapter *adapter) 447 { 448 struct msix_entry msix_entries[LAN743X_MAX_VECTOR_COUNT]; 449 struct lan743x_intr *intr = &adapter->intr; 450 u32 int_vec_en_auto_clr = 0; 451 u32 int_vec_map0 = 0; 452 u32 int_vec_map1 = 0; 453 int ret = -ENODEV; 454 int index = 0; 455 u32 flags = 0; 456 457 intr->number_of_vectors = 0; 458 459 /* Try to set up MSIX interrupts */ 460 memset(&msix_entries[0], 0, 461 sizeof(struct msix_entry) * LAN743X_MAX_VECTOR_COUNT); 462 for (index = 0; index < LAN743X_MAX_VECTOR_COUNT; index++) 463 msix_entries[index].entry = index; 464 ret = pci_enable_msix_range(adapter->pdev, 465 msix_entries, 1, 466 1 + LAN743X_USED_TX_CHANNELS + 467 LAN743X_USED_RX_CHANNELS); 468 469 if (ret > 0) { 470 intr->flags |= INTR_FLAG_MSIX_ENABLED; 471 intr->number_of_vectors = ret; 472 intr->using_vectors = true; 473 for (index = 0; index < intr->number_of_vectors; index++) 474 intr->vector_list[index].irq = msix_entries 475 [index].vector; 476 netif_info(adapter, ifup, adapter->netdev, 477 "using MSIX interrupts, number of vectors = %d\n", 478 intr->number_of_vectors); 479 } 480 481 /* If MSIX failed try to setup using MSI interrupts */ 482 if (!intr->number_of_vectors) { 483 if (!(adapter->csr.flags & LAN743X_CSR_FLAG_IS_A0)) { 484 if (!pci_enable_msi(adapter->pdev)) { 485 intr->flags |= INTR_FLAG_MSI_ENABLED; 486 intr->number_of_vectors = 1; 487 intr->using_vectors = true; 488 intr->vector_list[0].irq = 489 adapter->pdev->irq; 490 netif_info(adapter, ifup, adapter->netdev, 491 "using MSI interrupts, number of vectors = %d\n", 492 intr->number_of_vectors); 493 } 494 } 495 } 496 497 /* If MSIX, and MSI failed, setup using legacy interrupt */ 498 if (!intr->number_of_vectors) { 499 intr->number_of_vectors = 1; 500 intr->using_vectors = false; 501 intr->vector_list[0].irq = intr->irq; 502 netif_info(adapter, ifup, adapter->netdev, 503 "using legacy interrupts\n"); 504 } 505 506 /* At this point we must have at least one irq */ 507 lan743x_csr_write(adapter, INT_VEC_EN_CLR, 0xFFFFFFFF); 508 509 /* map all interrupts to vector 0 */ 510 lan743x_csr_write(adapter, INT_VEC_MAP0, 0x00000000); 511 lan743x_csr_write(adapter, INT_VEC_MAP1, 0x00000000); 512 lan743x_csr_write(adapter, INT_VEC_MAP2, 0x00000000); 513 flags = LAN743X_VECTOR_FLAG_SOURCE_STATUS_READ | 514 LAN743X_VECTOR_FLAG_SOURCE_STATUS_W2C | 515 LAN743X_VECTOR_FLAG_SOURCE_ENABLE_CHECK | 516 LAN743X_VECTOR_FLAG_SOURCE_ENABLE_CLEAR; 517 518 if (intr->using_vectors) { 519 flags |= LAN743X_VECTOR_FLAG_VECTOR_ENABLE_ISR_CLEAR | 520 LAN743X_VECTOR_FLAG_VECTOR_ENABLE_ISR_SET; 521 } else { 522 flags |= LAN743X_VECTOR_FLAG_MASTER_ENABLE_CLEAR | 523 LAN743X_VECTOR_FLAG_MASTER_ENABLE_SET | 524 LAN743X_VECTOR_FLAG_IRQ_SHARED; 525 } 526 527 if (adapter->csr.flags & LAN743X_CSR_FLAG_SUPPORTS_INTR_AUTO_SET_CLR) { 528 flags &= ~LAN743X_VECTOR_FLAG_SOURCE_STATUS_READ; 529 flags &= ~LAN743X_VECTOR_FLAG_SOURCE_STATUS_W2C; 530 flags &= ~LAN743X_VECTOR_FLAG_SOURCE_ENABLE_CLEAR; 531 flags &= ~LAN743X_VECTOR_FLAG_SOURCE_ENABLE_CHECK; 532 flags |= LAN743X_VECTOR_FLAG_SOURCE_STATUS_R2C; 533 flags |= LAN743X_VECTOR_FLAG_SOURCE_ENABLE_R2C; 534 } 535 536 init_waitqueue_head(&intr->software_isr_wq); 537 538 ret = lan743x_intr_register_isr(adapter, 0, flags, 539 INT_BIT_ALL_RX_ | INT_BIT_ALL_TX_ | 540 INT_BIT_ALL_OTHER_, 541 lan743x_intr_shared_isr, adapter); 542 if (ret) 543 goto clean_up; 544 intr->flags |= INTR_FLAG_IRQ_REQUESTED(0); 545 546 if (intr->using_vectors) 547 lan743x_csr_write(adapter, INT_VEC_EN_SET, 548 INT_VEC_EN_(0)); 549 550 if (!(adapter->csr.flags & LAN743X_CSR_FLAG_IS_A0)) { 551 lan743x_csr_write(adapter, INT_MOD_CFG0, LAN743X_INT_MOD); 552 lan743x_csr_write(adapter, INT_MOD_CFG1, LAN743X_INT_MOD); 553 lan743x_csr_write(adapter, INT_MOD_CFG2, LAN743X_INT_MOD); 554 lan743x_csr_write(adapter, INT_MOD_CFG3, LAN743X_INT_MOD); 555 lan743x_csr_write(adapter, INT_MOD_CFG4, LAN743X_INT_MOD); 556 lan743x_csr_write(adapter, INT_MOD_CFG5, LAN743X_INT_MOD); 557 lan743x_csr_write(adapter, INT_MOD_CFG6, LAN743X_INT_MOD); 558 lan743x_csr_write(adapter, INT_MOD_CFG7, LAN743X_INT_MOD); 559 lan743x_csr_write(adapter, INT_MOD_MAP0, 0x00005432); 560 lan743x_csr_write(adapter, INT_MOD_MAP1, 0x00000001); 561 lan743x_csr_write(adapter, INT_MOD_MAP2, 0x00FFFFFF); 562 } 563 564 /* enable interrupts */ 565 lan743x_csr_write(adapter, INT_EN_SET, INT_BIT_MAS_); 566 ret = lan743x_intr_test_isr(adapter); 567 if (ret) 568 goto clean_up; 569 570 if (intr->number_of_vectors > 1) { 571 int number_of_tx_vectors = intr->number_of_vectors - 1; 572 573 if (number_of_tx_vectors > LAN743X_USED_TX_CHANNELS) 574 number_of_tx_vectors = LAN743X_USED_TX_CHANNELS; 575 flags = LAN743X_VECTOR_FLAG_SOURCE_STATUS_READ | 576 LAN743X_VECTOR_FLAG_SOURCE_STATUS_W2C | 577 LAN743X_VECTOR_FLAG_SOURCE_ENABLE_CHECK | 578 LAN743X_VECTOR_FLAG_SOURCE_ENABLE_CLEAR | 579 LAN743X_VECTOR_FLAG_VECTOR_ENABLE_ISR_CLEAR | 580 LAN743X_VECTOR_FLAG_VECTOR_ENABLE_ISR_SET; 581 582 if (adapter->csr.flags & 583 LAN743X_CSR_FLAG_SUPPORTS_INTR_AUTO_SET_CLR) { 584 flags = LAN743X_VECTOR_FLAG_VECTOR_ENABLE_AUTO_SET | 585 LAN743X_VECTOR_FLAG_SOURCE_ENABLE_AUTO_SET | 586 LAN743X_VECTOR_FLAG_SOURCE_ENABLE_AUTO_CLEAR | 587 LAN743X_VECTOR_FLAG_SOURCE_STATUS_AUTO_CLEAR; 588 } 589 590 for (index = 0; index < number_of_tx_vectors; index++) { 591 u32 int_bit = INT_BIT_DMA_TX_(index); 592 int vector = index + 1; 593 594 /* map TX interrupt to vector */ 595 int_vec_map1 |= INT_VEC_MAP1_TX_VEC_(index, vector); 596 lan743x_csr_write(adapter, INT_VEC_MAP1, int_vec_map1); 597 598 /* Remove TX interrupt from shared mask */ 599 intr->vector_list[0].int_mask &= ~int_bit; 600 ret = lan743x_intr_register_isr(adapter, vector, flags, 601 int_bit, lan743x_tx_isr, 602 &adapter->tx[index]); 603 if (ret) 604 goto clean_up; 605 intr->flags |= INTR_FLAG_IRQ_REQUESTED(vector); 606 if (!(flags & 607 LAN743X_VECTOR_FLAG_VECTOR_ENABLE_AUTO_SET)) 608 lan743x_csr_write(adapter, INT_VEC_EN_SET, 609 INT_VEC_EN_(vector)); 610 } 611 } 612 if ((intr->number_of_vectors - LAN743X_USED_TX_CHANNELS) > 1) { 613 int number_of_rx_vectors = intr->number_of_vectors - 614 LAN743X_USED_TX_CHANNELS - 1; 615 616 if (number_of_rx_vectors > LAN743X_USED_RX_CHANNELS) 617 number_of_rx_vectors = LAN743X_USED_RX_CHANNELS; 618 619 flags = LAN743X_VECTOR_FLAG_SOURCE_STATUS_READ | 620 LAN743X_VECTOR_FLAG_SOURCE_STATUS_W2C | 621 LAN743X_VECTOR_FLAG_SOURCE_ENABLE_CHECK | 622 LAN743X_VECTOR_FLAG_SOURCE_ENABLE_CLEAR | 623 LAN743X_VECTOR_FLAG_VECTOR_ENABLE_ISR_CLEAR | 624 LAN743X_VECTOR_FLAG_VECTOR_ENABLE_ISR_SET; 625 626 if (adapter->csr.flags & 627 LAN743X_CSR_FLAG_SUPPORTS_INTR_AUTO_SET_CLR) { 628 flags = LAN743X_VECTOR_FLAG_VECTOR_ENABLE_AUTO_CLEAR | 629 LAN743X_VECTOR_FLAG_VECTOR_ENABLE_AUTO_SET | 630 LAN743X_VECTOR_FLAG_SOURCE_ENABLE_AUTO_SET | 631 LAN743X_VECTOR_FLAG_SOURCE_ENABLE_AUTO_CLEAR | 632 LAN743X_VECTOR_FLAG_SOURCE_STATUS_AUTO_CLEAR; 633 } 634 for (index = 0; index < number_of_rx_vectors; index++) { 635 int vector = index + 1 + LAN743X_USED_TX_CHANNELS; 636 u32 int_bit = INT_BIT_DMA_RX_(index); 637 638 /* map RX interrupt to vector */ 639 int_vec_map0 |= INT_VEC_MAP0_RX_VEC_(index, vector); 640 lan743x_csr_write(adapter, INT_VEC_MAP0, int_vec_map0); 641 if (flags & 642 LAN743X_VECTOR_FLAG_VECTOR_ENABLE_AUTO_CLEAR) { 643 int_vec_en_auto_clr |= INT_VEC_EN_(vector); 644 lan743x_csr_write(adapter, INT_VEC_EN_AUTO_CLR, 645 int_vec_en_auto_clr); 646 } 647 648 /* Remove RX interrupt from shared mask */ 649 intr->vector_list[0].int_mask &= ~int_bit; 650 ret = lan743x_intr_register_isr(adapter, vector, flags, 651 int_bit, lan743x_rx_isr, 652 &adapter->rx[index]); 653 if (ret) 654 goto clean_up; 655 intr->flags |= INTR_FLAG_IRQ_REQUESTED(vector); 656 657 lan743x_csr_write(adapter, INT_VEC_EN_SET, 658 INT_VEC_EN_(vector)); 659 } 660 } 661 return 0; 662 663 clean_up: 664 lan743x_intr_close(adapter); 665 return ret; 666 } 667 668 static int lan743x_dp_write(struct lan743x_adapter *adapter, 669 u32 select, u32 addr, u32 length, u32 *buf) 670 { 671 u32 dp_sel; 672 int i; 673 674 if (lan743x_csr_wait_for_bit(adapter, DP_SEL, DP_SEL_DPRDY_, 675 1, 40, 100, 100)) 676 return -EIO; 677 dp_sel = lan743x_csr_read(adapter, DP_SEL); 678 dp_sel &= ~DP_SEL_MASK_; 679 dp_sel |= select; 680 lan743x_csr_write(adapter, DP_SEL, dp_sel); 681 682 for (i = 0; i < length; i++) { 683 lan743x_csr_write(adapter, DP_ADDR, addr + i); 684 lan743x_csr_write(adapter, DP_DATA_0, buf[i]); 685 lan743x_csr_write(adapter, DP_CMD, DP_CMD_WRITE_); 686 if (lan743x_csr_wait_for_bit(adapter, DP_SEL, DP_SEL_DPRDY_, 687 1, 40, 100, 100)) 688 return -EIO; 689 } 690 691 return 0; 692 } 693 694 static u32 lan743x_mac_mii_access(u16 id, u16 index, int read) 695 { 696 u32 ret; 697 698 ret = (id << MAC_MII_ACC_PHY_ADDR_SHIFT_) & 699 MAC_MII_ACC_PHY_ADDR_MASK_; 700 ret |= (index << MAC_MII_ACC_MIIRINDA_SHIFT_) & 701 MAC_MII_ACC_MIIRINDA_MASK_; 702 703 if (read) 704 ret |= MAC_MII_ACC_MII_READ_; 705 else 706 ret |= MAC_MII_ACC_MII_WRITE_; 707 ret |= MAC_MII_ACC_MII_BUSY_; 708 709 return ret; 710 } 711 712 static int lan743x_mac_mii_wait_till_not_busy(struct lan743x_adapter *adapter) 713 { 714 u32 data; 715 716 return readx_poll_timeout(LAN743X_CSR_READ_OP, MAC_MII_ACC, data, 717 !(data & MAC_MII_ACC_MII_BUSY_), 0, 1000000); 718 } 719 720 static int lan743x_mdiobus_read(struct mii_bus *bus, int phy_id, int index) 721 { 722 struct lan743x_adapter *adapter = bus->priv; 723 u32 val, mii_access; 724 int ret; 725 726 /* comfirm MII not busy */ 727 ret = lan743x_mac_mii_wait_till_not_busy(adapter); 728 if (ret < 0) 729 return ret; 730 731 /* set the address, index & direction (read from PHY) */ 732 mii_access = lan743x_mac_mii_access(phy_id, index, MAC_MII_READ); 733 lan743x_csr_write(adapter, MAC_MII_ACC, mii_access); 734 ret = lan743x_mac_mii_wait_till_not_busy(adapter); 735 if (ret < 0) 736 return ret; 737 738 val = lan743x_csr_read(adapter, MAC_MII_DATA); 739 return (int)(val & 0xFFFF); 740 } 741 742 static int lan743x_mdiobus_write(struct mii_bus *bus, 743 int phy_id, int index, u16 regval) 744 { 745 struct lan743x_adapter *adapter = bus->priv; 746 u32 val, mii_access; 747 int ret; 748 749 /* confirm MII not busy */ 750 ret = lan743x_mac_mii_wait_till_not_busy(adapter); 751 if (ret < 0) 752 return ret; 753 val = (u32)regval; 754 lan743x_csr_write(adapter, MAC_MII_DATA, val); 755 756 /* set the address, index & direction (write to PHY) */ 757 mii_access = lan743x_mac_mii_access(phy_id, index, MAC_MII_WRITE); 758 lan743x_csr_write(adapter, MAC_MII_ACC, mii_access); 759 ret = lan743x_mac_mii_wait_till_not_busy(adapter); 760 return ret; 761 } 762 763 static void lan743x_mac_set_address(struct lan743x_adapter *adapter, 764 u8 *addr) 765 { 766 u32 addr_lo, addr_hi; 767 768 addr_lo = addr[0] | 769 addr[1] << 8 | 770 addr[2] << 16 | 771 addr[3] << 24; 772 addr_hi = addr[4] | 773 addr[5] << 8; 774 lan743x_csr_write(adapter, MAC_RX_ADDRL, addr_lo); 775 lan743x_csr_write(adapter, MAC_RX_ADDRH, addr_hi); 776 777 ether_addr_copy(adapter->mac_address, addr); 778 netif_info(adapter, drv, adapter->netdev, 779 "MAC address set to %pM\n", addr); 780 } 781 782 static int lan743x_mac_init(struct lan743x_adapter *adapter) 783 { 784 bool mac_address_valid = true; 785 struct net_device *netdev; 786 u32 mac_addr_hi = 0; 787 u32 mac_addr_lo = 0; 788 u32 data; 789 790 netdev = adapter->netdev; 791 792 /* disable auto duplex, and speed detection. Phylib does that */ 793 data = lan743x_csr_read(adapter, MAC_CR); 794 data &= ~(MAC_CR_ADD_ | MAC_CR_ASD_); 795 data |= MAC_CR_CNTR_RST_; 796 lan743x_csr_write(adapter, MAC_CR, data); 797 798 if (!is_valid_ether_addr(adapter->mac_address)) { 799 mac_addr_hi = lan743x_csr_read(adapter, MAC_RX_ADDRH); 800 mac_addr_lo = lan743x_csr_read(adapter, MAC_RX_ADDRL); 801 adapter->mac_address[0] = mac_addr_lo & 0xFF; 802 adapter->mac_address[1] = (mac_addr_lo >> 8) & 0xFF; 803 adapter->mac_address[2] = (mac_addr_lo >> 16) & 0xFF; 804 adapter->mac_address[3] = (mac_addr_lo >> 24) & 0xFF; 805 adapter->mac_address[4] = mac_addr_hi & 0xFF; 806 adapter->mac_address[5] = (mac_addr_hi >> 8) & 0xFF; 807 808 if (((mac_addr_hi & 0x0000FFFF) == 0x0000FFFF) && 809 mac_addr_lo == 0xFFFFFFFF) { 810 mac_address_valid = false; 811 } else if (!is_valid_ether_addr(adapter->mac_address)) { 812 mac_address_valid = false; 813 } 814 815 if (!mac_address_valid) 816 eth_random_addr(adapter->mac_address); 817 } 818 lan743x_mac_set_address(adapter, adapter->mac_address); 819 eth_hw_addr_set(netdev, adapter->mac_address); 820 821 return 0; 822 } 823 824 static int lan743x_mac_open(struct lan743x_adapter *adapter) 825 { 826 u32 temp; 827 828 temp = lan743x_csr_read(adapter, MAC_RX); 829 lan743x_csr_write(adapter, MAC_RX, temp | MAC_RX_RXEN_); 830 temp = lan743x_csr_read(adapter, MAC_TX); 831 lan743x_csr_write(adapter, MAC_TX, temp | MAC_TX_TXEN_); 832 return 0; 833 } 834 835 static void lan743x_mac_close(struct lan743x_adapter *adapter) 836 { 837 u32 temp; 838 839 temp = lan743x_csr_read(adapter, MAC_TX); 840 temp &= ~MAC_TX_TXEN_; 841 lan743x_csr_write(adapter, MAC_TX, temp); 842 lan743x_csr_wait_for_bit(adapter, MAC_TX, MAC_TX_TXD_, 843 1, 1000, 20000, 100); 844 845 temp = lan743x_csr_read(adapter, MAC_RX); 846 temp &= ~MAC_RX_RXEN_; 847 lan743x_csr_write(adapter, MAC_RX, temp); 848 lan743x_csr_wait_for_bit(adapter, MAC_RX, MAC_RX_RXD_, 849 1, 1000, 20000, 100); 850 } 851 852 static void lan743x_mac_flow_ctrl_set_enables(struct lan743x_adapter *adapter, 853 bool tx_enable, bool rx_enable) 854 { 855 u32 flow_setting = 0; 856 857 /* set maximum pause time because when fifo space frees 858 * up a zero value pause frame will be sent to release the pause 859 */ 860 flow_setting = MAC_FLOW_CR_FCPT_MASK_; 861 if (tx_enable) 862 flow_setting |= MAC_FLOW_CR_TX_FCEN_; 863 if (rx_enable) 864 flow_setting |= MAC_FLOW_CR_RX_FCEN_; 865 lan743x_csr_write(adapter, MAC_FLOW, flow_setting); 866 } 867 868 static int lan743x_mac_set_mtu(struct lan743x_adapter *adapter, int new_mtu) 869 { 870 int enabled = 0; 871 u32 mac_rx = 0; 872 873 mac_rx = lan743x_csr_read(adapter, MAC_RX); 874 if (mac_rx & MAC_RX_RXEN_) { 875 enabled = 1; 876 if (mac_rx & MAC_RX_RXD_) { 877 lan743x_csr_write(adapter, MAC_RX, mac_rx); 878 mac_rx &= ~MAC_RX_RXD_; 879 } 880 mac_rx &= ~MAC_RX_RXEN_; 881 lan743x_csr_write(adapter, MAC_RX, mac_rx); 882 lan743x_csr_wait_for_bit(adapter, MAC_RX, MAC_RX_RXD_, 883 1, 1000, 20000, 100); 884 lan743x_csr_write(adapter, MAC_RX, mac_rx | MAC_RX_RXD_); 885 } 886 887 mac_rx &= ~(MAC_RX_MAX_SIZE_MASK_); 888 mac_rx |= (((new_mtu + ETH_HLEN + ETH_FCS_LEN) 889 << MAC_RX_MAX_SIZE_SHIFT_) & MAC_RX_MAX_SIZE_MASK_); 890 lan743x_csr_write(adapter, MAC_RX, mac_rx); 891 892 if (enabled) { 893 mac_rx |= MAC_RX_RXEN_; 894 lan743x_csr_write(adapter, MAC_RX, mac_rx); 895 } 896 return 0; 897 } 898 899 /* PHY */ 900 static int lan743x_phy_reset(struct lan743x_adapter *adapter) 901 { 902 u32 data; 903 904 /* Only called with in probe, and before mdiobus_register */ 905 906 data = lan743x_csr_read(adapter, PMT_CTL); 907 data |= PMT_CTL_ETH_PHY_RST_; 908 lan743x_csr_write(adapter, PMT_CTL, data); 909 910 return readx_poll_timeout(LAN743X_CSR_READ_OP, PMT_CTL, data, 911 (!(data & PMT_CTL_ETH_PHY_RST_) && 912 (data & PMT_CTL_READY_)), 913 50000, 1000000); 914 } 915 916 static void lan743x_phy_update_flowcontrol(struct lan743x_adapter *adapter, 917 u16 local_adv, u16 remote_adv) 918 { 919 struct lan743x_phy *phy = &adapter->phy; 920 u8 cap; 921 922 if (phy->fc_autoneg) 923 cap = mii_resolve_flowctrl_fdx(local_adv, remote_adv); 924 else 925 cap = phy->fc_request_control; 926 927 lan743x_mac_flow_ctrl_set_enables(adapter, 928 cap & FLOW_CTRL_TX, 929 cap & FLOW_CTRL_RX); 930 } 931 932 static int lan743x_phy_init(struct lan743x_adapter *adapter) 933 { 934 return lan743x_phy_reset(adapter); 935 } 936 937 static void lan743x_phy_link_status_change(struct net_device *netdev) 938 { 939 struct lan743x_adapter *adapter = netdev_priv(netdev); 940 struct phy_device *phydev = netdev->phydev; 941 u32 data; 942 943 phy_print_status(phydev); 944 if (phydev->state == PHY_RUNNING) { 945 int remote_advertisement = 0; 946 int local_advertisement = 0; 947 948 data = lan743x_csr_read(adapter, MAC_CR); 949 950 /* set interface mode */ 951 if (phy_interface_is_rgmii(phydev)) 952 /* RGMII */ 953 data &= ~MAC_CR_MII_EN_; 954 else 955 /* GMII */ 956 data |= MAC_CR_MII_EN_; 957 958 /* set duplex mode */ 959 if (phydev->duplex) 960 data |= MAC_CR_DPX_; 961 else 962 data &= ~MAC_CR_DPX_; 963 964 /* set bus speed */ 965 switch (phydev->speed) { 966 case SPEED_10: 967 data &= ~MAC_CR_CFG_H_; 968 data &= ~MAC_CR_CFG_L_; 969 break; 970 case SPEED_100: 971 data &= ~MAC_CR_CFG_H_; 972 data |= MAC_CR_CFG_L_; 973 break; 974 case SPEED_1000: 975 data |= MAC_CR_CFG_H_; 976 data &= ~MAC_CR_CFG_L_; 977 break; 978 } 979 lan743x_csr_write(adapter, MAC_CR, data); 980 981 local_advertisement = 982 linkmode_adv_to_mii_adv_t(phydev->advertising); 983 remote_advertisement = 984 linkmode_adv_to_mii_adv_t(phydev->lp_advertising); 985 986 lan743x_phy_update_flowcontrol(adapter, local_advertisement, 987 remote_advertisement); 988 lan743x_ptp_update_latency(adapter, phydev->speed); 989 } 990 } 991 992 static void lan743x_phy_close(struct lan743x_adapter *adapter) 993 { 994 struct net_device *netdev = adapter->netdev; 995 996 phy_stop(netdev->phydev); 997 phy_disconnect(netdev->phydev); 998 netdev->phydev = NULL; 999 } 1000 1001 static int lan743x_phy_open(struct lan743x_adapter *adapter) 1002 { 1003 struct net_device *netdev = adapter->netdev; 1004 struct lan743x_phy *phy = &adapter->phy; 1005 struct phy_device *phydev; 1006 int ret = -EIO; 1007 1008 /* try devicetree phy, or fixed link */ 1009 phydev = of_phy_get_and_connect(netdev, adapter->pdev->dev.of_node, 1010 lan743x_phy_link_status_change); 1011 1012 if (!phydev) { 1013 /* try internal phy */ 1014 phydev = phy_find_first(adapter->mdiobus); 1015 if (!phydev) 1016 goto return_error; 1017 1018 ret = phy_connect_direct(netdev, phydev, 1019 lan743x_phy_link_status_change, 1020 PHY_INTERFACE_MODE_GMII); 1021 if (ret) 1022 goto return_error; 1023 } 1024 1025 /* MAC doesn't support 1000T Half */ 1026 phy_remove_link_mode(phydev, ETHTOOL_LINK_MODE_1000baseT_Half_BIT); 1027 1028 /* support both flow controls */ 1029 phy_support_asym_pause(phydev); 1030 phy->fc_request_control = (FLOW_CTRL_RX | FLOW_CTRL_TX); 1031 phy->fc_autoneg = phydev->autoneg; 1032 1033 phy_start(phydev); 1034 phy_start_aneg(phydev); 1035 phy_attached_info(phydev); 1036 return 0; 1037 1038 return_error: 1039 return ret; 1040 } 1041 1042 static void lan743x_rfe_open(struct lan743x_adapter *adapter) 1043 { 1044 lan743x_csr_write(adapter, RFE_RSS_CFG, 1045 RFE_RSS_CFG_UDP_IPV6_EX_ | 1046 RFE_RSS_CFG_TCP_IPV6_EX_ | 1047 RFE_RSS_CFG_IPV6_EX_ | 1048 RFE_RSS_CFG_UDP_IPV6_ | 1049 RFE_RSS_CFG_TCP_IPV6_ | 1050 RFE_RSS_CFG_IPV6_ | 1051 RFE_RSS_CFG_UDP_IPV4_ | 1052 RFE_RSS_CFG_TCP_IPV4_ | 1053 RFE_RSS_CFG_IPV4_ | 1054 RFE_RSS_CFG_VALID_HASH_BITS_ | 1055 RFE_RSS_CFG_RSS_QUEUE_ENABLE_ | 1056 RFE_RSS_CFG_RSS_HASH_STORE_ | 1057 RFE_RSS_CFG_RSS_ENABLE_); 1058 } 1059 1060 static void lan743x_rfe_update_mac_address(struct lan743x_adapter *adapter) 1061 { 1062 u8 *mac_addr; 1063 u32 mac_addr_hi = 0; 1064 u32 mac_addr_lo = 0; 1065 1066 /* Add mac address to perfect Filter */ 1067 mac_addr = adapter->mac_address; 1068 mac_addr_lo = ((((u32)(mac_addr[0])) << 0) | 1069 (((u32)(mac_addr[1])) << 8) | 1070 (((u32)(mac_addr[2])) << 16) | 1071 (((u32)(mac_addr[3])) << 24)); 1072 mac_addr_hi = ((((u32)(mac_addr[4])) << 0) | 1073 (((u32)(mac_addr[5])) << 8)); 1074 1075 lan743x_csr_write(adapter, RFE_ADDR_FILT_LO(0), mac_addr_lo); 1076 lan743x_csr_write(adapter, RFE_ADDR_FILT_HI(0), 1077 mac_addr_hi | RFE_ADDR_FILT_HI_VALID_); 1078 } 1079 1080 static void lan743x_rfe_set_multicast(struct lan743x_adapter *adapter) 1081 { 1082 struct net_device *netdev = adapter->netdev; 1083 u32 hash_table[DP_SEL_VHF_HASH_LEN]; 1084 u32 rfctl; 1085 u32 data; 1086 1087 rfctl = lan743x_csr_read(adapter, RFE_CTL); 1088 rfctl &= ~(RFE_CTL_AU_ | RFE_CTL_AM_ | 1089 RFE_CTL_DA_PERFECT_ | RFE_CTL_MCAST_HASH_); 1090 rfctl |= RFE_CTL_AB_; 1091 if (netdev->flags & IFF_PROMISC) { 1092 rfctl |= RFE_CTL_AM_ | RFE_CTL_AU_; 1093 } else { 1094 if (netdev->flags & IFF_ALLMULTI) 1095 rfctl |= RFE_CTL_AM_; 1096 } 1097 1098 memset(hash_table, 0, DP_SEL_VHF_HASH_LEN * sizeof(u32)); 1099 if (netdev_mc_count(netdev)) { 1100 struct netdev_hw_addr *ha; 1101 int i; 1102 1103 rfctl |= RFE_CTL_DA_PERFECT_; 1104 i = 1; 1105 netdev_for_each_mc_addr(ha, netdev) { 1106 /* set first 32 into Perfect Filter */ 1107 if (i < 33) { 1108 lan743x_csr_write(adapter, 1109 RFE_ADDR_FILT_HI(i), 0); 1110 data = ha->addr[3]; 1111 data = ha->addr[2] | (data << 8); 1112 data = ha->addr[1] | (data << 8); 1113 data = ha->addr[0] | (data << 8); 1114 lan743x_csr_write(adapter, 1115 RFE_ADDR_FILT_LO(i), data); 1116 data = ha->addr[5]; 1117 data = ha->addr[4] | (data << 8); 1118 data |= RFE_ADDR_FILT_HI_VALID_; 1119 lan743x_csr_write(adapter, 1120 RFE_ADDR_FILT_HI(i), data); 1121 } else { 1122 u32 bitnum = (ether_crc(ETH_ALEN, ha->addr) >> 1123 23) & 0x1FF; 1124 hash_table[bitnum / 32] |= (1 << (bitnum % 32)); 1125 rfctl |= RFE_CTL_MCAST_HASH_; 1126 } 1127 i++; 1128 } 1129 } 1130 1131 lan743x_dp_write(adapter, DP_SEL_RFE_RAM, 1132 DP_SEL_VHF_VLAN_LEN, 1133 DP_SEL_VHF_HASH_LEN, hash_table); 1134 lan743x_csr_write(adapter, RFE_CTL, rfctl); 1135 } 1136 1137 static int lan743x_dmac_init(struct lan743x_adapter *adapter) 1138 { 1139 u32 data = 0; 1140 1141 lan743x_csr_write(adapter, DMAC_CMD, DMAC_CMD_SWR_); 1142 lan743x_csr_wait_for_bit(adapter, DMAC_CMD, DMAC_CMD_SWR_, 1143 0, 1000, 20000, 100); 1144 switch (DEFAULT_DMA_DESCRIPTOR_SPACING) { 1145 case DMA_DESCRIPTOR_SPACING_16: 1146 data = DMAC_CFG_MAX_DSPACE_16_; 1147 break; 1148 case DMA_DESCRIPTOR_SPACING_32: 1149 data = DMAC_CFG_MAX_DSPACE_32_; 1150 break; 1151 case DMA_DESCRIPTOR_SPACING_64: 1152 data = DMAC_CFG_MAX_DSPACE_64_; 1153 break; 1154 case DMA_DESCRIPTOR_SPACING_128: 1155 data = DMAC_CFG_MAX_DSPACE_128_; 1156 break; 1157 default: 1158 return -EPERM; 1159 } 1160 if (!(adapter->csr.flags & LAN743X_CSR_FLAG_IS_A0)) 1161 data |= DMAC_CFG_COAL_EN_; 1162 data |= DMAC_CFG_CH_ARB_SEL_RX_HIGH_; 1163 data |= DMAC_CFG_MAX_READ_REQ_SET_(6); 1164 lan743x_csr_write(adapter, DMAC_CFG, data); 1165 data = DMAC_COAL_CFG_TIMER_LIMIT_SET_(1); 1166 data |= DMAC_COAL_CFG_TIMER_TX_START_; 1167 data |= DMAC_COAL_CFG_FLUSH_INTS_; 1168 data |= DMAC_COAL_CFG_INT_EXIT_COAL_; 1169 data |= DMAC_COAL_CFG_CSR_EXIT_COAL_; 1170 data |= DMAC_COAL_CFG_TX_THRES_SET_(0x0A); 1171 data |= DMAC_COAL_CFG_RX_THRES_SET_(0x0C); 1172 lan743x_csr_write(adapter, DMAC_COAL_CFG, data); 1173 data = DMAC_OBFF_TX_THRES_SET_(0x08); 1174 data |= DMAC_OBFF_RX_THRES_SET_(0x0A); 1175 lan743x_csr_write(adapter, DMAC_OBFF_CFG, data); 1176 return 0; 1177 } 1178 1179 static int lan743x_dmac_tx_get_state(struct lan743x_adapter *adapter, 1180 int tx_channel) 1181 { 1182 u32 dmac_cmd = 0; 1183 1184 dmac_cmd = lan743x_csr_read(adapter, DMAC_CMD); 1185 return DMAC_CHANNEL_STATE_SET((dmac_cmd & 1186 DMAC_CMD_START_T_(tx_channel)), 1187 (dmac_cmd & 1188 DMAC_CMD_STOP_T_(tx_channel))); 1189 } 1190 1191 static int lan743x_dmac_tx_wait_till_stopped(struct lan743x_adapter *adapter, 1192 int tx_channel) 1193 { 1194 int timeout = 100; 1195 int result = 0; 1196 1197 while (timeout && 1198 ((result = lan743x_dmac_tx_get_state(adapter, tx_channel)) == 1199 DMAC_CHANNEL_STATE_STOP_PENDING)) { 1200 usleep_range(1000, 20000); 1201 timeout--; 1202 } 1203 if (result == DMAC_CHANNEL_STATE_STOP_PENDING) 1204 result = -ENODEV; 1205 return result; 1206 } 1207 1208 static int lan743x_dmac_rx_get_state(struct lan743x_adapter *adapter, 1209 int rx_channel) 1210 { 1211 u32 dmac_cmd = 0; 1212 1213 dmac_cmd = lan743x_csr_read(adapter, DMAC_CMD); 1214 return DMAC_CHANNEL_STATE_SET((dmac_cmd & 1215 DMAC_CMD_START_R_(rx_channel)), 1216 (dmac_cmd & 1217 DMAC_CMD_STOP_R_(rx_channel))); 1218 } 1219 1220 static int lan743x_dmac_rx_wait_till_stopped(struct lan743x_adapter *adapter, 1221 int rx_channel) 1222 { 1223 int timeout = 100; 1224 int result = 0; 1225 1226 while (timeout && 1227 ((result = lan743x_dmac_rx_get_state(adapter, rx_channel)) == 1228 DMAC_CHANNEL_STATE_STOP_PENDING)) { 1229 usleep_range(1000, 20000); 1230 timeout--; 1231 } 1232 if (result == DMAC_CHANNEL_STATE_STOP_PENDING) 1233 result = -ENODEV; 1234 return result; 1235 } 1236 1237 static void lan743x_tx_release_desc(struct lan743x_tx *tx, 1238 int descriptor_index, bool cleanup) 1239 { 1240 struct lan743x_tx_buffer_info *buffer_info = NULL; 1241 struct lan743x_tx_descriptor *descriptor = NULL; 1242 u32 descriptor_type = 0; 1243 bool ignore_sync; 1244 1245 descriptor = &tx->ring_cpu_ptr[descriptor_index]; 1246 buffer_info = &tx->buffer_info[descriptor_index]; 1247 if (!(buffer_info->flags & TX_BUFFER_INFO_FLAG_ACTIVE)) 1248 goto done; 1249 1250 descriptor_type = le32_to_cpu(descriptor->data0) & 1251 TX_DESC_DATA0_DTYPE_MASK_; 1252 if (descriptor_type == TX_DESC_DATA0_DTYPE_DATA_) 1253 goto clean_up_data_descriptor; 1254 else 1255 goto clear_active; 1256 1257 clean_up_data_descriptor: 1258 if (buffer_info->dma_ptr) { 1259 if (buffer_info->flags & 1260 TX_BUFFER_INFO_FLAG_SKB_FRAGMENT) { 1261 dma_unmap_page(&tx->adapter->pdev->dev, 1262 buffer_info->dma_ptr, 1263 buffer_info->buffer_length, 1264 DMA_TO_DEVICE); 1265 } else { 1266 dma_unmap_single(&tx->adapter->pdev->dev, 1267 buffer_info->dma_ptr, 1268 buffer_info->buffer_length, 1269 DMA_TO_DEVICE); 1270 } 1271 buffer_info->dma_ptr = 0; 1272 buffer_info->buffer_length = 0; 1273 } 1274 if (!buffer_info->skb) 1275 goto clear_active; 1276 1277 if (!(buffer_info->flags & TX_BUFFER_INFO_FLAG_TIMESTAMP_REQUESTED)) { 1278 dev_kfree_skb_any(buffer_info->skb); 1279 goto clear_skb; 1280 } 1281 1282 if (cleanup) { 1283 lan743x_ptp_unrequest_tx_timestamp(tx->adapter); 1284 dev_kfree_skb_any(buffer_info->skb); 1285 } else { 1286 ignore_sync = (buffer_info->flags & 1287 TX_BUFFER_INFO_FLAG_IGNORE_SYNC) != 0; 1288 lan743x_ptp_tx_timestamp_skb(tx->adapter, 1289 buffer_info->skb, ignore_sync); 1290 } 1291 1292 clear_skb: 1293 buffer_info->skb = NULL; 1294 1295 clear_active: 1296 buffer_info->flags &= ~TX_BUFFER_INFO_FLAG_ACTIVE; 1297 1298 done: 1299 memset(buffer_info, 0, sizeof(*buffer_info)); 1300 memset(descriptor, 0, sizeof(*descriptor)); 1301 } 1302 1303 static int lan743x_tx_next_index(struct lan743x_tx *tx, int index) 1304 { 1305 return ((++index) % tx->ring_size); 1306 } 1307 1308 static void lan743x_tx_release_completed_descriptors(struct lan743x_tx *tx) 1309 { 1310 while (le32_to_cpu(*tx->head_cpu_ptr) != (tx->last_head)) { 1311 lan743x_tx_release_desc(tx, tx->last_head, false); 1312 tx->last_head = lan743x_tx_next_index(tx, tx->last_head); 1313 } 1314 } 1315 1316 static void lan743x_tx_release_all_descriptors(struct lan743x_tx *tx) 1317 { 1318 u32 original_head = 0; 1319 1320 original_head = tx->last_head; 1321 do { 1322 lan743x_tx_release_desc(tx, tx->last_head, true); 1323 tx->last_head = lan743x_tx_next_index(tx, tx->last_head); 1324 } while (tx->last_head != original_head); 1325 memset(tx->ring_cpu_ptr, 0, 1326 sizeof(*tx->ring_cpu_ptr) * (tx->ring_size)); 1327 memset(tx->buffer_info, 0, 1328 sizeof(*tx->buffer_info) * (tx->ring_size)); 1329 } 1330 1331 static int lan743x_tx_get_desc_cnt(struct lan743x_tx *tx, 1332 struct sk_buff *skb) 1333 { 1334 int result = 1; /* 1 for the main skb buffer */ 1335 int nr_frags = 0; 1336 1337 if (skb_is_gso(skb)) 1338 result++; /* requires an extension descriptor */ 1339 nr_frags = skb_shinfo(skb)->nr_frags; 1340 result += nr_frags; /* 1 for each fragment buffer */ 1341 return result; 1342 } 1343 1344 static int lan743x_tx_get_avail_desc(struct lan743x_tx *tx) 1345 { 1346 int last_head = tx->last_head; 1347 int last_tail = tx->last_tail; 1348 1349 if (last_tail >= last_head) 1350 return tx->ring_size - last_tail + last_head - 1; 1351 else 1352 return last_head - last_tail - 1; 1353 } 1354 1355 void lan743x_tx_set_timestamping_mode(struct lan743x_tx *tx, 1356 bool enable_timestamping, 1357 bool enable_onestep_sync) 1358 { 1359 if (enable_timestamping) 1360 tx->ts_flags |= TX_TS_FLAG_TIMESTAMPING_ENABLED; 1361 else 1362 tx->ts_flags &= ~TX_TS_FLAG_TIMESTAMPING_ENABLED; 1363 if (enable_onestep_sync) 1364 tx->ts_flags |= TX_TS_FLAG_ONE_STEP_SYNC; 1365 else 1366 tx->ts_flags &= ~TX_TS_FLAG_ONE_STEP_SYNC; 1367 } 1368 1369 static int lan743x_tx_frame_start(struct lan743x_tx *tx, 1370 unsigned char *first_buffer, 1371 unsigned int first_buffer_length, 1372 unsigned int frame_length, 1373 bool time_stamp, 1374 bool check_sum) 1375 { 1376 /* called only from within lan743x_tx_xmit_frame. 1377 * assuming tx->ring_lock has already been acquired. 1378 */ 1379 struct lan743x_tx_descriptor *tx_descriptor = NULL; 1380 struct lan743x_tx_buffer_info *buffer_info = NULL; 1381 struct lan743x_adapter *adapter = tx->adapter; 1382 struct device *dev = &adapter->pdev->dev; 1383 dma_addr_t dma_ptr; 1384 1385 tx->frame_flags |= TX_FRAME_FLAG_IN_PROGRESS; 1386 tx->frame_first = tx->last_tail; 1387 tx->frame_tail = tx->frame_first; 1388 1389 tx_descriptor = &tx->ring_cpu_ptr[tx->frame_tail]; 1390 buffer_info = &tx->buffer_info[tx->frame_tail]; 1391 dma_ptr = dma_map_single(dev, first_buffer, first_buffer_length, 1392 DMA_TO_DEVICE); 1393 if (dma_mapping_error(dev, dma_ptr)) 1394 return -ENOMEM; 1395 1396 tx_descriptor->data1 = cpu_to_le32(DMA_ADDR_LOW32(dma_ptr)); 1397 tx_descriptor->data2 = cpu_to_le32(DMA_ADDR_HIGH32(dma_ptr)); 1398 tx_descriptor->data3 = cpu_to_le32((frame_length << 16) & 1399 TX_DESC_DATA3_FRAME_LENGTH_MSS_MASK_); 1400 1401 buffer_info->skb = NULL; 1402 buffer_info->dma_ptr = dma_ptr; 1403 buffer_info->buffer_length = first_buffer_length; 1404 buffer_info->flags |= TX_BUFFER_INFO_FLAG_ACTIVE; 1405 1406 tx->frame_data0 = (first_buffer_length & 1407 TX_DESC_DATA0_BUF_LENGTH_MASK_) | 1408 TX_DESC_DATA0_DTYPE_DATA_ | 1409 TX_DESC_DATA0_FS_ | 1410 TX_DESC_DATA0_FCS_; 1411 if (time_stamp) 1412 tx->frame_data0 |= TX_DESC_DATA0_TSE_; 1413 1414 if (check_sum) 1415 tx->frame_data0 |= TX_DESC_DATA0_ICE_ | 1416 TX_DESC_DATA0_IPE_ | 1417 TX_DESC_DATA0_TPE_; 1418 1419 /* data0 will be programmed in one of other frame assembler functions */ 1420 return 0; 1421 } 1422 1423 static void lan743x_tx_frame_add_lso(struct lan743x_tx *tx, 1424 unsigned int frame_length, 1425 int nr_frags) 1426 { 1427 /* called only from within lan743x_tx_xmit_frame. 1428 * assuming tx->ring_lock has already been acquired. 1429 */ 1430 struct lan743x_tx_descriptor *tx_descriptor = NULL; 1431 struct lan743x_tx_buffer_info *buffer_info = NULL; 1432 1433 /* wrap up previous descriptor */ 1434 tx->frame_data0 |= TX_DESC_DATA0_EXT_; 1435 if (nr_frags <= 0) { 1436 tx->frame_data0 |= TX_DESC_DATA0_LS_; 1437 tx->frame_data0 |= TX_DESC_DATA0_IOC_; 1438 } 1439 tx_descriptor = &tx->ring_cpu_ptr[tx->frame_tail]; 1440 tx_descriptor->data0 = cpu_to_le32(tx->frame_data0); 1441 1442 /* move to next descriptor */ 1443 tx->frame_tail = lan743x_tx_next_index(tx, tx->frame_tail); 1444 tx_descriptor = &tx->ring_cpu_ptr[tx->frame_tail]; 1445 buffer_info = &tx->buffer_info[tx->frame_tail]; 1446 1447 /* add extension descriptor */ 1448 tx_descriptor->data1 = 0; 1449 tx_descriptor->data2 = 0; 1450 tx_descriptor->data3 = 0; 1451 1452 buffer_info->skb = NULL; 1453 buffer_info->dma_ptr = 0; 1454 buffer_info->buffer_length = 0; 1455 buffer_info->flags |= TX_BUFFER_INFO_FLAG_ACTIVE; 1456 1457 tx->frame_data0 = (frame_length & TX_DESC_DATA0_EXT_PAY_LENGTH_MASK_) | 1458 TX_DESC_DATA0_DTYPE_EXT_ | 1459 TX_DESC_DATA0_EXT_LSO_; 1460 1461 /* data0 will be programmed in one of other frame assembler functions */ 1462 } 1463 1464 static int lan743x_tx_frame_add_fragment(struct lan743x_tx *tx, 1465 const skb_frag_t *fragment, 1466 unsigned int frame_length) 1467 { 1468 /* called only from within lan743x_tx_xmit_frame 1469 * assuming tx->ring_lock has already been acquired 1470 */ 1471 struct lan743x_tx_descriptor *tx_descriptor = NULL; 1472 struct lan743x_tx_buffer_info *buffer_info = NULL; 1473 struct lan743x_adapter *adapter = tx->adapter; 1474 struct device *dev = &adapter->pdev->dev; 1475 unsigned int fragment_length = 0; 1476 dma_addr_t dma_ptr; 1477 1478 fragment_length = skb_frag_size(fragment); 1479 if (!fragment_length) 1480 return 0; 1481 1482 /* wrap up previous descriptor */ 1483 tx_descriptor = &tx->ring_cpu_ptr[tx->frame_tail]; 1484 tx_descriptor->data0 = cpu_to_le32(tx->frame_data0); 1485 1486 /* move to next descriptor */ 1487 tx->frame_tail = lan743x_tx_next_index(tx, tx->frame_tail); 1488 tx_descriptor = &tx->ring_cpu_ptr[tx->frame_tail]; 1489 buffer_info = &tx->buffer_info[tx->frame_tail]; 1490 dma_ptr = skb_frag_dma_map(dev, fragment, 1491 0, fragment_length, 1492 DMA_TO_DEVICE); 1493 if (dma_mapping_error(dev, dma_ptr)) { 1494 int desc_index; 1495 1496 /* cleanup all previously setup descriptors */ 1497 desc_index = tx->frame_first; 1498 while (desc_index != tx->frame_tail) { 1499 lan743x_tx_release_desc(tx, desc_index, true); 1500 desc_index = lan743x_tx_next_index(tx, desc_index); 1501 } 1502 dma_wmb(); 1503 tx->frame_flags &= ~TX_FRAME_FLAG_IN_PROGRESS; 1504 tx->frame_first = 0; 1505 tx->frame_data0 = 0; 1506 tx->frame_tail = 0; 1507 return -ENOMEM; 1508 } 1509 1510 tx_descriptor->data1 = cpu_to_le32(DMA_ADDR_LOW32(dma_ptr)); 1511 tx_descriptor->data2 = cpu_to_le32(DMA_ADDR_HIGH32(dma_ptr)); 1512 tx_descriptor->data3 = cpu_to_le32((frame_length << 16) & 1513 TX_DESC_DATA3_FRAME_LENGTH_MSS_MASK_); 1514 1515 buffer_info->skb = NULL; 1516 buffer_info->dma_ptr = dma_ptr; 1517 buffer_info->buffer_length = fragment_length; 1518 buffer_info->flags |= TX_BUFFER_INFO_FLAG_ACTIVE; 1519 buffer_info->flags |= TX_BUFFER_INFO_FLAG_SKB_FRAGMENT; 1520 1521 tx->frame_data0 = (fragment_length & TX_DESC_DATA0_BUF_LENGTH_MASK_) | 1522 TX_DESC_DATA0_DTYPE_DATA_ | 1523 TX_DESC_DATA0_FCS_; 1524 1525 /* data0 will be programmed in one of other frame assembler functions */ 1526 return 0; 1527 } 1528 1529 static void lan743x_tx_frame_end(struct lan743x_tx *tx, 1530 struct sk_buff *skb, 1531 bool time_stamp, 1532 bool ignore_sync) 1533 { 1534 /* called only from within lan743x_tx_xmit_frame 1535 * assuming tx->ring_lock has already been acquired 1536 */ 1537 struct lan743x_tx_descriptor *tx_descriptor = NULL; 1538 struct lan743x_tx_buffer_info *buffer_info = NULL; 1539 struct lan743x_adapter *adapter = tx->adapter; 1540 u32 tx_tail_flags = 0; 1541 1542 /* wrap up previous descriptor */ 1543 if ((tx->frame_data0 & TX_DESC_DATA0_DTYPE_MASK_) == 1544 TX_DESC_DATA0_DTYPE_DATA_) { 1545 tx->frame_data0 |= TX_DESC_DATA0_LS_; 1546 tx->frame_data0 |= TX_DESC_DATA0_IOC_; 1547 } 1548 1549 tx_descriptor = &tx->ring_cpu_ptr[tx->frame_tail]; 1550 buffer_info = &tx->buffer_info[tx->frame_tail]; 1551 buffer_info->skb = skb; 1552 if (time_stamp) 1553 buffer_info->flags |= TX_BUFFER_INFO_FLAG_TIMESTAMP_REQUESTED; 1554 if (ignore_sync) 1555 buffer_info->flags |= TX_BUFFER_INFO_FLAG_IGNORE_SYNC; 1556 1557 tx_descriptor->data0 = cpu_to_le32(tx->frame_data0); 1558 tx->frame_tail = lan743x_tx_next_index(tx, tx->frame_tail); 1559 tx->last_tail = tx->frame_tail; 1560 1561 dma_wmb(); 1562 1563 if (tx->vector_flags & LAN743X_VECTOR_FLAG_VECTOR_ENABLE_AUTO_SET) 1564 tx_tail_flags |= TX_TAIL_SET_TOP_INT_VEC_EN_; 1565 if (tx->vector_flags & LAN743X_VECTOR_FLAG_SOURCE_ENABLE_AUTO_SET) 1566 tx_tail_flags |= TX_TAIL_SET_DMAC_INT_EN_ | 1567 TX_TAIL_SET_TOP_INT_EN_; 1568 1569 lan743x_csr_write(adapter, TX_TAIL(tx->channel_number), 1570 tx_tail_flags | tx->frame_tail); 1571 tx->frame_flags &= ~TX_FRAME_FLAG_IN_PROGRESS; 1572 } 1573 1574 static netdev_tx_t lan743x_tx_xmit_frame(struct lan743x_tx *tx, 1575 struct sk_buff *skb) 1576 { 1577 int required_number_of_descriptors = 0; 1578 unsigned int start_frame_length = 0; 1579 unsigned int frame_length = 0; 1580 unsigned int head_length = 0; 1581 unsigned long irq_flags = 0; 1582 bool do_timestamp = false; 1583 bool ignore_sync = false; 1584 int nr_frags = 0; 1585 bool gso = false; 1586 int j; 1587 1588 required_number_of_descriptors = lan743x_tx_get_desc_cnt(tx, skb); 1589 1590 spin_lock_irqsave(&tx->ring_lock, irq_flags); 1591 if (required_number_of_descriptors > 1592 lan743x_tx_get_avail_desc(tx)) { 1593 if (required_number_of_descriptors > (tx->ring_size - 1)) { 1594 dev_kfree_skb_irq(skb); 1595 } else { 1596 /* save to overflow buffer */ 1597 tx->overflow_skb = skb; 1598 netif_stop_queue(tx->adapter->netdev); 1599 } 1600 goto unlock; 1601 } 1602 1603 /* space available, transmit skb */ 1604 if ((skb_shinfo(skb)->tx_flags & SKBTX_HW_TSTAMP) && 1605 (tx->ts_flags & TX_TS_FLAG_TIMESTAMPING_ENABLED) && 1606 (lan743x_ptp_request_tx_timestamp(tx->adapter))) { 1607 skb_shinfo(skb)->tx_flags |= SKBTX_IN_PROGRESS; 1608 do_timestamp = true; 1609 if (tx->ts_flags & TX_TS_FLAG_ONE_STEP_SYNC) 1610 ignore_sync = true; 1611 } 1612 head_length = skb_headlen(skb); 1613 frame_length = skb_pagelen(skb); 1614 nr_frags = skb_shinfo(skb)->nr_frags; 1615 start_frame_length = frame_length; 1616 gso = skb_is_gso(skb); 1617 if (gso) { 1618 start_frame_length = max(skb_shinfo(skb)->gso_size, 1619 (unsigned short)8); 1620 } 1621 1622 if (lan743x_tx_frame_start(tx, 1623 skb->data, head_length, 1624 start_frame_length, 1625 do_timestamp, 1626 skb->ip_summed == CHECKSUM_PARTIAL)) { 1627 dev_kfree_skb_irq(skb); 1628 goto unlock; 1629 } 1630 1631 if (gso) 1632 lan743x_tx_frame_add_lso(tx, frame_length, nr_frags); 1633 1634 if (nr_frags <= 0) 1635 goto finish; 1636 1637 for (j = 0; j < nr_frags; j++) { 1638 const skb_frag_t *frag = &(skb_shinfo(skb)->frags[j]); 1639 1640 if (lan743x_tx_frame_add_fragment(tx, frag, frame_length)) { 1641 /* upon error no need to call 1642 * lan743x_tx_frame_end 1643 * frame assembler clean up was performed inside 1644 * lan743x_tx_frame_add_fragment 1645 */ 1646 dev_kfree_skb_irq(skb); 1647 goto unlock; 1648 } 1649 } 1650 1651 finish: 1652 lan743x_tx_frame_end(tx, skb, do_timestamp, ignore_sync); 1653 1654 unlock: 1655 spin_unlock_irqrestore(&tx->ring_lock, irq_flags); 1656 return NETDEV_TX_OK; 1657 } 1658 1659 static int lan743x_tx_napi_poll(struct napi_struct *napi, int weight) 1660 { 1661 struct lan743x_tx *tx = container_of(napi, struct lan743x_tx, napi); 1662 struct lan743x_adapter *adapter = tx->adapter; 1663 bool start_transmitter = false; 1664 unsigned long irq_flags = 0; 1665 u32 ioc_bit = 0; 1666 1667 ioc_bit = DMAC_INT_BIT_TX_IOC_(tx->channel_number); 1668 lan743x_csr_read(adapter, DMAC_INT_STS); 1669 if (tx->vector_flags & LAN743X_VECTOR_FLAG_SOURCE_STATUS_W2C) 1670 lan743x_csr_write(adapter, DMAC_INT_STS, ioc_bit); 1671 spin_lock_irqsave(&tx->ring_lock, irq_flags); 1672 1673 /* clean up tx ring */ 1674 lan743x_tx_release_completed_descriptors(tx); 1675 if (netif_queue_stopped(adapter->netdev)) { 1676 if (tx->overflow_skb) { 1677 if (lan743x_tx_get_desc_cnt(tx, tx->overflow_skb) <= 1678 lan743x_tx_get_avail_desc(tx)) 1679 start_transmitter = true; 1680 } else { 1681 netif_wake_queue(adapter->netdev); 1682 } 1683 } 1684 spin_unlock_irqrestore(&tx->ring_lock, irq_flags); 1685 1686 if (start_transmitter) { 1687 /* space is now available, transmit overflow skb */ 1688 lan743x_tx_xmit_frame(tx, tx->overflow_skb); 1689 tx->overflow_skb = NULL; 1690 netif_wake_queue(adapter->netdev); 1691 } 1692 1693 if (!napi_complete(napi)) 1694 goto done; 1695 1696 /* enable isr */ 1697 lan743x_csr_write(adapter, INT_EN_SET, 1698 INT_BIT_DMA_TX_(tx->channel_number)); 1699 lan743x_csr_read(adapter, INT_STS); 1700 1701 done: 1702 return 0; 1703 } 1704 1705 static void lan743x_tx_ring_cleanup(struct lan743x_tx *tx) 1706 { 1707 if (tx->head_cpu_ptr) { 1708 dma_free_coherent(&tx->adapter->pdev->dev, 1709 sizeof(*tx->head_cpu_ptr), tx->head_cpu_ptr, 1710 tx->head_dma_ptr); 1711 tx->head_cpu_ptr = NULL; 1712 tx->head_dma_ptr = 0; 1713 } 1714 kfree(tx->buffer_info); 1715 tx->buffer_info = NULL; 1716 1717 if (tx->ring_cpu_ptr) { 1718 dma_free_coherent(&tx->adapter->pdev->dev, 1719 tx->ring_allocation_size, tx->ring_cpu_ptr, 1720 tx->ring_dma_ptr); 1721 tx->ring_allocation_size = 0; 1722 tx->ring_cpu_ptr = NULL; 1723 tx->ring_dma_ptr = 0; 1724 } 1725 tx->ring_size = 0; 1726 } 1727 1728 static int lan743x_tx_ring_init(struct lan743x_tx *tx) 1729 { 1730 size_t ring_allocation_size = 0; 1731 void *cpu_ptr = NULL; 1732 dma_addr_t dma_ptr; 1733 int ret = -ENOMEM; 1734 1735 tx->ring_size = LAN743X_TX_RING_SIZE; 1736 if (tx->ring_size & ~TX_CFG_B_TX_RING_LEN_MASK_) { 1737 ret = -EINVAL; 1738 goto cleanup; 1739 } 1740 if (dma_set_mask_and_coherent(&tx->adapter->pdev->dev, 1741 DMA_BIT_MASK(64))) { 1742 if (dma_set_mask_and_coherent(&tx->adapter->pdev->dev, 1743 DMA_BIT_MASK(32))) { 1744 dev_warn(&tx->adapter->pdev->dev, 1745 "lan743x_: No suitable DMA available\n"); 1746 ret = -ENOMEM; 1747 goto cleanup; 1748 } 1749 } 1750 ring_allocation_size = ALIGN(tx->ring_size * 1751 sizeof(struct lan743x_tx_descriptor), 1752 PAGE_SIZE); 1753 dma_ptr = 0; 1754 cpu_ptr = dma_alloc_coherent(&tx->adapter->pdev->dev, 1755 ring_allocation_size, &dma_ptr, GFP_KERNEL); 1756 if (!cpu_ptr) { 1757 ret = -ENOMEM; 1758 goto cleanup; 1759 } 1760 1761 tx->ring_allocation_size = ring_allocation_size; 1762 tx->ring_cpu_ptr = (struct lan743x_tx_descriptor *)cpu_ptr; 1763 tx->ring_dma_ptr = dma_ptr; 1764 1765 cpu_ptr = kcalloc(tx->ring_size, sizeof(*tx->buffer_info), GFP_KERNEL); 1766 if (!cpu_ptr) { 1767 ret = -ENOMEM; 1768 goto cleanup; 1769 } 1770 tx->buffer_info = (struct lan743x_tx_buffer_info *)cpu_ptr; 1771 dma_ptr = 0; 1772 cpu_ptr = dma_alloc_coherent(&tx->adapter->pdev->dev, 1773 sizeof(*tx->head_cpu_ptr), &dma_ptr, 1774 GFP_KERNEL); 1775 if (!cpu_ptr) { 1776 ret = -ENOMEM; 1777 goto cleanup; 1778 } 1779 1780 tx->head_cpu_ptr = cpu_ptr; 1781 tx->head_dma_ptr = dma_ptr; 1782 if (tx->head_dma_ptr & 0x3) { 1783 ret = -ENOMEM; 1784 goto cleanup; 1785 } 1786 1787 return 0; 1788 1789 cleanup: 1790 lan743x_tx_ring_cleanup(tx); 1791 return ret; 1792 } 1793 1794 static void lan743x_tx_close(struct lan743x_tx *tx) 1795 { 1796 struct lan743x_adapter *adapter = tx->adapter; 1797 1798 lan743x_csr_write(adapter, 1799 DMAC_CMD, 1800 DMAC_CMD_STOP_T_(tx->channel_number)); 1801 lan743x_dmac_tx_wait_till_stopped(adapter, tx->channel_number); 1802 1803 lan743x_csr_write(adapter, 1804 DMAC_INT_EN_CLR, 1805 DMAC_INT_BIT_TX_IOC_(tx->channel_number)); 1806 lan743x_csr_write(adapter, INT_EN_CLR, 1807 INT_BIT_DMA_TX_(tx->channel_number)); 1808 napi_disable(&tx->napi); 1809 netif_napi_del(&tx->napi); 1810 1811 lan743x_csr_write(adapter, FCT_TX_CTL, 1812 FCT_TX_CTL_DIS_(tx->channel_number)); 1813 lan743x_csr_wait_for_bit(adapter, FCT_TX_CTL, 1814 FCT_TX_CTL_EN_(tx->channel_number), 1815 0, 1000, 20000, 100); 1816 1817 lan743x_tx_release_all_descriptors(tx); 1818 1819 if (tx->overflow_skb) { 1820 dev_kfree_skb(tx->overflow_skb); 1821 tx->overflow_skb = NULL; 1822 } 1823 1824 lan743x_tx_ring_cleanup(tx); 1825 } 1826 1827 static int lan743x_tx_open(struct lan743x_tx *tx) 1828 { 1829 struct lan743x_adapter *adapter = NULL; 1830 u32 data = 0; 1831 int ret; 1832 1833 adapter = tx->adapter; 1834 ret = lan743x_tx_ring_init(tx); 1835 if (ret) 1836 return ret; 1837 1838 /* initialize fifo */ 1839 lan743x_csr_write(adapter, FCT_TX_CTL, 1840 FCT_TX_CTL_RESET_(tx->channel_number)); 1841 lan743x_csr_wait_for_bit(adapter, FCT_TX_CTL, 1842 FCT_TX_CTL_RESET_(tx->channel_number), 1843 0, 1000, 20000, 100); 1844 1845 /* enable fifo */ 1846 lan743x_csr_write(adapter, FCT_TX_CTL, 1847 FCT_TX_CTL_EN_(tx->channel_number)); 1848 1849 /* reset tx channel */ 1850 lan743x_csr_write(adapter, DMAC_CMD, 1851 DMAC_CMD_TX_SWR_(tx->channel_number)); 1852 lan743x_csr_wait_for_bit(adapter, DMAC_CMD, 1853 DMAC_CMD_TX_SWR_(tx->channel_number), 1854 0, 1000, 20000, 100); 1855 1856 /* Write TX_BASE_ADDR */ 1857 lan743x_csr_write(adapter, 1858 TX_BASE_ADDRH(tx->channel_number), 1859 DMA_ADDR_HIGH32(tx->ring_dma_ptr)); 1860 lan743x_csr_write(adapter, 1861 TX_BASE_ADDRL(tx->channel_number), 1862 DMA_ADDR_LOW32(tx->ring_dma_ptr)); 1863 1864 /* Write TX_CFG_B */ 1865 data = lan743x_csr_read(adapter, TX_CFG_B(tx->channel_number)); 1866 data &= ~TX_CFG_B_TX_RING_LEN_MASK_; 1867 data |= ((tx->ring_size) & TX_CFG_B_TX_RING_LEN_MASK_); 1868 if (!(adapter->csr.flags & LAN743X_CSR_FLAG_IS_A0)) 1869 data |= TX_CFG_B_TDMABL_512_; 1870 lan743x_csr_write(adapter, TX_CFG_B(tx->channel_number), data); 1871 1872 /* Write TX_CFG_A */ 1873 data = TX_CFG_A_TX_TMR_HPWB_SEL_IOC_ | TX_CFG_A_TX_HP_WB_EN_; 1874 if (!(adapter->csr.flags & LAN743X_CSR_FLAG_IS_A0)) { 1875 data |= TX_CFG_A_TX_HP_WB_ON_INT_TMR_; 1876 data |= TX_CFG_A_TX_PF_THRES_SET_(0x10); 1877 data |= TX_CFG_A_TX_PF_PRI_THRES_SET_(0x04); 1878 data |= TX_CFG_A_TX_HP_WB_THRES_SET_(0x07); 1879 } 1880 lan743x_csr_write(adapter, TX_CFG_A(tx->channel_number), data); 1881 1882 /* Write TX_HEAD_WRITEBACK_ADDR */ 1883 lan743x_csr_write(adapter, 1884 TX_HEAD_WRITEBACK_ADDRH(tx->channel_number), 1885 DMA_ADDR_HIGH32(tx->head_dma_ptr)); 1886 lan743x_csr_write(adapter, 1887 TX_HEAD_WRITEBACK_ADDRL(tx->channel_number), 1888 DMA_ADDR_LOW32(tx->head_dma_ptr)); 1889 1890 /* set last head */ 1891 tx->last_head = lan743x_csr_read(adapter, TX_HEAD(tx->channel_number)); 1892 1893 /* write TX_TAIL */ 1894 tx->last_tail = 0; 1895 lan743x_csr_write(adapter, TX_TAIL(tx->channel_number), 1896 (u32)(tx->last_tail)); 1897 tx->vector_flags = lan743x_intr_get_vector_flags(adapter, 1898 INT_BIT_DMA_TX_ 1899 (tx->channel_number)); 1900 netif_tx_napi_add(adapter->netdev, 1901 &tx->napi, lan743x_tx_napi_poll, 1902 tx->ring_size - 1); 1903 napi_enable(&tx->napi); 1904 1905 data = 0; 1906 if (tx->vector_flags & LAN743X_VECTOR_FLAG_SOURCE_ENABLE_AUTO_CLEAR) 1907 data |= TX_CFG_C_TX_TOP_INT_EN_AUTO_CLR_; 1908 if (tx->vector_flags & LAN743X_VECTOR_FLAG_SOURCE_STATUS_AUTO_CLEAR) 1909 data |= TX_CFG_C_TX_DMA_INT_STS_AUTO_CLR_; 1910 if (tx->vector_flags & LAN743X_VECTOR_FLAG_SOURCE_STATUS_R2C) 1911 data |= TX_CFG_C_TX_INT_STS_R2C_MODE_MASK_; 1912 if (tx->vector_flags & LAN743X_VECTOR_FLAG_SOURCE_ENABLE_R2C) 1913 data |= TX_CFG_C_TX_INT_EN_R2C_; 1914 lan743x_csr_write(adapter, TX_CFG_C(tx->channel_number), data); 1915 1916 if (!(tx->vector_flags & LAN743X_VECTOR_FLAG_SOURCE_ENABLE_AUTO_SET)) 1917 lan743x_csr_write(adapter, INT_EN_SET, 1918 INT_BIT_DMA_TX_(tx->channel_number)); 1919 lan743x_csr_write(adapter, DMAC_INT_EN_SET, 1920 DMAC_INT_BIT_TX_IOC_(tx->channel_number)); 1921 1922 /* start dmac channel */ 1923 lan743x_csr_write(adapter, DMAC_CMD, 1924 DMAC_CMD_START_T_(tx->channel_number)); 1925 return 0; 1926 } 1927 1928 static int lan743x_rx_next_index(struct lan743x_rx *rx, int index) 1929 { 1930 return ((++index) % rx->ring_size); 1931 } 1932 1933 static void lan743x_rx_update_tail(struct lan743x_rx *rx, int index) 1934 { 1935 /* update the tail once per 8 descriptors */ 1936 if ((index & 7) == 7) 1937 lan743x_csr_write(rx->adapter, RX_TAIL(rx->channel_number), 1938 index); 1939 } 1940 1941 static int lan743x_rx_init_ring_element(struct lan743x_rx *rx, int index, 1942 gfp_t gfp) 1943 { 1944 struct net_device *netdev = rx->adapter->netdev; 1945 struct device *dev = &rx->adapter->pdev->dev; 1946 struct lan743x_rx_buffer_info *buffer_info; 1947 unsigned int buffer_length, used_length; 1948 struct lan743x_rx_descriptor *descriptor; 1949 struct sk_buff *skb; 1950 dma_addr_t dma_ptr; 1951 1952 buffer_length = netdev->mtu + ETH_HLEN + ETH_FCS_LEN + RX_HEAD_PADDING; 1953 1954 descriptor = &rx->ring_cpu_ptr[index]; 1955 buffer_info = &rx->buffer_info[index]; 1956 skb = __netdev_alloc_skb(netdev, buffer_length, gfp); 1957 if (!skb) 1958 return -ENOMEM; 1959 dma_ptr = dma_map_single(dev, skb->data, buffer_length, DMA_FROM_DEVICE); 1960 if (dma_mapping_error(dev, dma_ptr)) { 1961 dev_kfree_skb_any(skb); 1962 return -ENOMEM; 1963 } 1964 if (buffer_info->dma_ptr) { 1965 /* sync used area of buffer only */ 1966 if (le32_to_cpu(descriptor->data0) & RX_DESC_DATA0_LS_) 1967 /* frame length is valid only if LS bit is set. 1968 * it's a safe upper bound for the used area in this 1969 * buffer. 1970 */ 1971 used_length = min(RX_DESC_DATA0_FRAME_LENGTH_GET_ 1972 (le32_to_cpu(descriptor->data0)), 1973 buffer_info->buffer_length); 1974 else 1975 used_length = buffer_info->buffer_length; 1976 dma_sync_single_for_cpu(dev, buffer_info->dma_ptr, 1977 used_length, 1978 DMA_FROM_DEVICE); 1979 dma_unmap_single_attrs(dev, buffer_info->dma_ptr, 1980 buffer_info->buffer_length, 1981 DMA_FROM_DEVICE, 1982 DMA_ATTR_SKIP_CPU_SYNC); 1983 } 1984 1985 buffer_info->skb = skb; 1986 buffer_info->dma_ptr = dma_ptr; 1987 buffer_info->buffer_length = buffer_length; 1988 descriptor->data1 = cpu_to_le32(DMA_ADDR_LOW32(buffer_info->dma_ptr)); 1989 descriptor->data2 = cpu_to_le32(DMA_ADDR_HIGH32(buffer_info->dma_ptr)); 1990 descriptor->data3 = 0; 1991 descriptor->data0 = cpu_to_le32((RX_DESC_DATA0_OWN_ | 1992 (buffer_length & RX_DESC_DATA0_BUF_LENGTH_MASK_))); 1993 lan743x_rx_update_tail(rx, index); 1994 1995 return 0; 1996 } 1997 1998 static void lan743x_rx_reuse_ring_element(struct lan743x_rx *rx, int index) 1999 { 2000 struct lan743x_rx_buffer_info *buffer_info; 2001 struct lan743x_rx_descriptor *descriptor; 2002 2003 descriptor = &rx->ring_cpu_ptr[index]; 2004 buffer_info = &rx->buffer_info[index]; 2005 2006 descriptor->data1 = cpu_to_le32(DMA_ADDR_LOW32(buffer_info->dma_ptr)); 2007 descriptor->data2 = cpu_to_le32(DMA_ADDR_HIGH32(buffer_info->dma_ptr)); 2008 descriptor->data3 = 0; 2009 descriptor->data0 = cpu_to_le32((RX_DESC_DATA0_OWN_ | 2010 ((buffer_info->buffer_length) & 2011 RX_DESC_DATA0_BUF_LENGTH_MASK_))); 2012 lan743x_rx_update_tail(rx, index); 2013 } 2014 2015 static void lan743x_rx_release_ring_element(struct lan743x_rx *rx, int index) 2016 { 2017 struct lan743x_rx_buffer_info *buffer_info; 2018 struct lan743x_rx_descriptor *descriptor; 2019 2020 descriptor = &rx->ring_cpu_ptr[index]; 2021 buffer_info = &rx->buffer_info[index]; 2022 2023 memset(descriptor, 0, sizeof(*descriptor)); 2024 2025 if (buffer_info->dma_ptr) { 2026 dma_unmap_single(&rx->adapter->pdev->dev, 2027 buffer_info->dma_ptr, 2028 buffer_info->buffer_length, 2029 DMA_FROM_DEVICE); 2030 buffer_info->dma_ptr = 0; 2031 } 2032 2033 if (buffer_info->skb) { 2034 dev_kfree_skb(buffer_info->skb); 2035 buffer_info->skb = NULL; 2036 } 2037 2038 memset(buffer_info, 0, sizeof(*buffer_info)); 2039 } 2040 2041 static struct sk_buff * 2042 lan743x_rx_trim_skb(struct sk_buff *skb, int frame_length) 2043 { 2044 if (skb_linearize(skb)) { 2045 dev_kfree_skb_irq(skb); 2046 return NULL; 2047 } 2048 frame_length = max_t(int, 0, frame_length - ETH_FCS_LEN); 2049 if (skb->len > frame_length) { 2050 skb->tail -= skb->len - frame_length; 2051 skb->len = frame_length; 2052 } 2053 return skb; 2054 } 2055 2056 static int lan743x_rx_process_buffer(struct lan743x_rx *rx) 2057 { 2058 int current_head_index = le32_to_cpu(*rx->head_cpu_ptr); 2059 struct lan743x_rx_descriptor *descriptor, *desc_ext; 2060 struct net_device *netdev = rx->adapter->netdev; 2061 int result = RX_PROCESS_RESULT_NOTHING_TO_DO; 2062 struct lan743x_rx_buffer_info *buffer_info; 2063 int frame_length, buffer_length; 2064 int extension_index = -1; 2065 bool is_last, is_first; 2066 struct sk_buff *skb; 2067 2068 if (current_head_index < 0 || current_head_index >= rx->ring_size) 2069 goto done; 2070 2071 if (rx->last_head < 0 || rx->last_head >= rx->ring_size) 2072 goto done; 2073 2074 if (rx->last_head == current_head_index) 2075 goto done; 2076 2077 descriptor = &rx->ring_cpu_ptr[rx->last_head]; 2078 if (le32_to_cpu(descriptor->data0) & RX_DESC_DATA0_OWN_) 2079 goto done; 2080 buffer_info = &rx->buffer_info[rx->last_head]; 2081 2082 is_last = le32_to_cpu(descriptor->data0) & RX_DESC_DATA0_LS_; 2083 is_first = le32_to_cpu(descriptor->data0) & RX_DESC_DATA0_FS_; 2084 2085 if (is_last && le32_to_cpu(descriptor->data0) & RX_DESC_DATA0_EXT_) { 2086 /* extension is expected to follow */ 2087 int index = lan743x_rx_next_index(rx, rx->last_head); 2088 2089 if (index == current_head_index) 2090 /* extension not yet available */ 2091 goto done; 2092 desc_ext = &rx->ring_cpu_ptr[index]; 2093 if (le32_to_cpu(desc_ext->data0) & RX_DESC_DATA0_OWN_) 2094 /* extension not yet available */ 2095 goto done; 2096 if (!(le32_to_cpu(desc_ext->data0) & RX_DESC_DATA0_EXT_)) 2097 goto move_forward; 2098 extension_index = index; 2099 } 2100 2101 /* Only the last buffer in a multi-buffer frame contains the total frame 2102 * length. The chip occasionally sends more buffers than strictly 2103 * required to reach the total frame length. 2104 * Handle this by adding all buffers to the skb in their entirety. 2105 * Once the real frame length is known, trim the skb. 2106 */ 2107 frame_length = 2108 RX_DESC_DATA0_FRAME_LENGTH_GET_(le32_to_cpu(descriptor->data0)); 2109 buffer_length = buffer_info->buffer_length; 2110 2111 netdev_dbg(netdev, "%s%schunk: %d/%d", 2112 is_first ? "first " : " ", 2113 is_last ? "last " : " ", 2114 frame_length, buffer_length); 2115 2116 /* save existing skb, allocate new skb and map to dma */ 2117 skb = buffer_info->skb; 2118 if (lan743x_rx_init_ring_element(rx, rx->last_head, 2119 GFP_ATOMIC | GFP_DMA)) { 2120 /* failed to allocate next skb. 2121 * Memory is very low. 2122 * Drop this packet and reuse buffer. 2123 */ 2124 lan743x_rx_reuse_ring_element(rx, rx->last_head); 2125 /* drop packet that was being assembled */ 2126 dev_kfree_skb_irq(rx->skb_head); 2127 rx->skb_head = NULL; 2128 goto process_extension; 2129 } 2130 2131 /* add buffers to skb via skb->frag_list */ 2132 if (is_first) { 2133 skb_reserve(skb, RX_HEAD_PADDING); 2134 skb_put(skb, buffer_length - RX_HEAD_PADDING); 2135 if (rx->skb_head) 2136 dev_kfree_skb_irq(rx->skb_head); 2137 rx->skb_head = skb; 2138 } else if (rx->skb_head) { 2139 skb_put(skb, buffer_length); 2140 if (skb_shinfo(rx->skb_head)->frag_list) 2141 rx->skb_tail->next = skb; 2142 else 2143 skb_shinfo(rx->skb_head)->frag_list = skb; 2144 rx->skb_tail = skb; 2145 rx->skb_head->len += skb->len; 2146 rx->skb_head->data_len += skb->len; 2147 rx->skb_head->truesize += skb->truesize; 2148 } else { 2149 /* packet to assemble has already been dropped because one or 2150 * more of its buffers could not be allocated 2151 */ 2152 netdev_dbg(netdev, "drop buffer intended for dropped packet"); 2153 dev_kfree_skb_irq(skb); 2154 } 2155 2156 process_extension: 2157 if (extension_index >= 0) { 2158 u32 ts_sec; 2159 u32 ts_nsec; 2160 2161 ts_sec = le32_to_cpu(desc_ext->data1); 2162 ts_nsec = (le32_to_cpu(desc_ext->data2) & 2163 RX_DESC_DATA2_TS_NS_MASK_); 2164 if (rx->skb_head) 2165 skb_hwtstamps(rx->skb_head)->hwtstamp = 2166 ktime_set(ts_sec, ts_nsec); 2167 lan743x_rx_reuse_ring_element(rx, extension_index); 2168 rx->last_head = extension_index; 2169 netdev_dbg(netdev, "process extension"); 2170 } 2171 2172 if (is_last && rx->skb_head) 2173 rx->skb_head = lan743x_rx_trim_skb(rx->skb_head, frame_length); 2174 2175 if (is_last && rx->skb_head) { 2176 rx->skb_head->protocol = eth_type_trans(rx->skb_head, 2177 rx->adapter->netdev); 2178 netdev_dbg(netdev, "sending %d byte frame to OS", 2179 rx->skb_head->len); 2180 napi_gro_receive(&rx->napi, rx->skb_head); 2181 rx->skb_head = NULL; 2182 } 2183 2184 move_forward: 2185 /* push tail and head forward */ 2186 rx->last_tail = rx->last_head; 2187 rx->last_head = lan743x_rx_next_index(rx, rx->last_head); 2188 result = RX_PROCESS_RESULT_BUFFER_RECEIVED; 2189 done: 2190 return result; 2191 } 2192 2193 static int lan743x_rx_napi_poll(struct napi_struct *napi, int weight) 2194 { 2195 struct lan743x_rx *rx = container_of(napi, struct lan743x_rx, napi); 2196 struct lan743x_adapter *adapter = rx->adapter; 2197 int result = RX_PROCESS_RESULT_NOTHING_TO_DO; 2198 u32 rx_tail_flags = 0; 2199 int count; 2200 2201 if (rx->vector_flags & LAN743X_VECTOR_FLAG_SOURCE_STATUS_W2C) { 2202 /* clear int status bit before reading packet */ 2203 lan743x_csr_write(adapter, DMAC_INT_STS, 2204 DMAC_INT_BIT_RXFRM_(rx->channel_number)); 2205 } 2206 for (count = 0; count < weight; count++) { 2207 result = lan743x_rx_process_buffer(rx); 2208 if (result == RX_PROCESS_RESULT_NOTHING_TO_DO) 2209 break; 2210 } 2211 rx->frame_count += count; 2212 if (count == weight || result == RX_PROCESS_RESULT_BUFFER_RECEIVED) 2213 return weight; 2214 2215 if (!napi_complete_done(napi, count)) 2216 return count; 2217 2218 /* re-arm interrupts, must write to rx tail on some chip variants */ 2219 if (rx->vector_flags & LAN743X_VECTOR_FLAG_VECTOR_ENABLE_AUTO_SET) 2220 rx_tail_flags |= RX_TAIL_SET_TOP_INT_VEC_EN_; 2221 if (rx->vector_flags & LAN743X_VECTOR_FLAG_SOURCE_ENABLE_AUTO_SET) { 2222 rx_tail_flags |= RX_TAIL_SET_TOP_INT_EN_; 2223 } else { 2224 lan743x_csr_write(adapter, INT_EN_SET, 2225 INT_BIT_DMA_RX_(rx->channel_number)); 2226 } 2227 2228 if (rx_tail_flags) 2229 lan743x_csr_write(adapter, RX_TAIL(rx->channel_number), 2230 rx_tail_flags | rx->last_tail); 2231 2232 return count; 2233 } 2234 2235 static void lan743x_rx_ring_cleanup(struct lan743x_rx *rx) 2236 { 2237 if (rx->buffer_info && rx->ring_cpu_ptr) { 2238 int index; 2239 2240 for (index = 0; index < rx->ring_size; index++) 2241 lan743x_rx_release_ring_element(rx, index); 2242 } 2243 2244 if (rx->head_cpu_ptr) { 2245 dma_free_coherent(&rx->adapter->pdev->dev, 2246 sizeof(*rx->head_cpu_ptr), rx->head_cpu_ptr, 2247 rx->head_dma_ptr); 2248 rx->head_cpu_ptr = NULL; 2249 rx->head_dma_ptr = 0; 2250 } 2251 2252 kfree(rx->buffer_info); 2253 rx->buffer_info = NULL; 2254 2255 if (rx->ring_cpu_ptr) { 2256 dma_free_coherent(&rx->adapter->pdev->dev, 2257 rx->ring_allocation_size, rx->ring_cpu_ptr, 2258 rx->ring_dma_ptr); 2259 rx->ring_allocation_size = 0; 2260 rx->ring_cpu_ptr = NULL; 2261 rx->ring_dma_ptr = 0; 2262 } 2263 2264 rx->ring_size = 0; 2265 rx->last_head = 0; 2266 } 2267 2268 static int lan743x_rx_ring_init(struct lan743x_rx *rx) 2269 { 2270 size_t ring_allocation_size = 0; 2271 dma_addr_t dma_ptr = 0; 2272 void *cpu_ptr = NULL; 2273 int ret = -ENOMEM; 2274 int index = 0; 2275 2276 rx->ring_size = LAN743X_RX_RING_SIZE; 2277 if (rx->ring_size <= 1) { 2278 ret = -EINVAL; 2279 goto cleanup; 2280 } 2281 if (rx->ring_size & ~RX_CFG_B_RX_RING_LEN_MASK_) { 2282 ret = -EINVAL; 2283 goto cleanup; 2284 } 2285 if (dma_set_mask_and_coherent(&rx->adapter->pdev->dev, 2286 DMA_BIT_MASK(64))) { 2287 if (dma_set_mask_and_coherent(&rx->adapter->pdev->dev, 2288 DMA_BIT_MASK(32))) { 2289 dev_warn(&rx->adapter->pdev->dev, 2290 "lan743x_: No suitable DMA available\n"); 2291 ret = -ENOMEM; 2292 goto cleanup; 2293 } 2294 } 2295 ring_allocation_size = ALIGN(rx->ring_size * 2296 sizeof(struct lan743x_rx_descriptor), 2297 PAGE_SIZE); 2298 dma_ptr = 0; 2299 cpu_ptr = dma_alloc_coherent(&rx->adapter->pdev->dev, 2300 ring_allocation_size, &dma_ptr, GFP_KERNEL); 2301 if (!cpu_ptr) { 2302 ret = -ENOMEM; 2303 goto cleanup; 2304 } 2305 rx->ring_allocation_size = ring_allocation_size; 2306 rx->ring_cpu_ptr = (struct lan743x_rx_descriptor *)cpu_ptr; 2307 rx->ring_dma_ptr = dma_ptr; 2308 2309 cpu_ptr = kcalloc(rx->ring_size, sizeof(*rx->buffer_info), 2310 GFP_KERNEL); 2311 if (!cpu_ptr) { 2312 ret = -ENOMEM; 2313 goto cleanup; 2314 } 2315 rx->buffer_info = (struct lan743x_rx_buffer_info *)cpu_ptr; 2316 dma_ptr = 0; 2317 cpu_ptr = dma_alloc_coherent(&rx->adapter->pdev->dev, 2318 sizeof(*rx->head_cpu_ptr), &dma_ptr, 2319 GFP_KERNEL); 2320 if (!cpu_ptr) { 2321 ret = -ENOMEM; 2322 goto cleanup; 2323 } 2324 2325 rx->head_cpu_ptr = cpu_ptr; 2326 rx->head_dma_ptr = dma_ptr; 2327 if (rx->head_dma_ptr & 0x3) { 2328 ret = -ENOMEM; 2329 goto cleanup; 2330 } 2331 2332 rx->last_head = 0; 2333 for (index = 0; index < rx->ring_size; index++) { 2334 ret = lan743x_rx_init_ring_element(rx, index, GFP_KERNEL); 2335 if (ret) 2336 goto cleanup; 2337 } 2338 return 0; 2339 2340 cleanup: 2341 netif_warn(rx->adapter, ifup, rx->adapter->netdev, 2342 "Error allocating memory for LAN743x\n"); 2343 2344 lan743x_rx_ring_cleanup(rx); 2345 return ret; 2346 } 2347 2348 static void lan743x_rx_close(struct lan743x_rx *rx) 2349 { 2350 struct lan743x_adapter *adapter = rx->adapter; 2351 2352 lan743x_csr_write(adapter, FCT_RX_CTL, 2353 FCT_RX_CTL_DIS_(rx->channel_number)); 2354 lan743x_csr_wait_for_bit(adapter, FCT_RX_CTL, 2355 FCT_RX_CTL_EN_(rx->channel_number), 2356 0, 1000, 20000, 100); 2357 2358 lan743x_csr_write(adapter, DMAC_CMD, 2359 DMAC_CMD_STOP_R_(rx->channel_number)); 2360 lan743x_dmac_rx_wait_till_stopped(adapter, rx->channel_number); 2361 2362 lan743x_csr_write(adapter, DMAC_INT_EN_CLR, 2363 DMAC_INT_BIT_RXFRM_(rx->channel_number)); 2364 lan743x_csr_write(adapter, INT_EN_CLR, 2365 INT_BIT_DMA_RX_(rx->channel_number)); 2366 napi_disable(&rx->napi); 2367 2368 netif_napi_del(&rx->napi); 2369 2370 lan743x_rx_ring_cleanup(rx); 2371 } 2372 2373 static int lan743x_rx_open(struct lan743x_rx *rx) 2374 { 2375 struct lan743x_adapter *adapter = rx->adapter; 2376 u32 data = 0; 2377 int ret; 2378 2379 rx->frame_count = 0; 2380 ret = lan743x_rx_ring_init(rx); 2381 if (ret) 2382 goto return_error; 2383 2384 netif_napi_add(adapter->netdev, 2385 &rx->napi, lan743x_rx_napi_poll, 2386 NAPI_POLL_WEIGHT); 2387 2388 lan743x_csr_write(adapter, DMAC_CMD, 2389 DMAC_CMD_RX_SWR_(rx->channel_number)); 2390 lan743x_csr_wait_for_bit(adapter, DMAC_CMD, 2391 DMAC_CMD_RX_SWR_(rx->channel_number), 2392 0, 1000, 20000, 100); 2393 2394 /* set ring base address */ 2395 lan743x_csr_write(adapter, 2396 RX_BASE_ADDRH(rx->channel_number), 2397 DMA_ADDR_HIGH32(rx->ring_dma_ptr)); 2398 lan743x_csr_write(adapter, 2399 RX_BASE_ADDRL(rx->channel_number), 2400 DMA_ADDR_LOW32(rx->ring_dma_ptr)); 2401 2402 /* set rx write back address */ 2403 lan743x_csr_write(adapter, 2404 RX_HEAD_WRITEBACK_ADDRH(rx->channel_number), 2405 DMA_ADDR_HIGH32(rx->head_dma_ptr)); 2406 lan743x_csr_write(adapter, 2407 RX_HEAD_WRITEBACK_ADDRL(rx->channel_number), 2408 DMA_ADDR_LOW32(rx->head_dma_ptr)); 2409 data = RX_CFG_A_RX_HP_WB_EN_; 2410 if (!(adapter->csr.flags & LAN743X_CSR_FLAG_IS_A0)) { 2411 data |= (RX_CFG_A_RX_WB_ON_INT_TMR_ | 2412 RX_CFG_A_RX_WB_THRES_SET_(0x7) | 2413 RX_CFG_A_RX_PF_THRES_SET_(16) | 2414 RX_CFG_A_RX_PF_PRI_THRES_SET_(4)); 2415 } 2416 2417 /* set RX_CFG_A */ 2418 lan743x_csr_write(adapter, 2419 RX_CFG_A(rx->channel_number), data); 2420 2421 /* set RX_CFG_B */ 2422 data = lan743x_csr_read(adapter, RX_CFG_B(rx->channel_number)); 2423 data &= ~RX_CFG_B_RX_PAD_MASK_; 2424 if (!RX_HEAD_PADDING) 2425 data |= RX_CFG_B_RX_PAD_0_; 2426 else 2427 data |= RX_CFG_B_RX_PAD_2_; 2428 data &= ~RX_CFG_B_RX_RING_LEN_MASK_; 2429 data |= ((rx->ring_size) & RX_CFG_B_RX_RING_LEN_MASK_); 2430 data |= RX_CFG_B_TS_ALL_RX_; 2431 if (!(adapter->csr.flags & LAN743X_CSR_FLAG_IS_A0)) 2432 data |= RX_CFG_B_RDMABL_512_; 2433 2434 lan743x_csr_write(adapter, RX_CFG_B(rx->channel_number), data); 2435 rx->vector_flags = lan743x_intr_get_vector_flags(adapter, 2436 INT_BIT_DMA_RX_ 2437 (rx->channel_number)); 2438 2439 /* set RX_CFG_C */ 2440 data = 0; 2441 if (rx->vector_flags & LAN743X_VECTOR_FLAG_SOURCE_ENABLE_AUTO_CLEAR) 2442 data |= RX_CFG_C_RX_TOP_INT_EN_AUTO_CLR_; 2443 if (rx->vector_flags & LAN743X_VECTOR_FLAG_SOURCE_STATUS_AUTO_CLEAR) 2444 data |= RX_CFG_C_RX_DMA_INT_STS_AUTO_CLR_; 2445 if (rx->vector_flags & LAN743X_VECTOR_FLAG_SOURCE_STATUS_R2C) 2446 data |= RX_CFG_C_RX_INT_STS_R2C_MODE_MASK_; 2447 if (rx->vector_flags & LAN743X_VECTOR_FLAG_SOURCE_ENABLE_R2C) 2448 data |= RX_CFG_C_RX_INT_EN_R2C_; 2449 lan743x_csr_write(adapter, RX_CFG_C(rx->channel_number), data); 2450 2451 rx->last_tail = ((u32)(rx->ring_size - 1)); 2452 lan743x_csr_write(adapter, RX_TAIL(rx->channel_number), 2453 rx->last_tail); 2454 rx->last_head = lan743x_csr_read(adapter, RX_HEAD(rx->channel_number)); 2455 if (rx->last_head) { 2456 ret = -EIO; 2457 goto napi_delete; 2458 } 2459 2460 napi_enable(&rx->napi); 2461 2462 lan743x_csr_write(adapter, INT_EN_SET, 2463 INT_BIT_DMA_RX_(rx->channel_number)); 2464 lan743x_csr_write(adapter, DMAC_INT_STS, 2465 DMAC_INT_BIT_RXFRM_(rx->channel_number)); 2466 lan743x_csr_write(adapter, DMAC_INT_EN_SET, 2467 DMAC_INT_BIT_RXFRM_(rx->channel_number)); 2468 lan743x_csr_write(adapter, DMAC_CMD, 2469 DMAC_CMD_START_R_(rx->channel_number)); 2470 2471 /* initialize fifo */ 2472 lan743x_csr_write(adapter, FCT_RX_CTL, 2473 FCT_RX_CTL_RESET_(rx->channel_number)); 2474 lan743x_csr_wait_for_bit(adapter, FCT_RX_CTL, 2475 FCT_RX_CTL_RESET_(rx->channel_number), 2476 0, 1000, 20000, 100); 2477 lan743x_csr_write(adapter, FCT_FLOW(rx->channel_number), 2478 FCT_FLOW_CTL_REQ_EN_ | 2479 FCT_FLOW_CTL_ON_THRESHOLD_SET_(0x2A) | 2480 FCT_FLOW_CTL_OFF_THRESHOLD_SET_(0xA)); 2481 2482 /* enable fifo */ 2483 lan743x_csr_write(adapter, FCT_RX_CTL, 2484 FCT_RX_CTL_EN_(rx->channel_number)); 2485 return 0; 2486 2487 napi_delete: 2488 netif_napi_del(&rx->napi); 2489 lan743x_rx_ring_cleanup(rx); 2490 2491 return_error: 2492 return ret; 2493 } 2494 2495 static int lan743x_netdev_close(struct net_device *netdev) 2496 { 2497 struct lan743x_adapter *adapter = netdev_priv(netdev); 2498 int index; 2499 2500 lan743x_tx_close(&adapter->tx[0]); 2501 2502 for (index = 0; index < LAN743X_USED_RX_CHANNELS; index++) 2503 lan743x_rx_close(&adapter->rx[index]); 2504 2505 lan743x_ptp_close(adapter); 2506 2507 lan743x_phy_close(adapter); 2508 2509 lan743x_mac_close(adapter); 2510 2511 lan743x_intr_close(adapter); 2512 2513 return 0; 2514 } 2515 2516 static int lan743x_netdev_open(struct net_device *netdev) 2517 { 2518 struct lan743x_adapter *adapter = netdev_priv(netdev); 2519 int index; 2520 int ret; 2521 2522 ret = lan743x_intr_open(adapter); 2523 if (ret) 2524 goto return_error; 2525 2526 ret = lan743x_mac_open(adapter); 2527 if (ret) 2528 goto close_intr; 2529 2530 ret = lan743x_phy_open(adapter); 2531 if (ret) 2532 goto close_mac; 2533 2534 ret = lan743x_ptp_open(adapter); 2535 if (ret) 2536 goto close_phy; 2537 2538 lan743x_rfe_open(adapter); 2539 2540 for (index = 0; index < LAN743X_USED_RX_CHANNELS; index++) { 2541 ret = lan743x_rx_open(&adapter->rx[index]); 2542 if (ret) 2543 goto close_rx; 2544 } 2545 2546 ret = lan743x_tx_open(&adapter->tx[0]); 2547 if (ret) 2548 goto close_rx; 2549 2550 return 0; 2551 2552 close_rx: 2553 for (index = 0; index < LAN743X_USED_RX_CHANNELS; index++) { 2554 if (adapter->rx[index].ring_cpu_ptr) 2555 lan743x_rx_close(&adapter->rx[index]); 2556 } 2557 lan743x_ptp_close(adapter); 2558 2559 close_phy: 2560 lan743x_phy_close(adapter); 2561 2562 close_mac: 2563 lan743x_mac_close(adapter); 2564 2565 close_intr: 2566 lan743x_intr_close(adapter); 2567 2568 return_error: 2569 netif_warn(adapter, ifup, adapter->netdev, 2570 "Error opening LAN743x\n"); 2571 return ret; 2572 } 2573 2574 static netdev_tx_t lan743x_netdev_xmit_frame(struct sk_buff *skb, 2575 struct net_device *netdev) 2576 { 2577 struct lan743x_adapter *adapter = netdev_priv(netdev); 2578 2579 return lan743x_tx_xmit_frame(&adapter->tx[0], skb); 2580 } 2581 2582 static int lan743x_netdev_ioctl(struct net_device *netdev, 2583 struct ifreq *ifr, int cmd) 2584 { 2585 if (!netif_running(netdev)) 2586 return -EINVAL; 2587 if (cmd == SIOCSHWTSTAMP) 2588 return lan743x_ptp_ioctl(netdev, ifr, cmd); 2589 return phy_mii_ioctl(netdev->phydev, ifr, cmd); 2590 } 2591 2592 static void lan743x_netdev_set_multicast(struct net_device *netdev) 2593 { 2594 struct lan743x_adapter *adapter = netdev_priv(netdev); 2595 2596 lan743x_rfe_set_multicast(adapter); 2597 } 2598 2599 static int lan743x_netdev_change_mtu(struct net_device *netdev, int new_mtu) 2600 { 2601 struct lan743x_adapter *adapter = netdev_priv(netdev); 2602 int ret = 0; 2603 2604 ret = lan743x_mac_set_mtu(adapter, new_mtu); 2605 if (!ret) 2606 netdev->mtu = new_mtu; 2607 return ret; 2608 } 2609 2610 static void lan743x_netdev_get_stats64(struct net_device *netdev, 2611 struct rtnl_link_stats64 *stats) 2612 { 2613 struct lan743x_adapter *adapter = netdev_priv(netdev); 2614 2615 stats->rx_packets = lan743x_csr_read(adapter, STAT_RX_TOTAL_FRAMES); 2616 stats->tx_packets = lan743x_csr_read(adapter, STAT_TX_TOTAL_FRAMES); 2617 stats->rx_bytes = lan743x_csr_read(adapter, 2618 STAT_RX_UNICAST_BYTE_COUNT) + 2619 lan743x_csr_read(adapter, 2620 STAT_RX_BROADCAST_BYTE_COUNT) + 2621 lan743x_csr_read(adapter, 2622 STAT_RX_MULTICAST_BYTE_COUNT); 2623 stats->tx_bytes = lan743x_csr_read(adapter, 2624 STAT_TX_UNICAST_BYTE_COUNT) + 2625 lan743x_csr_read(adapter, 2626 STAT_TX_BROADCAST_BYTE_COUNT) + 2627 lan743x_csr_read(adapter, 2628 STAT_TX_MULTICAST_BYTE_COUNT); 2629 stats->rx_errors = lan743x_csr_read(adapter, STAT_RX_FCS_ERRORS) + 2630 lan743x_csr_read(adapter, 2631 STAT_RX_ALIGNMENT_ERRORS) + 2632 lan743x_csr_read(adapter, STAT_RX_JABBER_ERRORS) + 2633 lan743x_csr_read(adapter, 2634 STAT_RX_UNDERSIZE_FRAME_ERRORS) + 2635 lan743x_csr_read(adapter, 2636 STAT_RX_OVERSIZE_FRAME_ERRORS); 2637 stats->tx_errors = lan743x_csr_read(adapter, STAT_TX_FCS_ERRORS) + 2638 lan743x_csr_read(adapter, 2639 STAT_TX_EXCESS_DEFERRAL_ERRORS) + 2640 lan743x_csr_read(adapter, STAT_TX_CARRIER_ERRORS); 2641 stats->rx_dropped = lan743x_csr_read(adapter, 2642 STAT_RX_DROPPED_FRAMES); 2643 stats->tx_dropped = lan743x_csr_read(adapter, 2644 STAT_TX_EXCESSIVE_COLLISION); 2645 stats->multicast = lan743x_csr_read(adapter, 2646 STAT_RX_MULTICAST_FRAMES) + 2647 lan743x_csr_read(adapter, 2648 STAT_TX_MULTICAST_FRAMES); 2649 stats->collisions = lan743x_csr_read(adapter, 2650 STAT_TX_SINGLE_COLLISIONS) + 2651 lan743x_csr_read(adapter, 2652 STAT_TX_MULTIPLE_COLLISIONS) + 2653 lan743x_csr_read(adapter, 2654 STAT_TX_LATE_COLLISIONS); 2655 } 2656 2657 static int lan743x_netdev_set_mac_address(struct net_device *netdev, 2658 void *addr) 2659 { 2660 struct lan743x_adapter *adapter = netdev_priv(netdev); 2661 struct sockaddr *sock_addr = addr; 2662 int ret; 2663 2664 ret = eth_prepare_mac_addr_change(netdev, sock_addr); 2665 if (ret) 2666 return ret; 2667 eth_hw_addr_set(netdev, sock_addr->sa_data); 2668 lan743x_mac_set_address(adapter, sock_addr->sa_data); 2669 lan743x_rfe_update_mac_address(adapter); 2670 return 0; 2671 } 2672 2673 static const struct net_device_ops lan743x_netdev_ops = { 2674 .ndo_open = lan743x_netdev_open, 2675 .ndo_stop = lan743x_netdev_close, 2676 .ndo_start_xmit = lan743x_netdev_xmit_frame, 2677 .ndo_eth_ioctl = lan743x_netdev_ioctl, 2678 .ndo_set_rx_mode = lan743x_netdev_set_multicast, 2679 .ndo_change_mtu = lan743x_netdev_change_mtu, 2680 .ndo_get_stats64 = lan743x_netdev_get_stats64, 2681 .ndo_set_mac_address = lan743x_netdev_set_mac_address, 2682 }; 2683 2684 static void lan743x_hardware_cleanup(struct lan743x_adapter *adapter) 2685 { 2686 lan743x_csr_write(adapter, INT_EN_CLR, 0xFFFFFFFF); 2687 } 2688 2689 static void lan743x_mdiobus_cleanup(struct lan743x_adapter *adapter) 2690 { 2691 mdiobus_unregister(adapter->mdiobus); 2692 } 2693 2694 static void lan743x_full_cleanup(struct lan743x_adapter *adapter) 2695 { 2696 unregister_netdev(adapter->netdev); 2697 2698 lan743x_mdiobus_cleanup(adapter); 2699 lan743x_hardware_cleanup(adapter); 2700 lan743x_pci_cleanup(adapter); 2701 } 2702 2703 static int lan743x_hardware_init(struct lan743x_adapter *adapter, 2704 struct pci_dev *pdev) 2705 { 2706 struct lan743x_tx *tx; 2707 int index; 2708 int ret; 2709 2710 adapter->intr.irq = adapter->pdev->irq; 2711 lan743x_csr_write(adapter, INT_EN_CLR, 0xFFFFFFFF); 2712 2713 ret = lan743x_gpio_init(adapter); 2714 if (ret) 2715 return ret; 2716 2717 ret = lan743x_mac_init(adapter); 2718 if (ret) 2719 return ret; 2720 2721 ret = lan743x_phy_init(adapter); 2722 if (ret) 2723 return ret; 2724 2725 ret = lan743x_ptp_init(adapter); 2726 if (ret) 2727 return ret; 2728 2729 lan743x_rfe_update_mac_address(adapter); 2730 2731 ret = lan743x_dmac_init(adapter); 2732 if (ret) 2733 return ret; 2734 2735 for (index = 0; index < LAN743X_USED_RX_CHANNELS; index++) { 2736 adapter->rx[index].adapter = adapter; 2737 adapter->rx[index].channel_number = index; 2738 } 2739 2740 tx = &adapter->tx[0]; 2741 tx->adapter = adapter; 2742 tx->channel_number = 0; 2743 spin_lock_init(&tx->ring_lock); 2744 return 0; 2745 } 2746 2747 static int lan743x_mdiobus_init(struct lan743x_adapter *adapter) 2748 { 2749 int ret; 2750 2751 adapter->mdiobus = devm_mdiobus_alloc(&adapter->pdev->dev); 2752 if (!(adapter->mdiobus)) { 2753 ret = -ENOMEM; 2754 goto return_error; 2755 } 2756 2757 adapter->mdiobus->priv = (void *)adapter; 2758 adapter->mdiobus->read = lan743x_mdiobus_read; 2759 adapter->mdiobus->write = lan743x_mdiobus_write; 2760 adapter->mdiobus->name = "lan743x-mdiobus"; 2761 snprintf(adapter->mdiobus->id, MII_BUS_ID_SIZE, 2762 "pci-%s", pci_name(adapter->pdev)); 2763 2764 if ((adapter->csr.id_rev & ID_REV_ID_MASK_) == ID_REV_ID_LAN7430_) 2765 /* LAN7430 uses internal phy at address 1 */ 2766 adapter->mdiobus->phy_mask = ~(u32)BIT(1); 2767 2768 /* register mdiobus */ 2769 ret = mdiobus_register(adapter->mdiobus); 2770 if (ret < 0) 2771 goto return_error; 2772 return 0; 2773 2774 return_error: 2775 return ret; 2776 } 2777 2778 /* lan743x_pcidev_probe - Device Initialization Routine 2779 * @pdev: PCI device information struct 2780 * @id: entry in lan743x_pci_tbl 2781 * 2782 * Returns 0 on success, negative on failure 2783 * 2784 * initializes an adapter identified by a pci_dev structure. 2785 * The OS initialization, configuring of the adapter private structure, 2786 * and a hardware reset occur. 2787 **/ 2788 static int lan743x_pcidev_probe(struct pci_dev *pdev, 2789 const struct pci_device_id *id) 2790 { 2791 struct lan743x_adapter *adapter = NULL; 2792 struct net_device *netdev = NULL; 2793 int ret = -ENODEV; 2794 2795 netdev = devm_alloc_etherdev(&pdev->dev, 2796 sizeof(struct lan743x_adapter)); 2797 if (!netdev) 2798 goto return_error; 2799 2800 SET_NETDEV_DEV(netdev, &pdev->dev); 2801 pci_set_drvdata(pdev, netdev); 2802 adapter = netdev_priv(netdev); 2803 adapter->netdev = netdev; 2804 adapter->msg_enable = NETIF_MSG_DRV | NETIF_MSG_PROBE | 2805 NETIF_MSG_LINK | NETIF_MSG_IFUP | 2806 NETIF_MSG_IFDOWN | NETIF_MSG_TX_QUEUED; 2807 netdev->max_mtu = LAN743X_MAX_FRAME_SIZE; 2808 2809 of_get_mac_address(pdev->dev.of_node, adapter->mac_address); 2810 2811 ret = lan743x_pci_init(adapter, pdev); 2812 if (ret) 2813 goto return_error; 2814 2815 ret = lan743x_csr_init(adapter); 2816 if (ret) 2817 goto cleanup_pci; 2818 2819 ret = lan743x_hardware_init(adapter, pdev); 2820 if (ret) 2821 goto cleanup_pci; 2822 2823 ret = lan743x_mdiobus_init(adapter); 2824 if (ret) 2825 goto cleanup_hardware; 2826 2827 adapter->netdev->netdev_ops = &lan743x_netdev_ops; 2828 adapter->netdev->ethtool_ops = &lan743x_ethtool_ops; 2829 adapter->netdev->features = NETIF_F_SG | NETIF_F_TSO | NETIF_F_HW_CSUM; 2830 adapter->netdev->hw_features = adapter->netdev->features; 2831 2832 /* carrier off reporting is important to ethtool even BEFORE open */ 2833 netif_carrier_off(netdev); 2834 2835 ret = register_netdev(adapter->netdev); 2836 if (ret < 0) 2837 goto cleanup_mdiobus; 2838 return 0; 2839 2840 cleanup_mdiobus: 2841 lan743x_mdiobus_cleanup(adapter); 2842 2843 cleanup_hardware: 2844 lan743x_hardware_cleanup(adapter); 2845 2846 cleanup_pci: 2847 lan743x_pci_cleanup(adapter); 2848 2849 return_error: 2850 pr_warn("Initialization failed\n"); 2851 return ret; 2852 } 2853 2854 /** 2855 * lan743x_pcidev_remove - Device Removal Routine 2856 * @pdev: PCI device information struct 2857 * 2858 * this is called by the PCI subsystem to alert the driver 2859 * that it should release a PCI device. This could be caused by a 2860 * Hot-Plug event, or because the driver is going to be removed from 2861 * memory. 2862 **/ 2863 static void lan743x_pcidev_remove(struct pci_dev *pdev) 2864 { 2865 struct net_device *netdev = pci_get_drvdata(pdev); 2866 struct lan743x_adapter *adapter = netdev_priv(netdev); 2867 2868 lan743x_full_cleanup(adapter); 2869 } 2870 2871 static void lan743x_pcidev_shutdown(struct pci_dev *pdev) 2872 { 2873 struct net_device *netdev = pci_get_drvdata(pdev); 2874 struct lan743x_adapter *adapter = netdev_priv(netdev); 2875 2876 rtnl_lock(); 2877 netif_device_detach(netdev); 2878 2879 /* close netdev when netdev is at running state. 2880 * For instance, it is true when system goes to sleep by pm-suspend 2881 * However, it is false when system goes to sleep by suspend GUI menu 2882 */ 2883 if (netif_running(netdev)) 2884 lan743x_netdev_close(netdev); 2885 rtnl_unlock(); 2886 2887 #ifdef CONFIG_PM 2888 pci_save_state(pdev); 2889 #endif 2890 2891 /* clean up lan743x portion */ 2892 lan743x_hardware_cleanup(adapter); 2893 } 2894 2895 #ifdef CONFIG_PM_SLEEP 2896 static u16 lan743x_pm_wakeframe_crc16(const u8 *buf, int len) 2897 { 2898 return bitrev16(crc16(0xFFFF, buf, len)); 2899 } 2900 2901 static void lan743x_pm_set_wol(struct lan743x_adapter *adapter) 2902 { 2903 const u8 ipv4_multicast[3] = { 0x01, 0x00, 0x5E }; 2904 const u8 ipv6_multicast[3] = { 0x33, 0x33 }; 2905 const u8 arp_type[2] = { 0x08, 0x06 }; 2906 int mask_index; 2907 u32 pmtctl; 2908 u32 wucsr; 2909 u32 macrx; 2910 u16 crc; 2911 2912 for (mask_index = 0; mask_index < MAC_NUM_OF_WUF_CFG; mask_index++) 2913 lan743x_csr_write(adapter, MAC_WUF_CFG(mask_index), 0); 2914 2915 /* clear wake settings */ 2916 pmtctl = lan743x_csr_read(adapter, PMT_CTL); 2917 pmtctl |= PMT_CTL_WUPS_MASK_; 2918 pmtctl &= ~(PMT_CTL_GPIO_WAKEUP_EN_ | PMT_CTL_EEE_WAKEUP_EN_ | 2919 PMT_CTL_WOL_EN_ | PMT_CTL_MAC_D3_RX_CLK_OVR_ | 2920 PMT_CTL_RX_FCT_RFE_D3_CLK_OVR_ | PMT_CTL_ETH_PHY_WAKE_EN_); 2921 2922 macrx = lan743x_csr_read(adapter, MAC_RX); 2923 2924 wucsr = 0; 2925 mask_index = 0; 2926 2927 pmtctl |= PMT_CTL_ETH_PHY_D3_COLD_OVR_ | PMT_CTL_ETH_PHY_D3_OVR_; 2928 2929 if (adapter->wolopts & WAKE_PHY) { 2930 pmtctl |= PMT_CTL_ETH_PHY_EDPD_PLL_CTL_; 2931 pmtctl |= PMT_CTL_ETH_PHY_WAKE_EN_; 2932 } 2933 if (adapter->wolopts & WAKE_MAGIC) { 2934 wucsr |= MAC_WUCSR_MPEN_; 2935 macrx |= MAC_RX_RXEN_; 2936 pmtctl |= PMT_CTL_WOL_EN_ | PMT_CTL_MAC_D3_RX_CLK_OVR_; 2937 } 2938 if (adapter->wolopts & WAKE_UCAST) { 2939 wucsr |= MAC_WUCSR_RFE_WAKE_EN_ | MAC_WUCSR_PFDA_EN_; 2940 macrx |= MAC_RX_RXEN_; 2941 pmtctl |= PMT_CTL_WOL_EN_ | PMT_CTL_MAC_D3_RX_CLK_OVR_; 2942 pmtctl |= PMT_CTL_RX_FCT_RFE_D3_CLK_OVR_; 2943 } 2944 if (adapter->wolopts & WAKE_BCAST) { 2945 wucsr |= MAC_WUCSR_RFE_WAKE_EN_ | MAC_WUCSR_BCST_EN_; 2946 macrx |= MAC_RX_RXEN_; 2947 pmtctl |= PMT_CTL_WOL_EN_ | PMT_CTL_MAC_D3_RX_CLK_OVR_; 2948 pmtctl |= PMT_CTL_RX_FCT_RFE_D3_CLK_OVR_; 2949 } 2950 if (adapter->wolopts & WAKE_MCAST) { 2951 /* IPv4 multicast */ 2952 crc = lan743x_pm_wakeframe_crc16(ipv4_multicast, 3); 2953 lan743x_csr_write(adapter, MAC_WUF_CFG(mask_index), 2954 MAC_WUF_CFG_EN_ | MAC_WUF_CFG_TYPE_MCAST_ | 2955 (0 << MAC_WUF_CFG_OFFSET_SHIFT_) | 2956 (crc & MAC_WUF_CFG_CRC16_MASK_)); 2957 lan743x_csr_write(adapter, MAC_WUF_MASK0(mask_index), 7); 2958 lan743x_csr_write(adapter, MAC_WUF_MASK1(mask_index), 0); 2959 lan743x_csr_write(adapter, MAC_WUF_MASK2(mask_index), 0); 2960 lan743x_csr_write(adapter, MAC_WUF_MASK3(mask_index), 0); 2961 mask_index++; 2962 2963 /* IPv6 multicast */ 2964 crc = lan743x_pm_wakeframe_crc16(ipv6_multicast, 2); 2965 lan743x_csr_write(adapter, MAC_WUF_CFG(mask_index), 2966 MAC_WUF_CFG_EN_ | MAC_WUF_CFG_TYPE_MCAST_ | 2967 (0 << MAC_WUF_CFG_OFFSET_SHIFT_) | 2968 (crc & MAC_WUF_CFG_CRC16_MASK_)); 2969 lan743x_csr_write(adapter, MAC_WUF_MASK0(mask_index), 3); 2970 lan743x_csr_write(adapter, MAC_WUF_MASK1(mask_index), 0); 2971 lan743x_csr_write(adapter, MAC_WUF_MASK2(mask_index), 0); 2972 lan743x_csr_write(adapter, MAC_WUF_MASK3(mask_index), 0); 2973 mask_index++; 2974 2975 wucsr |= MAC_WUCSR_RFE_WAKE_EN_ | MAC_WUCSR_WAKE_EN_; 2976 macrx |= MAC_RX_RXEN_; 2977 pmtctl |= PMT_CTL_WOL_EN_ | PMT_CTL_MAC_D3_RX_CLK_OVR_; 2978 pmtctl |= PMT_CTL_RX_FCT_RFE_D3_CLK_OVR_; 2979 } 2980 if (adapter->wolopts & WAKE_ARP) { 2981 /* set MAC_WUF_CFG & WUF_MASK 2982 * for packettype (offset 12,13) = ARP (0x0806) 2983 */ 2984 crc = lan743x_pm_wakeframe_crc16(arp_type, 2); 2985 lan743x_csr_write(adapter, MAC_WUF_CFG(mask_index), 2986 MAC_WUF_CFG_EN_ | MAC_WUF_CFG_TYPE_ALL_ | 2987 (0 << MAC_WUF_CFG_OFFSET_SHIFT_) | 2988 (crc & MAC_WUF_CFG_CRC16_MASK_)); 2989 lan743x_csr_write(adapter, MAC_WUF_MASK0(mask_index), 0x3000); 2990 lan743x_csr_write(adapter, MAC_WUF_MASK1(mask_index), 0); 2991 lan743x_csr_write(adapter, MAC_WUF_MASK2(mask_index), 0); 2992 lan743x_csr_write(adapter, MAC_WUF_MASK3(mask_index), 0); 2993 mask_index++; 2994 2995 wucsr |= MAC_WUCSR_RFE_WAKE_EN_ | MAC_WUCSR_WAKE_EN_; 2996 macrx |= MAC_RX_RXEN_; 2997 pmtctl |= PMT_CTL_WOL_EN_ | PMT_CTL_MAC_D3_RX_CLK_OVR_; 2998 pmtctl |= PMT_CTL_RX_FCT_RFE_D3_CLK_OVR_; 2999 } 3000 3001 lan743x_csr_write(adapter, MAC_WUCSR, wucsr); 3002 lan743x_csr_write(adapter, PMT_CTL, pmtctl); 3003 lan743x_csr_write(adapter, MAC_RX, macrx); 3004 } 3005 3006 static int lan743x_pm_suspend(struct device *dev) 3007 { 3008 struct pci_dev *pdev = to_pci_dev(dev); 3009 struct net_device *netdev = pci_get_drvdata(pdev); 3010 struct lan743x_adapter *adapter = netdev_priv(netdev); 3011 3012 lan743x_pcidev_shutdown(pdev); 3013 3014 /* clear all wakes */ 3015 lan743x_csr_write(adapter, MAC_WUCSR, 0); 3016 lan743x_csr_write(adapter, MAC_WUCSR2, 0); 3017 lan743x_csr_write(adapter, MAC_WK_SRC, 0xFFFFFFFF); 3018 3019 if (adapter->wolopts) 3020 lan743x_pm_set_wol(adapter); 3021 3022 /* Host sets PME_En, put D3hot */ 3023 return pci_prepare_to_sleep(pdev); 3024 } 3025 3026 static int lan743x_pm_resume(struct device *dev) 3027 { 3028 struct pci_dev *pdev = to_pci_dev(dev); 3029 struct net_device *netdev = pci_get_drvdata(pdev); 3030 struct lan743x_adapter *adapter = netdev_priv(netdev); 3031 int ret; 3032 3033 pci_set_power_state(pdev, PCI_D0); 3034 pci_restore_state(pdev); 3035 pci_save_state(pdev); 3036 3037 ret = lan743x_hardware_init(adapter, pdev); 3038 if (ret) { 3039 netif_err(adapter, probe, adapter->netdev, 3040 "lan743x_hardware_init returned %d\n", ret); 3041 lan743x_pci_cleanup(adapter); 3042 return ret; 3043 } 3044 3045 /* open netdev when netdev is at running state while resume. 3046 * For instance, it is true when system wakesup after pm-suspend 3047 * However, it is false when system wakes up after suspend GUI menu 3048 */ 3049 if (netif_running(netdev)) 3050 lan743x_netdev_open(netdev); 3051 3052 netif_device_attach(netdev); 3053 3054 return 0; 3055 } 3056 3057 static const struct dev_pm_ops lan743x_pm_ops = { 3058 SET_SYSTEM_SLEEP_PM_OPS(lan743x_pm_suspend, lan743x_pm_resume) 3059 }; 3060 #endif /* CONFIG_PM_SLEEP */ 3061 3062 static const struct pci_device_id lan743x_pcidev_tbl[] = { 3063 { PCI_DEVICE(PCI_VENDOR_ID_SMSC, PCI_DEVICE_ID_SMSC_LAN7430) }, 3064 { PCI_DEVICE(PCI_VENDOR_ID_SMSC, PCI_DEVICE_ID_SMSC_LAN7431) }, 3065 { 0, } 3066 }; 3067 3068 MODULE_DEVICE_TABLE(pci, lan743x_pcidev_tbl); 3069 3070 static struct pci_driver lan743x_pcidev_driver = { 3071 .name = DRIVER_NAME, 3072 .id_table = lan743x_pcidev_tbl, 3073 .probe = lan743x_pcidev_probe, 3074 .remove = lan743x_pcidev_remove, 3075 #ifdef CONFIG_PM_SLEEP 3076 .driver.pm = &lan743x_pm_ops, 3077 #endif 3078 .shutdown = lan743x_pcidev_shutdown, 3079 }; 3080 3081 module_pci_driver(lan743x_pcidev_driver); 3082 3083 MODULE_AUTHOR(DRIVER_AUTHOR); 3084 MODULE_DESCRIPTION(DRIVER_DESC); 3085 MODULE_LICENSE("GPL"); 3086