1 /* SPDX-License-Identifier: GPL-2.0+ */ 2 /* Copyright (C) 2018 Microchip Technology Inc. */ 3 4 #include <linux/module.h> 5 #include <linux/pci.h> 6 #include <linux/netdevice.h> 7 #include <linux/etherdevice.h> 8 #include <linux/crc32.h> 9 #include <linux/microchipphy.h> 10 #include <linux/net_tstamp.h> 11 #include <linux/of_mdio.h> 12 #include <linux/of_net.h> 13 #include <linux/phy.h> 14 #include <linux/phy_fixed.h> 15 #include <linux/rtnetlink.h> 16 #include <linux/iopoll.h> 17 #include <linux/crc16.h> 18 #include "lan743x_main.h" 19 #include "lan743x_ethtool.h" 20 21 #define MMD_ACCESS_ADDRESS 0 22 #define MMD_ACCESS_WRITE 1 23 #define MMD_ACCESS_READ 2 24 #define MMD_ACCESS_READ_INC 3 25 #define PCS_POWER_STATE_DOWN 0x6 26 #define PCS_POWER_STATE_UP 0x4 27 28 #define RFE_RD_FIFO_TH_3_DWORDS 0x3 29 30 static void pci11x1x_strap_get_status(struct lan743x_adapter *adapter) 31 { 32 u32 chip_rev; 33 u32 cfg_load; 34 u32 hw_cfg; 35 u32 strap; 36 int ret; 37 38 /* Timeout = 100 (i.e. 1 sec (10 msce * 100)) */ 39 ret = lan743x_hs_syslock_acquire(adapter, 100); 40 if (ret < 0) { 41 netif_err(adapter, drv, adapter->netdev, 42 "Sys Lock acquire failed ret:%d\n", ret); 43 return; 44 } 45 46 cfg_load = lan743x_csr_read(adapter, ETH_SYS_CONFIG_LOAD_STARTED_REG); 47 lan743x_hs_syslock_release(adapter); 48 hw_cfg = lan743x_csr_read(adapter, HW_CFG); 49 50 if (cfg_load & GEN_SYS_LOAD_STARTED_REG_ETH_ || 51 hw_cfg & HW_CFG_RST_PROTECT_) { 52 strap = lan743x_csr_read(adapter, STRAP_READ); 53 if (strap & STRAP_READ_SGMII_EN_) 54 adapter->is_sgmii_en = true; 55 else 56 adapter->is_sgmii_en = false; 57 } else { 58 chip_rev = lan743x_csr_read(adapter, FPGA_REV); 59 if (chip_rev) { 60 if (chip_rev & FPGA_SGMII_OP) 61 adapter->is_sgmii_en = true; 62 else 63 adapter->is_sgmii_en = false; 64 } else { 65 adapter->is_sgmii_en = false; 66 } 67 } 68 netif_dbg(adapter, drv, adapter->netdev, 69 "SGMII I/F %sable\n", adapter->is_sgmii_en ? "En" : "Dis"); 70 } 71 72 static bool is_pci11x1x_chip(struct lan743x_adapter *adapter) 73 { 74 struct lan743x_csr *csr = &adapter->csr; 75 u32 id_rev = csr->id_rev; 76 77 if (((id_rev & 0xFFFF0000) == ID_REV_ID_A011_) || 78 ((id_rev & 0xFFFF0000) == ID_REV_ID_A041_)) { 79 return true; 80 } 81 return false; 82 } 83 84 static void lan743x_pci_cleanup(struct lan743x_adapter *adapter) 85 { 86 pci_release_selected_regions(adapter->pdev, 87 pci_select_bars(adapter->pdev, 88 IORESOURCE_MEM)); 89 pci_disable_device(adapter->pdev); 90 } 91 92 static int lan743x_pci_init(struct lan743x_adapter *adapter, 93 struct pci_dev *pdev) 94 { 95 unsigned long bars = 0; 96 int ret; 97 98 adapter->pdev = pdev; 99 ret = pci_enable_device_mem(pdev); 100 if (ret) 101 goto return_error; 102 103 netif_info(adapter, probe, adapter->netdev, 104 "PCI: Vendor ID = 0x%04X, Device ID = 0x%04X\n", 105 pdev->vendor, pdev->device); 106 bars = pci_select_bars(pdev, IORESOURCE_MEM); 107 if (!test_bit(0, &bars)) 108 goto disable_device; 109 110 ret = pci_request_selected_regions(pdev, bars, DRIVER_NAME); 111 if (ret) 112 goto disable_device; 113 114 pci_set_master(pdev); 115 return 0; 116 117 disable_device: 118 pci_disable_device(adapter->pdev); 119 120 return_error: 121 return ret; 122 } 123 124 u32 lan743x_csr_read(struct lan743x_adapter *adapter, int offset) 125 { 126 return ioread32(&adapter->csr.csr_address[offset]); 127 } 128 129 void lan743x_csr_write(struct lan743x_adapter *adapter, int offset, 130 u32 data) 131 { 132 iowrite32(data, &adapter->csr.csr_address[offset]); 133 } 134 135 #define LAN743X_CSR_READ_OP(offset) lan743x_csr_read(adapter, offset) 136 137 static int lan743x_csr_light_reset(struct lan743x_adapter *adapter) 138 { 139 u32 data; 140 141 data = lan743x_csr_read(adapter, HW_CFG); 142 data |= HW_CFG_LRST_; 143 lan743x_csr_write(adapter, HW_CFG, data); 144 145 return readx_poll_timeout(LAN743X_CSR_READ_OP, HW_CFG, data, 146 !(data & HW_CFG_LRST_), 100000, 10000000); 147 } 148 149 static int lan743x_csr_wait_for_bit_atomic(struct lan743x_adapter *adapter, 150 int offset, u32 bit_mask, 151 int target_value, int udelay_min, 152 int udelay_max, int count) 153 { 154 u32 data; 155 156 return readx_poll_timeout_atomic(LAN743X_CSR_READ_OP, offset, data, 157 target_value == !!(data & bit_mask), 158 udelay_max, udelay_min * count); 159 } 160 161 static int lan743x_csr_wait_for_bit(struct lan743x_adapter *adapter, 162 int offset, u32 bit_mask, 163 int target_value, int usleep_min, 164 int usleep_max, int count) 165 { 166 u32 data; 167 168 return readx_poll_timeout(LAN743X_CSR_READ_OP, offset, data, 169 target_value == !!(data & bit_mask), 170 usleep_max, usleep_min * count); 171 } 172 173 static int lan743x_csr_init(struct lan743x_adapter *adapter) 174 { 175 struct lan743x_csr *csr = &adapter->csr; 176 resource_size_t bar_start, bar_length; 177 178 bar_start = pci_resource_start(adapter->pdev, 0); 179 bar_length = pci_resource_len(adapter->pdev, 0); 180 csr->csr_address = devm_ioremap(&adapter->pdev->dev, 181 bar_start, bar_length); 182 if (!csr->csr_address) 183 return -ENOMEM; 184 185 csr->id_rev = lan743x_csr_read(adapter, ID_REV); 186 csr->fpga_rev = lan743x_csr_read(adapter, FPGA_REV); 187 netif_info(adapter, probe, adapter->netdev, 188 "ID_REV = 0x%08X, FPGA_REV = %d.%d\n", 189 csr->id_rev, FPGA_REV_GET_MAJOR_(csr->fpga_rev), 190 FPGA_REV_GET_MINOR_(csr->fpga_rev)); 191 if (!ID_REV_IS_VALID_CHIP_ID_(csr->id_rev)) 192 return -ENODEV; 193 194 csr->flags = LAN743X_CSR_FLAG_SUPPORTS_INTR_AUTO_SET_CLR; 195 switch (csr->id_rev & ID_REV_CHIP_REV_MASK_) { 196 case ID_REV_CHIP_REV_A0_: 197 csr->flags |= LAN743X_CSR_FLAG_IS_A0; 198 csr->flags &= ~LAN743X_CSR_FLAG_SUPPORTS_INTR_AUTO_SET_CLR; 199 break; 200 case ID_REV_CHIP_REV_B0_: 201 csr->flags |= LAN743X_CSR_FLAG_IS_B0; 202 break; 203 } 204 205 return lan743x_csr_light_reset(adapter); 206 } 207 208 static void lan743x_intr_software_isr(struct lan743x_adapter *adapter) 209 { 210 struct lan743x_intr *intr = &adapter->intr; 211 212 /* disable the interrupt to prevent repeated re-triggering */ 213 lan743x_csr_write(adapter, INT_EN_CLR, INT_BIT_SW_GP_); 214 intr->software_isr_flag = true; 215 wake_up(&intr->software_isr_wq); 216 } 217 218 static void lan743x_tx_isr(void *context, u32 int_sts, u32 flags) 219 { 220 struct lan743x_tx *tx = context; 221 struct lan743x_adapter *adapter = tx->adapter; 222 bool enable_flag = true; 223 224 lan743x_csr_read(adapter, INT_EN_SET); 225 if (flags & LAN743X_VECTOR_FLAG_SOURCE_ENABLE_CLEAR) { 226 lan743x_csr_write(adapter, INT_EN_CLR, 227 INT_BIT_DMA_TX_(tx->channel_number)); 228 } 229 230 if (int_sts & INT_BIT_DMA_TX_(tx->channel_number)) { 231 u32 ioc_bit = DMAC_INT_BIT_TX_IOC_(tx->channel_number); 232 u32 dmac_int_sts; 233 u32 dmac_int_en; 234 235 if (flags & LAN743X_VECTOR_FLAG_SOURCE_STATUS_READ) 236 dmac_int_sts = lan743x_csr_read(adapter, DMAC_INT_STS); 237 else 238 dmac_int_sts = ioc_bit; 239 if (flags & LAN743X_VECTOR_FLAG_SOURCE_ENABLE_CHECK) 240 dmac_int_en = lan743x_csr_read(adapter, 241 DMAC_INT_EN_SET); 242 else 243 dmac_int_en = ioc_bit; 244 245 dmac_int_en &= ioc_bit; 246 dmac_int_sts &= dmac_int_en; 247 if (dmac_int_sts & ioc_bit) { 248 napi_schedule(&tx->napi); 249 enable_flag = false;/* poll func will enable later */ 250 } 251 } 252 253 if (enable_flag) 254 /* enable isr */ 255 lan743x_csr_write(adapter, INT_EN_SET, 256 INT_BIT_DMA_TX_(tx->channel_number)); 257 } 258 259 static void lan743x_rx_isr(void *context, u32 int_sts, u32 flags) 260 { 261 struct lan743x_rx *rx = context; 262 struct lan743x_adapter *adapter = rx->adapter; 263 bool enable_flag = true; 264 265 if (flags & LAN743X_VECTOR_FLAG_SOURCE_ENABLE_CLEAR) { 266 lan743x_csr_write(adapter, INT_EN_CLR, 267 INT_BIT_DMA_RX_(rx->channel_number)); 268 } 269 270 if (int_sts & INT_BIT_DMA_RX_(rx->channel_number)) { 271 u32 rx_frame_bit = DMAC_INT_BIT_RXFRM_(rx->channel_number); 272 u32 dmac_int_sts; 273 u32 dmac_int_en; 274 275 if (flags & LAN743X_VECTOR_FLAG_SOURCE_STATUS_READ) 276 dmac_int_sts = lan743x_csr_read(adapter, DMAC_INT_STS); 277 else 278 dmac_int_sts = rx_frame_bit; 279 if (flags & LAN743X_VECTOR_FLAG_SOURCE_ENABLE_CHECK) 280 dmac_int_en = lan743x_csr_read(adapter, 281 DMAC_INT_EN_SET); 282 else 283 dmac_int_en = rx_frame_bit; 284 285 dmac_int_en &= rx_frame_bit; 286 dmac_int_sts &= dmac_int_en; 287 if (dmac_int_sts & rx_frame_bit) { 288 napi_schedule(&rx->napi); 289 enable_flag = false;/* poll funct will enable later */ 290 } 291 } 292 293 if (enable_flag) { 294 /* enable isr */ 295 lan743x_csr_write(adapter, INT_EN_SET, 296 INT_BIT_DMA_RX_(rx->channel_number)); 297 } 298 } 299 300 static void lan743x_intr_shared_isr(void *context, u32 int_sts, u32 flags) 301 { 302 struct lan743x_adapter *adapter = context; 303 unsigned int channel; 304 305 if (int_sts & INT_BIT_ALL_RX_) { 306 for (channel = 0; channel < LAN743X_USED_RX_CHANNELS; 307 channel++) { 308 u32 int_bit = INT_BIT_DMA_RX_(channel); 309 310 if (int_sts & int_bit) { 311 lan743x_rx_isr(&adapter->rx[channel], 312 int_bit, flags); 313 int_sts &= ~int_bit; 314 } 315 } 316 } 317 if (int_sts & INT_BIT_ALL_TX_) { 318 for (channel = 0; channel < adapter->used_tx_channels; 319 channel++) { 320 u32 int_bit = INT_BIT_DMA_TX_(channel); 321 322 if (int_sts & int_bit) { 323 lan743x_tx_isr(&adapter->tx[channel], 324 int_bit, flags); 325 int_sts &= ~int_bit; 326 } 327 } 328 } 329 if (int_sts & INT_BIT_ALL_OTHER_) { 330 if (int_sts & INT_BIT_SW_GP_) { 331 lan743x_intr_software_isr(adapter); 332 int_sts &= ~INT_BIT_SW_GP_; 333 } 334 if (int_sts & INT_BIT_1588_) { 335 lan743x_ptp_isr(adapter); 336 int_sts &= ~INT_BIT_1588_; 337 } 338 } 339 if (int_sts) 340 lan743x_csr_write(adapter, INT_EN_CLR, int_sts); 341 } 342 343 static irqreturn_t lan743x_intr_entry_isr(int irq, void *ptr) 344 { 345 struct lan743x_vector *vector = ptr; 346 struct lan743x_adapter *adapter = vector->adapter; 347 irqreturn_t result = IRQ_NONE; 348 u32 int_enables; 349 u32 int_sts; 350 351 if (vector->flags & LAN743X_VECTOR_FLAG_SOURCE_STATUS_READ) { 352 int_sts = lan743x_csr_read(adapter, INT_STS); 353 } else if (vector->flags & 354 (LAN743X_VECTOR_FLAG_SOURCE_STATUS_R2C | 355 LAN743X_VECTOR_FLAG_SOURCE_ENABLE_R2C)) { 356 int_sts = lan743x_csr_read(adapter, INT_STS_R2C); 357 } else { 358 /* use mask as implied status */ 359 int_sts = vector->int_mask | INT_BIT_MAS_; 360 } 361 362 if (!(int_sts & INT_BIT_MAS_)) 363 goto irq_done; 364 365 if (vector->flags & LAN743X_VECTOR_FLAG_VECTOR_ENABLE_ISR_CLEAR) 366 /* disable vector interrupt */ 367 lan743x_csr_write(adapter, 368 INT_VEC_EN_CLR, 369 INT_VEC_EN_(vector->vector_index)); 370 371 if (vector->flags & LAN743X_VECTOR_FLAG_MASTER_ENABLE_CLEAR) 372 /* disable master interrupt */ 373 lan743x_csr_write(adapter, INT_EN_CLR, INT_BIT_MAS_); 374 375 if (vector->flags & LAN743X_VECTOR_FLAG_SOURCE_ENABLE_CHECK) { 376 int_enables = lan743x_csr_read(adapter, INT_EN_SET); 377 } else { 378 /* use vector mask as implied enable mask */ 379 int_enables = vector->int_mask; 380 } 381 382 int_sts &= int_enables; 383 int_sts &= vector->int_mask; 384 if (int_sts) { 385 if (vector->handler) { 386 vector->handler(vector->context, 387 int_sts, vector->flags); 388 } else { 389 /* disable interrupts on this vector */ 390 lan743x_csr_write(adapter, INT_EN_CLR, 391 vector->int_mask); 392 } 393 result = IRQ_HANDLED; 394 } 395 396 if (vector->flags & LAN743X_VECTOR_FLAG_MASTER_ENABLE_SET) 397 /* enable master interrupt */ 398 lan743x_csr_write(adapter, INT_EN_SET, INT_BIT_MAS_); 399 400 if (vector->flags & LAN743X_VECTOR_FLAG_VECTOR_ENABLE_ISR_SET) 401 /* enable vector interrupt */ 402 lan743x_csr_write(adapter, 403 INT_VEC_EN_SET, 404 INT_VEC_EN_(vector->vector_index)); 405 irq_done: 406 return result; 407 } 408 409 static int lan743x_intr_test_isr(struct lan743x_adapter *adapter) 410 { 411 struct lan743x_intr *intr = &adapter->intr; 412 int ret; 413 414 intr->software_isr_flag = false; 415 416 /* enable and activate test interrupt */ 417 lan743x_csr_write(adapter, INT_EN_SET, INT_BIT_SW_GP_); 418 lan743x_csr_write(adapter, INT_SET, INT_BIT_SW_GP_); 419 420 ret = wait_event_timeout(intr->software_isr_wq, 421 intr->software_isr_flag, 422 msecs_to_jiffies(200)); 423 424 /* disable test interrupt */ 425 lan743x_csr_write(adapter, INT_EN_CLR, INT_BIT_SW_GP_); 426 427 return ret > 0 ? 0 : -ENODEV; 428 } 429 430 static int lan743x_intr_register_isr(struct lan743x_adapter *adapter, 431 int vector_index, u32 flags, 432 u32 int_mask, 433 lan743x_vector_handler handler, 434 void *context) 435 { 436 struct lan743x_vector *vector = &adapter->intr.vector_list 437 [vector_index]; 438 int ret; 439 440 vector->adapter = adapter; 441 vector->flags = flags; 442 vector->vector_index = vector_index; 443 vector->int_mask = int_mask; 444 vector->handler = handler; 445 vector->context = context; 446 447 ret = request_irq(vector->irq, 448 lan743x_intr_entry_isr, 449 (flags & LAN743X_VECTOR_FLAG_IRQ_SHARED) ? 450 IRQF_SHARED : 0, DRIVER_NAME, vector); 451 if (ret) { 452 vector->handler = NULL; 453 vector->context = NULL; 454 vector->int_mask = 0; 455 vector->flags = 0; 456 } 457 return ret; 458 } 459 460 static void lan743x_intr_unregister_isr(struct lan743x_adapter *adapter, 461 int vector_index) 462 { 463 struct lan743x_vector *vector = &adapter->intr.vector_list 464 [vector_index]; 465 466 free_irq(vector->irq, vector); 467 vector->handler = NULL; 468 vector->context = NULL; 469 vector->int_mask = 0; 470 vector->flags = 0; 471 } 472 473 static u32 lan743x_intr_get_vector_flags(struct lan743x_adapter *adapter, 474 u32 int_mask) 475 { 476 int index; 477 478 for (index = 0; index < adapter->max_vector_count; index++) { 479 if (adapter->intr.vector_list[index].int_mask & int_mask) 480 return adapter->intr.vector_list[index].flags; 481 } 482 return 0; 483 } 484 485 static void lan743x_intr_close(struct lan743x_adapter *adapter) 486 { 487 struct lan743x_intr *intr = &adapter->intr; 488 int index = 0; 489 490 lan743x_csr_write(adapter, INT_EN_CLR, INT_BIT_MAS_); 491 if (adapter->is_pci11x1x) 492 lan743x_csr_write(adapter, INT_VEC_EN_CLR, 0x0000FFFF); 493 else 494 lan743x_csr_write(adapter, INT_VEC_EN_CLR, 0x000000FF); 495 496 for (index = 0; index < intr->number_of_vectors; index++) { 497 if (intr->flags & INTR_FLAG_IRQ_REQUESTED(index)) { 498 lan743x_intr_unregister_isr(adapter, index); 499 intr->flags &= ~INTR_FLAG_IRQ_REQUESTED(index); 500 } 501 } 502 503 if (intr->flags & INTR_FLAG_MSI_ENABLED) { 504 pci_disable_msi(adapter->pdev); 505 intr->flags &= ~INTR_FLAG_MSI_ENABLED; 506 } 507 508 if (intr->flags & INTR_FLAG_MSIX_ENABLED) { 509 pci_disable_msix(adapter->pdev); 510 intr->flags &= ~INTR_FLAG_MSIX_ENABLED; 511 } 512 } 513 514 static int lan743x_intr_open(struct lan743x_adapter *adapter) 515 { 516 struct msix_entry msix_entries[PCI11X1X_MAX_VECTOR_COUNT]; 517 struct lan743x_intr *intr = &adapter->intr; 518 unsigned int used_tx_channels; 519 u32 int_vec_en_auto_clr = 0; 520 u8 max_vector_count; 521 u32 int_vec_map0 = 0; 522 u32 int_vec_map1 = 0; 523 int ret = -ENODEV; 524 int index = 0; 525 u32 flags = 0; 526 527 intr->number_of_vectors = 0; 528 529 /* Try to set up MSIX interrupts */ 530 max_vector_count = adapter->max_vector_count; 531 memset(&msix_entries[0], 0, 532 sizeof(struct msix_entry) * max_vector_count); 533 for (index = 0; index < max_vector_count; index++) 534 msix_entries[index].entry = index; 535 used_tx_channels = adapter->used_tx_channels; 536 ret = pci_enable_msix_range(adapter->pdev, 537 msix_entries, 1, 538 1 + used_tx_channels + 539 LAN743X_USED_RX_CHANNELS); 540 541 if (ret > 0) { 542 intr->flags |= INTR_FLAG_MSIX_ENABLED; 543 intr->number_of_vectors = ret; 544 intr->using_vectors = true; 545 for (index = 0; index < intr->number_of_vectors; index++) 546 intr->vector_list[index].irq = msix_entries 547 [index].vector; 548 netif_info(adapter, ifup, adapter->netdev, 549 "using MSIX interrupts, number of vectors = %d\n", 550 intr->number_of_vectors); 551 } 552 553 /* If MSIX failed try to setup using MSI interrupts */ 554 if (!intr->number_of_vectors) { 555 if (!(adapter->csr.flags & LAN743X_CSR_FLAG_IS_A0)) { 556 if (!pci_enable_msi(adapter->pdev)) { 557 intr->flags |= INTR_FLAG_MSI_ENABLED; 558 intr->number_of_vectors = 1; 559 intr->using_vectors = true; 560 intr->vector_list[0].irq = 561 adapter->pdev->irq; 562 netif_info(adapter, ifup, adapter->netdev, 563 "using MSI interrupts, number of vectors = %d\n", 564 intr->number_of_vectors); 565 } 566 } 567 } 568 569 /* If MSIX, and MSI failed, setup using legacy interrupt */ 570 if (!intr->number_of_vectors) { 571 intr->number_of_vectors = 1; 572 intr->using_vectors = false; 573 intr->vector_list[0].irq = intr->irq; 574 netif_info(adapter, ifup, adapter->netdev, 575 "using legacy interrupts\n"); 576 } 577 578 /* At this point we must have at least one irq */ 579 lan743x_csr_write(adapter, INT_VEC_EN_CLR, 0xFFFFFFFF); 580 581 /* map all interrupts to vector 0 */ 582 lan743x_csr_write(adapter, INT_VEC_MAP0, 0x00000000); 583 lan743x_csr_write(adapter, INT_VEC_MAP1, 0x00000000); 584 lan743x_csr_write(adapter, INT_VEC_MAP2, 0x00000000); 585 flags = LAN743X_VECTOR_FLAG_SOURCE_STATUS_READ | 586 LAN743X_VECTOR_FLAG_SOURCE_STATUS_W2C | 587 LAN743X_VECTOR_FLAG_SOURCE_ENABLE_CHECK | 588 LAN743X_VECTOR_FLAG_SOURCE_ENABLE_CLEAR; 589 590 if (intr->using_vectors) { 591 flags |= LAN743X_VECTOR_FLAG_VECTOR_ENABLE_ISR_CLEAR | 592 LAN743X_VECTOR_FLAG_VECTOR_ENABLE_ISR_SET; 593 } else { 594 flags |= LAN743X_VECTOR_FLAG_MASTER_ENABLE_CLEAR | 595 LAN743X_VECTOR_FLAG_MASTER_ENABLE_SET | 596 LAN743X_VECTOR_FLAG_IRQ_SHARED; 597 } 598 599 if (adapter->csr.flags & LAN743X_CSR_FLAG_SUPPORTS_INTR_AUTO_SET_CLR) { 600 flags &= ~LAN743X_VECTOR_FLAG_SOURCE_STATUS_READ; 601 flags &= ~LAN743X_VECTOR_FLAG_SOURCE_STATUS_W2C; 602 flags &= ~LAN743X_VECTOR_FLAG_SOURCE_ENABLE_CLEAR; 603 flags &= ~LAN743X_VECTOR_FLAG_SOURCE_ENABLE_CHECK; 604 flags |= LAN743X_VECTOR_FLAG_SOURCE_STATUS_R2C; 605 flags |= LAN743X_VECTOR_FLAG_SOURCE_ENABLE_R2C; 606 } 607 608 init_waitqueue_head(&intr->software_isr_wq); 609 610 ret = lan743x_intr_register_isr(adapter, 0, flags, 611 INT_BIT_ALL_RX_ | INT_BIT_ALL_TX_ | 612 INT_BIT_ALL_OTHER_, 613 lan743x_intr_shared_isr, adapter); 614 if (ret) 615 goto clean_up; 616 intr->flags |= INTR_FLAG_IRQ_REQUESTED(0); 617 618 if (intr->using_vectors) 619 lan743x_csr_write(adapter, INT_VEC_EN_SET, 620 INT_VEC_EN_(0)); 621 622 if (!(adapter->csr.flags & LAN743X_CSR_FLAG_IS_A0)) { 623 lan743x_csr_write(adapter, INT_MOD_CFG0, LAN743X_INT_MOD); 624 lan743x_csr_write(adapter, INT_MOD_CFG1, LAN743X_INT_MOD); 625 lan743x_csr_write(adapter, INT_MOD_CFG2, LAN743X_INT_MOD); 626 lan743x_csr_write(adapter, INT_MOD_CFG3, LAN743X_INT_MOD); 627 lan743x_csr_write(adapter, INT_MOD_CFG4, LAN743X_INT_MOD); 628 lan743x_csr_write(adapter, INT_MOD_CFG5, LAN743X_INT_MOD); 629 lan743x_csr_write(adapter, INT_MOD_CFG6, LAN743X_INT_MOD); 630 lan743x_csr_write(adapter, INT_MOD_CFG7, LAN743X_INT_MOD); 631 if (adapter->is_pci11x1x) { 632 lan743x_csr_write(adapter, INT_MOD_CFG8, LAN743X_INT_MOD); 633 lan743x_csr_write(adapter, INT_MOD_CFG9, LAN743X_INT_MOD); 634 lan743x_csr_write(adapter, INT_MOD_MAP0, 0x00007654); 635 lan743x_csr_write(adapter, INT_MOD_MAP1, 0x00003210); 636 } else { 637 lan743x_csr_write(adapter, INT_MOD_MAP0, 0x00005432); 638 lan743x_csr_write(adapter, INT_MOD_MAP1, 0x00000001); 639 } 640 lan743x_csr_write(adapter, INT_MOD_MAP2, 0x00FFFFFF); 641 } 642 643 /* enable interrupts */ 644 lan743x_csr_write(adapter, INT_EN_SET, INT_BIT_MAS_); 645 ret = lan743x_intr_test_isr(adapter); 646 if (ret) 647 goto clean_up; 648 649 if (intr->number_of_vectors > 1) { 650 int number_of_tx_vectors = intr->number_of_vectors - 1; 651 652 if (number_of_tx_vectors > used_tx_channels) 653 number_of_tx_vectors = used_tx_channels; 654 flags = LAN743X_VECTOR_FLAG_SOURCE_STATUS_READ | 655 LAN743X_VECTOR_FLAG_SOURCE_STATUS_W2C | 656 LAN743X_VECTOR_FLAG_SOURCE_ENABLE_CHECK | 657 LAN743X_VECTOR_FLAG_SOURCE_ENABLE_CLEAR | 658 LAN743X_VECTOR_FLAG_VECTOR_ENABLE_ISR_CLEAR | 659 LAN743X_VECTOR_FLAG_VECTOR_ENABLE_ISR_SET; 660 661 if (adapter->csr.flags & 662 LAN743X_CSR_FLAG_SUPPORTS_INTR_AUTO_SET_CLR) { 663 flags = LAN743X_VECTOR_FLAG_VECTOR_ENABLE_AUTO_SET | 664 LAN743X_VECTOR_FLAG_SOURCE_ENABLE_AUTO_SET | 665 LAN743X_VECTOR_FLAG_SOURCE_ENABLE_AUTO_CLEAR | 666 LAN743X_VECTOR_FLAG_SOURCE_STATUS_AUTO_CLEAR; 667 } 668 669 for (index = 0; index < number_of_tx_vectors; index++) { 670 u32 int_bit = INT_BIT_DMA_TX_(index); 671 int vector = index + 1; 672 673 /* map TX interrupt to vector */ 674 int_vec_map1 |= INT_VEC_MAP1_TX_VEC_(index, vector); 675 lan743x_csr_write(adapter, INT_VEC_MAP1, int_vec_map1); 676 677 /* Remove TX interrupt from shared mask */ 678 intr->vector_list[0].int_mask &= ~int_bit; 679 ret = lan743x_intr_register_isr(adapter, vector, flags, 680 int_bit, lan743x_tx_isr, 681 &adapter->tx[index]); 682 if (ret) 683 goto clean_up; 684 intr->flags |= INTR_FLAG_IRQ_REQUESTED(vector); 685 if (!(flags & 686 LAN743X_VECTOR_FLAG_VECTOR_ENABLE_AUTO_SET)) 687 lan743x_csr_write(adapter, INT_VEC_EN_SET, 688 INT_VEC_EN_(vector)); 689 } 690 } 691 if ((intr->number_of_vectors - used_tx_channels) > 1) { 692 int number_of_rx_vectors = intr->number_of_vectors - 693 used_tx_channels - 1; 694 695 if (number_of_rx_vectors > LAN743X_USED_RX_CHANNELS) 696 number_of_rx_vectors = LAN743X_USED_RX_CHANNELS; 697 698 flags = LAN743X_VECTOR_FLAG_SOURCE_STATUS_READ | 699 LAN743X_VECTOR_FLAG_SOURCE_STATUS_W2C | 700 LAN743X_VECTOR_FLAG_SOURCE_ENABLE_CHECK | 701 LAN743X_VECTOR_FLAG_SOURCE_ENABLE_CLEAR | 702 LAN743X_VECTOR_FLAG_VECTOR_ENABLE_ISR_CLEAR | 703 LAN743X_VECTOR_FLAG_VECTOR_ENABLE_ISR_SET; 704 705 if (adapter->csr.flags & 706 LAN743X_CSR_FLAG_SUPPORTS_INTR_AUTO_SET_CLR) { 707 flags = LAN743X_VECTOR_FLAG_VECTOR_ENABLE_AUTO_CLEAR | 708 LAN743X_VECTOR_FLAG_VECTOR_ENABLE_AUTO_SET | 709 LAN743X_VECTOR_FLAG_SOURCE_ENABLE_AUTO_SET | 710 LAN743X_VECTOR_FLAG_SOURCE_ENABLE_AUTO_CLEAR | 711 LAN743X_VECTOR_FLAG_SOURCE_STATUS_AUTO_CLEAR; 712 } 713 for (index = 0; index < number_of_rx_vectors; index++) { 714 int vector = index + 1 + used_tx_channels; 715 u32 int_bit = INT_BIT_DMA_RX_(index); 716 717 /* map RX interrupt to vector */ 718 int_vec_map0 |= INT_VEC_MAP0_RX_VEC_(index, vector); 719 lan743x_csr_write(adapter, INT_VEC_MAP0, int_vec_map0); 720 if (flags & 721 LAN743X_VECTOR_FLAG_VECTOR_ENABLE_AUTO_CLEAR) { 722 int_vec_en_auto_clr |= INT_VEC_EN_(vector); 723 lan743x_csr_write(adapter, INT_VEC_EN_AUTO_CLR, 724 int_vec_en_auto_clr); 725 } 726 727 /* Remove RX interrupt from shared mask */ 728 intr->vector_list[0].int_mask &= ~int_bit; 729 ret = lan743x_intr_register_isr(adapter, vector, flags, 730 int_bit, lan743x_rx_isr, 731 &adapter->rx[index]); 732 if (ret) 733 goto clean_up; 734 intr->flags |= INTR_FLAG_IRQ_REQUESTED(vector); 735 736 lan743x_csr_write(adapter, INT_VEC_EN_SET, 737 INT_VEC_EN_(vector)); 738 } 739 } 740 return 0; 741 742 clean_up: 743 lan743x_intr_close(adapter); 744 return ret; 745 } 746 747 static int lan743x_dp_write(struct lan743x_adapter *adapter, 748 u32 select, u32 addr, u32 length, u32 *buf) 749 { 750 u32 dp_sel; 751 int i; 752 753 if (lan743x_csr_wait_for_bit_atomic(adapter, DP_SEL, DP_SEL_DPRDY_, 754 1, 40, 100, 100)) 755 return -EIO; 756 dp_sel = lan743x_csr_read(adapter, DP_SEL); 757 dp_sel &= ~DP_SEL_MASK_; 758 dp_sel |= select; 759 lan743x_csr_write(adapter, DP_SEL, dp_sel); 760 761 for (i = 0; i < length; i++) { 762 lan743x_csr_write(adapter, DP_ADDR, addr + i); 763 lan743x_csr_write(adapter, DP_DATA_0, buf[i]); 764 lan743x_csr_write(adapter, DP_CMD, DP_CMD_WRITE_); 765 if (lan743x_csr_wait_for_bit_atomic(adapter, DP_SEL, 766 DP_SEL_DPRDY_, 767 1, 40, 100, 100)) 768 return -EIO; 769 } 770 771 return 0; 772 } 773 774 static u32 lan743x_mac_mii_access(u16 id, u16 index, int read) 775 { 776 u32 ret; 777 778 ret = (id << MAC_MII_ACC_PHY_ADDR_SHIFT_) & 779 MAC_MII_ACC_PHY_ADDR_MASK_; 780 ret |= (index << MAC_MII_ACC_MIIRINDA_SHIFT_) & 781 MAC_MII_ACC_MIIRINDA_MASK_; 782 783 if (read) 784 ret |= MAC_MII_ACC_MII_READ_; 785 else 786 ret |= MAC_MII_ACC_MII_WRITE_; 787 ret |= MAC_MII_ACC_MII_BUSY_; 788 789 return ret; 790 } 791 792 static int lan743x_mac_mii_wait_till_not_busy(struct lan743x_adapter *adapter) 793 { 794 u32 data; 795 796 return readx_poll_timeout(LAN743X_CSR_READ_OP, MAC_MII_ACC, data, 797 !(data & MAC_MII_ACC_MII_BUSY_), 0, 1000000); 798 } 799 800 static int lan743x_mdiobus_read_c22(struct mii_bus *bus, int phy_id, int index) 801 { 802 struct lan743x_adapter *adapter = bus->priv; 803 u32 val, mii_access; 804 int ret; 805 806 /* comfirm MII not busy */ 807 ret = lan743x_mac_mii_wait_till_not_busy(adapter); 808 if (ret < 0) 809 return ret; 810 811 /* set the address, index & direction (read from PHY) */ 812 mii_access = lan743x_mac_mii_access(phy_id, index, MAC_MII_READ); 813 lan743x_csr_write(adapter, MAC_MII_ACC, mii_access); 814 ret = lan743x_mac_mii_wait_till_not_busy(adapter); 815 if (ret < 0) 816 return ret; 817 818 val = lan743x_csr_read(adapter, MAC_MII_DATA); 819 return (int)(val & 0xFFFF); 820 } 821 822 static int lan743x_mdiobus_write_c22(struct mii_bus *bus, 823 int phy_id, int index, u16 regval) 824 { 825 struct lan743x_adapter *adapter = bus->priv; 826 u32 val, mii_access; 827 int ret; 828 829 /* confirm MII not busy */ 830 ret = lan743x_mac_mii_wait_till_not_busy(adapter); 831 if (ret < 0) 832 return ret; 833 val = (u32)regval; 834 lan743x_csr_write(adapter, MAC_MII_DATA, val); 835 836 /* set the address, index & direction (write to PHY) */ 837 mii_access = lan743x_mac_mii_access(phy_id, index, MAC_MII_WRITE); 838 lan743x_csr_write(adapter, MAC_MII_ACC, mii_access); 839 ret = lan743x_mac_mii_wait_till_not_busy(adapter); 840 return ret; 841 } 842 843 static u32 lan743x_mac_mmd_access(int id, int dev_addr, int op) 844 { 845 u32 ret; 846 847 ret = (id << MAC_MII_ACC_PHY_ADDR_SHIFT_) & 848 MAC_MII_ACC_PHY_ADDR_MASK_; 849 ret |= (dev_addr << MAC_MII_ACC_MIIMMD_SHIFT_) & 850 MAC_MII_ACC_MIIMMD_MASK_; 851 if (op == MMD_ACCESS_WRITE) 852 ret |= MAC_MII_ACC_MIICMD_WRITE_; 853 else if (op == MMD_ACCESS_READ) 854 ret |= MAC_MII_ACC_MIICMD_READ_; 855 else if (op == MMD_ACCESS_READ_INC) 856 ret |= MAC_MII_ACC_MIICMD_READ_INC_; 857 else 858 ret |= MAC_MII_ACC_MIICMD_ADDR_; 859 ret |= (MAC_MII_ACC_MII_BUSY_ | MAC_MII_ACC_MIICL45_); 860 861 return ret; 862 } 863 864 static int lan743x_mdiobus_read_c45(struct mii_bus *bus, int phy_id, 865 int dev_addr, int index) 866 { 867 struct lan743x_adapter *adapter = bus->priv; 868 u32 mmd_access; 869 int ret; 870 871 /* comfirm MII not busy */ 872 ret = lan743x_mac_mii_wait_till_not_busy(adapter); 873 if (ret < 0) 874 return ret; 875 876 /* Load Register Address */ 877 lan743x_csr_write(adapter, MAC_MII_DATA, index); 878 mmd_access = lan743x_mac_mmd_access(phy_id, dev_addr, 879 MMD_ACCESS_ADDRESS); 880 lan743x_csr_write(adapter, MAC_MII_ACC, mmd_access); 881 ret = lan743x_mac_mii_wait_till_not_busy(adapter); 882 if (ret < 0) 883 return ret; 884 885 /* Read Data */ 886 mmd_access = lan743x_mac_mmd_access(phy_id, dev_addr, 887 MMD_ACCESS_READ); 888 lan743x_csr_write(adapter, MAC_MII_ACC, mmd_access); 889 ret = lan743x_mac_mii_wait_till_not_busy(adapter); 890 if (ret < 0) 891 return ret; 892 893 ret = lan743x_csr_read(adapter, MAC_MII_DATA); 894 return (int)(ret & 0xFFFF); 895 } 896 897 static int lan743x_mdiobus_write_c45(struct mii_bus *bus, int phy_id, 898 int dev_addr, int index, u16 regval) 899 { 900 struct lan743x_adapter *adapter = bus->priv; 901 u32 mmd_access; 902 int ret; 903 904 /* confirm MII not busy */ 905 ret = lan743x_mac_mii_wait_till_not_busy(adapter); 906 if (ret < 0) 907 return ret; 908 909 /* Load Register Address */ 910 lan743x_csr_write(adapter, MAC_MII_DATA, (u32)index); 911 mmd_access = lan743x_mac_mmd_access(phy_id, dev_addr, 912 MMD_ACCESS_ADDRESS); 913 lan743x_csr_write(adapter, MAC_MII_ACC, mmd_access); 914 ret = lan743x_mac_mii_wait_till_not_busy(adapter); 915 if (ret < 0) 916 return ret; 917 918 /* Write Data */ 919 lan743x_csr_write(adapter, MAC_MII_DATA, (u32)regval); 920 mmd_access = lan743x_mac_mmd_access(phy_id, dev_addr, 921 MMD_ACCESS_WRITE); 922 lan743x_csr_write(adapter, MAC_MII_ACC, mmd_access); 923 924 return lan743x_mac_mii_wait_till_not_busy(adapter); 925 } 926 927 static int lan743x_sgmii_wait_till_not_busy(struct lan743x_adapter *adapter) 928 { 929 u32 data; 930 int ret; 931 932 ret = readx_poll_timeout(LAN743X_CSR_READ_OP, SGMII_ACC, data, 933 !(data & SGMII_ACC_SGMII_BZY_), 100, 1000000); 934 if (ret < 0) 935 netif_err(adapter, drv, adapter->netdev, 936 "%s: error %d sgmii wait timeout\n", __func__, ret); 937 938 return ret; 939 } 940 941 int lan743x_sgmii_read(struct lan743x_adapter *adapter, u8 mmd, u16 addr) 942 { 943 u32 mmd_access; 944 int ret; 945 u32 val; 946 947 if (mmd > 31) { 948 netif_err(adapter, probe, adapter->netdev, 949 "%s mmd should <= 31\n", __func__); 950 return -EINVAL; 951 } 952 953 mutex_lock(&adapter->sgmii_rw_lock); 954 /* Load Register Address */ 955 mmd_access = mmd << SGMII_ACC_SGMII_MMD_SHIFT_; 956 mmd_access |= (addr | SGMII_ACC_SGMII_BZY_); 957 lan743x_csr_write(adapter, SGMII_ACC, mmd_access); 958 ret = lan743x_sgmii_wait_till_not_busy(adapter); 959 if (ret < 0) 960 goto sgmii_unlock; 961 962 val = lan743x_csr_read(adapter, SGMII_DATA); 963 ret = (int)(val & SGMII_DATA_MASK_); 964 965 sgmii_unlock: 966 mutex_unlock(&adapter->sgmii_rw_lock); 967 968 return ret; 969 } 970 971 static int lan743x_sgmii_write(struct lan743x_adapter *adapter, 972 u8 mmd, u16 addr, u16 val) 973 { 974 u32 mmd_access; 975 int ret; 976 977 if (mmd > 31) { 978 netif_err(adapter, probe, adapter->netdev, 979 "%s mmd should <= 31\n", __func__); 980 return -EINVAL; 981 } 982 mutex_lock(&adapter->sgmii_rw_lock); 983 /* Load Register Data */ 984 lan743x_csr_write(adapter, SGMII_DATA, (u32)(val & SGMII_DATA_MASK_)); 985 /* Load Register Address */ 986 mmd_access = mmd << SGMII_ACC_SGMII_MMD_SHIFT_; 987 mmd_access |= (addr | SGMII_ACC_SGMII_BZY_ | SGMII_ACC_SGMII_WR_); 988 lan743x_csr_write(adapter, SGMII_ACC, mmd_access); 989 ret = lan743x_sgmii_wait_till_not_busy(adapter); 990 mutex_unlock(&adapter->sgmii_rw_lock); 991 992 return ret; 993 } 994 995 static int lan743x_sgmii_mpll_set(struct lan743x_adapter *adapter, 996 u16 baud) 997 { 998 int mpllctrl0; 999 int mpllctrl1; 1000 int miscctrl1; 1001 int ret; 1002 1003 mpllctrl0 = lan743x_sgmii_read(adapter, MDIO_MMD_VEND2, 1004 VR_MII_GEN2_4_MPLL_CTRL0); 1005 if (mpllctrl0 < 0) 1006 return mpllctrl0; 1007 1008 mpllctrl0 &= ~VR_MII_MPLL_CTRL0_USE_REFCLK_PAD_; 1009 if (baud == VR_MII_BAUD_RATE_1P25GBPS) { 1010 mpllctrl1 = VR_MII_MPLL_MULTIPLIER_100; 1011 /* mpll_baud_clk/4 */ 1012 miscctrl1 = 0xA; 1013 } else { 1014 mpllctrl1 = VR_MII_MPLL_MULTIPLIER_125; 1015 /* mpll_baud_clk/2 */ 1016 miscctrl1 = 0x5; 1017 } 1018 1019 ret = lan743x_sgmii_write(adapter, MDIO_MMD_VEND2, 1020 VR_MII_GEN2_4_MPLL_CTRL0, mpllctrl0); 1021 if (ret < 0) 1022 return ret; 1023 1024 ret = lan743x_sgmii_write(adapter, MDIO_MMD_VEND2, 1025 VR_MII_GEN2_4_MPLL_CTRL1, mpllctrl1); 1026 if (ret < 0) 1027 return ret; 1028 1029 return lan743x_sgmii_write(adapter, MDIO_MMD_VEND2, 1030 VR_MII_GEN2_4_MISC_CTRL1, miscctrl1); 1031 } 1032 1033 static int lan743x_sgmii_2_5G_mode_set(struct lan743x_adapter *adapter, 1034 bool enable) 1035 { 1036 if (enable) 1037 return lan743x_sgmii_mpll_set(adapter, 1038 VR_MII_BAUD_RATE_3P125GBPS); 1039 else 1040 return lan743x_sgmii_mpll_set(adapter, 1041 VR_MII_BAUD_RATE_1P25GBPS); 1042 } 1043 1044 static int lan743x_is_sgmii_2_5G_mode(struct lan743x_adapter *adapter, 1045 bool *status) 1046 { 1047 int ret; 1048 1049 ret = lan743x_sgmii_read(adapter, MDIO_MMD_VEND2, 1050 VR_MII_GEN2_4_MPLL_CTRL1); 1051 if (ret < 0) 1052 return ret; 1053 1054 if (ret == VR_MII_MPLL_MULTIPLIER_125 || 1055 ret == VR_MII_MPLL_MULTIPLIER_50) 1056 *status = true; 1057 else 1058 *status = false; 1059 1060 return 0; 1061 } 1062 1063 static int lan743x_sgmii_aneg_update(struct lan743x_adapter *adapter) 1064 { 1065 enum lan743x_sgmii_lsd lsd = adapter->sgmii_lsd; 1066 int mii_ctrl; 1067 int dgt_ctrl; 1068 int an_ctrl; 1069 int ret; 1070 1071 if (lsd == LINK_2500_MASTER || lsd == LINK_2500_SLAVE) 1072 /* Switch to 2.5 Gbps */ 1073 ret = lan743x_sgmii_2_5G_mode_set(adapter, true); 1074 else 1075 /* Switch to 10/100/1000 Mbps clock */ 1076 ret = lan743x_sgmii_2_5G_mode_set(adapter, false); 1077 if (ret < 0) 1078 return ret; 1079 1080 /* Enable SGMII Auto NEG */ 1081 mii_ctrl = lan743x_sgmii_read(adapter, MDIO_MMD_VEND2, MII_BMCR); 1082 if (mii_ctrl < 0) 1083 return mii_ctrl; 1084 1085 an_ctrl = lan743x_sgmii_read(adapter, MDIO_MMD_VEND2, VR_MII_AN_CTRL); 1086 if (an_ctrl < 0) 1087 return an_ctrl; 1088 1089 dgt_ctrl = lan743x_sgmii_read(adapter, MDIO_MMD_VEND2, 1090 VR_MII_DIG_CTRL1); 1091 if (dgt_ctrl < 0) 1092 return dgt_ctrl; 1093 1094 if (lsd == LINK_2500_MASTER || lsd == LINK_2500_SLAVE) { 1095 mii_ctrl &= ~(BMCR_ANENABLE | BMCR_ANRESTART | BMCR_SPEED100); 1096 mii_ctrl |= BMCR_SPEED1000; 1097 dgt_ctrl |= VR_MII_DIG_CTRL1_CL37_TMR_OVR_RIDE_; 1098 dgt_ctrl &= ~VR_MII_DIG_CTRL1_MAC_AUTO_SW_; 1099 /* In order for Auto-Negotiation to operate properly at 1100 * 2.5 Gbps the 1.6ms link timer values must be adjusted 1101 * The VR_MII_LINK_TIMER_CTRL Register must be set to 1102 * 16'h7A1 and The CL37_TMR_OVR_RIDE bit of the 1103 * VR_MII_DIG_CTRL1 Register set to 1 1104 */ 1105 ret = lan743x_sgmii_write(adapter, MDIO_MMD_VEND2, 1106 VR_MII_LINK_TIMER_CTRL, 0x7A1); 1107 if (ret < 0) 1108 return ret; 1109 } else { 1110 mii_ctrl |= (BMCR_ANENABLE | BMCR_ANRESTART); 1111 an_ctrl &= ~VR_MII_AN_CTRL_SGMII_LINK_STS_; 1112 dgt_ctrl &= ~VR_MII_DIG_CTRL1_CL37_TMR_OVR_RIDE_; 1113 dgt_ctrl |= VR_MII_DIG_CTRL1_MAC_AUTO_SW_; 1114 } 1115 1116 ret = lan743x_sgmii_write(adapter, MDIO_MMD_VEND2, MII_BMCR, 1117 mii_ctrl); 1118 if (ret < 0) 1119 return ret; 1120 1121 ret = lan743x_sgmii_write(adapter, MDIO_MMD_VEND2, 1122 VR_MII_DIG_CTRL1, dgt_ctrl); 1123 if (ret < 0) 1124 return ret; 1125 1126 return lan743x_sgmii_write(adapter, MDIO_MMD_VEND2, 1127 VR_MII_AN_CTRL, an_ctrl); 1128 } 1129 1130 static int lan743x_pcs_seq_state(struct lan743x_adapter *adapter, u8 state) 1131 { 1132 u8 wait_cnt = 0; 1133 u32 dig_sts; 1134 1135 do { 1136 dig_sts = lan743x_sgmii_read(adapter, MDIO_MMD_VEND2, 1137 VR_MII_DIG_STS); 1138 if (((dig_sts & VR_MII_DIG_STS_PSEQ_STATE_MASK_) >> 1139 VR_MII_DIG_STS_PSEQ_STATE_POS_) == state) 1140 break; 1141 usleep_range(1000, 2000); 1142 } while (wait_cnt++ < 10); 1143 1144 if (wait_cnt >= 10) 1145 return -ETIMEDOUT; 1146 1147 return 0; 1148 } 1149 1150 static int lan743x_sgmii_config(struct lan743x_adapter *adapter) 1151 { 1152 struct net_device *netdev = adapter->netdev; 1153 struct phy_device *phydev = netdev->phydev; 1154 enum lan743x_sgmii_lsd lsd = POWER_DOWN; 1155 int mii_ctl; 1156 bool status; 1157 int ret; 1158 1159 switch (phydev->speed) { 1160 case SPEED_2500: 1161 if (phydev->master_slave_state == MASTER_SLAVE_STATE_MASTER) 1162 lsd = LINK_2500_MASTER; 1163 else 1164 lsd = LINK_2500_SLAVE; 1165 break; 1166 case SPEED_1000: 1167 if (phydev->master_slave_state == MASTER_SLAVE_STATE_MASTER) 1168 lsd = LINK_1000_MASTER; 1169 else 1170 lsd = LINK_1000_SLAVE; 1171 break; 1172 case SPEED_100: 1173 if (phydev->duplex) 1174 lsd = LINK_100FD; 1175 else 1176 lsd = LINK_100HD; 1177 break; 1178 case SPEED_10: 1179 if (phydev->duplex) 1180 lsd = LINK_10FD; 1181 else 1182 lsd = LINK_10HD; 1183 break; 1184 default: 1185 netif_err(adapter, drv, adapter->netdev, 1186 "Invalid speed %d\n", phydev->speed); 1187 return -EINVAL; 1188 } 1189 1190 adapter->sgmii_lsd = lsd; 1191 ret = lan743x_sgmii_aneg_update(adapter); 1192 if (ret < 0) { 1193 netif_err(adapter, drv, adapter->netdev, 1194 "error %d SGMII cfg failed\n", ret); 1195 return ret; 1196 } 1197 1198 ret = lan743x_is_sgmii_2_5G_mode(adapter, &status); 1199 if (ret < 0) { 1200 netif_err(adapter, drv, adapter->netdev, 1201 "erro %d SGMII get mode failed\n", ret); 1202 return ret; 1203 } 1204 1205 if (status) 1206 netif_dbg(adapter, drv, adapter->netdev, 1207 "SGMII 2.5G mode enable\n"); 1208 else 1209 netif_dbg(adapter, drv, adapter->netdev, 1210 "SGMII 1G mode enable\n"); 1211 1212 /* SGMII/1000/2500BASE-X PCS power down */ 1213 mii_ctl = lan743x_sgmii_read(adapter, MDIO_MMD_VEND2, MII_BMCR); 1214 if (mii_ctl < 0) 1215 return mii_ctl; 1216 1217 mii_ctl |= BMCR_PDOWN; 1218 ret = lan743x_sgmii_write(adapter, MDIO_MMD_VEND2, MII_BMCR, mii_ctl); 1219 if (ret < 0) 1220 return ret; 1221 1222 ret = lan743x_pcs_seq_state(adapter, PCS_POWER_STATE_DOWN); 1223 if (ret < 0) 1224 return ret; 1225 1226 /* SGMII/1000/2500BASE-X PCS power up */ 1227 mii_ctl &= ~BMCR_PDOWN; 1228 ret = lan743x_sgmii_write(adapter, MDIO_MMD_VEND2, MII_BMCR, mii_ctl); 1229 if (ret < 0) 1230 return ret; 1231 1232 ret = lan743x_pcs_seq_state(adapter, PCS_POWER_STATE_UP); 1233 if (ret < 0) 1234 return ret; 1235 1236 return 0; 1237 } 1238 1239 static void lan743x_mac_set_address(struct lan743x_adapter *adapter, 1240 u8 *addr) 1241 { 1242 u32 addr_lo, addr_hi; 1243 1244 addr_lo = addr[0] | 1245 addr[1] << 8 | 1246 addr[2] << 16 | 1247 addr[3] << 24; 1248 addr_hi = addr[4] | 1249 addr[5] << 8; 1250 lan743x_csr_write(adapter, MAC_RX_ADDRL, addr_lo); 1251 lan743x_csr_write(adapter, MAC_RX_ADDRH, addr_hi); 1252 1253 ether_addr_copy(adapter->mac_address, addr); 1254 netif_info(adapter, drv, adapter->netdev, 1255 "MAC address set to %pM\n", addr); 1256 } 1257 1258 static int lan743x_mac_init(struct lan743x_adapter *adapter) 1259 { 1260 bool mac_address_valid = true; 1261 struct net_device *netdev; 1262 u32 mac_addr_hi = 0; 1263 u32 mac_addr_lo = 0; 1264 u32 data; 1265 1266 netdev = adapter->netdev; 1267 1268 /* disable auto duplex, and speed detection. Phylib does that */ 1269 data = lan743x_csr_read(adapter, MAC_CR); 1270 data &= ~(MAC_CR_ADD_ | MAC_CR_ASD_); 1271 data |= MAC_CR_CNTR_RST_; 1272 lan743x_csr_write(adapter, MAC_CR, data); 1273 1274 if (!is_valid_ether_addr(adapter->mac_address)) { 1275 mac_addr_hi = lan743x_csr_read(adapter, MAC_RX_ADDRH); 1276 mac_addr_lo = lan743x_csr_read(adapter, MAC_RX_ADDRL); 1277 adapter->mac_address[0] = mac_addr_lo & 0xFF; 1278 adapter->mac_address[1] = (mac_addr_lo >> 8) & 0xFF; 1279 adapter->mac_address[2] = (mac_addr_lo >> 16) & 0xFF; 1280 adapter->mac_address[3] = (mac_addr_lo >> 24) & 0xFF; 1281 adapter->mac_address[4] = mac_addr_hi & 0xFF; 1282 adapter->mac_address[5] = (mac_addr_hi >> 8) & 0xFF; 1283 1284 if (((mac_addr_hi & 0x0000FFFF) == 0x0000FFFF) && 1285 mac_addr_lo == 0xFFFFFFFF) { 1286 mac_address_valid = false; 1287 } else if (!is_valid_ether_addr(adapter->mac_address)) { 1288 mac_address_valid = false; 1289 } 1290 1291 if (!mac_address_valid) 1292 eth_random_addr(adapter->mac_address); 1293 } 1294 lan743x_mac_set_address(adapter, adapter->mac_address); 1295 eth_hw_addr_set(netdev, adapter->mac_address); 1296 1297 return 0; 1298 } 1299 1300 static int lan743x_mac_open(struct lan743x_adapter *adapter) 1301 { 1302 u32 temp; 1303 1304 temp = lan743x_csr_read(adapter, MAC_RX); 1305 lan743x_csr_write(adapter, MAC_RX, temp | MAC_RX_RXEN_); 1306 temp = lan743x_csr_read(adapter, MAC_TX); 1307 lan743x_csr_write(adapter, MAC_TX, temp | MAC_TX_TXEN_); 1308 return 0; 1309 } 1310 1311 static void lan743x_mac_close(struct lan743x_adapter *adapter) 1312 { 1313 u32 temp; 1314 1315 temp = lan743x_csr_read(adapter, MAC_TX); 1316 temp &= ~MAC_TX_TXEN_; 1317 lan743x_csr_write(adapter, MAC_TX, temp); 1318 lan743x_csr_wait_for_bit(adapter, MAC_TX, MAC_TX_TXD_, 1319 1, 1000, 20000, 100); 1320 1321 temp = lan743x_csr_read(adapter, MAC_RX); 1322 temp &= ~MAC_RX_RXEN_; 1323 lan743x_csr_write(adapter, MAC_RX, temp); 1324 lan743x_csr_wait_for_bit(adapter, MAC_RX, MAC_RX_RXD_, 1325 1, 1000, 20000, 100); 1326 } 1327 1328 void lan743x_mac_flow_ctrl_set_enables(struct lan743x_adapter *adapter, 1329 bool tx_enable, bool rx_enable) 1330 { 1331 u32 flow_setting = 0; 1332 1333 /* set maximum pause time because when fifo space frees 1334 * up a zero value pause frame will be sent to release the pause 1335 */ 1336 flow_setting = MAC_FLOW_CR_FCPT_MASK_; 1337 if (tx_enable) 1338 flow_setting |= MAC_FLOW_CR_TX_FCEN_; 1339 if (rx_enable) 1340 flow_setting |= MAC_FLOW_CR_RX_FCEN_; 1341 lan743x_csr_write(adapter, MAC_FLOW, flow_setting); 1342 } 1343 1344 static int lan743x_mac_set_mtu(struct lan743x_adapter *adapter, int new_mtu) 1345 { 1346 int enabled = 0; 1347 u32 mac_rx = 0; 1348 1349 mac_rx = lan743x_csr_read(adapter, MAC_RX); 1350 if (mac_rx & MAC_RX_RXEN_) { 1351 enabled = 1; 1352 if (mac_rx & MAC_RX_RXD_) { 1353 lan743x_csr_write(adapter, MAC_RX, mac_rx); 1354 mac_rx &= ~MAC_RX_RXD_; 1355 } 1356 mac_rx &= ~MAC_RX_RXEN_; 1357 lan743x_csr_write(adapter, MAC_RX, mac_rx); 1358 lan743x_csr_wait_for_bit(adapter, MAC_RX, MAC_RX_RXD_, 1359 1, 1000, 20000, 100); 1360 lan743x_csr_write(adapter, MAC_RX, mac_rx | MAC_RX_RXD_); 1361 } 1362 1363 mac_rx &= ~(MAC_RX_MAX_SIZE_MASK_); 1364 mac_rx |= (((new_mtu + ETH_HLEN + ETH_FCS_LEN) 1365 << MAC_RX_MAX_SIZE_SHIFT_) & MAC_RX_MAX_SIZE_MASK_); 1366 lan743x_csr_write(adapter, MAC_RX, mac_rx); 1367 1368 if (enabled) { 1369 mac_rx |= MAC_RX_RXEN_; 1370 lan743x_csr_write(adapter, MAC_RX, mac_rx); 1371 } 1372 return 0; 1373 } 1374 1375 /* PHY */ 1376 static int lan743x_phy_reset(struct lan743x_adapter *adapter) 1377 { 1378 u32 data; 1379 1380 /* Only called with in probe, and before mdiobus_register */ 1381 1382 data = lan743x_csr_read(adapter, PMT_CTL); 1383 data |= PMT_CTL_ETH_PHY_RST_; 1384 lan743x_csr_write(adapter, PMT_CTL, data); 1385 1386 return readx_poll_timeout(LAN743X_CSR_READ_OP, PMT_CTL, data, 1387 (!(data & PMT_CTL_ETH_PHY_RST_) && 1388 (data & PMT_CTL_READY_)), 1389 50000, 1000000); 1390 } 1391 1392 static void lan743x_phy_update_flowcontrol(struct lan743x_adapter *adapter, 1393 u16 local_adv, u16 remote_adv) 1394 { 1395 struct lan743x_phy *phy = &adapter->phy; 1396 u8 cap; 1397 1398 if (phy->fc_autoneg) 1399 cap = mii_resolve_flowctrl_fdx(local_adv, remote_adv); 1400 else 1401 cap = phy->fc_request_control; 1402 1403 lan743x_mac_flow_ctrl_set_enables(adapter, 1404 cap & FLOW_CTRL_TX, 1405 cap & FLOW_CTRL_RX); 1406 } 1407 1408 static int lan743x_phy_init(struct lan743x_adapter *adapter) 1409 { 1410 return lan743x_phy_reset(adapter); 1411 } 1412 1413 static void lan743x_phy_link_status_change(struct net_device *netdev) 1414 { 1415 struct lan743x_adapter *adapter = netdev_priv(netdev); 1416 struct phy_device *phydev = netdev->phydev; 1417 u32 data; 1418 1419 phy_print_status(phydev); 1420 if (phydev->state == PHY_RUNNING) { 1421 int remote_advertisement = 0; 1422 int local_advertisement = 0; 1423 1424 data = lan743x_csr_read(adapter, MAC_CR); 1425 1426 /* set duplex mode */ 1427 if (phydev->duplex) 1428 data |= MAC_CR_DPX_; 1429 else 1430 data &= ~MAC_CR_DPX_; 1431 1432 /* set bus speed */ 1433 switch (phydev->speed) { 1434 case SPEED_10: 1435 data &= ~MAC_CR_CFG_H_; 1436 data &= ~MAC_CR_CFG_L_; 1437 break; 1438 case SPEED_100: 1439 data &= ~MAC_CR_CFG_H_; 1440 data |= MAC_CR_CFG_L_; 1441 break; 1442 case SPEED_1000: 1443 data |= MAC_CR_CFG_H_; 1444 data &= ~MAC_CR_CFG_L_; 1445 break; 1446 case SPEED_2500: 1447 data |= MAC_CR_CFG_H_; 1448 data |= MAC_CR_CFG_L_; 1449 break; 1450 } 1451 lan743x_csr_write(adapter, MAC_CR, data); 1452 1453 local_advertisement = 1454 linkmode_adv_to_mii_adv_t(phydev->advertising); 1455 remote_advertisement = 1456 linkmode_adv_to_mii_adv_t(phydev->lp_advertising); 1457 1458 lan743x_phy_update_flowcontrol(adapter, local_advertisement, 1459 remote_advertisement); 1460 lan743x_ptp_update_latency(adapter, phydev->speed); 1461 if (phydev->interface == PHY_INTERFACE_MODE_SGMII || 1462 phydev->interface == PHY_INTERFACE_MODE_1000BASEX || 1463 phydev->interface == PHY_INTERFACE_MODE_2500BASEX) 1464 lan743x_sgmii_config(adapter); 1465 } 1466 } 1467 1468 static void lan743x_phy_close(struct lan743x_adapter *adapter) 1469 { 1470 struct net_device *netdev = adapter->netdev; 1471 1472 phy_stop(netdev->phydev); 1473 phy_disconnect(netdev->phydev); 1474 } 1475 1476 static void lan743x_phy_interface_select(struct lan743x_adapter *adapter) 1477 { 1478 u32 id_rev; 1479 u32 data; 1480 1481 data = lan743x_csr_read(adapter, MAC_CR); 1482 id_rev = adapter->csr.id_rev & ID_REV_ID_MASK_; 1483 1484 if (adapter->is_pci11x1x && adapter->is_sgmii_en) 1485 adapter->phy_interface = PHY_INTERFACE_MODE_SGMII; 1486 else if (id_rev == ID_REV_ID_LAN7430_) 1487 adapter->phy_interface = PHY_INTERFACE_MODE_GMII; 1488 else if ((id_rev == ID_REV_ID_LAN7431_) && (data & MAC_CR_MII_EN_)) 1489 adapter->phy_interface = PHY_INTERFACE_MODE_MII; 1490 else 1491 adapter->phy_interface = PHY_INTERFACE_MODE_RGMII; 1492 } 1493 1494 static int lan743x_phy_open(struct lan743x_adapter *adapter) 1495 { 1496 struct net_device *netdev = adapter->netdev; 1497 struct lan743x_phy *phy = &adapter->phy; 1498 struct fixed_phy_status fphy_status = { 1499 .link = 1, 1500 .speed = SPEED_1000, 1501 .duplex = DUPLEX_FULL, 1502 }; 1503 struct phy_device *phydev; 1504 int ret = -EIO; 1505 1506 /* try devicetree phy, or fixed link */ 1507 phydev = of_phy_get_and_connect(netdev, adapter->pdev->dev.of_node, 1508 lan743x_phy_link_status_change); 1509 1510 if (!phydev) { 1511 /* try internal phy */ 1512 phydev = phy_find_first(adapter->mdiobus); 1513 if (!phydev) { 1514 if ((adapter->csr.id_rev & ID_REV_ID_MASK_) == 1515 ID_REV_ID_LAN7431_) { 1516 phydev = fixed_phy_register(PHY_POLL, 1517 &fphy_status, NULL); 1518 if (IS_ERR(phydev)) { 1519 netdev_err(netdev, "No PHY/fixed_PHY found\n"); 1520 return PTR_ERR(phydev); 1521 } 1522 } else { 1523 goto return_error; 1524 } 1525 } 1526 1527 lan743x_phy_interface_select(adapter); 1528 1529 ret = phy_connect_direct(netdev, phydev, 1530 lan743x_phy_link_status_change, 1531 adapter->phy_interface); 1532 if (ret) 1533 goto return_error; 1534 } 1535 1536 /* MAC doesn't support 1000T Half */ 1537 phy_remove_link_mode(phydev, ETHTOOL_LINK_MODE_1000baseT_Half_BIT); 1538 1539 /* support both flow controls */ 1540 phy_support_asym_pause(phydev); 1541 phy->fc_request_control = (FLOW_CTRL_RX | FLOW_CTRL_TX); 1542 phy->fc_autoneg = phydev->autoneg; 1543 1544 phy_start(phydev); 1545 phy_start_aneg(phydev); 1546 phy_attached_info(phydev); 1547 return 0; 1548 1549 return_error: 1550 return ret; 1551 } 1552 1553 static void lan743x_rfe_open(struct lan743x_adapter *adapter) 1554 { 1555 lan743x_csr_write(adapter, RFE_RSS_CFG, 1556 RFE_RSS_CFG_UDP_IPV6_EX_ | 1557 RFE_RSS_CFG_TCP_IPV6_EX_ | 1558 RFE_RSS_CFG_IPV6_EX_ | 1559 RFE_RSS_CFG_UDP_IPV6_ | 1560 RFE_RSS_CFG_TCP_IPV6_ | 1561 RFE_RSS_CFG_IPV6_ | 1562 RFE_RSS_CFG_UDP_IPV4_ | 1563 RFE_RSS_CFG_TCP_IPV4_ | 1564 RFE_RSS_CFG_IPV4_ | 1565 RFE_RSS_CFG_VALID_HASH_BITS_ | 1566 RFE_RSS_CFG_RSS_QUEUE_ENABLE_ | 1567 RFE_RSS_CFG_RSS_HASH_STORE_ | 1568 RFE_RSS_CFG_RSS_ENABLE_); 1569 } 1570 1571 static void lan743x_rfe_update_mac_address(struct lan743x_adapter *adapter) 1572 { 1573 u8 *mac_addr; 1574 u32 mac_addr_hi = 0; 1575 u32 mac_addr_lo = 0; 1576 1577 /* Add mac address to perfect Filter */ 1578 mac_addr = adapter->mac_address; 1579 mac_addr_lo = ((((u32)(mac_addr[0])) << 0) | 1580 (((u32)(mac_addr[1])) << 8) | 1581 (((u32)(mac_addr[2])) << 16) | 1582 (((u32)(mac_addr[3])) << 24)); 1583 mac_addr_hi = ((((u32)(mac_addr[4])) << 0) | 1584 (((u32)(mac_addr[5])) << 8)); 1585 1586 lan743x_csr_write(adapter, RFE_ADDR_FILT_LO(0), mac_addr_lo); 1587 lan743x_csr_write(adapter, RFE_ADDR_FILT_HI(0), 1588 mac_addr_hi | RFE_ADDR_FILT_HI_VALID_); 1589 } 1590 1591 static void lan743x_rfe_set_multicast(struct lan743x_adapter *adapter) 1592 { 1593 struct net_device *netdev = adapter->netdev; 1594 u32 hash_table[DP_SEL_VHF_HASH_LEN]; 1595 u32 rfctl; 1596 u32 data; 1597 1598 rfctl = lan743x_csr_read(adapter, RFE_CTL); 1599 rfctl &= ~(RFE_CTL_AU_ | RFE_CTL_AM_ | 1600 RFE_CTL_DA_PERFECT_ | RFE_CTL_MCAST_HASH_); 1601 rfctl |= RFE_CTL_AB_; 1602 if (netdev->flags & IFF_PROMISC) { 1603 rfctl |= RFE_CTL_AM_ | RFE_CTL_AU_; 1604 } else { 1605 if (netdev->flags & IFF_ALLMULTI) 1606 rfctl |= RFE_CTL_AM_; 1607 } 1608 1609 if (netdev->features & NETIF_F_RXCSUM) 1610 rfctl |= RFE_CTL_IP_COE_ | RFE_CTL_TCP_UDP_COE_; 1611 1612 memset(hash_table, 0, DP_SEL_VHF_HASH_LEN * sizeof(u32)); 1613 if (netdev_mc_count(netdev)) { 1614 struct netdev_hw_addr *ha; 1615 int i; 1616 1617 rfctl |= RFE_CTL_DA_PERFECT_; 1618 i = 1; 1619 netdev_for_each_mc_addr(ha, netdev) { 1620 /* set first 32 into Perfect Filter */ 1621 if (i < 33) { 1622 lan743x_csr_write(adapter, 1623 RFE_ADDR_FILT_HI(i), 0); 1624 data = ha->addr[3]; 1625 data = ha->addr[2] | (data << 8); 1626 data = ha->addr[1] | (data << 8); 1627 data = ha->addr[0] | (data << 8); 1628 lan743x_csr_write(adapter, 1629 RFE_ADDR_FILT_LO(i), data); 1630 data = ha->addr[5]; 1631 data = ha->addr[4] | (data << 8); 1632 data |= RFE_ADDR_FILT_HI_VALID_; 1633 lan743x_csr_write(adapter, 1634 RFE_ADDR_FILT_HI(i), data); 1635 } else { 1636 u32 bitnum = (ether_crc(ETH_ALEN, ha->addr) >> 1637 23) & 0x1FF; 1638 hash_table[bitnum / 32] |= (1 << (bitnum % 32)); 1639 rfctl |= RFE_CTL_MCAST_HASH_; 1640 } 1641 i++; 1642 } 1643 } 1644 1645 lan743x_dp_write(adapter, DP_SEL_RFE_RAM, 1646 DP_SEL_VHF_VLAN_LEN, 1647 DP_SEL_VHF_HASH_LEN, hash_table); 1648 lan743x_csr_write(adapter, RFE_CTL, rfctl); 1649 } 1650 1651 static int lan743x_dmac_init(struct lan743x_adapter *adapter) 1652 { 1653 u32 data = 0; 1654 1655 lan743x_csr_write(adapter, DMAC_CMD, DMAC_CMD_SWR_); 1656 lan743x_csr_wait_for_bit(adapter, DMAC_CMD, DMAC_CMD_SWR_, 1657 0, 1000, 20000, 100); 1658 switch (DEFAULT_DMA_DESCRIPTOR_SPACING) { 1659 case DMA_DESCRIPTOR_SPACING_16: 1660 data = DMAC_CFG_MAX_DSPACE_16_; 1661 break; 1662 case DMA_DESCRIPTOR_SPACING_32: 1663 data = DMAC_CFG_MAX_DSPACE_32_; 1664 break; 1665 case DMA_DESCRIPTOR_SPACING_64: 1666 data = DMAC_CFG_MAX_DSPACE_64_; 1667 break; 1668 case DMA_DESCRIPTOR_SPACING_128: 1669 data = DMAC_CFG_MAX_DSPACE_128_; 1670 break; 1671 default: 1672 return -EPERM; 1673 } 1674 if (!(adapter->csr.flags & LAN743X_CSR_FLAG_IS_A0)) 1675 data |= DMAC_CFG_COAL_EN_; 1676 data |= DMAC_CFG_CH_ARB_SEL_RX_HIGH_; 1677 data |= DMAC_CFG_MAX_READ_REQ_SET_(6); 1678 lan743x_csr_write(adapter, DMAC_CFG, data); 1679 data = DMAC_COAL_CFG_TIMER_LIMIT_SET_(1); 1680 data |= DMAC_COAL_CFG_TIMER_TX_START_; 1681 data |= DMAC_COAL_CFG_FLUSH_INTS_; 1682 data |= DMAC_COAL_CFG_INT_EXIT_COAL_; 1683 data |= DMAC_COAL_CFG_CSR_EXIT_COAL_; 1684 data |= DMAC_COAL_CFG_TX_THRES_SET_(0x0A); 1685 data |= DMAC_COAL_CFG_RX_THRES_SET_(0x0C); 1686 lan743x_csr_write(adapter, DMAC_COAL_CFG, data); 1687 data = DMAC_OBFF_TX_THRES_SET_(0x08); 1688 data |= DMAC_OBFF_RX_THRES_SET_(0x0A); 1689 lan743x_csr_write(adapter, DMAC_OBFF_CFG, data); 1690 return 0; 1691 } 1692 1693 static int lan743x_dmac_tx_get_state(struct lan743x_adapter *adapter, 1694 int tx_channel) 1695 { 1696 u32 dmac_cmd = 0; 1697 1698 dmac_cmd = lan743x_csr_read(adapter, DMAC_CMD); 1699 return DMAC_CHANNEL_STATE_SET((dmac_cmd & 1700 DMAC_CMD_START_T_(tx_channel)), 1701 (dmac_cmd & 1702 DMAC_CMD_STOP_T_(tx_channel))); 1703 } 1704 1705 static int lan743x_dmac_tx_wait_till_stopped(struct lan743x_adapter *adapter, 1706 int tx_channel) 1707 { 1708 int timeout = 100; 1709 int result = 0; 1710 1711 while (timeout && 1712 ((result = lan743x_dmac_tx_get_state(adapter, tx_channel)) == 1713 DMAC_CHANNEL_STATE_STOP_PENDING)) { 1714 usleep_range(1000, 20000); 1715 timeout--; 1716 } 1717 if (result == DMAC_CHANNEL_STATE_STOP_PENDING) 1718 result = -ENODEV; 1719 return result; 1720 } 1721 1722 static int lan743x_dmac_rx_get_state(struct lan743x_adapter *adapter, 1723 int rx_channel) 1724 { 1725 u32 dmac_cmd = 0; 1726 1727 dmac_cmd = lan743x_csr_read(adapter, DMAC_CMD); 1728 return DMAC_CHANNEL_STATE_SET((dmac_cmd & 1729 DMAC_CMD_START_R_(rx_channel)), 1730 (dmac_cmd & 1731 DMAC_CMD_STOP_R_(rx_channel))); 1732 } 1733 1734 static int lan743x_dmac_rx_wait_till_stopped(struct lan743x_adapter *adapter, 1735 int rx_channel) 1736 { 1737 int timeout = 100; 1738 int result = 0; 1739 1740 while (timeout && 1741 ((result = lan743x_dmac_rx_get_state(adapter, rx_channel)) == 1742 DMAC_CHANNEL_STATE_STOP_PENDING)) { 1743 usleep_range(1000, 20000); 1744 timeout--; 1745 } 1746 if (result == DMAC_CHANNEL_STATE_STOP_PENDING) 1747 result = -ENODEV; 1748 return result; 1749 } 1750 1751 static void lan743x_tx_release_desc(struct lan743x_tx *tx, 1752 int descriptor_index, bool cleanup) 1753 { 1754 struct lan743x_tx_buffer_info *buffer_info = NULL; 1755 struct lan743x_tx_descriptor *descriptor = NULL; 1756 u32 descriptor_type = 0; 1757 bool ignore_sync; 1758 1759 descriptor = &tx->ring_cpu_ptr[descriptor_index]; 1760 buffer_info = &tx->buffer_info[descriptor_index]; 1761 if (!(buffer_info->flags & TX_BUFFER_INFO_FLAG_ACTIVE)) 1762 goto done; 1763 1764 descriptor_type = le32_to_cpu(descriptor->data0) & 1765 TX_DESC_DATA0_DTYPE_MASK_; 1766 if (descriptor_type == TX_DESC_DATA0_DTYPE_DATA_) 1767 goto clean_up_data_descriptor; 1768 else 1769 goto clear_active; 1770 1771 clean_up_data_descriptor: 1772 if (buffer_info->dma_ptr) { 1773 if (buffer_info->flags & 1774 TX_BUFFER_INFO_FLAG_SKB_FRAGMENT) { 1775 dma_unmap_page(&tx->adapter->pdev->dev, 1776 buffer_info->dma_ptr, 1777 buffer_info->buffer_length, 1778 DMA_TO_DEVICE); 1779 } else { 1780 dma_unmap_single(&tx->adapter->pdev->dev, 1781 buffer_info->dma_ptr, 1782 buffer_info->buffer_length, 1783 DMA_TO_DEVICE); 1784 } 1785 buffer_info->dma_ptr = 0; 1786 buffer_info->buffer_length = 0; 1787 } 1788 if (!buffer_info->skb) 1789 goto clear_active; 1790 1791 if (!(buffer_info->flags & TX_BUFFER_INFO_FLAG_TIMESTAMP_REQUESTED)) { 1792 dev_kfree_skb_any(buffer_info->skb); 1793 goto clear_skb; 1794 } 1795 1796 if (cleanup) { 1797 lan743x_ptp_unrequest_tx_timestamp(tx->adapter); 1798 dev_kfree_skb_any(buffer_info->skb); 1799 } else { 1800 ignore_sync = (buffer_info->flags & 1801 TX_BUFFER_INFO_FLAG_IGNORE_SYNC) != 0; 1802 lan743x_ptp_tx_timestamp_skb(tx->adapter, 1803 buffer_info->skb, ignore_sync); 1804 } 1805 1806 clear_skb: 1807 buffer_info->skb = NULL; 1808 1809 clear_active: 1810 buffer_info->flags &= ~TX_BUFFER_INFO_FLAG_ACTIVE; 1811 1812 done: 1813 memset(buffer_info, 0, sizeof(*buffer_info)); 1814 memset(descriptor, 0, sizeof(*descriptor)); 1815 } 1816 1817 static int lan743x_tx_next_index(struct lan743x_tx *tx, int index) 1818 { 1819 return ((++index) % tx->ring_size); 1820 } 1821 1822 static void lan743x_tx_release_completed_descriptors(struct lan743x_tx *tx) 1823 { 1824 while (le32_to_cpu(*tx->head_cpu_ptr) != (tx->last_head)) { 1825 lan743x_tx_release_desc(tx, tx->last_head, false); 1826 tx->last_head = lan743x_tx_next_index(tx, tx->last_head); 1827 } 1828 } 1829 1830 static void lan743x_tx_release_all_descriptors(struct lan743x_tx *tx) 1831 { 1832 u32 original_head = 0; 1833 1834 original_head = tx->last_head; 1835 do { 1836 lan743x_tx_release_desc(tx, tx->last_head, true); 1837 tx->last_head = lan743x_tx_next_index(tx, tx->last_head); 1838 } while (tx->last_head != original_head); 1839 memset(tx->ring_cpu_ptr, 0, 1840 sizeof(*tx->ring_cpu_ptr) * (tx->ring_size)); 1841 memset(tx->buffer_info, 0, 1842 sizeof(*tx->buffer_info) * (tx->ring_size)); 1843 } 1844 1845 static int lan743x_tx_get_desc_cnt(struct lan743x_tx *tx, 1846 struct sk_buff *skb) 1847 { 1848 int result = 1; /* 1 for the main skb buffer */ 1849 int nr_frags = 0; 1850 1851 if (skb_is_gso(skb)) 1852 result++; /* requires an extension descriptor */ 1853 nr_frags = skb_shinfo(skb)->nr_frags; 1854 result += nr_frags; /* 1 for each fragment buffer */ 1855 return result; 1856 } 1857 1858 static int lan743x_tx_get_avail_desc(struct lan743x_tx *tx) 1859 { 1860 int last_head = tx->last_head; 1861 int last_tail = tx->last_tail; 1862 1863 if (last_tail >= last_head) 1864 return tx->ring_size - last_tail + last_head - 1; 1865 else 1866 return last_head - last_tail - 1; 1867 } 1868 1869 void lan743x_tx_set_timestamping_mode(struct lan743x_tx *tx, 1870 bool enable_timestamping, 1871 bool enable_onestep_sync) 1872 { 1873 if (enable_timestamping) 1874 tx->ts_flags |= TX_TS_FLAG_TIMESTAMPING_ENABLED; 1875 else 1876 tx->ts_flags &= ~TX_TS_FLAG_TIMESTAMPING_ENABLED; 1877 if (enable_onestep_sync) 1878 tx->ts_flags |= TX_TS_FLAG_ONE_STEP_SYNC; 1879 else 1880 tx->ts_flags &= ~TX_TS_FLAG_ONE_STEP_SYNC; 1881 } 1882 1883 static int lan743x_tx_frame_start(struct lan743x_tx *tx, 1884 unsigned char *first_buffer, 1885 unsigned int first_buffer_length, 1886 unsigned int frame_length, 1887 bool time_stamp, 1888 bool check_sum) 1889 { 1890 /* called only from within lan743x_tx_xmit_frame. 1891 * assuming tx->ring_lock has already been acquired. 1892 */ 1893 struct lan743x_tx_descriptor *tx_descriptor = NULL; 1894 struct lan743x_tx_buffer_info *buffer_info = NULL; 1895 struct lan743x_adapter *adapter = tx->adapter; 1896 struct device *dev = &adapter->pdev->dev; 1897 dma_addr_t dma_ptr; 1898 1899 tx->frame_flags |= TX_FRAME_FLAG_IN_PROGRESS; 1900 tx->frame_first = tx->last_tail; 1901 tx->frame_tail = tx->frame_first; 1902 1903 tx_descriptor = &tx->ring_cpu_ptr[tx->frame_tail]; 1904 buffer_info = &tx->buffer_info[tx->frame_tail]; 1905 dma_ptr = dma_map_single(dev, first_buffer, first_buffer_length, 1906 DMA_TO_DEVICE); 1907 if (dma_mapping_error(dev, dma_ptr)) 1908 return -ENOMEM; 1909 1910 tx_descriptor->data1 = cpu_to_le32(DMA_ADDR_LOW32(dma_ptr)); 1911 tx_descriptor->data2 = cpu_to_le32(DMA_ADDR_HIGH32(dma_ptr)); 1912 tx_descriptor->data3 = cpu_to_le32((frame_length << 16) & 1913 TX_DESC_DATA3_FRAME_LENGTH_MSS_MASK_); 1914 1915 buffer_info->skb = NULL; 1916 buffer_info->dma_ptr = dma_ptr; 1917 buffer_info->buffer_length = first_buffer_length; 1918 buffer_info->flags |= TX_BUFFER_INFO_FLAG_ACTIVE; 1919 1920 tx->frame_data0 = (first_buffer_length & 1921 TX_DESC_DATA0_BUF_LENGTH_MASK_) | 1922 TX_DESC_DATA0_DTYPE_DATA_ | 1923 TX_DESC_DATA0_FS_ | 1924 TX_DESC_DATA0_FCS_; 1925 if (time_stamp) 1926 tx->frame_data0 |= TX_DESC_DATA0_TSE_; 1927 1928 if (check_sum) 1929 tx->frame_data0 |= TX_DESC_DATA0_ICE_ | 1930 TX_DESC_DATA0_IPE_ | 1931 TX_DESC_DATA0_TPE_; 1932 1933 /* data0 will be programmed in one of other frame assembler functions */ 1934 return 0; 1935 } 1936 1937 static void lan743x_tx_frame_add_lso(struct lan743x_tx *tx, 1938 unsigned int frame_length, 1939 int nr_frags) 1940 { 1941 /* called only from within lan743x_tx_xmit_frame. 1942 * assuming tx->ring_lock has already been acquired. 1943 */ 1944 struct lan743x_tx_descriptor *tx_descriptor = NULL; 1945 struct lan743x_tx_buffer_info *buffer_info = NULL; 1946 1947 /* wrap up previous descriptor */ 1948 tx->frame_data0 |= TX_DESC_DATA0_EXT_; 1949 if (nr_frags <= 0) { 1950 tx->frame_data0 |= TX_DESC_DATA0_LS_; 1951 tx->frame_data0 |= TX_DESC_DATA0_IOC_; 1952 } 1953 tx_descriptor = &tx->ring_cpu_ptr[tx->frame_tail]; 1954 tx_descriptor->data0 = cpu_to_le32(tx->frame_data0); 1955 1956 /* move to next descriptor */ 1957 tx->frame_tail = lan743x_tx_next_index(tx, tx->frame_tail); 1958 tx_descriptor = &tx->ring_cpu_ptr[tx->frame_tail]; 1959 buffer_info = &tx->buffer_info[tx->frame_tail]; 1960 1961 /* add extension descriptor */ 1962 tx_descriptor->data1 = 0; 1963 tx_descriptor->data2 = 0; 1964 tx_descriptor->data3 = 0; 1965 1966 buffer_info->skb = NULL; 1967 buffer_info->dma_ptr = 0; 1968 buffer_info->buffer_length = 0; 1969 buffer_info->flags |= TX_BUFFER_INFO_FLAG_ACTIVE; 1970 1971 tx->frame_data0 = (frame_length & TX_DESC_DATA0_EXT_PAY_LENGTH_MASK_) | 1972 TX_DESC_DATA0_DTYPE_EXT_ | 1973 TX_DESC_DATA0_EXT_LSO_; 1974 1975 /* data0 will be programmed in one of other frame assembler functions */ 1976 } 1977 1978 static int lan743x_tx_frame_add_fragment(struct lan743x_tx *tx, 1979 const skb_frag_t *fragment, 1980 unsigned int frame_length) 1981 { 1982 /* called only from within lan743x_tx_xmit_frame 1983 * assuming tx->ring_lock has already been acquired 1984 */ 1985 struct lan743x_tx_descriptor *tx_descriptor = NULL; 1986 struct lan743x_tx_buffer_info *buffer_info = NULL; 1987 struct lan743x_adapter *adapter = tx->adapter; 1988 struct device *dev = &adapter->pdev->dev; 1989 unsigned int fragment_length = 0; 1990 dma_addr_t dma_ptr; 1991 1992 fragment_length = skb_frag_size(fragment); 1993 if (!fragment_length) 1994 return 0; 1995 1996 /* wrap up previous descriptor */ 1997 tx_descriptor = &tx->ring_cpu_ptr[tx->frame_tail]; 1998 tx_descriptor->data0 = cpu_to_le32(tx->frame_data0); 1999 2000 /* move to next descriptor */ 2001 tx->frame_tail = lan743x_tx_next_index(tx, tx->frame_tail); 2002 tx_descriptor = &tx->ring_cpu_ptr[tx->frame_tail]; 2003 buffer_info = &tx->buffer_info[tx->frame_tail]; 2004 dma_ptr = skb_frag_dma_map(dev, fragment, 2005 0, fragment_length, 2006 DMA_TO_DEVICE); 2007 if (dma_mapping_error(dev, dma_ptr)) { 2008 int desc_index; 2009 2010 /* cleanup all previously setup descriptors */ 2011 desc_index = tx->frame_first; 2012 while (desc_index != tx->frame_tail) { 2013 lan743x_tx_release_desc(tx, desc_index, true); 2014 desc_index = lan743x_tx_next_index(tx, desc_index); 2015 } 2016 dma_wmb(); 2017 tx->frame_flags &= ~TX_FRAME_FLAG_IN_PROGRESS; 2018 tx->frame_first = 0; 2019 tx->frame_data0 = 0; 2020 tx->frame_tail = 0; 2021 return -ENOMEM; 2022 } 2023 2024 tx_descriptor->data1 = cpu_to_le32(DMA_ADDR_LOW32(dma_ptr)); 2025 tx_descriptor->data2 = cpu_to_le32(DMA_ADDR_HIGH32(dma_ptr)); 2026 tx_descriptor->data3 = cpu_to_le32((frame_length << 16) & 2027 TX_DESC_DATA3_FRAME_LENGTH_MSS_MASK_); 2028 2029 buffer_info->skb = NULL; 2030 buffer_info->dma_ptr = dma_ptr; 2031 buffer_info->buffer_length = fragment_length; 2032 buffer_info->flags |= TX_BUFFER_INFO_FLAG_ACTIVE; 2033 buffer_info->flags |= TX_BUFFER_INFO_FLAG_SKB_FRAGMENT; 2034 2035 tx->frame_data0 = (fragment_length & TX_DESC_DATA0_BUF_LENGTH_MASK_) | 2036 TX_DESC_DATA0_DTYPE_DATA_ | 2037 TX_DESC_DATA0_FCS_; 2038 2039 /* data0 will be programmed in one of other frame assembler functions */ 2040 return 0; 2041 } 2042 2043 static void lan743x_tx_frame_end(struct lan743x_tx *tx, 2044 struct sk_buff *skb, 2045 bool time_stamp, 2046 bool ignore_sync) 2047 { 2048 /* called only from within lan743x_tx_xmit_frame 2049 * assuming tx->ring_lock has already been acquired 2050 */ 2051 struct lan743x_tx_descriptor *tx_descriptor = NULL; 2052 struct lan743x_tx_buffer_info *buffer_info = NULL; 2053 struct lan743x_adapter *adapter = tx->adapter; 2054 u32 tx_tail_flags = 0; 2055 2056 /* wrap up previous descriptor */ 2057 if ((tx->frame_data0 & TX_DESC_DATA0_DTYPE_MASK_) == 2058 TX_DESC_DATA0_DTYPE_DATA_) { 2059 tx->frame_data0 |= TX_DESC_DATA0_LS_; 2060 tx->frame_data0 |= TX_DESC_DATA0_IOC_; 2061 } 2062 2063 tx_descriptor = &tx->ring_cpu_ptr[tx->frame_tail]; 2064 buffer_info = &tx->buffer_info[tx->frame_tail]; 2065 buffer_info->skb = skb; 2066 if (time_stamp) 2067 buffer_info->flags |= TX_BUFFER_INFO_FLAG_TIMESTAMP_REQUESTED; 2068 if (ignore_sync) 2069 buffer_info->flags |= TX_BUFFER_INFO_FLAG_IGNORE_SYNC; 2070 2071 tx_descriptor->data0 = cpu_to_le32(tx->frame_data0); 2072 tx->frame_tail = lan743x_tx_next_index(tx, tx->frame_tail); 2073 tx->last_tail = tx->frame_tail; 2074 2075 dma_wmb(); 2076 2077 if (tx->vector_flags & LAN743X_VECTOR_FLAG_VECTOR_ENABLE_AUTO_SET) 2078 tx_tail_flags |= TX_TAIL_SET_TOP_INT_VEC_EN_; 2079 if (tx->vector_flags & LAN743X_VECTOR_FLAG_SOURCE_ENABLE_AUTO_SET) 2080 tx_tail_flags |= TX_TAIL_SET_DMAC_INT_EN_ | 2081 TX_TAIL_SET_TOP_INT_EN_; 2082 2083 lan743x_csr_write(adapter, TX_TAIL(tx->channel_number), 2084 tx_tail_flags | tx->frame_tail); 2085 tx->frame_flags &= ~TX_FRAME_FLAG_IN_PROGRESS; 2086 } 2087 2088 static netdev_tx_t lan743x_tx_xmit_frame(struct lan743x_tx *tx, 2089 struct sk_buff *skb) 2090 { 2091 int required_number_of_descriptors = 0; 2092 unsigned int start_frame_length = 0; 2093 netdev_tx_t retval = NETDEV_TX_OK; 2094 unsigned int frame_length = 0; 2095 unsigned int head_length = 0; 2096 unsigned long irq_flags = 0; 2097 bool do_timestamp = false; 2098 bool ignore_sync = false; 2099 struct netdev_queue *txq; 2100 int nr_frags = 0; 2101 bool gso = false; 2102 int j; 2103 2104 required_number_of_descriptors = lan743x_tx_get_desc_cnt(tx, skb); 2105 2106 spin_lock_irqsave(&tx->ring_lock, irq_flags); 2107 if (required_number_of_descriptors > 2108 lan743x_tx_get_avail_desc(tx)) { 2109 if (required_number_of_descriptors > (tx->ring_size - 1)) { 2110 dev_kfree_skb_irq(skb); 2111 } else { 2112 /* save how many descriptors we needed to restart the queue */ 2113 tx->rqd_descriptors = required_number_of_descriptors; 2114 retval = NETDEV_TX_BUSY; 2115 txq = netdev_get_tx_queue(tx->adapter->netdev, 2116 tx->channel_number); 2117 netif_tx_stop_queue(txq); 2118 } 2119 goto unlock; 2120 } 2121 2122 /* space available, transmit skb */ 2123 if ((skb_shinfo(skb)->tx_flags & SKBTX_HW_TSTAMP) && 2124 (tx->ts_flags & TX_TS_FLAG_TIMESTAMPING_ENABLED) && 2125 (lan743x_ptp_request_tx_timestamp(tx->adapter))) { 2126 skb_shinfo(skb)->tx_flags |= SKBTX_IN_PROGRESS; 2127 do_timestamp = true; 2128 if (tx->ts_flags & TX_TS_FLAG_ONE_STEP_SYNC) 2129 ignore_sync = true; 2130 } 2131 head_length = skb_headlen(skb); 2132 frame_length = skb_pagelen(skb); 2133 nr_frags = skb_shinfo(skb)->nr_frags; 2134 start_frame_length = frame_length; 2135 gso = skb_is_gso(skb); 2136 if (gso) { 2137 start_frame_length = max(skb_shinfo(skb)->gso_size, 2138 (unsigned short)8); 2139 } 2140 2141 if (lan743x_tx_frame_start(tx, 2142 skb->data, head_length, 2143 start_frame_length, 2144 do_timestamp, 2145 skb->ip_summed == CHECKSUM_PARTIAL)) { 2146 dev_kfree_skb_irq(skb); 2147 goto unlock; 2148 } 2149 tx->frame_count++; 2150 2151 if (gso) 2152 lan743x_tx_frame_add_lso(tx, frame_length, nr_frags); 2153 2154 if (nr_frags <= 0) 2155 goto finish; 2156 2157 for (j = 0; j < nr_frags; j++) { 2158 const skb_frag_t *frag = &(skb_shinfo(skb)->frags[j]); 2159 2160 if (lan743x_tx_frame_add_fragment(tx, frag, frame_length)) { 2161 /* upon error no need to call 2162 * lan743x_tx_frame_end 2163 * frame assembler clean up was performed inside 2164 * lan743x_tx_frame_add_fragment 2165 */ 2166 dev_kfree_skb_irq(skb); 2167 goto unlock; 2168 } 2169 } 2170 2171 finish: 2172 lan743x_tx_frame_end(tx, skb, do_timestamp, ignore_sync); 2173 2174 unlock: 2175 spin_unlock_irqrestore(&tx->ring_lock, irq_flags); 2176 return retval; 2177 } 2178 2179 static int lan743x_tx_napi_poll(struct napi_struct *napi, int weight) 2180 { 2181 struct lan743x_tx *tx = container_of(napi, struct lan743x_tx, napi); 2182 struct lan743x_adapter *adapter = tx->adapter; 2183 unsigned long irq_flags = 0; 2184 struct netdev_queue *txq; 2185 u32 ioc_bit = 0; 2186 2187 ioc_bit = DMAC_INT_BIT_TX_IOC_(tx->channel_number); 2188 lan743x_csr_read(adapter, DMAC_INT_STS); 2189 if (tx->vector_flags & LAN743X_VECTOR_FLAG_SOURCE_STATUS_W2C) 2190 lan743x_csr_write(adapter, DMAC_INT_STS, ioc_bit); 2191 spin_lock_irqsave(&tx->ring_lock, irq_flags); 2192 2193 /* clean up tx ring */ 2194 lan743x_tx_release_completed_descriptors(tx); 2195 txq = netdev_get_tx_queue(adapter->netdev, tx->channel_number); 2196 if (netif_tx_queue_stopped(txq)) { 2197 if (tx->rqd_descriptors) { 2198 if (tx->rqd_descriptors <= 2199 lan743x_tx_get_avail_desc(tx)) { 2200 tx->rqd_descriptors = 0; 2201 netif_tx_wake_queue(txq); 2202 } 2203 } else { 2204 netif_tx_wake_queue(txq); 2205 } 2206 } 2207 spin_unlock_irqrestore(&tx->ring_lock, irq_flags); 2208 2209 if (!napi_complete(napi)) 2210 goto done; 2211 2212 /* enable isr */ 2213 lan743x_csr_write(adapter, INT_EN_SET, 2214 INT_BIT_DMA_TX_(tx->channel_number)); 2215 lan743x_csr_read(adapter, INT_STS); 2216 2217 done: 2218 return 0; 2219 } 2220 2221 static void lan743x_tx_ring_cleanup(struct lan743x_tx *tx) 2222 { 2223 if (tx->head_cpu_ptr) { 2224 dma_free_coherent(&tx->adapter->pdev->dev, 2225 sizeof(*tx->head_cpu_ptr), tx->head_cpu_ptr, 2226 tx->head_dma_ptr); 2227 tx->head_cpu_ptr = NULL; 2228 tx->head_dma_ptr = 0; 2229 } 2230 kfree(tx->buffer_info); 2231 tx->buffer_info = NULL; 2232 2233 if (tx->ring_cpu_ptr) { 2234 dma_free_coherent(&tx->adapter->pdev->dev, 2235 tx->ring_allocation_size, tx->ring_cpu_ptr, 2236 tx->ring_dma_ptr); 2237 tx->ring_allocation_size = 0; 2238 tx->ring_cpu_ptr = NULL; 2239 tx->ring_dma_ptr = 0; 2240 } 2241 tx->ring_size = 0; 2242 } 2243 2244 static int lan743x_tx_ring_init(struct lan743x_tx *tx) 2245 { 2246 size_t ring_allocation_size = 0; 2247 void *cpu_ptr = NULL; 2248 dma_addr_t dma_ptr; 2249 int ret = -ENOMEM; 2250 2251 tx->ring_size = LAN743X_TX_RING_SIZE; 2252 if (tx->ring_size & ~TX_CFG_B_TX_RING_LEN_MASK_) { 2253 ret = -EINVAL; 2254 goto cleanup; 2255 } 2256 if (dma_set_mask_and_coherent(&tx->adapter->pdev->dev, 2257 DMA_BIT_MASK(64))) { 2258 dev_warn(&tx->adapter->pdev->dev, 2259 "lan743x_: No suitable DMA available\n"); 2260 ret = -ENOMEM; 2261 goto cleanup; 2262 } 2263 ring_allocation_size = ALIGN(tx->ring_size * 2264 sizeof(struct lan743x_tx_descriptor), 2265 PAGE_SIZE); 2266 dma_ptr = 0; 2267 cpu_ptr = dma_alloc_coherent(&tx->adapter->pdev->dev, 2268 ring_allocation_size, &dma_ptr, GFP_KERNEL); 2269 if (!cpu_ptr) { 2270 ret = -ENOMEM; 2271 goto cleanup; 2272 } 2273 2274 tx->ring_allocation_size = ring_allocation_size; 2275 tx->ring_cpu_ptr = (struct lan743x_tx_descriptor *)cpu_ptr; 2276 tx->ring_dma_ptr = dma_ptr; 2277 2278 cpu_ptr = kcalloc(tx->ring_size, sizeof(*tx->buffer_info), GFP_KERNEL); 2279 if (!cpu_ptr) { 2280 ret = -ENOMEM; 2281 goto cleanup; 2282 } 2283 tx->buffer_info = (struct lan743x_tx_buffer_info *)cpu_ptr; 2284 dma_ptr = 0; 2285 cpu_ptr = dma_alloc_coherent(&tx->adapter->pdev->dev, 2286 sizeof(*tx->head_cpu_ptr), &dma_ptr, 2287 GFP_KERNEL); 2288 if (!cpu_ptr) { 2289 ret = -ENOMEM; 2290 goto cleanup; 2291 } 2292 2293 tx->head_cpu_ptr = cpu_ptr; 2294 tx->head_dma_ptr = dma_ptr; 2295 if (tx->head_dma_ptr & 0x3) { 2296 ret = -ENOMEM; 2297 goto cleanup; 2298 } 2299 2300 return 0; 2301 2302 cleanup: 2303 lan743x_tx_ring_cleanup(tx); 2304 return ret; 2305 } 2306 2307 static void lan743x_tx_close(struct lan743x_tx *tx) 2308 { 2309 struct lan743x_adapter *adapter = tx->adapter; 2310 2311 lan743x_csr_write(adapter, 2312 DMAC_CMD, 2313 DMAC_CMD_STOP_T_(tx->channel_number)); 2314 lan743x_dmac_tx_wait_till_stopped(adapter, tx->channel_number); 2315 2316 lan743x_csr_write(adapter, 2317 DMAC_INT_EN_CLR, 2318 DMAC_INT_BIT_TX_IOC_(tx->channel_number)); 2319 lan743x_csr_write(adapter, INT_EN_CLR, 2320 INT_BIT_DMA_TX_(tx->channel_number)); 2321 napi_disable(&tx->napi); 2322 netif_napi_del(&tx->napi); 2323 2324 lan743x_csr_write(adapter, FCT_TX_CTL, 2325 FCT_TX_CTL_DIS_(tx->channel_number)); 2326 lan743x_csr_wait_for_bit(adapter, FCT_TX_CTL, 2327 FCT_TX_CTL_EN_(tx->channel_number), 2328 0, 1000, 20000, 100); 2329 2330 lan743x_tx_release_all_descriptors(tx); 2331 2332 tx->rqd_descriptors = 0; 2333 2334 lan743x_tx_ring_cleanup(tx); 2335 } 2336 2337 static int lan743x_tx_open(struct lan743x_tx *tx) 2338 { 2339 struct lan743x_adapter *adapter = NULL; 2340 u32 data = 0; 2341 int ret; 2342 2343 adapter = tx->adapter; 2344 ret = lan743x_tx_ring_init(tx); 2345 if (ret) 2346 return ret; 2347 2348 /* initialize fifo */ 2349 lan743x_csr_write(adapter, FCT_TX_CTL, 2350 FCT_TX_CTL_RESET_(tx->channel_number)); 2351 lan743x_csr_wait_for_bit(adapter, FCT_TX_CTL, 2352 FCT_TX_CTL_RESET_(tx->channel_number), 2353 0, 1000, 20000, 100); 2354 2355 /* enable fifo */ 2356 lan743x_csr_write(adapter, FCT_TX_CTL, 2357 FCT_TX_CTL_EN_(tx->channel_number)); 2358 2359 /* reset tx channel */ 2360 lan743x_csr_write(adapter, DMAC_CMD, 2361 DMAC_CMD_TX_SWR_(tx->channel_number)); 2362 lan743x_csr_wait_for_bit(adapter, DMAC_CMD, 2363 DMAC_CMD_TX_SWR_(tx->channel_number), 2364 0, 1000, 20000, 100); 2365 2366 /* Write TX_BASE_ADDR */ 2367 lan743x_csr_write(adapter, 2368 TX_BASE_ADDRH(tx->channel_number), 2369 DMA_ADDR_HIGH32(tx->ring_dma_ptr)); 2370 lan743x_csr_write(adapter, 2371 TX_BASE_ADDRL(tx->channel_number), 2372 DMA_ADDR_LOW32(tx->ring_dma_ptr)); 2373 2374 /* Write TX_CFG_B */ 2375 data = lan743x_csr_read(adapter, TX_CFG_B(tx->channel_number)); 2376 data &= ~TX_CFG_B_TX_RING_LEN_MASK_; 2377 data |= ((tx->ring_size) & TX_CFG_B_TX_RING_LEN_MASK_); 2378 if (!(adapter->csr.flags & LAN743X_CSR_FLAG_IS_A0)) 2379 data |= TX_CFG_B_TDMABL_512_; 2380 lan743x_csr_write(adapter, TX_CFG_B(tx->channel_number), data); 2381 2382 /* Write TX_CFG_A */ 2383 data = TX_CFG_A_TX_TMR_HPWB_SEL_IOC_ | TX_CFG_A_TX_HP_WB_EN_; 2384 if (!(adapter->csr.flags & LAN743X_CSR_FLAG_IS_A0)) { 2385 data |= TX_CFG_A_TX_HP_WB_ON_INT_TMR_; 2386 data |= TX_CFG_A_TX_PF_THRES_SET_(0x10); 2387 data |= TX_CFG_A_TX_PF_PRI_THRES_SET_(0x04); 2388 data |= TX_CFG_A_TX_HP_WB_THRES_SET_(0x07); 2389 } 2390 lan743x_csr_write(adapter, TX_CFG_A(tx->channel_number), data); 2391 2392 /* Write TX_HEAD_WRITEBACK_ADDR */ 2393 lan743x_csr_write(adapter, 2394 TX_HEAD_WRITEBACK_ADDRH(tx->channel_number), 2395 DMA_ADDR_HIGH32(tx->head_dma_ptr)); 2396 lan743x_csr_write(adapter, 2397 TX_HEAD_WRITEBACK_ADDRL(tx->channel_number), 2398 DMA_ADDR_LOW32(tx->head_dma_ptr)); 2399 2400 /* set last head */ 2401 tx->last_head = lan743x_csr_read(adapter, TX_HEAD(tx->channel_number)); 2402 2403 /* write TX_TAIL */ 2404 tx->last_tail = 0; 2405 lan743x_csr_write(adapter, TX_TAIL(tx->channel_number), 2406 (u32)(tx->last_tail)); 2407 tx->vector_flags = lan743x_intr_get_vector_flags(adapter, 2408 INT_BIT_DMA_TX_ 2409 (tx->channel_number)); 2410 netif_napi_add_tx_weight(adapter->netdev, 2411 &tx->napi, lan743x_tx_napi_poll, 2412 NAPI_POLL_WEIGHT); 2413 napi_enable(&tx->napi); 2414 2415 data = 0; 2416 if (tx->vector_flags & LAN743X_VECTOR_FLAG_SOURCE_ENABLE_AUTO_CLEAR) 2417 data |= TX_CFG_C_TX_TOP_INT_EN_AUTO_CLR_; 2418 if (tx->vector_flags & LAN743X_VECTOR_FLAG_SOURCE_STATUS_AUTO_CLEAR) 2419 data |= TX_CFG_C_TX_DMA_INT_STS_AUTO_CLR_; 2420 if (tx->vector_flags & LAN743X_VECTOR_FLAG_SOURCE_STATUS_R2C) 2421 data |= TX_CFG_C_TX_INT_STS_R2C_MODE_MASK_; 2422 if (tx->vector_flags & LAN743X_VECTOR_FLAG_SOURCE_ENABLE_R2C) 2423 data |= TX_CFG_C_TX_INT_EN_R2C_; 2424 lan743x_csr_write(adapter, TX_CFG_C(tx->channel_number), data); 2425 2426 if (!(tx->vector_flags & LAN743X_VECTOR_FLAG_SOURCE_ENABLE_AUTO_SET)) 2427 lan743x_csr_write(adapter, INT_EN_SET, 2428 INT_BIT_DMA_TX_(tx->channel_number)); 2429 lan743x_csr_write(adapter, DMAC_INT_EN_SET, 2430 DMAC_INT_BIT_TX_IOC_(tx->channel_number)); 2431 2432 /* start dmac channel */ 2433 lan743x_csr_write(adapter, DMAC_CMD, 2434 DMAC_CMD_START_T_(tx->channel_number)); 2435 return 0; 2436 } 2437 2438 static int lan743x_rx_next_index(struct lan743x_rx *rx, int index) 2439 { 2440 return ((++index) % rx->ring_size); 2441 } 2442 2443 static void lan743x_rx_update_tail(struct lan743x_rx *rx, int index) 2444 { 2445 /* update the tail once per 8 descriptors */ 2446 if ((index & 7) == 7) 2447 lan743x_csr_write(rx->adapter, RX_TAIL(rx->channel_number), 2448 index); 2449 } 2450 2451 static int lan743x_rx_init_ring_element(struct lan743x_rx *rx, int index, 2452 gfp_t gfp) 2453 { 2454 struct net_device *netdev = rx->adapter->netdev; 2455 struct device *dev = &rx->adapter->pdev->dev; 2456 struct lan743x_rx_buffer_info *buffer_info; 2457 unsigned int buffer_length, used_length; 2458 struct lan743x_rx_descriptor *descriptor; 2459 struct sk_buff *skb; 2460 dma_addr_t dma_ptr; 2461 2462 buffer_length = netdev->mtu + ETH_HLEN + ETH_FCS_LEN + RX_HEAD_PADDING; 2463 2464 descriptor = &rx->ring_cpu_ptr[index]; 2465 buffer_info = &rx->buffer_info[index]; 2466 skb = __netdev_alloc_skb(netdev, buffer_length, gfp); 2467 if (!skb) 2468 return -ENOMEM; 2469 dma_ptr = dma_map_single(dev, skb->data, buffer_length, DMA_FROM_DEVICE); 2470 if (dma_mapping_error(dev, dma_ptr)) { 2471 dev_kfree_skb_any(skb); 2472 return -ENOMEM; 2473 } 2474 if (buffer_info->dma_ptr) { 2475 /* sync used area of buffer only */ 2476 if (le32_to_cpu(descriptor->data0) & RX_DESC_DATA0_LS_) 2477 /* frame length is valid only if LS bit is set. 2478 * it's a safe upper bound for the used area in this 2479 * buffer. 2480 */ 2481 used_length = min(RX_DESC_DATA0_FRAME_LENGTH_GET_ 2482 (le32_to_cpu(descriptor->data0)), 2483 buffer_info->buffer_length); 2484 else 2485 used_length = buffer_info->buffer_length; 2486 dma_sync_single_for_cpu(dev, buffer_info->dma_ptr, 2487 used_length, 2488 DMA_FROM_DEVICE); 2489 dma_unmap_single_attrs(dev, buffer_info->dma_ptr, 2490 buffer_info->buffer_length, 2491 DMA_FROM_DEVICE, 2492 DMA_ATTR_SKIP_CPU_SYNC); 2493 } 2494 2495 buffer_info->skb = skb; 2496 buffer_info->dma_ptr = dma_ptr; 2497 buffer_info->buffer_length = buffer_length; 2498 descriptor->data1 = cpu_to_le32(DMA_ADDR_LOW32(buffer_info->dma_ptr)); 2499 descriptor->data2 = cpu_to_le32(DMA_ADDR_HIGH32(buffer_info->dma_ptr)); 2500 descriptor->data3 = 0; 2501 descriptor->data0 = cpu_to_le32((RX_DESC_DATA0_OWN_ | 2502 (buffer_length & RX_DESC_DATA0_BUF_LENGTH_MASK_))); 2503 lan743x_rx_update_tail(rx, index); 2504 2505 return 0; 2506 } 2507 2508 static void lan743x_rx_reuse_ring_element(struct lan743x_rx *rx, int index) 2509 { 2510 struct lan743x_rx_buffer_info *buffer_info; 2511 struct lan743x_rx_descriptor *descriptor; 2512 2513 descriptor = &rx->ring_cpu_ptr[index]; 2514 buffer_info = &rx->buffer_info[index]; 2515 2516 descriptor->data1 = cpu_to_le32(DMA_ADDR_LOW32(buffer_info->dma_ptr)); 2517 descriptor->data2 = cpu_to_le32(DMA_ADDR_HIGH32(buffer_info->dma_ptr)); 2518 descriptor->data3 = 0; 2519 descriptor->data0 = cpu_to_le32((RX_DESC_DATA0_OWN_ | 2520 ((buffer_info->buffer_length) & 2521 RX_DESC_DATA0_BUF_LENGTH_MASK_))); 2522 lan743x_rx_update_tail(rx, index); 2523 } 2524 2525 static void lan743x_rx_release_ring_element(struct lan743x_rx *rx, int index) 2526 { 2527 struct lan743x_rx_buffer_info *buffer_info; 2528 struct lan743x_rx_descriptor *descriptor; 2529 2530 descriptor = &rx->ring_cpu_ptr[index]; 2531 buffer_info = &rx->buffer_info[index]; 2532 2533 memset(descriptor, 0, sizeof(*descriptor)); 2534 2535 if (buffer_info->dma_ptr) { 2536 dma_unmap_single(&rx->adapter->pdev->dev, 2537 buffer_info->dma_ptr, 2538 buffer_info->buffer_length, 2539 DMA_FROM_DEVICE); 2540 buffer_info->dma_ptr = 0; 2541 } 2542 2543 if (buffer_info->skb) { 2544 dev_kfree_skb(buffer_info->skb); 2545 buffer_info->skb = NULL; 2546 } 2547 2548 memset(buffer_info, 0, sizeof(*buffer_info)); 2549 } 2550 2551 static struct sk_buff * 2552 lan743x_rx_trim_skb(struct sk_buff *skb, int frame_length) 2553 { 2554 if (skb_linearize(skb)) { 2555 dev_kfree_skb_irq(skb); 2556 return NULL; 2557 } 2558 frame_length = max_t(int, 0, frame_length - ETH_FCS_LEN); 2559 if (skb->len > frame_length) { 2560 skb->tail -= skb->len - frame_length; 2561 skb->len = frame_length; 2562 } 2563 return skb; 2564 } 2565 2566 static int lan743x_rx_process_buffer(struct lan743x_rx *rx) 2567 { 2568 int current_head_index = le32_to_cpu(*rx->head_cpu_ptr); 2569 struct lan743x_rx_descriptor *descriptor, *desc_ext; 2570 struct net_device *netdev = rx->adapter->netdev; 2571 int result = RX_PROCESS_RESULT_NOTHING_TO_DO; 2572 struct lan743x_rx_buffer_info *buffer_info; 2573 int frame_length, buffer_length; 2574 bool is_ice, is_tce, is_icsm; 2575 int extension_index = -1; 2576 bool is_last, is_first; 2577 struct sk_buff *skb; 2578 2579 if (current_head_index < 0 || current_head_index >= rx->ring_size) 2580 goto done; 2581 2582 if (rx->last_head < 0 || rx->last_head >= rx->ring_size) 2583 goto done; 2584 2585 if (rx->last_head == current_head_index) 2586 goto done; 2587 2588 descriptor = &rx->ring_cpu_ptr[rx->last_head]; 2589 if (le32_to_cpu(descriptor->data0) & RX_DESC_DATA0_OWN_) 2590 goto done; 2591 buffer_info = &rx->buffer_info[rx->last_head]; 2592 2593 is_last = le32_to_cpu(descriptor->data0) & RX_DESC_DATA0_LS_; 2594 is_first = le32_to_cpu(descriptor->data0) & RX_DESC_DATA0_FS_; 2595 2596 if (is_last && le32_to_cpu(descriptor->data0) & RX_DESC_DATA0_EXT_) { 2597 /* extension is expected to follow */ 2598 int index = lan743x_rx_next_index(rx, rx->last_head); 2599 2600 if (index == current_head_index) 2601 /* extension not yet available */ 2602 goto done; 2603 desc_ext = &rx->ring_cpu_ptr[index]; 2604 if (le32_to_cpu(desc_ext->data0) & RX_DESC_DATA0_OWN_) 2605 /* extension not yet available */ 2606 goto done; 2607 if (!(le32_to_cpu(desc_ext->data0) & RX_DESC_DATA0_EXT_)) 2608 goto move_forward; 2609 extension_index = index; 2610 } 2611 2612 /* Only the last buffer in a multi-buffer frame contains the total frame 2613 * length. The chip occasionally sends more buffers than strictly 2614 * required to reach the total frame length. 2615 * Handle this by adding all buffers to the skb in their entirety. 2616 * Once the real frame length is known, trim the skb. 2617 */ 2618 frame_length = 2619 RX_DESC_DATA0_FRAME_LENGTH_GET_(le32_to_cpu(descriptor->data0)); 2620 buffer_length = buffer_info->buffer_length; 2621 is_ice = le32_to_cpu(descriptor->data1) & RX_DESC_DATA1_STATUS_ICE_; 2622 is_tce = le32_to_cpu(descriptor->data1) & RX_DESC_DATA1_STATUS_TCE_; 2623 is_icsm = le32_to_cpu(descriptor->data1) & RX_DESC_DATA1_STATUS_ICSM_; 2624 2625 netdev_dbg(netdev, "%s%schunk: %d/%d", 2626 is_first ? "first " : " ", 2627 is_last ? "last " : " ", 2628 frame_length, buffer_length); 2629 2630 /* save existing skb, allocate new skb and map to dma */ 2631 skb = buffer_info->skb; 2632 if (lan743x_rx_init_ring_element(rx, rx->last_head, 2633 GFP_ATOMIC | GFP_DMA)) { 2634 /* failed to allocate next skb. 2635 * Memory is very low. 2636 * Drop this packet and reuse buffer. 2637 */ 2638 lan743x_rx_reuse_ring_element(rx, rx->last_head); 2639 /* drop packet that was being assembled */ 2640 dev_kfree_skb_irq(rx->skb_head); 2641 rx->skb_head = NULL; 2642 goto process_extension; 2643 } 2644 2645 /* add buffers to skb via skb->frag_list */ 2646 if (is_first) { 2647 skb_reserve(skb, RX_HEAD_PADDING); 2648 skb_put(skb, buffer_length - RX_HEAD_PADDING); 2649 if (rx->skb_head) 2650 dev_kfree_skb_irq(rx->skb_head); 2651 rx->skb_head = skb; 2652 } else if (rx->skb_head) { 2653 skb_put(skb, buffer_length); 2654 if (skb_shinfo(rx->skb_head)->frag_list) 2655 rx->skb_tail->next = skb; 2656 else 2657 skb_shinfo(rx->skb_head)->frag_list = skb; 2658 rx->skb_tail = skb; 2659 rx->skb_head->len += skb->len; 2660 rx->skb_head->data_len += skb->len; 2661 rx->skb_head->truesize += skb->truesize; 2662 } else { 2663 /* packet to assemble has already been dropped because one or 2664 * more of its buffers could not be allocated 2665 */ 2666 netdev_dbg(netdev, "drop buffer intended for dropped packet"); 2667 dev_kfree_skb_irq(skb); 2668 } 2669 2670 process_extension: 2671 if (extension_index >= 0) { 2672 u32 ts_sec; 2673 u32 ts_nsec; 2674 2675 ts_sec = le32_to_cpu(desc_ext->data1); 2676 ts_nsec = (le32_to_cpu(desc_ext->data2) & 2677 RX_DESC_DATA2_TS_NS_MASK_); 2678 if (rx->skb_head) 2679 skb_hwtstamps(rx->skb_head)->hwtstamp = 2680 ktime_set(ts_sec, ts_nsec); 2681 lan743x_rx_reuse_ring_element(rx, extension_index); 2682 rx->last_head = extension_index; 2683 netdev_dbg(netdev, "process extension"); 2684 } 2685 2686 if (is_last && rx->skb_head) 2687 rx->skb_head = lan743x_rx_trim_skb(rx->skb_head, frame_length); 2688 2689 if (is_last && rx->skb_head) { 2690 rx->skb_head->protocol = eth_type_trans(rx->skb_head, 2691 rx->adapter->netdev); 2692 if (rx->adapter->netdev->features & NETIF_F_RXCSUM) { 2693 if (!is_ice && !is_tce && !is_icsm) 2694 skb->ip_summed = CHECKSUM_UNNECESSARY; 2695 } 2696 netdev_dbg(netdev, "sending %d byte frame to OS", 2697 rx->skb_head->len); 2698 napi_gro_receive(&rx->napi, rx->skb_head); 2699 rx->skb_head = NULL; 2700 } 2701 2702 move_forward: 2703 /* push tail and head forward */ 2704 rx->last_tail = rx->last_head; 2705 rx->last_head = lan743x_rx_next_index(rx, rx->last_head); 2706 result = RX_PROCESS_RESULT_BUFFER_RECEIVED; 2707 done: 2708 return result; 2709 } 2710 2711 static int lan743x_rx_napi_poll(struct napi_struct *napi, int weight) 2712 { 2713 struct lan743x_rx *rx = container_of(napi, struct lan743x_rx, napi); 2714 struct lan743x_adapter *adapter = rx->adapter; 2715 int result = RX_PROCESS_RESULT_NOTHING_TO_DO; 2716 u32 rx_tail_flags = 0; 2717 int count; 2718 2719 if (rx->vector_flags & LAN743X_VECTOR_FLAG_SOURCE_STATUS_W2C) { 2720 /* clear int status bit before reading packet */ 2721 lan743x_csr_write(adapter, DMAC_INT_STS, 2722 DMAC_INT_BIT_RXFRM_(rx->channel_number)); 2723 } 2724 for (count = 0; count < weight; count++) { 2725 result = lan743x_rx_process_buffer(rx); 2726 if (result == RX_PROCESS_RESULT_NOTHING_TO_DO) 2727 break; 2728 } 2729 rx->frame_count += count; 2730 if (count == weight || result == RX_PROCESS_RESULT_BUFFER_RECEIVED) 2731 return weight; 2732 2733 if (!napi_complete_done(napi, count)) 2734 return count; 2735 2736 /* re-arm interrupts, must write to rx tail on some chip variants */ 2737 if (rx->vector_flags & LAN743X_VECTOR_FLAG_VECTOR_ENABLE_AUTO_SET) 2738 rx_tail_flags |= RX_TAIL_SET_TOP_INT_VEC_EN_; 2739 if (rx->vector_flags & LAN743X_VECTOR_FLAG_SOURCE_ENABLE_AUTO_SET) { 2740 rx_tail_flags |= RX_TAIL_SET_TOP_INT_EN_; 2741 } else { 2742 lan743x_csr_write(adapter, INT_EN_SET, 2743 INT_BIT_DMA_RX_(rx->channel_number)); 2744 } 2745 2746 if (rx_tail_flags) 2747 lan743x_csr_write(adapter, RX_TAIL(rx->channel_number), 2748 rx_tail_flags | rx->last_tail); 2749 2750 return count; 2751 } 2752 2753 static void lan743x_rx_ring_cleanup(struct lan743x_rx *rx) 2754 { 2755 if (rx->buffer_info && rx->ring_cpu_ptr) { 2756 int index; 2757 2758 for (index = 0; index < rx->ring_size; index++) 2759 lan743x_rx_release_ring_element(rx, index); 2760 } 2761 2762 if (rx->head_cpu_ptr) { 2763 dma_free_coherent(&rx->adapter->pdev->dev, 2764 sizeof(*rx->head_cpu_ptr), rx->head_cpu_ptr, 2765 rx->head_dma_ptr); 2766 rx->head_cpu_ptr = NULL; 2767 rx->head_dma_ptr = 0; 2768 } 2769 2770 kfree(rx->buffer_info); 2771 rx->buffer_info = NULL; 2772 2773 if (rx->ring_cpu_ptr) { 2774 dma_free_coherent(&rx->adapter->pdev->dev, 2775 rx->ring_allocation_size, rx->ring_cpu_ptr, 2776 rx->ring_dma_ptr); 2777 rx->ring_allocation_size = 0; 2778 rx->ring_cpu_ptr = NULL; 2779 rx->ring_dma_ptr = 0; 2780 } 2781 2782 rx->ring_size = 0; 2783 rx->last_head = 0; 2784 } 2785 2786 static int lan743x_rx_ring_init(struct lan743x_rx *rx) 2787 { 2788 size_t ring_allocation_size = 0; 2789 dma_addr_t dma_ptr = 0; 2790 void *cpu_ptr = NULL; 2791 int ret = -ENOMEM; 2792 int index = 0; 2793 2794 rx->ring_size = LAN743X_RX_RING_SIZE; 2795 if (rx->ring_size <= 1) { 2796 ret = -EINVAL; 2797 goto cleanup; 2798 } 2799 if (rx->ring_size & ~RX_CFG_B_RX_RING_LEN_MASK_) { 2800 ret = -EINVAL; 2801 goto cleanup; 2802 } 2803 if (dma_set_mask_and_coherent(&rx->adapter->pdev->dev, 2804 DMA_BIT_MASK(64))) { 2805 dev_warn(&rx->adapter->pdev->dev, 2806 "lan743x_: No suitable DMA available\n"); 2807 ret = -ENOMEM; 2808 goto cleanup; 2809 } 2810 ring_allocation_size = ALIGN(rx->ring_size * 2811 sizeof(struct lan743x_rx_descriptor), 2812 PAGE_SIZE); 2813 dma_ptr = 0; 2814 cpu_ptr = dma_alloc_coherent(&rx->adapter->pdev->dev, 2815 ring_allocation_size, &dma_ptr, GFP_KERNEL); 2816 if (!cpu_ptr) { 2817 ret = -ENOMEM; 2818 goto cleanup; 2819 } 2820 rx->ring_allocation_size = ring_allocation_size; 2821 rx->ring_cpu_ptr = (struct lan743x_rx_descriptor *)cpu_ptr; 2822 rx->ring_dma_ptr = dma_ptr; 2823 2824 cpu_ptr = kcalloc(rx->ring_size, sizeof(*rx->buffer_info), 2825 GFP_KERNEL); 2826 if (!cpu_ptr) { 2827 ret = -ENOMEM; 2828 goto cleanup; 2829 } 2830 rx->buffer_info = (struct lan743x_rx_buffer_info *)cpu_ptr; 2831 dma_ptr = 0; 2832 cpu_ptr = dma_alloc_coherent(&rx->adapter->pdev->dev, 2833 sizeof(*rx->head_cpu_ptr), &dma_ptr, 2834 GFP_KERNEL); 2835 if (!cpu_ptr) { 2836 ret = -ENOMEM; 2837 goto cleanup; 2838 } 2839 2840 rx->head_cpu_ptr = cpu_ptr; 2841 rx->head_dma_ptr = dma_ptr; 2842 if (rx->head_dma_ptr & 0x3) { 2843 ret = -ENOMEM; 2844 goto cleanup; 2845 } 2846 2847 rx->last_head = 0; 2848 for (index = 0; index < rx->ring_size; index++) { 2849 ret = lan743x_rx_init_ring_element(rx, index, GFP_KERNEL); 2850 if (ret) 2851 goto cleanup; 2852 } 2853 return 0; 2854 2855 cleanup: 2856 netif_warn(rx->adapter, ifup, rx->adapter->netdev, 2857 "Error allocating memory for LAN743x\n"); 2858 2859 lan743x_rx_ring_cleanup(rx); 2860 return ret; 2861 } 2862 2863 static void lan743x_rx_close(struct lan743x_rx *rx) 2864 { 2865 struct lan743x_adapter *adapter = rx->adapter; 2866 2867 lan743x_csr_write(adapter, FCT_RX_CTL, 2868 FCT_RX_CTL_DIS_(rx->channel_number)); 2869 lan743x_csr_wait_for_bit(adapter, FCT_RX_CTL, 2870 FCT_RX_CTL_EN_(rx->channel_number), 2871 0, 1000, 20000, 100); 2872 2873 lan743x_csr_write(adapter, DMAC_CMD, 2874 DMAC_CMD_STOP_R_(rx->channel_number)); 2875 lan743x_dmac_rx_wait_till_stopped(adapter, rx->channel_number); 2876 2877 lan743x_csr_write(adapter, DMAC_INT_EN_CLR, 2878 DMAC_INT_BIT_RXFRM_(rx->channel_number)); 2879 lan743x_csr_write(adapter, INT_EN_CLR, 2880 INT_BIT_DMA_RX_(rx->channel_number)); 2881 napi_disable(&rx->napi); 2882 2883 netif_napi_del(&rx->napi); 2884 2885 lan743x_rx_ring_cleanup(rx); 2886 } 2887 2888 static int lan743x_rx_open(struct lan743x_rx *rx) 2889 { 2890 struct lan743x_adapter *adapter = rx->adapter; 2891 u32 data = 0; 2892 int ret; 2893 2894 rx->frame_count = 0; 2895 ret = lan743x_rx_ring_init(rx); 2896 if (ret) 2897 goto return_error; 2898 2899 netif_napi_add(adapter->netdev, &rx->napi, lan743x_rx_napi_poll); 2900 2901 lan743x_csr_write(adapter, DMAC_CMD, 2902 DMAC_CMD_RX_SWR_(rx->channel_number)); 2903 lan743x_csr_wait_for_bit(adapter, DMAC_CMD, 2904 DMAC_CMD_RX_SWR_(rx->channel_number), 2905 0, 1000, 20000, 100); 2906 2907 /* set ring base address */ 2908 lan743x_csr_write(adapter, 2909 RX_BASE_ADDRH(rx->channel_number), 2910 DMA_ADDR_HIGH32(rx->ring_dma_ptr)); 2911 lan743x_csr_write(adapter, 2912 RX_BASE_ADDRL(rx->channel_number), 2913 DMA_ADDR_LOW32(rx->ring_dma_ptr)); 2914 2915 /* set rx write back address */ 2916 lan743x_csr_write(adapter, 2917 RX_HEAD_WRITEBACK_ADDRH(rx->channel_number), 2918 DMA_ADDR_HIGH32(rx->head_dma_ptr)); 2919 lan743x_csr_write(adapter, 2920 RX_HEAD_WRITEBACK_ADDRL(rx->channel_number), 2921 DMA_ADDR_LOW32(rx->head_dma_ptr)); 2922 data = RX_CFG_A_RX_HP_WB_EN_; 2923 if (!(adapter->csr.flags & LAN743X_CSR_FLAG_IS_A0)) { 2924 data |= (RX_CFG_A_RX_WB_ON_INT_TMR_ | 2925 RX_CFG_A_RX_WB_THRES_SET_(0x7) | 2926 RX_CFG_A_RX_PF_THRES_SET_(16) | 2927 RX_CFG_A_RX_PF_PRI_THRES_SET_(4)); 2928 } 2929 2930 /* set RX_CFG_A */ 2931 lan743x_csr_write(adapter, 2932 RX_CFG_A(rx->channel_number), data); 2933 2934 /* set RX_CFG_B */ 2935 data = lan743x_csr_read(adapter, RX_CFG_B(rx->channel_number)); 2936 data &= ~RX_CFG_B_RX_PAD_MASK_; 2937 if (!RX_HEAD_PADDING) 2938 data |= RX_CFG_B_RX_PAD_0_; 2939 else 2940 data |= RX_CFG_B_RX_PAD_2_; 2941 data &= ~RX_CFG_B_RX_RING_LEN_MASK_; 2942 data |= ((rx->ring_size) & RX_CFG_B_RX_RING_LEN_MASK_); 2943 data |= RX_CFG_B_TS_ALL_RX_; 2944 if (!(adapter->csr.flags & LAN743X_CSR_FLAG_IS_A0)) 2945 data |= RX_CFG_B_RDMABL_512_; 2946 2947 lan743x_csr_write(adapter, RX_CFG_B(rx->channel_number), data); 2948 rx->vector_flags = lan743x_intr_get_vector_flags(adapter, 2949 INT_BIT_DMA_RX_ 2950 (rx->channel_number)); 2951 2952 /* set RX_CFG_C */ 2953 data = 0; 2954 if (rx->vector_flags & LAN743X_VECTOR_FLAG_SOURCE_ENABLE_AUTO_CLEAR) 2955 data |= RX_CFG_C_RX_TOP_INT_EN_AUTO_CLR_; 2956 if (rx->vector_flags & LAN743X_VECTOR_FLAG_SOURCE_STATUS_AUTO_CLEAR) 2957 data |= RX_CFG_C_RX_DMA_INT_STS_AUTO_CLR_; 2958 if (rx->vector_flags & LAN743X_VECTOR_FLAG_SOURCE_STATUS_R2C) 2959 data |= RX_CFG_C_RX_INT_STS_R2C_MODE_MASK_; 2960 if (rx->vector_flags & LAN743X_VECTOR_FLAG_SOURCE_ENABLE_R2C) 2961 data |= RX_CFG_C_RX_INT_EN_R2C_; 2962 lan743x_csr_write(adapter, RX_CFG_C(rx->channel_number), data); 2963 2964 rx->last_tail = ((u32)(rx->ring_size - 1)); 2965 lan743x_csr_write(adapter, RX_TAIL(rx->channel_number), 2966 rx->last_tail); 2967 rx->last_head = lan743x_csr_read(adapter, RX_HEAD(rx->channel_number)); 2968 if (rx->last_head) { 2969 ret = -EIO; 2970 goto napi_delete; 2971 } 2972 2973 napi_enable(&rx->napi); 2974 2975 lan743x_csr_write(adapter, INT_EN_SET, 2976 INT_BIT_DMA_RX_(rx->channel_number)); 2977 lan743x_csr_write(adapter, DMAC_INT_STS, 2978 DMAC_INT_BIT_RXFRM_(rx->channel_number)); 2979 lan743x_csr_write(adapter, DMAC_INT_EN_SET, 2980 DMAC_INT_BIT_RXFRM_(rx->channel_number)); 2981 lan743x_csr_write(adapter, DMAC_CMD, 2982 DMAC_CMD_START_R_(rx->channel_number)); 2983 2984 /* initialize fifo */ 2985 lan743x_csr_write(adapter, FCT_RX_CTL, 2986 FCT_RX_CTL_RESET_(rx->channel_number)); 2987 lan743x_csr_wait_for_bit(adapter, FCT_RX_CTL, 2988 FCT_RX_CTL_RESET_(rx->channel_number), 2989 0, 1000, 20000, 100); 2990 lan743x_csr_write(adapter, FCT_FLOW(rx->channel_number), 2991 FCT_FLOW_CTL_REQ_EN_ | 2992 FCT_FLOW_CTL_ON_THRESHOLD_SET_(0x2A) | 2993 FCT_FLOW_CTL_OFF_THRESHOLD_SET_(0xA)); 2994 2995 /* enable fifo */ 2996 lan743x_csr_write(adapter, FCT_RX_CTL, 2997 FCT_RX_CTL_EN_(rx->channel_number)); 2998 return 0; 2999 3000 napi_delete: 3001 netif_napi_del(&rx->napi); 3002 lan743x_rx_ring_cleanup(rx); 3003 3004 return_error: 3005 return ret; 3006 } 3007 3008 static int lan743x_netdev_close(struct net_device *netdev) 3009 { 3010 struct lan743x_adapter *adapter = netdev_priv(netdev); 3011 int index; 3012 3013 for (index = 0; index < adapter->used_tx_channels; index++) 3014 lan743x_tx_close(&adapter->tx[index]); 3015 3016 for (index = 0; index < LAN743X_USED_RX_CHANNELS; index++) 3017 lan743x_rx_close(&adapter->rx[index]); 3018 3019 lan743x_ptp_close(adapter); 3020 3021 lan743x_phy_close(adapter); 3022 3023 lan743x_mac_close(adapter); 3024 3025 lan743x_intr_close(adapter); 3026 3027 return 0; 3028 } 3029 3030 static int lan743x_netdev_open(struct net_device *netdev) 3031 { 3032 struct lan743x_adapter *adapter = netdev_priv(netdev); 3033 int index; 3034 int ret; 3035 3036 ret = lan743x_intr_open(adapter); 3037 if (ret) 3038 goto return_error; 3039 3040 ret = lan743x_mac_open(adapter); 3041 if (ret) 3042 goto close_intr; 3043 3044 ret = lan743x_phy_open(adapter); 3045 if (ret) 3046 goto close_mac; 3047 3048 ret = lan743x_ptp_open(adapter); 3049 if (ret) 3050 goto close_phy; 3051 3052 lan743x_rfe_open(adapter); 3053 3054 for (index = 0; index < LAN743X_USED_RX_CHANNELS; index++) { 3055 ret = lan743x_rx_open(&adapter->rx[index]); 3056 if (ret) 3057 goto close_rx; 3058 } 3059 3060 for (index = 0; index < adapter->used_tx_channels; index++) { 3061 ret = lan743x_tx_open(&adapter->tx[index]); 3062 if (ret) 3063 goto close_tx; 3064 } 3065 return 0; 3066 3067 close_tx: 3068 for (index = 0; index < adapter->used_tx_channels; index++) { 3069 if (adapter->tx[index].ring_cpu_ptr) 3070 lan743x_tx_close(&adapter->tx[index]); 3071 } 3072 3073 close_rx: 3074 for (index = 0; index < LAN743X_USED_RX_CHANNELS; index++) { 3075 if (adapter->rx[index].ring_cpu_ptr) 3076 lan743x_rx_close(&adapter->rx[index]); 3077 } 3078 lan743x_ptp_close(adapter); 3079 3080 close_phy: 3081 lan743x_phy_close(adapter); 3082 3083 close_mac: 3084 lan743x_mac_close(adapter); 3085 3086 close_intr: 3087 lan743x_intr_close(adapter); 3088 3089 return_error: 3090 netif_warn(adapter, ifup, adapter->netdev, 3091 "Error opening LAN743x\n"); 3092 return ret; 3093 } 3094 3095 static netdev_tx_t lan743x_netdev_xmit_frame(struct sk_buff *skb, 3096 struct net_device *netdev) 3097 { 3098 struct lan743x_adapter *adapter = netdev_priv(netdev); 3099 u8 ch = 0; 3100 3101 if (adapter->is_pci11x1x) 3102 ch = skb->queue_mapping % PCI11X1X_USED_TX_CHANNELS; 3103 3104 return lan743x_tx_xmit_frame(&adapter->tx[ch], skb); 3105 } 3106 3107 static int lan743x_netdev_ioctl(struct net_device *netdev, 3108 struct ifreq *ifr, int cmd) 3109 { 3110 if (!netif_running(netdev)) 3111 return -EINVAL; 3112 if (cmd == SIOCSHWTSTAMP) 3113 return lan743x_ptp_ioctl(netdev, ifr, cmd); 3114 return phy_mii_ioctl(netdev->phydev, ifr, cmd); 3115 } 3116 3117 static void lan743x_netdev_set_multicast(struct net_device *netdev) 3118 { 3119 struct lan743x_adapter *adapter = netdev_priv(netdev); 3120 3121 lan743x_rfe_set_multicast(adapter); 3122 } 3123 3124 static int lan743x_netdev_change_mtu(struct net_device *netdev, int new_mtu) 3125 { 3126 struct lan743x_adapter *adapter = netdev_priv(netdev); 3127 int ret = 0; 3128 3129 ret = lan743x_mac_set_mtu(adapter, new_mtu); 3130 if (!ret) 3131 netdev->mtu = new_mtu; 3132 return ret; 3133 } 3134 3135 static void lan743x_netdev_get_stats64(struct net_device *netdev, 3136 struct rtnl_link_stats64 *stats) 3137 { 3138 struct lan743x_adapter *adapter = netdev_priv(netdev); 3139 3140 stats->rx_packets = lan743x_csr_read(adapter, STAT_RX_TOTAL_FRAMES); 3141 stats->tx_packets = lan743x_csr_read(adapter, STAT_TX_TOTAL_FRAMES); 3142 stats->rx_bytes = lan743x_csr_read(adapter, 3143 STAT_RX_UNICAST_BYTE_COUNT) + 3144 lan743x_csr_read(adapter, 3145 STAT_RX_BROADCAST_BYTE_COUNT) + 3146 lan743x_csr_read(adapter, 3147 STAT_RX_MULTICAST_BYTE_COUNT); 3148 stats->tx_bytes = lan743x_csr_read(adapter, 3149 STAT_TX_UNICAST_BYTE_COUNT) + 3150 lan743x_csr_read(adapter, 3151 STAT_TX_BROADCAST_BYTE_COUNT) + 3152 lan743x_csr_read(adapter, 3153 STAT_TX_MULTICAST_BYTE_COUNT); 3154 stats->rx_errors = lan743x_csr_read(adapter, STAT_RX_FCS_ERRORS) + 3155 lan743x_csr_read(adapter, 3156 STAT_RX_ALIGNMENT_ERRORS) + 3157 lan743x_csr_read(adapter, STAT_RX_JABBER_ERRORS) + 3158 lan743x_csr_read(adapter, 3159 STAT_RX_UNDERSIZE_FRAME_ERRORS) + 3160 lan743x_csr_read(adapter, 3161 STAT_RX_OVERSIZE_FRAME_ERRORS); 3162 stats->tx_errors = lan743x_csr_read(adapter, STAT_TX_FCS_ERRORS) + 3163 lan743x_csr_read(adapter, 3164 STAT_TX_EXCESS_DEFERRAL_ERRORS) + 3165 lan743x_csr_read(adapter, STAT_TX_CARRIER_ERRORS); 3166 stats->rx_dropped = lan743x_csr_read(adapter, 3167 STAT_RX_DROPPED_FRAMES); 3168 stats->tx_dropped = lan743x_csr_read(adapter, 3169 STAT_TX_EXCESSIVE_COLLISION); 3170 stats->multicast = lan743x_csr_read(adapter, 3171 STAT_RX_MULTICAST_FRAMES) + 3172 lan743x_csr_read(adapter, 3173 STAT_TX_MULTICAST_FRAMES); 3174 stats->collisions = lan743x_csr_read(adapter, 3175 STAT_TX_SINGLE_COLLISIONS) + 3176 lan743x_csr_read(adapter, 3177 STAT_TX_MULTIPLE_COLLISIONS) + 3178 lan743x_csr_read(adapter, 3179 STAT_TX_LATE_COLLISIONS); 3180 } 3181 3182 static int lan743x_netdev_set_mac_address(struct net_device *netdev, 3183 void *addr) 3184 { 3185 struct lan743x_adapter *adapter = netdev_priv(netdev); 3186 struct sockaddr *sock_addr = addr; 3187 int ret; 3188 3189 ret = eth_prepare_mac_addr_change(netdev, sock_addr); 3190 if (ret) 3191 return ret; 3192 eth_hw_addr_set(netdev, sock_addr->sa_data); 3193 lan743x_mac_set_address(adapter, sock_addr->sa_data); 3194 lan743x_rfe_update_mac_address(adapter); 3195 return 0; 3196 } 3197 3198 static const struct net_device_ops lan743x_netdev_ops = { 3199 .ndo_open = lan743x_netdev_open, 3200 .ndo_stop = lan743x_netdev_close, 3201 .ndo_start_xmit = lan743x_netdev_xmit_frame, 3202 .ndo_eth_ioctl = lan743x_netdev_ioctl, 3203 .ndo_set_rx_mode = lan743x_netdev_set_multicast, 3204 .ndo_change_mtu = lan743x_netdev_change_mtu, 3205 .ndo_get_stats64 = lan743x_netdev_get_stats64, 3206 .ndo_set_mac_address = lan743x_netdev_set_mac_address, 3207 }; 3208 3209 static void lan743x_hardware_cleanup(struct lan743x_adapter *adapter) 3210 { 3211 lan743x_csr_write(adapter, INT_EN_CLR, 0xFFFFFFFF); 3212 } 3213 3214 static void lan743x_mdiobus_cleanup(struct lan743x_adapter *adapter) 3215 { 3216 mdiobus_unregister(adapter->mdiobus); 3217 } 3218 3219 static void lan743x_full_cleanup(struct lan743x_adapter *adapter) 3220 { 3221 unregister_netdev(adapter->netdev); 3222 3223 lan743x_mdiobus_cleanup(adapter); 3224 lan743x_hardware_cleanup(adapter); 3225 lan743x_pci_cleanup(adapter); 3226 } 3227 3228 static void pci11x1x_set_rfe_rd_fifo_threshold(struct lan743x_adapter *adapter) 3229 { 3230 u16 rev = adapter->csr.id_rev & ID_REV_CHIP_REV_MASK_; 3231 3232 if (rev == ID_REV_CHIP_REV_PCI11X1X_B0_) { 3233 u32 misc_ctl; 3234 3235 misc_ctl = lan743x_csr_read(adapter, MISC_CTL_0); 3236 misc_ctl &= ~MISC_CTL_0_RFE_READ_FIFO_MASK_; 3237 misc_ctl |= FIELD_PREP(MISC_CTL_0_RFE_READ_FIFO_MASK_, 3238 RFE_RD_FIFO_TH_3_DWORDS); 3239 lan743x_csr_write(adapter, MISC_CTL_0, misc_ctl); 3240 } 3241 } 3242 3243 static int lan743x_hardware_init(struct lan743x_adapter *adapter, 3244 struct pci_dev *pdev) 3245 { 3246 struct lan743x_tx *tx; 3247 int index; 3248 int ret; 3249 3250 adapter->is_pci11x1x = is_pci11x1x_chip(adapter); 3251 if (adapter->is_pci11x1x) { 3252 adapter->max_tx_channels = PCI11X1X_MAX_TX_CHANNELS; 3253 adapter->used_tx_channels = PCI11X1X_USED_TX_CHANNELS; 3254 adapter->max_vector_count = PCI11X1X_MAX_VECTOR_COUNT; 3255 pci11x1x_strap_get_status(adapter); 3256 spin_lock_init(&adapter->eth_syslock_spinlock); 3257 mutex_init(&adapter->sgmii_rw_lock); 3258 pci11x1x_set_rfe_rd_fifo_threshold(adapter); 3259 } else { 3260 adapter->max_tx_channels = LAN743X_MAX_TX_CHANNELS; 3261 adapter->used_tx_channels = LAN743X_USED_TX_CHANNELS; 3262 adapter->max_vector_count = LAN743X_MAX_VECTOR_COUNT; 3263 } 3264 3265 adapter->intr.irq = adapter->pdev->irq; 3266 lan743x_csr_write(adapter, INT_EN_CLR, 0xFFFFFFFF); 3267 3268 ret = lan743x_gpio_init(adapter); 3269 if (ret) 3270 return ret; 3271 3272 ret = lan743x_mac_init(adapter); 3273 if (ret) 3274 return ret; 3275 3276 ret = lan743x_phy_init(adapter); 3277 if (ret) 3278 return ret; 3279 3280 ret = lan743x_ptp_init(adapter); 3281 if (ret) 3282 return ret; 3283 3284 lan743x_rfe_update_mac_address(adapter); 3285 3286 ret = lan743x_dmac_init(adapter); 3287 if (ret) 3288 return ret; 3289 3290 for (index = 0; index < LAN743X_USED_RX_CHANNELS; index++) { 3291 adapter->rx[index].adapter = adapter; 3292 adapter->rx[index].channel_number = index; 3293 } 3294 3295 for (index = 0; index < adapter->used_tx_channels; index++) { 3296 tx = &adapter->tx[index]; 3297 tx->adapter = adapter; 3298 tx->channel_number = index; 3299 spin_lock_init(&tx->ring_lock); 3300 } 3301 3302 return 0; 3303 } 3304 3305 static int lan743x_mdiobus_init(struct lan743x_adapter *adapter) 3306 { 3307 u32 sgmii_ctl; 3308 int ret; 3309 3310 adapter->mdiobus = devm_mdiobus_alloc(&adapter->pdev->dev); 3311 if (!(adapter->mdiobus)) { 3312 ret = -ENOMEM; 3313 goto return_error; 3314 } 3315 3316 adapter->mdiobus->priv = (void *)adapter; 3317 if (adapter->is_pci11x1x) { 3318 if (adapter->is_sgmii_en) { 3319 sgmii_ctl = lan743x_csr_read(adapter, SGMII_CTL); 3320 sgmii_ctl |= SGMII_CTL_SGMII_ENABLE_; 3321 sgmii_ctl &= ~SGMII_CTL_SGMII_POWER_DN_; 3322 lan743x_csr_write(adapter, SGMII_CTL, sgmii_ctl); 3323 netif_dbg(adapter, drv, adapter->netdev, 3324 "SGMII operation\n"); 3325 adapter->mdiobus->read = lan743x_mdiobus_read_c22; 3326 adapter->mdiobus->write = lan743x_mdiobus_write_c22; 3327 adapter->mdiobus->read_c45 = lan743x_mdiobus_read_c45; 3328 adapter->mdiobus->write_c45 = lan743x_mdiobus_write_c45; 3329 adapter->mdiobus->name = "lan743x-mdiobus-c45"; 3330 netif_dbg(adapter, drv, adapter->netdev, 3331 "lan743x-mdiobus-c45\n"); 3332 } else { 3333 sgmii_ctl = lan743x_csr_read(adapter, SGMII_CTL); 3334 sgmii_ctl &= ~SGMII_CTL_SGMII_ENABLE_; 3335 sgmii_ctl |= SGMII_CTL_SGMII_POWER_DN_; 3336 lan743x_csr_write(adapter, SGMII_CTL, sgmii_ctl); 3337 netif_dbg(adapter, drv, adapter->netdev, 3338 "RGMII operation\n"); 3339 // Only C22 support when RGMII I/F 3340 adapter->mdiobus->read = lan743x_mdiobus_read_c22; 3341 adapter->mdiobus->write = lan743x_mdiobus_write_c22; 3342 adapter->mdiobus->name = "lan743x-mdiobus"; 3343 netif_dbg(adapter, drv, adapter->netdev, 3344 "lan743x-mdiobus\n"); 3345 } 3346 } else { 3347 adapter->mdiobus->read = lan743x_mdiobus_read_c22; 3348 adapter->mdiobus->write = lan743x_mdiobus_write_c22; 3349 adapter->mdiobus->name = "lan743x-mdiobus"; 3350 netif_dbg(adapter, drv, adapter->netdev, "lan743x-mdiobus\n"); 3351 } 3352 3353 snprintf(adapter->mdiobus->id, MII_BUS_ID_SIZE, 3354 "pci-%s", pci_name(adapter->pdev)); 3355 3356 if ((adapter->csr.id_rev & ID_REV_ID_MASK_) == ID_REV_ID_LAN7430_) 3357 /* LAN7430 uses internal phy at address 1 */ 3358 adapter->mdiobus->phy_mask = ~(u32)BIT(1); 3359 3360 /* register mdiobus */ 3361 ret = mdiobus_register(adapter->mdiobus); 3362 if (ret < 0) 3363 goto return_error; 3364 return 0; 3365 3366 return_error: 3367 return ret; 3368 } 3369 3370 /* lan743x_pcidev_probe - Device Initialization Routine 3371 * @pdev: PCI device information struct 3372 * @id: entry in lan743x_pci_tbl 3373 * 3374 * Returns 0 on success, negative on failure 3375 * 3376 * initializes an adapter identified by a pci_dev structure. 3377 * The OS initialization, configuring of the adapter private structure, 3378 * and a hardware reset occur. 3379 **/ 3380 static int lan743x_pcidev_probe(struct pci_dev *pdev, 3381 const struct pci_device_id *id) 3382 { 3383 struct lan743x_adapter *adapter = NULL; 3384 struct net_device *netdev = NULL; 3385 int ret = -ENODEV; 3386 3387 if (id->device == PCI_DEVICE_ID_SMSC_A011 || 3388 id->device == PCI_DEVICE_ID_SMSC_A041) { 3389 netdev = devm_alloc_etherdev_mqs(&pdev->dev, 3390 sizeof(struct lan743x_adapter), 3391 PCI11X1X_USED_TX_CHANNELS, 3392 LAN743X_USED_RX_CHANNELS); 3393 } else { 3394 netdev = devm_alloc_etherdev_mqs(&pdev->dev, 3395 sizeof(struct lan743x_adapter), 3396 LAN743X_USED_TX_CHANNELS, 3397 LAN743X_USED_RX_CHANNELS); 3398 } 3399 3400 if (!netdev) 3401 goto return_error; 3402 3403 SET_NETDEV_DEV(netdev, &pdev->dev); 3404 pci_set_drvdata(pdev, netdev); 3405 adapter = netdev_priv(netdev); 3406 adapter->netdev = netdev; 3407 adapter->msg_enable = NETIF_MSG_DRV | NETIF_MSG_PROBE | 3408 NETIF_MSG_LINK | NETIF_MSG_IFUP | 3409 NETIF_MSG_IFDOWN | NETIF_MSG_TX_QUEUED; 3410 netdev->max_mtu = LAN743X_MAX_FRAME_SIZE; 3411 3412 of_get_mac_address(pdev->dev.of_node, adapter->mac_address); 3413 3414 ret = lan743x_pci_init(adapter, pdev); 3415 if (ret) 3416 goto return_error; 3417 3418 ret = lan743x_csr_init(adapter); 3419 if (ret) 3420 goto cleanup_pci; 3421 3422 ret = lan743x_hardware_init(adapter, pdev); 3423 if (ret) 3424 goto cleanup_pci; 3425 3426 ret = lan743x_mdiobus_init(adapter); 3427 if (ret) 3428 goto cleanup_hardware; 3429 3430 adapter->netdev->netdev_ops = &lan743x_netdev_ops; 3431 adapter->netdev->ethtool_ops = &lan743x_ethtool_ops; 3432 adapter->netdev->features = NETIF_F_SG | NETIF_F_TSO | 3433 NETIF_F_HW_CSUM | NETIF_F_RXCSUM; 3434 adapter->netdev->hw_features = adapter->netdev->features; 3435 3436 /* carrier off reporting is important to ethtool even BEFORE open */ 3437 netif_carrier_off(netdev); 3438 3439 ret = register_netdev(adapter->netdev); 3440 if (ret < 0) 3441 goto cleanup_mdiobus; 3442 return 0; 3443 3444 cleanup_mdiobus: 3445 lan743x_mdiobus_cleanup(adapter); 3446 3447 cleanup_hardware: 3448 lan743x_hardware_cleanup(adapter); 3449 3450 cleanup_pci: 3451 lan743x_pci_cleanup(adapter); 3452 3453 return_error: 3454 pr_warn("Initialization failed\n"); 3455 return ret; 3456 } 3457 3458 /** 3459 * lan743x_pcidev_remove - Device Removal Routine 3460 * @pdev: PCI device information struct 3461 * 3462 * this is called by the PCI subsystem to alert the driver 3463 * that it should release a PCI device. This could be caused by a 3464 * Hot-Plug event, or because the driver is going to be removed from 3465 * memory. 3466 **/ 3467 static void lan743x_pcidev_remove(struct pci_dev *pdev) 3468 { 3469 struct net_device *netdev = pci_get_drvdata(pdev); 3470 struct lan743x_adapter *adapter = netdev_priv(netdev); 3471 3472 lan743x_full_cleanup(adapter); 3473 } 3474 3475 static void lan743x_pcidev_shutdown(struct pci_dev *pdev) 3476 { 3477 struct net_device *netdev = pci_get_drvdata(pdev); 3478 struct lan743x_adapter *adapter = netdev_priv(netdev); 3479 3480 rtnl_lock(); 3481 netif_device_detach(netdev); 3482 3483 /* close netdev when netdev is at running state. 3484 * For instance, it is true when system goes to sleep by pm-suspend 3485 * However, it is false when system goes to sleep by suspend GUI menu 3486 */ 3487 if (netif_running(netdev)) 3488 lan743x_netdev_close(netdev); 3489 rtnl_unlock(); 3490 3491 #ifdef CONFIG_PM 3492 pci_save_state(pdev); 3493 #endif 3494 3495 /* clean up lan743x portion */ 3496 lan743x_hardware_cleanup(adapter); 3497 } 3498 3499 #ifdef CONFIG_PM_SLEEP 3500 static u16 lan743x_pm_wakeframe_crc16(const u8 *buf, int len) 3501 { 3502 return bitrev16(crc16(0xFFFF, buf, len)); 3503 } 3504 3505 static void lan743x_pm_set_wol(struct lan743x_adapter *adapter) 3506 { 3507 const u8 ipv4_multicast[3] = { 0x01, 0x00, 0x5E }; 3508 const u8 ipv6_multicast[3] = { 0x33, 0x33 }; 3509 const u8 arp_type[2] = { 0x08, 0x06 }; 3510 int mask_index; 3511 u32 sopass; 3512 u32 pmtctl; 3513 u32 wucsr; 3514 u32 macrx; 3515 u16 crc; 3516 3517 for (mask_index = 0; mask_index < MAC_NUM_OF_WUF_CFG; mask_index++) 3518 lan743x_csr_write(adapter, MAC_WUF_CFG(mask_index), 0); 3519 3520 /* clear wake settings */ 3521 pmtctl = lan743x_csr_read(adapter, PMT_CTL); 3522 pmtctl |= PMT_CTL_WUPS_MASK_; 3523 pmtctl &= ~(PMT_CTL_GPIO_WAKEUP_EN_ | PMT_CTL_EEE_WAKEUP_EN_ | 3524 PMT_CTL_WOL_EN_ | PMT_CTL_MAC_D3_RX_CLK_OVR_ | 3525 PMT_CTL_RX_FCT_RFE_D3_CLK_OVR_ | PMT_CTL_ETH_PHY_WAKE_EN_); 3526 3527 macrx = lan743x_csr_read(adapter, MAC_RX); 3528 3529 wucsr = 0; 3530 mask_index = 0; 3531 3532 pmtctl |= PMT_CTL_ETH_PHY_D3_COLD_OVR_ | PMT_CTL_ETH_PHY_D3_OVR_; 3533 3534 if (adapter->wolopts & WAKE_PHY) { 3535 pmtctl |= PMT_CTL_ETH_PHY_EDPD_PLL_CTL_; 3536 pmtctl |= PMT_CTL_ETH_PHY_WAKE_EN_; 3537 } 3538 if (adapter->wolopts & WAKE_MAGIC) { 3539 wucsr |= MAC_WUCSR_MPEN_; 3540 macrx |= MAC_RX_RXEN_; 3541 pmtctl |= PMT_CTL_WOL_EN_ | PMT_CTL_MAC_D3_RX_CLK_OVR_; 3542 } 3543 if (adapter->wolopts & WAKE_UCAST) { 3544 wucsr |= MAC_WUCSR_RFE_WAKE_EN_ | MAC_WUCSR_PFDA_EN_; 3545 macrx |= MAC_RX_RXEN_; 3546 pmtctl |= PMT_CTL_WOL_EN_ | PMT_CTL_MAC_D3_RX_CLK_OVR_; 3547 pmtctl |= PMT_CTL_RX_FCT_RFE_D3_CLK_OVR_; 3548 } 3549 if (adapter->wolopts & WAKE_BCAST) { 3550 wucsr |= MAC_WUCSR_RFE_WAKE_EN_ | MAC_WUCSR_BCST_EN_; 3551 macrx |= MAC_RX_RXEN_; 3552 pmtctl |= PMT_CTL_WOL_EN_ | PMT_CTL_MAC_D3_RX_CLK_OVR_; 3553 pmtctl |= PMT_CTL_RX_FCT_RFE_D3_CLK_OVR_; 3554 } 3555 if (adapter->wolopts & WAKE_MCAST) { 3556 /* IPv4 multicast */ 3557 crc = lan743x_pm_wakeframe_crc16(ipv4_multicast, 3); 3558 lan743x_csr_write(adapter, MAC_WUF_CFG(mask_index), 3559 MAC_WUF_CFG_EN_ | MAC_WUF_CFG_TYPE_MCAST_ | 3560 (0 << MAC_WUF_CFG_OFFSET_SHIFT_) | 3561 (crc & MAC_WUF_CFG_CRC16_MASK_)); 3562 lan743x_csr_write(adapter, MAC_WUF_MASK0(mask_index), 7); 3563 lan743x_csr_write(adapter, MAC_WUF_MASK1(mask_index), 0); 3564 lan743x_csr_write(adapter, MAC_WUF_MASK2(mask_index), 0); 3565 lan743x_csr_write(adapter, MAC_WUF_MASK3(mask_index), 0); 3566 mask_index++; 3567 3568 /* IPv6 multicast */ 3569 crc = lan743x_pm_wakeframe_crc16(ipv6_multicast, 2); 3570 lan743x_csr_write(adapter, MAC_WUF_CFG(mask_index), 3571 MAC_WUF_CFG_EN_ | MAC_WUF_CFG_TYPE_MCAST_ | 3572 (0 << MAC_WUF_CFG_OFFSET_SHIFT_) | 3573 (crc & MAC_WUF_CFG_CRC16_MASK_)); 3574 lan743x_csr_write(adapter, MAC_WUF_MASK0(mask_index), 3); 3575 lan743x_csr_write(adapter, MAC_WUF_MASK1(mask_index), 0); 3576 lan743x_csr_write(adapter, MAC_WUF_MASK2(mask_index), 0); 3577 lan743x_csr_write(adapter, MAC_WUF_MASK3(mask_index), 0); 3578 mask_index++; 3579 3580 wucsr |= MAC_WUCSR_RFE_WAKE_EN_ | MAC_WUCSR_WAKE_EN_; 3581 macrx |= MAC_RX_RXEN_; 3582 pmtctl |= PMT_CTL_WOL_EN_ | PMT_CTL_MAC_D3_RX_CLK_OVR_; 3583 pmtctl |= PMT_CTL_RX_FCT_RFE_D3_CLK_OVR_; 3584 } 3585 if (adapter->wolopts & WAKE_ARP) { 3586 /* set MAC_WUF_CFG & WUF_MASK 3587 * for packettype (offset 12,13) = ARP (0x0806) 3588 */ 3589 crc = lan743x_pm_wakeframe_crc16(arp_type, 2); 3590 lan743x_csr_write(adapter, MAC_WUF_CFG(mask_index), 3591 MAC_WUF_CFG_EN_ | MAC_WUF_CFG_TYPE_ALL_ | 3592 (0 << MAC_WUF_CFG_OFFSET_SHIFT_) | 3593 (crc & MAC_WUF_CFG_CRC16_MASK_)); 3594 lan743x_csr_write(adapter, MAC_WUF_MASK0(mask_index), 0x3000); 3595 lan743x_csr_write(adapter, MAC_WUF_MASK1(mask_index), 0); 3596 lan743x_csr_write(adapter, MAC_WUF_MASK2(mask_index), 0); 3597 lan743x_csr_write(adapter, MAC_WUF_MASK3(mask_index), 0); 3598 mask_index++; 3599 3600 wucsr |= MAC_WUCSR_RFE_WAKE_EN_ | MAC_WUCSR_WAKE_EN_; 3601 macrx |= MAC_RX_RXEN_; 3602 pmtctl |= PMT_CTL_WOL_EN_ | PMT_CTL_MAC_D3_RX_CLK_OVR_; 3603 pmtctl |= PMT_CTL_RX_FCT_RFE_D3_CLK_OVR_; 3604 } 3605 3606 if (adapter->wolopts & WAKE_MAGICSECURE) { 3607 sopass = *(u32 *)adapter->sopass; 3608 lan743x_csr_write(adapter, MAC_MP_SO_LO, sopass); 3609 sopass = *(u16 *)&adapter->sopass[4]; 3610 lan743x_csr_write(adapter, MAC_MP_SO_HI, sopass); 3611 wucsr |= MAC_MP_SO_EN_; 3612 } 3613 3614 lan743x_csr_write(adapter, MAC_WUCSR, wucsr); 3615 lan743x_csr_write(adapter, PMT_CTL, pmtctl); 3616 lan743x_csr_write(adapter, MAC_RX, macrx); 3617 } 3618 3619 static int lan743x_pm_suspend(struct device *dev) 3620 { 3621 struct pci_dev *pdev = to_pci_dev(dev); 3622 struct net_device *netdev = pci_get_drvdata(pdev); 3623 struct lan743x_adapter *adapter = netdev_priv(netdev); 3624 u32 data; 3625 3626 lan743x_pcidev_shutdown(pdev); 3627 3628 /* clear all wakes */ 3629 lan743x_csr_write(adapter, MAC_WUCSR, 0); 3630 lan743x_csr_write(adapter, MAC_WUCSR2, 0); 3631 lan743x_csr_write(adapter, MAC_WK_SRC, 0xFFFFFFFF); 3632 3633 if (adapter->wolopts) 3634 lan743x_pm_set_wol(adapter); 3635 3636 if (adapter->is_pci11x1x) { 3637 /* Save HW_CFG to config again in PM resume */ 3638 data = lan743x_csr_read(adapter, HW_CFG); 3639 adapter->hw_cfg = data; 3640 data |= (HW_CFG_RST_PROTECT_PCIE_ | 3641 HW_CFG_D3_RESET_DIS_ | 3642 HW_CFG_D3_VAUX_OVR_ | 3643 HW_CFG_HOT_RESET_DIS_ | 3644 HW_CFG_RST_PROTECT_); 3645 lan743x_csr_write(adapter, HW_CFG, data); 3646 } 3647 3648 /* Host sets PME_En, put D3hot */ 3649 return pci_prepare_to_sleep(pdev); 3650 } 3651 3652 static int lan743x_pm_resume(struct device *dev) 3653 { 3654 struct pci_dev *pdev = to_pci_dev(dev); 3655 struct net_device *netdev = pci_get_drvdata(pdev); 3656 struct lan743x_adapter *adapter = netdev_priv(netdev); 3657 int ret; 3658 3659 pci_set_power_state(pdev, PCI_D0); 3660 pci_restore_state(pdev); 3661 pci_save_state(pdev); 3662 3663 /* Restore HW_CFG that was saved during pm suspend */ 3664 if (adapter->is_pci11x1x) 3665 lan743x_csr_write(adapter, HW_CFG, adapter->hw_cfg); 3666 3667 ret = lan743x_hardware_init(adapter, pdev); 3668 if (ret) { 3669 netif_err(adapter, probe, adapter->netdev, 3670 "lan743x_hardware_init returned %d\n", ret); 3671 lan743x_pci_cleanup(adapter); 3672 return ret; 3673 } 3674 3675 /* open netdev when netdev is at running state while resume. 3676 * For instance, it is true when system wakesup after pm-suspend 3677 * However, it is false when system wakes up after suspend GUI menu 3678 */ 3679 if (netif_running(netdev)) 3680 lan743x_netdev_open(netdev); 3681 3682 netif_device_attach(netdev); 3683 ret = lan743x_csr_read(adapter, MAC_WK_SRC); 3684 netif_info(adapter, drv, adapter->netdev, 3685 "Wakeup source : 0x%08X\n", ret); 3686 3687 return 0; 3688 } 3689 3690 static const struct dev_pm_ops lan743x_pm_ops = { 3691 SET_SYSTEM_SLEEP_PM_OPS(lan743x_pm_suspend, lan743x_pm_resume) 3692 }; 3693 #endif /* CONFIG_PM_SLEEP */ 3694 3695 static const struct pci_device_id lan743x_pcidev_tbl[] = { 3696 { PCI_DEVICE(PCI_VENDOR_ID_SMSC, PCI_DEVICE_ID_SMSC_LAN7430) }, 3697 { PCI_DEVICE(PCI_VENDOR_ID_SMSC, PCI_DEVICE_ID_SMSC_LAN7431) }, 3698 { PCI_DEVICE(PCI_VENDOR_ID_SMSC, PCI_DEVICE_ID_SMSC_A011) }, 3699 { PCI_DEVICE(PCI_VENDOR_ID_SMSC, PCI_DEVICE_ID_SMSC_A041) }, 3700 { 0, } 3701 }; 3702 3703 MODULE_DEVICE_TABLE(pci, lan743x_pcidev_tbl); 3704 3705 static struct pci_driver lan743x_pcidev_driver = { 3706 .name = DRIVER_NAME, 3707 .id_table = lan743x_pcidev_tbl, 3708 .probe = lan743x_pcidev_probe, 3709 .remove = lan743x_pcidev_remove, 3710 #ifdef CONFIG_PM_SLEEP 3711 .driver.pm = &lan743x_pm_ops, 3712 #endif 3713 .shutdown = lan743x_pcidev_shutdown, 3714 }; 3715 3716 module_pci_driver(lan743x_pcidev_driver); 3717 3718 MODULE_AUTHOR(DRIVER_AUTHOR); 3719 MODULE_DESCRIPTION(DRIVER_DESC); 3720 MODULE_LICENSE("GPL"); 3721