1 /* SPDX-License-Identifier: GPL-2.0+ */ 2 /* Copyright (C) 2018 Microchip Technology Inc. */ 3 4 #include <linux/module.h> 5 #include <linux/pci.h> 6 #include <linux/netdevice.h> 7 #include <linux/etherdevice.h> 8 #include <linux/crc32.h> 9 #include <linux/microchipphy.h> 10 #include <linux/net_tstamp.h> 11 #include <linux/of_mdio.h> 12 #include <linux/of_net.h> 13 #include <linux/phy.h> 14 #include <linux/phy_fixed.h> 15 #include <linux/rtnetlink.h> 16 #include <linux/iopoll.h> 17 #include <linux/crc16.h> 18 #include "lan743x_main.h" 19 #include "lan743x_ethtool.h" 20 21 static void lan743x_pci_cleanup(struct lan743x_adapter *adapter) 22 { 23 pci_release_selected_regions(adapter->pdev, 24 pci_select_bars(adapter->pdev, 25 IORESOURCE_MEM)); 26 pci_disable_device(adapter->pdev); 27 } 28 29 static int lan743x_pci_init(struct lan743x_adapter *adapter, 30 struct pci_dev *pdev) 31 { 32 unsigned long bars = 0; 33 int ret; 34 35 adapter->pdev = pdev; 36 ret = pci_enable_device_mem(pdev); 37 if (ret) 38 goto return_error; 39 40 netif_info(adapter, probe, adapter->netdev, 41 "PCI: Vendor ID = 0x%04X, Device ID = 0x%04X\n", 42 pdev->vendor, pdev->device); 43 bars = pci_select_bars(pdev, IORESOURCE_MEM); 44 if (!test_bit(0, &bars)) 45 goto disable_device; 46 47 ret = pci_request_selected_regions(pdev, bars, DRIVER_NAME); 48 if (ret) 49 goto disable_device; 50 51 pci_set_master(pdev); 52 return 0; 53 54 disable_device: 55 pci_disable_device(adapter->pdev); 56 57 return_error: 58 return ret; 59 } 60 61 u32 lan743x_csr_read(struct lan743x_adapter *adapter, int offset) 62 { 63 return ioread32(&adapter->csr.csr_address[offset]); 64 } 65 66 void lan743x_csr_write(struct lan743x_adapter *adapter, int offset, 67 u32 data) 68 { 69 iowrite32(data, &adapter->csr.csr_address[offset]); 70 } 71 72 #define LAN743X_CSR_READ_OP(offset) lan743x_csr_read(adapter, offset) 73 74 static int lan743x_csr_light_reset(struct lan743x_adapter *adapter) 75 { 76 u32 data; 77 78 data = lan743x_csr_read(adapter, HW_CFG); 79 data |= HW_CFG_LRST_; 80 lan743x_csr_write(adapter, HW_CFG, data); 81 82 return readx_poll_timeout(LAN743X_CSR_READ_OP, HW_CFG, data, 83 !(data & HW_CFG_LRST_), 100000, 10000000); 84 } 85 86 static int lan743x_csr_wait_for_bit(struct lan743x_adapter *adapter, 87 int offset, u32 bit_mask, 88 int target_value, int usleep_min, 89 int usleep_max, int count) 90 { 91 u32 data; 92 93 return readx_poll_timeout(LAN743X_CSR_READ_OP, offset, data, 94 target_value == ((data & bit_mask) ? 1 : 0), 95 usleep_max, usleep_min * count); 96 } 97 98 static int lan743x_csr_init(struct lan743x_adapter *adapter) 99 { 100 struct lan743x_csr *csr = &adapter->csr; 101 resource_size_t bar_start, bar_length; 102 int result; 103 104 bar_start = pci_resource_start(adapter->pdev, 0); 105 bar_length = pci_resource_len(adapter->pdev, 0); 106 csr->csr_address = devm_ioremap(&adapter->pdev->dev, 107 bar_start, bar_length); 108 if (!csr->csr_address) { 109 result = -ENOMEM; 110 goto clean_up; 111 } 112 113 csr->id_rev = lan743x_csr_read(adapter, ID_REV); 114 csr->fpga_rev = lan743x_csr_read(adapter, FPGA_REV); 115 netif_info(adapter, probe, adapter->netdev, 116 "ID_REV = 0x%08X, FPGA_REV = %d.%d\n", 117 csr->id_rev, FPGA_REV_GET_MAJOR_(csr->fpga_rev), 118 FPGA_REV_GET_MINOR_(csr->fpga_rev)); 119 if (!ID_REV_IS_VALID_CHIP_ID_(csr->id_rev)) { 120 result = -ENODEV; 121 goto clean_up; 122 } 123 124 csr->flags = LAN743X_CSR_FLAG_SUPPORTS_INTR_AUTO_SET_CLR; 125 switch (csr->id_rev & ID_REV_CHIP_REV_MASK_) { 126 case ID_REV_CHIP_REV_A0_: 127 csr->flags |= LAN743X_CSR_FLAG_IS_A0; 128 csr->flags &= ~LAN743X_CSR_FLAG_SUPPORTS_INTR_AUTO_SET_CLR; 129 break; 130 case ID_REV_CHIP_REV_B0_: 131 csr->flags |= LAN743X_CSR_FLAG_IS_B0; 132 break; 133 } 134 135 result = lan743x_csr_light_reset(adapter); 136 if (result) 137 goto clean_up; 138 return 0; 139 clean_up: 140 return result; 141 } 142 143 static void lan743x_intr_software_isr(void *context) 144 { 145 struct lan743x_adapter *adapter = context; 146 struct lan743x_intr *intr = &adapter->intr; 147 u32 int_sts; 148 149 int_sts = lan743x_csr_read(adapter, INT_STS); 150 if (int_sts & INT_BIT_SW_GP_) { 151 /* disable the interrupt to prevent repeated re-triggering */ 152 lan743x_csr_write(adapter, INT_EN_CLR, INT_BIT_SW_GP_); 153 intr->software_isr_flag = 1; 154 } 155 } 156 157 static void lan743x_tx_isr(void *context, u32 int_sts, u32 flags) 158 { 159 struct lan743x_tx *tx = context; 160 struct lan743x_adapter *adapter = tx->adapter; 161 bool enable_flag = true; 162 163 lan743x_csr_read(adapter, INT_EN_SET); 164 if (flags & LAN743X_VECTOR_FLAG_SOURCE_ENABLE_CLEAR) { 165 lan743x_csr_write(adapter, INT_EN_CLR, 166 INT_BIT_DMA_TX_(tx->channel_number)); 167 } 168 169 if (int_sts & INT_BIT_DMA_TX_(tx->channel_number)) { 170 u32 ioc_bit = DMAC_INT_BIT_TX_IOC_(tx->channel_number); 171 u32 dmac_int_sts; 172 u32 dmac_int_en; 173 174 if (flags & LAN743X_VECTOR_FLAG_SOURCE_STATUS_READ) 175 dmac_int_sts = lan743x_csr_read(adapter, DMAC_INT_STS); 176 else 177 dmac_int_sts = ioc_bit; 178 if (flags & LAN743X_VECTOR_FLAG_SOURCE_ENABLE_CHECK) 179 dmac_int_en = lan743x_csr_read(adapter, 180 DMAC_INT_EN_SET); 181 else 182 dmac_int_en = ioc_bit; 183 184 dmac_int_en &= ioc_bit; 185 dmac_int_sts &= dmac_int_en; 186 if (dmac_int_sts & ioc_bit) { 187 napi_schedule(&tx->napi); 188 enable_flag = false;/* poll func will enable later */ 189 } 190 } 191 192 if (enable_flag) 193 /* enable isr */ 194 lan743x_csr_write(adapter, INT_EN_SET, 195 INT_BIT_DMA_TX_(tx->channel_number)); 196 } 197 198 static void lan743x_rx_isr(void *context, u32 int_sts, u32 flags) 199 { 200 struct lan743x_rx *rx = context; 201 struct lan743x_adapter *adapter = rx->adapter; 202 bool enable_flag = true; 203 204 if (flags & LAN743X_VECTOR_FLAG_SOURCE_ENABLE_CLEAR) { 205 lan743x_csr_write(adapter, INT_EN_CLR, 206 INT_BIT_DMA_RX_(rx->channel_number)); 207 } 208 209 if (int_sts & INT_BIT_DMA_RX_(rx->channel_number)) { 210 u32 rx_frame_bit = DMAC_INT_BIT_RXFRM_(rx->channel_number); 211 u32 dmac_int_sts; 212 u32 dmac_int_en; 213 214 if (flags & LAN743X_VECTOR_FLAG_SOURCE_STATUS_READ) 215 dmac_int_sts = lan743x_csr_read(adapter, DMAC_INT_STS); 216 else 217 dmac_int_sts = rx_frame_bit; 218 if (flags & LAN743X_VECTOR_FLAG_SOURCE_ENABLE_CHECK) 219 dmac_int_en = lan743x_csr_read(adapter, 220 DMAC_INT_EN_SET); 221 else 222 dmac_int_en = rx_frame_bit; 223 224 dmac_int_en &= rx_frame_bit; 225 dmac_int_sts &= dmac_int_en; 226 if (dmac_int_sts & rx_frame_bit) { 227 napi_schedule(&rx->napi); 228 enable_flag = false;/* poll funct will enable later */ 229 } 230 } 231 232 if (enable_flag) { 233 /* enable isr */ 234 lan743x_csr_write(adapter, INT_EN_SET, 235 INT_BIT_DMA_RX_(rx->channel_number)); 236 } 237 } 238 239 static void lan743x_intr_shared_isr(void *context, u32 int_sts, u32 flags) 240 { 241 struct lan743x_adapter *adapter = context; 242 unsigned int channel; 243 244 if (int_sts & INT_BIT_ALL_RX_) { 245 for (channel = 0; channel < LAN743X_USED_RX_CHANNELS; 246 channel++) { 247 u32 int_bit = INT_BIT_DMA_RX_(channel); 248 249 if (int_sts & int_bit) { 250 lan743x_rx_isr(&adapter->rx[channel], 251 int_bit, flags); 252 int_sts &= ~int_bit; 253 } 254 } 255 } 256 if (int_sts & INT_BIT_ALL_TX_) { 257 for (channel = 0; channel < LAN743X_USED_TX_CHANNELS; 258 channel++) { 259 u32 int_bit = INT_BIT_DMA_TX_(channel); 260 261 if (int_sts & int_bit) { 262 lan743x_tx_isr(&adapter->tx[channel], 263 int_bit, flags); 264 int_sts &= ~int_bit; 265 } 266 } 267 } 268 if (int_sts & INT_BIT_ALL_OTHER_) { 269 if (int_sts & INT_BIT_SW_GP_) { 270 lan743x_intr_software_isr(adapter); 271 int_sts &= ~INT_BIT_SW_GP_; 272 } 273 if (int_sts & INT_BIT_1588_) { 274 lan743x_ptp_isr(adapter); 275 int_sts &= ~INT_BIT_1588_; 276 } 277 } 278 if (int_sts) 279 lan743x_csr_write(adapter, INT_EN_CLR, int_sts); 280 } 281 282 static irqreturn_t lan743x_intr_entry_isr(int irq, void *ptr) 283 { 284 struct lan743x_vector *vector = ptr; 285 struct lan743x_adapter *adapter = vector->adapter; 286 irqreturn_t result = IRQ_NONE; 287 u32 int_enables; 288 u32 int_sts; 289 290 if (vector->flags & LAN743X_VECTOR_FLAG_SOURCE_STATUS_READ) { 291 int_sts = lan743x_csr_read(adapter, INT_STS); 292 } else if (vector->flags & 293 (LAN743X_VECTOR_FLAG_SOURCE_STATUS_R2C | 294 LAN743X_VECTOR_FLAG_SOURCE_ENABLE_R2C)) { 295 int_sts = lan743x_csr_read(adapter, INT_STS_R2C); 296 } else { 297 /* use mask as implied status */ 298 int_sts = vector->int_mask | INT_BIT_MAS_; 299 } 300 301 if (!(int_sts & INT_BIT_MAS_)) 302 goto irq_done; 303 304 if (vector->flags & LAN743X_VECTOR_FLAG_VECTOR_ENABLE_ISR_CLEAR) 305 /* disable vector interrupt */ 306 lan743x_csr_write(adapter, 307 INT_VEC_EN_CLR, 308 INT_VEC_EN_(vector->vector_index)); 309 310 if (vector->flags & LAN743X_VECTOR_FLAG_MASTER_ENABLE_CLEAR) 311 /* disable master interrupt */ 312 lan743x_csr_write(adapter, INT_EN_CLR, INT_BIT_MAS_); 313 314 if (vector->flags & LAN743X_VECTOR_FLAG_SOURCE_ENABLE_CHECK) { 315 int_enables = lan743x_csr_read(adapter, INT_EN_SET); 316 } else { 317 /* use vector mask as implied enable mask */ 318 int_enables = vector->int_mask; 319 } 320 321 int_sts &= int_enables; 322 int_sts &= vector->int_mask; 323 if (int_sts) { 324 if (vector->handler) { 325 vector->handler(vector->context, 326 int_sts, vector->flags); 327 } else { 328 /* disable interrupts on this vector */ 329 lan743x_csr_write(adapter, INT_EN_CLR, 330 vector->int_mask); 331 } 332 result = IRQ_HANDLED; 333 } 334 335 if (vector->flags & LAN743X_VECTOR_FLAG_MASTER_ENABLE_SET) 336 /* enable master interrupt */ 337 lan743x_csr_write(adapter, INT_EN_SET, INT_BIT_MAS_); 338 339 if (vector->flags & LAN743X_VECTOR_FLAG_VECTOR_ENABLE_ISR_SET) 340 /* enable vector interrupt */ 341 lan743x_csr_write(adapter, 342 INT_VEC_EN_SET, 343 INT_VEC_EN_(vector->vector_index)); 344 irq_done: 345 return result; 346 } 347 348 static int lan743x_intr_test_isr(struct lan743x_adapter *adapter) 349 { 350 struct lan743x_intr *intr = &adapter->intr; 351 int result = -ENODEV; 352 int timeout = 10; 353 354 intr->software_isr_flag = 0; 355 356 /* enable interrupt */ 357 lan743x_csr_write(adapter, INT_EN_SET, INT_BIT_SW_GP_); 358 359 /* activate interrupt here */ 360 lan743x_csr_write(adapter, INT_SET, INT_BIT_SW_GP_); 361 while ((timeout > 0) && (!(intr->software_isr_flag))) { 362 usleep_range(1000, 20000); 363 timeout--; 364 } 365 366 if (intr->software_isr_flag) 367 result = 0; 368 369 /* disable interrupts */ 370 lan743x_csr_write(adapter, INT_EN_CLR, INT_BIT_SW_GP_); 371 return result; 372 } 373 374 static int lan743x_intr_register_isr(struct lan743x_adapter *adapter, 375 int vector_index, u32 flags, 376 u32 int_mask, 377 lan743x_vector_handler handler, 378 void *context) 379 { 380 struct lan743x_vector *vector = &adapter->intr.vector_list 381 [vector_index]; 382 int ret; 383 384 vector->adapter = adapter; 385 vector->flags = flags; 386 vector->vector_index = vector_index; 387 vector->int_mask = int_mask; 388 vector->handler = handler; 389 vector->context = context; 390 391 ret = request_irq(vector->irq, 392 lan743x_intr_entry_isr, 393 (flags & LAN743X_VECTOR_FLAG_IRQ_SHARED) ? 394 IRQF_SHARED : 0, DRIVER_NAME, vector); 395 if (ret) { 396 vector->handler = NULL; 397 vector->context = NULL; 398 vector->int_mask = 0; 399 vector->flags = 0; 400 } 401 return ret; 402 } 403 404 static void lan743x_intr_unregister_isr(struct lan743x_adapter *adapter, 405 int vector_index) 406 { 407 struct lan743x_vector *vector = &adapter->intr.vector_list 408 [vector_index]; 409 410 free_irq(vector->irq, vector); 411 vector->handler = NULL; 412 vector->context = NULL; 413 vector->int_mask = 0; 414 vector->flags = 0; 415 } 416 417 static u32 lan743x_intr_get_vector_flags(struct lan743x_adapter *adapter, 418 u32 int_mask) 419 { 420 int index; 421 422 for (index = 0; index < LAN743X_MAX_VECTOR_COUNT; index++) { 423 if (adapter->intr.vector_list[index].int_mask & int_mask) 424 return adapter->intr.vector_list[index].flags; 425 } 426 return 0; 427 } 428 429 static void lan743x_intr_close(struct lan743x_adapter *adapter) 430 { 431 struct lan743x_intr *intr = &adapter->intr; 432 int index = 0; 433 434 lan743x_csr_write(adapter, INT_EN_CLR, INT_BIT_MAS_); 435 lan743x_csr_write(adapter, INT_VEC_EN_CLR, 0x000000FF); 436 437 for (index = 0; index < LAN743X_MAX_VECTOR_COUNT; index++) { 438 if (intr->flags & INTR_FLAG_IRQ_REQUESTED(index)) { 439 lan743x_intr_unregister_isr(adapter, index); 440 intr->flags &= ~INTR_FLAG_IRQ_REQUESTED(index); 441 } 442 } 443 444 if (intr->flags & INTR_FLAG_MSI_ENABLED) { 445 pci_disable_msi(adapter->pdev); 446 intr->flags &= ~INTR_FLAG_MSI_ENABLED; 447 } 448 449 if (intr->flags & INTR_FLAG_MSIX_ENABLED) { 450 pci_disable_msix(adapter->pdev); 451 intr->flags &= ~INTR_FLAG_MSIX_ENABLED; 452 } 453 } 454 455 static int lan743x_intr_open(struct lan743x_adapter *adapter) 456 { 457 struct msix_entry msix_entries[LAN743X_MAX_VECTOR_COUNT]; 458 struct lan743x_intr *intr = &adapter->intr; 459 u32 int_vec_en_auto_clr = 0; 460 u32 int_vec_map0 = 0; 461 u32 int_vec_map1 = 0; 462 int ret = -ENODEV; 463 int index = 0; 464 u32 flags = 0; 465 466 intr->number_of_vectors = 0; 467 468 /* Try to set up MSIX interrupts */ 469 memset(&msix_entries[0], 0, 470 sizeof(struct msix_entry) * LAN743X_MAX_VECTOR_COUNT); 471 for (index = 0; index < LAN743X_MAX_VECTOR_COUNT; index++) 472 msix_entries[index].entry = index; 473 ret = pci_enable_msix_range(adapter->pdev, 474 msix_entries, 1, 475 1 + LAN743X_USED_TX_CHANNELS + 476 LAN743X_USED_RX_CHANNELS); 477 478 if (ret > 0) { 479 intr->flags |= INTR_FLAG_MSIX_ENABLED; 480 intr->number_of_vectors = ret; 481 intr->using_vectors = true; 482 for (index = 0; index < intr->number_of_vectors; index++) 483 intr->vector_list[index].irq = msix_entries 484 [index].vector; 485 netif_info(adapter, ifup, adapter->netdev, 486 "using MSIX interrupts, number of vectors = %d\n", 487 intr->number_of_vectors); 488 } 489 490 /* If MSIX failed try to setup using MSI interrupts */ 491 if (!intr->number_of_vectors) { 492 if (!(adapter->csr.flags & LAN743X_CSR_FLAG_IS_A0)) { 493 if (!pci_enable_msi(adapter->pdev)) { 494 intr->flags |= INTR_FLAG_MSI_ENABLED; 495 intr->number_of_vectors = 1; 496 intr->using_vectors = true; 497 intr->vector_list[0].irq = 498 adapter->pdev->irq; 499 netif_info(adapter, ifup, adapter->netdev, 500 "using MSI interrupts, number of vectors = %d\n", 501 intr->number_of_vectors); 502 } 503 } 504 } 505 506 /* If MSIX, and MSI failed, setup using legacy interrupt */ 507 if (!intr->number_of_vectors) { 508 intr->number_of_vectors = 1; 509 intr->using_vectors = false; 510 intr->vector_list[0].irq = intr->irq; 511 netif_info(adapter, ifup, adapter->netdev, 512 "using legacy interrupts\n"); 513 } 514 515 /* At this point we must have at least one irq */ 516 lan743x_csr_write(adapter, INT_VEC_EN_CLR, 0xFFFFFFFF); 517 518 /* map all interrupts to vector 0 */ 519 lan743x_csr_write(adapter, INT_VEC_MAP0, 0x00000000); 520 lan743x_csr_write(adapter, INT_VEC_MAP1, 0x00000000); 521 lan743x_csr_write(adapter, INT_VEC_MAP2, 0x00000000); 522 flags = LAN743X_VECTOR_FLAG_SOURCE_STATUS_READ | 523 LAN743X_VECTOR_FLAG_SOURCE_STATUS_W2C | 524 LAN743X_VECTOR_FLAG_SOURCE_ENABLE_CHECK | 525 LAN743X_VECTOR_FLAG_SOURCE_ENABLE_CLEAR; 526 527 if (intr->using_vectors) { 528 flags |= LAN743X_VECTOR_FLAG_VECTOR_ENABLE_ISR_CLEAR | 529 LAN743X_VECTOR_FLAG_VECTOR_ENABLE_ISR_SET; 530 } else { 531 flags |= LAN743X_VECTOR_FLAG_MASTER_ENABLE_CLEAR | 532 LAN743X_VECTOR_FLAG_MASTER_ENABLE_SET | 533 LAN743X_VECTOR_FLAG_IRQ_SHARED; 534 } 535 536 if (adapter->csr.flags & LAN743X_CSR_FLAG_SUPPORTS_INTR_AUTO_SET_CLR) { 537 flags &= ~LAN743X_VECTOR_FLAG_SOURCE_STATUS_READ; 538 flags &= ~LAN743X_VECTOR_FLAG_SOURCE_STATUS_W2C; 539 flags &= ~LAN743X_VECTOR_FLAG_SOURCE_ENABLE_CLEAR; 540 flags &= ~LAN743X_VECTOR_FLAG_SOURCE_ENABLE_CHECK; 541 flags |= LAN743X_VECTOR_FLAG_SOURCE_STATUS_R2C; 542 flags |= LAN743X_VECTOR_FLAG_SOURCE_ENABLE_R2C; 543 } 544 545 ret = lan743x_intr_register_isr(adapter, 0, flags, 546 INT_BIT_ALL_RX_ | INT_BIT_ALL_TX_ | 547 INT_BIT_ALL_OTHER_, 548 lan743x_intr_shared_isr, adapter); 549 if (ret) 550 goto clean_up; 551 intr->flags |= INTR_FLAG_IRQ_REQUESTED(0); 552 553 if (intr->using_vectors) 554 lan743x_csr_write(adapter, INT_VEC_EN_SET, 555 INT_VEC_EN_(0)); 556 557 if (!(adapter->csr.flags & LAN743X_CSR_FLAG_IS_A0)) { 558 lan743x_csr_write(adapter, INT_MOD_CFG0, LAN743X_INT_MOD); 559 lan743x_csr_write(adapter, INT_MOD_CFG1, LAN743X_INT_MOD); 560 lan743x_csr_write(adapter, INT_MOD_CFG2, LAN743X_INT_MOD); 561 lan743x_csr_write(adapter, INT_MOD_CFG3, LAN743X_INT_MOD); 562 lan743x_csr_write(adapter, INT_MOD_CFG4, LAN743X_INT_MOD); 563 lan743x_csr_write(adapter, INT_MOD_CFG5, LAN743X_INT_MOD); 564 lan743x_csr_write(adapter, INT_MOD_CFG6, LAN743X_INT_MOD); 565 lan743x_csr_write(adapter, INT_MOD_CFG7, LAN743X_INT_MOD); 566 lan743x_csr_write(adapter, INT_MOD_MAP0, 0x00005432); 567 lan743x_csr_write(adapter, INT_MOD_MAP1, 0x00000001); 568 lan743x_csr_write(adapter, INT_MOD_MAP2, 0x00FFFFFF); 569 } 570 571 /* enable interrupts */ 572 lan743x_csr_write(adapter, INT_EN_SET, INT_BIT_MAS_); 573 ret = lan743x_intr_test_isr(adapter); 574 if (ret) 575 goto clean_up; 576 577 if (intr->number_of_vectors > 1) { 578 int number_of_tx_vectors = intr->number_of_vectors - 1; 579 580 if (number_of_tx_vectors > LAN743X_USED_TX_CHANNELS) 581 number_of_tx_vectors = LAN743X_USED_TX_CHANNELS; 582 flags = LAN743X_VECTOR_FLAG_SOURCE_STATUS_READ | 583 LAN743X_VECTOR_FLAG_SOURCE_STATUS_W2C | 584 LAN743X_VECTOR_FLAG_SOURCE_ENABLE_CHECK | 585 LAN743X_VECTOR_FLAG_SOURCE_ENABLE_CLEAR | 586 LAN743X_VECTOR_FLAG_VECTOR_ENABLE_ISR_CLEAR | 587 LAN743X_VECTOR_FLAG_VECTOR_ENABLE_ISR_SET; 588 589 if (adapter->csr.flags & 590 LAN743X_CSR_FLAG_SUPPORTS_INTR_AUTO_SET_CLR) { 591 flags = LAN743X_VECTOR_FLAG_VECTOR_ENABLE_AUTO_SET | 592 LAN743X_VECTOR_FLAG_SOURCE_ENABLE_AUTO_SET | 593 LAN743X_VECTOR_FLAG_SOURCE_ENABLE_AUTO_CLEAR | 594 LAN743X_VECTOR_FLAG_SOURCE_STATUS_AUTO_CLEAR; 595 } 596 597 for (index = 0; index < number_of_tx_vectors; index++) { 598 u32 int_bit = INT_BIT_DMA_TX_(index); 599 int vector = index + 1; 600 601 /* map TX interrupt to vector */ 602 int_vec_map1 |= INT_VEC_MAP1_TX_VEC_(index, vector); 603 lan743x_csr_write(adapter, INT_VEC_MAP1, int_vec_map1); 604 605 /* Remove TX interrupt from shared mask */ 606 intr->vector_list[0].int_mask &= ~int_bit; 607 ret = lan743x_intr_register_isr(adapter, vector, flags, 608 int_bit, lan743x_tx_isr, 609 &adapter->tx[index]); 610 if (ret) 611 goto clean_up; 612 intr->flags |= INTR_FLAG_IRQ_REQUESTED(vector); 613 if (!(flags & 614 LAN743X_VECTOR_FLAG_VECTOR_ENABLE_AUTO_SET)) 615 lan743x_csr_write(adapter, INT_VEC_EN_SET, 616 INT_VEC_EN_(vector)); 617 } 618 } 619 if ((intr->number_of_vectors - LAN743X_USED_TX_CHANNELS) > 1) { 620 int number_of_rx_vectors = intr->number_of_vectors - 621 LAN743X_USED_TX_CHANNELS - 1; 622 623 if (number_of_rx_vectors > LAN743X_USED_RX_CHANNELS) 624 number_of_rx_vectors = LAN743X_USED_RX_CHANNELS; 625 626 flags = LAN743X_VECTOR_FLAG_SOURCE_STATUS_READ | 627 LAN743X_VECTOR_FLAG_SOURCE_STATUS_W2C | 628 LAN743X_VECTOR_FLAG_SOURCE_ENABLE_CHECK | 629 LAN743X_VECTOR_FLAG_SOURCE_ENABLE_CLEAR | 630 LAN743X_VECTOR_FLAG_VECTOR_ENABLE_ISR_CLEAR | 631 LAN743X_VECTOR_FLAG_VECTOR_ENABLE_ISR_SET; 632 633 if (adapter->csr.flags & 634 LAN743X_CSR_FLAG_SUPPORTS_INTR_AUTO_SET_CLR) { 635 flags = LAN743X_VECTOR_FLAG_VECTOR_ENABLE_AUTO_CLEAR | 636 LAN743X_VECTOR_FLAG_VECTOR_ENABLE_AUTO_SET | 637 LAN743X_VECTOR_FLAG_SOURCE_ENABLE_AUTO_SET | 638 LAN743X_VECTOR_FLAG_SOURCE_ENABLE_AUTO_CLEAR | 639 LAN743X_VECTOR_FLAG_SOURCE_STATUS_AUTO_CLEAR; 640 } 641 for (index = 0; index < number_of_rx_vectors; index++) { 642 int vector = index + 1 + LAN743X_USED_TX_CHANNELS; 643 u32 int_bit = INT_BIT_DMA_RX_(index); 644 645 /* map RX interrupt to vector */ 646 int_vec_map0 |= INT_VEC_MAP0_RX_VEC_(index, vector); 647 lan743x_csr_write(adapter, INT_VEC_MAP0, int_vec_map0); 648 if (flags & 649 LAN743X_VECTOR_FLAG_VECTOR_ENABLE_AUTO_CLEAR) { 650 int_vec_en_auto_clr |= INT_VEC_EN_(vector); 651 lan743x_csr_write(adapter, INT_VEC_EN_AUTO_CLR, 652 int_vec_en_auto_clr); 653 } 654 655 /* Remove RX interrupt from shared mask */ 656 intr->vector_list[0].int_mask &= ~int_bit; 657 ret = lan743x_intr_register_isr(adapter, vector, flags, 658 int_bit, lan743x_rx_isr, 659 &adapter->rx[index]); 660 if (ret) 661 goto clean_up; 662 intr->flags |= INTR_FLAG_IRQ_REQUESTED(vector); 663 664 lan743x_csr_write(adapter, INT_VEC_EN_SET, 665 INT_VEC_EN_(vector)); 666 } 667 } 668 return 0; 669 670 clean_up: 671 lan743x_intr_close(adapter); 672 return ret; 673 } 674 675 static int lan743x_dp_write(struct lan743x_adapter *adapter, 676 u32 select, u32 addr, u32 length, u32 *buf) 677 { 678 u32 dp_sel; 679 int i; 680 681 if (lan743x_csr_wait_for_bit(adapter, DP_SEL, DP_SEL_DPRDY_, 682 1, 40, 100, 100)) 683 return -EIO; 684 dp_sel = lan743x_csr_read(adapter, DP_SEL); 685 dp_sel &= ~DP_SEL_MASK_; 686 dp_sel |= select; 687 lan743x_csr_write(adapter, DP_SEL, dp_sel); 688 689 for (i = 0; i < length; i++) { 690 lan743x_csr_write(adapter, DP_ADDR, addr + i); 691 lan743x_csr_write(adapter, DP_DATA_0, buf[i]); 692 lan743x_csr_write(adapter, DP_CMD, DP_CMD_WRITE_); 693 if (lan743x_csr_wait_for_bit(adapter, DP_SEL, DP_SEL_DPRDY_, 694 1, 40, 100, 100)) 695 return -EIO; 696 } 697 698 return 0; 699 } 700 701 static u32 lan743x_mac_mii_access(u16 id, u16 index, int read) 702 { 703 u32 ret; 704 705 ret = (id << MAC_MII_ACC_PHY_ADDR_SHIFT_) & 706 MAC_MII_ACC_PHY_ADDR_MASK_; 707 ret |= (index << MAC_MII_ACC_MIIRINDA_SHIFT_) & 708 MAC_MII_ACC_MIIRINDA_MASK_; 709 710 if (read) 711 ret |= MAC_MII_ACC_MII_READ_; 712 else 713 ret |= MAC_MII_ACC_MII_WRITE_; 714 ret |= MAC_MII_ACC_MII_BUSY_; 715 716 return ret; 717 } 718 719 static int lan743x_mac_mii_wait_till_not_busy(struct lan743x_adapter *adapter) 720 { 721 u32 data; 722 723 return readx_poll_timeout(LAN743X_CSR_READ_OP, MAC_MII_ACC, data, 724 !(data & MAC_MII_ACC_MII_BUSY_), 0, 1000000); 725 } 726 727 static int lan743x_mdiobus_read(struct mii_bus *bus, int phy_id, int index) 728 { 729 struct lan743x_adapter *adapter = bus->priv; 730 u32 val, mii_access; 731 int ret; 732 733 /* comfirm MII not busy */ 734 ret = lan743x_mac_mii_wait_till_not_busy(adapter); 735 if (ret < 0) 736 return ret; 737 738 /* set the address, index & direction (read from PHY) */ 739 mii_access = lan743x_mac_mii_access(phy_id, index, MAC_MII_READ); 740 lan743x_csr_write(adapter, MAC_MII_ACC, mii_access); 741 ret = lan743x_mac_mii_wait_till_not_busy(adapter); 742 if (ret < 0) 743 return ret; 744 745 val = lan743x_csr_read(adapter, MAC_MII_DATA); 746 return (int)(val & 0xFFFF); 747 } 748 749 static int lan743x_mdiobus_write(struct mii_bus *bus, 750 int phy_id, int index, u16 regval) 751 { 752 struct lan743x_adapter *adapter = bus->priv; 753 u32 val, mii_access; 754 int ret; 755 756 /* confirm MII not busy */ 757 ret = lan743x_mac_mii_wait_till_not_busy(adapter); 758 if (ret < 0) 759 return ret; 760 val = (u32)regval; 761 lan743x_csr_write(adapter, MAC_MII_DATA, val); 762 763 /* set the address, index & direction (write to PHY) */ 764 mii_access = lan743x_mac_mii_access(phy_id, index, MAC_MII_WRITE); 765 lan743x_csr_write(adapter, MAC_MII_ACC, mii_access); 766 ret = lan743x_mac_mii_wait_till_not_busy(adapter); 767 return ret; 768 } 769 770 static void lan743x_mac_set_address(struct lan743x_adapter *adapter, 771 u8 *addr) 772 { 773 u32 addr_lo, addr_hi; 774 775 addr_lo = addr[0] | 776 addr[1] << 8 | 777 addr[2] << 16 | 778 addr[3] << 24; 779 addr_hi = addr[4] | 780 addr[5] << 8; 781 lan743x_csr_write(adapter, MAC_RX_ADDRL, addr_lo); 782 lan743x_csr_write(adapter, MAC_RX_ADDRH, addr_hi); 783 784 ether_addr_copy(adapter->mac_address, addr); 785 netif_info(adapter, drv, adapter->netdev, 786 "MAC address set to %pM\n", addr); 787 } 788 789 static int lan743x_mac_init(struct lan743x_adapter *adapter) 790 { 791 bool mac_address_valid = true; 792 struct net_device *netdev; 793 u32 mac_addr_hi = 0; 794 u32 mac_addr_lo = 0; 795 u32 data; 796 797 netdev = adapter->netdev; 798 799 /* disable auto duplex, and speed detection. Phylib does that */ 800 data = lan743x_csr_read(adapter, MAC_CR); 801 data &= ~(MAC_CR_ADD_ | MAC_CR_ASD_); 802 data |= MAC_CR_CNTR_RST_; 803 lan743x_csr_write(adapter, MAC_CR, data); 804 805 if (!is_valid_ether_addr(adapter->mac_address)) { 806 mac_addr_hi = lan743x_csr_read(adapter, MAC_RX_ADDRH); 807 mac_addr_lo = lan743x_csr_read(adapter, MAC_RX_ADDRL); 808 adapter->mac_address[0] = mac_addr_lo & 0xFF; 809 adapter->mac_address[1] = (mac_addr_lo >> 8) & 0xFF; 810 adapter->mac_address[2] = (mac_addr_lo >> 16) & 0xFF; 811 adapter->mac_address[3] = (mac_addr_lo >> 24) & 0xFF; 812 adapter->mac_address[4] = mac_addr_hi & 0xFF; 813 adapter->mac_address[5] = (mac_addr_hi >> 8) & 0xFF; 814 815 if (((mac_addr_hi & 0x0000FFFF) == 0x0000FFFF) && 816 mac_addr_lo == 0xFFFFFFFF) { 817 mac_address_valid = false; 818 } else if (!is_valid_ether_addr(adapter->mac_address)) { 819 mac_address_valid = false; 820 } 821 822 if (!mac_address_valid) 823 eth_random_addr(adapter->mac_address); 824 } 825 lan743x_mac_set_address(adapter, adapter->mac_address); 826 ether_addr_copy(netdev->dev_addr, adapter->mac_address); 827 828 return 0; 829 } 830 831 static int lan743x_mac_open(struct lan743x_adapter *adapter) 832 { 833 u32 temp; 834 835 temp = lan743x_csr_read(adapter, MAC_RX); 836 lan743x_csr_write(adapter, MAC_RX, temp | MAC_RX_RXEN_); 837 temp = lan743x_csr_read(adapter, MAC_TX); 838 lan743x_csr_write(adapter, MAC_TX, temp | MAC_TX_TXEN_); 839 return 0; 840 } 841 842 static void lan743x_mac_close(struct lan743x_adapter *adapter) 843 { 844 u32 temp; 845 846 temp = lan743x_csr_read(adapter, MAC_TX); 847 temp &= ~MAC_TX_TXEN_; 848 lan743x_csr_write(adapter, MAC_TX, temp); 849 lan743x_csr_wait_for_bit(adapter, MAC_TX, MAC_TX_TXD_, 850 1, 1000, 20000, 100); 851 852 temp = lan743x_csr_read(adapter, MAC_RX); 853 temp &= ~MAC_RX_RXEN_; 854 lan743x_csr_write(adapter, MAC_RX, temp); 855 lan743x_csr_wait_for_bit(adapter, MAC_RX, MAC_RX_RXD_, 856 1, 1000, 20000, 100); 857 } 858 859 static void lan743x_mac_flow_ctrl_set_enables(struct lan743x_adapter *adapter, 860 bool tx_enable, bool rx_enable) 861 { 862 u32 flow_setting = 0; 863 864 /* set maximum pause time because when fifo space frees 865 * up a zero value pause frame will be sent to release the pause 866 */ 867 flow_setting = MAC_FLOW_CR_FCPT_MASK_; 868 if (tx_enable) 869 flow_setting |= MAC_FLOW_CR_TX_FCEN_; 870 if (rx_enable) 871 flow_setting |= MAC_FLOW_CR_RX_FCEN_; 872 lan743x_csr_write(adapter, MAC_FLOW, flow_setting); 873 } 874 875 static int lan743x_mac_set_mtu(struct lan743x_adapter *adapter, int new_mtu) 876 { 877 int enabled = 0; 878 u32 mac_rx = 0; 879 880 mac_rx = lan743x_csr_read(adapter, MAC_RX); 881 if (mac_rx & MAC_RX_RXEN_) { 882 enabled = 1; 883 if (mac_rx & MAC_RX_RXD_) { 884 lan743x_csr_write(adapter, MAC_RX, mac_rx); 885 mac_rx &= ~MAC_RX_RXD_; 886 } 887 mac_rx &= ~MAC_RX_RXEN_; 888 lan743x_csr_write(adapter, MAC_RX, mac_rx); 889 lan743x_csr_wait_for_bit(adapter, MAC_RX, MAC_RX_RXD_, 890 1, 1000, 20000, 100); 891 lan743x_csr_write(adapter, MAC_RX, mac_rx | MAC_RX_RXD_); 892 } 893 894 mac_rx &= ~(MAC_RX_MAX_SIZE_MASK_); 895 mac_rx |= (((new_mtu + ETH_HLEN + 4) << MAC_RX_MAX_SIZE_SHIFT_) & 896 MAC_RX_MAX_SIZE_MASK_); 897 lan743x_csr_write(adapter, MAC_RX, mac_rx); 898 899 if (enabled) { 900 mac_rx |= MAC_RX_RXEN_; 901 lan743x_csr_write(adapter, MAC_RX, mac_rx); 902 } 903 return 0; 904 } 905 906 /* PHY */ 907 static int lan743x_phy_reset(struct lan743x_adapter *adapter) 908 { 909 u32 data; 910 911 /* Only called with in probe, and before mdiobus_register */ 912 913 data = lan743x_csr_read(adapter, PMT_CTL); 914 data |= PMT_CTL_ETH_PHY_RST_; 915 lan743x_csr_write(adapter, PMT_CTL, data); 916 917 return readx_poll_timeout(LAN743X_CSR_READ_OP, PMT_CTL, data, 918 (!(data & PMT_CTL_ETH_PHY_RST_) && 919 (data & PMT_CTL_READY_)), 920 50000, 1000000); 921 } 922 923 static void lan743x_phy_update_flowcontrol(struct lan743x_adapter *adapter, 924 u8 duplex, u16 local_adv, 925 u16 remote_adv) 926 { 927 struct lan743x_phy *phy = &adapter->phy; 928 u8 cap; 929 930 if (phy->fc_autoneg) 931 cap = mii_resolve_flowctrl_fdx(local_adv, remote_adv); 932 else 933 cap = phy->fc_request_control; 934 935 lan743x_mac_flow_ctrl_set_enables(adapter, 936 cap & FLOW_CTRL_TX, 937 cap & FLOW_CTRL_RX); 938 } 939 940 static int lan743x_phy_init(struct lan743x_adapter *adapter) 941 { 942 return lan743x_phy_reset(adapter); 943 } 944 945 static void lan743x_phy_link_status_change(struct net_device *netdev) 946 { 947 struct lan743x_adapter *adapter = netdev_priv(netdev); 948 struct phy_device *phydev = netdev->phydev; 949 u32 data; 950 951 phy_print_status(phydev); 952 if (phydev->state == PHY_RUNNING) { 953 struct ethtool_link_ksettings ksettings; 954 int remote_advertisement = 0; 955 int local_advertisement = 0; 956 957 data = lan743x_csr_read(adapter, MAC_CR); 958 959 /* set interface mode */ 960 if (phy_interface_is_rgmii(phydev)) 961 /* RGMII */ 962 data &= ~MAC_CR_MII_EN_; 963 else 964 /* GMII */ 965 data |= MAC_CR_MII_EN_; 966 967 /* set duplex mode */ 968 if (phydev->duplex) 969 data |= MAC_CR_DPX_; 970 else 971 data &= ~MAC_CR_DPX_; 972 973 /* set bus speed */ 974 switch (phydev->speed) { 975 case SPEED_10: 976 data &= ~MAC_CR_CFG_H_; 977 data &= ~MAC_CR_CFG_L_; 978 break; 979 case SPEED_100: 980 data &= ~MAC_CR_CFG_H_; 981 data |= MAC_CR_CFG_L_; 982 break; 983 case SPEED_1000: 984 data |= MAC_CR_CFG_H_; 985 data &= ~MAC_CR_CFG_L_; 986 break; 987 } 988 lan743x_csr_write(adapter, MAC_CR, data); 989 990 memset(&ksettings, 0, sizeof(ksettings)); 991 phy_ethtool_get_link_ksettings(netdev, &ksettings); 992 local_advertisement = 993 linkmode_adv_to_mii_adv_t(phydev->advertising); 994 remote_advertisement = 995 linkmode_adv_to_mii_adv_t(phydev->lp_advertising); 996 997 lan743x_phy_update_flowcontrol(adapter, 998 ksettings.base.duplex, 999 local_advertisement, 1000 remote_advertisement); 1001 lan743x_ptp_update_latency(adapter, ksettings.base.speed); 1002 } 1003 } 1004 1005 static void lan743x_phy_close(struct lan743x_adapter *adapter) 1006 { 1007 struct net_device *netdev = adapter->netdev; 1008 1009 phy_stop(netdev->phydev); 1010 phy_disconnect(netdev->phydev); 1011 netdev->phydev = NULL; 1012 } 1013 1014 static int lan743x_phy_open(struct lan743x_adapter *adapter) 1015 { 1016 struct net_device *netdev = adapter->netdev; 1017 struct lan743x_phy *phy = &adapter->phy; 1018 struct phy_device *phydev; 1019 int ret = -EIO; 1020 1021 /* try devicetree phy, or fixed link */ 1022 phydev = of_phy_get_and_connect(netdev, adapter->pdev->dev.of_node, 1023 lan743x_phy_link_status_change); 1024 1025 if (!phydev) { 1026 /* try internal phy */ 1027 phydev = phy_find_first(adapter->mdiobus); 1028 if (!phydev) 1029 goto return_error; 1030 1031 ret = phy_connect_direct(netdev, phydev, 1032 lan743x_phy_link_status_change, 1033 PHY_INTERFACE_MODE_GMII); 1034 if (ret) 1035 goto return_error; 1036 } 1037 1038 /* MAC doesn't support 1000T Half */ 1039 phy_remove_link_mode(phydev, ETHTOOL_LINK_MODE_1000baseT_Half_BIT); 1040 1041 /* support both flow controls */ 1042 phy_support_asym_pause(phydev); 1043 phy->fc_request_control = (FLOW_CTRL_RX | FLOW_CTRL_TX); 1044 phy->fc_autoneg = phydev->autoneg; 1045 1046 phy_start(phydev); 1047 phy_start_aneg(phydev); 1048 phy_attached_info(phydev); 1049 return 0; 1050 1051 return_error: 1052 return ret; 1053 } 1054 1055 static void lan743x_rfe_open(struct lan743x_adapter *adapter) 1056 { 1057 lan743x_csr_write(adapter, RFE_RSS_CFG, 1058 RFE_RSS_CFG_UDP_IPV6_EX_ | 1059 RFE_RSS_CFG_TCP_IPV6_EX_ | 1060 RFE_RSS_CFG_IPV6_EX_ | 1061 RFE_RSS_CFG_UDP_IPV6_ | 1062 RFE_RSS_CFG_TCP_IPV6_ | 1063 RFE_RSS_CFG_IPV6_ | 1064 RFE_RSS_CFG_UDP_IPV4_ | 1065 RFE_RSS_CFG_TCP_IPV4_ | 1066 RFE_RSS_CFG_IPV4_ | 1067 RFE_RSS_CFG_VALID_HASH_BITS_ | 1068 RFE_RSS_CFG_RSS_QUEUE_ENABLE_ | 1069 RFE_RSS_CFG_RSS_HASH_STORE_ | 1070 RFE_RSS_CFG_RSS_ENABLE_); 1071 } 1072 1073 static void lan743x_rfe_update_mac_address(struct lan743x_adapter *adapter) 1074 { 1075 u8 *mac_addr; 1076 u32 mac_addr_hi = 0; 1077 u32 mac_addr_lo = 0; 1078 1079 /* Add mac address to perfect Filter */ 1080 mac_addr = adapter->mac_address; 1081 mac_addr_lo = ((((u32)(mac_addr[0])) << 0) | 1082 (((u32)(mac_addr[1])) << 8) | 1083 (((u32)(mac_addr[2])) << 16) | 1084 (((u32)(mac_addr[3])) << 24)); 1085 mac_addr_hi = ((((u32)(mac_addr[4])) << 0) | 1086 (((u32)(mac_addr[5])) << 8)); 1087 1088 lan743x_csr_write(adapter, RFE_ADDR_FILT_LO(0), mac_addr_lo); 1089 lan743x_csr_write(adapter, RFE_ADDR_FILT_HI(0), 1090 mac_addr_hi | RFE_ADDR_FILT_HI_VALID_); 1091 } 1092 1093 static void lan743x_rfe_set_multicast(struct lan743x_adapter *adapter) 1094 { 1095 struct net_device *netdev = adapter->netdev; 1096 u32 hash_table[DP_SEL_VHF_HASH_LEN]; 1097 u32 rfctl; 1098 u32 data; 1099 1100 rfctl = lan743x_csr_read(adapter, RFE_CTL); 1101 rfctl &= ~(RFE_CTL_AU_ | RFE_CTL_AM_ | 1102 RFE_CTL_DA_PERFECT_ | RFE_CTL_MCAST_HASH_); 1103 rfctl |= RFE_CTL_AB_; 1104 if (netdev->flags & IFF_PROMISC) { 1105 rfctl |= RFE_CTL_AM_ | RFE_CTL_AU_; 1106 } else { 1107 if (netdev->flags & IFF_ALLMULTI) 1108 rfctl |= RFE_CTL_AM_; 1109 } 1110 1111 memset(hash_table, 0, DP_SEL_VHF_HASH_LEN * sizeof(u32)); 1112 if (netdev_mc_count(netdev)) { 1113 struct netdev_hw_addr *ha; 1114 int i; 1115 1116 rfctl |= RFE_CTL_DA_PERFECT_; 1117 i = 1; 1118 netdev_for_each_mc_addr(ha, netdev) { 1119 /* set first 32 into Perfect Filter */ 1120 if (i < 33) { 1121 lan743x_csr_write(adapter, 1122 RFE_ADDR_FILT_HI(i), 0); 1123 data = ha->addr[3]; 1124 data = ha->addr[2] | (data << 8); 1125 data = ha->addr[1] | (data << 8); 1126 data = ha->addr[0] | (data << 8); 1127 lan743x_csr_write(adapter, 1128 RFE_ADDR_FILT_LO(i), data); 1129 data = ha->addr[5]; 1130 data = ha->addr[4] | (data << 8); 1131 data |= RFE_ADDR_FILT_HI_VALID_; 1132 lan743x_csr_write(adapter, 1133 RFE_ADDR_FILT_HI(i), data); 1134 } else { 1135 u32 bitnum = (ether_crc(ETH_ALEN, ha->addr) >> 1136 23) & 0x1FF; 1137 hash_table[bitnum / 32] |= (1 << (bitnum % 32)); 1138 rfctl |= RFE_CTL_MCAST_HASH_; 1139 } 1140 i++; 1141 } 1142 } 1143 1144 lan743x_dp_write(adapter, DP_SEL_RFE_RAM, 1145 DP_SEL_VHF_VLAN_LEN, 1146 DP_SEL_VHF_HASH_LEN, hash_table); 1147 lan743x_csr_write(adapter, RFE_CTL, rfctl); 1148 } 1149 1150 static int lan743x_dmac_init(struct lan743x_adapter *adapter) 1151 { 1152 u32 data = 0; 1153 1154 lan743x_csr_write(adapter, DMAC_CMD, DMAC_CMD_SWR_); 1155 lan743x_csr_wait_for_bit(adapter, DMAC_CMD, DMAC_CMD_SWR_, 1156 0, 1000, 20000, 100); 1157 switch (DEFAULT_DMA_DESCRIPTOR_SPACING) { 1158 case DMA_DESCRIPTOR_SPACING_16: 1159 data = DMAC_CFG_MAX_DSPACE_16_; 1160 break; 1161 case DMA_DESCRIPTOR_SPACING_32: 1162 data = DMAC_CFG_MAX_DSPACE_32_; 1163 break; 1164 case DMA_DESCRIPTOR_SPACING_64: 1165 data = DMAC_CFG_MAX_DSPACE_64_; 1166 break; 1167 case DMA_DESCRIPTOR_SPACING_128: 1168 data = DMAC_CFG_MAX_DSPACE_128_; 1169 break; 1170 default: 1171 return -EPERM; 1172 } 1173 if (!(adapter->csr.flags & LAN743X_CSR_FLAG_IS_A0)) 1174 data |= DMAC_CFG_COAL_EN_; 1175 data |= DMAC_CFG_CH_ARB_SEL_RX_HIGH_; 1176 data |= DMAC_CFG_MAX_READ_REQ_SET_(6); 1177 lan743x_csr_write(adapter, DMAC_CFG, data); 1178 data = DMAC_COAL_CFG_TIMER_LIMIT_SET_(1); 1179 data |= DMAC_COAL_CFG_TIMER_TX_START_; 1180 data |= DMAC_COAL_CFG_FLUSH_INTS_; 1181 data |= DMAC_COAL_CFG_INT_EXIT_COAL_; 1182 data |= DMAC_COAL_CFG_CSR_EXIT_COAL_; 1183 data |= DMAC_COAL_CFG_TX_THRES_SET_(0x0A); 1184 data |= DMAC_COAL_CFG_RX_THRES_SET_(0x0C); 1185 lan743x_csr_write(adapter, DMAC_COAL_CFG, data); 1186 data = DMAC_OBFF_TX_THRES_SET_(0x08); 1187 data |= DMAC_OBFF_RX_THRES_SET_(0x0A); 1188 lan743x_csr_write(adapter, DMAC_OBFF_CFG, data); 1189 return 0; 1190 } 1191 1192 static int lan743x_dmac_tx_get_state(struct lan743x_adapter *adapter, 1193 int tx_channel) 1194 { 1195 u32 dmac_cmd = 0; 1196 1197 dmac_cmd = lan743x_csr_read(adapter, DMAC_CMD); 1198 return DMAC_CHANNEL_STATE_SET((dmac_cmd & 1199 DMAC_CMD_START_T_(tx_channel)), 1200 (dmac_cmd & 1201 DMAC_CMD_STOP_T_(tx_channel))); 1202 } 1203 1204 static int lan743x_dmac_tx_wait_till_stopped(struct lan743x_adapter *adapter, 1205 int tx_channel) 1206 { 1207 int timeout = 100; 1208 int result = 0; 1209 1210 while (timeout && 1211 ((result = lan743x_dmac_tx_get_state(adapter, tx_channel)) == 1212 DMAC_CHANNEL_STATE_STOP_PENDING)) { 1213 usleep_range(1000, 20000); 1214 timeout--; 1215 } 1216 if (result == DMAC_CHANNEL_STATE_STOP_PENDING) 1217 result = -ENODEV; 1218 return result; 1219 } 1220 1221 static int lan743x_dmac_rx_get_state(struct lan743x_adapter *adapter, 1222 int rx_channel) 1223 { 1224 u32 dmac_cmd = 0; 1225 1226 dmac_cmd = lan743x_csr_read(adapter, DMAC_CMD); 1227 return DMAC_CHANNEL_STATE_SET((dmac_cmd & 1228 DMAC_CMD_START_R_(rx_channel)), 1229 (dmac_cmd & 1230 DMAC_CMD_STOP_R_(rx_channel))); 1231 } 1232 1233 static int lan743x_dmac_rx_wait_till_stopped(struct lan743x_adapter *adapter, 1234 int rx_channel) 1235 { 1236 int timeout = 100; 1237 int result = 0; 1238 1239 while (timeout && 1240 ((result = lan743x_dmac_rx_get_state(adapter, rx_channel)) == 1241 DMAC_CHANNEL_STATE_STOP_PENDING)) { 1242 usleep_range(1000, 20000); 1243 timeout--; 1244 } 1245 if (result == DMAC_CHANNEL_STATE_STOP_PENDING) 1246 result = -ENODEV; 1247 return result; 1248 } 1249 1250 static void lan743x_tx_release_desc(struct lan743x_tx *tx, 1251 int descriptor_index, bool cleanup) 1252 { 1253 struct lan743x_tx_buffer_info *buffer_info = NULL; 1254 struct lan743x_tx_descriptor *descriptor = NULL; 1255 u32 descriptor_type = 0; 1256 bool ignore_sync; 1257 1258 descriptor = &tx->ring_cpu_ptr[descriptor_index]; 1259 buffer_info = &tx->buffer_info[descriptor_index]; 1260 if (!(buffer_info->flags & TX_BUFFER_INFO_FLAG_ACTIVE)) 1261 goto done; 1262 1263 descriptor_type = (descriptor->data0) & 1264 TX_DESC_DATA0_DTYPE_MASK_; 1265 if (descriptor_type == TX_DESC_DATA0_DTYPE_DATA_) 1266 goto clean_up_data_descriptor; 1267 else 1268 goto clear_active; 1269 1270 clean_up_data_descriptor: 1271 if (buffer_info->dma_ptr) { 1272 if (buffer_info->flags & 1273 TX_BUFFER_INFO_FLAG_SKB_FRAGMENT) { 1274 dma_unmap_page(&tx->adapter->pdev->dev, 1275 buffer_info->dma_ptr, 1276 buffer_info->buffer_length, 1277 DMA_TO_DEVICE); 1278 } else { 1279 dma_unmap_single(&tx->adapter->pdev->dev, 1280 buffer_info->dma_ptr, 1281 buffer_info->buffer_length, 1282 DMA_TO_DEVICE); 1283 } 1284 buffer_info->dma_ptr = 0; 1285 buffer_info->buffer_length = 0; 1286 } 1287 if (!buffer_info->skb) 1288 goto clear_active; 1289 1290 if (!(buffer_info->flags & TX_BUFFER_INFO_FLAG_TIMESTAMP_REQUESTED)) { 1291 dev_kfree_skb_any(buffer_info->skb); 1292 goto clear_skb; 1293 } 1294 1295 if (cleanup) { 1296 lan743x_ptp_unrequest_tx_timestamp(tx->adapter); 1297 dev_kfree_skb_any(buffer_info->skb); 1298 } else { 1299 ignore_sync = (buffer_info->flags & 1300 TX_BUFFER_INFO_FLAG_IGNORE_SYNC) != 0; 1301 lan743x_ptp_tx_timestamp_skb(tx->adapter, 1302 buffer_info->skb, ignore_sync); 1303 } 1304 1305 clear_skb: 1306 buffer_info->skb = NULL; 1307 1308 clear_active: 1309 buffer_info->flags &= ~TX_BUFFER_INFO_FLAG_ACTIVE; 1310 1311 done: 1312 memset(buffer_info, 0, sizeof(*buffer_info)); 1313 memset(descriptor, 0, sizeof(*descriptor)); 1314 } 1315 1316 static int lan743x_tx_next_index(struct lan743x_tx *tx, int index) 1317 { 1318 return ((++index) % tx->ring_size); 1319 } 1320 1321 static void lan743x_tx_release_completed_descriptors(struct lan743x_tx *tx) 1322 { 1323 while ((*tx->head_cpu_ptr) != (tx->last_head)) { 1324 lan743x_tx_release_desc(tx, tx->last_head, false); 1325 tx->last_head = lan743x_tx_next_index(tx, tx->last_head); 1326 } 1327 } 1328 1329 static void lan743x_tx_release_all_descriptors(struct lan743x_tx *tx) 1330 { 1331 u32 original_head = 0; 1332 1333 original_head = tx->last_head; 1334 do { 1335 lan743x_tx_release_desc(tx, tx->last_head, true); 1336 tx->last_head = lan743x_tx_next_index(tx, tx->last_head); 1337 } while (tx->last_head != original_head); 1338 memset(tx->ring_cpu_ptr, 0, 1339 sizeof(*tx->ring_cpu_ptr) * (tx->ring_size)); 1340 memset(tx->buffer_info, 0, 1341 sizeof(*tx->buffer_info) * (tx->ring_size)); 1342 } 1343 1344 static int lan743x_tx_get_desc_cnt(struct lan743x_tx *tx, 1345 struct sk_buff *skb) 1346 { 1347 int result = 1; /* 1 for the main skb buffer */ 1348 int nr_frags = 0; 1349 1350 if (skb_is_gso(skb)) 1351 result++; /* requires an extension descriptor */ 1352 nr_frags = skb_shinfo(skb)->nr_frags; 1353 result += nr_frags; /* 1 for each fragment buffer */ 1354 return result; 1355 } 1356 1357 static int lan743x_tx_get_avail_desc(struct lan743x_tx *tx) 1358 { 1359 int last_head = tx->last_head; 1360 int last_tail = tx->last_tail; 1361 1362 if (last_tail >= last_head) 1363 return tx->ring_size - last_tail + last_head - 1; 1364 else 1365 return last_head - last_tail - 1; 1366 } 1367 1368 void lan743x_tx_set_timestamping_mode(struct lan743x_tx *tx, 1369 bool enable_timestamping, 1370 bool enable_onestep_sync) 1371 { 1372 if (enable_timestamping) 1373 tx->ts_flags |= TX_TS_FLAG_TIMESTAMPING_ENABLED; 1374 else 1375 tx->ts_flags &= ~TX_TS_FLAG_TIMESTAMPING_ENABLED; 1376 if (enable_onestep_sync) 1377 tx->ts_flags |= TX_TS_FLAG_ONE_STEP_SYNC; 1378 else 1379 tx->ts_flags &= ~TX_TS_FLAG_ONE_STEP_SYNC; 1380 } 1381 1382 static int lan743x_tx_frame_start(struct lan743x_tx *tx, 1383 unsigned char *first_buffer, 1384 unsigned int first_buffer_length, 1385 unsigned int frame_length, 1386 bool time_stamp, 1387 bool check_sum) 1388 { 1389 /* called only from within lan743x_tx_xmit_frame. 1390 * assuming tx->ring_lock has already been acquired. 1391 */ 1392 struct lan743x_tx_descriptor *tx_descriptor = NULL; 1393 struct lan743x_tx_buffer_info *buffer_info = NULL; 1394 struct lan743x_adapter *adapter = tx->adapter; 1395 struct device *dev = &adapter->pdev->dev; 1396 dma_addr_t dma_ptr; 1397 1398 tx->frame_flags |= TX_FRAME_FLAG_IN_PROGRESS; 1399 tx->frame_first = tx->last_tail; 1400 tx->frame_tail = tx->frame_first; 1401 1402 tx_descriptor = &tx->ring_cpu_ptr[tx->frame_tail]; 1403 buffer_info = &tx->buffer_info[tx->frame_tail]; 1404 dma_ptr = dma_map_single(dev, first_buffer, first_buffer_length, 1405 DMA_TO_DEVICE); 1406 if (dma_mapping_error(dev, dma_ptr)) 1407 return -ENOMEM; 1408 1409 tx_descriptor->data1 = DMA_ADDR_LOW32(dma_ptr); 1410 tx_descriptor->data2 = DMA_ADDR_HIGH32(dma_ptr); 1411 tx_descriptor->data3 = (frame_length << 16) & 1412 TX_DESC_DATA3_FRAME_LENGTH_MSS_MASK_; 1413 1414 buffer_info->skb = NULL; 1415 buffer_info->dma_ptr = dma_ptr; 1416 buffer_info->buffer_length = first_buffer_length; 1417 buffer_info->flags |= TX_BUFFER_INFO_FLAG_ACTIVE; 1418 1419 tx->frame_data0 = (first_buffer_length & 1420 TX_DESC_DATA0_BUF_LENGTH_MASK_) | 1421 TX_DESC_DATA0_DTYPE_DATA_ | 1422 TX_DESC_DATA0_FS_ | 1423 TX_DESC_DATA0_FCS_; 1424 if (time_stamp) 1425 tx->frame_data0 |= TX_DESC_DATA0_TSE_; 1426 1427 if (check_sum) 1428 tx->frame_data0 |= TX_DESC_DATA0_ICE_ | 1429 TX_DESC_DATA0_IPE_ | 1430 TX_DESC_DATA0_TPE_; 1431 1432 /* data0 will be programmed in one of other frame assembler functions */ 1433 return 0; 1434 } 1435 1436 static void lan743x_tx_frame_add_lso(struct lan743x_tx *tx, 1437 unsigned int frame_length, 1438 int nr_frags) 1439 { 1440 /* called only from within lan743x_tx_xmit_frame. 1441 * assuming tx->ring_lock has already been acquired. 1442 */ 1443 struct lan743x_tx_descriptor *tx_descriptor = NULL; 1444 struct lan743x_tx_buffer_info *buffer_info = NULL; 1445 1446 /* wrap up previous descriptor */ 1447 tx->frame_data0 |= TX_DESC_DATA0_EXT_; 1448 if (nr_frags <= 0) { 1449 tx->frame_data0 |= TX_DESC_DATA0_LS_; 1450 tx->frame_data0 |= TX_DESC_DATA0_IOC_; 1451 } 1452 tx_descriptor = &tx->ring_cpu_ptr[tx->frame_tail]; 1453 tx_descriptor->data0 = tx->frame_data0; 1454 1455 /* move to next descriptor */ 1456 tx->frame_tail = lan743x_tx_next_index(tx, tx->frame_tail); 1457 tx_descriptor = &tx->ring_cpu_ptr[tx->frame_tail]; 1458 buffer_info = &tx->buffer_info[tx->frame_tail]; 1459 1460 /* add extension descriptor */ 1461 tx_descriptor->data1 = 0; 1462 tx_descriptor->data2 = 0; 1463 tx_descriptor->data3 = 0; 1464 1465 buffer_info->skb = NULL; 1466 buffer_info->dma_ptr = 0; 1467 buffer_info->buffer_length = 0; 1468 buffer_info->flags |= TX_BUFFER_INFO_FLAG_ACTIVE; 1469 1470 tx->frame_data0 = (frame_length & TX_DESC_DATA0_EXT_PAY_LENGTH_MASK_) | 1471 TX_DESC_DATA0_DTYPE_EXT_ | 1472 TX_DESC_DATA0_EXT_LSO_; 1473 1474 /* data0 will be programmed in one of other frame assembler functions */ 1475 } 1476 1477 static int lan743x_tx_frame_add_fragment(struct lan743x_tx *tx, 1478 const skb_frag_t *fragment, 1479 unsigned int frame_length) 1480 { 1481 /* called only from within lan743x_tx_xmit_frame 1482 * assuming tx->ring_lock has already been acquired 1483 */ 1484 struct lan743x_tx_descriptor *tx_descriptor = NULL; 1485 struct lan743x_tx_buffer_info *buffer_info = NULL; 1486 struct lan743x_adapter *adapter = tx->adapter; 1487 struct device *dev = &adapter->pdev->dev; 1488 unsigned int fragment_length = 0; 1489 dma_addr_t dma_ptr; 1490 1491 fragment_length = skb_frag_size(fragment); 1492 if (!fragment_length) 1493 return 0; 1494 1495 /* wrap up previous descriptor */ 1496 tx_descriptor = &tx->ring_cpu_ptr[tx->frame_tail]; 1497 tx_descriptor->data0 = tx->frame_data0; 1498 1499 /* move to next descriptor */ 1500 tx->frame_tail = lan743x_tx_next_index(tx, tx->frame_tail); 1501 tx_descriptor = &tx->ring_cpu_ptr[tx->frame_tail]; 1502 buffer_info = &tx->buffer_info[tx->frame_tail]; 1503 dma_ptr = skb_frag_dma_map(dev, fragment, 1504 0, fragment_length, 1505 DMA_TO_DEVICE); 1506 if (dma_mapping_error(dev, dma_ptr)) { 1507 int desc_index; 1508 1509 /* cleanup all previously setup descriptors */ 1510 desc_index = tx->frame_first; 1511 while (desc_index != tx->frame_tail) { 1512 lan743x_tx_release_desc(tx, desc_index, true); 1513 desc_index = lan743x_tx_next_index(tx, desc_index); 1514 } 1515 dma_wmb(); 1516 tx->frame_flags &= ~TX_FRAME_FLAG_IN_PROGRESS; 1517 tx->frame_first = 0; 1518 tx->frame_data0 = 0; 1519 tx->frame_tail = 0; 1520 return -ENOMEM; 1521 } 1522 1523 tx_descriptor->data1 = DMA_ADDR_LOW32(dma_ptr); 1524 tx_descriptor->data2 = DMA_ADDR_HIGH32(dma_ptr); 1525 tx_descriptor->data3 = (frame_length << 16) & 1526 TX_DESC_DATA3_FRAME_LENGTH_MSS_MASK_; 1527 1528 buffer_info->skb = NULL; 1529 buffer_info->dma_ptr = dma_ptr; 1530 buffer_info->buffer_length = fragment_length; 1531 buffer_info->flags |= TX_BUFFER_INFO_FLAG_ACTIVE; 1532 buffer_info->flags |= TX_BUFFER_INFO_FLAG_SKB_FRAGMENT; 1533 1534 tx->frame_data0 = (fragment_length & TX_DESC_DATA0_BUF_LENGTH_MASK_) | 1535 TX_DESC_DATA0_DTYPE_DATA_ | 1536 TX_DESC_DATA0_FCS_; 1537 1538 /* data0 will be programmed in one of other frame assembler functions */ 1539 return 0; 1540 } 1541 1542 static void lan743x_tx_frame_end(struct lan743x_tx *tx, 1543 struct sk_buff *skb, 1544 bool time_stamp, 1545 bool ignore_sync) 1546 { 1547 /* called only from within lan743x_tx_xmit_frame 1548 * assuming tx->ring_lock has already been acquired 1549 */ 1550 struct lan743x_tx_descriptor *tx_descriptor = NULL; 1551 struct lan743x_tx_buffer_info *buffer_info = NULL; 1552 struct lan743x_adapter *adapter = tx->adapter; 1553 u32 tx_tail_flags = 0; 1554 1555 /* wrap up previous descriptor */ 1556 if ((tx->frame_data0 & TX_DESC_DATA0_DTYPE_MASK_) == 1557 TX_DESC_DATA0_DTYPE_DATA_) { 1558 tx->frame_data0 |= TX_DESC_DATA0_LS_; 1559 tx->frame_data0 |= TX_DESC_DATA0_IOC_; 1560 } 1561 1562 tx_descriptor = &tx->ring_cpu_ptr[tx->frame_tail]; 1563 buffer_info = &tx->buffer_info[tx->frame_tail]; 1564 buffer_info->skb = skb; 1565 if (time_stamp) 1566 buffer_info->flags |= TX_BUFFER_INFO_FLAG_TIMESTAMP_REQUESTED; 1567 if (ignore_sync) 1568 buffer_info->flags |= TX_BUFFER_INFO_FLAG_IGNORE_SYNC; 1569 1570 tx_descriptor->data0 = tx->frame_data0; 1571 tx->frame_tail = lan743x_tx_next_index(tx, tx->frame_tail); 1572 tx->last_tail = tx->frame_tail; 1573 1574 dma_wmb(); 1575 1576 if (tx->vector_flags & LAN743X_VECTOR_FLAG_VECTOR_ENABLE_AUTO_SET) 1577 tx_tail_flags |= TX_TAIL_SET_TOP_INT_VEC_EN_; 1578 if (tx->vector_flags & LAN743X_VECTOR_FLAG_SOURCE_ENABLE_AUTO_SET) 1579 tx_tail_flags |= TX_TAIL_SET_DMAC_INT_EN_ | 1580 TX_TAIL_SET_TOP_INT_EN_; 1581 1582 lan743x_csr_write(adapter, TX_TAIL(tx->channel_number), 1583 tx_tail_flags | tx->frame_tail); 1584 tx->frame_flags &= ~TX_FRAME_FLAG_IN_PROGRESS; 1585 } 1586 1587 static netdev_tx_t lan743x_tx_xmit_frame(struct lan743x_tx *tx, 1588 struct sk_buff *skb) 1589 { 1590 int required_number_of_descriptors = 0; 1591 unsigned int start_frame_length = 0; 1592 unsigned int frame_length = 0; 1593 unsigned int head_length = 0; 1594 unsigned long irq_flags = 0; 1595 bool do_timestamp = false; 1596 bool ignore_sync = false; 1597 int nr_frags = 0; 1598 bool gso = false; 1599 int j; 1600 1601 required_number_of_descriptors = lan743x_tx_get_desc_cnt(tx, skb); 1602 1603 spin_lock_irqsave(&tx->ring_lock, irq_flags); 1604 if (required_number_of_descriptors > 1605 lan743x_tx_get_avail_desc(tx)) { 1606 if (required_number_of_descriptors > (tx->ring_size - 1)) { 1607 dev_kfree_skb_irq(skb); 1608 } else { 1609 /* save to overflow buffer */ 1610 tx->overflow_skb = skb; 1611 netif_stop_queue(tx->adapter->netdev); 1612 } 1613 goto unlock; 1614 } 1615 1616 /* space available, transmit skb */ 1617 if ((skb_shinfo(skb)->tx_flags & SKBTX_HW_TSTAMP) && 1618 (tx->ts_flags & TX_TS_FLAG_TIMESTAMPING_ENABLED) && 1619 (lan743x_ptp_request_tx_timestamp(tx->adapter))) { 1620 skb_shinfo(skb)->tx_flags |= SKBTX_IN_PROGRESS; 1621 do_timestamp = true; 1622 if (tx->ts_flags & TX_TS_FLAG_ONE_STEP_SYNC) 1623 ignore_sync = true; 1624 } 1625 head_length = skb_headlen(skb); 1626 frame_length = skb_pagelen(skb); 1627 nr_frags = skb_shinfo(skb)->nr_frags; 1628 start_frame_length = frame_length; 1629 gso = skb_is_gso(skb); 1630 if (gso) { 1631 start_frame_length = max(skb_shinfo(skb)->gso_size, 1632 (unsigned short)8); 1633 } 1634 1635 if (lan743x_tx_frame_start(tx, 1636 skb->data, head_length, 1637 start_frame_length, 1638 do_timestamp, 1639 skb->ip_summed == CHECKSUM_PARTIAL)) { 1640 dev_kfree_skb_irq(skb); 1641 goto unlock; 1642 } 1643 1644 if (gso) 1645 lan743x_tx_frame_add_lso(tx, frame_length, nr_frags); 1646 1647 if (nr_frags <= 0) 1648 goto finish; 1649 1650 for (j = 0; j < nr_frags; j++) { 1651 const skb_frag_t *frag = &(skb_shinfo(skb)->frags[j]); 1652 1653 if (lan743x_tx_frame_add_fragment(tx, frag, frame_length)) { 1654 /* upon error no need to call 1655 * lan743x_tx_frame_end 1656 * frame assembler clean up was performed inside 1657 * lan743x_tx_frame_add_fragment 1658 */ 1659 dev_kfree_skb_irq(skb); 1660 goto unlock; 1661 } 1662 } 1663 1664 finish: 1665 lan743x_tx_frame_end(tx, skb, do_timestamp, ignore_sync); 1666 1667 unlock: 1668 spin_unlock_irqrestore(&tx->ring_lock, irq_flags); 1669 return NETDEV_TX_OK; 1670 } 1671 1672 static int lan743x_tx_napi_poll(struct napi_struct *napi, int weight) 1673 { 1674 struct lan743x_tx *tx = container_of(napi, struct lan743x_tx, napi); 1675 struct lan743x_adapter *adapter = tx->adapter; 1676 bool start_transmitter = false; 1677 unsigned long irq_flags = 0; 1678 u32 ioc_bit = 0; 1679 1680 ioc_bit = DMAC_INT_BIT_TX_IOC_(tx->channel_number); 1681 lan743x_csr_read(adapter, DMAC_INT_STS); 1682 if (tx->vector_flags & LAN743X_VECTOR_FLAG_SOURCE_STATUS_W2C) 1683 lan743x_csr_write(adapter, DMAC_INT_STS, ioc_bit); 1684 spin_lock_irqsave(&tx->ring_lock, irq_flags); 1685 1686 /* clean up tx ring */ 1687 lan743x_tx_release_completed_descriptors(tx); 1688 if (netif_queue_stopped(adapter->netdev)) { 1689 if (tx->overflow_skb) { 1690 if (lan743x_tx_get_desc_cnt(tx, tx->overflow_skb) <= 1691 lan743x_tx_get_avail_desc(tx)) 1692 start_transmitter = true; 1693 } else { 1694 netif_wake_queue(adapter->netdev); 1695 } 1696 } 1697 spin_unlock_irqrestore(&tx->ring_lock, irq_flags); 1698 1699 if (start_transmitter) { 1700 /* space is now available, transmit overflow skb */ 1701 lan743x_tx_xmit_frame(tx, tx->overflow_skb); 1702 tx->overflow_skb = NULL; 1703 netif_wake_queue(adapter->netdev); 1704 } 1705 1706 if (!napi_complete(napi)) 1707 goto done; 1708 1709 /* enable isr */ 1710 lan743x_csr_write(adapter, INT_EN_SET, 1711 INT_BIT_DMA_TX_(tx->channel_number)); 1712 lan743x_csr_read(adapter, INT_STS); 1713 1714 done: 1715 return 0; 1716 } 1717 1718 static void lan743x_tx_ring_cleanup(struct lan743x_tx *tx) 1719 { 1720 if (tx->head_cpu_ptr) { 1721 dma_free_coherent(&tx->adapter->pdev->dev, 1722 sizeof(*tx->head_cpu_ptr), tx->head_cpu_ptr, 1723 tx->head_dma_ptr); 1724 tx->head_cpu_ptr = NULL; 1725 tx->head_dma_ptr = 0; 1726 } 1727 kfree(tx->buffer_info); 1728 tx->buffer_info = NULL; 1729 1730 if (tx->ring_cpu_ptr) { 1731 dma_free_coherent(&tx->adapter->pdev->dev, 1732 tx->ring_allocation_size, tx->ring_cpu_ptr, 1733 tx->ring_dma_ptr); 1734 tx->ring_allocation_size = 0; 1735 tx->ring_cpu_ptr = NULL; 1736 tx->ring_dma_ptr = 0; 1737 } 1738 tx->ring_size = 0; 1739 } 1740 1741 static int lan743x_tx_ring_init(struct lan743x_tx *tx) 1742 { 1743 size_t ring_allocation_size = 0; 1744 void *cpu_ptr = NULL; 1745 dma_addr_t dma_ptr; 1746 int ret = -ENOMEM; 1747 1748 tx->ring_size = LAN743X_TX_RING_SIZE; 1749 if (tx->ring_size & ~TX_CFG_B_TX_RING_LEN_MASK_) { 1750 ret = -EINVAL; 1751 goto cleanup; 1752 } 1753 ring_allocation_size = ALIGN(tx->ring_size * 1754 sizeof(struct lan743x_tx_descriptor), 1755 PAGE_SIZE); 1756 dma_ptr = 0; 1757 cpu_ptr = dma_alloc_coherent(&tx->adapter->pdev->dev, 1758 ring_allocation_size, &dma_ptr, GFP_KERNEL); 1759 if (!cpu_ptr) { 1760 ret = -ENOMEM; 1761 goto cleanup; 1762 } 1763 1764 tx->ring_allocation_size = ring_allocation_size; 1765 tx->ring_cpu_ptr = (struct lan743x_tx_descriptor *)cpu_ptr; 1766 tx->ring_dma_ptr = dma_ptr; 1767 1768 cpu_ptr = kcalloc(tx->ring_size, sizeof(*tx->buffer_info), GFP_KERNEL); 1769 if (!cpu_ptr) { 1770 ret = -ENOMEM; 1771 goto cleanup; 1772 } 1773 tx->buffer_info = (struct lan743x_tx_buffer_info *)cpu_ptr; 1774 dma_ptr = 0; 1775 cpu_ptr = dma_alloc_coherent(&tx->adapter->pdev->dev, 1776 sizeof(*tx->head_cpu_ptr), &dma_ptr, 1777 GFP_KERNEL); 1778 if (!cpu_ptr) { 1779 ret = -ENOMEM; 1780 goto cleanup; 1781 } 1782 1783 tx->head_cpu_ptr = cpu_ptr; 1784 tx->head_dma_ptr = dma_ptr; 1785 if (tx->head_dma_ptr & 0x3) { 1786 ret = -ENOMEM; 1787 goto cleanup; 1788 } 1789 1790 return 0; 1791 1792 cleanup: 1793 lan743x_tx_ring_cleanup(tx); 1794 return ret; 1795 } 1796 1797 static void lan743x_tx_close(struct lan743x_tx *tx) 1798 { 1799 struct lan743x_adapter *adapter = tx->adapter; 1800 1801 lan743x_csr_write(adapter, 1802 DMAC_CMD, 1803 DMAC_CMD_STOP_T_(tx->channel_number)); 1804 lan743x_dmac_tx_wait_till_stopped(adapter, tx->channel_number); 1805 1806 lan743x_csr_write(adapter, 1807 DMAC_INT_EN_CLR, 1808 DMAC_INT_BIT_TX_IOC_(tx->channel_number)); 1809 lan743x_csr_write(adapter, INT_EN_CLR, 1810 INT_BIT_DMA_TX_(tx->channel_number)); 1811 napi_disable(&tx->napi); 1812 netif_napi_del(&tx->napi); 1813 1814 lan743x_csr_write(adapter, FCT_TX_CTL, 1815 FCT_TX_CTL_DIS_(tx->channel_number)); 1816 lan743x_csr_wait_for_bit(adapter, FCT_TX_CTL, 1817 FCT_TX_CTL_EN_(tx->channel_number), 1818 0, 1000, 20000, 100); 1819 1820 lan743x_tx_release_all_descriptors(tx); 1821 1822 if (tx->overflow_skb) { 1823 dev_kfree_skb(tx->overflow_skb); 1824 tx->overflow_skb = NULL; 1825 } 1826 1827 lan743x_tx_ring_cleanup(tx); 1828 } 1829 1830 static int lan743x_tx_open(struct lan743x_tx *tx) 1831 { 1832 struct lan743x_adapter *adapter = NULL; 1833 u32 data = 0; 1834 int ret; 1835 1836 adapter = tx->adapter; 1837 ret = lan743x_tx_ring_init(tx); 1838 if (ret) 1839 return ret; 1840 1841 /* initialize fifo */ 1842 lan743x_csr_write(adapter, FCT_TX_CTL, 1843 FCT_TX_CTL_RESET_(tx->channel_number)); 1844 lan743x_csr_wait_for_bit(adapter, FCT_TX_CTL, 1845 FCT_TX_CTL_RESET_(tx->channel_number), 1846 0, 1000, 20000, 100); 1847 1848 /* enable fifo */ 1849 lan743x_csr_write(adapter, FCT_TX_CTL, 1850 FCT_TX_CTL_EN_(tx->channel_number)); 1851 1852 /* reset tx channel */ 1853 lan743x_csr_write(adapter, DMAC_CMD, 1854 DMAC_CMD_TX_SWR_(tx->channel_number)); 1855 lan743x_csr_wait_for_bit(adapter, DMAC_CMD, 1856 DMAC_CMD_TX_SWR_(tx->channel_number), 1857 0, 1000, 20000, 100); 1858 1859 /* Write TX_BASE_ADDR */ 1860 lan743x_csr_write(adapter, 1861 TX_BASE_ADDRH(tx->channel_number), 1862 DMA_ADDR_HIGH32(tx->ring_dma_ptr)); 1863 lan743x_csr_write(adapter, 1864 TX_BASE_ADDRL(tx->channel_number), 1865 DMA_ADDR_LOW32(tx->ring_dma_ptr)); 1866 1867 /* Write TX_CFG_B */ 1868 data = lan743x_csr_read(adapter, TX_CFG_B(tx->channel_number)); 1869 data &= ~TX_CFG_B_TX_RING_LEN_MASK_; 1870 data |= ((tx->ring_size) & TX_CFG_B_TX_RING_LEN_MASK_); 1871 if (!(adapter->csr.flags & LAN743X_CSR_FLAG_IS_A0)) 1872 data |= TX_CFG_B_TDMABL_512_; 1873 lan743x_csr_write(adapter, TX_CFG_B(tx->channel_number), data); 1874 1875 /* Write TX_CFG_A */ 1876 data = TX_CFG_A_TX_TMR_HPWB_SEL_IOC_ | TX_CFG_A_TX_HP_WB_EN_; 1877 if (!(adapter->csr.flags & LAN743X_CSR_FLAG_IS_A0)) { 1878 data |= TX_CFG_A_TX_HP_WB_ON_INT_TMR_; 1879 data |= TX_CFG_A_TX_PF_THRES_SET_(0x10); 1880 data |= TX_CFG_A_TX_PF_PRI_THRES_SET_(0x04); 1881 data |= TX_CFG_A_TX_HP_WB_THRES_SET_(0x07); 1882 } 1883 lan743x_csr_write(adapter, TX_CFG_A(tx->channel_number), data); 1884 1885 /* Write TX_HEAD_WRITEBACK_ADDR */ 1886 lan743x_csr_write(adapter, 1887 TX_HEAD_WRITEBACK_ADDRH(tx->channel_number), 1888 DMA_ADDR_HIGH32(tx->head_dma_ptr)); 1889 lan743x_csr_write(adapter, 1890 TX_HEAD_WRITEBACK_ADDRL(tx->channel_number), 1891 DMA_ADDR_LOW32(tx->head_dma_ptr)); 1892 1893 /* set last head */ 1894 tx->last_head = lan743x_csr_read(adapter, TX_HEAD(tx->channel_number)); 1895 1896 /* write TX_TAIL */ 1897 tx->last_tail = 0; 1898 lan743x_csr_write(adapter, TX_TAIL(tx->channel_number), 1899 (u32)(tx->last_tail)); 1900 tx->vector_flags = lan743x_intr_get_vector_flags(adapter, 1901 INT_BIT_DMA_TX_ 1902 (tx->channel_number)); 1903 netif_tx_napi_add(adapter->netdev, 1904 &tx->napi, lan743x_tx_napi_poll, 1905 tx->ring_size - 1); 1906 napi_enable(&tx->napi); 1907 1908 data = 0; 1909 if (tx->vector_flags & LAN743X_VECTOR_FLAG_SOURCE_ENABLE_AUTO_CLEAR) 1910 data |= TX_CFG_C_TX_TOP_INT_EN_AUTO_CLR_; 1911 if (tx->vector_flags & LAN743X_VECTOR_FLAG_SOURCE_STATUS_AUTO_CLEAR) 1912 data |= TX_CFG_C_TX_DMA_INT_STS_AUTO_CLR_; 1913 if (tx->vector_flags & LAN743X_VECTOR_FLAG_SOURCE_STATUS_R2C) 1914 data |= TX_CFG_C_TX_INT_STS_R2C_MODE_MASK_; 1915 if (tx->vector_flags & LAN743X_VECTOR_FLAG_SOURCE_ENABLE_R2C) 1916 data |= TX_CFG_C_TX_INT_EN_R2C_; 1917 lan743x_csr_write(adapter, TX_CFG_C(tx->channel_number), data); 1918 1919 if (!(tx->vector_flags & LAN743X_VECTOR_FLAG_SOURCE_ENABLE_AUTO_SET)) 1920 lan743x_csr_write(adapter, INT_EN_SET, 1921 INT_BIT_DMA_TX_(tx->channel_number)); 1922 lan743x_csr_write(adapter, DMAC_INT_EN_SET, 1923 DMAC_INT_BIT_TX_IOC_(tx->channel_number)); 1924 1925 /* start dmac channel */ 1926 lan743x_csr_write(adapter, DMAC_CMD, 1927 DMAC_CMD_START_T_(tx->channel_number)); 1928 return 0; 1929 } 1930 1931 static int lan743x_rx_next_index(struct lan743x_rx *rx, int index) 1932 { 1933 return ((++index) % rx->ring_size); 1934 } 1935 1936 static struct sk_buff *lan743x_rx_allocate_skb(struct lan743x_rx *rx) 1937 { 1938 int length = 0; 1939 1940 length = (LAN743X_MAX_FRAME_SIZE + ETH_HLEN + 4 + RX_HEAD_PADDING); 1941 return __netdev_alloc_skb(rx->adapter->netdev, 1942 length, GFP_ATOMIC | GFP_DMA); 1943 } 1944 1945 static int lan743x_rx_init_ring_element(struct lan743x_rx *rx, int index, 1946 struct sk_buff *skb) 1947 { 1948 struct lan743x_rx_buffer_info *buffer_info; 1949 struct lan743x_rx_descriptor *descriptor; 1950 int length = 0; 1951 1952 length = (LAN743X_MAX_FRAME_SIZE + ETH_HLEN + 4 + RX_HEAD_PADDING); 1953 descriptor = &rx->ring_cpu_ptr[index]; 1954 buffer_info = &rx->buffer_info[index]; 1955 buffer_info->skb = skb; 1956 if (!(buffer_info->skb)) 1957 return -ENOMEM; 1958 buffer_info->dma_ptr = dma_map_single(&rx->adapter->pdev->dev, 1959 buffer_info->skb->data, 1960 length, 1961 DMA_FROM_DEVICE); 1962 if (dma_mapping_error(&rx->adapter->pdev->dev, 1963 buffer_info->dma_ptr)) { 1964 buffer_info->dma_ptr = 0; 1965 return -ENOMEM; 1966 } 1967 1968 buffer_info->buffer_length = length; 1969 descriptor->data1 = DMA_ADDR_LOW32(buffer_info->dma_ptr); 1970 descriptor->data2 = DMA_ADDR_HIGH32(buffer_info->dma_ptr); 1971 descriptor->data3 = 0; 1972 descriptor->data0 = (RX_DESC_DATA0_OWN_ | 1973 (length & RX_DESC_DATA0_BUF_LENGTH_MASK_)); 1974 skb_reserve(buffer_info->skb, RX_HEAD_PADDING); 1975 1976 return 0; 1977 } 1978 1979 static void lan743x_rx_reuse_ring_element(struct lan743x_rx *rx, int index) 1980 { 1981 struct lan743x_rx_buffer_info *buffer_info; 1982 struct lan743x_rx_descriptor *descriptor; 1983 1984 descriptor = &rx->ring_cpu_ptr[index]; 1985 buffer_info = &rx->buffer_info[index]; 1986 1987 descriptor->data1 = DMA_ADDR_LOW32(buffer_info->dma_ptr); 1988 descriptor->data2 = DMA_ADDR_HIGH32(buffer_info->dma_ptr); 1989 descriptor->data3 = 0; 1990 descriptor->data0 = (RX_DESC_DATA0_OWN_ | 1991 ((buffer_info->buffer_length) & 1992 RX_DESC_DATA0_BUF_LENGTH_MASK_)); 1993 } 1994 1995 static void lan743x_rx_release_ring_element(struct lan743x_rx *rx, int index) 1996 { 1997 struct lan743x_rx_buffer_info *buffer_info; 1998 struct lan743x_rx_descriptor *descriptor; 1999 2000 descriptor = &rx->ring_cpu_ptr[index]; 2001 buffer_info = &rx->buffer_info[index]; 2002 2003 memset(descriptor, 0, sizeof(*descriptor)); 2004 2005 if (buffer_info->dma_ptr) { 2006 dma_unmap_single(&rx->adapter->pdev->dev, 2007 buffer_info->dma_ptr, 2008 buffer_info->buffer_length, 2009 DMA_FROM_DEVICE); 2010 buffer_info->dma_ptr = 0; 2011 } 2012 2013 if (buffer_info->skb) { 2014 dev_kfree_skb(buffer_info->skb); 2015 buffer_info->skb = NULL; 2016 } 2017 2018 memset(buffer_info, 0, sizeof(*buffer_info)); 2019 } 2020 2021 static int lan743x_rx_process_packet(struct lan743x_rx *rx) 2022 { 2023 struct skb_shared_hwtstamps *hwtstamps = NULL; 2024 int result = RX_PROCESS_RESULT_NOTHING_TO_DO; 2025 int current_head_index = *rx->head_cpu_ptr; 2026 struct lan743x_rx_buffer_info *buffer_info; 2027 struct lan743x_rx_descriptor *descriptor; 2028 int extension_index = -1; 2029 int first_index = -1; 2030 int last_index = -1; 2031 2032 if (current_head_index < 0 || current_head_index >= rx->ring_size) 2033 goto done; 2034 2035 if (rx->last_head < 0 || rx->last_head >= rx->ring_size) 2036 goto done; 2037 2038 if (rx->last_head != current_head_index) { 2039 descriptor = &rx->ring_cpu_ptr[rx->last_head]; 2040 if (descriptor->data0 & RX_DESC_DATA0_OWN_) 2041 goto done; 2042 2043 if (!(descriptor->data0 & RX_DESC_DATA0_FS_)) 2044 goto done; 2045 2046 first_index = rx->last_head; 2047 if (descriptor->data0 & RX_DESC_DATA0_LS_) { 2048 last_index = rx->last_head; 2049 } else { 2050 int index; 2051 2052 index = lan743x_rx_next_index(rx, first_index); 2053 while (index != current_head_index) { 2054 descriptor = &rx->ring_cpu_ptr[index]; 2055 if (descriptor->data0 & RX_DESC_DATA0_OWN_) 2056 goto done; 2057 2058 if (descriptor->data0 & RX_DESC_DATA0_LS_) { 2059 last_index = index; 2060 break; 2061 } 2062 index = lan743x_rx_next_index(rx, index); 2063 } 2064 } 2065 if (last_index >= 0) { 2066 descriptor = &rx->ring_cpu_ptr[last_index]; 2067 if (descriptor->data0 & RX_DESC_DATA0_EXT_) { 2068 /* extension is expected to follow */ 2069 int index = lan743x_rx_next_index(rx, 2070 last_index); 2071 if (index != current_head_index) { 2072 descriptor = &rx->ring_cpu_ptr[index]; 2073 if (descriptor->data0 & 2074 RX_DESC_DATA0_OWN_) { 2075 goto done; 2076 } 2077 if (descriptor->data0 & 2078 RX_DESC_DATA0_EXT_) { 2079 extension_index = index; 2080 } else { 2081 goto done; 2082 } 2083 } else { 2084 /* extension is not yet available */ 2085 /* prevent processing of this packet */ 2086 first_index = -1; 2087 last_index = -1; 2088 } 2089 } 2090 } 2091 } 2092 if (first_index >= 0 && last_index >= 0) { 2093 int real_last_index = last_index; 2094 struct sk_buff *skb = NULL; 2095 u32 ts_sec = 0; 2096 u32 ts_nsec = 0; 2097 2098 /* packet is available */ 2099 if (first_index == last_index) { 2100 /* single buffer packet */ 2101 struct sk_buff *new_skb = NULL; 2102 int packet_length; 2103 2104 new_skb = lan743x_rx_allocate_skb(rx); 2105 if (!new_skb) { 2106 /* failed to allocate next skb. 2107 * Memory is very low. 2108 * Drop this packet and reuse buffer. 2109 */ 2110 lan743x_rx_reuse_ring_element(rx, first_index); 2111 goto process_extension; 2112 } 2113 2114 buffer_info = &rx->buffer_info[first_index]; 2115 skb = buffer_info->skb; 2116 descriptor = &rx->ring_cpu_ptr[first_index]; 2117 2118 /* unmap from dma */ 2119 if (buffer_info->dma_ptr) { 2120 dma_unmap_single(&rx->adapter->pdev->dev, 2121 buffer_info->dma_ptr, 2122 buffer_info->buffer_length, 2123 DMA_FROM_DEVICE); 2124 buffer_info->dma_ptr = 0; 2125 buffer_info->buffer_length = 0; 2126 } 2127 buffer_info->skb = NULL; 2128 packet_length = RX_DESC_DATA0_FRAME_LENGTH_GET_ 2129 (descriptor->data0); 2130 skb_put(skb, packet_length - 4); 2131 skb->protocol = eth_type_trans(skb, 2132 rx->adapter->netdev); 2133 lan743x_rx_init_ring_element(rx, first_index, new_skb); 2134 } else { 2135 int index = first_index; 2136 2137 /* multi buffer packet not supported */ 2138 /* this should not happen since 2139 * buffers are allocated to be at least jumbo size 2140 */ 2141 2142 /* clean up buffers */ 2143 if (first_index <= last_index) { 2144 while ((index >= first_index) && 2145 (index <= last_index)) { 2146 lan743x_rx_reuse_ring_element(rx, 2147 index); 2148 index = lan743x_rx_next_index(rx, 2149 index); 2150 } 2151 } else { 2152 while ((index >= first_index) || 2153 (index <= last_index)) { 2154 lan743x_rx_reuse_ring_element(rx, 2155 index); 2156 index = lan743x_rx_next_index(rx, 2157 index); 2158 } 2159 } 2160 } 2161 2162 process_extension: 2163 if (extension_index >= 0) { 2164 descriptor = &rx->ring_cpu_ptr[extension_index]; 2165 buffer_info = &rx->buffer_info[extension_index]; 2166 2167 ts_sec = descriptor->data1; 2168 ts_nsec = (descriptor->data2 & 2169 RX_DESC_DATA2_TS_NS_MASK_); 2170 lan743x_rx_reuse_ring_element(rx, extension_index); 2171 real_last_index = extension_index; 2172 } 2173 2174 if (!skb) { 2175 result = RX_PROCESS_RESULT_PACKET_DROPPED; 2176 goto move_forward; 2177 } 2178 2179 if (extension_index < 0) 2180 goto pass_packet_to_os; 2181 hwtstamps = skb_hwtstamps(skb); 2182 if (hwtstamps) 2183 hwtstamps->hwtstamp = ktime_set(ts_sec, ts_nsec); 2184 2185 pass_packet_to_os: 2186 /* pass packet to OS */ 2187 napi_gro_receive(&rx->napi, skb); 2188 result = RX_PROCESS_RESULT_PACKET_RECEIVED; 2189 2190 move_forward: 2191 /* push tail and head forward */ 2192 rx->last_tail = real_last_index; 2193 rx->last_head = lan743x_rx_next_index(rx, real_last_index); 2194 } 2195 done: 2196 return result; 2197 } 2198 2199 static int lan743x_rx_napi_poll(struct napi_struct *napi, int weight) 2200 { 2201 struct lan743x_rx *rx = container_of(napi, struct lan743x_rx, napi); 2202 struct lan743x_adapter *adapter = rx->adapter; 2203 u32 rx_tail_flags = 0; 2204 int count; 2205 2206 if (rx->vector_flags & LAN743X_VECTOR_FLAG_SOURCE_STATUS_W2C) { 2207 /* clear int status bit before reading packet */ 2208 lan743x_csr_write(adapter, DMAC_INT_STS, 2209 DMAC_INT_BIT_RXFRM_(rx->channel_number)); 2210 } 2211 count = 0; 2212 while (count < weight) { 2213 int rx_process_result = lan743x_rx_process_packet(rx); 2214 2215 if (rx_process_result == RX_PROCESS_RESULT_PACKET_RECEIVED) { 2216 count++; 2217 } else if (rx_process_result == 2218 RX_PROCESS_RESULT_NOTHING_TO_DO) { 2219 break; 2220 } else if (rx_process_result == 2221 RX_PROCESS_RESULT_PACKET_DROPPED) { 2222 continue; 2223 } 2224 } 2225 rx->frame_count += count; 2226 if (count == weight) 2227 goto done; 2228 2229 if (!napi_complete_done(napi, count)) 2230 goto done; 2231 2232 if (rx->vector_flags & LAN743X_VECTOR_FLAG_VECTOR_ENABLE_AUTO_SET) 2233 rx_tail_flags |= RX_TAIL_SET_TOP_INT_VEC_EN_; 2234 if (rx->vector_flags & LAN743X_VECTOR_FLAG_SOURCE_ENABLE_AUTO_SET) { 2235 rx_tail_flags |= RX_TAIL_SET_TOP_INT_EN_; 2236 } else { 2237 lan743x_csr_write(adapter, INT_EN_SET, 2238 INT_BIT_DMA_RX_(rx->channel_number)); 2239 } 2240 2241 /* update RX_TAIL */ 2242 lan743x_csr_write(adapter, RX_TAIL(rx->channel_number), 2243 rx_tail_flags | rx->last_tail); 2244 done: 2245 return count; 2246 } 2247 2248 static void lan743x_rx_ring_cleanup(struct lan743x_rx *rx) 2249 { 2250 if (rx->buffer_info && rx->ring_cpu_ptr) { 2251 int index; 2252 2253 for (index = 0; index < rx->ring_size; index++) 2254 lan743x_rx_release_ring_element(rx, index); 2255 } 2256 2257 if (rx->head_cpu_ptr) { 2258 dma_free_coherent(&rx->adapter->pdev->dev, 2259 sizeof(*rx->head_cpu_ptr), rx->head_cpu_ptr, 2260 rx->head_dma_ptr); 2261 rx->head_cpu_ptr = NULL; 2262 rx->head_dma_ptr = 0; 2263 } 2264 2265 kfree(rx->buffer_info); 2266 rx->buffer_info = NULL; 2267 2268 if (rx->ring_cpu_ptr) { 2269 dma_free_coherent(&rx->adapter->pdev->dev, 2270 rx->ring_allocation_size, rx->ring_cpu_ptr, 2271 rx->ring_dma_ptr); 2272 rx->ring_allocation_size = 0; 2273 rx->ring_cpu_ptr = NULL; 2274 rx->ring_dma_ptr = 0; 2275 } 2276 2277 rx->ring_size = 0; 2278 rx->last_head = 0; 2279 } 2280 2281 static int lan743x_rx_ring_init(struct lan743x_rx *rx) 2282 { 2283 size_t ring_allocation_size = 0; 2284 dma_addr_t dma_ptr = 0; 2285 void *cpu_ptr = NULL; 2286 int ret = -ENOMEM; 2287 int index = 0; 2288 2289 rx->ring_size = LAN743X_RX_RING_SIZE; 2290 if (rx->ring_size <= 1) { 2291 ret = -EINVAL; 2292 goto cleanup; 2293 } 2294 if (rx->ring_size & ~RX_CFG_B_RX_RING_LEN_MASK_) { 2295 ret = -EINVAL; 2296 goto cleanup; 2297 } 2298 ring_allocation_size = ALIGN(rx->ring_size * 2299 sizeof(struct lan743x_rx_descriptor), 2300 PAGE_SIZE); 2301 dma_ptr = 0; 2302 cpu_ptr = dma_alloc_coherent(&rx->adapter->pdev->dev, 2303 ring_allocation_size, &dma_ptr, GFP_KERNEL); 2304 if (!cpu_ptr) { 2305 ret = -ENOMEM; 2306 goto cleanup; 2307 } 2308 rx->ring_allocation_size = ring_allocation_size; 2309 rx->ring_cpu_ptr = (struct lan743x_rx_descriptor *)cpu_ptr; 2310 rx->ring_dma_ptr = dma_ptr; 2311 2312 cpu_ptr = kcalloc(rx->ring_size, sizeof(*rx->buffer_info), 2313 GFP_KERNEL); 2314 if (!cpu_ptr) { 2315 ret = -ENOMEM; 2316 goto cleanup; 2317 } 2318 rx->buffer_info = (struct lan743x_rx_buffer_info *)cpu_ptr; 2319 dma_ptr = 0; 2320 cpu_ptr = dma_alloc_coherent(&rx->adapter->pdev->dev, 2321 sizeof(*rx->head_cpu_ptr), &dma_ptr, 2322 GFP_KERNEL); 2323 if (!cpu_ptr) { 2324 ret = -ENOMEM; 2325 goto cleanup; 2326 } 2327 2328 rx->head_cpu_ptr = cpu_ptr; 2329 rx->head_dma_ptr = dma_ptr; 2330 if (rx->head_dma_ptr & 0x3) { 2331 ret = -ENOMEM; 2332 goto cleanup; 2333 } 2334 2335 rx->last_head = 0; 2336 for (index = 0; index < rx->ring_size; index++) { 2337 struct sk_buff *new_skb = lan743x_rx_allocate_skb(rx); 2338 2339 ret = lan743x_rx_init_ring_element(rx, index, new_skb); 2340 if (ret) 2341 goto cleanup; 2342 } 2343 return 0; 2344 2345 cleanup: 2346 lan743x_rx_ring_cleanup(rx); 2347 return ret; 2348 } 2349 2350 static void lan743x_rx_close(struct lan743x_rx *rx) 2351 { 2352 struct lan743x_adapter *adapter = rx->adapter; 2353 2354 lan743x_csr_write(adapter, FCT_RX_CTL, 2355 FCT_RX_CTL_DIS_(rx->channel_number)); 2356 lan743x_csr_wait_for_bit(adapter, FCT_RX_CTL, 2357 FCT_RX_CTL_EN_(rx->channel_number), 2358 0, 1000, 20000, 100); 2359 2360 lan743x_csr_write(adapter, DMAC_CMD, 2361 DMAC_CMD_STOP_R_(rx->channel_number)); 2362 lan743x_dmac_rx_wait_till_stopped(adapter, rx->channel_number); 2363 2364 lan743x_csr_write(adapter, DMAC_INT_EN_CLR, 2365 DMAC_INT_BIT_RXFRM_(rx->channel_number)); 2366 lan743x_csr_write(adapter, INT_EN_CLR, 2367 INT_BIT_DMA_RX_(rx->channel_number)); 2368 napi_disable(&rx->napi); 2369 2370 netif_napi_del(&rx->napi); 2371 2372 lan743x_rx_ring_cleanup(rx); 2373 } 2374 2375 static int lan743x_rx_open(struct lan743x_rx *rx) 2376 { 2377 struct lan743x_adapter *adapter = rx->adapter; 2378 u32 data = 0; 2379 int ret; 2380 2381 rx->frame_count = 0; 2382 ret = lan743x_rx_ring_init(rx); 2383 if (ret) 2384 goto return_error; 2385 2386 netif_napi_add(adapter->netdev, 2387 &rx->napi, lan743x_rx_napi_poll, 2388 rx->ring_size - 1); 2389 2390 lan743x_csr_write(adapter, DMAC_CMD, 2391 DMAC_CMD_RX_SWR_(rx->channel_number)); 2392 lan743x_csr_wait_for_bit(adapter, DMAC_CMD, 2393 DMAC_CMD_RX_SWR_(rx->channel_number), 2394 0, 1000, 20000, 100); 2395 2396 /* set ring base address */ 2397 lan743x_csr_write(adapter, 2398 RX_BASE_ADDRH(rx->channel_number), 2399 DMA_ADDR_HIGH32(rx->ring_dma_ptr)); 2400 lan743x_csr_write(adapter, 2401 RX_BASE_ADDRL(rx->channel_number), 2402 DMA_ADDR_LOW32(rx->ring_dma_ptr)); 2403 2404 /* set rx write back address */ 2405 lan743x_csr_write(adapter, 2406 RX_HEAD_WRITEBACK_ADDRH(rx->channel_number), 2407 DMA_ADDR_HIGH32(rx->head_dma_ptr)); 2408 lan743x_csr_write(adapter, 2409 RX_HEAD_WRITEBACK_ADDRL(rx->channel_number), 2410 DMA_ADDR_LOW32(rx->head_dma_ptr)); 2411 data = RX_CFG_A_RX_HP_WB_EN_; 2412 if (!(adapter->csr.flags & LAN743X_CSR_FLAG_IS_A0)) { 2413 data |= (RX_CFG_A_RX_WB_ON_INT_TMR_ | 2414 RX_CFG_A_RX_WB_THRES_SET_(0x7) | 2415 RX_CFG_A_RX_PF_THRES_SET_(16) | 2416 RX_CFG_A_RX_PF_PRI_THRES_SET_(4)); 2417 } 2418 2419 /* set RX_CFG_A */ 2420 lan743x_csr_write(adapter, 2421 RX_CFG_A(rx->channel_number), data); 2422 2423 /* set RX_CFG_B */ 2424 data = lan743x_csr_read(adapter, RX_CFG_B(rx->channel_number)); 2425 data &= ~RX_CFG_B_RX_PAD_MASK_; 2426 if (!RX_HEAD_PADDING) 2427 data |= RX_CFG_B_RX_PAD_0_; 2428 else 2429 data |= RX_CFG_B_RX_PAD_2_; 2430 data &= ~RX_CFG_B_RX_RING_LEN_MASK_; 2431 data |= ((rx->ring_size) & RX_CFG_B_RX_RING_LEN_MASK_); 2432 data |= RX_CFG_B_TS_ALL_RX_; 2433 if (!(adapter->csr.flags & LAN743X_CSR_FLAG_IS_A0)) 2434 data |= RX_CFG_B_RDMABL_512_; 2435 2436 lan743x_csr_write(adapter, RX_CFG_B(rx->channel_number), data); 2437 rx->vector_flags = lan743x_intr_get_vector_flags(adapter, 2438 INT_BIT_DMA_RX_ 2439 (rx->channel_number)); 2440 2441 /* set RX_CFG_C */ 2442 data = 0; 2443 if (rx->vector_flags & LAN743X_VECTOR_FLAG_SOURCE_ENABLE_AUTO_CLEAR) 2444 data |= RX_CFG_C_RX_TOP_INT_EN_AUTO_CLR_; 2445 if (rx->vector_flags & LAN743X_VECTOR_FLAG_SOURCE_STATUS_AUTO_CLEAR) 2446 data |= RX_CFG_C_RX_DMA_INT_STS_AUTO_CLR_; 2447 if (rx->vector_flags & LAN743X_VECTOR_FLAG_SOURCE_STATUS_R2C) 2448 data |= RX_CFG_C_RX_INT_STS_R2C_MODE_MASK_; 2449 if (rx->vector_flags & LAN743X_VECTOR_FLAG_SOURCE_ENABLE_R2C) 2450 data |= RX_CFG_C_RX_INT_EN_R2C_; 2451 lan743x_csr_write(adapter, RX_CFG_C(rx->channel_number), data); 2452 2453 rx->last_tail = ((u32)(rx->ring_size - 1)); 2454 lan743x_csr_write(adapter, RX_TAIL(rx->channel_number), 2455 rx->last_tail); 2456 rx->last_head = lan743x_csr_read(adapter, RX_HEAD(rx->channel_number)); 2457 if (rx->last_head) { 2458 ret = -EIO; 2459 goto napi_delete; 2460 } 2461 2462 napi_enable(&rx->napi); 2463 2464 lan743x_csr_write(adapter, INT_EN_SET, 2465 INT_BIT_DMA_RX_(rx->channel_number)); 2466 lan743x_csr_write(adapter, DMAC_INT_STS, 2467 DMAC_INT_BIT_RXFRM_(rx->channel_number)); 2468 lan743x_csr_write(adapter, DMAC_INT_EN_SET, 2469 DMAC_INT_BIT_RXFRM_(rx->channel_number)); 2470 lan743x_csr_write(adapter, DMAC_CMD, 2471 DMAC_CMD_START_R_(rx->channel_number)); 2472 2473 /* initialize fifo */ 2474 lan743x_csr_write(adapter, FCT_RX_CTL, 2475 FCT_RX_CTL_RESET_(rx->channel_number)); 2476 lan743x_csr_wait_for_bit(adapter, FCT_RX_CTL, 2477 FCT_RX_CTL_RESET_(rx->channel_number), 2478 0, 1000, 20000, 100); 2479 lan743x_csr_write(adapter, FCT_FLOW(rx->channel_number), 2480 FCT_FLOW_CTL_REQ_EN_ | 2481 FCT_FLOW_CTL_ON_THRESHOLD_SET_(0x2A) | 2482 FCT_FLOW_CTL_OFF_THRESHOLD_SET_(0xA)); 2483 2484 /* enable fifo */ 2485 lan743x_csr_write(adapter, FCT_RX_CTL, 2486 FCT_RX_CTL_EN_(rx->channel_number)); 2487 return 0; 2488 2489 napi_delete: 2490 netif_napi_del(&rx->napi); 2491 lan743x_rx_ring_cleanup(rx); 2492 2493 return_error: 2494 return ret; 2495 } 2496 2497 static int lan743x_netdev_close(struct net_device *netdev) 2498 { 2499 struct lan743x_adapter *adapter = netdev_priv(netdev); 2500 int index; 2501 2502 lan743x_tx_close(&adapter->tx[0]); 2503 2504 for (index = 0; index < LAN743X_USED_RX_CHANNELS; index++) 2505 lan743x_rx_close(&adapter->rx[index]); 2506 2507 lan743x_ptp_close(adapter); 2508 2509 lan743x_phy_close(adapter); 2510 2511 lan743x_mac_close(adapter); 2512 2513 lan743x_intr_close(adapter); 2514 2515 return 0; 2516 } 2517 2518 static int lan743x_netdev_open(struct net_device *netdev) 2519 { 2520 struct lan743x_adapter *adapter = netdev_priv(netdev); 2521 int index; 2522 int ret; 2523 2524 ret = lan743x_intr_open(adapter); 2525 if (ret) 2526 goto return_error; 2527 2528 ret = lan743x_mac_open(adapter); 2529 if (ret) 2530 goto close_intr; 2531 2532 ret = lan743x_phy_open(adapter); 2533 if (ret) 2534 goto close_mac; 2535 2536 ret = lan743x_ptp_open(adapter); 2537 if (ret) 2538 goto close_phy; 2539 2540 lan743x_rfe_open(adapter); 2541 2542 for (index = 0; index < LAN743X_USED_RX_CHANNELS; index++) { 2543 ret = lan743x_rx_open(&adapter->rx[index]); 2544 if (ret) 2545 goto close_rx; 2546 } 2547 2548 ret = lan743x_tx_open(&adapter->tx[0]); 2549 if (ret) 2550 goto close_rx; 2551 2552 return 0; 2553 2554 close_rx: 2555 for (index = 0; index < LAN743X_USED_RX_CHANNELS; index++) { 2556 if (adapter->rx[index].ring_cpu_ptr) 2557 lan743x_rx_close(&adapter->rx[index]); 2558 } 2559 lan743x_ptp_close(adapter); 2560 2561 close_phy: 2562 lan743x_phy_close(adapter); 2563 2564 close_mac: 2565 lan743x_mac_close(adapter); 2566 2567 close_intr: 2568 lan743x_intr_close(adapter); 2569 2570 return_error: 2571 netif_warn(adapter, ifup, adapter->netdev, 2572 "Error opening LAN743x\n"); 2573 return ret; 2574 } 2575 2576 static netdev_tx_t lan743x_netdev_xmit_frame(struct sk_buff *skb, 2577 struct net_device *netdev) 2578 { 2579 struct lan743x_adapter *adapter = netdev_priv(netdev); 2580 2581 return lan743x_tx_xmit_frame(&adapter->tx[0], skb); 2582 } 2583 2584 static int lan743x_netdev_ioctl(struct net_device *netdev, 2585 struct ifreq *ifr, int cmd) 2586 { 2587 if (!netif_running(netdev)) 2588 return -EINVAL; 2589 if (cmd == SIOCSHWTSTAMP) 2590 return lan743x_ptp_ioctl(netdev, ifr, cmd); 2591 return phy_mii_ioctl(netdev->phydev, ifr, cmd); 2592 } 2593 2594 static void lan743x_netdev_set_multicast(struct net_device *netdev) 2595 { 2596 struct lan743x_adapter *adapter = netdev_priv(netdev); 2597 2598 lan743x_rfe_set_multicast(adapter); 2599 } 2600 2601 static int lan743x_netdev_change_mtu(struct net_device *netdev, int new_mtu) 2602 { 2603 struct lan743x_adapter *adapter = netdev_priv(netdev); 2604 int ret = 0; 2605 2606 ret = lan743x_mac_set_mtu(adapter, new_mtu); 2607 if (!ret) 2608 netdev->mtu = new_mtu; 2609 return ret; 2610 } 2611 2612 static void lan743x_netdev_get_stats64(struct net_device *netdev, 2613 struct rtnl_link_stats64 *stats) 2614 { 2615 struct lan743x_adapter *adapter = netdev_priv(netdev); 2616 2617 stats->rx_packets = lan743x_csr_read(adapter, STAT_RX_TOTAL_FRAMES); 2618 stats->tx_packets = lan743x_csr_read(adapter, STAT_TX_TOTAL_FRAMES); 2619 stats->rx_bytes = lan743x_csr_read(adapter, 2620 STAT_RX_UNICAST_BYTE_COUNT) + 2621 lan743x_csr_read(adapter, 2622 STAT_RX_BROADCAST_BYTE_COUNT) + 2623 lan743x_csr_read(adapter, 2624 STAT_RX_MULTICAST_BYTE_COUNT); 2625 stats->tx_bytes = lan743x_csr_read(adapter, 2626 STAT_TX_UNICAST_BYTE_COUNT) + 2627 lan743x_csr_read(adapter, 2628 STAT_TX_BROADCAST_BYTE_COUNT) + 2629 lan743x_csr_read(adapter, 2630 STAT_TX_MULTICAST_BYTE_COUNT); 2631 stats->rx_errors = lan743x_csr_read(adapter, STAT_RX_FCS_ERRORS) + 2632 lan743x_csr_read(adapter, 2633 STAT_RX_ALIGNMENT_ERRORS) + 2634 lan743x_csr_read(adapter, STAT_RX_JABBER_ERRORS) + 2635 lan743x_csr_read(adapter, 2636 STAT_RX_UNDERSIZE_FRAME_ERRORS) + 2637 lan743x_csr_read(adapter, 2638 STAT_RX_OVERSIZE_FRAME_ERRORS); 2639 stats->tx_errors = lan743x_csr_read(adapter, STAT_TX_FCS_ERRORS) + 2640 lan743x_csr_read(adapter, 2641 STAT_TX_EXCESS_DEFERRAL_ERRORS) + 2642 lan743x_csr_read(adapter, STAT_TX_CARRIER_ERRORS); 2643 stats->rx_dropped = lan743x_csr_read(adapter, 2644 STAT_RX_DROPPED_FRAMES); 2645 stats->tx_dropped = lan743x_csr_read(adapter, 2646 STAT_TX_EXCESSIVE_COLLISION); 2647 stats->multicast = lan743x_csr_read(adapter, 2648 STAT_RX_MULTICAST_FRAMES) + 2649 lan743x_csr_read(adapter, 2650 STAT_TX_MULTICAST_FRAMES); 2651 stats->collisions = lan743x_csr_read(adapter, 2652 STAT_TX_SINGLE_COLLISIONS) + 2653 lan743x_csr_read(adapter, 2654 STAT_TX_MULTIPLE_COLLISIONS) + 2655 lan743x_csr_read(adapter, 2656 STAT_TX_LATE_COLLISIONS); 2657 } 2658 2659 static int lan743x_netdev_set_mac_address(struct net_device *netdev, 2660 void *addr) 2661 { 2662 struct lan743x_adapter *adapter = netdev_priv(netdev); 2663 struct sockaddr *sock_addr = addr; 2664 int ret; 2665 2666 ret = eth_prepare_mac_addr_change(netdev, sock_addr); 2667 if (ret) 2668 return ret; 2669 ether_addr_copy(netdev->dev_addr, sock_addr->sa_data); 2670 lan743x_mac_set_address(adapter, sock_addr->sa_data); 2671 lan743x_rfe_update_mac_address(adapter); 2672 return 0; 2673 } 2674 2675 static const struct net_device_ops lan743x_netdev_ops = { 2676 .ndo_open = lan743x_netdev_open, 2677 .ndo_stop = lan743x_netdev_close, 2678 .ndo_start_xmit = lan743x_netdev_xmit_frame, 2679 .ndo_do_ioctl = lan743x_netdev_ioctl, 2680 .ndo_set_rx_mode = lan743x_netdev_set_multicast, 2681 .ndo_change_mtu = lan743x_netdev_change_mtu, 2682 .ndo_get_stats64 = lan743x_netdev_get_stats64, 2683 .ndo_set_mac_address = lan743x_netdev_set_mac_address, 2684 }; 2685 2686 static void lan743x_hardware_cleanup(struct lan743x_adapter *adapter) 2687 { 2688 lan743x_csr_write(adapter, INT_EN_CLR, 0xFFFFFFFF); 2689 } 2690 2691 static void lan743x_mdiobus_cleanup(struct lan743x_adapter *adapter) 2692 { 2693 mdiobus_unregister(adapter->mdiobus); 2694 } 2695 2696 static void lan743x_full_cleanup(struct lan743x_adapter *adapter) 2697 { 2698 unregister_netdev(adapter->netdev); 2699 2700 lan743x_mdiobus_cleanup(adapter); 2701 lan743x_hardware_cleanup(adapter); 2702 lan743x_pci_cleanup(adapter); 2703 } 2704 2705 static int lan743x_hardware_init(struct lan743x_adapter *adapter, 2706 struct pci_dev *pdev) 2707 { 2708 struct lan743x_tx *tx; 2709 int index; 2710 int ret; 2711 2712 adapter->intr.irq = adapter->pdev->irq; 2713 lan743x_csr_write(adapter, INT_EN_CLR, 0xFFFFFFFF); 2714 2715 ret = lan743x_gpio_init(adapter); 2716 if (ret) 2717 return ret; 2718 2719 ret = lan743x_mac_init(adapter); 2720 if (ret) 2721 return ret; 2722 2723 ret = lan743x_phy_init(adapter); 2724 if (ret) 2725 return ret; 2726 2727 ret = lan743x_ptp_init(adapter); 2728 if (ret) 2729 return ret; 2730 2731 lan743x_rfe_update_mac_address(adapter); 2732 2733 ret = lan743x_dmac_init(adapter); 2734 if (ret) 2735 return ret; 2736 2737 for (index = 0; index < LAN743X_USED_RX_CHANNELS; index++) { 2738 adapter->rx[index].adapter = adapter; 2739 adapter->rx[index].channel_number = index; 2740 } 2741 2742 tx = &adapter->tx[0]; 2743 tx->adapter = adapter; 2744 tx->channel_number = 0; 2745 spin_lock_init(&tx->ring_lock); 2746 return 0; 2747 } 2748 2749 static int lan743x_mdiobus_init(struct lan743x_adapter *adapter) 2750 { 2751 int ret; 2752 2753 adapter->mdiobus = devm_mdiobus_alloc(&adapter->pdev->dev); 2754 if (!(adapter->mdiobus)) { 2755 ret = -ENOMEM; 2756 goto return_error; 2757 } 2758 2759 adapter->mdiobus->priv = (void *)adapter; 2760 adapter->mdiobus->read = lan743x_mdiobus_read; 2761 adapter->mdiobus->write = lan743x_mdiobus_write; 2762 adapter->mdiobus->name = "lan743x-mdiobus"; 2763 snprintf(adapter->mdiobus->id, MII_BUS_ID_SIZE, 2764 "pci-%s", pci_name(adapter->pdev)); 2765 2766 if ((adapter->csr.id_rev & ID_REV_ID_MASK_) == ID_REV_ID_LAN7430_) 2767 /* LAN7430 uses internal phy at address 1 */ 2768 adapter->mdiobus->phy_mask = ~(u32)BIT(1); 2769 2770 /* register mdiobus */ 2771 ret = mdiobus_register(adapter->mdiobus); 2772 if (ret < 0) 2773 goto return_error; 2774 return 0; 2775 2776 return_error: 2777 return ret; 2778 } 2779 2780 /* lan743x_pcidev_probe - Device Initialization Routine 2781 * @pdev: PCI device information struct 2782 * @id: entry in lan743x_pci_tbl 2783 * 2784 * Returns 0 on success, negative on failure 2785 * 2786 * initializes an adapter identified by a pci_dev structure. 2787 * The OS initialization, configuring of the adapter private structure, 2788 * and a hardware reset occur. 2789 **/ 2790 static int lan743x_pcidev_probe(struct pci_dev *pdev, 2791 const struct pci_device_id *id) 2792 { 2793 struct lan743x_adapter *adapter = NULL; 2794 struct net_device *netdev = NULL; 2795 const void *mac_addr; 2796 int ret = -ENODEV; 2797 2798 netdev = devm_alloc_etherdev(&pdev->dev, 2799 sizeof(struct lan743x_adapter)); 2800 if (!netdev) 2801 goto return_error; 2802 2803 SET_NETDEV_DEV(netdev, &pdev->dev); 2804 pci_set_drvdata(pdev, netdev); 2805 adapter = netdev_priv(netdev); 2806 adapter->netdev = netdev; 2807 adapter->msg_enable = NETIF_MSG_DRV | NETIF_MSG_PROBE | 2808 NETIF_MSG_LINK | NETIF_MSG_IFUP | 2809 NETIF_MSG_IFDOWN | NETIF_MSG_TX_QUEUED; 2810 netdev->max_mtu = LAN743X_MAX_FRAME_SIZE; 2811 2812 mac_addr = of_get_mac_address(pdev->dev.of_node); 2813 if (!IS_ERR(mac_addr)) 2814 ether_addr_copy(adapter->mac_address, mac_addr); 2815 2816 ret = lan743x_pci_init(adapter, pdev); 2817 if (ret) 2818 goto return_error; 2819 2820 ret = lan743x_csr_init(adapter); 2821 if (ret) 2822 goto cleanup_pci; 2823 2824 ret = lan743x_hardware_init(adapter, pdev); 2825 if (ret) 2826 goto cleanup_pci; 2827 2828 ret = lan743x_mdiobus_init(adapter); 2829 if (ret) 2830 goto cleanup_hardware; 2831 2832 adapter->netdev->netdev_ops = &lan743x_netdev_ops; 2833 adapter->netdev->ethtool_ops = &lan743x_ethtool_ops; 2834 adapter->netdev->features = NETIF_F_SG | NETIF_F_TSO | NETIF_F_HW_CSUM; 2835 adapter->netdev->hw_features = adapter->netdev->features; 2836 2837 /* carrier off reporting is important to ethtool even BEFORE open */ 2838 netif_carrier_off(netdev); 2839 2840 ret = register_netdev(adapter->netdev); 2841 if (ret < 0) 2842 goto cleanup_mdiobus; 2843 return 0; 2844 2845 cleanup_mdiobus: 2846 lan743x_mdiobus_cleanup(adapter); 2847 2848 cleanup_hardware: 2849 lan743x_hardware_cleanup(adapter); 2850 2851 cleanup_pci: 2852 lan743x_pci_cleanup(adapter); 2853 2854 return_error: 2855 pr_warn("Initialization failed\n"); 2856 return ret; 2857 } 2858 2859 /** 2860 * lan743x_pcidev_remove - Device Removal Routine 2861 * @pdev: PCI device information struct 2862 * 2863 * this is called by the PCI subsystem to alert the driver 2864 * that it should release a PCI device. This could be caused by a 2865 * Hot-Plug event, or because the driver is going to be removed from 2866 * memory. 2867 **/ 2868 static void lan743x_pcidev_remove(struct pci_dev *pdev) 2869 { 2870 struct net_device *netdev = pci_get_drvdata(pdev); 2871 struct lan743x_adapter *adapter = netdev_priv(netdev); 2872 2873 lan743x_full_cleanup(adapter); 2874 } 2875 2876 static void lan743x_pcidev_shutdown(struct pci_dev *pdev) 2877 { 2878 struct net_device *netdev = pci_get_drvdata(pdev); 2879 struct lan743x_adapter *adapter = netdev_priv(netdev); 2880 2881 rtnl_lock(); 2882 netif_device_detach(netdev); 2883 2884 /* close netdev when netdev is at running state. 2885 * For instance, it is true when system goes to sleep by pm-suspend 2886 * However, it is false when system goes to sleep by suspend GUI menu 2887 */ 2888 if (netif_running(netdev)) 2889 lan743x_netdev_close(netdev); 2890 rtnl_unlock(); 2891 2892 #ifdef CONFIG_PM 2893 pci_save_state(pdev); 2894 #endif 2895 2896 /* clean up lan743x portion */ 2897 lan743x_hardware_cleanup(adapter); 2898 } 2899 2900 #ifdef CONFIG_PM_SLEEP 2901 static u16 lan743x_pm_wakeframe_crc16(const u8 *buf, int len) 2902 { 2903 return bitrev16(crc16(0xFFFF, buf, len)); 2904 } 2905 2906 static void lan743x_pm_set_wol(struct lan743x_adapter *adapter) 2907 { 2908 const u8 ipv4_multicast[3] = { 0x01, 0x00, 0x5E }; 2909 const u8 ipv6_multicast[3] = { 0x33, 0x33 }; 2910 const u8 arp_type[2] = { 0x08, 0x06 }; 2911 int mask_index; 2912 u32 pmtctl; 2913 u32 wucsr; 2914 u32 macrx; 2915 u16 crc; 2916 2917 for (mask_index = 0; mask_index < MAC_NUM_OF_WUF_CFG; mask_index++) 2918 lan743x_csr_write(adapter, MAC_WUF_CFG(mask_index), 0); 2919 2920 /* clear wake settings */ 2921 pmtctl = lan743x_csr_read(adapter, PMT_CTL); 2922 pmtctl |= PMT_CTL_WUPS_MASK_; 2923 pmtctl &= ~(PMT_CTL_GPIO_WAKEUP_EN_ | PMT_CTL_EEE_WAKEUP_EN_ | 2924 PMT_CTL_WOL_EN_ | PMT_CTL_MAC_D3_RX_CLK_OVR_ | 2925 PMT_CTL_RX_FCT_RFE_D3_CLK_OVR_ | PMT_CTL_ETH_PHY_WAKE_EN_); 2926 2927 macrx = lan743x_csr_read(adapter, MAC_RX); 2928 2929 wucsr = 0; 2930 mask_index = 0; 2931 2932 pmtctl |= PMT_CTL_ETH_PHY_D3_COLD_OVR_ | PMT_CTL_ETH_PHY_D3_OVR_; 2933 2934 if (adapter->wolopts & WAKE_PHY) { 2935 pmtctl |= PMT_CTL_ETH_PHY_EDPD_PLL_CTL_; 2936 pmtctl |= PMT_CTL_ETH_PHY_WAKE_EN_; 2937 } 2938 if (adapter->wolopts & WAKE_MAGIC) { 2939 wucsr |= MAC_WUCSR_MPEN_; 2940 macrx |= MAC_RX_RXEN_; 2941 pmtctl |= PMT_CTL_WOL_EN_ | PMT_CTL_MAC_D3_RX_CLK_OVR_; 2942 } 2943 if (adapter->wolopts & WAKE_UCAST) { 2944 wucsr |= MAC_WUCSR_RFE_WAKE_EN_ | MAC_WUCSR_PFDA_EN_; 2945 macrx |= MAC_RX_RXEN_; 2946 pmtctl |= PMT_CTL_WOL_EN_ | PMT_CTL_MAC_D3_RX_CLK_OVR_; 2947 pmtctl |= PMT_CTL_RX_FCT_RFE_D3_CLK_OVR_; 2948 } 2949 if (adapter->wolopts & WAKE_BCAST) { 2950 wucsr |= MAC_WUCSR_RFE_WAKE_EN_ | MAC_WUCSR_BCST_EN_; 2951 macrx |= MAC_RX_RXEN_; 2952 pmtctl |= PMT_CTL_WOL_EN_ | PMT_CTL_MAC_D3_RX_CLK_OVR_; 2953 pmtctl |= PMT_CTL_RX_FCT_RFE_D3_CLK_OVR_; 2954 } 2955 if (adapter->wolopts & WAKE_MCAST) { 2956 /* IPv4 multicast */ 2957 crc = lan743x_pm_wakeframe_crc16(ipv4_multicast, 3); 2958 lan743x_csr_write(adapter, MAC_WUF_CFG(mask_index), 2959 MAC_WUF_CFG_EN_ | MAC_WUF_CFG_TYPE_MCAST_ | 2960 (0 << MAC_WUF_CFG_OFFSET_SHIFT_) | 2961 (crc & MAC_WUF_CFG_CRC16_MASK_)); 2962 lan743x_csr_write(adapter, MAC_WUF_MASK0(mask_index), 7); 2963 lan743x_csr_write(adapter, MAC_WUF_MASK1(mask_index), 0); 2964 lan743x_csr_write(adapter, MAC_WUF_MASK2(mask_index), 0); 2965 lan743x_csr_write(adapter, MAC_WUF_MASK3(mask_index), 0); 2966 mask_index++; 2967 2968 /* IPv6 multicast */ 2969 crc = lan743x_pm_wakeframe_crc16(ipv6_multicast, 2); 2970 lan743x_csr_write(adapter, MAC_WUF_CFG(mask_index), 2971 MAC_WUF_CFG_EN_ | MAC_WUF_CFG_TYPE_MCAST_ | 2972 (0 << MAC_WUF_CFG_OFFSET_SHIFT_) | 2973 (crc & MAC_WUF_CFG_CRC16_MASK_)); 2974 lan743x_csr_write(adapter, MAC_WUF_MASK0(mask_index), 3); 2975 lan743x_csr_write(adapter, MAC_WUF_MASK1(mask_index), 0); 2976 lan743x_csr_write(adapter, MAC_WUF_MASK2(mask_index), 0); 2977 lan743x_csr_write(adapter, MAC_WUF_MASK3(mask_index), 0); 2978 mask_index++; 2979 2980 wucsr |= MAC_WUCSR_RFE_WAKE_EN_ | MAC_WUCSR_WAKE_EN_; 2981 macrx |= MAC_RX_RXEN_; 2982 pmtctl |= PMT_CTL_WOL_EN_ | PMT_CTL_MAC_D3_RX_CLK_OVR_; 2983 pmtctl |= PMT_CTL_RX_FCT_RFE_D3_CLK_OVR_; 2984 } 2985 if (adapter->wolopts & WAKE_ARP) { 2986 /* set MAC_WUF_CFG & WUF_MASK 2987 * for packettype (offset 12,13) = ARP (0x0806) 2988 */ 2989 crc = lan743x_pm_wakeframe_crc16(arp_type, 2); 2990 lan743x_csr_write(adapter, MAC_WUF_CFG(mask_index), 2991 MAC_WUF_CFG_EN_ | MAC_WUF_CFG_TYPE_ALL_ | 2992 (0 << MAC_WUF_CFG_OFFSET_SHIFT_) | 2993 (crc & MAC_WUF_CFG_CRC16_MASK_)); 2994 lan743x_csr_write(adapter, MAC_WUF_MASK0(mask_index), 0x3000); 2995 lan743x_csr_write(adapter, MAC_WUF_MASK1(mask_index), 0); 2996 lan743x_csr_write(adapter, MAC_WUF_MASK2(mask_index), 0); 2997 lan743x_csr_write(adapter, MAC_WUF_MASK3(mask_index), 0); 2998 mask_index++; 2999 3000 wucsr |= MAC_WUCSR_RFE_WAKE_EN_ | MAC_WUCSR_WAKE_EN_; 3001 macrx |= MAC_RX_RXEN_; 3002 pmtctl |= PMT_CTL_WOL_EN_ | PMT_CTL_MAC_D3_RX_CLK_OVR_; 3003 pmtctl |= PMT_CTL_RX_FCT_RFE_D3_CLK_OVR_; 3004 } 3005 3006 lan743x_csr_write(adapter, MAC_WUCSR, wucsr); 3007 lan743x_csr_write(adapter, PMT_CTL, pmtctl); 3008 lan743x_csr_write(adapter, MAC_RX, macrx); 3009 } 3010 3011 static int lan743x_pm_suspend(struct device *dev) 3012 { 3013 struct pci_dev *pdev = to_pci_dev(dev); 3014 struct net_device *netdev = pci_get_drvdata(pdev); 3015 struct lan743x_adapter *adapter = netdev_priv(netdev); 3016 3017 lan743x_pcidev_shutdown(pdev); 3018 3019 /* clear all wakes */ 3020 lan743x_csr_write(adapter, MAC_WUCSR, 0); 3021 lan743x_csr_write(adapter, MAC_WUCSR2, 0); 3022 lan743x_csr_write(adapter, MAC_WK_SRC, 0xFFFFFFFF); 3023 3024 if (adapter->wolopts) 3025 lan743x_pm_set_wol(adapter); 3026 3027 /* Host sets PME_En, put D3hot */ 3028 return pci_prepare_to_sleep(pdev);; 3029 } 3030 3031 static int lan743x_pm_resume(struct device *dev) 3032 { 3033 struct pci_dev *pdev = to_pci_dev(dev); 3034 struct net_device *netdev = pci_get_drvdata(pdev); 3035 struct lan743x_adapter *adapter = netdev_priv(netdev); 3036 int ret; 3037 3038 pci_set_power_state(pdev, PCI_D0); 3039 pci_restore_state(pdev); 3040 pci_save_state(pdev); 3041 3042 ret = lan743x_hardware_init(adapter, pdev); 3043 if (ret) { 3044 netif_err(adapter, probe, adapter->netdev, 3045 "lan743x_hardware_init returned %d\n", ret); 3046 } 3047 3048 /* open netdev when netdev is at running state while resume. 3049 * For instance, it is true when system wakesup after pm-suspend 3050 * However, it is false when system wakes up after suspend GUI menu 3051 */ 3052 if (netif_running(netdev)) 3053 lan743x_netdev_open(netdev); 3054 3055 netif_device_attach(netdev); 3056 3057 return 0; 3058 } 3059 3060 static const struct dev_pm_ops lan743x_pm_ops = { 3061 SET_SYSTEM_SLEEP_PM_OPS(lan743x_pm_suspend, lan743x_pm_resume) 3062 }; 3063 #endif /* CONFIG_PM_SLEEP */ 3064 3065 static const struct pci_device_id lan743x_pcidev_tbl[] = { 3066 { PCI_DEVICE(PCI_VENDOR_ID_SMSC, PCI_DEVICE_ID_SMSC_LAN7430) }, 3067 { PCI_DEVICE(PCI_VENDOR_ID_SMSC, PCI_DEVICE_ID_SMSC_LAN7431) }, 3068 { 0, } 3069 }; 3070 3071 MODULE_DEVICE_TABLE(pci, lan743x_pcidev_tbl); 3072 3073 static struct pci_driver lan743x_pcidev_driver = { 3074 .name = DRIVER_NAME, 3075 .id_table = lan743x_pcidev_tbl, 3076 .probe = lan743x_pcidev_probe, 3077 .remove = lan743x_pcidev_remove, 3078 #ifdef CONFIG_PM_SLEEP 3079 .driver.pm = &lan743x_pm_ops, 3080 #endif 3081 .shutdown = lan743x_pcidev_shutdown, 3082 }; 3083 3084 module_pci_driver(lan743x_pcidev_driver); 3085 3086 MODULE_AUTHOR(DRIVER_AUTHOR); 3087 MODULE_DESCRIPTION(DRIVER_DESC); 3088 MODULE_LICENSE("GPL"); 3089