1 /* 2 * drivers/net/ethernet/mellanox/mlxsw/spectrum.c 3 * Copyright (c) 2015 Mellanox Technologies. All rights reserved. 4 * Copyright (c) 2015 Jiri Pirko <jiri@mellanox.com> 5 * Copyright (c) 2015 Ido Schimmel <idosch@mellanox.com> 6 * Copyright (c) 2015 Elad Raz <eladr@mellanox.com> 7 * 8 * Redistribution and use in source and binary forms, with or without 9 * modification, are permitted provided that the following conditions are met: 10 * 11 * 1. Redistributions of source code must retain the above copyright 12 * notice, this list of conditions and the following disclaimer. 13 * 2. Redistributions in binary form must reproduce the above copyright 14 * notice, this list of conditions and the following disclaimer in the 15 * documentation and/or other materials provided with the distribution. 16 * 3. Neither the names of the copyright holders nor the names of its 17 * contributors may be used to endorse or promote products derived from 18 * this software without specific prior written permission. 19 * 20 * Alternatively, this software may be distributed under the terms of the 21 * GNU General Public License ("GPL") version 2 as published by the Free 22 * Software Foundation. 23 * 24 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 25 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 26 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 27 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE 28 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 29 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 30 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 31 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 32 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 33 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 34 * POSSIBILITY OF SUCH DAMAGE. 35 */ 36 37 #include <linux/kernel.h> 38 #include <linux/module.h> 39 #include <linux/types.h> 40 #include <linux/netdevice.h> 41 #include <linux/etherdevice.h> 42 #include <linux/ethtool.h> 43 #include <linux/slab.h> 44 #include <linux/device.h> 45 #include <linux/skbuff.h> 46 #include <linux/if_vlan.h> 47 #include <linux/if_bridge.h> 48 #include <linux/workqueue.h> 49 #include <linux/jiffies.h> 50 #include <linux/bitops.h> 51 #include <linux/list.h> 52 #include <linux/notifier.h> 53 #include <linux/dcbnl.h> 54 #include <linux/inetdevice.h> 55 #include <net/switchdev.h> 56 #include <generated/utsrelease.h> 57 #include <net/pkt_cls.h> 58 #include <net/tc_act/tc_mirred.h> 59 #include <net/netevent.h> 60 61 #include "spectrum.h" 62 #include "core.h" 63 #include "reg.h" 64 #include "port.h" 65 #include "trap.h" 66 #include "txheader.h" 67 68 static const char mlxsw_sp_driver_name[] = "mlxsw_spectrum"; 69 static const char mlxsw_sp_driver_version[] = "1.0"; 70 71 /* tx_hdr_version 72 * Tx header version. 73 * Must be set to 1. 74 */ 75 MLXSW_ITEM32(tx, hdr, version, 0x00, 28, 4); 76 77 /* tx_hdr_ctl 78 * Packet control type. 79 * 0 - Ethernet control (e.g. EMADs, LACP) 80 * 1 - Ethernet data 81 */ 82 MLXSW_ITEM32(tx, hdr, ctl, 0x00, 26, 2); 83 84 /* tx_hdr_proto 85 * Packet protocol type. Must be set to 1 (Ethernet). 86 */ 87 MLXSW_ITEM32(tx, hdr, proto, 0x00, 21, 3); 88 89 /* tx_hdr_rx_is_router 90 * Packet is sent from the router. Valid for data packets only. 91 */ 92 MLXSW_ITEM32(tx, hdr, rx_is_router, 0x00, 19, 1); 93 94 /* tx_hdr_fid_valid 95 * Indicates if the 'fid' field is valid and should be used for 96 * forwarding lookup. Valid for data packets only. 97 */ 98 MLXSW_ITEM32(tx, hdr, fid_valid, 0x00, 16, 1); 99 100 /* tx_hdr_swid 101 * Switch partition ID. Must be set to 0. 102 */ 103 MLXSW_ITEM32(tx, hdr, swid, 0x00, 12, 3); 104 105 /* tx_hdr_control_tclass 106 * Indicates if the packet should use the control TClass and not one 107 * of the data TClasses. 108 */ 109 MLXSW_ITEM32(tx, hdr, control_tclass, 0x00, 6, 1); 110 111 /* tx_hdr_etclass 112 * Egress TClass to be used on the egress device on the egress port. 113 */ 114 MLXSW_ITEM32(tx, hdr, etclass, 0x00, 0, 4); 115 116 /* tx_hdr_port_mid 117 * Destination local port for unicast packets. 118 * Destination multicast ID for multicast packets. 119 * 120 * Control packets are directed to a specific egress port, while data 121 * packets are transmitted through the CPU port (0) into the switch partition, 122 * where forwarding rules are applied. 123 */ 124 MLXSW_ITEM32(tx, hdr, port_mid, 0x04, 16, 16); 125 126 /* tx_hdr_fid 127 * Forwarding ID used for L2 forwarding lookup. Valid only if 'fid_valid' is 128 * set, otherwise calculated based on the packet's VID using VID to FID mapping. 129 * Valid for data packets only. 130 */ 131 MLXSW_ITEM32(tx, hdr, fid, 0x08, 0, 16); 132 133 /* tx_hdr_type 134 * 0 - Data packets 135 * 6 - Control packets 136 */ 137 MLXSW_ITEM32(tx, hdr, type, 0x0C, 0, 4); 138 139 static bool mlxsw_sp_port_dev_check(const struct net_device *dev); 140 141 static void mlxsw_sp_txhdr_construct(struct sk_buff *skb, 142 const struct mlxsw_tx_info *tx_info) 143 { 144 char *txhdr = skb_push(skb, MLXSW_TXHDR_LEN); 145 146 memset(txhdr, 0, MLXSW_TXHDR_LEN); 147 148 mlxsw_tx_hdr_version_set(txhdr, MLXSW_TXHDR_VERSION_1); 149 mlxsw_tx_hdr_ctl_set(txhdr, MLXSW_TXHDR_ETH_CTL); 150 mlxsw_tx_hdr_proto_set(txhdr, MLXSW_TXHDR_PROTO_ETH); 151 mlxsw_tx_hdr_swid_set(txhdr, 0); 152 mlxsw_tx_hdr_control_tclass_set(txhdr, 1); 153 mlxsw_tx_hdr_port_mid_set(txhdr, tx_info->local_port); 154 mlxsw_tx_hdr_type_set(txhdr, MLXSW_TXHDR_TYPE_CONTROL); 155 } 156 157 static int mlxsw_sp_base_mac_get(struct mlxsw_sp *mlxsw_sp) 158 { 159 char spad_pl[MLXSW_REG_SPAD_LEN]; 160 int err; 161 162 err = mlxsw_reg_query(mlxsw_sp->core, MLXSW_REG(spad), spad_pl); 163 if (err) 164 return err; 165 mlxsw_reg_spad_base_mac_memcpy_from(spad_pl, mlxsw_sp->base_mac); 166 return 0; 167 } 168 169 static int mlxsw_sp_span_init(struct mlxsw_sp *mlxsw_sp) 170 { 171 struct mlxsw_resources *resources; 172 int i; 173 174 resources = mlxsw_core_resources_get(mlxsw_sp->core); 175 if (!resources->max_span_valid) 176 return -EIO; 177 178 mlxsw_sp->span.entries_count = resources->max_span; 179 mlxsw_sp->span.entries = kcalloc(mlxsw_sp->span.entries_count, 180 sizeof(struct mlxsw_sp_span_entry), 181 GFP_KERNEL); 182 if (!mlxsw_sp->span.entries) 183 return -ENOMEM; 184 185 for (i = 0; i < mlxsw_sp->span.entries_count; i++) 186 INIT_LIST_HEAD(&mlxsw_sp->span.entries[i].bound_ports_list); 187 188 return 0; 189 } 190 191 static void mlxsw_sp_span_fini(struct mlxsw_sp *mlxsw_sp) 192 { 193 int i; 194 195 for (i = 0; i < mlxsw_sp->span.entries_count; i++) { 196 struct mlxsw_sp_span_entry *curr = &mlxsw_sp->span.entries[i]; 197 198 WARN_ON_ONCE(!list_empty(&curr->bound_ports_list)); 199 } 200 kfree(mlxsw_sp->span.entries); 201 } 202 203 static struct mlxsw_sp_span_entry * 204 mlxsw_sp_span_entry_create(struct mlxsw_sp_port *port) 205 { 206 struct mlxsw_sp *mlxsw_sp = port->mlxsw_sp; 207 struct mlxsw_sp_span_entry *span_entry; 208 char mpat_pl[MLXSW_REG_MPAT_LEN]; 209 u8 local_port = port->local_port; 210 int index; 211 int i; 212 int err; 213 214 /* find a free entry to use */ 215 index = -1; 216 for (i = 0; i < mlxsw_sp->span.entries_count; i++) { 217 if (!mlxsw_sp->span.entries[i].used) { 218 index = i; 219 span_entry = &mlxsw_sp->span.entries[i]; 220 break; 221 } 222 } 223 if (index < 0) 224 return NULL; 225 226 /* create a new port analayzer entry for local_port */ 227 mlxsw_reg_mpat_pack(mpat_pl, index, local_port, true); 228 err = mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(mpat), mpat_pl); 229 if (err) 230 return NULL; 231 232 span_entry->used = true; 233 span_entry->id = index; 234 span_entry->ref_count = 0; 235 span_entry->local_port = local_port; 236 return span_entry; 237 } 238 239 static void mlxsw_sp_span_entry_destroy(struct mlxsw_sp *mlxsw_sp, 240 struct mlxsw_sp_span_entry *span_entry) 241 { 242 u8 local_port = span_entry->local_port; 243 char mpat_pl[MLXSW_REG_MPAT_LEN]; 244 int pa_id = span_entry->id; 245 246 mlxsw_reg_mpat_pack(mpat_pl, pa_id, local_port, false); 247 mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(mpat), mpat_pl); 248 span_entry->used = false; 249 } 250 251 static struct mlxsw_sp_span_entry * 252 mlxsw_sp_span_entry_find(struct mlxsw_sp_port *port) 253 { 254 struct mlxsw_sp *mlxsw_sp = port->mlxsw_sp; 255 int i; 256 257 for (i = 0; i < mlxsw_sp->span.entries_count; i++) { 258 struct mlxsw_sp_span_entry *curr = &mlxsw_sp->span.entries[i]; 259 260 if (curr->used && curr->local_port == port->local_port) 261 return curr; 262 } 263 return NULL; 264 } 265 266 static struct mlxsw_sp_span_entry 267 *mlxsw_sp_span_entry_get(struct mlxsw_sp_port *port) 268 { 269 struct mlxsw_sp_span_entry *span_entry; 270 271 span_entry = mlxsw_sp_span_entry_find(port); 272 if (span_entry) { 273 span_entry->ref_count++; 274 return span_entry; 275 } 276 277 return mlxsw_sp_span_entry_create(port); 278 } 279 280 static int mlxsw_sp_span_entry_put(struct mlxsw_sp *mlxsw_sp, 281 struct mlxsw_sp_span_entry *span_entry) 282 { 283 if (--span_entry->ref_count == 0) 284 mlxsw_sp_span_entry_destroy(mlxsw_sp, span_entry); 285 return 0; 286 } 287 288 static bool mlxsw_sp_span_is_egress_mirror(struct mlxsw_sp_port *port) 289 { 290 struct mlxsw_sp *mlxsw_sp = port->mlxsw_sp; 291 struct mlxsw_sp_span_inspected_port *p; 292 int i; 293 294 for (i = 0; i < mlxsw_sp->span.entries_count; i++) { 295 struct mlxsw_sp_span_entry *curr = &mlxsw_sp->span.entries[i]; 296 297 list_for_each_entry(p, &curr->bound_ports_list, list) 298 if (p->local_port == port->local_port && 299 p->type == MLXSW_SP_SPAN_EGRESS) 300 return true; 301 } 302 303 return false; 304 } 305 306 static int mlxsw_sp_span_mtu_to_buffsize(int mtu) 307 { 308 return MLXSW_SP_BYTES_TO_CELLS(mtu * 5 / 2) + 1; 309 } 310 311 static int mlxsw_sp_span_port_mtu_update(struct mlxsw_sp_port *port, u16 mtu) 312 { 313 struct mlxsw_sp *mlxsw_sp = port->mlxsw_sp; 314 char sbib_pl[MLXSW_REG_SBIB_LEN]; 315 int err; 316 317 /* If port is egress mirrored, the shared buffer size should be 318 * updated according to the mtu value 319 */ 320 if (mlxsw_sp_span_is_egress_mirror(port)) { 321 mlxsw_reg_sbib_pack(sbib_pl, port->local_port, 322 mlxsw_sp_span_mtu_to_buffsize(mtu)); 323 err = mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(sbib), sbib_pl); 324 if (err) { 325 netdev_err(port->dev, "Could not update shared buffer for mirroring\n"); 326 return err; 327 } 328 } 329 330 return 0; 331 } 332 333 static struct mlxsw_sp_span_inspected_port * 334 mlxsw_sp_span_entry_bound_port_find(struct mlxsw_sp_port *port, 335 struct mlxsw_sp_span_entry *span_entry) 336 { 337 struct mlxsw_sp_span_inspected_port *p; 338 339 list_for_each_entry(p, &span_entry->bound_ports_list, list) 340 if (port->local_port == p->local_port) 341 return p; 342 return NULL; 343 } 344 345 static int 346 mlxsw_sp_span_inspected_port_bind(struct mlxsw_sp_port *port, 347 struct mlxsw_sp_span_entry *span_entry, 348 enum mlxsw_sp_span_type type) 349 { 350 struct mlxsw_sp_span_inspected_port *inspected_port; 351 struct mlxsw_sp *mlxsw_sp = port->mlxsw_sp; 352 char mpar_pl[MLXSW_REG_MPAR_LEN]; 353 char sbib_pl[MLXSW_REG_SBIB_LEN]; 354 int pa_id = span_entry->id; 355 int err; 356 357 /* if it is an egress SPAN, bind a shared buffer to it */ 358 if (type == MLXSW_SP_SPAN_EGRESS) { 359 mlxsw_reg_sbib_pack(sbib_pl, port->local_port, 360 mlxsw_sp_span_mtu_to_buffsize(port->dev->mtu)); 361 err = mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(sbib), sbib_pl); 362 if (err) { 363 netdev_err(port->dev, "Could not create shared buffer for mirroring\n"); 364 return err; 365 } 366 } 367 368 /* bind the port to the SPAN entry */ 369 mlxsw_reg_mpar_pack(mpar_pl, port->local_port, 370 (enum mlxsw_reg_mpar_i_e) type, true, pa_id); 371 err = mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(mpar), mpar_pl); 372 if (err) 373 goto err_mpar_reg_write; 374 375 inspected_port = kzalloc(sizeof(*inspected_port), GFP_KERNEL); 376 if (!inspected_port) { 377 err = -ENOMEM; 378 goto err_inspected_port_alloc; 379 } 380 inspected_port->local_port = port->local_port; 381 inspected_port->type = type; 382 list_add_tail(&inspected_port->list, &span_entry->bound_ports_list); 383 384 return 0; 385 386 err_mpar_reg_write: 387 err_inspected_port_alloc: 388 if (type == MLXSW_SP_SPAN_EGRESS) { 389 mlxsw_reg_sbib_pack(sbib_pl, port->local_port, 0); 390 mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(sbib), sbib_pl); 391 } 392 return err; 393 } 394 395 static void 396 mlxsw_sp_span_inspected_port_unbind(struct mlxsw_sp_port *port, 397 struct mlxsw_sp_span_entry *span_entry, 398 enum mlxsw_sp_span_type type) 399 { 400 struct mlxsw_sp_span_inspected_port *inspected_port; 401 struct mlxsw_sp *mlxsw_sp = port->mlxsw_sp; 402 char mpar_pl[MLXSW_REG_MPAR_LEN]; 403 char sbib_pl[MLXSW_REG_SBIB_LEN]; 404 int pa_id = span_entry->id; 405 406 inspected_port = mlxsw_sp_span_entry_bound_port_find(port, span_entry); 407 if (!inspected_port) 408 return; 409 410 /* remove the inspected port */ 411 mlxsw_reg_mpar_pack(mpar_pl, port->local_port, 412 (enum mlxsw_reg_mpar_i_e) type, false, pa_id); 413 mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(mpar), mpar_pl); 414 415 /* remove the SBIB buffer if it was egress SPAN */ 416 if (type == MLXSW_SP_SPAN_EGRESS) { 417 mlxsw_reg_sbib_pack(sbib_pl, port->local_port, 0); 418 mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(sbib), sbib_pl); 419 } 420 421 mlxsw_sp_span_entry_put(mlxsw_sp, span_entry); 422 423 list_del(&inspected_port->list); 424 kfree(inspected_port); 425 } 426 427 static int mlxsw_sp_span_mirror_add(struct mlxsw_sp_port *from, 428 struct mlxsw_sp_port *to, 429 enum mlxsw_sp_span_type type) 430 { 431 struct mlxsw_sp *mlxsw_sp = from->mlxsw_sp; 432 struct mlxsw_sp_span_entry *span_entry; 433 int err; 434 435 span_entry = mlxsw_sp_span_entry_get(to); 436 if (!span_entry) 437 return -ENOENT; 438 439 netdev_dbg(from->dev, "Adding inspected port to SPAN entry %d\n", 440 span_entry->id); 441 442 err = mlxsw_sp_span_inspected_port_bind(from, span_entry, type); 443 if (err) 444 goto err_port_bind; 445 446 return 0; 447 448 err_port_bind: 449 mlxsw_sp_span_entry_put(mlxsw_sp, span_entry); 450 return err; 451 } 452 453 static void mlxsw_sp_span_mirror_remove(struct mlxsw_sp_port *from, 454 struct mlxsw_sp_port *to, 455 enum mlxsw_sp_span_type type) 456 { 457 struct mlxsw_sp_span_entry *span_entry; 458 459 span_entry = mlxsw_sp_span_entry_find(to); 460 if (!span_entry) { 461 netdev_err(from->dev, "no span entry found\n"); 462 return; 463 } 464 465 netdev_dbg(from->dev, "removing inspected port from SPAN entry %d\n", 466 span_entry->id); 467 mlxsw_sp_span_inspected_port_unbind(from, span_entry, type); 468 } 469 470 static int mlxsw_sp_port_admin_status_set(struct mlxsw_sp_port *mlxsw_sp_port, 471 bool is_up) 472 { 473 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp; 474 char paos_pl[MLXSW_REG_PAOS_LEN]; 475 476 mlxsw_reg_paos_pack(paos_pl, mlxsw_sp_port->local_port, 477 is_up ? MLXSW_PORT_ADMIN_STATUS_UP : 478 MLXSW_PORT_ADMIN_STATUS_DOWN); 479 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(paos), paos_pl); 480 } 481 482 static int mlxsw_sp_port_dev_addr_set(struct mlxsw_sp_port *mlxsw_sp_port, 483 unsigned char *addr) 484 { 485 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp; 486 char ppad_pl[MLXSW_REG_PPAD_LEN]; 487 488 mlxsw_reg_ppad_pack(ppad_pl, true, mlxsw_sp_port->local_port); 489 mlxsw_reg_ppad_mac_memcpy_to(ppad_pl, addr); 490 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(ppad), ppad_pl); 491 } 492 493 static int mlxsw_sp_port_dev_addr_init(struct mlxsw_sp_port *mlxsw_sp_port) 494 { 495 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp; 496 unsigned char *addr = mlxsw_sp_port->dev->dev_addr; 497 498 ether_addr_copy(addr, mlxsw_sp->base_mac); 499 addr[ETH_ALEN - 1] += mlxsw_sp_port->local_port; 500 return mlxsw_sp_port_dev_addr_set(mlxsw_sp_port, addr); 501 } 502 503 static int mlxsw_sp_port_mtu_set(struct mlxsw_sp_port *mlxsw_sp_port, u16 mtu) 504 { 505 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp; 506 char pmtu_pl[MLXSW_REG_PMTU_LEN]; 507 int max_mtu; 508 int err; 509 510 mtu += MLXSW_TXHDR_LEN + ETH_HLEN; 511 mlxsw_reg_pmtu_pack(pmtu_pl, mlxsw_sp_port->local_port, 0); 512 err = mlxsw_reg_query(mlxsw_sp->core, MLXSW_REG(pmtu), pmtu_pl); 513 if (err) 514 return err; 515 max_mtu = mlxsw_reg_pmtu_max_mtu_get(pmtu_pl); 516 517 if (mtu > max_mtu) 518 return -EINVAL; 519 520 mlxsw_reg_pmtu_pack(pmtu_pl, mlxsw_sp_port->local_port, mtu); 521 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(pmtu), pmtu_pl); 522 } 523 524 static int __mlxsw_sp_port_swid_set(struct mlxsw_sp *mlxsw_sp, u8 local_port, 525 u8 swid) 526 { 527 char pspa_pl[MLXSW_REG_PSPA_LEN]; 528 529 mlxsw_reg_pspa_pack(pspa_pl, swid, local_port); 530 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(pspa), pspa_pl); 531 } 532 533 static int mlxsw_sp_port_swid_set(struct mlxsw_sp_port *mlxsw_sp_port, u8 swid) 534 { 535 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp; 536 537 return __mlxsw_sp_port_swid_set(mlxsw_sp, mlxsw_sp_port->local_port, 538 swid); 539 } 540 541 static int mlxsw_sp_port_vp_mode_set(struct mlxsw_sp_port *mlxsw_sp_port, 542 bool enable) 543 { 544 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp; 545 char svpe_pl[MLXSW_REG_SVPE_LEN]; 546 547 mlxsw_reg_svpe_pack(svpe_pl, mlxsw_sp_port->local_port, enable); 548 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(svpe), svpe_pl); 549 } 550 551 int mlxsw_sp_port_vid_to_fid_set(struct mlxsw_sp_port *mlxsw_sp_port, 552 enum mlxsw_reg_svfa_mt mt, bool valid, u16 fid, 553 u16 vid) 554 { 555 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp; 556 char svfa_pl[MLXSW_REG_SVFA_LEN]; 557 558 mlxsw_reg_svfa_pack(svfa_pl, mlxsw_sp_port->local_port, mt, valid, 559 fid, vid); 560 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(svfa), svfa_pl); 561 } 562 563 int __mlxsw_sp_port_vid_learning_set(struct mlxsw_sp_port *mlxsw_sp_port, 564 u16 vid_begin, u16 vid_end, 565 bool learn_enable) 566 { 567 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp; 568 char *spvmlr_pl; 569 int err; 570 571 spvmlr_pl = kmalloc(MLXSW_REG_SPVMLR_LEN, GFP_KERNEL); 572 if (!spvmlr_pl) 573 return -ENOMEM; 574 mlxsw_reg_spvmlr_pack(spvmlr_pl, mlxsw_sp_port->local_port, vid_begin, 575 vid_end, learn_enable); 576 err = mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(spvmlr), spvmlr_pl); 577 kfree(spvmlr_pl); 578 return err; 579 } 580 581 static int mlxsw_sp_port_vid_learning_set(struct mlxsw_sp_port *mlxsw_sp_port, 582 u16 vid, bool learn_enable) 583 { 584 return __mlxsw_sp_port_vid_learning_set(mlxsw_sp_port, vid, vid, 585 learn_enable); 586 } 587 588 static int 589 mlxsw_sp_port_system_port_mapping_set(struct mlxsw_sp_port *mlxsw_sp_port) 590 { 591 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp; 592 char sspr_pl[MLXSW_REG_SSPR_LEN]; 593 594 mlxsw_reg_sspr_pack(sspr_pl, mlxsw_sp_port->local_port); 595 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(sspr), sspr_pl); 596 } 597 598 static int mlxsw_sp_port_module_info_get(struct mlxsw_sp *mlxsw_sp, 599 u8 local_port, u8 *p_module, 600 u8 *p_width, u8 *p_lane) 601 { 602 char pmlp_pl[MLXSW_REG_PMLP_LEN]; 603 int err; 604 605 mlxsw_reg_pmlp_pack(pmlp_pl, local_port); 606 err = mlxsw_reg_query(mlxsw_sp->core, MLXSW_REG(pmlp), pmlp_pl); 607 if (err) 608 return err; 609 *p_module = mlxsw_reg_pmlp_module_get(pmlp_pl, 0); 610 *p_width = mlxsw_reg_pmlp_width_get(pmlp_pl); 611 *p_lane = mlxsw_reg_pmlp_tx_lane_get(pmlp_pl, 0); 612 return 0; 613 } 614 615 static int mlxsw_sp_port_module_map(struct mlxsw_sp *mlxsw_sp, u8 local_port, 616 u8 module, u8 width, u8 lane) 617 { 618 char pmlp_pl[MLXSW_REG_PMLP_LEN]; 619 int i; 620 621 mlxsw_reg_pmlp_pack(pmlp_pl, local_port); 622 mlxsw_reg_pmlp_width_set(pmlp_pl, width); 623 for (i = 0; i < width; i++) { 624 mlxsw_reg_pmlp_module_set(pmlp_pl, i, module); 625 mlxsw_reg_pmlp_tx_lane_set(pmlp_pl, i, lane + i); /* Rx & Tx */ 626 } 627 628 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(pmlp), pmlp_pl); 629 } 630 631 static int mlxsw_sp_port_module_unmap(struct mlxsw_sp *mlxsw_sp, u8 local_port) 632 { 633 char pmlp_pl[MLXSW_REG_PMLP_LEN]; 634 635 mlxsw_reg_pmlp_pack(pmlp_pl, local_port); 636 mlxsw_reg_pmlp_width_set(pmlp_pl, 0); 637 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(pmlp), pmlp_pl); 638 } 639 640 static int mlxsw_sp_port_open(struct net_device *dev) 641 { 642 struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev); 643 int err; 644 645 err = mlxsw_sp_port_admin_status_set(mlxsw_sp_port, true); 646 if (err) 647 return err; 648 netif_start_queue(dev); 649 return 0; 650 } 651 652 static int mlxsw_sp_port_stop(struct net_device *dev) 653 { 654 struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev); 655 656 netif_stop_queue(dev); 657 return mlxsw_sp_port_admin_status_set(mlxsw_sp_port, false); 658 } 659 660 static netdev_tx_t mlxsw_sp_port_xmit(struct sk_buff *skb, 661 struct net_device *dev) 662 { 663 struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev); 664 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp; 665 struct mlxsw_sp_port_pcpu_stats *pcpu_stats; 666 const struct mlxsw_tx_info tx_info = { 667 .local_port = mlxsw_sp_port->local_port, 668 .is_emad = false, 669 }; 670 u64 len; 671 int err; 672 673 if (mlxsw_core_skb_transmit_busy(mlxsw_sp->core, &tx_info)) 674 return NETDEV_TX_BUSY; 675 676 if (unlikely(skb_headroom(skb) < MLXSW_TXHDR_LEN)) { 677 struct sk_buff *skb_orig = skb; 678 679 skb = skb_realloc_headroom(skb, MLXSW_TXHDR_LEN); 680 if (!skb) { 681 this_cpu_inc(mlxsw_sp_port->pcpu_stats->tx_dropped); 682 dev_kfree_skb_any(skb_orig); 683 return NETDEV_TX_OK; 684 } 685 } 686 687 if (eth_skb_pad(skb)) { 688 this_cpu_inc(mlxsw_sp_port->pcpu_stats->tx_dropped); 689 return NETDEV_TX_OK; 690 } 691 692 mlxsw_sp_txhdr_construct(skb, &tx_info); 693 /* TX header is consumed by HW on the way so we shouldn't count its 694 * bytes as being sent. 695 */ 696 len = skb->len - MLXSW_TXHDR_LEN; 697 698 /* Due to a race we might fail here because of a full queue. In that 699 * unlikely case we simply drop the packet. 700 */ 701 err = mlxsw_core_skb_transmit(mlxsw_sp->core, skb, &tx_info); 702 703 if (!err) { 704 pcpu_stats = this_cpu_ptr(mlxsw_sp_port->pcpu_stats); 705 u64_stats_update_begin(&pcpu_stats->syncp); 706 pcpu_stats->tx_packets++; 707 pcpu_stats->tx_bytes += len; 708 u64_stats_update_end(&pcpu_stats->syncp); 709 } else { 710 this_cpu_inc(mlxsw_sp_port->pcpu_stats->tx_dropped); 711 dev_kfree_skb_any(skb); 712 } 713 return NETDEV_TX_OK; 714 } 715 716 static void mlxsw_sp_set_rx_mode(struct net_device *dev) 717 { 718 } 719 720 static int mlxsw_sp_port_set_mac_address(struct net_device *dev, void *p) 721 { 722 struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev); 723 struct sockaddr *addr = p; 724 int err; 725 726 if (!is_valid_ether_addr(addr->sa_data)) 727 return -EADDRNOTAVAIL; 728 729 err = mlxsw_sp_port_dev_addr_set(mlxsw_sp_port, addr->sa_data); 730 if (err) 731 return err; 732 memcpy(dev->dev_addr, addr->sa_data, dev->addr_len); 733 return 0; 734 } 735 736 static void mlxsw_sp_pg_buf_pack(char *pbmc_pl, int pg_index, int mtu, 737 bool pause_en, bool pfc_en, u16 delay) 738 { 739 u16 pg_size = 2 * MLXSW_SP_BYTES_TO_CELLS(mtu); 740 741 delay = pfc_en ? mlxsw_sp_pfc_delay_get(mtu, delay) : 742 MLXSW_SP_PAUSE_DELAY; 743 744 if (pause_en || pfc_en) 745 mlxsw_reg_pbmc_lossless_buffer_pack(pbmc_pl, pg_index, 746 pg_size + delay, pg_size); 747 else 748 mlxsw_reg_pbmc_lossy_buffer_pack(pbmc_pl, pg_index, pg_size); 749 } 750 751 int __mlxsw_sp_port_headroom_set(struct mlxsw_sp_port *mlxsw_sp_port, int mtu, 752 u8 *prio_tc, bool pause_en, 753 struct ieee_pfc *my_pfc) 754 { 755 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp; 756 u8 pfc_en = !!my_pfc ? my_pfc->pfc_en : 0; 757 u16 delay = !!my_pfc ? my_pfc->delay : 0; 758 char pbmc_pl[MLXSW_REG_PBMC_LEN]; 759 int i, j, err; 760 761 mlxsw_reg_pbmc_pack(pbmc_pl, mlxsw_sp_port->local_port, 0, 0); 762 err = mlxsw_reg_query(mlxsw_sp->core, MLXSW_REG(pbmc), pbmc_pl); 763 if (err) 764 return err; 765 766 for (i = 0; i < IEEE_8021QAZ_MAX_TCS; i++) { 767 bool configure = false; 768 bool pfc = false; 769 770 for (j = 0; j < IEEE_8021QAZ_MAX_TCS; j++) { 771 if (prio_tc[j] == i) { 772 pfc = pfc_en & BIT(j); 773 configure = true; 774 break; 775 } 776 } 777 778 if (!configure) 779 continue; 780 mlxsw_sp_pg_buf_pack(pbmc_pl, i, mtu, pause_en, pfc, delay); 781 } 782 783 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(pbmc), pbmc_pl); 784 } 785 786 static int mlxsw_sp_port_headroom_set(struct mlxsw_sp_port *mlxsw_sp_port, 787 int mtu, bool pause_en) 788 { 789 u8 def_prio_tc[IEEE_8021QAZ_MAX_TCS] = {0}; 790 bool dcb_en = !!mlxsw_sp_port->dcb.ets; 791 struct ieee_pfc *my_pfc; 792 u8 *prio_tc; 793 794 prio_tc = dcb_en ? mlxsw_sp_port->dcb.ets->prio_tc : def_prio_tc; 795 my_pfc = dcb_en ? mlxsw_sp_port->dcb.pfc : NULL; 796 797 return __mlxsw_sp_port_headroom_set(mlxsw_sp_port, mtu, prio_tc, 798 pause_en, my_pfc); 799 } 800 801 static int mlxsw_sp_port_change_mtu(struct net_device *dev, int mtu) 802 { 803 struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev); 804 bool pause_en = mlxsw_sp_port_is_pause_en(mlxsw_sp_port); 805 int err; 806 807 err = mlxsw_sp_port_headroom_set(mlxsw_sp_port, mtu, pause_en); 808 if (err) 809 return err; 810 err = mlxsw_sp_span_port_mtu_update(mlxsw_sp_port, mtu); 811 if (err) 812 goto err_span_port_mtu_update; 813 err = mlxsw_sp_port_mtu_set(mlxsw_sp_port, mtu); 814 if (err) 815 goto err_port_mtu_set; 816 dev->mtu = mtu; 817 return 0; 818 819 err_port_mtu_set: 820 mlxsw_sp_span_port_mtu_update(mlxsw_sp_port, dev->mtu); 821 err_span_port_mtu_update: 822 mlxsw_sp_port_headroom_set(mlxsw_sp_port, dev->mtu, pause_en); 823 return err; 824 } 825 826 static int 827 mlxsw_sp_port_get_sw_stats64(const struct net_device *dev, 828 struct rtnl_link_stats64 *stats) 829 { 830 struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev); 831 struct mlxsw_sp_port_pcpu_stats *p; 832 u64 rx_packets, rx_bytes, tx_packets, tx_bytes; 833 u32 tx_dropped = 0; 834 unsigned int start; 835 int i; 836 837 for_each_possible_cpu(i) { 838 p = per_cpu_ptr(mlxsw_sp_port->pcpu_stats, i); 839 do { 840 start = u64_stats_fetch_begin_irq(&p->syncp); 841 rx_packets = p->rx_packets; 842 rx_bytes = p->rx_bytes; 843 tx_packets = p->tx_packets; 844 tx_bytes = p->tx_bytes; 845 } while (u64_stats_fetch_retry_irq(&p->syncp, start)); 846 847 stats->rx_packets += rx_packets; 848 stats->rx_bytes += rx_bytes; 849 stats->tx_packets += tx_packets; 850 stats->tx_bytes += tx_bytes; 851 /* tx_dropped is u32, updated without syncp protection. */ 852 tx_dropped += p->tx_dropped; 853 } 854 stats->tx_dropped = tx_dropped; 855 return 0; 856 } 857 858 static bool mlxsw_sp_port_has_offload_stats(int attr_id) 859 { 860 switch (attr_id) { 861 case IFLA_OFFLOAD_XSTATS_CPU_HIT: 862 return true; 863 } 864 865 return false; 866 } 867 868 static int mlxsw_sp_port_get_offload_stats(int attr_id, const struct net_device *dev, 869 void *sp) 870 { 871 switch (attr_id) { 872 case IFLA_OFFLOAD_XSTATS_CPU_HIT: 873 return mlxsw_sp_port_get_sw_stats64(dev, sp); 874 } 875 876 return -EINVAL; 877 } 878 879 static int mlxsw_sp_port_get_stats_raw(struct net_device *dev, int grp, 880 int prio, char *ppcnt_pl) 881 { 882 struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev); 883 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp; 884 885 mlxsw_reg_ppcnt_pack(ppcnt_pl, mlxsw_sp_port->local_port, grp, prio); 886 return mlxsw_reg_query(mlxsw_sp->core, MLXSW_REG(ppcnt), ppcnt_pl); 887 } 888 889 static int mlxsw_sp_port_get_hw_stats(struct net_device *dev, 890 struct rtnl_link_stats64 *stats) 891 { 892 char ppcnt_pl[MLXSW_REG_PPCNT_LEN]; 893 int err; 894 895 err = mlxsw_sp_port_get_stats_raw(dev, MLXSW_REG_PPCNT_IEEE_8023_CNT, 896 0, ppcnt_pl); 897 if (err) 898 goto out; 899 900 stats->tx_packets = 901 mlxsw_reg_ppcnt_a_frames_transmitted_ok_get(ppcnt_pl); 902 stats->rx_packets = 903 mlxsw_reg_ppcnt_a_frames_received_ok_get(ppcnt_pl); 904 stats->tx_bytes = 905 mlxsw_reg_ppcnt_a_octets_transmitted_ok_get(ppcnt_pl); 906 stats->rx_bytes = 907 mlxsw_reg_ppcnt_a_octets_received_ok_get(ppcnt_pl); 908 stats->multicast = 909 mlxsw_reg_ppcnt_a_multicast_frames_received_ok_get(ppcnt_pl); 910 911 stats->rx_crc_errors = 912 mlxsw_reg_ppcnt_a_frame_check_sequence_errors_get(ppcnt_pl); 913 stats->rx_frame_errors = 914 mlxsw_reg_ppcnt_a_alignment_errors_get(ppcnt_pl); 915 916 stats->rx_length_errors = ( 917 mlxsw_reg_ppcnt_a_in_range_length_errors_get(ppcnt_pl) + 918 mlxsw_reg_ppcnt_a_out_of_range_length_field_get(ppcnt_pl) + 919 mlxsw_reg_ppcnt_a_frame_too_long_errors_get(ppcnt_pl)); 920 921 stats->rx_errors = (stats->rx_crc_errors + 922 stats->rx_frame_errors + stats->rx_length_errors); 923 924 out: 925 return err; 926 } 927 928 static void update_stats_cache(struct work_struct *work) 929 { 930 struct mlxsw_sp_port *mlxsw_sp_port = 931 container_of(work, struct mlxsw_sp_port, 932 hw_stats.update_dw.work); 933 934 if (!netif_carrier_ok(mlxsw_sp_port->dev)) 935 goto out; 936 937 mlxsw_sp_port_get_hw_stats(mlxsw_sp_port->dev, 938 mlxsw_sp_port->hw_stats.cache); 939 940 out: 941 mlxsw_core_schedule_dw(&mlxsw_sp_port->hw_stats.update_dw, 942 MLXSW_HW_STATS_UPDATE_TIME); 943 } 944 945 /* Return the stats from a cache that is updated periodically, 946 * as this function might get called in an atomic context. 947 */ 948 static struct rtnl_link_stats64 * 949 mlxsw_sp_port_get_stats64(struct net_device *dev, 950 struct rtnl_link_stats64 *stats) 951 { 952 struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev); 953 954 memcpy(stats, mlxsw_sp_port->hw_stats.cache, sizeof(*stats)); 955 956 return stats; 957 } 958 959 int mlxsw_sp_port_vlan_set(struct mlxsw_sp_port *mlxsw_sp_port, u16 vid_begin, 960 u16 vid_end, bool is_member, bool untagged) 961 { 962 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp; 963 char *spvm_pl; 964 int err; 965 966 spvm_pl = kmalloc(MLXSW_REG_SPVM_LEN, GFP_KERNEL); 967 if (!spvm_pl) 968 return -ENOMEM; 969 970 mlxsw_reg_spvm_pack(spvm_pl, mlxsw_sp_port->local_port, vid_begin, 971 vid_end, is_member, untagged); 972 err = mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(spvm), spvm_pl); 973 kfree(spvm_pl); 974 return err; 975 } 976 977 static int mlxsw_sp_port_vp_mode_trans(struct mlxsw_sp_port *mlxsw_sp_port) 978 { 979 enum mlxsw_reg_svfa_mt mt = MLXSW_REG_SVFA_MT_PORT_VID_TO_FID; 980 u16 vid, last_visited_vid; 981 int err; 982 983 for_each_set_bit(vid, mlxsw_sp_port->active_vlans, VLAN_N_VID) { 984 err = mlxsw_sp_port_vid_to_fid_set(mlxsw_sp_port, mt, true, vid, 985 vid); 986 if (err) { 987 last_visited_vid = vid; 988 goto err_port_vid_to_fid_set; 989 } 990 } 991 992 err = mlxsw_sp_port_vp_mode_set(mlxsw_sp_port, true); 993 if (err) { 994 last_visited_vid = VLAN_N_VID; 995 goto err_port_vid_to_fid_set; 996 } 997 998 return 0; 999 1000 err_port_vid_to_fid_set: 1001 for_each_set_bit(vid, mlxsw_sp_port->active_vlans, last_visited_vid) 1002 mlxsw_sp_port_vid_to_fid_set(mlxsw_sp_port, mt, false, vid, 1003 vid); 1004 return err; 1005 } 1006 1007 static int mlxsw_sp_port_vlan_mode_trans(struct mlxsw_sp_port *mlxsw_sp_port) 1008 { 1009 enum mlxsw_reg_svfa_mt mt = MLXSW_REG_SVFA_MT_PORT_VID_TO_FID; 1010 u16 vid; 1011 int err; 1012 1013 err = mlxsw_sp_port_vp_mode_set(mlxsw_sp_port, false); 1014 if (err) 1015 return err; 1016 1017 for_each_set_bit(vid, mlxsw_sp_port->active_vlans, VLAN_N_VID) { 1018 err = mlxsw_sp_port_vid_to_fid_set(mlxsw_sp_port, mt, false, 1019 vid, vid); 1020 if (err) 1021 return err; 1022 } 1023 1024 return 0; 1025 } 1026 1027 static struct mlxsw_sp_port * 1028 mlxsw_sp_port_vport_create(struct mlxsw_sp_port *mlxsw_sp_port, u16 vid) 1029 { 1030 struct mlxsw_sp_port *mlxsw_sp_vport; 1031 1032 mlxsw_sp_vport = kzalloc(sizeof(*mlxsw_sp_vport), GFP_KERNEL); 1033 if (!mlxsw_sp_vport) 1034 return NULL; 1035 1036 /* dev will be set correctly after the VLAN device is linked 1037 * with the real device. In case of bridge SELF invocation, dev 1038 * will remain as is. 1039 */ 1040 mlxsw_sp_vport->dev = mlxsw_sp_port->dev; 1041 mlxsw_sp_vport->mlxsw_sp = mlxsw_sp_port->mlxsw_sp; 1042 mlxsw_sp_vport->local_port = mlxsw_sp_port->local_port; 1043 mlxsw_sp_vport->stp_state = BR_STATE_FORWARDING; 1044 mlxsw_sp_vport->lagged = mlxsw_sp_port->lagged; 1045 mlxsw_sp_vport->lag_id = mlxsw_sp_port->lag_id; 1046 mlxsw_sp_vport->vport.vid = vid; 1047 1048 list_add(&mlxsw_sp_vport->vport.list, &mlxsw_sp_port->vports_list); 1049 1050 return mlxsw_sp_vport; 1051 } 1052 1053 static void mlxsw_sp_port_vport_destroy(struct mlxsw_sp_port *mlxsw_sp_vport) 1054 { 1055 list_del(&mlxsw_sp_vport->vport.list); 1056 kfree(mlxsw_sp_vport); 1057 } 1058 1059 static int mlxsw_sp_port_add_vid(struct net_device *dev, 1060 __be16 __always_unused proto, u16 vid) 1061 { 1062 struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev); 1063 struct mlxsw_sp_port *mlxsw_sp_vport; 1064 bool untagged = vid == 1; 1065 int err; 1066 1067 /* VLAN 0 is added to HW filter when device goes up, but it is 1068 * reserved in our case, so simply return. 1069 */ 1070 if (!vid) 1071 return 0; 1072 1073 if (mlxsw_sp_port_vport_find(mlxsw_sp_port, vid)) 1074 return 0; 1075 1076 mlxsw_sp_vport = mlxsw_sp_port_vport_create(mlxsw_sp_port, vid); 1077 if (!mlxsw_sp_vport) 1078 return -ENOMEM; 1079 1080 /* When adding the first VLAN interface on a bridged port we need to 1081 * transition all the active 802.1Q bridge VLANs to use explicit 1082 * {Port, VID} to FID mappings and set the port's mode to Virtual mode. 1083 */ 1084 if (list_is_singular(&mlxsw_sp_port->vports_list)) { 1085 err = mlxsw_sp_port_vp_mode_trans(mlxsw_sp_port); 1086 if (err) 1087 goto err_port_vp_mode_trans; 1088 } 1089 1090 err = mlxsw_sp_port_vlan_set(mlxsw_sp_vport, vid, vid, true, untagged); 1091 if (err) 1092 goto err_port_add_vid; 1093 1094 return 0; 1095 1096 err_port_add_vid: 1097 if (list_is_singular(&mlxsw_sp_port->vports_list)) 1098 mlxsw_sp_port_vlan_mode_trans(mlxsw_sp_port); 1099 err_port_vp_mode_trans: 1100 mlxsw_sp_port_vport_destroy(mlxsw_sp_vport); 1101 return err; 1102 } 1103 1104 static int mlxsw_sp_port_kill_vid(struct net_device *dev, 1105 __be16 __always_unused proto, u16 vid) 1106 { 1107 struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev); 1108 struct mlxsw_sp_port *mlxsw_sp_vport; 1109 struct mlxsw_sp_fid *f; 1110 1111 /* VLAN 0 is removed from HW filter when device goes down, but 1112 * it is reserved in our case, so simply return. 1113 */ 1114 if (!vid) 1115 return 0; 1116 1117 mlxsw_sp_vport = mlxsw_sp_port_vport_find(mlxsw_sp_port, vid); 1118 if (WARN_ON(!mlxsw_sp_vport)) 1119 return 0; 1120 1121 mlxsw_sp_port_vlan_set(mlxsw_sp_vport, vid, vid, false, false); 1122 1123 /* Drop FID reference. If this was the last reference the 1124 * resources will be freed. 1125 */ 1126 f = mlxsw_sp_vport_fid_get(mlxsw_sp_vport); 1127 if (f && !WARN_ON(!f->leave)) 1128 f->leave(mlxsw_sp_vport); 1129 1130 /* When removing the last VLAN interface on a bridged port we need to 1131 * transition all active 802.1Q bridge VLANs to use VID to FID 1132 * mappings and set port's mode to VLAN mode. 1133 */ 1134 if (list_is_singular(&mlxsw_sp_port->vports_list)) 1135 mlxsw_sp_port_vlan_mode_trans(mlxsw_sp_port); 1136 1137 mlxsw_sp_port_vport_destroy(mlxsw_sp_vport); 1138 1139 return 0; 1140 } 1141 1142 static int mlxsw_sp_port_get_phys_port_name(struct net_device *dev, char *name, 1143 size_t len) 1144 { 1145 struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev); 1146 u8 module = mlxsw_sp_port->mapping.module; 1147 u8 width = mlxsw_sp_port->mapping.width; 1148 u8 lane = mlxsw_sp_port->mapping.lane; 1149 int err; 1150 1151 if (!mlxsw_sp_port->split) 1152 err = snprintf(name, len, "p%d", module + 1); 1153 else 1154 err = snprintf(name, len, "p%ds%d", module + 1, 1155 lane / width); 1156 1157 if (err >= len) 1158 return -EINVAL; 1159 1160 return 0; 1161 } 1162 1163 static struct mlxsw_sp_port_mall_tc_entry * 1164 mlxsw_sp_port_mirror_entry_find(struct mlxsw_sp_port *port, 1165 unsigned long cookie) { 1166 struct mlxsw_sp_port_mall_tc_entry *mall_tc_entry; 1167 1168 list_for_each_entry(mall_tc_entry, &port->mall_tc_list, list) 1169 if (mall_tc_entry->cookie == cookie) 1170 return mall_tc_entry; 1171 1172 return NULL; 1173 } 1174 1175 static int 1176 mlxsw_sp_port_add_cls_matchall_mirror(struct mlxsw_sp_port *mlxsw_sp_port, 1177 struct tc_cls_matchall_offload *cls, 1178 const struct tc_action *a, 1179 bool ingress) 1180 { 1181 struct mlxsw_sp_port_mall_tc_entry *mall_tc_entry; 1182 struct net *net = dev_net(mlxsw_sp_port->dev); 1183 enum mlxsw_sp_span_type span_type; 1184 struct mlxsw_sp_port *to_port; 1185 struct net_device *to_dev; 1186 int ifindex; 1187 int err; 1188 1189 ifindex = tcf_mirred_ifindex(a); 1190 to_dev = __dev_get_by_index(net, ifindex); 1191 if (!to_dev) { 1192 netdev_err(mlxsw_sp_port->dev, "Could not find requested device\n"); 1193 return -EINVAL; 1194 } 1195 1196 if (!mlxsw_sp_port_dev_check(to_dev)) { 1197 netdev_err(mlxsw_sp_port->dev, "Cannot mirror to a non-spectrum port"); 1198 return -ENOTSUPP; 1199 } 1200 to_port = netdev_priv(to_dev); 1201 1202 mall_tc_entry = kzalloc(sizeof(*mall_tc_entry), GFP_KERNEL); 1203 if (!mall_tc_entry) 1204 return -ENOMEM; 1205 1206 mall_tc_entry->cookie = cls->cookie; 1207 mall_tc_entry->type = MLXSW_SP_PORT_MALL_MIRROR; 1208 mall_tc_entry->mirror.to_local_port = to_port->local_port; 1209 mall_tc_entry->mirror.ingress = ingress; 1210 list_add_tail(&mall_tc_entry->list, &mlxsw_sp_port->mall_tc_list); 1211 1212 span_type = ingress ? MLXSW_SP_SPAN_INGRESS : MLXSW_SP_SPAN_EGRESS; 1213 err = mlxsw_sp_span_mirror_add(mlxsw_sp_port, to_port, span_type); 1214 if (err) 1215 goto err_mirror_add; 1216 return 0; 1217 1218 err_mirror_add: 1219 list_del(&mall_tc_entry->list); 1220 kfree(mall_tc_entry); 1221 return err; 1222 } 1223 1224 static int mlxsw_sp_port_add_cls_matchall(struct mlxsw_sp_port *mlxsw_sp_port, 1225 __be16 protocol, 1226 struct tc_cls_matchall_offload *cls, 1227 bool ingress) 1228 { 1229 const struct tc_action *a; 1230 LIST_HEAD(actions); 1231 int err; 1232 1233 if (!tc_single_action(cls->exts)) { 1234 netdev_err(mlxsw_sp_port->dev, "only singular actions are supported\n"); 1235 return -ENOTSUPP; 1236 } 1237 1238 tcf_exts_to_list(cls->exts, &actions); 1239 list_for_each_entry(a, &actions, list) { 1240 if (!is_tcf_mirred_mirror(a) || protocol != htons(ETH_P_ALL)) 1241 return -ENOTSUPP; 1242 1243 err = mlxsw_sp_port_add_cls_matchall_mirror(mlxsw_sp_port, cls, 1244 a, ingress); 1245 if (err) 1246 return err; 1247 } 1248 1249 return 0; 1250 } 1251 1252 static void mlxsw_sp_port_del_cls_matchall(struct mlxsw_sp_port *mlxsw_sp_port, 1253 struct tc_cls_matchall_offload *cls) 1254 { 1255 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp; 1256 struct mlxsw_sp_port_mall_tc_entry *mall_tc_entry; 1257 enum mlxsw_sp_span_type span_type; 1258 struct mlxsw_sp_port *to_port; 1259 1260 mall_tc_entry = mlxsw_sp_port_mirror_entry_find(mlxsw_sp_port, 1261 cls->cookie); 1262 if (!mall_tc_entry) { 1263 netdev_dbg(mlxsw_sp_port->dev, "tc entry not found on port\n"); 1264 return; 1265 } 1266 1267 switch (mall_tc_entry->type) { 1268 case MLXSW_SP_PORT_MALL_MIRROR: 1269 to_port = mlxsw_sp->ports[mall_tc_entry->mirror.to_local_port]; 1270 span_type = mall_tc_entry->mirror.ingress ? 1271 MLXSW_SP_SPAN_INGRESS : MLXSW_SP_SPAN_EGRESS; 1272 1273 mlxsw_sp_span_mirror_remove(mlxsw_sp_port, to_port, span_type); 1274 break; 1275 default: 1276 WARN_ON(1); 1277 } 1278 1279 list_del(&mall_tc_entry->list); 1280 kfree(mall_tc_entry); 1281 } 1282 1283 static int mlxsw_sp_setup_tc(struct net_device *dev, u32 handle, 1284 __be16 proto, struct tc_to_netdev *tc) 1285 { 1286 struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev); 1287 bool ingress = TC_H_MAJ(handle) == TC_H_MAJ(TC_H_INGRESS); 1288 1289 if (tc->type == TC_SETUP_MATCHALL) { 1290 switch (tc->cls_mall->command) { 1291 case TC_CLSMATCHALL_REPLACE: 1292 return mlxsw_sp_port_add_cls_matchall(mlxsw_sp_port, 1293 proto, 1294 tc->cls_mall, 1295 ingress); 1296 case TC_CLSMATCHALL_DESTROY: 1297 mlxsw_sp_port_del_cls_matchall(mlxsw_sp_port, 1298 tc->cls_mall); 1299 return 0; 1300 default: 1301 return -EINVAL; 1302 } 1303 } 1304 1305 return -ENOTSUPP; 1306 } 1307 1308 static const struct net_device_ops mlxsw_sp_port_netdev_ops = { 1309 .ndo_open = mlxsw_sp_port_open, 1310 .ndo_stop = mlxsw_sp_port_stop, 1311 .ndo_start_xmit = mlxsw_sp_port_xmit, 1312 .ndo_setup_tc = mlxsw_sp_setup_tc, 1313 .ndo_set_rx_mode = mlxsw_sp_set_rx_mode, 1314 .ndo_set_mac_address = mlxsw_sp_port_set_mac_address, 1315 .ndo_change_mtu = mlxsw_sp_port_change_mtu, 1316 .ndo_get_stats64 = mlxsw_sp_port_get_stats64, 1317 .ndo_has_offload_stats = mlxsw_sp_port_has_offload_stats, 1318 .ndo_get_offload_stats = mlxsw_sp_port_get_offload_stats, 1319 .ndo_vlan_rx_add_vid = mlxsw_sp_port_add_vid, 1320 .ndo_vlan_rx_kill_vid = mlxsw_sp_port_kill_vid, 1321 .ndo_neigh_construct = mlxsw_sp_router_neigh_construct, 1322 .ndo_neigh_destroy = mlxsw_sp_router_neigh_destroy, 1323 .ndo_fdb_add = switchdev_port_fdb_add, 1324 .ndo_fdb_del = switchdev_port_fdb_del, 1325 .ndo_fdb_dump = switchdev_port_fdb_dump, 1326 .ndo_bridge_setlink = switchdev_port_bridge_setlink, 1327 .ndo_bridge_getlink = switchdev_port_bridge_getlink, 1328 .ndo_bridge_dellink = switchdev_port_bridge_dellink, 1329 .ndo_get_phys_port_name = mlxsw_sp_port_get_phys_port_name, 1330 }; 1331 1332 static void mlxsw_sp_port_get_drvinfo(struct net_device *dev, 1333 struct ethtool_drvinfo *drvinfo) 1334 { 1335 struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev); 1336 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp; 1337 1338 strlcpy(drvinfo->driver, mlxsw_sp_driver_name, sizeof(drvinfo->driver)); 1339 strlcpy(drvinfo->version, mlxsw_sp_driver_version, 1340 sizeof(drvinfo->version)); 1341 snprintf(drvinfo->fw_version, sizeof(drvinfo->fw_version), 1342 "%d.%d.%d", 1343 mlxsw_sp->bus_info->fw_rev.major, 1344 mlxsw_sp->bus_info->fw_rev.minor, 1345 mlxsw_sp->bus_info->fw_rev.subminor); 1346 strlcpy(drvinfo->bus_info, mlxsw_sp->bus_info->device_name, 1347 sizeof(drvinfo->bus_info)); 1348 } 1349 1350 static void mlxsw_sp_port_get_pauseparam(struct net_device *dev, 1351 struct ethtool_pauseparam *pause) 1352 { 1353 struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev); 1354 1355 pause->rx_pause = mlxsw_sp_port->link.rx_pause; 1356 pause->tx_pause = mlxsw_sp_port->link.tx_pause; 1357 } 1358 1359 static int mlxsw_sp_port_pause_set(struct mlxsw_sp_port *mlxsw_sp_port, 1360 struct ethtool_pauseparam *pause) 1361 { 1362 char pfcc_pl[MLXSW_REG_PFCC_LEN]; 1363 1364 mlxsw_reg_pfcc_pack(pfcc_pl, mlxsw_sp_port->local_port); 1365 mlxsw_reg_pfcc_pprx_set(pfcc_pl, pause->rx_pause); 1366 mlxsw_reg_pfcc_pptx_set(pfcc_pl, pause->tx_pause); 1367 1368 return mlxsw_reg_write(mlxsw_sp_port->mlxsw_sp->core, MLXSW_REG(pfcc), 1369 pfcc_pl); 1370 } 1371 1372 static int mlxsw_sp_port_set_pauseparam(struct net_device *dev, 1373 struct ethtool_pauseparam *pause) 1374 { 1375 struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev); 1376 bool pause_en = pause->tx_pause || pause->rx_pause; 1377 int err; 1378 1379 if (mlxsw_sp_port->dcb.pfc && mlxsw_sp_port->dcb.pfc->pfc_en) { 1380 netdev_err(dev, "PFC already enabled on port\n"); 1381 return -EINVAL; 1382 } 1383 1384 if (pause->autoneg) { 1385 netdev_err(dev, "PAUSE frames autonegotiation isn't supported\n"); 1386 return -EINVAL; 1387 } 1388 1389 err = mlxsw_sp_port_headroom_set(mlxsw_sp_port, dev->mtu, pause_en); 1390 if (err) { 1391 netdev_err(dev, "Failed to configure port's headroom\n"); 1392 return err; 1393 } 1394 1395 err = mlxsw_sp_port_pause_set(mlxsw_sp_port, pause); 1396 if (err) { 1397 netdev_err(dev, "Failed to set PAUSE parameters\n"); 1398 goto err_port_pause_configure; 1399 } 1400 1401 mlxsw_sp_port->link.rx_pause = pause->rx_pause; 1402 mlxsw_sp_port->link.tx_pause = pause->tx_pause; 1403 1404 return 0; 1405 1406 err_port_pause_configure: 1407 pause_en = mlxsw_sp_port_is_pause_en(mlxsw_sp_port); 1408 mlxsw_sp_port_headroom_set(mlxsw_sp_port, dev->mtu, pause_en); 1409 return err; 1410 } 1411 1412 struct mlxsw_sp_port_hw_stats { 1413 char str[ETH_GSTRING_LEN]; 1414 u64 (*getter)(char *payload); 1415 }; 1416 1417 static struct mlxsw_sp_port_hw_stats mlxsw_sp_port_hw_stats[] = { 1418 { 1419 .str = "a_frames_transmitted_ok", 1420 .getter = mlxsw_reg_ppcnt_a_frames_transmitted_ok_get, 1421 }, 1422 { 1423 .str = "a_frames_received_ok", 1424 .getter = mlxsw_reg_ppcnt_a_frames_received_ok_get, 1425 }, 1426 { 1427 .str = "a_frame_check_sequence_errors", 1428 .getter = mlxsw_reg_ppcnt_a_frame_check_sequence_errors_get, 1429 }, 1430 { 1431 .str = "a_alignment_errors", 1432 .getter = mlxsw_reg_ppcnt_a_alignment_errors_get, 1433 }, 1434 { 1435 .str = "a_octets_transmitted_ok", 1436 .getter = mlxsw_reg_ppcnt_a_octets_transmitted_ok_get, 1437 }, 1438 { 1439 .str = "a_octets_received_ok", 1440 .getter = mlxsw_reg_ppcnt_a_octets_received_ok_get, 1441 }, 1442 { 1443 .str = "a_multicast_frames_xmitted_ok", 1444 .getter = mlxsw_reg_ppcnt_a_multicast_frames_xmitted_ok_get, 1445 }, 1446 { 1447 .str = "a_broadcast_frames_xmitted_ok", 1448 .getter = mlxsw_reg_ppcnt_a_broadcast_frames_xmitted_ok_get, 1449 }, 1450 { 1451 .str = "a_multicast_frames_received_ok", 1452 .getter = mlxsw_reg_ppcnt_a_multicast_frames_received_ok_get, 1453 }, 1454 { 1455 .str = "a_broadcast_frames_received_ok", 1456 .getter = mlxsw_reg_ppcnt_a_broadcast_frames_received_ok_get, 1457 }, 1458 { 1459 .str = "a_in_range_length_errors", 1460 .getter = mlxsw_reg_ppcnt_a_in_range_length_errors_get, 1461 }, 1462 { 1463 .str = "a_out_of_range_length_field", 1464 .getter = mlxsw_reg_ppcnt_a_out_of_range_length_field_get, 1465 }, 1466 { 1467 .str = "a_frame_too_long_errors", 1468 .getter = mlxsw_reg_ppcnt_a_frame_too_long_errors_get, 1469 }, 1470 { 1471 .str = "a_symbol_error_during_carrier", 1472 .getter = mlxsw_reg_ppcnt_a_symbol_error_during_carrier_get, 1473 }, 1474 { 1475 .str = "a_mac_control_frames_transmitted", 1476 .getter = mlxsw_reg_ppcnt_a_mac_control_frames_transmitted_get, 1477 }, 1478 { 1479 .str = "a_mac_control_frames_received", 1480 .getter = mlxsw_reg_ppcnt_a_mac_control_frames_received_get, 1481 }, 1482 { 1483 .str = "a_unsupported_opcodes_received", 1484 .getter = mlxsw_reg_ppcnt_a_unsupported_opcodes_received_get, 1485 }, 1486 { 1487 .str = "a_pause_mac_ctrl_frames_received", 1488 .getter = mlxsw_reg_ppcnt_a_pause_mac_ctrl_frames_received_get, 1489 }, 1490 { 1491 .str = "a_pause_mac_ctrl_frames_xmitted", 1492 .getter = mlxsw_reg_ppcnt_a_pause_mac_ctrl_frames_transmitted_get, 1493 }, 1494 }; 1495 1496 #define MLXSW_SP_PORT_HW_STATS_LEN ARRAY_SIZE(mlxsw_sp_port_hw_stats) 1497 1498 static struct mlxsw_sp_port_hw_stats mlxsw_sp_port_hw_prio_stats[] = { 1499 { 1500 .str = "rx_octets_prio", 1501 .getter = mlxsw_reg_ppcnt_rx_octets_get, 1502 }, 1503 { 1504 .str = "rx_frames_prio", 1505 .getter = mlxsw_reg_ppcnt_rx_frames_get, 1506 }, 1507 { 1508 .str = "tx_octets_prio", 1509 .getter = mlxsw_reg_ppcnt_tx_octets_get, 1510 }, 1511 { 1512 .str = "tx_frames_prio", 1513 .getter = mlxsw_reg_ppcnt_tx_frames_get, 1514 }, 1515 { 1516 .str = "rx_pause_prio", 1517 .getter = mlxsw_reg_ppcnt_rx_pause_get, 1518 }, 1519 { 1520 .str = "rx_pause_duration_prio", 1521 .getter = mlxsw_reg_ppcnt_rx_pause_duration_get, 1522 }, 1523 { 1524 .str = "tx_pause_prio", 1525 .getter = mlxsw_reg_ppcnt_tx_pause_get, 1526 }, 1527 { 1528 .str = "tx_pause_duration_prio", 1529 .getter = mlxsw_reg_ppcnt_tx_pause_duration_get, 1530 }, 1531 }; 1532 1533 #define MLXSW_SP_PORT_HW_PRIO_STATS_LEN ARRAY_SIZE(mlxsw_sp_port_hw_prio_stats) 1534 1535 static u64 mlxsw_reg_ppcnt_tc_transmit_queue_bytes_get(char *ppcnt_pl) 1536 { 1537 u64 transmit_queue = mlxsw_reg_ppcnt_tc_transmit_queue_get(ppcnt_pl); 1538 1539 return MLXSW_SP_CELLS_TO_BYTES(transmit_queue); 1540 } 1541 1542 static struct mlxsw_sp_port_hw_stats mlxsw_sp_port_hw_tc_stats[] = { 1543 { 1544 .str = "tc_transmit_queue_tc", 1545 .getter = mlxsw_reg_ppcnt_tc_transmit_queue_bytes_get, 1546 }, 1547 { 1548 .str = "tc_no_buffer_discard_uc_tc", 1549 .getter = mlxsw_reg_ppcnt_tc_no_buffer_discard_uc_get, 1550 }, 1551 }; 1552 1553 #define MLXSW_SP_PORT_HW_TC_STATS_LEN ARRAY_SIZE(mlxsw_sp_port_hw_tc_stats) 1554 1555 #define MLXSW_SP_PORT_ETHTOOL_STATS_LEN (MLXSW_SP_PORT_HW_STATS_LEN + \ 1556 (MLXSW_SP_PORT_HW_PRIO_STATS_LEN + \ 1557 MLXSW_SP_PORT_HW_TC_STATS_LEN) * \ 1558 IEEE_8021QAZ_MAX_TCS) 1559 1560 static void mlxsw_sp_port_get_prio_strings(u8 **p, int prio) 1561 { 1562 int i; 1563 1564 for (i = 0; i < MLXSW_SP_PORT_HW_PRIO_STATS_LEN; i++) { 1565 snprintf(*p, ETH_GSTRING_LEN, "%s_%d", 1566 mlxsw_sp_port_hw_prio_stats[i].str, prio); 1567 *p += ETH_GSTRING_LEN; 1568 } 1569 } 1570 1571 static void mlxsw_sp_port_get_tc_strings(u8 **p, int tc) 1572 { 1573 int i; 1574 1575 for (i = 0; i < MLXSW_SP_PORT_HW_TC_STATS_LEN; i++) { 1576 snprintf(*p, ETH_GSTRING_LEN, "%s_%d", 1577 mlxsw_sp_port_hw_tc_stats[i].str, tc); 1578 *p += ETH_GSTRING_LEN; 1579 } 1580 } 1581 1582 static void mlxsw_sp_port_get_strings(struct net_device *dev, 1583 u32 stringset, u8 *data) 1584 { 1585 u8 *p = data; 1586 int i; 1587 1588 switch (stringset) { 1589 case ETH_SS_STATS: 1590 for (i = 0; i < MLXSW_SP_PORT_HW_STATS_LEN; i++) { 1591 memcpy(p, mlxsw_sp_port_hw_stats[i].str, 1592 ETH_GSTRING_LEN); 1593 p += ETH_GSTRING_LEN; 1594 } 1595 1596 for (i = 0; i < IEEE_8021QAZ_MAX_TCS; i++) 1597 mlxsw_sp_port_get_prio_strings(&p, i); 1598 1599 for (i = 0; i < IEEE_8021QAZ_MAX_TCS; i++) 1600 mlxsw_sp_port_get_tc_strings(&p, i); 1601 1602 break; 1603 } 1604 } 1605 1606 static int mlxsw_sp_port_set_phys_id(struct net_device *dev, 1607 enum ethtool_phys_id_state state) 1608 { 1609 struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev); 1610 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp; 1611 char mlcr_pl[MLXSW_REG_MLCR_LEN]; 1612 bool active; 1613 1614 switch (state) { 1615 case ETHTOOL_ID_ACTIVE: 1616 active = true; 1617 break; 1618 case ETHTOOL_ID_INACTIVE: 1619 active = false; 1620 break; 1621 default: 1622 return -EOPNOTSUPP; 1623 } 1624 1625 mlxsw_reg_mlcr_pack(mlcr_pl, mlxsw_sp_port->local_port, active); 1626 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(mlcr), mlcr_pl); 1627 } 1628 1629 static int 1630 mlxsw_sp_get_hw_stats_by_group(struct mlxsw_sp_port_hw_stats **p_hw_stats, 1631 int *p_len, enum mlxsw_reg_ppcnt_grp grp) 1632 { 1633 switch (grp) { 1634 case MLXSW_REG_PPCNT_IEEE_8023_CNT: 1635 *p_hw_stats = mlxsw_sp_port_hw_stats; 1636 *p_len = MLXSW_SP_PORT_HW_STATS_LEN; 1637 break; 1638 case MLXSW_REG_PPCNT_PRIO_CNT: 1639 *p_hw_stats = mlxsw_sp_port_hw_prio_stats; 1640 *p_len = MLXSW_SP_PORT_HW_PRIO_STATS_LEN; 1641 break; 1642 case MLXSW_REG_PPCNT_TC_CNT: 1643 *p_hw_stats = mlxsw_sp_port_hw_tc_stats; 1644 *p_len = MLXSW_SP_PORT_HW_TC_STATS_LEN; 1645 break; 1646 default: 1647 WARN_ON(1); 1648 return -ENOTSUPP; 1649 } 1650 return 0; 1651 } 1652 1653 static void __mlxsw_sp_port_get_stats(struct net_device *dev, 1654 enum mlxsw_reg_ppcnt_grp grp, int prio, 1655 u64 *data, int data_index) 1656 { 1657 struct mlxsw_sp_port_hw_stats *hw_stats; 1658 char ppcnt_pl[MLXSW_REG_PPCNT_LEN]; 1659 int i, len; 1660 int err; 1661 1662 err = mlxsw_sp_get_hw_stats_by_group(&hw_stats, &len, grp); 1663 if (err) 1664 return; 1665 mlxsw_sp_port_get_stats_raw(dev, grp, prio, ppcnt_pl); 1666 for (i = 0; i < len; i++) 1667 data[data_index + i] = hw_stats[i].getter(ppcnt_pl); 1668 } 1669 1670 static void mlxsw_sp_port_get_stats(struct net_device *dev, 1671 struct ethtool_stats *stats, u64 *data) 1672 { 1673 int i, data_index = 0; 1674 1675 /* IEEE 802.3 Counters */ 1676 __mlxsw_sp_port_get_stats(dev, MLXSW_REG_PPCNT_IEEE_8023_CNT, 0, 1677 data, data_index); 1678 data_index = MLXSW_SP_PORT_HW_STATS_LEN; 1679 1680 /* Per-Priority Counters */ 1681 for (i = 0; i < IEEE_8021QAZ_MAX_TCS; i++) { 1682 __mlxsw_sp_port_get_stats(dev, MLXSW_REG_PPCNT_PRIO_CNT, i, 1683 data, data_index); 1684 data_index += MLXSW_SP_PORT_HW_PRIO_STATS_LEN; 1685 } 1686 1687 /* Per-TC Counters */ 1688 for (i = 0; i < IEEE_8021QAZ_MAX_TCS; i++) { 1689 __mlxsw_sp_port_get_stats(dev, MLXSW_REG_PPCNT_TC_CNT, i, 1690 data, data_index); 1691 data_index += MLXSW_SP_PORT_HW_TC_STATS_LEN; 1692 } 1693 } 1694 1695 static int mlxsw_sp_port_get_sset_count(struct net_device *dev, int sset) 1696 { 1697 switch (sset) { 1698 case ETH_SS_STATS: 1699 return MLXSW_SP_PORT_ETHTOOL_STATS_LEN; 1700 default: 1701 return -EOPNOTSUPP; 1702 } 1703 } 1704 1705 struct mlxsw_sp_port_link_mode { 1706 enum ethtool_link_mode_bit_indices mask_ethtool; 1707 u32 mask; 1708 u32 speed; 1709 }; 1710 1711 static const struct mlxsw_sp_port_link_mode mlxsw_sp_port_link_mode[] = { 1712 { 1713 .mask = MLXSW_REG_PTYS_ETH_SPEED_100BASE_T, 1714 .mask_ethtool = ETHTOOL_LINK_MODE_100baseT_Full_BIT, 1715 .speed = SPEED_100, 1716 }, 1717 { 1718 .mask = MLXSW_REG_PTYS_ETH_SPEED_SGMII | 1719 MLXSW_REG_PTYS_ETH_SPEED_1000BASE_KX, 1720 .mask_ethtool = ETHTOOL_LINK_MODE_1000baseKX_Full_BIT, 1721 .speed = SPEED_1000, 1722 }, 1723 { 1724 .mask = MLXSW_REG_PTYS_ETH_SPEED_10GBASE_T, 1725 .mask_ethtool = ETHTOOL_LINK_MODE_10000baseT_Full_BIT, 1726 .speed = SPEED_10000, 1727 }, 1728 { 1729 .mask = MLXSW_REG_PTYS_ETH_SPEED_10GBASE_CX4 | 1730 MLXSW_REG_PTYS_ETH_SPEED_10GBASE_KX4, 1731 .mask_ethtool = ETHTOOL_LINK_MODE_10000baseKX4_Full_BIT, 1732 .speed = SPEED_10000, 1733 }, 1734 { 1735 .mask = MLXSW_REG_PTYS_ETH_SPEED_10GBASE_KR | 1736 MLXSW_REG_PTYS_ETH_SPEED_10GBASE_CR | 1737 MLXSW_REG_PTYS_ETH_SPEED_10GBASE_SR | 1738 MLXSW_REG_PTYS_ETH_SPEED_10GBASE_ER_LR, 1739 .mask_ethtool = ETHTOOL_LINK_MODE_10000baseKR_Full_BIT, 1740 .speed = SPEED_10000, 1741 }, 1742 { 1743 .mask = MLXSW_REG_PTYS_ETH_SPEED_20GBASE_KR2, 1744 .mask_ethtool = ETHTOOL_LINK_MODE_20000baseKR2_Full_BIT, 1745 .speed = SPEED_20000, 1746 }, 1747 { 1748 .mask = MLXSW_REG_PTYS_ETH_SPEED_40GBASE_CR4, 1749 .mask_ethtool = ETHTOOL_LINK_MODE_40000baseCR4_Full_BIT, 1750 .speed = SPEED_40000, 1751 }, 1752 { 1753 .mask = MLXSW_REG_PTYS_ETH_SPEED_40GBASE_KR4, 1754 .mask_ethtool = ETHTOOL_LINK_MODE_40000baseKR4_Full_BIT, 1755 .speed = SPEED_40000, 1756 }, 1757 { 1758 .mask = MLXSW_REG_PTYS_ETH_SPEED_40GBASE_SR4, 1759 .mask_ethtool = ETHTOOL_LINK_MODE_40000baseSR4_Full_BIT, 1760 .speed = SPEED_40000, 1761 }, 1762 { 1763 .mask = MLXSW_REG_PTYS_ETH_SPEED_40GBASE_LR4_ER4, 1764 .mask_ethtool = ETHTOOL_LINK_MODE_40000baseLR4_Full_BIT, 1765 .speed = SPEED_40000, 1766 }, 1767 { 1768 .mask = MLXSW_REG_PTYS_ETH_SPEED_25GBASE_CR, 1769 .mask_ethtool = ETHTOOL_LINK_MODE_25000baseCR_Full_BIT, 1770 .speed = SPEED_25000, 1771 }, 1772 { 1773 .mask = MLXSW_REG_PTYS_ETH_SPEED_25GBASE_KR, 1774 .mask_ethtool = ETHTOOL_LINK_MODE_25000baseKR_Full_BIT, 1775 .speed = SPEED_25000, 1776 }, 1777 { 1778 .mask = MLXSW_REG_PTYS_ETH_SPEED_25GBASE_SR, 1779 .mask_ethtool = ETHTOOL_LINK_MODE_25000baseSR_Full_BIT, 1780 .speed = SPEED_25000, 1781 }, 1782 { 1783 .mask = MLXSW_REG_PTYS_ETH_SPEED_25GBASE_SR, 1784 .mask_ethtool = ETHTOOL_LINK_MODE_25000baseSR_Full_BIT, 1785 .speed = SPEED_25000, 1786 }, 1787 { 1788 .mask = MLXSW_REG_PTYS_ETH_SPEED_50GBASE_CR2, 1789 .mask_ethtool = ETHTOOL_LINK_MODE_50000baseCR2_Full_BIT, 1790 .speed = SPEED_50000, 1791 }, 1792 { 1793 .mask = MLXSW_REG_PTYS_ETH_SPEED_50GBASE_KR2, 1794 .mask_ethtool = ETHTOOL_LINK_MODE_50000baseKR2_Full_BIT, 1795 .speed = SPEED_50000, 1796 }, 1797 { 1798 .mask = MLXSW_REG_PTYS_ETH_SPEED_50GBASE_SR2, 1799 .mask_ethtool = ETHTOOL_LINK_MODE_50000baseSR2_Full_BIT, 1800 .speed = SPEED_50000, 1801 }, 1802 { 1803 .mask = MLXSW_REG_PTYS_ETH_SPEED_56GBASE_R4, 1804 .mask_ethtool = ETHTOOL_LINK_MODE_56000baseKR4_Full_BIT, 1805 .speed = SPEED_56000, 1806 }, 1807 { 1808 .mask = MLXSW_REG_PTYS_ETH_SPEED_56GBASE_R4, 1809 .mask_ethtool = ETHTOOL_LINK_MODE_56000baseCR4_Full_BIT, 1810 .speed = SPEED_56000, 1811 }, 1812 { 1813 .mask = MLXSW_REG_PTYS_ETH_SPEED_56GBASE_R4, 1814 .mask_ethtool = ETHTOOL_LINK_MODE_56000baseSR4_Full_BIT, 1815 .speed = SPEED_56000, 1816 }, 1817 { 1818 .mask = MLXSW_REG_PTYS_ETH_SPEED_56GBASE_R4, 1819 .mask_ethtool = ETHTOOL_LINK_MODE_56000baseLR4_Full_BIT, 1820 .speed = SPEED_56000, 1821 }, 1822 { 1823 .mask = MLXSW_REG_PTYS_ETH_SPEED_100GBASE_CR4, 1824 .mask_ethtool = ETHTOOL_LINK_MODE_100000baseCR4_Full_BIT, 1825 .speed = SPEED_100000, 1826 }, 1827 { 1828 .mask = MLXSW_REG_PTYS_ETH_SPEED_100GBASE_SR4, 1829 .mask_ethtool = ETHTOOL_LINK_MODE_100000baseSR4_Full_BIT, 1830 .speed = SPEED_100000, 1831 }, 1832 { 1833 .mask = MLXSW_REG_PTYS_ETH_SPEED_100GBASE_KR4, 1834 .mask_ethtool = ETHTOOL_LINK_MODE_100000baseKR4_Full_BIT, 1835 .speed = SPEED_100000, 1836 }, 1837 { 1838 .mask = MLXSW_REG_PTYS_ETH_SPEED_100GBASE_LR4_ER4, 1839 .mask_ethtool = ETHTOOL_LINK_MODE_100000baseLR4_ER4_Full_BIT, 1840 .speed = SPEED_100000, 1841 }, 1842 }; 1843 1844 #define MLXSW_SP_PORT_LINK_MODE_LEN ARRAY_SIZE(mlxsw_sp_port_link_mode) 1845 1846 static void 1847 mlxsw_sp_from_ptys_supported_port(u32 ptys_eth_proto, 1848 struct ethtool_link_ksettings *cmd) 1849 { 1850 if (ptys_eth_proto & (MLXSW_REG_PTYS_ETH_SPEED_10GBASE_CR | 1851 MLXSW_REG_PTYS_ETH_SPEED_10GBASE_SR | 1852 MLXSW_REG_PTYS_ETH_SPEED_40GBASE_CR4 | 1853 MLXSW_REG_PTYS_ETH_SPEED_40GBASE_SR4 | 1854 MLXSW_REG_PTYS_ETH_SPEED_100GBASE_SR4 | 1855 MLXSW_REG_PTYS_ETH_SPEED_SGMII)) 1856 ethtool_link_ksettings_add_link_mode(cmd, supported, FIBRE); 1857 1858 if (ptys_eth_proto & (MLXSW_REG_PTYS_ETH_SPEED_10GBASE_KR | 1859 MLXSW_REG_PTYS_ETH_SPEED_10GBASE_KX4 | 1860 MLXSW_REG_PTYS_ETH_SPEED_40GBASE_KR4 | 1861 MLXSW_REG_PTYS_ETH_SPEED_100GBASE_KR4 | 1862 MLXSW_REG_PTYS_ETH_SPEED_1000BASE_KX)) 1863 ethtool_link_ksettings_add_link_mode(cmd, supported, Backplane); 1864 } 1865 1866 static void mlxsw_sp_from_ptys_link(u32 ptys_eth_proto, unsigned long *mode) 1867 { 1868 int i; 1869 1870 for (i = 0; i < MLXSW_SP_PORT_LINK_MODE_LEN; i++) { 1871 if (ptys_eth_proto & mlxsw_sp_port_link_mode[i].mask) 1872 __set_bit(mlxsw_sp_port_link_mode[i].mask_ethtool, 1873 mode); 1874 } 1875 } 1876 1877 static void mlxsw_sp_from_ptys_speed_duplex(bool carrier_ok, u32 ptys_eth_proto, 1878 struct ethtool_link_ksettings *cmd) 1879 { 1880 u32 speed = SPEED_UNKNOWN; 1881 u8 duplex = DUPLEX_UNKNOWN; 1882 int i; 1883 1884 if (!carrier_ok) 1885 goto out; 1886 1887 for (i = 0; i < MLXSW_SP_PORT_LINK_MODE_LEN; i++) { 1888 if (ptys_eth_proto & mlxsw_sp_port_link_mode[i].mask) { 1889 speed = mlxsw_sp_port_link_mode[i].speed; 1890 duplex = DUPLEX_FULL; 1891 break; 1892 } 1893 } 1894 out: 1895 cmd->base.speed = speed; 1896 cmd->base.duplex = duplex; 1897 } 1898 1899 static u8 mlxsw_sp_port_connector_port(u32 ptys_eth_proto) 1900 { 1901 if (ptys_eth_proto & (MLXSW_REG_PTYS_ETH_SPEED_10GBASE_SR | 1902 MLXSW_REG_PTYS_ETH_SPEED_40GBASE_SR4 | 1903 MLXSW_REG_PTYS_ETH_SPEED_100GBASE_SR4 | 1904 MLXSW_REG_PTYS_ETH_SPEED_SGMII)) 1905 return PORT_FIBRE; 1906 1907 if (ptys_eth_proto & (MLXSW_REG_PTYS_ETH_SPEED_10GBASE_CR | 1908 MLXSW_REG_PTYS_ETH_SPEED_40GBASE_CR4 | 1909 MLXSW_REG_PTYS_ETH_SPEED_100GBASE_CR4)) 1910 return PORT_DA; 1911 1912 if (ptys_eth_proto & (MLXSW_REG_PTYS_ETH_SPEED_10GBASE_KR | 1913 MLXSW_REG_PTYS_ETH_SPEED_10GBASE_KX4 | 1914 MLXSW_REG_PTYS_ETH_SPEED_40GBASE_KR4 | 1915 MLXSW_REG_PTYS_ETH_SPEED_100GBASE_KR4)) 1916 return PORT_NONE; 1917 1918 return PORT_OTHER; 1919 } 1920 1921 static u32 1922 mlxsw_sp_to_ptys_advert_link(const struct ethtool_link_ksettings *cmd) 1923 { 1924 u32 ptys_proto = 0; 1925 int i; 1926 1927 for (i = 0; i < MLXSW_SP_PORT_LINK_MODE_LEN; i++) { 1928 if (test_bit(mlxsw_sp_port_link_mode[i].mask_ethtool, 1929 cmd->link_modes.advertising)) 1930 ptys_proto |= mlxsw_sp_port_link_mode[i].mask; 1931 } 1932 return ptys_proto; 1933 } 1934 1935 static u32 mlxsw_sp_to_ptys_speed(u32 speed) 1936 { 1937 u32 ptys_proto = 0; 1938 int i; 1939 1940 for (i = 0; i < MLXSW_SP_PORT_LINK_MODE_LEN; i++) { 1941 if (speed == mlxsw_sp_port_link_mode[i].speed) 1942 ptys_proto |= mlxsw_sp_port_link_mode[i].mask; 1943 } 1944 return ptys_proto; 1945 } 1946 1947 static u32 mlxsw_sp_to_ptys_upper_speed(u32 upper_speed) 1948 { 1949 u32 ptys_proto = 0; 1950 int i; 1951 1952 for (i = 0; i < MLXSW_SP_PORT_LINK_MODE_LEN; i++) { 1953 if (mlxsw_sp_port_link_mode[i].speed <= upper_speed) 1954 ptys_proto |= mlxsw_sp_port_link_mode[i].mask; 1955 } 1956 return ptys_proto; 1957 } 1958 1959 static void mlxsw_sp_port_get_link_supported(u32 eth_proto_cap, 1960 struct ethtool_link_ksettings *cmd) 1961 { 1962 ethtool_link_ksettings_add_link_mode(cmd, supported, Asym_Pause); 1963 ethtool_link_ksettings_add_link_mode(cmd, supported, Autoneg); 1964 ethtool_link_ksettings_add_link_mode(cmd, supported, Pause); 1965 1966 mlxsw_sp_from_ptys_supported_port(eth_proto_cap, cmd); 1967 mlxsw_sp_from_ptys_link(eth_proto_cap, cmd->link_modes.supported); 1968 } 1969 1970 static void mlxsw_sp_port_get_link_advertise(u32 eth_proto_admin, bool autoneg, 1971 struct ethtool_link_ksettings *cmd) 1972 { 1973 if (!autoneg) 1974 return; 1975 1976 ethtool_link_ksettings_add_link_mode(cmd, advertising, Autoneg); 1977 mlxsw_sp_from_ptys_link(eth_proto_admin, cmd->link_modes.advertising); 1978 } 1979 1980 static void 1981 mlxsw_sp_port_get_link_lp_advertise(u32 eth_proto_lp, u8 autoneg_status, 1982 struct ethtool_link_ksettings *cmd) 1983 { 1984 if (autoneg_status != MLXSW_REG_PTYS_AN_STATUS_OK || !eth_proto_lp) 1985 return; 1986 1987 ethtool_link_ksettings_add_link_mode(cmd, lp_advertising, Autoneg); 1988 mlxsw_sp_from_ptys_link(eth_proto_lp, cmd->link_modes.lp_advertising); 1989 } 1990 1991 static int mlxsw_sp_port_get_link_ksettings(struct net_device *dev, 1992 struct ethtool_link_ksettings *cmd) 1993 { 1994 u32 eth_proto_cap, eth_proto_admin, eth_proto_oper, eth_proto_lp; 1995 struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev); 1996 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp; 1997 char ptys_pl[MLXSW_REG_PTYS_LEN]; 1998 u8 autoneg_status; 1999 bool autoneg; 2000 int err; 2001 2002 autoneg = mlxsw_sp_port->link.autoneg; 2003 mlxsw_reg_ptys_pack(ptys_pl, mlxsw_sp_port->local_port, 0); 2004 err = mlxsw_reg_query(mlxsw_sp->core, MLXSW_REG(ptys), ptys_pl); 2005 if (err) 2006 return err; 2007 mlxsw_reg_ptys_unpack(ptys_pl, ð_proto_cap, ð_proto_admin, 2008 ð_proto_oper); 2009 2010 mlxsw_sp_port_get_link_supported(eth_proto_cap, cmd); 2011 2012 mlxsw_sp_port_get_link_advertise(eth_proto_admin, autoneg, cmd); 2013 2014 eth_proto_lp = mlxsw_reg_ptys_eth_proto_lp_advertise_get(ptys_pl); 2015 autoneg_status = mlxsw_reg_ptys_an_status_get(ptys_pl); 2016 mlxsw_sp_port_get_link_lp_advertise(eth_proto_lp, autoneg_status, cmd); 2017 2018 cmd->base.autoneg = autoneg ? AUTONEG_ENABLE : AUTONEG_DISABLE; 2019 cmd->base.port = mlxsw_sp_port_connector_port(eth_proto_oper); 2020 mlxsw_sp_from_ptys_speed_duplex(netif_carrier_ok(dev), eth_proto_oper, 2021 cmd); 2022 2023 return 0; 2024 } 2025 2026 static int 2027 mlxsw_sp_port_set_link_ksettings(struct net_device *dev, 2028 const struct ethtool_link_ksettings *cmd) 2029 { 2030 struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev); 2031 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp; 2032 char ptys_pl[MLXSW_REG_PTYS_LEN]; 2033 u32 eth_proto_cap, eth_proto_new; 2034 bool autoneg; 2035 int err; 2036 2037 mlxsw_reg_ptys_pack(ptys_pl, mlxsw_sp_port->local_port, 0); 2038 err = mlxsw_reg_query(mlxsw_sp->core, MLXSW_REG(ptys), ptys_pl); 2039 if (err) 2040 return err; 2041 mlxsw_reg_ptys_unpack(ptys_pl, ð_proto_cap, NULL, NULL); 2042 2043 autoneg = cmd->base.autoneg == AUTONEG_ENABLE; 2044 eth_proto_new = autoneg ? 2045 mlxsw_sp_to_ptys_advert_link(cmd) : 2046 mlxsw_sp_to_ptys_speed(cmd->base.speed); 2047 2048 eth_proto_new = eth_proto_new & eth_proto_cap; 2049 if (!eth_proto_new) { 2050 netdev_err(dev, "No supported speed requested\n"); 2051 return -EINVAL; 2052 } 2053 2054 mlxsw_reg_ptys_pack(ptys_pl, mlxsw_sp_port->local_port, eth_proto_new); 2055 err = mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(ptys), ptys_pl); 2056 if (err) 2057 return err; 2058 2059 if (!netif_running(dev)) 2060 return 0; 2061 2062 mlxsw_sp_port->link.autoneg = autoneg; 2063 2064 mlxsw_sp_port_admin_status_set(mlxsw_sp_port, false); 2065 mlxsw_sp_port_admin_status_set(mlxsw_sp_port, true); 2066 2067 return 0; 2068 } 2069 2070 static const struct ethtool_ops mlxsw_sp_port_ethtool_ops = { 2071 .get_drvinfo = mlxsw_sp_port_get_drvinfo, 2072 .get_link = ethtool_op_get_link, 2073 .get_pauseparam = mlxsw_sp_port_get_pauseparam, 2074 .set_pauseparam = mlxsw_sp_port_set_pauseparam, 2075 .get_strings = mlxsw_sp_port_get_strings, 2076 .set_phys_id = mlxsw_sp_port_set_phys_id, 2077 .get_ethtool_stats = mlxsw_sp_port_get_stats, 2078 .get_sset_count = mlxsw_sp_port_get_sset_count, 2079 .get_link_ksettings = mlxsw_sp_port_get_link_ksettings, 2080 .set_link_ksettings = mlxsw_sp_port_set_link_ksettings, 2081 }; 2082 2083 static int 2084 mlxsw_sp_port_speed_by_width_set(struct mlxsw_sp_port *mlxsw_sp_port, u8 width) 2085 { 2086 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp; 2087 u32 upper_speed = MLXSW_SP_PORT_BASE_SPEED * width; 2088 char ptys_pl[MLXSW_REG_PTYS_LEN]; 2089 u32 eth_proto_admin; 2090 2091 eth_proto_admin = mlxsw_sp_to_ptys_upper_speed(upper_speed); 2092 mlxsw_reg_ptys_pack(ptys_pl, mlxsw_sp_port->local_port, 2093 eth_proto_admin); 2094 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(ptys), ptys_pl); 2095 } 2096 2097 int mlxsw_sp_port_ets_set(struct mlxsw_sp_port *mlxsw_sp_port, 2098 enum mlxsw_reg_qeec_hr hr, u8 index, u8 next_index, 2099 bool dwrr, u8 dwrr_weight) 2100 { 2101 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp; 2102 char qeec_pl[MLXSW_REG_QEEC_LEN]; 2103 2104 mlxsw_reg_qeec_pack(qeec_pl, mlxsw_sp_port->local_port, hr, index, 2105 next_index); 2106 mlxsw_reg_qeec_de_set(qeec_pl, true); 2107 mlxsw_reg_qeec_dwrr_set(qeec_pl, dwrr); 2108 mlxsw_reg_qeec_dwrr_weight_set(qeec_pl, dwrr_weight); 2109 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(qeec), qeec_pl); 2110 } 2111 2112 int mlxsw_sp_port_ets_maxrate_set(struct mlxsw_sp_port *mlxsw_sp_port, 2113 enum mlxsw_reg_qeec_hr hr, u8 index, 2114 u8 next_index, u32 maxrate) 2115 { 2116 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp; 2117 char qeec_pl[MLXSW_REG_QEEC_LEN]; 2118 2119 mlxsw_reg_qeec_pack(qeec_pl, mlxsw_sp_port->local_port, hr, index, 2120 next_index); 2121 mlxsw_reg_qeec_mase_set(qeec_pl, true); 2122 mlxsw_reg_qeec_max_shaper_rate_set(qeec_pl, maxrate); 2123 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(qeec), qeec_pl); 2124 } 2125 2126 int mlxsw_sp_port_prio_tc_set(struct mlxsw_sp_port *mlxsw_sp_port, 2127 u8 switch_prio, u8 tclass) 2128 { 2129 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp; 2130 char qtct_pl[MLXSW_REG_QTCT_LEN]; 2131 2132 mlxsw_reg_qtct_pack(qtct_pl, mlxsw_sp_port->local_port, switch_prio, 2133 tclass); 2134 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(qtct), qtct_pl); 2135 } 2136 2137 static int mlxsw_sp_port_ets_init(struct mlxsw_sp_port *mlxsw_sp_port) 2138 { 2139 int err, i; 2140 2141 /* Setup the elements hierarcy, so that each TC is linked to 2142 * one subgroup, which are all member in the same group. 2143 */ 2144 err = mlxsw_sp_port_ets_set(mlxsw_sp_port, 2145 MLXSW_REG_QEEC_HIERARCY_GROUP, 0, 0, false, 2146 0); 2147 if (err) 2148 return err; 2149 for (i = 0; i < IEEE_8021QAZ_MAX_TCS; i++) { 2150 err = mlxsw_sp_port_ets_set(mlxsw_sp_port, 2151 MLXSW_REG_QEEC_HIERARCY_SUBGROUP, i, 2152 0, false, 0); 2153 if (err) 2154 return err; 2155 } 2156 for (i = 0; i < IEEE_8021QAZ_MAX_TCS; i++) { 2157 err = mlxsw_sp_port_ets_set(mlxsw_sp_port, 2158 MLXSW_REG_QEEC_HIERARCY_TC, i, i, 2159 false, 0); 2160 if (err) 2161 return err; 2162 } 2163 2164 /* Make sure the max shaper is disabled in all hierarcies that 2165 * support it. 2166 */ 2167 err = mlxsw_sp_port_ets_maxrate_set(mlxsw_sp_port, 2168 MLXSW_REG_QEEC_HIERARCY_PORT, 0, 0, 2169 MLXSW_REG_QEEC_MAS_DIS); 2170 if (err) 2171 return err; 2172 for (i = 0; i < IEEE_8021QAZ_MAX_TCS; i++) { 2173 err = mlxsw_sp_port_ets_maxrate_set(mlxsw_sp_port, 2174 MLXSW_REG_QEEC_HIERARCY_SUBGROUP, 2175 i, 0, 2176 MLXSW_REG_QEEC_MAS_DIS); 2177 if (err) 2178 return err; 2179 } 2180 for (i = 0; i < IEEE_8021QAZ_MAX_TCS; i++) { 2181 err = mlxsw_sp_port_ets_maxrate_set(mlxsw_sp_port, 2182 MLXSW_REG_QEEC_HIERARCY_TC, 2183 i, i, 2184 MLXSW_REG_QEEC_MAS_DIS); 2185 if (err) 2186 return err; 2187 } 2188 2189 /* Map all priorities to traffic class 0. */ 2190 for (i = 0; i < IEEE_8021QAZ_MAX_TCS; i++) { 2191 err = mlxsw_sp_port_prio_tc_set(mlxsw_sp_port, i, 0); 2192 if (err) 2193 return err; 2194 } 2195 2196 return 0; 2197 } 2198 2199 static int mlxsw_sp_port_pvid_vport_create(struct mlxsw_sp_port *mlxsw_sp_port) 2200 { 2201 mlxsw_sp_port->pvid = 1; 2202 2203 return mlxsw_sp_port_add_vid(mlxsw_sp_port->dev, 0, 1); 2204 } 2205 2206 static int mlxsw_sp_port_pvid_vport_destroy(struct mlxsw_sp_port *mlxsw_sp_port) 2207 { 2208 return mlxsw_sp_port_kill_vid(mlxsw_sp_port->dev, 0, 1); 2209 } 2210 2211 static int mlxsw_sp_port_create(struct mlxsw_sp *mlxsw_sp, u8 local_port, 2212 bool split, u8 module, u8 width, u8 lane) 2213 { 2214 struct mlxsw_sp_port *mlxsw_sp_port; 2215 struct net_device *dev; 2216 size_t bytes; 2217 int err; 2218 2219 dev = alloc_etherdev(sizeof(struct mlxsw_sp_port)); 2220 if (!dev) 2221 return -ENOMEM; 2222 mlxsw_sp_port = netdev_priv(dev); 2223 mlxsw_sp_port->dev = dev; 2224 mlxsw_sp_port->mlxsw_sp = mlxsw_sp; 2225 mlxsw_sp_port->local_port = local_port; 2226 mlxsw_sp_port->split = split; 2227 mlxsw_sp_port->mapping.module = module; 2228 mlxsw_sp_port->mapping.width = width; 2229 mlxsw_sp_port->mapping.lane = lane; 2230 mlxsw_sp_port->link.autoneg = 1; 2231 bytes = DIV_ROUND_UP(VLAN_N_VID, BITS_PER_BYTE); 2232 mlxsw_sp_port->active_vlans = kzalloc(bytes, GFP_KERNEL); 2233 if (!mlxsw_sp_port->active_vlans) { 2234 err = -ENOMEM; 2235 goto err_port_active_vlans_alloc; 2236 } 2237 mlxsw_sp_port->untagged_vlans = kzalloc(bytes, GFP_KERNEL); 2238 if (!mlxsw_sp_port->untagged_vlans) { 2239 err = -ENOMEM; 2240 goto err_port_untagged_vlans_alloc; 2241 } 2242 INIT_LIST_HEAD(&mlxsw_sp_port->vports_list); 2243 INIT_LIST_HEAD(&mlxsw_sp_port->mall_tc_list); 2244 2245 mlxsw_sp_port->pcpu_stats = 2246 netdev_alloc_pcpu_stats(struct mlxsw_sp_port_pcpu_stats); 2247 if (!mlxsw_sp_port->pcpu_stats) { 2248 err = -ENOMEM; 2249 goto err_alloc_stats; 2250 } 2251 2252 mlxsw_sp_port->hw_stats.cache = 2253 kzalloc(sizeof(*mlxsw_sp_port->hw_stats.cache), GFP_KERNEL); 2254 2255 if (!mlxsw_sp_port->hw_stats.cache) { 2256 err = -ENOMEM; 2257 goto err_alloc_hw_stats; 2258 } 2259 INIT_DELAYED_WORK(&mlxsw_sp_port->hw_stats.update_dw, 2260 &update_stats_cache); 2261 2262 dev->netdev_ops = &mlxsw_sp_port_netdev_ops; 2263 dev->ethtool_ops = &mlxsw_sp_port_ethtool_ops; 2264 2265 err = mlxsw_sp_port_swid_set(mlxsw_sp_port, 0); 2266 if (err) { 2267 dev_err(mlxsw_sp->bus_info->dev, "Port %d: Failed to set SWID\n", 2268 mlxsw_sp_port->local_port); 2269 goto err_port_swid_set; 2270 } 2271 2272 err = mlxsw_sp_port_dev_addr_init(mlxsw_sp_port); 2273 if (err) { 2274 dev_err(mlxsw_sp->bus_info->dev, "Port %d: Unable to init port mac address\n", 2275 mlxsw_sp_port->local_port); 2276 goto err_dev_addr_init; 2277 } 2278 2279 netif_carrier_off(dev); 2280 2281 dev->features |= NETIF_F_NETNS_LOCAL | NETIF_F_LLTX | NETIF_F_SG | 2282 NETIF_F_HW_VLAN_CTAG_FILTER | NETIF_F_HW_TC; 2283 dev->hw_features |= NETIF_F_HW_TC; 2284 2285 /* Each packet needs to have a Tx header (metadata) on top all other 2286 * headers. 2287 */ 2288 dev->needed_headroom = MLXSW_TXHDR_LEN; 2289 2290 err = mlxsw_sp_port_system_port_mapping_set(mlxsw_sp_port); 2291 if (err) { 2292 dev_err(mlxsw_sp->bus_info->dev, "Port %d: Failed to set system port mapping\n", 2293 mlxsw_sp_port->local_port); 2294 goto err_port_system_port_mapping_set; 2295 } 2296 2297 err = mlxsw_sp_port_speed_by_width_set(mlxsw_sp_port, width); 2298 if (err) { 2299 dev_err(mlxsw_sp->bus_info->dev, "Port %d: Failed to enable speeds\n", 2300 mlxsw_sp_port->local_port); 2301 goto err_port_speed_by_width_set; 2302 } 2303 2304 err = mlxsw_sp_port_mtu_set(mlxsw_sp_port, ETH_DATA_LEN); 2305 if (err) { 2306 dev_err(mlxsw_sp->bus_info->dev, "Port %d: Failed to set MTU\n", 2307 mlxsw_sp_port->local_port); 2308 goto err_port_mtu_set; 2309 } 2310 2311 err = mlxsw_sp_port_admin_status_set(mlxsw_sp_port, false); 2312 if (err) 2313 goto err_port_admin_status_set; 2314 2315 err = mlxsw_sp_port_buffers_init(mlxsw_sp_port); 2316 if (err) { 2317 dev_err(mlxsw_sp->bus_info->dev, "Port %d: Failed to initialize buffers\n", 2318 mlxsw_sp_port->local_port); 2319 goto err_port_buffers_init; 2320 } 2321 2322 err = mlxsw_sp_port_ets_init(mlxsw_sp_port); 2323 if (err) { 2324 dev_err(mlxsw_sp->bus_info->dev, "Port %d: Failed to initialize ETS\n", 2325 mlxsw_sp_port->local_port); 2326 goto err_port_ets_init; 2327 } 2328 2329 /* ETS and buffers must be initialized before DCB. */ 2330 err = mlxsw_sp_port_dcb_init(mlxsw_sp_port); 2331 if (err) { 2332 dev_err(mlxsw_sp->bus_info->dev, "Port %d: Failed to initialize DCB\n", 2333 mlxsw_sp_port->local_port); 2334 goto err_port_dcb_init; 2335 } 2336 2337 err = mlxsw_sp_port_pvid_vport_create(mlxsw_sp_port); 2338 if (err) { 2339 dev_err(mlxsw_sp->bus_info->dev, "Port %d: Failed to create PVID vPort\n", 2340 mlxsw_sp_port->local_port); 2341 goto err_port_pvid_vport_create; 2342 } 2343 2344 mlxsw_sp_port_switchdev_init(mlxsw_sp_port); 2345 mlxsw_sp->ports[local_port] = mlxsw_sp_port; 2346 err = register_netdev(dev); 2347 if (err) { 2348 dev_err(mlxsw_sp->bus_info->dev, "Port %d: Failed to register netdev\n", 2349 mlxsw_sp_port->local_port); 2350 goto err_register_netdev; 2351 } 2352 2353 err = mlxsw_core_port_init(mlxsw_sp->core, &mlxsw_sp_port->core_port, 2354 mlxsw_sp_port->local_port, dev, 2355 mlxsw_sp_port->split, module); 2356 if (err) { 2357 dev_err(mlxsw_sp->bus_info->dev, "Port %d: Failed to init core port\n", 2358 mlxsw_sp_port->local_port); 2359 goto err_core_port_init; 2360 } 2361 2362 mlxsw_core_schedule_dw(&mlxsw_sp_port->hw_stats.update_dw, 0); 2363 return 0; 2364 2365 err_core_port_init: 2366 unregister_netdev(dev); 2367 err_register_netdev: 2368 mlxsw_sp->ports[local_port] = NULL; 2369 mlxsw_sp_port_switchdev_fini(mlxsw_sp_port); 2370 mlxsw_sp_port_pvid_vport_destroy(mlxsw_sp_port); 2371 err_port_pvid_vport_create: 2372 mlxsw_sp_port_dcb_fini(mlxsw_sp_port); 2373 err_port_dcb_init: 2374 err_port_ets_init: 2375 err_port_buffers_init: 2376 err_port_admin_status_set: 2377 err_port_mtu_set: 2378 err_port_speed_by_width_set: 2379 err_port_system_port_mapping_set: 2380 err_dev_addr_init: 2381 mlxsw_sp_port_swid_set(mlxsw_sp_port, MLXSW_PORT_SWID_DISABLED_PORT); 2382 err_port_swid_set: 2383 kfree(mlxsw_sp_port->hw_stats.cache); 2384 err_alloc_hw_stats: 2385 free_percpu(mlxsw_sp_port->pcpu_stats); 2386 err_alloc_stats: 2387 kfree(mlxsw_sp_port->untagged_vlans); 2388 err_port_untagged_vlans_alloc: 2389 kfree(mlxsw_sp_port->active_vlans); 2390 err_port_active_vlans_alloc: 2391 free_netdev(dev); 2392 return err; 2393 } 2394 2395 static void mlxsw_sp_port_remove(struct mlxsw_sp *mlxsw_sp, u8 local_port) 2396 { 2397 struct mlxsw_sp_port *mlxsw_sp_port = mlxsw_sp->ports[local_port]; 2398 2399 if (!mlxsw_sp_port) 2400 return; 2401 cancel_delayed_work_sync(&mlxsw_sp_port->hw_stats.update_dw); 2402 mlxsw_core_port_fini(&mlxsw_sp_port->core_port); 2403 unregister_netdev(mlxsw_sp_port->dev); /* This calls ndo_stop */ 2404 mlxsw_sp->ports[local_port] = NULL; 2405 mlxsw_sp_port_switchdev_fini(mlxsw_sp_port); 2406 mlxsw_sp_port_pvid_vport_destroy(mlxsw_sp_port); 2407 mlxsw_sp_port_dcb_fini(mlxsw_sp_port); 2408 mlxsw_sp_port_swid_set(mlxsw_sp_port, MLXSW_PORT_SWID_DISABLED_PORT); 2409 mlxsw_sp_port_module_unmap(mlxsw_sp, mlxsw_sp_port->local_port); 2410 free_percpu(mlxsw_sp_port->pcpu_stats); 2411 kfree(mlxsw_sp_port->hw_stats.cache); 2412 kfree(mlxsw_sp_port->untagged_vlans); 2413 kfree(mlxsw_sp_port->active_vlans); 2414 WARN_ON_ONCE(!list_empty(&mlxsw_sp_port->vports_list)); 2415 free_netdev(mlxsw_sp_port->dev); 2416 } 2417 2418 static void mlxsw_sp_ports_remove(struct mlxsw_sp *mlxsw_sp) 2419 { 2420 int i; 2421 2422 for (i = 1; i < MLXSW_PORT_MAX_PORTS; i++) 2423 mlxsw_sp_port_remove(mlxsw_sp, i); 2424 kfree(mlxsw_sp->ports); 2425 } 2426 2427 static int mlxsw_sp_ports_create(struct mlxsw_sp *mlxsw_sp) 2428 { 2429 u8 module, width, lane; 2430 size_t alloc_size; 2431 int i; 2432 int err; 2433 2434 alloc_size = sizeof(struct mlxsw_sp_port *) * MLXSW_PORT_MAX_PORTS; 2435 mlxsw_sp->ports = kzalloc(alloc_size, GFP_KERNEL); 2436 if (!mlxsw_sp->ports) 2437 return -ENOMEM; 2438 2439 for (i = 1; i < MLXSW_PORT_MAX_PORTS; i++) { 2440 err = mlxsw_sp_port_module_info_get(mlxsw_sp, i, &module, 2441 &width, &lane); 2442 if (err) 2443 goto err_port_module_info_get; 2444 if (!width) 2445 continue; 2446 mlxsw_sp->port_to_module[i] = module; 2447 err = mlxsw_sp_port_create(mlxsw_sp, i, false, module, width, 2448 lane); 2449 if (err) 2450 goto err_port_create; 2451 } 2452 return 0; 2453 2454 err_port_create: 2455 err_port_module_info_get: 2456 for (i--; i >= 1; i--) 2457 mlxsw_sp_port_remove(mlxsw_sp, i); 2458 kfree(mlxsw_sp->ports); 2459 return err; 2460 } 2461 2462 static u8 mlxsw_sp_cluster_base_port_get(u8 local_port) 2463 { 2464 u8 offset = (local_port - 1) % MLXSW_SP_PORTS_PER_CLUSTER_MAX; 2465 2466 return local_port - offset; 2467 } 2468 2469 static int mlxsw_sp_port_split_create(struct mlxsw_sp *mlxsw_sp, u8 base_port, 2470 u8 module, unsigned int count) 2471 { 2472 u8 width = MLXSW_PORT_MODULE_MAX_WIDTH / count; 2473 int err, i; 2474 2475 for (i = 0; i < count; i++) { 2476 err = mlxsw_sp_port_module_map(mlxsw_sp, base_port + i, module, 2477 width, i * width); 2478 if (err) 2479 goto err_port_module_map; 2480 } 2481 2482 for (i = 0; i < count; i++) { 2483 err = __mlxsw_sp_port_swid_set(mlxsw_sp, base_port + i, 0); 2484 if (err) 2485 goto err_port_swid_set; 2486 } 2487 2488 for (i = 0; i < count; i++) { 2489 err = mlxsw_sp_port_create(mlxsw_sp, base_port + i, true, 2490 module, width, i * width); 2491 if (err) 2492 goto err_port_create; 2493 } 2494 2495 return 0; 2496 2497 err_port_create: 2498 for (i--; i >= 0; i--) 2499 mlxsw_sp_port_remove(mlxsw_sp, base_port + i); 2500 i = count; 2501 err_port_swid_set: 2502 for (i--; i >= 0; i--) 2503 __mlxsw_sp_port_swid_set(mlxsw_sp, base_port + i, 2504 MLXSW_PORT_SWID_DISABLED_PORT); 2505 i = count; 2506 err_port_module_map: 2507 for (i--; i >= 0; i--) 2508 mlxsw_sp_port_module_unmap(mlxsw_sp, base_port + i); 2509 return err; 2510 } 2511 2512 static void mlxsw_sp_port_unsplit_create(struct mlxsw_sp *mlxsw_sp, 2513 u8 base_port, unsigned int count) 2514 { 2515 u8 local_port, module, width = MLXSW_PORT_MODULE_MAX_WIDTH; 2516 int i; 2517 2518 /* Split by four means we need to re-create two ports, otherwise 2519 * only one. 2520 */ 2521 count = count / 2; 2522 2523 for (i = 0; i < count; i++) { 2524 local_port = base_port + i * 2; 2525 module = mlxsw_sp->port_to_module[local_port]; 2526 2527 mlxsw_sp_port_module_map(mlxsw_sp, local_port, module, width, 2528 0); 2529 } 2530 2531 for (i = 0; i < count; i++) 2532 __mlxsw_sp_port_swid_set(mlxsw_sp, base_port + i * 2, 0); 2533 2534 for (i = 0; i < count; i++) { 2535 local_port = base_port + i * 2; 2536 module = mlxsw_sp->port_to_module[local_port]; 2537 2538 mlxsw_sp_port_create(mlxsw_sp, local_port, false, module, 2539 width, 0); 2540 } 2541 } 2542 2543 static int mlxsw_sp_port_split(struct mlxsw_core *mlxsw_core, u8 local_port, 2544 unsigned int count) 2545 { 2546 struct mlxsw_sp *mlxsw_sp = mlxsw_core_driver_priv(mlxsw_core); 2547 struct mlxsw_sp_port *mlxsw_sp_port; 2548 u8 module, cur_width, base_port; 2549 int i; 2550 int err; 2551 2552 mlxsw_sp_port = mlxsw_sp->ports[local_port]; 2553 if (!mlxsw_sp_port) { 2554 dev_err(mlxsw_sp->bus_info->dev, "Port number \"%d\" does not exist\n", 2555 local_port); 2556 return -EINVAL; 2557 } 2558 2559 module = mlxsw_sp_port->mapping.module; 2560 cur_width = mlxsw_sp_port->mapping.width; 2561 2562 if (count != 2 && count != 4) { 2563 netdev_err(mlxsw_sp_port->dev, "Port can only be split into 2 or 4 ports\n"); 2564 return -EINVAL; 2565 } 2566 2567 if (cur_width != MLXSW_PORT_MODULE_MAX_WIDTH) { 2568 netdev_err(mlxsw_sp_port->dev, "Port cannot be split further\n"); 2569 return -EINVAL; 2570 } 2571 2572 /* Make sure we have enough slave (even) ports for the split. */ 2573 if (count == 2) { 2574 base_port = local_port; 2575 if (mlxsw_sp->ports[base_port + 1]) { 2576 netdev_err(mlxsw_sp_port->dev, "Invalid split configuration\n"); 2577 return -EINVAL; 2578 } 2579 } else { 2580 base_port = mlxsw_sp_cluster_base_port_get(local_port); 2581 if (mlxsw_sp->ports[base_port + 1] || 2582 mlxsw_sp->ports[base_port + 3]) { 2583 netdev_err(mlxsw_sp_port->dev, "Invalid split configuration\n"); 2584 return -EINVAL; 2585 } 2586 } 2587 2588 for (i = 0; i < count; i++) 2589 mlxsw_sp_port_remove(mlxsw_sp, base_port + i); 2590 2591 err = mlxsw_sp_port_split_create(mlxsw_sp, base_port, module, count); 2592 if (err) { 2593 dev_err(mlxsw_sp->bus_info->dev, "Failed to create split ports\n"); 2594 goto err_port_split_create; 2595 } 2596 2597 return 0; 2598 2599 err_port_split_create: 2600 mlxsw_sp_port_unsplit_create(mlxsw_sp, base_port, count); 2601 return err; 2602 } 2603 2604 static int mlxsw_sp_port_unsplit(struct mlxsw_core *mlxsw_core, u8 local_port) 2605 { 2606 struct mlxsw_sp *mlxsw_sp = mlxsw_core_driver_priv(mlxsw_core); 2607 struct mlxsw_sp_port *mlxsw_sp_port; 2608 u8 cur_width, base_port; 2609 unsigned int count; 2610 int i; 2611 2612 mlxsw_sp_port = mlxsw_sp->ports[local_port]; 2613 if (!mlxsw_sp_port) { 2614 dev_err(mlxsw_sp->bus_info->dev, "Port number \"%d\" does not exist\n", 2615 local_port); 2616 return -EINVAL; 2617 } 2618 2619 if (!mlxsw_sp_port->split) { 2620 netdev_err(mlxsw_sp_port->dev, "Port wasn't split\n"); 2621 return -EINVAL; 2622 } 2623 2624 cur_width = mlxsw_sp_port->mapping.width; 2625 count = cur_width == 1 ? 4 : 2; 2626 2627 base_port = mlxsw_sp_cluster_base_port_get(local_port); 2628 2629 /* Determine which ports to remove. */ 2630 if (count == 2 && local_port >= base_port + 2) 2631 base_port = base_port + 2; 2632 2633 for (i = 0; i < count; i++) 2634 mlxsw_sp_port_remove(mlxsw_sp, base_port + i); 2635 2636 mlxsw_sp_port_unsplit_create(mlxsw_sp, base_port, count); 2637 2638 return 0; 2639 } 2640 2641 static void mlxsw_sp_pude_event_func(const struct mlxsw_reg_info *reg, 2642 char *pude_pl, void *priv) 2643 { 2644 struct mlxsw_sp *mlxsw_sp = priv; 2645 struct mlxsw_sp_port *mlxsw_sp_port; 2646 enum mlxsw_reg_pude_oper_status status; 2647 u8 local_port; 2648 2649 local_port = mlxsw_reg_pude_local_port_get(pude_pl); 2650 mlxsw_sp_port = mlxsw_sp->ports[local_port]; 2651 if (!mlxsw_sp_port) 2652 return; 2653 2654 status = mlxsw_reg_pude_oper_status_get(pude_pl); 2655 if (status == MLXSW_PORT_OPER_STATUS_UP) { 2656 netdev_info(mlxsw_sp_port->dev, "link up\n"); 2657 netif_carrier_on(mlxsw_sp_port->dev); 2658 } else { 2659 netdev_info(mlxsw_sp_port->dev, "link down\n"); 2660 netif_carrier_off(mlxsw_sp_port->dev); 2661 } 2662 } 2663 2664 static struct mlxsw_event_listener mlxsw_sp_pude_event = { 2665 .func = mlxsw_sp_pude_event_func, 2666 .trap_id = MLXSW_TRAP_ID_PUDE, 2667 }; 2668 2669 static int mlxsw_sp_event_register(struct mlxsw_sp *mlxsw_sp, 2670 enum mlxsw_event_trap_id trap_id) 2671 { 2672 struct mlxsw_event_listener *el; 2673 char hpkt_pl[MLXSW_REG_HPKT_LEN]; 2674 int err; 2675 2676 switch (trap_id) { 2677 case MLXSW_TRAP_ID_PUDE: 2678 el = &mlxsw_sp_pude_event; 2679 break; 2680 } 2681 err = mlxsw_core_event_listener_register(mlxsw_sp->core, el, mlxsw_sp); 2682 if (err) 2683 return err; 2684 2685 mlxsw_reg_hpkt_pack(hpkt_pl, MLXSW_REG_HPKT_ACTION_FORWARD, trap_id); 2686 err = mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(hpkt), hpkt_pl); 2687 if (err) 2688 goto err_event_trap_set; 2689 2690 return 0; 2691 2692 err_event_trap_set: 2693 mlxsw_core_event_listener_unregister(mlxsw_sp->core, el, mlxsw_sp); 2694 return err; 2695 } 2696 2697 static void mlxsw_sp_event_unregister(struct mlxsw_sp *mlxsw_sp, 2698 enum mlxsw_event_trap_id trap_id) 2699 { 2700 struct mlxsw_event_listener *el; 2701 2702 switch (trap_id) { 2703 case MLXSW_TRAP_ID_PUDE: 2704 el = &mlxsw_sp_pude_event; 2705 break; 2706 } 2707 mlxsw_core_event_listener_unregister(mlxsw_sp->core, el, mlxsw_sp); 2708 } 2709 2710 static void mlxsw_sp_rx_listener_func(struct sk_buff *skb, u8 local_port, 2711 void *priv) 2712 { 2713 struct mlxsw_sp *mlxsw_sp = priv; 2714 struct mlxsw_sp_port *mlxsw_sp_port = mlxsw_sp->ports[local_port]; 2715 struct mlxsw_sp_port_pcpu_stats *pcpu_stats; 2716 2717 if (unlikely(!mlxsw_sp_port)) { 2718 dev_warn_ratelimited(mlxsw_sp->bus_info->dev, "Port %d: skb received for non-existent port\n", 2719 local_port); 2720 return; 2721 } 2722 2723 skb->dev = mlxsw_sp_port->dev; 2724 2725 pcpu_stats = this_cpu_ptr(mlxsw_sp_port->pcpu_stats); 2726 u64_stats_update_begin(&pcpu_stats->syncp); 2727 pcpu_stats->rx_packets++; 2728 pcpu_stats->rx_bytes += skb->len; 2729 u64_stats_update_end(&pcpu_stats->syncp); 2730 2731 skb->protocol = eth_type_trans(skb, skb->dev); 2732 netif_receive_skb(skb); 2733 } 2734 2735 static void mlxsw_sp_rx_listener_mark_func(struct sk_buff *skb, u8 local_port, 2736 void *priv) 2737 { 2738 skb->offload_fwd_mark = 1; 2739 return mlxsw_sp_rx_listener_func(skb, local_port, priv); 2740 } 2741 2742 #define MLXSW_SP_RXL(_func, _trap_id, _action) \ 2743 { \ 2744 .func = _func, \ 2745 .local_port = MLXSW_PORT_DONT_CARE, \ 2746 .trap_id = MLXSW_TRAP_ID_##_trap_id, \ 2747 .action = MLXSW_REG_HPKT_ACTION_##_action, \ 2748 } 2749 2750 static const struct mlxsw_rx_listener mlxsw_sp_rx_listener[] = { 2751 MLXSW_SP_RXL(mlxsw_sp_rx_listener_func, FDB_MC, TRAP_TO_CPU), 2752 /* Traps for specific L2 packet types, not trapped as FDB MC */ 2753 MLXSW_SP_RXL(mlxsw_sp_rx_listener_func, STP, TRAP_TO_CPU), 2754 MLXSW_SP_RXL(mlxsw_sp_rx_listener_func, LACP, TRAP_TO_CPU), 2755 MLXSW_SP_RXL(mlxsw_sp_rx_listener_func, EAPOL, TRAP_TO_CPU), 2756 MLXSW_SP_RXL(mlxsw_sp_rx_listener_func, LLDP, TRAP_TO_CPU), 2757 MLXSW_SP_RXL(mlxsw_sp_rx_listener_func, MMRP, TRAP_TO_CPU), 2758 MLXSW_SP_RXL(mlxsw_sp_rx_listener_func, MVRP, TRAP_TO_CPU), 2759 MLXSW_SP_RXL(mlxsw_sp_rx_listener_func, RPVST, TRAP_TO_CPU), 2760 MLXSW_SP_RXL(mlxsw_sp_rx_listener_mark_func, DHCP, MIRROR_TO_CPU), 2761 MLXSW_SP_RXL(mlxsw_sp_rx_listener_mark_func, IGMP_QUERY, MIRROR_TO_CPU), 2762 MLXSW_SP_RXL(mlxsw_sp_rx_listener_func, IGMP_V1_REPORT, TRAP_TO_CPU), 2763 MLXSW_SP_RXL(mlxsw_sp_rx_listener_func, IGMP_V2_REPORT, TRAP_TO_CPU), 2764 MLXSW_SP_RXL(mlxsw_sp_rx_listener_func, IGMP_V2_LEAVE, TRAP_TO_CPU), 2765 MLXSW_SP_RXL(mlxsw_sp_rx_listener_func, IGMP_V3_REPORT, TRAP_TO_CPU), 2766 MLXSW_SP_RXL(mlxsw_sp_rx_listener_mark_func, ARPBC, MIRROR_TO_CPU), 2767 MLXSW_SP_RXL(mlxsw_sp_rx_listener_mark_func, ARPUC, MIRROR_TO_CPU), 2768 /* L3 traps */ 2769 MLXSW_SP_RXL(mlxsw_sp_rx_listener_func, MTUERROR, TRAP_TO_CPU), 2770 MLXSW_SP_RXL(mlxsw_sp_rx_listener_func, TTLERROR, TRAP_TO_CPU), 2771 MLXSW_SP_RXL(mlxsw_sp_rx_listener_func, LBERROR, TRAP_TO_CPU), 2772 MLXSW_SP_RXL(mlxsw_sp_rx_listener_mark_func, OSPF, TRAP_TO_CPU), 2773 MLXSW_SP_RXL(mlxsw_sp_rx_listener_func, IP2ME, TRAP_TO_CPU), 2774 MLXSW_SP_RXL(mlxsw_sp_rx_listener_func, RTR_INGRESS0, TRAP_TO_CPU), 2775 MLXSW_SP_RXL(mlxsw_sp_rx_listener_func, HOST_MISS_IPV4, TRAP_TO_CPU), 2776 }; 2777 2778 static int mlxsw_sp_traps_init(struct mlxsw_sp *mlxsw_sp) 2779 { 2780 char htgt_pl[MLXSW_REG_HTGT_LEN]; 2781 char hpkt_pl[MLXSW_REG_HPKT_LEN]; 2782 int i; 2783 int err; 2784 2785 mlxsw_reg_htgt_pack(htgt_pl, MLXSW_REG_HTGT_TRAP_GROUP_RX); 2786 err = mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(htgt), htgt_pl); 2787 if (err) 2788 return err; 2789 2790 mlxsw_reg_htgt_pack(htgt_pl, MLXSW_REG_HTGT_TRAP_GROUP_CTRL); 2791 err = mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(htgt), htgt_pl); 2792 if (err) 2793 return err; 2794 2795 for (i = 0; i < ARRAY_SIZE(mlxsw_sp_rx_listener); i++) { 2796 err = mlxsw_core_rx_listener_register(mlxsw_sp->core, 2797 &mlxsw_sp_rx_listener[i], 2798 mlxsw_sp); 2799 if (err) 2800 goto err_rx_listener_register; 2801 2802 mlxsw_reg_hpkt_pack(hpkt_pl, mlxsw_sp_rx_listener[i].action, 2803 mlxsw_sp_rx_listener[i].trap_id); 2804 err = mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(hpkt), hpkt_pl); 2805 if (err) 2806 goto err_rx_trap_set; 2807 } 2808 return 0; 2809 2810 err_rx_trap_set: 2811 mlxsw_core_rx_listener_unregister(mlxsw_sp->core, 2812 &mlxsw_sp_rx_listener[i], 2813 mlxsw_sp); 2814 err_rx_listener_register: 2815 for (i--; i >= 0; i--) { 2816 mlxsw_reg_hpkt_pack(hpkt_pl, MLXSW_REG_HPKT_ACTION_DISCARD, 2817 mlxsw_sp_rx_listener[i].trap_id); 2818 mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(hpkt), hpkt_pl); 2819 2820 mlxsw_core_rx_listener_unregister(mlxsw_sp->core, 2821 &mlxsw_sp_rx_listener[i], 2822 mlxsw_sp); 2823 } 2824 return err; 2825 } 2826 2827 static void mlxsw_sp_traps_fini(struct mlxsw_sp *mlxsw_sp) 2828 { 2829 char hpkt_pl[MLXSW_REG_HPKT_LEN]; 2830 int i; 2831 2832 for (i = 0; i < ARRAY_SIZE(mlxsw_sp_rx_listener); i++) { 2833 mlxsw_reg_hpkt_pack(hpkt_pl, MLXSW_REG_HPKT_ACTION_DISCARD, 2834 mlxsw_sp_rx_listener[i].trap_id); 2835 mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(hpkt), hpkt_pl); 2836 2837 mlxsw_core_rx_listener_unregister(mlxsw_sp->core, 2838 &mlxsw_sp_rx_listener[i], 2839 mlxsw_sp); 2840 } 2841 } 2842 2843 static int __mlxsw_sp_flood_init(struct mlxsw_core *mlxsw_core, 2844 enum mlxsw_reg_sfgc_type type, 2845 enum mlxsw_reg_sfgc_bridge_type bridge_type) 2846 { 2847 enum mlxsw_flood_table_type table_type; 2848 enum mlxsw_sp_flood_table flood_table; 2849 char sfgc_pl[MLXSW_REG_SFGC_LEN]; 2850 2851 if (bridge_type == MLXSW_REG_SFGC_BRIDGE_TYPE_VFID) 2852 table_type = MLXSW_REG_SFGC_TABLE_TYPE_FID; 2853 else 2854 table_type = MLXSW_REG_SFGC_TABLE_TYPE_FID_OFFEST; 2855 2856 if (type == MLXSW_REG_SFGC_TYPE_UNKNOWN_UNICAST) 2857 flood_table = MLXSW_SP_FLOOD_TABLE_UC; 2858 else 2859 flood_table = MLXSW_SP_FLOOD_TABLE_BM; 2860 2861 mlxsw_reg_sfgc_pack(sfgc_pl, type, bridge_type, table_type, 2862 flood_table); 2863 return mlxsw_reg_write(mlxsw_core, MLXSW_REG(sfgc), sfgc_pl); 2864 } 2865 2866 static int mlxsw_sp_flood_init(struct mlxsw_sp *mlxsw_sp) 2867 { 2868 int type, err; 2869 2870 for (type = 0; type < MLXSW_REG_SFGC_TYPE_MAX; type++) { 2871 if (type == MLXSW_REG_SFGC_TYPE_RESERVED) 2872 continue; 2873 2874 err = __mlxsw_sp_flood_init(mlxsw_sp->core, type, 2875 MLXSW_REG_SFGC_BRIDGE_TYPE_VFID); 2876 if (err) 2877 return err; 2878 2879 err = __mlxsw_sp_flood_init(mlxsw_sp->core, type, 2880 MLXSW_REG_SFGC_BRIDGE_TYPE_1Q_FID); 2881 if (err) 2882 return err; 2883 } 2884 2885 return 0; 2886 } 2887 2888 static int mlxsw_sp_lag_init(struct mlxsw_sp *mlxsw_sp) 2889 { 2890 struct mlxsw_resources *resources; 2891 char slcr_pl[MLXSW_REG_SLCR_LEN]; 2892 int err; 2893 2894 mlxsw_reg_slcr_pack(slcr_pl, MLXSW_REG_SLCR_LAG_HASH_SMAC | 2895 MLXSW_REG_SLCR_LAG_HASH_DMAC | 2896 MLXSW_REG_SLCR_LAG_HASH_ETHERTYPE | 2897 MLXSW_REG_SLCR_LAG_HASH_VLANID | 2898 MLXSW_REG_SLCR_LAG_HASH_SIP | 2899 MLXSW_REG_SLCR_LAG_HASH_DIP | 2900 MLXSW_REG_SLCR_LAG_HASH_SPORT | 2901 MLXSW_REG_SLCR_LAG_HASH_DPORT | 2902 MLXSW_REG_SLCR_LAG_HASH_IPPROTO); 2903 err = mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(slcr), slcr_pl); 2904 if (err) 2905 return err; 2906 2907 resources = mlxsw_core_resources_get(mlxsw_sp->core); 2908 if (!(resources->max_lag_valid && resources->max_ports_in_lag_valid)) 2909 return -EIO; 2910 2911 mlxsw_sp->lags = kcalloc(resources->max_lag, 2912 sizeof(struct mlxsw_sp_upper), 2913 GFP_KERNEL); 2914 if (!mlxsw_sp->lags) 2915 return -ENOMEM; 2916 2917 return 0; 2918 } 2919 2920 static void mlxsw_sp_lag_fini(struct mlxsw_sp *mlxsw_sp) 2921 { 2922 kfree(mlxsw_sp->lags); 2923 } 2924 2925 static int mlxsw_sp_init(struct mlxsw_core *mlxsw_core, 2926 const struct mlxsw_bus_info *mlxsw_bus_info) 2927 { 2928 struct mlxsw_sp *mlxsw_sp = mlxsw_core_driver_priv(mlxsw_core); 2929 int err; 2930 2931 mlxsw_sp->core = mlxsw_core; 2932 mlxsw_sp->bus_info = mlxsw_bus_info; 2933 INIT_LIST_HEAD(&mlxsw_sp->fids); 2934 INIT_LIST_HEAD(&mlxsw_sp->vfids.list); 2935 INIT_LIST_HEAD(&mlxsw_sp->br_mids.list); 2936 2937 err = mlxsw_sp_base_mac_get(mlxsw_sp); 2938 if (err) { 2939 dev_err(mlxsw_sp->bus_info->dev, "Failed to get base mac\n"); 2940 return err; 2941 } 2942 2943 err = mlxsw_sp_event_register(mlxsw_sp, MLXSW_TRAP_ID_PUDE); 2944 if (err) { 2945 dev_err(mlxsw_sp->bus_info->dev, "Failed to register for PUDE events\n"); 2946 return err; 2947 } 2948 2949 err = mlxsw_sp_traps_init(mlxsw_sp); 2950 if (err) { 2951 dev_err(mlxsw_sp->bus_info->dev, "Failed to set traps for RX\n"); 2952 goto err_rx_listener_register; 2953 } 2954 2955 err = mlxsw_sp_flood_init(mlxsw_sp); 2956 if (err) { 2957 dev_err(mlxsw_sp->bus_info->dev, "Failed to initialize flood tables\n"); 2958 goto err_flood_init; 2959 } 2960 2961 err = mlxsw_sp_buffers_init(mlxsw_sp); 2962 if (err) { 2963 dev_err(mlxsw_sp->bus_info->dev, "Failed to initialize buffers\n"); 2964 goto err_buffers_init; 2965 } 2966 2967 err = mlxsw_sp_lag_init(mlxsw_sp); 2968 if (err) { 2969 dev_err(mlxsw_sp->bus_info->dev, "Failed to initialize LAG\n"); 2970 goto err_lag_init; 2971 } 2972 2973 err = mlxsw_sp_switchdev_init(mlxsw_sp); 2974 if (err) { 2975 dev_err(mlxsw_sp->bus_info->dev, "Failed to initialize switchdev\n"); 2976 goto err_switchdev_init; 2977 } 2978 2979 err = mlxsw_sp_router_init(mlxsw_sp); 2980 if (err) { 2981 dev_err(mlxsw_sp->bus_info->dev, "Failed to initialize router\n"); 2982 goto err_router_init; 2983 } 2984 2985 err = mlxsw_sp_span_init(mlxsw_sp); 2986 if (err) { 2987 dev_err(mlxsw_sp->bus_info->dev, "Failed to init span system\n"); 2988 goto err_span_init; 2989 } 2990 2991 err = mlxsw_sp_ports_create(mlxsw_sp); 2992 if (err) { 2993 dev_err(mlxsw_sp->bus_info->dev, "Failed to create ports\n"); 2994 goto err_ports_create; 2995 } 2996 2997 return 0; 2998 2999 err_ports_create: 3000 mlxsw_sp_span_fini(mlxsw_sp); 3001 err_span_init: 3002 mlxsw_sp_router_fini(mlxsw_sp); 3003 err_router_init: 3004 mlxsw_sp_switchdev_fini(mlxsw_sp); 3005 err_switchdev_init: 3006 mlxsw_sp_lag_fini(mlxsw_sp); 3007 err_lag_init: 3008 mlxsw_sp_buffers_fini(mlxsw_sp); 3009 err_buffers_init: 3010 err_flood_init: 3011 mlxsw_sp_traps_fini(mlxsw_sp); 3012 err_rx_listener_register: 3013 mlxsw_sp_event_unregister(mlxsw_sp, MLXSW_TRAP_ID_PUDE); 3014 return err; 3015 } 3016 3017 static void mlxsw_sp_fini(struct mlxsw_core *mlxsw_core) 3018 { 3019 struct mlxsw_sp *mlxsw_sp = mlxsw_core_driver_priv(mlxsw_core); 3020 3021 mlxsw_sp_ports_remove(mlxsw_sp); 3022 mlxsw_sp_span_fini(mlxsw_sp); 3023 mlxsw_sp_router_fini(mlxsw_sp); 3024 mlxsw_sp_switchdev_fini(mlxsw_sp); 3025 mlxsw_sp_lag_fini(mlxsw_sp); 3026 mlxsw_sp_buffers_fini(mlxsw_sp); 3027 mlxsw_sp_traps_fini(mlxsw_sp); 3028 mlxsw_sp_event_unregister(mlxsw_sp, MLXSW_TRAP_ID_PUDE); 3029 WARN_ON(!list_empty(&mlxsw_sp->vfids.list)); 3030 WARN_ON(!list_empty(&mlxsw_sp->fids)); 3031 } 3032 3033 static struct mlxsw_config_profile mlxsw_sp_config_profile = { 3034 .used_max_vepa_channels = 1, 3035 .max_vepa_channels = 0, 3036 .used_max_mid = 1, 3037 .max_mid = MLXSW_SP_MID_MAX, 3038 .used_max_pgt = 1, 3039 .max_pgt = 0, 3040 .used_flood_tables = 1, 3041 .used_flood_mode = 1, 3042 .flood_mode = 3, 3043 .max_fid_offset_flood_tables = 2, 3044 .fid_offset_flood_table_size = VLAN_N_VID - 1, 3045 .max_fid_flood_tables = 2, 3046 .fid_flood_table_size = MLXSW_SP_VFID_MAX, 3047 .used_max_ib_mc = 1, 3048 .max_ib_mc = 0, 3049 .used_max_pkey = 1, 3050 .max_pkey = 0, 3051 .used_kvd_split_data = 1, 3052 .kvd_hash_granularity = MLXSW_SP_KVD_GRANULARITY, 3053 .kvd_hash_single_parts = 2, 3054 .kvd_hash_double_parts = 1, 3055 .kvd_linear_size = MLXSW_SP_KVD_LINEAR_SIZE, 3056 .swid_config = { 3057 { 3058 .used_type = 1, 3059 .type = MLXSW_PORT_SWID_TYPE_ETH, 3060 } 3061 }, 3062 .resource_query_enable = 1, 3063 }; 3064 3065 static struct mlxsw_driver mlxsw_sp_driver = { 3066 .kind = MLXSW_DEVICE_KIND_SPECTRUM, 3067 .owner = THIS_MODULE, 3068 .priv_size = sizeof(struct mlxsw_sp), 3069 .init = mlxsw_sp_init, 3070 .fini = mlxsw_sp_fini, 3071 .port_split = mlxsw_sp_port_split, 3072 .port_unsplit = mlxsw_sp_port_unsplit, 3073 .sb_pool_get = mlxsw_sp_sb_pool_get, 3074 .sb_pool_set = mlxsw_sp_sb_pool_set, 3075 .sb_port_pool_get = mlxsw_sp_sb_port_pool_get, 3076 .sb_port_pool_set = mlxsw_sp_sb_port_pool_set, 3077 .sb_tc_pool_bind_get = mlxsw_sp_sb_tc_pool_bind_get, 3078 .sb_tc_pool_bind_set = mlxsw_sp_sb_tc_pool_bind_set, 3079 .sb_occ_snapshot = mlxsw_sp_sb_occ_snapshot, 3080 .sb_occ_max_clear = mlxsw_sp_sb_occ_max_clear, 3081 .sb_occ_port_pool_get = mlxsw_sp_sb_occ_port_pool_get, 3082 .sb_occ_tc_port_bind_get = mlxsw_sp_sb_occ_tc_port_bind_get, 3083 .txhdr_construct = mlxsw_sp_txhdr_construct, 3084 .txhdr_len = MLXSW_TXHDR_LEN, 3085 .profile = &mlxsw_sp_config_profile, 3086 }; 3087 3088 static bool mlxsw_sp_port_dev_check(const struct net_device *dev) 3089 { 3090 return dev->netdev_ops == &mlxsw_sp_port_netdev_ops; 3091 } 3092 3093 static struct mlxsw_sp_port *mlxsw_sp_port_dev_lower_find(struct net_device *dev) 3094 { 3095 struct net_device *lower_dev; 3096 struct list_head *iter; 3097 3098 if (mlxsw_sp_port_dev_check(dev)) 3099 return netdev_priv(dev); 3100 3101 netdev_for_each_all_lower_dev(dev, lower_dev, iter) { 3102 if (mlxsw_sp_port_dev_check(lower_dev)) 3103 return netdev_priv(lower_dev); 3104 } 3105 return NULL; 3106 } 3107 3108 static struct mlxsw_sp *mlxsw_sp_lower_get(struct net_device *dev) 3109 { 3110 struct mlxsw_sp_port *mlxsw_sp_port; 3111 3112 mlxsw_sp_port = mlxsw_sp_port_dev_lower_find(dev); 3113 return mlxsw_sp_port ? mlxsw_sp_port->mlxsw_sp : NULL; 3114 } 3115 3116 static struct mlxsw_sp_port *mlxsw_sp_port_dev_lower_find_rcu(struct net_device *dev) 3117 { 3118 struct net_device *lower_dev; 3119 struct list_head *iter; 3120 3121 if (mlxsw_sp_port_dev_check(dev)) 3122 return netdev_priv(dev); 3123 3124 netdev_for_each_all_lower_dev_rcu(dev, lower_dev, iter) { 3125 if (mlxsw_sp_port_dev_check(lower_dev)) 3126 return netdev_priv(lower_dev); 3127 } 3128 return NULL; 3129 } 3130 3131 struct mlxsw_sp_port *mlxsw_sp_port_lower_dev_hold(struct net_device *dev) 3132 { 3133 struct mlxsw_sp_port *mlxsw_sp_port; 3134 3135 rcu_read_lock(); 3136 mlxsw_sp_port = mlxsw_sp_port_dev_lower_find_rcu(dev); 3137 if (mlxsw_sp_port) 3138 dev_hold(mlxsw_sp_port->dev); 3139 rcu_read_unlock(); 3140 return mlxsw_sp_port; 3141 } 3142 3143 void mlxsw_sp_port_dev_put(struct mlxsw_sp_port *mlxsw_sp_port) 3144 { 3145 dev_put(mlxsw_sp_port->dev); 3146 } 3147 3148 static bool mlxsw_sp_rif_should_config(struct mlxsw_sp_rif *r, 3149 unsigned long event) 3150 { 3151 switch (event) { 3152 case NETDEV_UP: 3153 if (!r) 3154 return true; 3155 r->ref_count++; 3156 return false; 3157 case NETDEV_DOWN: 3158 if (r && --r->ref_count == 0) 3159 return true; 3160 /* It is possible we already removed the RIF ourselves 3161 * if it was assigned to a netdev that is now a bridge 3162 * or LAG slave. 3163 */ 3164 return false; 3165 } 3166 3167 return false; 3168 } 3169 3170 static int mlxsw_sp_avail_rif_get(struct mlxsw_sp *mlxsw_sp) 3171 { 3172 struct mlxsw_resources *resources; 3173 int i; 3174 3175 resources = mlxsw_core_resources_get(mlxsw_sp->core); 3176 for (i = 0; i < resources->max_rif; i++) 3177 if (!mlxsw_sp->rifs[i]) 3178 return i; 3179 3180 return MLXSW_SP_INVALID_RIF; 3181 } 3182 3183 static void mlxsw_sp_vport_rif_sp_attr_get(struct mlxsw_sp_port *mlxsw_sp_vport, 3184 bool *p_lagged, u16 *p_system_port) 3185 { 3186 u8 local_port = mlxsw_sp_vport->local_port; 3187 3188 *p_lagged = mlxsw_sp_vport->lagged; 3189 *p_system_port = *p_lagged ? mlxsw_sp_vport->lag_id : local_port; 3190 } 3191 3192 static int mlxsw_sp_vport_rif_sp_op(struct mlxsw_sp_port *mlxsw_sp_vport, 3193 struct net_device *l3_dev, u16 rif, 3194 bool create) 3195 { 3196 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_vport->mlxsw_sp; 3197 bool lagged = mlxsw_sp_vport->lagged; 3198 char ritr_pl[MLXSW_REG_RITR_LEN]; 3199 u16 system_port; 3200 3201 mlxsw_reg_ritr_pack(ritr_pl, create, MLXSW_REG_RITR_SP_IF, rif, 3202 l3_dev->mtu, l3_dev->dev_addr); 3203 3204 mlxsw_sp_vport_rif_sp_attr_get(mlxsw_sp_vport, &lagged, &system_port); 3205 mlxsw_reg_ritr_sp_if_pack(ritr_pl, lagged, system_port, 3206 mlxsw_sp_vport_vid_get(mlxsw_sp_vport)); 3207 3208 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(ritr), ritr_pl); 3209 } 3210 3211 static void mlxsw_sp_vport_rif_sp_leave(struct mlxsw_sp_port *mlxsw_sp_vport); 3212 3213 static struct mlxsw_sp_fid * 3214 mlxsw_sp_rfid_alloc(u16 fid, struct net_device *l3_dev) 3215 { 3216 struct mlxsw_sp_fid *f; 3217 3218 f = kzalloc(sizeof(*f), GFP_KERNEL); 3219 if (!f) 3220 return NULL; 3221 3222 f->leave = mlxsw_sp_vport_rif_sp_leave; 3223 f->ref_count = 0; 3224 f->dev = l3_dev; 3225 f->fid = fid; 3226 3227 return f; 3228 } 3229 3230 static struct mlxsw_sp_rif * 3231 mlxsw_sp_rif_alloc(u16 rif, struct net_device *l3_dev, struct mlxsw_sp_fid *f) 3232 { 3233 struct mlxsw_sp_rif *r; 3234 3235 r = kzalloc(sizeof(*r), GFP_KERNEL); 3236 if (!r) 3237 return NULL; 3238 3239 ether_addr_copy(r->addr, l3_dev->dev_addr); 3240 r->mtu = l3_dev->mtu; 3241 r->ref_count = 1; 3242 r->dev = l3_dev; 3243 r->rif = rif; 3244 r->f = f; 3245 3246 return r; 3247 } 3248 3249 static struct mlxsw_sp_rif * 3250 mlxsw_sp_vport_rif_sp_create(struct mlxsw_sp_port *mlxsw_sp_vport, 3251 struct net_device *l3_dev) 3252 { 3253 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_vport->mlxsw_sp; 3254 struct mlxsw_sp_fid *f; 3255 struct mlxsw_sp_rif *r; 3256 u16 fid, rif; 3257 int err; 3258 3259 rif = mlxsw_sp_avail_rif_get(mlxsw_sp); 3260 if (rif == MLXSW_SP_INVALID_RIF) 3261 return ERR_PTR(-ERANGE); 3262 3263 err = mlxsw_sp_vport_rif_sp_op(mlxsw_sp_vport, l3_dev, rif, true); 3264 if (err) 3265 return ERR_PTR(err); 3266 3267 fid = mlxsw_sp_rif_sp_to_fid(rif); 3268 err = mlxsw_sp_rif_fdb_op(mlxsw_sp, l3_dev->dev_addr, fid, true); 3269 if (err) 3270 goto err_rif_fdb_op; 3271 3272 f = mlxsw_sp_rfid_alloc(fid, l3_dev); 3273 if (!f) { 3274 err = -ENOMEM; 3275 goto err_rfid_alloc; 3276 } 3277 3278 r = mlxsw_sp_rif_alloc(rif, l3_dev, f); 3279 if (!r) { 3280 err = -ENOMEM; 3281 goto err_rif_alloc; 3282 } 3283 3284 f->r = r; 3285 mlxsw_sp->rifs[rif] = r; 3286 3287 return r; 3288 3289 err_rif_alloc: 3290 kfree(f); 3291 err_rfid_alloc: 3292 mlxsw_sp_rif_fdb_op(mlxsw_sp, l3_dev->dev_addr, fid, false); 3293 err_rif_fdb_op: 3294 mlxsw_sp_vport_rif_sp_op(mlxsw_sp_vport, l3_dev, rif, false); 3295 return ERR_PTR(err); 3296 } 3297 3298 static void mlxsw_sp_vport_rif_sp_destroy(struct mlxsw_sp_port *mlxsw_sp_vport, 3299 struct mlxsw_sp_rif *r) 3300 { 3301 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_vport->mlxsw_sp; 3302 struct net_device *l3_dev = r->dev; 3303 struct mlxsw_sp_fid *f = r->f; 3304 u16 fid = f->fid; 3305 u16 rif = r->rif; 3306 3307 mlxsw_sp->rifs[rif] = NULL; 3308 f->r = NULL; 3309 3310 kfree(r); 3311 3312 kfree(f); 3313 3314 mlxsw_sp_rif_fdb_op(mlxsw_sp, l3_dev->dev_addr, fid, false); 3315 3316 mlxsw_sp_vport_rif_sp_op(mlxsw_sp_vport, l3_dev, rif, false); 3317 } 3318 3319 static int mlxsw_sp_vport_rif_sp_join(struct mlxsw_sp_port *mlxsw_sp_vport, 3320 struct net_device *l3_dev) 3321 { 3322 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_vport->mlxsw_sp; 3323 struct mlxsw_sp_rif *r; 3324 3325 r = mlxsw_sp_rif_find_by_dev(mlxsw_sp, l3_dev); 3326 if (!r) { 3327 r = mlxsw_sp_vport_rif_sp_create(mlxsw_sp_vport, l3_dev); 3328 if (IS_ERR(r)) 3329 return PTR_ERR(r); 3330 } 3331 3332 mlxsw_sp_vport_fid_set(mlxsw_sp_vport, r->f); 3333 r->f->ref_count++; 3334 3335 netdev_dbg(mlxsw_sp_vport->dev, "Joined FID=%d\n", r->f->fid); 3336 3337 return 0; 3338 } 3339 3340 static void mlxsw_sp_vport_rif_sp_leave(struct mlxsw_sp_port *mlxsw_sp_vport) 3341 { 3342 struct mlxsw_sp_fid *f = mlxsw_sp_vport_fid_get(mlxsw_sp_vport); 3343 3344 netdev_dbg(mlxsw_sp_vport->dev, "Left FID=%d\n", f->fid); 3345 3346 mlxsw_sp_vport_fid_set(mlxsw_sp_vport, NULL); 3347 if (--f->ref_count == 0) 3348 mlxsw_sp_vport_rif_sp_destroy(mlxsw_sp_vport, f->r); 3349 } 3350 3351 static int mlxsw_sp_inetaddr_vport_event(struct net_device *l3_dev, 3352 struct net_device *port_dev, 3353 unsigned long event, u16 vid) 3354 { 3355 struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(port_dev); 3356 struct mlxsw_sp_port *mlxsw_sp_vport; 3357 3358 mlxsw_sp_vport = mlxsw_sp_port_vport_find(mlxsw_sp_port, vid); 3359 if (WARN_ON(!mlxsw_sp_vport)) 3360 return -EINVAL; 3361 3362 switch (event) { 3363 case NETDEV_UP: 3364 return mlxsw_sp_vport_rif_sp_join(mlxsw_sp_vport, l3_dev); 3365 case NETDEV_DOWN: 3366 mlxsw_sp_vport_rif_sp_leave(mlxsw_sp_vport); 3367 break; 3368 } 3369 3370 return 0; 3371 } 3372 3373 static int mlxsw_sp_inetaddr_port_event(struct net_device *port_dev, 3374 unsigned long event) 3375 { 3376 if (netif_is_bridge_port(port_dev) || netif_is_lag_port(port_dev)) 3377 return 0; 3378 3379 return mlxsw_sp_inetaddr_vport_event(port_dev, port_dev, event, 1); 3380 } 3381 3382 static int __mlxsw_sp_inetaddr_lag_event(struct net_device *l3_dev, 3383 struct net_device *lag_dev, 3384 unsigned long event, u16 vid) 3385 { 3386 struct net_device *port_dev; 3387 struct list_head *iter; 3388 int err; 3389 3390 netdev_for_each_lower_dev(lag_dev, port_dev, iter) { 3391 if (mlxsw_sp_port_dev_check(port_dev)) { 3392 err = mlxsw_sp_inetaddr_vport_event(l3_dev, port_dev, 3393 event, vid); 3394 if (err) 3395 return err; 3396 } 3397 } 3398 3399 return 0; 3400 } 3401 3402 static int mlxsw_sp_inetaddr_lag_event(struct net_device *lag_dev, 3403 unsigned long event) 3404 { 3405 if (netif_is_bridge_port(lag_dev)) 3406 return 0; 3407 3408 return __mlxsw_sp_inetaddr_lag_event(lag_dev, lag_dev, event, 1); 3409 } 3410 3411 static struct mlxsw_sp_fid *mlxsw_sp_bridge_fid_get(struct mlxsw_sp *mlxsw_sp, 3412 struct net_device *l3_dev) 3413 { 3414 u16 fid; 3415 3416 if (is_vlan_dev(l3_dev)) 3417 fid = vlan_dev_vlan_id(l3_dev); 3418 else if (mlxsw_sp->master_bridge.dev == l3_dev) 3419 fid = 1; 3420 else 3421 return mlxsw_sp_vfid_find(mlxsw_sp, l3_dev); 3422 3423 return mlxsw_sp_fid_find(mlxsw_sp, fid); 3424 } 3425 3426 static enum mlxsw_flood_table_type mlxsw_sp_flood_table_type_get(u16 fid) 3427 { 3428 return mlxsw_sp_fid_is_vfid(fid) ? MLXSW_REG_SFGC_TABLE_TYPE_FID : 3429 MLXSW_REG_SFGC_TABLE_TYPE_FID_OFFEST; 3430 } 3431 3432 static u16 mlxsw_sp_flood_table_index_get(u16 fid) 3433 { 3434 return mlxsw_sp_fid_is_vfid(fid) ? mlxsw_sp_fid_to_vfid(fid) : fid; 3435 } 3436 3437 static int mlxsw_sp_router_port_flood_set(struct mlxsw_sp *mlxsw_sp, u16 fid, 3438 bool set) 3439 { 3440 enum mlxsw_flood_table_type table_type; 3441 char *sftr_pl; 3442 u16 index; 3443 int err; 3444 3445 sftr_pl = kmalloc(MLXSW_REG_SFTR_LEN, GFP_KERNEL); 3446 if (!sftr_pl) 3447 return -ENOMEM; 3448 3449 table_type = mlxsw_sp_flood_table_type_get(fid); 3450 index = mlxsw_sp_flood_table_index_get(fid); 3451 mlxsw_reg_sftr_pack(sftr_pl, MLXSW_SP_FLOOD_TABLE_BM, index, table_type, 3452 1, MLXSW_PORT_ROUTER_PORT, set); 3453 err = mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(sftr), sftr_pl); 3454 3455 kfree(sftr_pl); 3456 return err; 3457 } 3458 3459 static enum mlxsw_reg_ritr_if_type mlxsw_sp_rif_type_get(u16 fid) 3460 { 3461 if (mlxsw_sp_fid_is_vfid(fid)) 3462 return MLXSW_REG_RITR_FID_IF; 3463 else 3464 return MLXSW_REG_RITR_VLAN_IF; 3465 } 3466 3467 static int mlxsw_sp_rif_bridge_op(struct mlxsw_sp *mlxsw_sp, 3468 struct net_device *l3_dev, 3469 u16 fid, u16 rif, 3470 bool create) 3471 { 3472 enum mlxsw_reg_ritr_if_type rif_type; 3473 char ritr_pl[MLXSW_REG_RITR_LEN]; 3474 3475 rif_type = mlxsw_sp_rif_type_get(fid); 3476 mlxsw_reg_ritr_pack(ritr_pl, create, rif_type, rif, l3_dev->mtu, 3477 l3_dev->dev_addr); 3478 mlxsw_reg_ritr_fid_set(ritr_pl, rif_type, fid); 3479 3480 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(ritr), ritr_pl); 3481 } 3482 3483 static int mlxsw_sp_rif_bridge_create(struct mlxsw_sp *mlxsw_sp, 3484 struct net_device *l3_dev, 3485 struct mlxsw_sp_fid *f) 3486 { 3487 struct mlxsw_sp_rif *r; 3488 u16 rif; 3489 int err; 3490 3491 rif = mlxsw_sp_avail_rif_get(mlxsw_sp); 3492 if (rif == MLXSW_SP_INVALID_RIF) 3493 return -ERANGE; 3494 3495 err = mlxsw_sp_router_port_flood_set(mlxsw_sp, f->fid, true); 3496 if (err) 3497 return err; 3498 3499 err = mlxsw_sp_rif_bridge_op(mlxsw_sp, l3_dev, f->fid, rif, true); 3500 if (err) 3501 goto err_rif_bridge_op; 3502 3503 err = mlxsw_sp_rif_fdb_op(mlxsw_sp, l3_dev->dev_addr, f->fid, true); 3504 if (err) 3505 goto err_rif_fdb_op; 3506 3507 r = mlxsw_sp_rif_alloc(rif, l3_dev, f); 3508 if (!r) { 3509 err = -ENOMEM; 3510 goto err_rif_alloc; 3511 } 3512 3513 f->r = r; 3514 mlxsw_sp->rifs[rif] = r; 3515 3516 netdev_dbg(l3_dev, "RIF=%d created\n", rif); 3517 3518 return 0; 3519 3520 err_rif_alloc: 3521 mlxsw_sp_rif_fdb_op(mlxsw_sp, l3_dev->dev_addr, f->fid, false); 3522 err_rif_fdb_op: 3523 mlxsw_sp_rif_bridge_op(mlxsw_sp, l3_dev, f->fid, rif, false); 3524 err_rif_bridge_op: 3525 mlxsw_sp_router_port_flood_set(mlxsw_sp, f->fid, false); 3526 return err; 3527 } 3528 3529 void mlxsw_sp_rif_bridge_destroy(struct mlxsw_sp *mlxsw_sp, 3530 struct mlxsw_sp_rif *r) 3531 { 3532 struct net_device *l3_dev = r->dev; 3533 struct mlxsw_sp_fid *f = r->f; 3534 u16 rif = r->rif; 3535 3536 mlxsw_sp->rifs[rif] = NULL; 3537 f->r = NULL; 3538 3539 kfree(r); 3540 3541 mlxsw_sp_rif_fdb_op(mlxsw_sp, l3_dev->dev_addr, f->fid, false); 3542 3543 mlxsw_sp_rif_bridge_op(mlxsw_sp, l3_dev, f->fid, rif, false); 3544 3545 mlxsw_sp_router_port_flood_set(mlxsw_sp, f->fid, false); 3546 3547 netdev_dbg(l3_dev, "RIF=%d destroyed\n", rif); 3548 } 3549 3550 static int mlxsw_sp_inetaddr_bridge_event(struct net_device *l3_dev, 3551 struct net_device *br_dev, 3552 unsigned long event) 3553 { 3554 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_lower_get(l3_dev); 3555 struct mlxsw_sp_fid *f; 3556 3557 /* FID can either be an actual FID if the L3 device is the 3558 * VLAN-aware bridge or a VLAN device on top. Otherwise, the 3559 * L3 device is a VLAN-unaware bridge and we get a vFID. 3560 */ 3561 f = mlxsw_sp_bridge_fid_get(mlxsw_sp, l3_dev); 3562 if (WARN_ON(!f)) 3563 return -EINVAL; 3564 3565 switch (event) { 3566 case NETDEV_UP: 3567 return mlxsw_sp_rif_bridge_create(mlxsw_sp, l3_dev, f); 3568 case NETDEV_DOWN: 3569 mlxsw_sp_rif_bridge_destroy(mlxsw_sp, f->r); 3570 break; 3571 } 3572 3573 return 0; 3574 } 3575 3576 static int mlxsw_sp_inetaddr_vlan_event(struct net_device *vlan_dev, 3577 unsigned long event) 3578 { 3579 struct net_device *real_dev = vlan_dev_real_dev(vlan_dev); 3580 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_lower_get(vlan_dev); 3581 u16 vid = vlan_dev_vlan_id(vlan_dev); 3582 3583 if (mlxsw_sp_port_dev_check(real_dev)) 3584 return mlxsw_sp_inetaddr_vport_event(vlan_dev, real_dev, event, 3585 vid); 3586 else if (netif_is_lag_master(real_dev)) 3587 return __mlxsw_sp_inetaddr_lag_event(vlan_dev, real_dev, event, 3588 vid); 3589 else if (netif_is_bridge_master(real_dev) && 3590 mlxsw_sp->master_bridge.dev == real_dev) 3591 return mlxsw_sp_inetaddr_bridge_event(vlan_dev, real_dev, 3592 event); 3593 3594 return 0; 3595 } 3596 3597 static int mlxsw_sp_inetaddr_event(struct notifier_block *unused, 3598 unsigned long event, void *ptr) 3599 { 3600 struct in_ifaddr *ifa = (struct in_ifaddr *) ptr; 3601 struct net_device *dev = ifa->ifa_dev->dev; 3602 struct mlxsw_sp *mlxsw_sp; 3603 struct mlxsw_sp_rif *r; 3604 int err = 0; 3605 3606 mlxsw_sp = mlxsw_sp_lower_get(dev); 3607 if (!mlxsw_sp) 3608 goto out; 3609 3610 r = mlxsw_sp_rif_find_by_dev(mlxsw_sp, dev); 3611 if (!mlxsw_sp_rif_should_config(r, event)) 3612 goto out; 3613 3614 if (mlxsw_sp_port_dev_check(dev)) 3615 err = mlxsw_sp_inetaddr_port_event(dev, event); 3616 else if (netif_is_lag_master(dev)) 3617 err = mlxsw_sp_inetaddr_lag_event(dev, event); 3618 else if (netif_is_bridge_master(dev)) 3619 err = mlxsw_sp_inetaddr_bridge_event(dev, dev, event); 3620 else if (is_vlan_dev(dev)) 3621 err = mlxsw_sp_inetaddr_vlan_event(dev, event); 3622 3623 out: 3624 return notifier_from_errno(err); 3625 } 3626 3627 static int mlxsw_sp_rif_edit(struct mlxsw_sp *mlxsw_sp, u16 rif, 3628 const char *mac, int mtu) 3629 { 3630 char ritr_pl[MLXSW_REG_RITR_LEN]; 3631 int err; 3632 3633 mlxsw_reg_ritr_rif_pack(ritr_pl, rif); 3634 err = mlxsw_reg_query(mlxsw_sp->core, MLXSW_REG(ritr), ritr_pl); 3635 if (err) 3636 return err; 3637 3638 mlxsw_reg_ritr_mtu_set(ritr_pl, mtu); 3639 mlxsw_reg_ritr_if_mac_memcpy_to(ritr_pl, mac); 3640 mlxsw_reg_ritr_op_set(ritr_pl, MLXSW_REG_RITR_RIF_CREATE); 3641 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(ritr), ritr_pl); 3642 } 3643 3644 static int mlxsw_sp_netdevice_router_port_event(struct net_device *dev) 3645 { 3646 struct mlxsw_sp *mlxsw_sp; 3647 struct mlxsw_sp_rif *r; 3648 int err; 3649 3650 mlxsw_sp = mlxsw_sp_lower_get(dev); 3651 if (!mlxsw_sp) 3652 return 0; 3653 3654 r = mlxsw_sp_rif_find_by_dev(mlxsw_sp, dev); 3655 if (!r) 3656 return 0; 3657 3658 err = mlxsw_sp_rif_fdb_op(mlxsw_sp, r->addr, r->f->fid, false); 3659 if (err) 3660 return err; 3661 3662 err = mlxsw_sp_rif_edit(mlxsw_sp, r->rif, dev->dev_addr, dev->mtu); 3663 if (err) 3664 goto err_rif_edit; 3665 3666 err = mlxsw_sp_rif_fdb_op(mlxsw_sp, dev->dev_addr, r->f->fid, true); 3667 if (err) 3668 goto err_rif_fdb_op; 3669 3670 ether_addr_copy(r->addr, dev->dev_addr); 3671 r->mtu = dev->mtu; 3672 3673 netdev_dbg(dev, "Updated RIF=%d\n", r->rif); 3674 3675 return 0; 3676 3677 err_rif_fdb_op: 3678 mlxsw_sp_rif_edit(mlxsw_sp, r->rif, r->addr, r->mtu); 3679 err_rif_edit: 3680 mlxsw_sp_rif_fdb_op(mlxsw_sp, r->addr, r->f->fid, true); 3681 return err; 3682 } 3683 3684 static bool mlxsw_sp_lag_port_fid_member(struct mlxsw_sp_port *lag_port, 3685 u16 fid) 3686 { 3687 if (mlxsw_sp_fid_is_vfid(fid)) 3688 return mlxsw_sp_port_vport_find_by_fid(lag_port, fid); 3689 else 3690 return test_bit(fid, lag_port->active_vlans); 3691 } 3692 3693 static bool mlxsw_sp_port_fdb_should_flush(struct mlxsw_sp_port *mlxsw_sp_port, 3694 u16 fid) 3695 { 3696 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp; 3697 u8 local_port = mlxsw_sp_port->local_port; 3698 u16 lag_id = mlxsw_sp_port->lag_id; 3699 struct mlxsw_resources *resources; 3700 int i, count = 0; 3701 3702 if (!mlxsw_sp_port->lagged) 3703 return true; 3704 3705 resources = mlxsw_core_resources_get(mlxsw_sp->core); 3706 for (i = 0; i < resources->max_ports_in_lag; i++) { 3707 struct mlxsw_sp_port *lag_port; 3708 3709 lag_port = mlxsw_sp_port_lagged_get(mlxsw_sp, lag_id, i); 3710 if (!lag_port || lag_port->local_port == local_port) 3711 continue; 3712 if (mlxsw_sp_lag_port_fid_member(lag_port, fid)) 3713 count++; 3714 } 3715 3716 return !count; 3717 } 3718 3719 static int 3720 mlxsw_sp_port_fdb_flush_by_port_fid(const struct mlxsw_sp_port *mlxsw_sp_port, 3721 u16 fid) 3722 { 3723 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp; 3724 char sfdf_pl[MLXSW_REG_SFDF_LEN]; 3725 3726 mlxsw_reg_sfdf_pack(sfdf_pl, MLXSW_REG_SFDF_FLUSH_PER_PORT_AND_FID); 3727 mlxsw_reg_sfdf_fid_set(sfdf_pl, fid); 3728 mlxsw_reg_sfdf_port_fid_system_port_set(sfdf_pl, 3729 mlxsw_sp_port->local_port); 3730 3731 netdev_dbg(mlxsw_sp_port->dev, "FDB flushed using Port=%d, FID=%d\n", 3732 mlxsw_sp_port->local_port, fid); 3733 3734 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(sfdf), sfdf_pl); 3735 } 3736 3737 static int 3738 mlxsw_sp_port_fdb_flush_by_lag_id_fid(const struct mlxsw_sp_port *mlxsw_sp_port, 3739 u16 fid) 3740 { 3741 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp; 3742 char sfdf_pl[MLXSW_REG_SFDF_LEN]; 3743 3744 mlxsw_reg_sfdf_pack(sfdf_pl, MLXSW_REG_SFDF_FLUSH_PER_LAG_AND_FID); 3745 mlxsw_reg_sfdf_fid_set(sfdf_pl, fid); 3746 mlxsw_reg_sfdf_lag_fid_lag_id_set(sfdf_pl, mlxsw_sp_port->lag_id); 3747 3748 netdev_dbg(mlxsw_sp_port->dev, "FDB flushed using LAG ID=%d, FID=%d\n", 3749 mlxsw_sp_port->lag_id, fid); 3750 3751 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(sfdf), sfdf_pl); 3752 } 3753 3754 int mlxsw_sp_port_fdb_flush(struct mlxsw_sp_port *mlxsw_sp_port, u16 fid) 3755 { 3756 if (!mlxsw_sp_port_fdb_should_flush(mlxsw_sp_port, fid)) 3757 return 0; 3758 3759 if (mlxsw_sp_port->lagged) 3760 return mlxsw_sp_port_fdb_flush_by_lag_id_fid(mlxsw_sp_port, 3761 fid); 3762 else 3763 return mlxsw_sp_port_fdb_flush_by_port_fid(mlxsw_sp_port, fid); 3764 } 3765 3766 static void mlxsw_sp_master_bridge_gone_sync(struct mlxsw_sp *mlxsw_sp) 3767 { 3768 struct mlxsw_sp_fid *f, *tmp; 3769 3770 list_for_each_entry_safe(f, tmp, &mlxsw_sp->fids, list) 3771 if (--f->ref_count == 0) 3772 mlxsw_sp_fid_destroy(mlxsw_sp, f); 3773 else 3774 WARN_ON_ONCE(1); 3775 } 3776 3777 static bool mlxsw_sp_master_bridge_check(struct mlxsw_sp *mlxsw_sp, 3778 struct net_device *br_dev) 3779 { 3780 return !mlxsw_sp->master_bridge.dev || 3781 mlxsw_sp->master_bridge.dev == br_dev; 3782 } 3783 3784 static void mlxsw_sp_master_bridge_inc(struct mlxsw_sp *mlxsw_sp, 3785 struct net_device *br_dev) 3786 { 3787 mlxsw_sp->master_bridge.dev = br_dev; 3788 mlxsw_sp->master_bridge.ref_count++; 3789 } 3790 3791 static void mlxsw_sp_master_bridge_dec(struct mlxsw_sp *mlxsw_sp) 3792 { 3793 if (--mlxsw_sp->master_bridge.ref_count == 0) { 3794 mlxsw_sp->master_bridge.dev = NULL; 3795 /* It's possible upper VLAN devices are still holding 3796 * references to underlying FIDs. Drop the reference 3797 * and release the resources if it was the last one. 3798 * If it wasn't, then something bad happened. 3799 */ 3800 mlxsw_sp_master_bridge_gone_sync(mlxsw_sp); 3801 } 3802 } 3803 3804 static int mlxsw_sp_port_bridge_join(struct mlxsw_sp_port *mlxsw_sp_port, 3805 struct net_device *br_dev) 3806 { 3807 struct net_device *dev = mlxsw_sp_port->dev; 3808 int err; 3809 3810 /* When port is not bridged untagged packets are tagged with 3811 * PVID=VID=1, thereby creating an implicit VLAN interface in 3812 * the device. Remove it and let bridge code take care of its 3813 * own VLANs. 3814 */ 3815 err = mlxsw_sp_port_kill_vid(dev, 0, 1); 3816 if (err) 3817 return err; 3818 3819 mlxsw_sp_master_bridge_inc(mlxsw_sp_port->mlxsw_sp, br_dev); 3820 3821 mlxsw_sp_port->learning = 1; 3822 mlxsw_sp_port->learning_sync = 1; 3823 mlxsw_sp_port->uc_flood = 1; 3824 mlxsw_sp_port->bridged = 1; 3825 3826 return 0; 3827 } 3828 3829 static void mlxsw_sp_port_bridge_leave(struct mlxsw_sp_port *mlxsw_sp_port) 3830 { 3831 struct net_device *dev = mlxsw_sp_port->dev; 3832 3833 mlxsw_sp_port_pvid_set(mlxsw_sp_port, 1); 3834 3835 mlxsw_sp_master_bridge_dec(mlxsw_sp_port->mlxsw_sp); 3836 3837 mlxsw_sp_port->learning = 0; 3838 mlxsw_sp_port->learning_sync = 0; 3839 mlxsw_sp_port->uc_flood = 0; 3840 mlxsw_sp_port->bridged = 0; 3841 3842 /* Add implicit VLAN interface in the device, so that untagged 3843 * packets will be classified to the default vFID. 3844 */ 3845 mlxsw_sp_port_add_vid(dev, 0, 1); 3846 } 3847 3848 static int mlxsw_sp_lag_create(struct mlxsw_sp *mlxsw_sp, u16 lag_id) 3849 { 3850 char sldr_pl[MLXSW_REG_SLDR_LEN]; 3851 3852 mlxsw_reg_sldr_lag_create_pack(sldr_pl, lag_id); 3853 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(sldr), sldr_pl); 3854 } 3855 3856 static int mlxsw_sp_lag_destroy(struct mlxsw_sp *mlxsw_sp, u16 lag_id) 3857 { 3858 char sldr_pl[MLXSW_REG_SLDR_LEN]; 3859 3860 mlxsw_reg_sldr_lag_destroy_pack(sldr_pl, lag_id); 3861 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(sldr), sldr_pl); 3862 } 3863 3864 static int mlxsw_sp_lag_col_port_add(struct mlxsw_sp_port *mlxsw_sp_port, 3865 u16 lag_id, u8 port_index) 3866 { 3867 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp; 3868 char slcor_pl[MLXSW_REG_SLCOR_LEN]; 3869 3870 mlxsw_reg_slcor_port_add_pack(slcor_pl, mlxsw_sp_port->local_port, 3871 lag_id, port_index); 3872 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(slcor), slcor_pl); 3873 } 3874 3875 static int mlxsw_sp_lag_col_port_remove(struct mlxsw_sp_port *mlxsw_sp_port, 3876 u16 lag_id) 3877 { 3878 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp; 3879 char slcor_pl[MLXSW_REG_SLCOR_LEN]; 3880 3881 mlxsw_reg_slcor_port_remove_pack(slcor_pl, mlxsw_sp_port->local_port, 3882 lag_id); 3883 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(slcor), slcor_pl); 3884 } 3885 3886 static int mlxsw_sp_lag_col_port_enable(struct mlxsw_sp_port *mlxsw_sp_port, 3887 u16 lag_id) 3888 { 3889 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp; 3890 char slcor_pl[MLXSW_REG_SLCOR_LEN]; 3891 3892 mlxsw_reg_slcor_col_enable_pack(slcor_pl, mlxsw_sp_port->local_port, 3893 lag_id); 3894 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(slcor), slcor_pl); 3895 } 3896 3897 static int mlxsw_sp_lag_col_port_disable(struct mlxsw_sp_port *mlxsw_sp_port, 3898 u16 lag_id) 3899 { 3900 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp; 3901 char slcor_pl[MLXSW_REG_SLCOR_LEN]; 3902 3903 mlxsw_reg_slcor_col_disable_pack(slcor_pl, mlxsw_sp_port->local_port, 3904 lag_id); 3905 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(slcor), slcor_pl); 3906 } 3907 3908 static int mlxsw_sp_lag_index_get(struct mlxsw_sp *mlxsw_sp, 3909 struct net_device *lag_dev, 3910 u16 *p_lag_id) 3911 { 3912 struct mlxsw_resources *resources; 3913 struct mlxsw_sp_upper *lag; 3914 int free_lag_id = -1; 3915 int i; 3916 3917 resources = mlxsw_core_resources_get(mlxsw_sp->core); 3918 for (i = 0; i < resources->max_lag; i++) { 3919 lag = mlxsw_sp_lag_get(mlxsw_sp, i); 3920 if (lag->ref_count) { 3921 if (lag->dev == lag_dev) { 3922 *p_lag_id = i; 3923 return 0; 3924 } 3925 } else if (free_lag_id < 0) { 3926 free_lag_id = i; 3927 } 3928 } 3929 if (free_lag_id < 0) 3930 return -EBUSY; 3931 *p_lag_id = free_lag_id; 3932 return 0; 3933 } 3934 3935 static bool 3936 mlxsw_sp_master_lag_check(struct mlxsw_sp *mlxsw_sp, 3937 struct net_device *lag_dev, 3938 struct netdev_lag_upper_info *lag_upper_info) 3939 { 3940 u16 lag_id; 3941 3942 if (mlxsw_sp_lag_index_get(mlxsw_sp, lag_dev, &lag_id) != 0) 3943 return false; 3944 if (lag_upper_info->tx_type != NETDEV_LAG_TX_TYPE_HASH) 3945 return false; 3946 return true; 3947 } 3948 3949 static int mlxsw_sp_port_lag_index_get(struct mlxsw_sp *mlxsw_sp, 3950 u16 lag_id, u8 *p_port_index) 3951 { 3952 struct mlxsw_resources *resources; 3953 int i; 3954 3955 resources = mlxsw_core_resources_get(mlxsw_sp->core); 3956 for (i = 0; i < resources->max_ports_in_lag; i++) { 3957 if (!mlxsw_sp_port_lagged_get(mlxsw_sp, lag_id, i)) { 3958 *p_port_index = i; 3959 return 0; 3960 } 3961 } 3962 return -EBUSY; 3963 } 3964 3965 static void 3966 mlxsw_sp_port_pvid_vport_lag_join(struct mlxsw_sp_port *mlxsw_sp_port, 3967 u16 lag_id) 3968 { 3969 struct mlxsw_sp_port *mlxsw_sp_vport; 3970 struct mlxsw_sp_fid *f; 3971 3972 mlxsw_sp_vport = mlxsw_sp_port_vport_find(mlxsw_sp_port, 1); 3973 if (WARN_ON(!mlxsw_sp_vport)) 3974 return; 3975 3976 /* If vPort is assigned a RIF, then leave it since it's no 3977 * longer valid. 3978 */ 3979 f = mlxsw_sp_vport_fid_get(mlxsw_sp_vport); 3980 if (f) 3981 f->leave(mlxsw_sp_vport); 3982 3983 mlxsw_sp_vport->lag_id = lag_id; 3984 mlxsw_sp_vport->lagged = 1; 3985 } 3986 3987 static void 3988 mlxsw_sp_port_pvid_vport_lag_leave(struct mlxsw_sp_port *mlxsw_sp_port) 3989 { 3990 struct mlxsw_sp_port *mlxsw_sp_vport; 3991 struct mlxsw_sp_fid *f; 3992 3993 mlxsw_sp_vport = mlxsw_sp_port_vport_find(mlxsw_sp_port, 1); 3994 if (WARN_ON(!mlxsw_sp_vport)) 3995 return; 3996 3997 f = mlxsw_sp_vport_fid_get(mlxsw_sp_vport); 3998 if (f) 3999 f->leave(mlxsw_sp_vport); 4000 4001 mlxsw_sp_vport->lagged = 0; 4002 } 4003 4004 static int mlxsw_sp_port_lag_join(struct mlxsw_sp_port *mlxsw_sp_port, 4005 struct net_device *lag_dev) 4006 { 4007 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp; 4008 struct mlxsw_sp_upper *lag; 4009 u16 lag_id; 4010 u8 port_index; 4011 int err; 4012 4013 err = mlxsw_sp_lag_index_get(mlxsw_sp, lag_dev, &lag_id); 4014 if (err) 4015 return err; 4016 lag = mlxsw_sp_lag_get(mlxsw_sp, lag_id); 4017 if (!lag->ref_count) { 4018 err = mlxsw_sp_lag_create(mlxsw_sp, lag_id); 4019 if (err) 4020 return err; 4021 lag->dev = lag_dev; 4022 } 4023 4024 err = mlxsw_sp_port_lag_index_get(mlxsw_sp, lag_id, &port_index); 4025 if (err) 4026 return err; 4027 err = mlxsw_sp_lag_col_port_add(mlxsw_sp_port, lag_id, port_index); 4028 if (err) 4029 goto err_col_port_add; 4030 err = mlxsw_sp_lag_col_port_enable(mlxsw_sp_port, lag_id); 4031 if (err) 4032 goto err_col_port_enable; 4033 4034 mlxsw_core_lag_mapping_set(mlxsw_sp->core, lag_id, port_index, 4035 mlxsw_sp_port->local_port); 4036 mlxsw_sp_port->lag_id = lag_id; 4037 mlxsw_sp_port->lagged = 1; 4038 lag->ref_count++; 4039 4040 mlxsw_sp_port_pvid_vport_lag_join(mlxsw_sp_port, lag_id); 4041 4042 return 0; 4043 4044 err_col_port_enable: 4045 mlxsw_sp_lag_col_port_remove(mlxsw_sp_port, lag_id); 4046 err_col_port_add: 4047 if (!lag->ref_count) 4048 mlxsw_sp_lag_destroy(mlxsw_sp, lag_id); 4049 return err; 4050 } 4051 4052 static void mlxsw_sp_port_lag_leave(struct mlxsw_sp_port *mlxsw_sp_port, 4053 struct net_device *lag_dev) 4054 { 4055 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp; 4056 u16 lag_id = mlxsw_sp_port->lag_id; 4057 struct mlxsw_sp_upper *lag; 4058 4059 if (!mlxsw_sp_port->lagged) 4060 return; 4061 lag = mlxsw_sp_lag_get(mlxsw_sp, lag_id); 4062 WARN_ON(lag->ref_count == 0); 4063 4064 mlxsw_sp_lag_col_port_disable(mlxsw_sp_port, lag_id); 4065 mlxsw_sp_lag_col_port_remove(mlxsw_sp_port, lag_id); 4066 4067 if (mlxsw_sp_port->bridged) { 4068 mlxsw_sp_port_active_vlans_del(mlxsw_sp_port); 4069 mlxsw_sp_port_bridge_leave(mlxsw_sp_port); 4070 } 4071 4072 if (lag->ref_count == 1) 4073 mlxsw_sp_lag_destroy(mlxsw_sp, lag_id); 4074 4075 mlxsw_core_lag_mapping_clear(mlxsw_sp->core, lag_id, 4076 mlxsw_sp_port->local_port); 4077 mlxsw_sp_port->lagged = 0; 4078 lag->ref_count--; 4079 4080 mlxsw_sp_port_pvid_vport_lag_leave(mlxsw_sp_port); 4081 } 4082 4083 static int mlxsw_sp_lag_dist_port_add(struct mlxsw_sp_port *mlxsw_sp_port, 4084 u16 lag_id) 4085 { 4086 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp; 4087 char sldr_pl[MLXSW_REG_SLDR_LEN]; 4088 4089 mlxsw_reg_sldr_lag_add_port_pack(sldr_pl, lag_id, 4090 mlxsw_sp_port->local_port); 4091 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(sldr), sldr_pl); 4092 } 4093 4094 static int mlxsw_sp_lag_dist_port_remove(struct mlxsw_sp_port *mlxsw_sp_port, 4095 u16 lag_id) 4096 { 4097 struct mlxsw_sp *mlxsw_sp = mlxsw_sp_port->mlxsw_sp; 4098 char sldr_pl[MLXSW_REG_SLDR_LEN]; 4099 4100 mlxsw_reg_sldr_lag_remove_port_pack(sldr_pl, lag_id, 4101 mlxsw_sp_port->local_port); 4102 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(sldr), sldr_pl); 4103 } 4104 4105 static int mlxsw_sp_port_lag_tx_en_set(struct mlxsw_sp_port *mlxsw_sp_port, 4106 bool lag_tx_enabled) 4107 { 4108 if (lag_tx_enabled) 4109 return mlxsw_sp_lag_dist_port_add(mlxsw_sp_port, 4110 mlxsw_sp_port->lag_id); 4111 else 4112 return mlxsw_sp_lag_dist_port_remove(mlxsw_sp_port, 4113 mlxsw_sp_port->lag_id); 4114 } 4115 4116 static int mlxsw_sp_port_lag_changed(struct mlxsw_sp_port *mlxsw_sp_port, 4117 struct netdev_lag_lower_state_info *info) 4118 { 4119 return mlxsw_sp_port_lag_tx_en_set(mlxsw_sp_port, info->tx_enabled); 4120 } 4121 4122 static int mlxsw_sp_port_vlan_link(struct mlxsw_sp_port *mlxsw_sp_port, 4123 struct net_device *vlan_dev) 4124 { 4125 struct mlxsw_sp_port *mlxsw_sp_vport; 4126 u16 vid = vlan_dev_vlan_id(vlan_dev); 4127 4128 mlxsw_sp_vport = mlxsw_sp_port_vport_find(mlxsw_sp_port, vid); 4129 if (WARN_ON(!mlxsw_sp_vport)) 4130 return -EINVAL; 4131 4132 mlxsw_sp_vport->dev = vlan_dev; 4133 4134 return 0; 4135 } 4136 4137 static void mlxsw_sp_port_vlan_unlink(struct mlxsw_sp_port *mlxsw_sp_port, 4138 struct net_device *vlan_dev) 4139 { 4140 struct mlxsw_sp_port *mlxsw_sp_vport; 4141 u16 vid = vlan_dev_vlan_id(vlan_dev); 4142 4143 mlxsw_sp_vport = mlxsw_sp_port_vport_find(mlxsw_sp_port, vid); 4144 if (WARN_ON(!mlxsw_sp_vport)) 4145 return; 4146 4147 mlxsw_sp_vport->dev = mlxsw_sp_port->dev; 4148 } 4149 4150 static int mlxsw_sp_netdevice_port_upper_event(struct net_device *dev, 4151 unsigned long event, void *ptr) 4152 { 4153 struct netdev_notifier_changeupper_info *info; 4154 struct mlxsw_sp_port *mlxsw_sp_port; 4155 struct net_device *upper_dev; 4156 struct mlxsw_sp *mlxsw_sp; 4157 int err = 0; 4158 4159 mlxsw_sp_port = netdev_priv(dev); 4160 mlxsw_sp = mlxsw_sp_port->mlxsw_sp; 4161 info = ptr; 4162 4163 switch (event) { 4164 case NETDEV_PRECHANGEUPPER: 4165 upper_dev = info->upper_dev; 4166 if (!is_vlan_dev(upper_dev) && 4167 !netif_is_lag_master(upper_dev) && 4168 !netif_is_bridge_master(upper_dev)) 4169 return -EINVAL; 4170 if (!info->linking) 4171 break; 4172 /* HW limitation forbids to put ports to multiple bridges. */ 4173 if (netif_is_bridge_master(upper_dev) && 4174 !mlxsw_sp_master_bridge_check(mlxsw_sp, upper_dev)) 4175 return -EINVAL; 4176 if (netif_is_lag_master(upper_dev) && 4177 !mlxsw_sp_master_lag_check(mlxsw_sp, upper_dev, 4178 info->upper_info)) 4179 return -EINVAL; 4180 if (netif_is_lag_master(upper_dev) && vlan_uses_dev(dev)) 4181 return -EINVAL; 4182 if (netif_is_lag_port(dev) && is_vlan_dev(upper_dev) && 4183 !netif_is_lag_master(vlan_dev_real_dev(upper_dev))) 4184 return -EINVAL; 4185 break; 4186 case NETDEV_CHANGEUPPER: 4187 upper_dev = info->upper_dev; 4188 if (is_vlan_dev(upper_dev)) { 4189 if (info->linking) 4190 err = mlxsw_sp_port_vlan_link(mlxsw_sp_port, 4191 upper_dev); 4192 else 4193 mlxsw_sp_port_vlan_unlink(mlxsw_sp_port, 4194 upper_dev); 4195 } else if (netif_is_bridge_master(upper_dev)) { 4196 if (info->linking) 4197 err = mlxsw_sp_port_bridge_join(mlxsw_sp_port, 4198 upper_dev); 4199 else 4200 mlxsw_sp_port_bridge_leave(mlxsw_sp_port); 4201 } else if (netif_is_lag_master(upper_dev)) { 4202 if (info->linking) 4203 err = mlxsw_sp_port_lag_join(mlxsw_sp_port, 4204 upper_dev); 4205 else 4206 mlxsw_sp_port_lag_leave(mlxsw_sp_port, 4207 upper_dev); 4208 } else { 4209 err = -EINVAL; 4210 WARN_ON(1); 4211 } 4212 break; 4213 } 4214 4215 return err; 4216 } 4217 4218 static int mlxsw_sp_netdevice_port_lower_event(struct net_device *dev, 4219 unsigned long event, void *ptr) 4220 { 4221 struct netdev_notifier_changelowerstate_info *info; 4222 struct mlxsw_sp_port *mlxsw_sp_port; 4223 int err; 4224 4225 mlxsw_sp_port = netdev_priv(dev); 4226 info = ptr; 4227 4228 switch (event) { 4229 case NETDEV_CHANGELOWERSTATE: 4230 if (netif_is_lag_port(dev) && mlxsw_sp_port->lagged) { 4231 err = mlxsw_sp_port_lag_changed(mlxsw_sp_port, 4232 info->lower_state_info); 4233 if (err) 4234 netdev_err(dev, "Failed to reflect link aggregation lower state change\n"); 4235 } 4236 break; 4237 } 4238 4239 return 0; 4240 } 4241 4242 static int mlxsw_sp_netdevice_port_event(struct net_device *dev, 4243 unsigned long event, void *ptr) 4244 { 4245 switch (event) { 4246 case NETDEV_PRECHANGEUPPER: 4247 case NETDEV_CHANGEUPPER: 4248 return mlxsw_sp_netdevice_port_upper_event(dev, event, ptr); 4249 case NETDEV_CHANGELOWERSTATE: 4250 return mlxsw_sp_netdevice_port_lower_event(dev, event, ptr); 4251 } 4252 4253 return 0; 4254 } 4255 4256 static int mlxsw_sp_netdevice_lag_event(struct net_device *lag_dev, 4257 unsigned long event, void *ptr) 4258 { 4259 struct net_device *dev; 4260 struct list_head *iter; 4261 int ret; 4262 4263 netdev_for_each_lower_dev(lag_dev, dev, iter) { 4264 if (mlxsw_sp_port_dev_check(dev)) { 4265 ret = mlxsw_sp_netdevice_port_event(dev, event, ptr); 4266 if (ret) 4267 return ret; 4268 } 4269 } 4270 4271 return 0; 4272 } 4273 4274 static int mlxsw_sp_master_bridge_vlan_link(struct mlxsw_sp *mlxsw_sp, 4275 struct net_device *vlan_dev) 4276 { 4277 u16 fid = vlan_dev_vlan_id(vlan_dev); 4278 struct mlxsw_sp_fid *f; 4279 4280 f = mlxsw_sp_fid_find(mlxsw_sp, fid); 4281 if (!f) { 4282 f = mlxsw_sp_fid_create(mlxsw_sp, fid); 4283 if (IS_ERR(f)) 4284 return PTR_ERR(f); 4285 } 4286 4287 f->ref_count++; 4288 4289 return 0; 4290 } 4291 4292 static void mlxsw_sp_master_bridge_vlan_unlink(struct mlxsw_sp *mlxsw_sp, 4293 struct net_device *vlan_dev) 4294 { 4295 u16 fid = vlan_dev_vlan_id(vlan_dev); 4296 struct mlxsw_sp_fid *f; 4297 4298 f = mlxsw_sp_fid_find(mlxsw_sp, fid); 4299 if (f && f->r) 4300 mlxsw_sp_rif_bridge_destroy(mlxsw_sp, f->r); 4301 if (f && --f->ref_count == 0) 4302 mlxsw_sp_fid_destroy(mlxsw_sp, f); 4303 } 4304 4305 static int mlxsw_sp_netdevice_bridge_event(struct net_device *br_dev, 4306 unsigned long event, void *ptr) 4307 { 4308 struct netdev_notifier_changeupper_info *info; 4309 struct net_device *upper_dev; 4310 struct mlxsw_sp *mlxsw_sp; 4311 int err; 4312 4313 mlxsw_sp = mlxsw_sp_lower_get(br_dev); 4314 if (!mlxsw_sp) 4315 return 0; 4316 if (br_dev != mlxsw_sp->master_bridge.dev) 4317 return 0; 4318 4319 info = ptr; 4320 4321 switch (event) { 4322 case NETDEV_CHANGEUPPER: 4323 upper_dev = info->upper_dev; 4324 if (!is_vlan_dev(upper_dev)) 4325 break; 4326 if (info->linking) { 4327 err = mlxsw_sp_master_bridge_vlan_link(mlxsw_sp, 4328 upper_dev); 4329 if (err) 4330 return err; 4331 } else { 4332 mlxsw_sp_master_bridge_vlan_unlink(mlxsw_sp, upper_dev); 4333 } 4334 break; 4335 } 4336 4337 return 0; 4338 } 4339 4340 static u16 mlxsw_sp_avail_vfid_get(const struct mlxsw_sp *mlxsw_sp) 4341 { 4342 return find_first_zero_bit(mlxsw_sp->vfids.mapped, 4343 MLXSW_SP_VFID_MAX); 4344 } 4345 4346 static int mlxsw_sp_vfid_op(struct mlxsw_sp *mlxsw_sp, u16 fid, bool create) 4347 { 4348 char sfmr_pl[MLXSW_REG_SFMR_LEN]; 4349 4350 mlxsw_reg_sfmr_pack(sfmr_pl, !create, fid, 0); 4351 return mlxsw_reg_write(mlxsw_sp->core, MLXSW_REG(sfmr), sfmr_pl); 4352 } 4353 4354 static void mlxsw_sp_vport_vfid_leave(struct mlxsw_sp_port *mlxsw_sp_vport); 4355 4356 static struct mlxsw_sp_fid *mlxsw_sp_vfid_create(struct mlxsw_sp *mlxsw_sp, 4357 struct net_device *br_dev) 4358 { 4359 struct device *dev = mlxsw_sp->bus_info->dev; 4360 struct mlxsw_sp_fid *f; 4361 u16 vfid, fid; 4362 int err; 4363 4364 vfid = mlxsw_sp_avail_vfid_get(mlxsw_sp); 4365 if (vfid == MLXSW_SP_VFID_MAX) { 4366 dev_err(dev, "No available vFIDs\n"); 4367 return ERR_PTR(-ERANGE); 4368 } 4369 4370 fid = mlxsw_sp_vfid_to_fid(vfid); 4371 err = mlxsw_sp_vfid_op(mlxsw_sp, fid, true); 4372 if (err) { 4373 dev_err(dev, "Failed to create FID=%d\n", fid); 4374 return ERR_PTR(err); 4375 } 4376 4377 f = kzalloc(sizeof(*f), GFP_KERNEL); 4378 if (!f) 4379 goto err_allocate_vfid; 4380 4381 f->leave = mlxsw_sp_vport_vfid_leave; 4382 f->fid = fid; 4383 f->dev = br_dev; 4384 4385 list_add(&f->list, &mlxsw_sp->vfids.list); 4386 set_bit(vfid, mlxsw_sp->vfids.mapped); 4387 4388 return f; 4389 4390 err_allocate_vfid: 4391 mlxsw_sp_vfid_op(mlxsw_sp, fid, false); 4392 return ERR_PTR(-ENOMEM); 4393 } 4394 4395 static void mlxsw_sp_vfid_destroy(struct mlxsw_sp *mlxsw_sp, 4396 struct mlxsw_sp_fid *f) 4397 { 4398 u16 vfid = mlxsw_sp_fid_to_vfid(f->fid); 4399 u16 fid = f->fid; 4400 4401 clear_bit(vfid, mlxsw_sp->vfids.mapped); 4402 list_del(&f->list); 4403 4404 if (f->r) 4405 mlxsw_sp_rif_bridge_destroy(mlxsw_sp, f->r); 4406 4407 kfree(f); 4408 4409 mlxsw_sp_vfid_op(mlxsw_sp, fid, false); 4410 } 4411 4412 static int mlxsw_sp_vport_fid_map(struct mlxsw_sp_port *mlxsw_sp_vport, u16 fid, 4413 bool valid) 4414 { 4415 enum mlxsw_reg_svfa_mt mt = MLXSW_REG_SVFA_MT_PORT_VID_TO_FID; 4416 u16 vid = mlxsw_sp_vport_vid_get(mlxsw_sp_vport); 4417 4418 return mlxsw_sp_port_vid_to_fid_set(mlxsw_sp_vport, mt, valid, fid, 4419 vid); 4420 } 4421 4422 static int mlxsw_sp_vport_vfid_join(struct mlxsw_sp_port *mlxsw_sp_vport, 4423 struct net_device *br_dev) 4424 { 4425 struct mlxsw_sp_fid *f; 4426 int err; 4427 4428 f = mlxsw_sp_vfid_find(mlxsw_sp_vport->mlxsw_sp, br_dev); 4429 if (!f) { 4430 f = mlxsw_sp_vfid_create(mlxsw_sp_vport->mlxsw_sp, br_dev); 4431 if (IS_ERR(f)) 4432 return PTR_ERR(f); 4433 } 4434 4435 err = mlxsw_sp_vport_flood_set(mlxsw_sp_vport, f->fid, true); 4436 if (err) 4437 goto err_vport_flood_set; 4438 4439 err = mlxsw_sp_vport_fid_map(mlxsw_sp_vport, f->fid, true); 4440 if (err) 4441 goto err_vport_fid_map; 4442 4443 mlxsw_sp_vport_fid_set(mlxsw_sp_vport, f); 4444 f->ref_count++; 4445 4446 netdev_dbg(mlxsw_sp_vport->dev, "Joined FID=%d\n", f->fid); 4447 4448 return 0; 4449 4450 err_vport_fid_map: 4451 mlxsw_sp_vport_flood_set(mlxsw_sp_vport, f->fid, false); 4452 err_vport_flood_set: 4453 if (!f->ref_count) 4454 mlxsw_sp_vfid_destroy(mlxsw_sp_vport->mlxsw_sp, f); 4455 return err; 4456 } 4457 4458 static void mlxsw_sp_vport_vfid_leave(struct mlxsw_sp_port *mlxsw_sp_vport) 4459 { 4460 struct mlxsw_sp_fid *f = mlxsw_sp_vport_fid_get(mlxsw_sp_vport); 4461 4462 netdev_dbg(mlxsw_sp_vport->dev, "Left FID=%d\n", f->fid); 4463 4464 mlxsw_sp_vport_fid_map(mlxsw_sp_vport, f->fid, false); 4465 4466 mlxsw_sp_vport_flood_set(mlxsw_sp_vport, f->fid, false); 4467 4468 mlxsw_sp_port_fdb_flush(mlxsw_sp_vport, f->fid); 4469 4470 mlxsw_sp_vport_fid_set(mlxsw_sp_vport, NULL); 4471 if (--f->ref_count == 0) 4472 mlxsw_sp_vfid_destroy(mlxsw_sp_vport->mlxsw_sp, f); 4473 } 4474 4475 static int mlxsw_sp_vport_bridge_join(struct mlxsw_sp_port *mlxsw_sp_vport, 4476 struct net_device *br_dev) 4477 { 4478 struct mlxsw_sp_fid *f = mlxsw_sp_vport_fid_get(mlxsw_sp_vport); 4479 u16 vid = mlxsw_sp_vport_vid_get(mlxsw_sp_vport); 4480 struct net_device *dev = mlxsw_sp_vport->dev; 4481 int err; 4482 4483 if (f && !WARN_ON(!f->leave)) 4484 f->leave(mlxsw_sp_vport); 4485 4486 err = mlxsw_sp_vport_vfid_join(mlxsw_sp_vport, br_dev); 4487 if (err) { 4488 netdev_err(dev, "Failed to join vFID\n"); 4489 return err; 4490 } 4491 4492 err = mlxsw_sp_port_vid_learning_set(mlxsw_sp_vport, vid, true); 4493 if (err) { 4494 netdev_err(dev, "Failed to enable learning\n"); 4495 goto err_port_vid_learning_set; 4496 } 4497 4498 mlxsw_sp_vport->learning = 1; 4499 mlxsw_sp_vport->learning_sync = 1; 4500 mlxsw_sp_vport->uc_flood = 1; 4501 mlxsw_sp_vport->bridged = 1; 4502 4503 return 0; 4504 4505 err_port_vid_learning_set: 4506 mlxsw_sp_vport_vfid_leave(mlxsw_sp_vport); 4507 return err; 4508 } 4509 4510 static void mlxsw_sp_vport_bridge_leave(struct mlxsw_sp_port *mlxsw_sp_vport) 4511 { 4512 u16 vid = mlxsw_sp_vport_vid_get(mlxsw_sp_vport); 4513 4514 mlxsw_sp_port_vid_learning_set(mlxsw_sp_vport, vid, false); 4515 4516 mlxsw_sp_vport_vfid_leave(mlxsw_sp_vport); 4517 4518 mlxsw_sp_vport->learning = 0; 4519 mlxsw_sp_vport->learning_sync = 0; 4520 mlxsw_sp_vport->uc_flood = 0; 4521 mlxsw_sp_vport->bridged = 0; 4522 } 4523 4524 static bool 4525 mlxsw_sp_port_master_bridge_check(const struct mlxsw_sp_port *mlxsw_sp_port, 4526 const struct net_device *br_dev) 4527 { 4528 struct mlxsw_sp_port *mlxsw_sp_vport; 4529 4530 list_for_each_entry(mlxsw_sp_vport, &mlxsw_sp_port->vports_list, 4531 vport.list) { 4532 struct net_device *dev = mlxsw_sp_vport_dev_get(mlxsw_sp_vport); 4533 4534 if (dev && dev == br_dev) 4535 return false; 4536 } 4537 4538 return true; 4539 } 4540 4541 static int mlxsw_sp_netdevice_vport_event(struct net_device *dev, 4542 unsigned long event, void *ptr, 4543 u16 vid) 4544 { 4545 struct mlxsw_sp_port *mlxsw_sp_port = netdev_priv(dev); 4546 struct netdev_notifier_changeupper_info *info = ptr; 4547 struct mlxsw_sp_port *mlxsw_sp_vport; 4548 struct net_device *upper_dev; 4549 int err = 0; 4550 4551 mlxsw_sp_vport = mlxsw_sp_port_vport_find(mlxsw_sp_port, vid); 4552 4553 switch (event) { 4554 case NETDEV_PRECHANGEUPPER: 4555 upper_dev = info->upper_dev; 4556 if (!netif_is_bridge_master(upper_dev)) 4557 return -EINVAL; 4558 if (!info->linking) 4559 break; 4560 /* We can't have multiple VLAN interfaces configured on 4561 * the same port and being members in the same bridge. 4562 */ 4563 if (!mlxsw_sp_port_master_bridge_check(mlxsw_sp_port, 4564 upper_dev)) 4565 return -EINVAL; 4566 break; 4567 case NETDEV_CHANGEUPPER: 4568 upper_dev = info->upper_dev; 4569 if (info->linking) { 4570 if (WARN_ON(!mlxsw_sp_vport)) 4571 return -EINVAL; 4572 err = mlxsw_sp_vport_bridge_join(mlxsw_sp_vport, 4573 upper_dev); 4574 } else { 4575 if (!mlxsw_sp_vport) 4576 return 0; 4577 mlxsw_sp_vport_bridge_leave(mlxsw_sp_vport); 4578 } 4579 } 4580 4581 return err; 4582 } 4583 4584 static int mlxsw_sp_netdevice_lag_vport_event(struct net_device *lag_dev, 4585 unsigned long event, void *ptr, 4586 u16 vid) 4587 { 4588 struct net_device *dev; 4589 struct list_head *iter; 4590 int ret; 4591 4592 netdev_for_each_lower_dev(lag_dev, dev, iter) { 4593 if (mlxsw_sp_port_dev_check(dev)) { 4594 ret = mlxsw_sp_netdevice_vport_event(dev, event, ptr, 4595 vid); 4596 if (ret) 4597 return ret; 4598 } 4599 } 4600 4601 return 0; 4602 } 4603 4604 static int mlxsw_sp_netdevice_vlan_event(struct net_device *vlan_dev, 4605 unsigned long event, void *ptr) 4606 { 4607 struct net_device *real_dev = vlan_dev_real_dev(vlan_dev); 4608 u16 vid = vlan_dev_vlan_id(vlan_dev); 4609 4610 if (mlxsw_sp_port_dev_check(real_dev)) 4611 return mlxsw_sp_netdevice_vport_event(real_dev, event, ptr, 4612 vid); 4613 else if (netif_is_lag_master(real_dev)) 4614 return mlxsw_sp_netdevice_lag_vport_event(real_dev, event, ptr, 4615 vid); 4616 4617 return 0; 4618 } 4619 4620 static int mlxsw_sp_netdevice_event(struct notifier_block *unused, 4621 unsigned long event, void *ptr) 4622 { 4623 struct net_device *dev = netdev_notifier_info_to_dev(ptr); 4624 int err = 0; 4625 4626 if (event == NETDEV_CHANGEADDR || event == NETDEV_CHANGEMTU) 4627 err = mlxsw_sp_netdevice_router_port_event(dev); 4628 else if (mlxsw_sp_port_dev_check(dev)) 4629 err = mlxsw_sp_netdevice_port_event(dev, event, ptr); 4630 else if (netif_is_lag_master(dev)) 4631 err = mlxsw_sp_netdevice_lag_event(dev, event, ptr); 4632 else if (netif_is_bridge_master(dev)) 4633 err = mlxsw_sp_netdevice_bridge_event(dev, event, ptr); 4634 else if (is_vlan_dev(dev)) 4635 err = mlxsw_sp_netdevice_vlan_event(dev, event, ptr); 4636 4637 return notifier_from_errno(err); 4638 } 4639 4640 static struct notifier_block mlxsw_sp_netdevice_nb __read_mostly = { 4641 .notifier_call = mlxsw_sp_netdevice_event, 4642 }; 4643 4644 static struct notifier_block mlxsw_sp_inetaddr_nb __read_mostly = { 4645 .notifier_call = mlxsw_sp_inetaddr_event, 4646 .priority = 10, /* Must be called before FIB notifier block */ 4647 }; 4648 4649 static struct notifier_block mlxsw_sp_router_netevent_nb __read_mostly = { 4650 .notifier_call = mlxsw_sp_router_netevent_event, 4651 }; 4652 4653 static int __init mlxsw_sp_module_init(void) 4654 { 4655 int err; 4656 4657 register_netdevice_notifier(&mlxsw_sp_netdevice_nb); 4658 register_inetaddr_notifier(&mlxsw_sp_inetaddr_nb); 4659 register_netevent_notifier(&mlxsw_sp_router_netevent_nb); 4660 4661 err = mlxsw_core_driver_register(&mlxsw_sp_driver); 4662 if (err) 4663 goto err_core_driver_register; 4664 return 0; 4665 4666 err_core_driver_register: 4667 unregister_netevent_notifier(&mlxsw_sp_router_netevent_nb); 4668 unregister_inetaddr_notifier(&mlxsw_sp_inetaddr_nb); 4669 unregister_netdevice_notifier(&mlxsw_sp_netdevice_nb); 4670 return err; 4671 } 4672 4673 static void __exit mlxsw_sp_module_exit(void) 4674 { 4675 mlxsw_core_driver_unregister(&mlxsw_sp_driver); 4676 unregister_netevent_notifier(&mlxsw_sp_router_netevent_nb); 4677 unregister_inetaddr_notifier(&mlxsw_sp_inetaddr_nb); 4678 unregister_netdevice_notifier(&mlxsw_sp_netdevice_nb); 4679 } 4680 4681 module_init(mlxsw_sp_module_init); 4682 module_exit(mlxsw_sp_module_exit); 4683 4684 MODULE_LICENSE("Dual BSD/GPL"); 4685 MODULE_AUTHOR("Jiri Pirko <jiri@mellanox.com>"); 4686 MODULE_DESCRIPTION("Mellanox Spectrum driver"); 4687 MODULE_MLXSW_DRIVER_ALIAS(MLXSW_DEVICE_KIND_SPECTRUM); 4688