1 /* SPDX-License-Identifier: BSD-3-Clause OR GPL-2.0 */
2 /* Copyright (c) 2015-2018 Mellanox Technologies. All rights reserved */
3 
4 #ifndef _MLXSW_PORT_H
5 #define _MLXSW_PORT_H
6 
7 #include <linux/types.h>
8 
9 #define MLXSW_PORT_MAX_MTU		10000
10 
11 #define MLXSW_PORT_DEFAULT_VID		1
12 
13 #define MLXSW_PORT_SWID_DISABLED_PORT	255
14 #define MLXSW_PORT_SWID_ALL_SWIDS	254
15 #define MLXSW_PORT_SWID_TYPE_IB		1
16 #define MLXSW_PORT_SWID_TYPE_ETH	2
17 
18 #define MLXSW_PORT_MAX_IB_PHY_PORTS	36
19 #define MLXSW_PORT_MAX_IB_PORTS		(MLXSW_PORT_MAX_IB_PHY_PORTS + 1)
20 
21 #define MLXSW_PORT_CPU_PORT		0x0
22 
23 #define MLXSW_PORT_DONT_CARE		0xFF
24 
25 enum mlxsw_port_admin_status {
26 	MLXSW_PORT_ADMIN_STATUS_UP = 1,
27 	MLXSW_PORT_ADMIN_STATUS_DOWN = 2,
28 	MLXSW_PORT_ADMIN_STATUS_UP_ONCE = 3,
29 	MLXSW_PORT_ADMIN_STATUS_DISABLED = 4,
30 };
31 
32 enum mlxsw_reg_pude_oper_status {
33 	MLXSW_PORT_OPER_STATUS_UP = 1,
34 	MLXSW_PORT_OPER_STATUS_DOWN = 2,
35 	MLXSW_PORT_OPER_STATUS_FAILURE = 4,	/* Can be set to up again. */
36 };
37 
38 #endif /* _MLXSW_PORT_H */
39