1 /* 2 * drivers/net/ethernet/mellanox/mlxsw/core.h 3 * Copyright (c) 2015 Mellanox Technologies. All rights reserved. 4 * Copyright (c) 2015 Jiri Pirko <jiri@mellanox.com> 5 * Copyright (c) 2015 Ido Schimmel <idosch@mellanox.com> 6 * Copyright (c) 2015 Elad Raz <eladr@mellanox.com> 7 * 8 * Redistribution and use in source and binary forms, with or without 9 * modification, are permitted provided that the following conditions are met: 10 * 11 * 1. Redistributions of source code must retain the above copyright 12 * notice, this list of conditions and the following disclaimer. 13 * 2. Redistributions in binary form must reproduce the above copyright 14 * notice, this list of conditions and the following disclaimer in the 15 * documentation and/or other materials provided with the distribution. 16 * 3. Neither the names of the copyright holders nor the names of its 17 * contributors may be used to endorse or promote products derived from 18 * this software without specific prior written permission. 19 * 20 * Alternatively, this software may be distributed under the terms of the 21 * GNU General Public License ("GPL") version 2 as published by the Free 22 * Software Foundation. 23 * 24 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 25 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 26 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 27 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE 28 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 29 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 30 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 31 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 32 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 33 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 34 * POSSIBILITY OF SUCH DAMAGE. 35 */ 36 37 #ifndef _MLXSW_CORE_H 38 #define _MLXSW_CORE_H 39 40 #include <linux/module.h> 41 #include <linux/device.h> 42 #include <linux/slab.h> 43 #include <linux/gfp.h> 44 #include <linux/types.h> 45 #include <linux/skbuff.h> 46 #include <linux/workqueue.h> 47 #include <net/devlink.h> 48 49 #include "trap.h" 50 #include "reg.h" 51 52 #include "cmd.h" 53 54 #define MLXSW_MODULE_ALIAS_PREFIX "mlxsw-driver-" 55 #define MODULE_MLXSW_DRIVER_ALIAS(kind) \ 56 MODULE_ALIAS(MLXSW_MODULE_ALIAS_PREFIX kind) 57 58 #define MLXSW_DEVICE_KIND_SWITCHX2 "switchx2" 59 #define MLXSW_DEVICE_KIND_SPECTRUM "spectrum" 60 61 struct mlxsw_core; 62 struct mlxsw_driver; 63 struct mlxsw_bus; 64 struct mlxsw_bus_info; 65 66 void *mlxsw_core_driver_priv(struct mlxsw_core *mlxsw_core); 67 68 int mlxsw_core_driver_register(struct mlxsw_driver *mlxsw_driver); 69 void mlxsw_core_driver_unregister(struct mlxsw_driver *mlxsw_driver); 70 71 int mlxsw_core_bus_device_register(const struct mlxsw_bus_info *mlxsw_bus_info, 72 const struct mlxsw_bus *mlxsw_bus, 73 void *bus_priv); 74 void mlxsw_core_bus_device_unregister(struct mlxsw_core *mlxsw_core); 75 76 struct mlxsw_tx_info { 77 u8 local_port; 78 bool is_emad; 79 }; 80 81 bool mlxsw_core_skb_transmit_busy(struct mlxsw_core *mlxsw_core, 82 const struct mlxsw_tx_info *tx_info); 83 int mlxsw_core_skb_transmit(struct mlxsw_core *mlxsw_core, struct sk_buff *skb, 84 const struct mlxsw_tx_info *tx_info); 85 86 struct mlxsw_rx_listener { 87 void (*func)(struct sk_buff *skb, u8 local_port, void *priv); 88 u8 local_port; 89 u16 trap_id; 90 enum mlxsw_reg_hpkt_action action; 91 }; 92 93 struct mlxsw_event_listener { 94 void (*func)(const struct mlxsw_reg_info *reg, 95 char *payload, void *priv); 96 enum mlxsw_event_trap_id trap_id; 97 }; 98 99 int mlxsw_core_rx_listener_register(struct mlxsw_core *mlxsw_core, 100 const struct mlxsw_rx_listener *rxl, 101 void *priv); 102 void mlxsw_core_rx_listener_unregister(struct mlxsw_core *mlxsw_core, 103 const struct mlxsw_rx_listener *rxl, 104 void *priv); 105 106 int mlxsw_core_event_listener_register(struct mlxsw_core *mlxsw_core, 107 const struct mlxsw_event_listener *el, 108 void *priv); 109 void mlxsw_core_event_listener_unregister(struct mlxsw_core *mlxsw_core, 110 const struct mlxsw_event_listener *el, 111 void *priv); 112 113 typedef void mlxsw_reg_trans_cb_t(struct mlxsw_core *mlxsw_core, char *payload, 114 size_t payload_len, unsigned long cb_priv); 115 116 int mlxsw_reg_trans_query(struct mlxsw_core *mlxsw_core, 117 const struct mlxsw_reg_info *reg, char *payload, 118 struct list_head *bulk_list, 119 mlxsw_reg_trans_cb_t *cb, unsigned long cb_priv); 120 int mlxsw_reg_trans_write(struct mlxsw_core *mlxsw_core, 121 const struct mlxsw_reg_info *reg, char *payload, 122 struct list_head *bulk_list, 123 mlxsw_reg_trans_cb_t *cb, unsigned long cb_priv); 124 int mlxsw_reg_trans_bulk_wait(struct list_head *bulk_list); 125 126 int mlxsw_reg_query(struct mlxsw_core *mlxsw_core, 127 const struct mlxsw_reg_info *reg, char *payload); 128 int mlxsw_reg_write(struct mlxsw_core *mlxsw_core, 129 const struct mlxsw_reg_info *reg, char *payload); 130 131 struct mlxsw_rx_info { 132 bool is_lag; 133 union { 134 u16 sys_port; 135 u16 lag_id; 136 } u; 137 u8 lag_port_index; 138 int trap_id; 139 }; 140 141 void mlxsw_core_skb_receive(struct mlxsw_core *mlxsw_core, struct sk_buff *skb, 142 struct mlxsw_rx_info *rx_info); 143 144 void mlxsw_core_lag_mapping_set(struct mlxsw_core *mlxsw_core, 145 u16 lag_id, u8 port_index, u8 local_port); 146 u8 mlxsw_core_lag_mapping_get(struct mlxsw_core *mlxsw_core, 147 u16 lag_id, u8 port_index); 148 void mlxsw_core_lag_mapping_clear(struct mlxsw_core *mlxsw_core, 149 u16 lag_id, u8 local_port); 150 151 struct mlxsw_core_port { 152 struct devlink_port devlink_port; 153 }; 154 155 static inline void * 156 mlxsw_core_port_driver_priv(struct mlxsw_core_port *mlxsw_core_port) 157 { 158 /* mlxsw_core_port is ensured to always be the first field in driver 159 * port structure. 160 */ 161 return mlxsw_core_port; 162 } 163 164 int mlxsw_core_port_init(struct mlxsw_core *mlxsw_core, 165 struct mlxsw_core_port *mlxsw_core_port, u8 local_port, 166 struct net_device *dev, bool split, u32 split_group); 167 void mlxsw_core_port_fini(struct mlxsw_core_port *mlxsw_core_port); 168 169 int mlxsw_core_schedule_dw(struct delayed_work *dwork, unsigned long delay); 170 171 #define MLXSW_CONFIG_PROFILE_SWID_COUNT 8 172 173 struct mlxsw_swid_config { 174 u8 used_type:1, 175 used_properties:1; 176 u8 type; 177 u8 properties; 178 }; 179 180 struct mlxsw_config_profile { 181 u16 used_max_vepa_channels:1, 182 used_max_mid:1, 183 used_max_pgt:1, 184 used_max_system_port:1, 185 used_max_vlan_groups:1, 186 used_max_regions:1, 187 used_flood_tables:1, 188 used_flood_mode:1, 189 used_max_ib_mc:1, 190 used_max_pkey:1, 191 used_ar_sec:1, 192 used_adaptive_routing_group_cap:1, 193 used_kvd_split_data:1; /* indicate for the kvd's values */ 194 195 u8 max_vepa_channels; 196 u16 max_mid; 197 u16 max_pgt; 198 u16 max_system_port; 199 u16 max_vlan_groups; 200 u16 max_regions; 201 u8 max_flood_tables; 202 u8 max_vid_flood_tables; 203 u8 flood_mode; 204 u8 max_fid_offset_flood_tables; 205 u16 fid_offset_flood_table_size; 206 u8 max_fid_flood_tables; 207 u16 fid_flood_table_size; 208 u16 max_ib_mc; 209 u16 max_pkey; 210 u8 ar_sec; 211 u16 adaptive_routing_group_cap; 212 u8 arn; 213 u32 kvd_linear_size; 214 u16 kvd_hash_granularity; 215 u8 kvd_hash_single_parts; 216 u8 kvd_hash_double_parts; 217 u8 resource_query_enable; 218 struct mlxsw_swid_config swid_config[MLXSW_CONFIG_PROFILE_SWID_COUNT]; 219 }; 220 221 struct mlxsw_driver { 222 struct list_head list; 223 const char *kind; 224 struct module *owner; 225 size_t priv_size; 226 int (*init)(struct mlxsw_core *mlxsw_core, 227 const struct mlxsw_bus_info *mlxsw_bus_info); 228 void (*fini)(struct mlxsw_core *mlxsw_core); 229 int (*port_split)(struct mlxsw_core *mlxsw_core, u8 local_port, 230 unsigned int count); 231 int (*port_unsplit)(struct mlxsw_core *mlxsw_core, u8 local_port); 232 int (*sb_pool_get)(struct mlxsw_core *mlxsw_core, 233 unsigned int sb_index, u16 pool_index, 234 struct devlink_sb_pool_info *pool_info); 235 int (*sb_pool_set)(struct mlxsw_core *mlxsw_core, 236 unsigned int sb_index, u16 pool_index, u32 size, 237 enum devlink_sb_threshold_type threshold_type); 238 int (*sb_port_pool_get)(struct mlxsw_core_port *mlxsw_core_port, 239 unsigned int sb_index, u16 pool_index, 240 u32 *p_threshold); 241 int (*sb_port_pool_set)(struct mlxsw_core_port *mlxsw_core_port, 242 unsigned int sb_index, u16 pool_index, 243 u32 threshold); 244 int (*sb_tc_pool_bind_get)(struct mlxsw_core_port *mlxsw_core_port, 245 unsigned int sb_index, u16 tc_index, 246 enum devlink_sb_pool_type pool_type, 247 u16 *p_pool_index, u32 *p_threshold); 248 int (*sb_tc_pool_bind_set)(struct mlxsw_core_port *mlxsw_core_port, 249 unsigned int sb_index, u16 tc_index, 250 enum devlink_sb_pool_type pool_type, 251 u16 pool_index, u32 threshold); 252 int (*sb_occ_snapshot)(struct mlxsw_core *mlxsw_core, 253 unsigned int sb_index); 254 int (*sb_occ_max_clear)(struct mlxsw_core *mlxsw_core, 255 unsigned int sb_index); 256 int (*sb_occ_port_pool_get)(struct mlxsw_core_port *mlxsw_core_port, 257 unsigned int sb_index, u16 pool_index, 258 u32 *p_cur, u32 *p_max); 259 int (*sb_occ_tc_port_bind_get)(struct mlxsw_core_port *mlxsw_core_port, 260 unsigned int sb_index, u16 tc_index, 261 enum devlink_sb_pool_type pool_type, 262 u32 *p_cur, u32 *p_max); 263 void (*txhdr_construct)(struct sk_buff *skb, 264 const struct mlxsw_tx_info *tx_info); 265 u8 txhdr_len; 266 const struct mlxsw_config_profile *profile; 267 }; 268 269 struct mlxsw_resources { 270 u32 max_span_valid:1, 271 max_lag_valid:1, 272 max_ports_in_lag_valid:1, 273 kvd_size_valid:1, 274 kvd_single_min_size_valid:1, 275 kvd_double_min_size_valid:1, 276 max_virtual_routers_valid:1, 277 max_system_ports_valid:1, 278 max_vlan_groups_valid:1, 279 max_regions_valid:1, 280 max_rif_valid:1; 281 u8 max_span; 282 u8 max_lag; 283 u8 max_ports_in_lag; 284 u32 kvd_size; 285 u32 kvd_single_min_size; 286 u32 kvd_double_min_size; 287 u16 max_virtual_routers; 288 u16 max_system_ports; 289 u16 max_vlan_groups; 290 u16 max_regions; 291 u16 max_rif; 292 293 /* Internal resources. 294 * Determined by the SW, not queried from the HW. 295 */ 296 u32 kvd_single_size; 297 u32 kvd_double_size; 298 u32 kvd_linear_size; 299 }; 300 301 struct mlxsw_resources *mlxsw_core_resources_get(struct mlxsw_core *mlxsw_core); 302 303 struct mlxsw_bus { 304 const char *kind; 305 int (*init)(void *bus_priv, struct mlxsw_core *mlxsw_core, 306 const struct mlxsw_config_profile *profile, 307 struct mlxsw_resources *resources); 308 void (*fini)(void *bus_priv); 309 bool (*skb_transmit_busy)(void *bus_priv, 310 const struct mlxsw_tx_info *tx_info); 311 int (*skb_transmit)(void *bus_priv, struct sk_buff *skb, 312 const struct mlxsw_tx_info *tx_info); 313 int (*cmd_exec)(void *bus_priv, u16 opcode, u8 opcode_mod, 314 u32 in_mod, bool out_mbox_direct, 315 char *in_mbox, size_t in_mbox_size, 316 char *out_mbox, size_t out_mbox_size, 317 u8 *p_status); 318 }; 319 320 struct mlxsw_bus_info { 321 const char *device_kind; 322 const char *device_name; 323 struct device *dev; 324 struct { 325 u16 major; 326 u16 minor; 327 u16 subminor; 328 } fw_rev; 329 u8 vsd[MLXSW_CMD_BOARDINFO_VSD_LEN]; 330 u8 psid[MLXSW_CMD_BOARDINFO_PSID_LEN]; 331 }; 332 333 struct mlxsw_hwmon; 334 335 #ifdef CONFIG_MLXSW_CORE_HWMON 336 337 int mlxsw_hwmon_init(struct mlxsw_core *mlxsw_core, 338 const struct mlxsw_bus_info *mlxsw_bus_info, 339 struct mlxsw_hwmon **p_hwmon); 340 void mlxsw_hwmon_fini(struct mlxsw_hwmon *mlxsw_hwmon); 341 342 #else 343 344 static inline int mlxsw_hwmon_init(struct mlxsw_core *mlxsw_core, 345 const struct mlxsw_bus_info *mlxsw_bus_info, 346 struct mlxsw_hwmon **p_hwmon) 347 { 348 return 0; 349 } 350 351 #endif 352 353 #endif 354