1 /* 2 * drivers/net/ethernet/mellanox/mlxsw/core.h 3 * Copyright (c) 2015 Mellanox Technologies. All rights reserved. 4 * Copyright (c) 2015 Jiri Pirko <jiri@mellanox.com> 5 * Copyright (c) 2015 Ido Schimmel <idosch@mellanox.com> 6 * Copyright (c) 2015 Elad Raz <eladr@mellanox.com> 7 * 8 * Redistribution and use in source and binary forms, with or without 9 * modification, are permitted provided that the following conditions are met: 10 * 11 * 1. Redistributions of source code must retain the above copyright 12 * notice, this list of conditions and the following disclaimer. 13 * 2. Redistributions in binary form must reproduce the above copyright 14 * notice, this list of conditions and the following disclaimer in the 15 * documentation and/or other materials provided with the distribution. 16 * 3. Neither the names of the copyright holders nor the names of its 17 * contributors may be used to endorse or promote products derived from 18 * this software without specific prior written permission. 19 * 20 * Alternatively, this software may be distributed under the terms of the 21 * GNU General Public License ("GPL") version 2 as published by the Free 22 * Software Foundation. 23 * 24 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 25 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 26 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 27 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE 28 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 29 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 30 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 31 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 32 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 33 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 34 * POSSIBILITY OF SUCH DAMAGE. 35 */ 36 37 #ifndef _MLXSW_CORE_H 38 #define _MLXSW_CORE_H 39 40 #include <linux/module.h> 41 #include <linux/device.h> 42 #include <linux/slab.h> 43 #include <linux/gfp.h> 44 #include <linux/types.h> 45 #include <linux/skbuff.h> 46 #include <linux/workqueue.h> 47 #include <net/devlink.h> 48 49 #include "trap.h" 50 #include "reg.h" 51 #include "cmd.h" 52 #include "resources.h" 53 54 struct mlxsw_core; 55 struct mlxsw_core_port; 56 struct mlxsw_driver; 57 struct mlxsw_bus; 58 struct mlxsw_bus_info; 59 60 unsigned int mlxsw_core_max_ports(const struct mlxsw_core *mlxsw_core); 61 62 void *mlxsw_core_driver_priv(struct mlxsw_core *mlxsw_core); 63 64 int mlxsw_core_driver_register(struct mlxsw_driver *mlxsw_driver); 65 void mlxsw_core_driver_unregister(struct mlxsw_driver *mlxsw_driver); 66 67 int mlxsw_core_bus_device_register(const struct mlxsw_bus_info *mlxsw_bus_info, 68 const struct mlxsw_bus *mlxsw_bus, 69 void *bus_priv, bool reload, 70 struct devlink *devlink); 71 void mlxsw_core_bus_device_unregister(struct mlxsw_core *mlxsw_core, bool reload); 72 73 struct mlxsw_tx_info { 74 u8 local_port; 75 bool is_emad; 76 }; 77 78 bool mlxsw_core_skb_transmit_busy(struct mlxsw_core *mlxsw_core, 79 const struct mlxsw_tx_info *tx_info); 80 int mlxsw_core_skb_transmit(struct mlxsw_core *mlxsw_core, struct sk_buff *skb, 81 const struct mlxsw_tx_info *tx_info); 82 83 struct mlxsw_rx_listener { 84 void (*func)(struct sk_buff *skb, u8 local_port, void *priv); 85 u8 local_port; 86 u16 trap_id; 87 enum mlxsw_reg_hpkt_action action; 88 }; 89 90 struct mlxsw_event_listener { 91 void (*func)(const struct mlxsw_reg_info *reg, 92 char *payload, void *priv); 93 enum mlxsw_event_trap_id trap_id; 94 }; 95 96 struct mlxsw_listener { 97 u16 trap_id; 98 union { 99 struct mlxsw_rx_listener rx_listener; 100 struct mlxsw_event_listener event_listener; 101 } u; 102 enum mlxsw_reg_hpkt_action action; 103 enum mlxsw_reg_hpkt_action unreg_action; 104 u8 trap_group; 105 bool is_ctrl; /* should go via control buffer or not */ 106 bool is_event; 107 }; 108 109 #define MLXSW_RXL(_func, _trap_id, _action, _is_ctrl, _trap_group, \ 110 _unreg_action) \ 111 { \ 112 .trap_id = MLXSW_TRAP_ID_##_trap_id, \ 113 .u.rx_listener = \ 114 { \ 115 .func = _func, \ 116 .local_port = MLXSW_PORT_DONT_CARE, \ 117 .trap_id = MLXSW_TRAP_ID_##_trap_id, \ 118 }, \ 119 .action = MLXSW_REG_HPKT_ACTION_##_action, \ 120 .unreg_action = MLXSW_REG_HPKT_ACTION_##_unreg_action, \ 121 .trap_group = MLXSW_REG_HTGT_TRAP_GROUP_##_trap_group, \ 122 .is_ctrl = _is_ctrl, \ 123 .is_event = false, \ 124 } 125 126 #define MLXSW_EVENTL(_func, _trap_id, _trap_group) \ 127 { \ 128 .trap_id = MLXSW_TRAP_ID_##_trap_id, \ 129 .u.event_listener = \ 130 { \ 131 .func = _func, \ 132 .trap_id = MLXSW_TRAP_ID_##_trap_id, \ 133 }, \ 134 .action = MLXSW_REG_HPKT_ACTION_TRAP_TO_CPU, \ 135 .trap_group = MLXSW_REG_HTGT_TRAP_GROUP_##_trap_group, \ 136 .is_ctrl = false, \ 137 .is_event = true, \ 138 } 139 140 int mlxsw_core_rx_listener_register(struct mlxsw_core *mlxsw_core, 141 const struct mlxsw_rx_listener *rxl, 142 void *priv); 143 void mlxsw_core_rx_listener_unregister(struct mlxsw_core *mlxsw_core, 144 const struct mlxsw_rx_listener *rxl, 145 void *priv); 146 147 int mlxsw_core_event_listener_register(struct mlxsw_core *mlxsw_core, 148 const struct mlxsw_event_listener *el, 149 void *priv); 150 void mlxsw_core_event_listener_unregister(struct mlxsw_core *mlxsw_core, 151 const struct mlxsw_event_listener *el, 152 void *priv); 153 154 int mlxsw_core_trap_register(struct mlxsw_core *mlxsw_core, 155 const struct mlxsw_listener *listener, 156 void *priv); 157 void mlxsw_core_trap_unregister(struct mlxsw_core *mlxsw_core, 158 const struct mlxsw_listener *listener, 159 void *priv); 160 161 typedef void mlxsw_reg_trans_cb_t(struct mlxsw_core *mlxsw_core, char *payload, 162 size_t payload_len, unsigned long cb_priv); 163 164 int mlxsw_reg_trans_query(struct mlxsw_core *mlxsw_core, 165 const struct mlxsw_reg_info *reg, char *payload, 166 struct list_head *bulk_list, 167 mlxsw_reg_trans_cb_t *cb, unsigned long cb_priv); 168 int mlxsw_reg_trans_write(struct mlxsw_core *mlxsw_core, 169 const struct mlxsw_reg_info *reg, char *payload, 170 struct list_head *bulk_list, 171 mlxsw_reg_trans_cb_t *cb, unsigned long cb_priv); 172 int mlxsw_reg_trans_bulk_wait(struct list_head *bulk_list); 173 174 int mlxsw_reg_query(struct mlxsw_core *mlxsw_core, 175 const struct mlxsw_reg_info *reg, char *payload); 176 int mlxsw_reg_write(struct mlxsw_core *mlxsw_core, 177 const struct mlxsw_reg_info *reg, char *payload); 178 179 struct mlxsw_rx_info { 180 bool is_lag; 181 union { 182 u16 sys_port; 183 u16 lag_id; 184 } u; 185 u8 lag_port_index; 186 int trap_id; 187 }; 188 189 void mlxsw_core_skb_receive(struct mlxsw_core *mlxsw_core, struct sk_buff *skb, 190 struct mlxsw_rx_info *rx_info); 191 192 void mlxsw_core_lag_mapping_set(struct mlxsw_core *mlxsw_core, 193 u16 lag_id, u8 port_index, u8 local_port); 194 u8 mlxsw_core_lag_mapping_get(struct mlxsw_core *mlxsw_core, 195 u16 lag_id, u8 port_index); 196 void mlxsw_core_lag_mapping_clear(struct mlxsw_core *mlxsw_core, 197 u16 lag_id, u8 local_port); 198 199 void *mlxsw_core_port_driver_priv(struct mlxsw_core_port *mlxsw_core_port); 200 int mlxsw_core_port_init(struct mlxsw_core *mlxsw_core, u8 local_port); 201 void mlxsw_core_port_fini(struct mlxsw_core *mlxsw_core, u8 local_port); 202 void mlxsw_core_port_eth_set(struct mlxsw_core *mlxsw_core, u8 local_port, 203 void *port_driver_priv, struct net_device *dev, 204 u32 port_number, bool split, 205 u32 split_port_subnumber); 206 void mlxsw_core_port_ib_set(struct mlxsw_core *mlxsw_core, u8 local_port, 207 void *port_driver_priv); 208 void mlxsw_core_port_clear(struct mlxsw_core *mlxsw_core, u8 local_port, 209 void *port_driver_priv); 210 enum devlink_port_type mlxsw_core_port_type_get(struct mlxsw_core *mlxsw_core, 211 u8 local_port); 212 int mlxsw_core_port_get_phys_port_name(struct mlxsw_core *mlxsw_core, 213 u8 local_port, char *name, size_t len); 214 215 int mlxsw_core_schedule_dw(struct delayed_work *dwork, unsigned long delay); 216 bool mlxsw_core_schedule_work(struct work_struct *work); 217 void mlxsw_core_flush_owq(void); 218 219 #define MLXSW_CONFIG_PROFILE_SWID_COUNT 8 220 221 struct mlxsw_swid_config { 222 u8 used_type:1, 223 used_properties:1; 224 u8 type; 225 u8 properties; 226 }; 227 228 struct mlxsw_config_profile { 229 u16 used_max_vepa_channels:1, 230 used_max_mid:1, 231 used_max_pgt:1, 232 used_max_system_port:1, 233 used_max_vlan_groups:1, 234 used_max_regions:1, 235 used_flood_tables:1, 236 used_flood_mode:1, 237 used_max_ib_mc:1, 238 used_max_pkey:1, 239 used_ar_sec:1, 240 used_adaptive_routing_group_cap:1, 241 used_kvd_sizes:1; 242 u8 max_vepa_channels; 243 u16 max_mid; 244 u16 max_pgt; 245 u16 max_system_port; 246 u16 max_vlan_groups; 247 u16 max_regions; 248 u8 max_flood_tables; 249 u8 max_vid_flood_tables; 250 u8 flood_mode; 251 u8 max_fid_offset_flood_tables; 252 u16 fid_offset_flood_table_size; 253 u8 max_fid_flood_tables; 254 u16 fid_flood_table_size; 255 u16 max_ib_mc; 256 u16 max_pkey; 257 u8 ar_sec; 258 u16 adaptive_routing_group_cap; 259 u8 arn; 260 u32 kvd_linear_size; 261 u8 kvd_hash_single_parts; 262 u8 kvd_hash_double_parts; 263 struct mlxsw_swid_config swid_config[MLXSW_CONFIG_PROFILE_SWID_COUNT]; 264 }; 265 266 struct mlxsw_driver { 267 struct list_head list; 268 const char *kind; 269 size_t priv_size; 270 int (*init)(struct mlxsw_core *mlxsw_core, 271 const struct mlxsw_bus_info *mlxsw_bus_info); 272 void (*fini)(struct mlxsw_core *mlxsw_core); 273 int (*basic_trap_groups_set)(struct mlxsw_core *mlxsw_core); 274 int (*port_type_set)(struct mlxsw_core *mlxsw_core, u8 local_port, 275 enum devlink_port_type new_type); 276 int (*port_split)(struct mlxsw_core *mlxsw_core, u8 local_port, 277 unsigned int count, struct netlink_ext_ack *extack); 278 int (*port_unsplit)(struct mlxsw_core *mlxsw_core, u8 local_port, 279 struct netlink_ext_ack *extack); 280 int (*sb_pool_get)(struct mlxsw_core *mlxsw_core, 281 unsigned int sb_index, u16 pool_index, 282 struct devlink_sb_pool_info *pool_info); 283 int (*sb_pool_set)(struct mlxsw_core *mlxsw_core, 284 unsigned int sb_index, u16 pool_index, u32 size, 285 enum devlink_sb_threshold_type threshold_type); 286 int (*sb_port_pool_get)(struct mlxsw_core_port *mlxsw_core_port, 287 unsigned int sb_index, u16 pool_index, 288 u32 *p_threshold); 289 int (*sb_port_pool_set)(struct mlxsw_core_port *mlxsw_core_port, 290 unsigned int sb_index, u16 pool_index, 291 u32 threshold); 292 int (*sb_tc_pool_bind_get)(struct mlxsw_core_port *mlxsw_core_port, 293 unsigned int sb_index, u16 tc_index, 294 enum devlink_sb_pool_type pool_type, 295 u16 *p_pool_index, u32 *p_threshold); 296 int (*sb_tc_pool_bind_set)(struct mlxsw_core_port *mlxsw_core_port, 297 unsigned int sb_index, u16 tc_index, 298 enum devlink_sb_pool_type pool_type, 299 u16 pool_index, u32 threshold); 300 int (*sb_occ_snapshot)(struct mlxsw_core *mlxsw_core, 301 unsigned int sb_index); 302 int (*sb_occ_max_clear)(struct mlxsw_core *mlxsw_core, 303 unsigned int sb_index); 304 int (*sb_occ_port_pool_get)(struct mlxsw_core_port *mlxsw_core_port, 305 unsigned int sb_index, u16 pool_index, 306 u32 *p_cur, u32 *p_max); 307 int (*sb_occ_tc_port_bind_get)(struct mlxsw_core_port *mlxsw_core_port, 308 unsigned int sb_index, u16 tc_index, 309 enum devlink_sb_pool_type pool_type, 310 u32 *p_cur, u32 *p_max); 311 void (*txhdr_construct)(struct sk_buff *skb, 312 const struct mlxsw_tx_info *tx_info); 313 int (*resources_register)(struct mlxsw_core *mlxsw_core); 314 int (*kvd_sizes_get)(struct mlxsw_core *mlxsw_core, 315 const struct mlxsw_config_profile *profile, 316 u64 *p_single_size, u64 *p_double_size, 317 u64 *p_linear_size); 318 u8 txhdr_len; 319 const struct mlxsw_config_profile *profile; 320 bool res_query_enabled; 321 }; 322 323 int mlxsw_core_kvd_sizes_get(struct mlxsw_core *mlxsw_core, 324 const struct mlxsw_config_profile *profile, 325 u64 *p_single_size, u64 *p_double_size, 326 u64 *p_linear_size); 327 328 bool mlxsw_core_res_valid(struct mlxsw_core *mlxsw_core, 329 enum mlxsw_res_id res_id); 330 331 #define MLXSW_CORE_RES_VALID(mlxsw_core, short_res_id) \ 332 mlxsw_core_res_valid(mlxsw_core, MLXSW_RES_ID_##short_res_id) 333 334 u64 mlxsw_core_res_get(struct mlxsw_core *mlxsw_core, 335 enum mlxsw_res_id res_id); 336 337 #define MLXSW_CORE_RES_GET(mlxsw_core, short_res_id) \ 338 mlxsw_core_res_get(mlxsw_core, MLXSW_RES_ID_##short_res_id) 339 340 #define MLXSW_BUS_F_TXRX BIT(0) 341 #define MLXSW_BUS_F_RESET BIT(1) 342 343 struct mlxsw_bus { 344 const char *kind; 345 int (*init)(void *bus_priv, struct mlxsw_core *mlxsw_core, 346 const struct mlxsw_config_profile *profile, 347 struct mlxsw_res *res); 348 void (*fini)(void *bus_priv); 349 bool (*skb_transmit_busy)(void *bus_priv, 350 const struct mlxsw_tx_info *tx_info); 351 int (*skb_transmit)(void *bus_priv, struct sk_buff *skb, 352 const struct mlxsw_tx_info *tx_info); 353 int (*cmd_exec)(void *bus_priv, u16 opcode, u8 opcode_mod, 354 u32 in_mod, bool out_mbox_direct, 355 char *in_mbox, size_t in_mbox_size, 356 char *out_mbox, size_t out_mbox_size, 357 u8 *p_status); 358 u8 features; 359 }; 360 361 struct mlxsw_fw_rev { 362 u16 major; 363 u16 minor; 364 u16 subminor; 365 }; 366 367 struct mlxsw_bus_info { 368 const char *device_kind; 369 const char *device_name; 370 struct device *dev; 371 struct mlxsw_fw_rev fw_rev; 372 u8 vsd[MLXSW_CMD_BOARDINFO_VSD_LEN]; 373 u8 psid[MLXSW_CMD_BOARDINFO_PSID_LEN]; 374 }; 375 376 struct mlxsw_hwmon; 377 378 #ifdef CONFIG_MLXSW_CORE_HWMON 379 380 int mlxsw_hwmon_init(struct mlxsw_core *mlxsw_core, 381 const struct mlxsw_bus_info *mlxsw_bus_info, 382 struct mlxsw_hwmon **p_hwmon); 383 void mlxsw_hwmon_fini(struct mlxsw_hwmon *mlxsw_hwmon); 384 385 #else 386 387 static inline int mlxsw_hwmon_init(struct mlxsw_core *mlxsw_core, 388 const struct mlxsw_bus_info *mlxsw_bus_info, 389 struct mlxsw_hwmon **p_hwmon) 390 { 391 return 0; 392 } 393 394 #endif 395 396 struct mlxsw_thermal; 397 398 #ifdef CONFIG_MLXSW_CORE_THERMAL 399 400 int mlxsw_thermal_init(struct mlxsw_core *mlxsw_core, 401 const struct mlxsw_bus_info *mlxsw_bus_info, 402 struct mlxsw_thermal **p_thermal); 403 void mlxsw_thermal_fini(struct mlxsw_thermal *thermal); 404 405 #else 406 407 static inline int mlxsw_thermal_init(struct mlxsw_core *mlxsw_core, 408 const struct mlxsw_bus_info *mlxsw_bus_info, 409 struct mlxsw_thermal **p_thermal) 410 { 411 return 0; 412 } 413 414 static inline void mlxsw_thermal_fini(struct mlxsw_thermal *thermal) 415 { 416 } 417 418 #endif 419 420 #endif 421