1 /* SPDX-License-Identifier: BSD-3-Clause OR GPL-2.0 */
2 /* Copyright (c) 2015-2018 Mellanox Technologies. All rights reserved */
3 
4 #ifndef _MLXSW_CORE_H
5 #define _MLXSW_CORE_H
6 
7 #include <linux/module.h>
8 #include <linux/device.h>
9 #include <linux/slab.h>
10 #include <linux/gfp.h>
11 #include <linux/types.h>
12 #include <linux/skbuff.h>
13 #include <linux/workqueue.h>
14 #include <linux/net_namespace.h>
15 #include <linux/auxiliary_bus.h>
16 #include <net/devlink.h>
17 
18 #include "trap.h"
19 #include "reg.h"
20 #include "cmd.h"
21 #include "resources.h"
22 #include "../mlxfw/mlxfw.h"
23 
24 enum mlxsw_core_resource_id {
25 	MLXSW_CORE_RESOURCE_PORTS = 1,
26 	MLXSW_CORE_RESOURCE_MAX,
27 };
28 
29 struct mlxsw_core;
30 struct mlxsw_core_port;
31 struct mlxsw_driver;
32 struct mlxsw_bus;
33 struct mlxsw_bus_info;
34 struct mlxsw_fw_rev;
35 
36 unsigned int mlxsw_core_max_ports(const struct mlxsw_core *mlxsw_core);
37 
38 int mlxsw_core_max_lag(struct mlxsw_core *mlxsw_core, u16 *p_max_lag);
39 
40 void *mlxsw_core_driver_priv(struct mlxsw_core *mlxsw_core);
41 
42 struct mlxsw_linecards *mlxsw_core_linecards(struct mlxsw_core *mlxsw_core);
43 
44 void mlxsw_core_linecards_set(struct mlxsw_core *mlxsw_core,
45 			      struct mlxsw_linecards *linecard);
46 
47 bool
48 mlxsw_core_fw_rev_minor_subminor_validate(const struct mlxsw_fw_rev *rev,
49 					  const struct mlxsw_fw_rev *req_rev);
50 
51 int mlxsw_core_driver_register(struct mlxsw_driver *mlxsw_driver);
52 void mlxsw_core_driver_unregister(struct mlxsw_driver *mlxsw_driver);
53 
54 int mlxsw_core_fw_flash(struct mlxsw_core *mlxsw_core,
55 			struct mlxfw_dev *mlxfw_dev,
56 			const struct firmware *firmware,
57 			struct netlink_ext_ack *extack);
58 
59 int mlxsw_core_bus_device_register(const struct mlxsw_bus_info *mlxsw_bus_info,
60 				   const struct mlxsw_bus *mlxsw_bus,
61 				   void *bus_priv, bool reload,
62 				   struct devlink *devlink,
63 				   struct netlink_ext_ack *extack);
64 void mlxsw_core_bus_device_unregister(struct mlxsw_core *mlxsw_core, bool reload);
65 
66 struct mlxsw_tx_info {
67 	u16 local_port;
68 	bool is_emad;
69 };
70 
71 struct mlxsw_rx_md_info {
72 	u32 cookie_index;
73 	u32 latency;
74 	u32 tx_congestion;
75 	union {
76 		/* Valid when 'tx_port_valid' is set. */
77 		u16 tx_sys_port;
78 		u16 tx_lag_id;
79 	};
80 	u16 tx_lag_port_index; /* Valid when 'tx_port_is_lag' is set. */
81 	u8 tx_tc;
82 	u8 latency_valid:1,
83 	   tx_congestion_valid:1,
84 	   tx_tc_valid:1,
85 	   tx_port_valid:1,
86 	   tx_port_is_lag:1,
87 	   unused:3;
88 };
89 
90 bool mlxsw_core_skb_transmit_busy(struct mlxsw_core *mlxsw_core,
91 				  const struct mlxsw_tx_info *tx_info);
92 int mlxsw_core_skb_transmit(struct mlxsw_core *mlxsw_core, struct sk_buff *skb,
93 			    const struct mlxsw_tx_info *tx_info);
94 void mlxsw_core_ptp_transmitted(struct mlxsw_core *mlxsw_core,
95 				struct sk_buff *skb, u16 local_port);
96 
97 struct mlxsw_rx_listener {
98 	void (*func)(struct sk_buff *skb, u16 local_port, void *priv);
99 	u16 local_port;
100 	u8 mirror_reason;
101 	u16 trap_id;
102 };
103 
104 struct mlxsw_event_listener {
105 	void (*func)(const struct mlxsw_reg_info *reg,
106 		     char *payload, void *priv);
107 	enum mlxsw_event_trap_id trap_id;
108 };
109 
110 struct mlxsw_listener {
111 	u16 trap_id;
112 	union {
113 		struct mlxsw_rx_listener rx_listener;
114 		struct mlxsw_event_listener event_listener;
115 	};
116 	enum mlxsw_reg_hpkt_action en_action; /* Action when enabled */
117 	enum mlxsw_reg_hpkt_action dis_action; /* Action when disabled */
118 	u8 en_trap_group; /* Trap group when enabled */
119 	u8 dis_trap_group; /* Trap group when disabled */
120 	u8 is_ctrl:1, /* should go via control buffer or not */
121 	   is_event:1,
122 	   enabled_on_register:1; /* Trap should be enabled when listener
123 				   * is registered.
124 				   */
125 };
126 
127 #define __MLXSW_RXL(_func, _trap_id, _en_action, _is_ctrl, _en_trap_group,	\
128 		    _dis_action, _enabled_on_register, _dis_trap_group,		\
129 		    _mirror_reason)						\
130 	{									\
131 		.trap_id = MLXSW_TRAP_ID_##_trap_id,				\
132 		.rx_listener =							\
133 		{								\
134 			.func = _func,						\
135 			.local_port = MLXSW_PORT_DONT_CARE,			\
136 			.mirror_reason = _mirror_reason,			\
137 			.trap_id = MLXSW_TRAP_ID_##_trap_id,			\
138 		},								\
139 		.en_action = MLXSW_REG_HPKT_ACTION_##_en_action,		\
140 		.dis_action = MLXSW_REG_HPKT_ACTION_##_dis_action,		\
141 		.en_trap_group = MLXSW_REG_HTGT_TRAP_GROUP_##_en_trap_group,	\
142 		.dis_trap_group = MLXSW_REG_HTGT_TRAP_GROUP_##_dis_trap_group,	\
143 		.is_ctrl = _is_ctrl,						\
144 		.enabled_on_register = _enabled_on_register,			\
145 	}
146 
147 #define MLXSW_RXL(_func, _trap_id, _en_action, _is_ctrl, _trap_group,		\
148 		  _dis_action)							\
149 	__MLXSW_RXL(_func, _trap_id, _en_action, _is_ctrl, _trap_group,		\
150 		    _dis_action, true, _trap_group, 0)
151 
152 #define MLXSW_RXL_DIS(_func, _trap_id, _en_action, _is_ctrl, _en_trap_group,	\
153 		      _dis_action, _dis_trap_group)				\
154 	__MLXSW_RXL(_func, _trap_id, _en_action, _is_ctrl, _en_trap_group,	\
155 		    _dis_action, false, _dis_trap_group, 0)
156 
157 #define MLXSW_RXL_MIRROR(_func, _session_id, _trap_group, _mirror_reason)	\
158 	__MLXSW_RXL(_func, MIRROR_SESSION##_session_id,	TRAP_TO_CPU, false,	\
159 		    _trap_group, TRAP_TO_CPU, true, _trap_group,		\
160 		    _mirror_reason)
161 
162 #define MLXSW_EVENTL(_func, _trap_id, _trap_group)				\
163 	{									\
164 		.trap_id = MLXSW_TRAP_ID_##_trap_id,				\
165 		.event_listener =						\
166 		{								\
167 			.func = _func,						\
168 			.trap_id = MLXSW_TRAP_ID_##_trap_id,			\
169 		},								\
170 		.en_action = MLXSW_REG_HPKT_ACTION_TRAP_TO_CPU,			\
171 		.en_trap_group = MLXSW_REG_HTGT_TRAP_GROUP_##_trap_group,	\
172 		.is_event = true,						\
173 		.enabled_on_register = true,					\
174 	}
175 
176 #define MLXSW_CORE_EVENTL(_func, _trap_id)		\
177 	MLXSW_EVENTL(_func, _trap_id, CORE_EVENT)
178 
179 int mlxsw_core_rx_listener_register(struct mlxsw_core *mlxsw_core,
180 				    const struct mlxsw_rx_listener *rxl,
181 				    void *priv, bool enabled);
182 void mlxsw_core_rx_listener_unregister(struct mlxsw_core *mlxsw_core,
183 				       const struct mlxsw_rx_listener *rxl);
184 
185 int mlxsw_core_event_listener_register(struct mlxsw_core *mlxsw_core,
186 				       const struct mlxsw_event_listener *el,
187 				       void *priv);
188 void mlxsw_core_event_listener_unregister(struct mlxsw_core *mlxsw_core,
189 					  const struct mlxsw_event_listener *el);
190 
191 int mlxsw_core_trap_register(struct mlxsw_core *mlxsw_core,
192 			     const struct mlxsw_listener *listener,
193 			     void *priv);
194 void mlxsw_core_trap_unregister(struct mlxsw_core *mlxsw_core,
195 				const struct mlxsw_listener *listener,
196 				void *priv);
197 int mlxsw_core_traps_register(struct mlxsw_core *mlxsw_core,
198 			      const struct mlxsw_listener *listeners,
199 			      size_t listeners_count, void *priv);
200 void mlxsw_core_traps_unregister(struct mlxsw_core *mlxsw_core,
201 				 const struct mlxsw_listener *listeners,
202 				 size_t listeners_count, void *priv);
203 int mlxsw_core_trap_state_set(struct mlxsw_core *mlxsw_core,
204 			      const struct mlxsw_listener *listener,
205 			      bool enabled);
206 
207 typedef void mlxsw_reg_trans_cb_t(struct mlxsw_core *mlxsw_core, char *payload,
208 				  size_t payload_len, unsigned long cb_priv);
209 
210 int mlxsw_reg_trans_query(struct mlxsw_core *mlxsw_core,
211 			  const struct mlxsw_reg_info *reg, char *payload,
212 			  struct list_head *bulk_list,
213 			  mlxsw_reg_trans_cb_t *cb, unsigned long cb_priv);
214 int mlxsw_reg_trans_write(struct mlxsw_core *mlxsw_core,
215 			  const struct mlxsw_reg_info *reg, char *payload,
216 			  struct list_head *bulk_list,
217 			  mlxsw_reg_trans_cb_t *cb, unsigned long cb_priv);
218 int mlxsw_reg_trans_bulk_wait(struct list_head *bulk_list);
219 
220 typedef void mlxsw_irq_event_cb_t(struct mlxsw_core *mlxsw_core);
221 
222 int mlxsw_core_irq_event_handler_register(struct mlxsw_core *mlxsw_core,
223 					  mlxsw_irq_event_cb_t cb);
224 void mlxsw_core_irq_event_handler_unregister(struct mlxsw_core *mlxsw_core,
225 					     mlxsw_irq_event_cb_t cb);
226 void mlxsw_core_irq_event_handlers_call(struct mlxsw_core *mlxsw_core);
227 
228 int mlxsw_reg_query(struct mlxsw_core *mlxsw_core,
229 		    const struct mlxsw_reg_info *reg, char *payload);
230 int mlxsw_reg_write(struct mlxsw_core *mlxsw_core,
231 		    const struct mlxsw_reg_info *reg, char *payload);
232 
233 struct mlxsw_rx_info {
234 	bool is_lag;
235 	union {
236 		u16 sys_port;
237 		u16 lag_id;
238 	} u;
239 	u16 lag_port_index;
240 	u8 mirror_reason;
241 	int trap_id;
242 };
243 
244 void mlxsw_core_skb_receive(struct mlxsw_core *mlxsw_core, struct sk_buff *skb,
245 			    struct mlxsw_rx_info *rx_info);
246 
247 void mlxsw_core_lag_mapping_set(struct mlxsw_core *mlxsw_core,
248 				u16 lag_id, u8 port_index, u16 local_port);
249 u16 mlxsw_core_lag_mapping_get(struct mlxsw_core *mlxsw_core,
250 			       u16 lag_id, u8 port_index);
251 void mlxsw_core_lag_mapping_clear(struct mlxsw_core *mlxsw_core,
252 				  u16 lag_id, u16 local_port);
253 
254 void *mlxsw_core_port_driver_priv(struct mlxsw_core_port *mlxsw_core_port);
255 int mlxsw_core_port_init(struct mlxsw_core *mlxsw_core, u16 local_port,
256 			 u8 slot_index, u32 port_number, bool split,
257 			 u32 split_port_subnumber,
258 			 bool splittable, u32 lanes,
259 			 const unsigned char *switch_id,
260 			 unsigned char switch_id_len);
261 void mlxsw_core_port_fini(struct mlxsw_core *mlxsw_core, u16 local_port);
262 int mlxsw_core_cpu_port_init(struct mlxsw_core *mlxsw_core,
263 			     void *port_driver_priv,
264 			     const unsigned char *switch_id,
265 			     unsigned char switch_id_len);
266 void mlxsw_core_cpu_port_fini(struct mlxsw_core *mlxsw_core);
267 void mlxsw_core_port_eth_set(struct mlxsw_core *mlxsw_core, u16 local_port,
268 			     void *port_driver_priv, struct net_device *dev);
269 void mlxsw_core_port_clear(struct mlxsw_core *mlxsw_core, u16 local_port,
270 			   void *port_driver_priv);
271 struct devlink_port *
272 mlxsw_core_port_devlink_port_get(struct mlxsw_core *mlxsw_core,
273 				 u16 local_port);
274 struct mlxsw_linecard *
275 mlxsw_core_port_linecard_get(struct mlxsw_core *mlxsw_core,
276 			     u16 local_port);
277 void mlxsw_core_ports_remove_selected(struct mlxsw_core *mlxsw_core,
278 				      bool (*selector)(void *priv,
279 						       u16 local_port),
280 				      void *priv);
281 struct mlxsw_env *mlxsw_core_env(const struct mlxsw_core *mlxsw_core);
282 
283 int mlxsw_core_schedule_dw(struct delayed_work *dwork, unsigned long delay);
284 bool mlxsw_core_schedule_work(struct work_struct *work);
285 void mlxsw_core_flush_owq(void);
286 int mlxsw_core_resources_query(struct mlxsw_core *mlxsw_core, char *mbox,
287 			       struct mlxsw_res *res);
288 
289 #define MLXSW_CONFIG_PROFILE_SWID_COUNT 8
290 
291 struct mlxsw_swid_config {
292 	u8	used_type:1,
293 		used_properties:1;
294 	u8	type;
295 	u8	properties;
296 };
297 
298 struct mlxsw_config_profile {
299 	u16	used_max_vepa_channels:1,
300 		used_max_lag:1,
301 		used_max_mid:1,
302 		used_max_pgt:1,
303 		used_max_system_port:1,
304 		used_max_vlan_groups:1,
305 		used_max_regions:1,
306 		used_flood_tables:1,
307 		used_flood_mode:1,
308 		used_max_ib_mc:1,
309 		used_max_pkey:1,
310 		used_ar_sec:1,
311 		used_adaptive_routing_group_cap:1,
312 		used_ubridge:1,
313 		used_kvd_sizes:1,
314 		used_cqe_time_stamp_type:1;
315 	u8	max_vepa_channels;
316 	u16	max_lag;
317 	u16	max_mid;
318 	u16	max_pgt;
319 	u16	max_system_port;
320 	u16	max_vlan_groups;
321 	u16	max_regions;
322 	u8	max_flood_tables;
323 	u8	max_vid_flood_tables;
324 	u8	flood_mode;
325 	u8	max_fid_offset_flood_tables;
326 	u16	fid_offset_flood_table_size;
327 	u8	max_fid_flood_tables;
328 	u16	fid_flood_table_size;
329 	u16	max_ib_mc;
330 	u16	max_pkey;
331 	u8	ar_sec;
332 	u16	adaptive_routing_group_cap;
333 	u8	arn;
334 	u8	ubridge;
335 	u32	kvd_linear_size;
336 	u8	kvd_hash_single_parts;
337 	u8	kvd_hash_double_parts;
338 	u8	cqe_time_stamp_type;
339 	struct mlxsw_swid_config swid_config[MLXSW_CONFIG_PROFILE_SWID_COUNT];
340 };
341 
342 struct mlxsw_driver {
343 	struct list_head list;
344 	const char *kind;
345 	size_t priv_size;
346 	const struct mlxsw_fw_rev *fw_req_rev;
347 	const char *fw_filename;
348 	int (*init)(struct mlxsw_core *mlxsw_core,
349 		    const struct mlxsw_bus_info *mlxsw_bus_info,
350 		    struct netlink_ext_ack *extack);
351 	void (*fini)(struct mlxsw_core *mlxsw_core);
352 	int (*port_split)(struct mlxsw_core *mlxsw_core, u16 local_port,
353 			  unsigned int count, struct netlink_ext_ack *extack);
354 	int (*port_unsplit)(struct mlxsw_core *mlxsw_core, u16 local_port,
355 			    struct netlink_ext_ack *extack);
356 	void (*ports_remove_selected)(struct mlxsw_core *mlxsw_core,
357 				      bool (*selector)(void *priv,
358 						       u16 local_port),
359 				      void *priv);
360 	int (*sb_pool_get)(struct mlxsw_core *mlxsw_core,
361 			   unsigned int sb_index, u16 pool_index,
362 			   struct devlink_sb_pool_info *pool_info);
363 	int (*sb_pool_set)(struct mlxsw_core *mlxsw_core,
364 			   unsigned int sb_index, u16 pool_index, u32 size,
365 			   enum devlink_sb_threshold_type threshold_type,
366 			   struct netlink_ext_ack *extack);
367 	int (*sb_port_pool_get)(struct mlxsw_core_port *mlxsw_core_port,
368 				unsigned int sb_index, u16 pool_index,
369 				u32 *p_threshold);
370 	int (*sb_port_pool_set)(struct mlxsw_core_port *mlxsw_core_port,
371 				unsigned int sb_index, u16 pool_index,
372 				u32 threshold, struct netlink_ext_ack *extack);
373 	int (*sb_tc_pool_bind_get)(struct mlxsw_core_port *mlxsw_core_port,
374 				   unsigned int sb_index, u16 tc_index,
375 				   enum devlink_sb_pool_type pool_type,
376 				   u16 *p_pool_index, u32 *p_threshold);
377 	int (*sb_tc_pool_bind_set)(struct mlxsw_core_port *mlxsw_core_port,
378 				   unsigned int sb_index, u16 tc_index,
379 				   enum devlink_sb_pool_type pool_type,
380 				   u16 pool_index, u32 threshold,
381 				   struct netlink_ext_ack *extack);
382 	int (*sb_occ_snapshot)(struct mlxsw_core *mlxsw_core,
383 			       unsigned int sb_index);
384 	int (*sb_occ_max_clear)(struct mlxsw_core *mlxsw_core,
385 				unsigned int sb_index);
386 	int (*sb_occ_port_pool_get)(struct mlxsw_core_port *mlxsw_core_port,
387 				    unsigned int sb_index, u16 pool_index,
388 				    u32 *p_cur, u32 *p_max);
389 	int (*sb_occ_tc_port_bind_get)(struct mlxsw_core_port *mlxsw_core_port,
390 				       unsigned int sb_index, u16 tc_index,
391 				       enum devlink_sb_pool_type pool_type,
392 				       u32 *p_cur, u32 *p_max);
393 	int (*trap_init)(struct mlxsw_core *mlxsw_core,
394 			 const struct devlink_trap *trap, void *trap_ctx);
395 	void (*trap_fini)(struct mlxsw_core *mlxsw_core,
396 			  const struct devlink_trap *trap, void *trap_ctx);
397 	int (*trap_action_set)(struct mlxsw_core *mlxsw_core,
398 			       const struct devlink_trap *trap,
399 			       enum devlink_trap_action action,
400 			       struct netlink_ext_ack *extack);
401 	int (*trap_group_init)(struct mlxsw_core *mlxsw_core,
402 			       const struct devlink_trap_group *group);
403 	int (*trap_group_set)(struct mlxsw_core *mlxsw_core,
404 			      const struct devlink_trap_group *group,
405 			      const struct devlink_trap_policer *policer,
406 			      struct netlink_ext_ack *extack);
407 	int (*trap_policer_init)(struct mlxsw_core *mlxsw_core,
408 				 const struct devlink_trap_policer *policer);
409 	void (*trap_policer_fini)(struct mlxsw_core *mlxsw_core,
410 				  const struct devlink_trap_policer *policer);
411 	int (*trap_policer_set)(struct mlxsw_core *mlxsw_core,
412 				const struct devlink_trap_policer *policer,
413 				u64 rate, u64 burst,
414 				struct netlink_ext_ack *extack);
415 	int (*trap_policer_counter_get)(struct mlxsw_core *mlxsw_core,
416 					const struct devlink_trap_policer *policer,
417 					u64 *p_drops);
418 	void (*txhdr_construct)(struct sk_buff *skb,
419 				const struct mlxsw_tx_info *tx_info);
420 	int (*resources_register)(struct mlxsw_core *mlxsw_core);
421 	int (*kvd_sizes_get)(struct mlxsw_core *mlxsw_core,
422 			     const struct mlxsw_config_profile *profile,
423 			     u64 *p_single_size, u64 *p_double_size,
424 			     u64 *p_linear_size);
425 	int (*params_register)(struct mlxsw_core *mlxsw_core);
426 	void (*params_unregister)(struct mlxsw_core *mlxsw_core);
427 
428 	/* Notify a driver that a timestamped packet was transmitted. Driver
429 	 * is responsible for freeing the passed-in SKB.
430 	 */
431 	void (*ptp_transmitted)(struct mlxsw_core *mlxsw_core,
432 				struct sk_buff *skb, u16 local_port);
433 
434 	u8 txhdr_len;
435 	const struct mlxsw_config_profile *profile;
436 	bool sdq_supports_cqe_v2;
437 };
438 
439 int mlxsw_core_kvd_sizes_get(struct mlxsw_core *mlxsw_core,
440 			     const struct mlxsw_config_profile *profile,
441 			     u64 *p_single_size, u64 *p_double_size,
442 			     u64 *p_linear_size);
443 
444 u32 mlxsw_core_read_frc_h(struct mlxsw_core *mlxsw_core);
445 u32 mlxsw_core_read_frc_l(struct mlxsw_core *mlxsw_core);
446 
447 u32 mlxsw_core_read_utc_sec(struct mlxsw_core *mlxsw_core);
448 u32 mlxsw_core_read_utc_nsec(struct mlxsw_core *mlxsw_core);
449 
450 bool mlxsw_core_sdq_supports_cqe_v2(struct mlxsw_core *mlxsw_core);
451 
452 void mlxsw_core_emad_string_tlv_enable(struct mlxsw_core *mlxsw_core);
453 
454 bool mlxsw_core_res_valid(struct mlxsw_core *mlxsw_core,
455 			  enum mlxsw_res_id res_id);
456 
457 #define MLXSW_CORE_RES_VALID(mlxsw_core, short_res_id)			\
458 	mlxsw_core_res_valid(mlxsw_core, MLXSW_RES_ID_##short_res_id)
459 
460 u64 mlxsw_core_res_get(struct mlxsw_core *mlxsw_core,
461 		       enum mlxsw_res_id res_id);
462 
463 #define MLXSW_CORE_RES_GET(mlxsw_core, short_res_id)			\
464 	mlxsw_core_res_get(mlxsw_core, MLXSW_RES_ID_##short_res_id)
465 
466 static inline struct net *mlxsw_core_net(struct mlxsw_core *mlxsw_core)
467 {
468 	return devlink_net(priv_to_devlink(mlxsw_core));
469 }
470 
471 #define MLXSW_BUS_F_TXRX	BIT(0)
472 #define MLXSW_BUS_F_RESET	BIT(1)
473 
474 struct mlxsw_bus {
475 	const char *kind;
476 	int (*init)(void *bus_priv, struct mlxsw_core *mlxsw_core,
477 		    const struct mlxsw_config_profile *profile,
478 		    struct mlxsw_res *res);
479 	void (*fini)(void *bus_priv);
480 	bool (*skb_transmit_busy)(void *bus_priv,
481 				  const struct mlxsw_tx_info *tx_info);
482 	int (*skb_transmit)(void *bus_priv, struct sk_buff *skb,
483 			    const struct mlxsw_tx_info *tx_info);
484 	int (*cmd_exec)(void *bus_priv, u16 opcode, u8 opcode_mod,
485 			u32 in_mod, bool out_mbox_direct,
486 			char *in_mbox, size_t in_mbox_size,
487 			char *out_mbox, size_t out_mbox_size,
488 			u8 *p_status);
489 	u32 (*read_frc_h)(void *bus_priv);
490 	u32 (*read_frc_l)(void *bus_priv);
491 	u32 (*read_utc_sec)(void *bus_priv);
492 	u32 (*read_utc_nsec)(void *bus_priv);
493 	u8 features;
494 };
495 
496 struct mlxsw_fw_rev {
497 	u16 major;
498 	u16 minor;
499 	u16 subminor;
500 	u16 can_reset_minor;
501 };
502 
503 struct mlxsw_bus_info {
504 	const char *device_kind;
505 	const char *device_name;
506 	struct device *dev;
507 	struct mlxsw_fw_rev fw_rev;
508 	u8 vsd[MLXSW_CMD_BOARDINFO_VSD_LEN];
509 	u8 psid[MLXSW_CMD_BOARDINFO_PSID_LEN];
510 	u8 low_frequency:1,
511 	   read_clock_capable:1;
512 };
513 
514 struct mlxsw_hwmon;
515 
516 #ifdef CONFIG_MLXSW_CORE_HWMON
517 
518 int mlxsw_hwmon_init(struct mlxsw_core *mlxsw_core,
519 		     const struct mlxsw_bus_info *mlxsw_bus_info,
520 		     struct mlxsw_hwmon **p_hwmon);
521 void mlxsw_hwmon_fini(struct mlxsw_hwmon *mlxsw_hwmon);
522 
523 #else
524 
525 static inline int mlxsw_hwmon_init(struct mlxsw_core *mlxsw_core,
526 				   const struct mlxsw_bus_info *mlxsw_bus_info,
527 				   struct mlxsw_hwmon **p_hwmon)
528 {
529 	return 0;
530 }
531 
532 static inline void mlxsw_hwmon_fini(struct mlxsw_hwmon *mlxsw_hwmon)
533 {
534 }
535 
536 #endif
537 
538 struct mlxsw_thermal;
539 
540 #ifdef CONFIG_MLXSW_CORE_THERMAL
541 
542 int mlxsw_thermal_init(struct mlxsw_core *mlxsw_core,
543 		       const struct mlxsw_bus_info *mlxsw_bus_info,
544 		       struct mlxsw_thermal **p_thermal);
545 void mlxsw_thermal_fini(struct mlxsw_thermal *thermal);
546 
547 #else
548 
549 static inline int mlxsw_thermal_init(struct mlxsw_core *mlxsw_core,
550 				     const struct mlxsw_bus_info *mlxsw_bus_info,
551 				     struct mlxsw_thermal **p_thermal)
552 {
553 	return 0;
554 }
555 
556 static inline void mlxsw_thermal_fini(struct mlxsw_thermal *thermal)
557 {
558 }
559 
560 #endif
561 
562 enum mlxsw_devlink_param_id {
563 	MLXSW_DEVLINK_PARAM_ID_BASE = DEVLINK_PARAM_GENERIC_ID_MAX,
564 	MLXSW_DEVLINK_PARAM_ID_ACL_REGION_REHASH_INTERVAL,
565 };
566 
567 struct mlxsw_cqe_ts {
568 	u8 sec;
569 	u32 nsec;
570 };
571 
572 struct mlxsw_skb_cb {
573 	union {
574 		struct mlxsw_tx_info tx_info;
575 		struct mlxsw_rx_md_info rx_md_info;
576 	};
577 	struct mlxsw_cqe_ts cqe_ts;
578 };
579 
580 static inline struct mlxsw_skb_cb *mlxsw_skb_cb(struct sk_buff *skb)
581 {
582 	BUILD_BUG_ON(sizeof(mlxsw_skb_cb) > sizeof(skb->cb));
583 	return (struct mlxsw_skb_cb *) skb->cb;
584 }
585 
586 struct mlxsw_linecards;
587 
588 enum mlxsw_linecard_status_event_type {
589 	MLXSW_LINECARD_STATUS_EVENT_TYPE_PROVISION,
590 	MLXSW_LINECARD_STATUS_EVENT_TYPE_UNPROVISION,
591 };
592 
593 struct mlxsw_linecard_bdev;
594 
595 struct mlxsw_linecard_device_info {
596 	u16 fw_major;
597 	u16 fw_minor;
598 	u16 fw_sub_minor;
599 	char psid[MLXSW_REG_MGIR_FW_INFO_PSID_SIZE];
600 };
601 
602 struct mlxsw_linecard {
603 	u8 slot_index;
604 	struct mlxsw_linecards *linecards;
605 	struct devlink_linecard *devlink_linecard;
606 	struct mutex lock; /* Locks accesses to the linecard structure */
607 	char name[MLXSW_REG_MDDQ_SLOT_ASCII_NAME_LEN];
608 	char mbct_pl[MLXSW_REG_MBCT_LEN]; /* Too big for stack */
609 	enum mlxsw_linecard_status_event_type status_event_type_to;
610 	struct delayed_work status_event_to_dw;
611 	u8 provisioned:1,
612 	   ready:1,
613 	   active:1;
614 	u16 hw_revision;
615 	u16 ini_version;
616 	struct mlxsw_linecard_bdev *bdev;
617 	struct {
618 		struct mlxsw_linecard_device_info info;
619 		u8 index;
620 	} device;
621 };
622 
623 struct mlxsw_linecard_types_info;
624 
625 struct mlxsw_linecards {
626 	struct mlxsw_core *mlxsw_core;
627 	const struct mlxsw_bus_info *bus_info;
628 	u8 count;
629 	struct mlxsw_linecard_types_info *types_info;
630 	struct list_head event_ops_list;
631 	struct mutex event_ops_list_lock; /* Locks accesses to event ops list */
632 	struct mlxsw_linecard linecards[];
633 };
634 
635 static inline struct mlxsw_linecard *
636 mlxsw_linecard_get(struct mlxsw_linecards *linecards, u8 slot_index)
637 {
638 	return &linecards->linecards[slot_index - 1];
639 }
640 
641 int mlxsw_linecard_devlink_info_get(struct mlxsw_linecard *linecard,
642 				    struct devlink_info_req *req,
643 				    struct netlink_ext_ack *extack);
644 int mlxsw_linecard_flash_update(struct devlink *linecard_devlink,
645 				struct mlxsw_linecard *linecard,
646 				const struct firmware *firmware,
647 				struct netlink_ext_ack *extack);
648 
649 int mlxsw_linecards_init(struct mlxsw_core *mlxsw_core,
650 			 const struct mlxsw_bus_info *bus_info);
651 void mlxsw_linecards_fini(struct mlxsw_core *mlxsw_core);
652 
653 typedef void mlxsw_linecards_event_op_t(struct mlxsw_core *mlxsw_core,
654 					u8 slot_index, void *priv);
655 
656 struct mlxsw_linecards_event_ops {
657 	mlxsw_linecards_event_op_t *got_active;
658 	mlxsw_linecards_event_op_t *got_inactive;
659 };
660 
661 int mlxsw_linecards_event_ops_register(struct mlxsw_core *mlxsw_core,
662 				       struct mlxsw_linecards_event_ops *ops,
663 				       void *priv);
664 void mlxsw_linecards_event_ops_unregister(struct mlxsw_core *mlxsw_core,
665 					  struct mlxsw_linecards_event_ops *ops,
666 					  void *priv);
667 
668 int mlxsw_linecard_bdev_add(struct mlxsw_linecard *linecard);
669 void mlxsw_linecard_bdev_del(struct mlxsw_linecard *linecard);
670 
671 int mlxsw_linecard_driver_register(void);
672 void mlxsw_linecard_driver_unregister(void);
673 
674 #endif
675