1 /* 2 * drivers/net/ethernet/mellanox/mlxsw/core.h 3 * Copyright (c) 2015 Mellanox Technologies. All rights reserved. 4 * Copyright (c) 2015 Jiri Pirko <jiri@mellanox.com> 5 * Copyright (c) 2015 Ido Schimmel <idosch@mellanox.com> 6 * Copyright (c) 2015 Elad Raz <eladr@mellanox.com> 7 * 8 * Redistribution and use in source and binary forms, with or without 9 * modification, are permitted provided that the following conditions are met: 10 * 11 * 1. Redistributions of source code must retain the above copyright 12 * notice, this list of conditions and the following disclaimer. 13 * 2. Redistributions in binary form must reproduce the above copyright 14 * notice, this list of conditions and the following disclaimer in the 15 * documentation and/or other materials provided with the distribution. 16 * 3. Neither the names of the copyright holders nor the names of its 17 * contributors may be used to endorse or promote products derived from 18 * this software without specific prior written permission. 19 * 20 * Alternatively, this software may be distributed under the terms of the 21 * GNU General Public License ("GPL") version 2 as published by the Free 22 * Software Foundation. 23 * 24 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 25 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 26 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 27 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE 28 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 29 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 30 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 31 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 32 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 33 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 34 * POSSIBILITY OF SUCH DAMAGE. 35 */ 36 37 #ifndef _MLXSW_CORE_H 38 #define _MLXSW_CORE_H 39 40 #include <linux/module.h> 41 #include <linux/device.h> 42 #include <linux/slab.h> 43 #include <linux/gfp.h> 44 #include <linux/types.h> 45 #include <linux/skbuff.h> 46 #include <linux/workqueue.h> 47 #include <net/devlink.h> 48 49 #include "trap.h" 50 #include "reg.h" 51 #include "cmd.h" 52 #include "resources.h" 53 54 struct mlxsw_core; 55 struct mlxsw_core_port; 56 struct mlxsw_driver; 57 struct mlxsw_bus; 58 struct mlxsw_bus_info; 59 60 void *mlxsw_core_driver_priv(struct mlxsw_core *mlxsw_core); 61 62 int mlxsw_core_driver_register(struct mlxsw_driver *mlxsw_driver); 63 void mlxsw_core_driver_unregister(struct mlxsw_driver *mlxsw_driver); 64 65 int mlxsw_core_bus_device_register(const struct mlxsw_bus_info *mlxsw_bus_info, 66 const struct mlxsw_bus *mlxsw_bus, 67 void *bus_priv); 68 void mlxsw_core_bus_device_unregister(struct mlxsw_core *mlxsw_core); 69 70 struct mlxsw_tx_info { 71 u8 local_port; 72 bool is_emad; 73 }; 74 75 bool mlxsw_core_skb_transmit_busy(struct mlxsw_core *mlxsw_core, 76 const struct mlxsw_tx_info *tx_info); 77 int mlxsw_core_skb_transmit(struct mlxsw_core *mlxsw_core, struct sk_buff *skb, 78 const struct mlxsw_tx_info *tx_info); 79 80 struct mlxsw_rx_listener { 81 void (*func)(struct sk_buff *skb, u8 local_port, void *priv); 82 u8 local_port; 83 u16 trap_id; 84 enum mlxsw_reg_hpkt_action action; 85 }; 86 87 struct mlxsw_event_listener { 88 void (*func)(const struct mlxsw_reg_info *reg, 89 char *payload, void *priv); 90 enum mlxsw_event_trap_id trap_id; 91 }; 92 93 struct mlxsw_listener { 94 u16 trap_id; 95 union { 96 struct mlxsw_rx_listener rx_listener; 97 struct mlxsw_event_listener event_listener; 98 } u; 99 enum mlxsw_reg_hpkt_action action; 100 enum mlxsw_reg_hpkt_action unreg_action; 101 u8 trap_group; 102 bool is_ctrl; /* should go via control buffer or not */ 103 bool is_event; 104 }; 105 106 #define MLXSW_RXL(_func, _trap_id, _action, _is_ctrl, _trap_group, \ 107 _unreg_action) \ 108 { \ 109 .trap_id = MLXSW_TRAP_ID_##_trap_id, \ 110 .u.rx_listener = \ 111 { \ 112 .func = _func, \ 113 .local_port = MLXSW_PORT_DONT_CARE, \ 114 .trap_id = MLXSW_TRAP_ID_##_trap_id, \ 115 }, \ 116 .action = MLXSW_REG_HPKT_ACTION_##_action, \ 117 .unreg_action = MLXSW_REG_HPKT_ACTION_##_unreg_action, \ 118 .trap_group = MLXSW_REG_HTGT_TRAP_GROUP_##_trap_group, \ 119 .is_ctrl = _is_ctrl, \ 120 .is_event = false, \ 121 } 122 123 #define MLXSW_EVENTL(_func, _trap_id, _trap_group) \ 124 { \ 125 .trap_id = MLXSW_TRAP_ID_##_trap_id, \ 126 .u.event_listener = \ 127 { \ 128 .func = _func, \ 129 .trap_id = MLXSW_TRAP_ID_##_trap_id, \ 130 }, \ 131 .action = MLXSW_REG_HPKT_ACTION_TRAP_TO_CPU, \ 132 .trap_group = MLXSW_REG_HTGT_TRAP_GROUP_##_trap_group, \ 133 .is_ctrl = false, \ 134 .is_event = true, \ 135 } 136 137 int mlxsw_core_rx_listener_register(struct mlxsw_core *mlxsw_core, 138 const struct mlxsw_rx_listener *rxl, 139 void *priv); 140 void mlxsw_core_rx_listener_unregister(struct mlxsw_core *mlxsw_core, 141 const struct mlxsw_rx_listener *rxl, 142 void *priv); 143 144 int mlxsw_core_event_listener_register(struct mlxsw_core *mlxsw_core, 145 const struct mlxsw_event_listener *el, 146 void *priv); 147 void mlxsw_core_event_listener_unregister(struct mlxsw_core *mlxsw_core, 148 const struct mlxsw_event_listener *el, 149 void *priv); 150 151 int mlxsw_core_trap_register(struct mlxsw_core *mlxsw_core, 152 const struct mlxsw_listener *listener, 153 void *priv); 154 void mlxsw_core_trap_unregister(struct mlxsw_core *mlxsw_core, 155 const struct mlxsw_listener *listener, 156 void *priv); 157 158 typedef void mlxsw_reg_trans_cb_t(struct mlxsw_core *mlxsw_core, char *payload, 159 size_t payload_len, unsigned long cb_priv); 160 161 int mlxsw_reg_trans_query(struct mlxsw_core *mlxsw_core, 162 const struct mlxsw_reg_info *reg, char *payload, 163 struct list_head *bulk_list, 164 mlxsw_reg_trans_cb_t *cb, unsigned long cb_priv); 165 int mlxsw_reg_trans_write(struct mlxsw_core *mlxsw_core, 166 const struct mlxsw_reg_info *reg, char *payload, 167 struct list_head *bulk_list, 168 mlxsw_reg_trans_cb_t *cb, unsigned long cb_priv); 169 int mlxsw_reg_trans_bulk_wait(struct list_head *bulk_list); 170 171 int mlxsw_reg_query(struct mlxsw_core *mlxsw_core, 172 const struct mlxsw_reg_info *reg, char *payload); 173 int mlxsw_reg_write(struct mlxsw_core *mlxsw_core, 174 const struct mlxsw_reg_info *reg, char *payload); 175 176 struct mlxsw_rx_info { 177 bool is_lag; 178 union { 179 u16 sys_port; 180 u16 lag_id; 181 } u; 182 u8 lag_port_index; 183 int trap_id; 184 }; 185 186 void mlxsw_core_skb_receive(struct mlxsw_core *mlxsw_core, struct sk_buff *skb, 187 struct mlxsw_rx_info *rx_info); 188 189 void mlxsw_core_lag_mapping_set(struct mlxsw_core *mlxsw_core, 190 u16 lag_id, u8 port_index, u8 local_port); 191 u8 mlxsw_core_lag_mapping_get(struct mlxsw_core *mlxsw_core, 192 u16 lag_id, u8 port_index); 193 void mlxsw_core_lag_mapping_clear(struct mlxsw_core *mlxsw_core, 194 u16 lag_id, u8 local_port); 195 196 void *mlxsw_core_port_driver_priv(struct mlxsw_core_port *mlxsw_core_port); 197 int mlxsw_core_port_init(struct mlxsw_core *mlxsw_core, u8 local_port); 198 void mlxsw_core_port_fini(struct mlxsw_core *mlxsw_core, u8 local_port); 199 void mlxsw_core_port_eth_set(struct mlxsw_core *mlxsw_core, u8 local_port, 200 void *port_driver_priv, struct net_device *dev, 201 bool split, u32 split_group); 202 void mlxsw_core_port_ib_set(struct mlxsw_core *mlxsw_core, u8 local_port, 203 void *port_driver_priv); 204 void mlxsw_core_port_clear(struct mlxsw_core *mlxsw_core, u8 local_port, 205 void *port_driver_priv); 206 enum devlink_port_type mlxsw_core_port_type_get(struct mlxsw_core *mlxsw_core, 207 u8 local_port); 208 209 int mlxsw_core_schedule_dw(struct delayed_work *dwork, unsigned long delay); 210 bool mlxsw_core_schedule_work(struct work_struct *work); 211 void mlxsw_core_flush_owq(void); 212 213 #define MLXSW_CONFIG_PROFILE_SWID_COUNT 8 214 215 struct mlxsw_swid_config { 216 u8 used_type:1, 217 used_properties:1; 218 u8 type; 219 u8 properties; 220 }; 221 222 struct mlxsw_config_profile { 223 u16 used_max_vepa_channels:1, 224 used_max_mid:1, 225 used_max_pgt:1, 226 used_max_system_port:1, 227 used_max_vlan_groups:1, 228 used_max_regions:1, 229 used_flood_tables:1, 230 used_flood_mode:1, 231 used_max_ib_mc:1, 232 used_max_pkey:1, 233 used_ar_sec:1, 234 used_adaptive_routing_group_cap:1, 235 used_kvd_split_data:1; /* indicate for the kvd's values */ 236 237 u8 max_vepa_channels; 238 u16 max_mid; 239 u16 max_pgt; 240 u16 max_system_port; 241 u16 max_vlan_groups; 242 u16 max_regions; 243 u8 max_flood_tables; 244 u8 max_vid_flood_tables; 245 u8 flood_mode; 246 u8 max_fid_offset_flood_tables; 247 u16 fid_offset_flood_table_size; 248 u8 max_fid_flood_tables; 249 u16 fid_flood_table_size; 250 u16 max_ib_mc; 251 u16 max_pkey; 252 u8 ar_sec; 253 u16 adaptive_routing_group_cap; 254 u8 arn; 255 u32 kvd_linear_size; 256 u16 kvd_hash_granularity; 257 u8 kvd_hash_single_parts; 258 u8 kvd_hash_double_parts; 259 u8 resource_query_enable; 260 struct mlxsw_swid_config swid_config[MLXSW_CONFIG_PROFILE_SWID_COUNT]; 261 }; 262 263 struct mlxsw_driver { 264 struct list_head list; 265 const char *kind; 266 size_t priv_size; 267 int (*init)(struct mlxsw_core *mlxsw_core, 268 const struct mlxsw_bus_info *mlxsw_bus_info); 269 void (*fini)(struct mlxsw_core *mlxsw_core); 270 int (*basic_trap_groups_set)(struct mlxsw_core *mlxsw_core); 271 int (*port_type_set)(struct mlxsw_core *mlxsw_core, u8 local_port, 272 enum devlink_port_type new_type); 273 int (*port_split)(struct mlxsw_core *mlxsw_core, u8 local_port, 274 unsigned int count); 275 int (*port_unsplit)(struct mlxsw_core *mlxsw_core, u8 local_port); 276 int (*sb_pool_get)(struct mlxsw_core *mlxsw_core, 277 unsigned int sb_index, u16 pool_index, 278 struct devlink_sb_pool_info *pool_info); 279 int (*sb_pool_set)(struct mlxsw_core *mlxsw_core, 280 unsigned int sb_index, u16 pool_index, u32 size, 281 enum devlink_sb_threshold_type threshold_type); 282 int (*sb_port_pool_get)(struct mlxsw_core_port *mlxsw_core_port, 283 unsigned int sb_index, u16 pool_index, 284 u32 *p_threshold); 285 int (*sb_port_pool_set)(struct mlxsw_core_port *mlxsw_core_port, 286 unsigned int sb_index, u16 pool_index, 287 u32 threshold); 288 int (*sb_tc_pool_bind_get)(struct mlxsw_core_port *mlxsw_core_port, 289 unsigned int sb_index, u16 tc_index, 290 enum devlink_sb_pool_type pool_type, 291 u16 *p_pool_index, u32 *p_threshold); 292 int (*sb_tc_pool_bind_set)(struct mlxsw_core_port *mlxsw_core_port, 293 unsigned int sb_index, u16 tc_index, 294 enum devlink_sb_pool_type pool_type, 295 u16 pool_index, u32 threshold); 296 int (*sb_occ_snapshot)(struct mlxsw_core *mlxsw_core, 297 unsigned int sb_index); 298 int (*sb_occ_max_clear)(struct mlxsw_core *mlxsw_core, 299 unsigned int sb_index); 300 int (*sb_occ_port_pool_get)(struct mlxsw_core_port *mlxsw_core_port, 301 unsigned int sb_index, u16 pool_index, 302 u32 *p_cur, u32 *p_max); 303 int (*sb_occ_tc_port_bind_get)(struct mlxsw_core_port *mlxsw_core_port, 304 unsigned int sb_index, u16 tc_index, 305 enum devlink_sb_pool_type pool_type, 306 u32 *p_cur, u32 *p_max); 307 void (*txhdr_construct)(struct sk_buff *skb, 308 const struct mlxsw_tx_info *tx_info); 309 u8 txhdr_len; 310 const struct mlxsw_config_profile *profile; 311 }; 312 313 bool mlxsw_core_res_valid(struct mlxsw_core *mlxsw_core, 314 enum mlxsw_res_id res_id); 315 316 #define MLXSW_CORE_RES_VALID(res, short_res_id) \ 317 mlxsw_core_res_valid(res, MLXSW_RES_ID_##short_res_id) 318 319 u64 mlxsw_core_res_get(struct mlxsw_core *mlxsw_core, 320 enum mlxsw_res_id res_id); 321 322 #define MLXSW_CORE_RES_GET(res, short_res_id) \ 323 mlxsw_core_res_get(res, MLXSW_RES_ID_##short_res_id) 324 325 #define MLXSW_BUS_F_TXRX BIT(0) 326 327 struct mlxsw_bus { 328 const char *kind; 329 int (*init)(void *bus_priv, struct mlxsw_core *mlxsw_core, 330 const struct mlxsw_config_profile *profile, 331 struct mlxsw_res *res); 332 void (*fini)(void *bus_priv); 333 bool (*skb_transmit_busy)(void *bus_priv, 334 const struct mlxsw_tx_info *tx_info); 335 int (*skb_transmit)(void *bus_priv, struct sk_buff *skb, 336 const struct mlxsw_tx_info *tx_info); 337 int (*cmd_exec)(void *bus_priv, u16 opcode, u8 opcode_mod, 338 u32 in_mod, bool out_mbox_direct, 339 char *in_mbox, size_t in_mbox_size, 340 char *out_mbox, size_t out_mbox_size, 341 u8 *p_status); 342 u8 features; 343 }; 344 345 struct mlxsw_bus_info { 346 const char *device_kind; 347 const char *device_name; 348 struct device *dev; 349 struct { 350 u16 major; 351 u16 minor; 352 u16 subminor; 353 } fw_rev; 354 u8 vsd[MLXSW_CMD_BOARDINFO_VSD_LEN]; 355 u8 psid[MLXSW_CMD_BOARDINFO_PSID_LEN]; 356 }; 357 358 struct mlxsw_hwmon; 359 360 #ifdef CONFIG_MLXSW_CORE_HWMON 361 362 int mlxsw_hwmon_init(struct mlxsw_core *mlxsw_core, 363 const struct mlxsw_bus_info *mlxsw_bus_info, 364 struct mlxsw_hwmon **p_hwmon); 365 void mlxsw_hwmon_fini(struct mlxsw_hwmon *mlxsw_hwmon); 366 367 #else 368 369 static inline int mlxsw_hwmon_init(struct mlxsw_core *mlxsw_core, 370 const struct mlxsw_bus_info *mlxsw_bus_info, 371 struct mlxsw_hwmon **p_hwmon) 372 { 373 return 0; 374 } 375 376 #endif 377 378 struct mlxsw_thermal; 379 380 #ifdef CONFIG_MLXSW_CORE_THERMAL 381 382 int mlxsw_thermal_init(struct mlxsw_core *mlxsw_core, 383 const struct mlxsw_bus_info *mlxsw_bus_info, 384 struct mlxsw_thermal **p_thermal); 385 void mlxsw_thermal_fini(struct mlxsw_thermal *thermal); 386 387 #else 388 389 static inline int mlxsw_thermal_init(struct mlxsw_core *mlxsw_core, 390 const struct mlxsw_bus_info *mlxsw_bus_info, 391 struct mlxsw_thermal **p_thermal) 392 { 393 return 0; 394 } 395 396 static inline void mlxsw_thermal_fini(struct mlxsw_thermal *thermal) 397 { 398 } 399 400 #endif 401 402 #endif 403