1 /* SPDX-License-Identifier: BSD-3-Clause OR GPL-2.0 */ 2 /* Copyright (c) 2015-2018 Mellanox Technologies. All rights reserved */ 3 4 #ifndef _MLXSW_CORE_H 5 #define _MLXSW_CORE_H 6 7 #include <linux/module.h> 8 #include <linux/device.h> 9 #include <linux/slab.h> 10 #include <linux/gfp.h> 11 #include <linux/types.h> 12 #include <linux/skbuff.h> 13 #include <linux/workqueue.h> 14 #include <net/devlink.h> 15 16 #include "trap.h" 17 #include "reg.h" 18 #include "cmd.h" 19 #include "resources.h" 20 21 struct mlxsw_core; 22 struct mlxsw_core_port; 23 struct mlxsw_driver; 24 struct mlxsw_bus; 25 struct mlxsw_bus_info; 26 27 unsigned int mlxsw_core_max_ports(const struct mlxsw_core *mlxsw_core); 28 29 void *mlxsw_core_driver_priv(struct mlxsw_core *mlxsw_core); 30 31 int mlxsw_core_driver_register(struct mlxsw_driver *mlxsw_driver); 32 void mlxsw_core_driver_unregister(struct mlxsw_driver *mlxsw_driver); 33 34 int mlxsw_core_bus_device_register(const struct mlxsw_bus_info *mlxsw_bus_info, 35 const struct mlxsw_bus *mlxsw_bus, 36 void *bus_priv, bool reload, 37 struct devlink *devlink); 38 void mlxsw_core_bus_device_unregister(struct mlxsw_core *mlxsw_core, bool reload); 39 40 struct mlxsw_tx_info { 41 u8 local_port; 42 bool is_emad; 43 }; 44 45 bool mlxsw_core_skb_transmit_busy(struct mlxsw_core *mlxsw_core, 46 const struct mlxsw_tx_info *tx_info); 47 int mlxsw_core_skb_transmit(struct mlxsw_core *mlxsw_core, struct sk_buff *skb, 48 const struct mlxsw_tx_info *tx_info); 49 50 struct mlxsw_rx_listener { 51 void (*func)(struct sk_buff *skb, u8 local_port, void *priv); 52 u8 local_port; 53 u16 trap_id; 54 enum mlxsw_reg_hpkt_action action; 55 }; 56 57 struct mlxsw_event_listener { 58 void (*func)(const struct mlxsw_reg_info *reg, 59 char *payload, void *priv); 60 enum mlxsw_event_trap_id trap_id; 61 }; 62 63 struct mlxsw_listener { 64 u16 trap_id; 65 union { 66 struct mlxsw_rx_listener rx_listener; 67 struct mlxsw_event_listener event_listener; 68 } u; 69 enum mlxsw_reg_hpkt_action action; 70 enum mlxsw_reg_hpkt_action unreg_action; 71 u8 trap_group; 72 bool is_ctrl; /* should go via control buffer or not */ 73 bool is_event; 74 }; 75 76 #define MLXSW_RXL(_func, _trap_id, _action, _is_ctrl, _trap_group, \ 77 _unreg_action) \ 78 { \ 79 .trap_id = MLXSW_TRAP_ID_##_trap_id, \ 80 .u.rx_listener = \ 81 { \ 82 .func = _func, \ 83 .local_port = MLXSW_PORT_DONT_CARE, \ 84 .trap_id = MLXSW_TRAP_ID_##_trap_id, \ 85 }, \ 86 .action = MLXSW_REG_HPKT_ACTION_##_action, \ 87 .unreg_action = MLXSW_REG_HPKT_ACTION_##_unreg_action, \ 88 .trap_group = MLXSW_REG_HTGT_TRAP_GROUP_##_trap_group, \ 89 .is_ctrl = _is_ctrl, \ 90 .is_event = false, \ 91 } 92 93 #define MLXSW_EVENTL(_func, _trap_id, _trap_group) \ 94 { \ 95 .trap_id = MLXSW_TRAP_ID_##_trap_id, \ 96 .u.event_listener = \ 97 { \ 98 .func = _func, \ 99 .trap_id = MLXSW_TRAP_ID_##_trap_id, \ 100 }, \ 101 .action = MLXSW_REG_HPKT_ACTION_TRAP_TO_CPU, \ 102 .trap_group = MLXSW_REG_HTGT_TRAP_GROUP_##_trap_group, \ 103 .is_ctrl = false, \ 104 .is_event = true, \ 105 } 106 107 int mlxsw_core_rx_listener_register(struct mlxsw_core *mlxsw_core, 108 const struct mlxsw_rx_listener *rxl, 109 void *priv); 110 void mlxsw_core_rx_listener_unregister(struct mlxsw_core *mlxsw_core, 111 const struct mlxsw_rx_listener *rxl, 112 void *priv); 113 114 int mlxsw_core_event_listener_register(struct mlxsw_core *mlxsw_core, 115 const struct mlxsw_event_listener *el, 116 void *priv); 117 void mlxsw_core_event_listener_unregister(struct mlxsw_core *mlxsw_core, 118 const struct mlxsw_event_listener *el, 119 void *priv); 120 121 int mlxsw_core_trap_register(struct mlxsw_core *mlxsw_core, 122 const struct mlxsw_listener *listener, 123 void *priv); 124 void mlxsw_core_trap_unregister(struct mlxsw_core *mlxsw_core, 125 const struct mlxsw_listener *listener, 126 void *priv); 127 128 typedef void mlxsw_reg_trans_cb_t(struct mlxsw_core *mlxsw_core, char *payload, 129 size_t payload_len, unsigned long cb_priv); 130 131 int mlxsw_reg_trans_query(struct mlxsw_core *mlxsw_core, 132 const struct mlxsw_reg_info *reg, char *payload, 133 struct list_head *bulk_list, 134 mlxsw_reg_trans_cb_t *cb, unsigned long cb_priv); 135 int mlxsw_reg_trans_write(struct mlxsw_core *mlxsw_core, 136 const struct mlxsw_reg_info *reg, char *payload, 137 struct list_head *bulk_list, 138 mlxsw_reg_trans_cb_t *cb, unsigned long cb_priv); 139 int mlxsw_reg_trans_bulk_wait(struct list_head *bulk_list); 140 141 int mlxsw_reg_query(struct mlxsw_core *mlxsw_core, 142 const struct mlxsw_reg_info *reg, char *payload); 143 int mlxsw_reg_write(struct mlxsw_core *mlxsw_core, 144 const struct mlxsw_reg_info *reg, char *payload); 145 146 struct mlxsw_rx_info { 147 bool is_lag; 148 union { 149 u16 sys_port; 150 u16 lag_id; 151 } u; 152 u8 lag_port_index; 153 int trap_id; 154 }; 155 156 void mlxsw_core_skb_receive(struct mlxsw_core *mlxsw_core, struct sk_buff *skb, 157 struct mlxsw_rx_info *rx_info); 158 159 void mlxsw_core_lag_mapping_set(struct mlxsw_core *mlxsw_core, 160 u16 lag_id, u8 port_index, u8 local_port); 161 u8 mlxsw_core_lag_mapping_get(struct mlxsw_core *mlxsw_core, 162 u16 lag_id, u8 port_index); 163 void mlxsw_core_lag_mapping_clear(struct mlxsw_core *mlxsw_core, 164 u16 lag_id, u8 local_port); 165 166 void *mlxsw_core_port_driver_priv(struct mlxsw_core_port *mlxsw_core_port); 167 int mlxsw_core_port_init(struct mlxsw_core *mlxsw_core, u8 local_port); 168 void mlxsw_core_port_fini(struct mlxsw_core *mlxsw_core, u8 local_port); 169 void mlxsw_core_port_eth_set(struct mlxsw_core *mlxsw_core, u8 local_port, 170 void *port_driver_priv, struct net_device *dev, 171 u32 port_number, bool split, 172 u32 split_port_subnumber); 173 void mlxsw_core_port_ib_set(struct mlxsw_core *mlxsw_core, u8 local_port, 174 void *port_driver_priv); 175 void mlxsw_core_port_clear(struct mlxsw_core *mlxsw_core, u8 local_port, 176 void *port_driver_priv); 177 enum devlink_port_type mlxsw_core_port_type_get(struct mlxsw_core *mlxsw_core, 178 u8 local_port); 179 int mlxsw_core_port_get_phys_port_name(struct mlxsw_core *mlxsw_core, 180 u8 local_port, char *name, size_t len); 181 182 int mlxsw_core_schedule_dw(struct delayed_work *dwork, unsigned long delay); 183 bool mlxsw_core_schedule_work(struct work_struct *work); 184 void mlxsw_core_flush_owq(void); 185 int mlxsw_core_resources_query(struct mlxsw_core *mlxsw_core, char *mbox, 186 struct mlxsw_res *res); 187 188 #define MLXSW_CONFIG_PROFILE_SWID_COUNT 8 189 190 struct mlxsw_swid_config { 191 u8 used_type:1, 192 used_properties:1; 193 u8 type; 194 u8 properties; 195 }; 196 197 struct mlxsw_config_profile { 198 u16 used_max_vepa_channels:1, 199 used_max_mid:1, 200 used_max_pgt:1, 201 used_max_system_port:1, 202 used_max_vlan_groups:1, 203 used_max_regions:1, 204 used_flood_tables:1, 205 used_flood_mode:1, 206 used_max_ib_mc:1, 207 used_max_pkey:1, 208 used_ar_sec:1, 209 used_adaptive_routing_group_cap:1, 210 used_kvd_sizes:1; 211 u8 max_vepa_channels; 212 u16 max_mid; 213 u16 max_pgt; 214 u16 max_system_port; 215 u16 max_vlan_groups; 216 u16 max_regions; 217 u8 max_flood_tables; 218 u8 max_vid_flood_tables; 219 u8 flood_mode; 220 u8 max_fid_offset_flood_tables; 221 u16 fid_offset_flood_table_size; 222 u8 max_fid_flood_tables; 223 u16 fid_flood_table_size; 224 u16 max_ib_mc; 225 u16 max_pkey; 226 u8 ar_sec; 227 u16 adaptive_routing_group_cap; 228 u8 arn; 229 u32 kvd_linear_size; 230 u8 kvd_hash_single_parts; 231 u8 kvd_hash_double_parts; 232 struct mlxsw_swid_config swid_config[MLXSW_CONFIG_PROFILE_SWID_COUNT]; 233 }; 234 235 struct mlxsw_driver { 236 struct list_head list; 237 const char *kind; 238 size_t priv_size; 239 int (*init)(struct mlxsw_core *mlxsw_core, 240 const struct mlxsw_bus_info *mlxsw_bus_info); 241 void (*fini)(struct mlxsw_core *mlxsw_core); 242 int (*basic_trap_groups_set)(struct mlxsw_core *mlxsw_core); 243 int (*port_type_set)(struct mlxsw_core *mlxsw_core, u8 local_port, 244 enum devlink_port_type new_type); 245 int (*port_split)(struct mlxsw_core *mlxsw_core, u8 local_port, 246 unsigned int count, struct netlink_ext_ack *extack); 247 int (*port_unsplit)(struct mlxsw_core *mlxsw_core, u8 local_port, 248 struct netlink_ext_ack *extack); 249 int (*sb_pool_get)(struct mlxsw_core *mlxsw_core, 250 unsigned int sb_index, u16 pool_index, 251 struct devlink_sb_pool_info *pool_info); 252 int (*sb_pool_set)(struct mlxsw_core *mlxsw_core, 253 unsigned int sb_index, u16 pool_index, u32 size, 254 enum devlink_sb_threshold_type threshold_type); 255 int (*sb_port_pool_get)(struct mlxsw_core_port *mlxsw_core_port, 256 unsigned int sb_index, u16 pool_index, 257 u32 *p_threshold); 258 int (*sb_port_pool_set)(struct mlxsw_core_port *mlxsw_core_port, 259 unsigned int sb_index, u16 pool_index, 260 u32 threshold); 261 int (*sb_tc_pool_bind_get)(struct mlxsw_core_port *mlxsw_core_port, 262 unsigned int sb_index, u16 tc_index, 263 enum devlink_sb_pool_type pool_type, 264 u16 *p_pool_index, u32 *p_threshold); 265 int (*sb_tc_pool_bind_set)(struct mlxsw_core_port *mlxsw_core_port, 266 unsigned int sb_index, u16 tc_index, 267 enum devlink_sb_pool_type pool_type, 268 u16 pool_index, u32 threshold); 269 int (*sb_occ_snapshot)(struct mlxsw_core *mlxsw_core, 270 unsigned int sb_index); 271 int (*sb_occ_max_clear)(struct mlxsw_core *mlxsw_core, 272 unsigned int sb_index); 273 int (*sb_occ_port_pool_get)(struct mlxsw_core_port *mlxsw_core_port, 274 unsigned int sb_index, u16 pool_index, 275 u32 *p_cur, u32 *p_max); 276 int (*sb_occ_tc_port_bind_get)(struct mlxsw_core_port *mlxsw_core_port, 277 unsigned int sb_index, u16 tc_index, 278 enum devlink_sb_pool_type pool_type, 279 u32 *p_cur, u32 *p_max); 280 void (*txhdr_construct)(struct sk_buff *skb, 281 const struct mlxsw_tx_info *tx_info); 282 int (*resources_register)(struct mlxsw_core *mlxsw_core); 283 int (*kvd_sizes_get)(struct mlxsw_core *mlxsw_core, 284 const struct mlxsw_config_profile *profile, 285 u64 *p_single_size, u64 *p_double_size, 286 u64 *p_linear_size); 287 int (*params_register)(struct mlxsw_core *mlxsw_core); 288 void (*params_unregister)(struct mlxsw_core *mlxsw_core); 289 u8 txhdr_len; 290 const struct mlxsw_config_profile *profile; 291 bool res_query_enabled; 292 }; 293 294 int mlxsw_core_kvd_sizes_get(struct mlxsw_core *mlxsw_core, 295 const struct mlxsw_config_profile *profile, 296 u64 *p_single_size, u64 *p_double_size, 297 u64 *p_linear_size); 298 299 void mlxsw_core_fw_flash_start(struct mlxsw_core *mlxsw_core); 300 void mlxsw_core_fw_flash_end(struct mlxsw_core *mlxsw_core); 301 302 bool mlxsw_core_res_valid(struct mlxsw_core *mlxsw_core, 303 enum mlxsw_res_id res_id); 304 305 #define MLXSW_CORE_RES_VALID(mlxsw_core, short_res_id) \ 306 mlxsw_core_res_valid(mlxsw_core, MLXSW_RES_ID_##short_res_id) 307 308 u64 mlxsw_core_res_get(struct mlxsw_core *mlxsw_core, 309 enum mlxsw_res_id res_id); 310 311 #define MLXSW_CORE_RES_GET(mlxsw_core, short_res_id) \ 312 mlxsw_core_res_get(mlxsw_core, MLXSW_RES_ID_##short_res_id) 313 314 #define MLXSW_BUS_F_TXRX BIT(0) 315 #define MLXSW_BUS_F_RESET BIT(1) 316 317 struct mlxsw_bus { 318 const char *kind; 319 int (*init)(void *bus_priv, struct mlxsw_core *mlxsw_core, 320 const struct mlxsw_config_profile *profile, 321 struct mlxsw_res *res); 322 void (*fini)(void *bus_priv); 323 bool (*skb_transmit_busy)(void *bus_priv, 324 const struct mlxsw_tx_info *tx_info); 325 int (*skb_transmit)(void *bus_priv, struct sk_buff *skb, 326 const struct mlxsw_tx_info *tx_info); 327 int (*cmd_exec)(void *bus_priv, u16 opcode, u8 opcode_mod, 328 u32 in_mod, bool out_mbox_direct, 329 char *in_mbox, size_t in_mbox_size, 330 char *out_mbox, size_t out_mbox_size, 331 u8 *p_status); 332 u8 features; 333 }; 334 335 struct mlxsw_fw_rev { 336 u16 major; 337 u16 minor; 338 u16 subminor; 339 u16 can_reset_minor; 340 }; 341 342 struct mlxsw_bus_info { 343 const char *device_kind; 344 const char *device_name; 345 struct device *dev; 346 struct mlxsw_fw_rev fw_rev; 347 u8 vsd[MLXSW_CMD_BOARDINFO_VSD_LEN]; 348 u8 psid[MLXSW_CMD_BOARDINFO_PSID_LEN]; 349 u8 low_frequency; 350 }; 351 352 struct mlxsw_hwmon; 353 354 #ifdef CONFIG_MLXSW_CORE_HWMON 355 356 int mlxsw_hwmon_init(struct mlxsw_core *mlxsw_core, 357 const struct mlxsw_bus_info *mlxsw_bus_info, 358 struct mlxsw_hwmon **p_hwmon); 359 void mlxsw_hwmon_fini(struct mlxsw_hwmon *mlxsw_hwmon); 360 361 #else 362 363 static inline int mlxsw_hwmon_init(struct mlxsw_core *mlxsw_core, 364 const struct mlxsw_bus_info *mlxsw_bus_info, 365 struct mlxsw_hwmon **p_hwmon) 366 { 367 return 0; 368 } 369 370 static inline void mlxsw_hwmon_fini(struct mlxsw_hwmon *mlxsw_hwmon) 371 { 372 } 373 374 #endif 375 376 struct mlxsw_thermal; 377 378 #ifdef CONFIG_MLXSW_CORE_THERMAL 379 380 int mlxsw_thermal_init(struct mlxsw_core *mlxsw_core, 381 const struct mlxsw_bus_info *mlxsw_bus_info, 382 struct mlxsw_thermal **p_thermal); 383 void mlxsw_thermal_fini(struct mlxsw_thermal *thermal); 384 385 #else 386 387 static inline int mlxsw_thermal_init(struct mlxsw_core *mlxsw_core, 388 const struct mlxsw_bus_info *mlxsw_bus_info, 389 struct mlxsw_thermal **p_thermal) 390 { 391 return 0; 392 } 393 394 static inline void mlxsw_thermal_fini(struct mlxsw_thermal *thermal) 395 { 396 } 397 398 #endif 399 400 enum mlxsw_devlink_param_id { 401 MLXSW_DEVLINK_PARAM_ID_BASE = DEVLINK_PARAM_GENERIC_ID_MAX, 402 MLXSW_DEVLINK_PARAM_ID_ACL_REGION_REHASH_INTERVAL, 403 }; 404 405 #endif 406