1 /* 2 * drivers/net/ethernet/mellanox/mlxsw/core.c 3 * Copyright (c) 2015 Mellanox Technologies. All rights reserved. 4 * Copyright (c) 2015 Jiri Pirko <jiri@mellanox.com> 5 * Copyright (c) 2015 Ido Schimmel <idosch@mellanox.com> 6 * Copyright (c) 2015 Elad Raz <eladr@mellanox.com> 7 * 8 * Redistribution and use in source and binary forms, with or without 9 * modification, are permitted provided that the following conditions are met: 10 * 11 * 1. Redistributions of source code must retain the above copyright 12 * notice, this list of conditions and the following disclaimer. 13 * 2. Redistributions in binary form must reproduce the above copyright 14 * notice, this list of conditions and the following disclaimer in the 15 * documentation and/or other materials provided with the distribution. 16 * 3. Neither the names of the copyright holders nor the names of its 17 * contributors may be used to endorse or promote products derived from 18 * this software without specific prior written permission. 19 * 20 * Alternatively, this software may be distributed under the terms of the 21 * GNU General Public License ("GPL") version 2 as published by the Free 22 * Software Foundation. 23 * 24 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 25 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 26 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 27 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE 28 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 29 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 30 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 31 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 32 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 33 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 34 * POSSIBILITY OF SUCH DAMAGE. 35 */ 36 37 #include <linux/kernel.h> 38 #include <linux/module.h> 39 #include <linux/device.h> 40 #include <linux/export.h> 41 #include <linux/err.h> 42 #include <linux/if_link.h> 43 #include <linux/netdevice.h> 44 #include <linux/completion.h> 45 #include <linux/skbuff.h> 46 #include <linux/etherdevice.h> 47 #include <linux/types.h> 48 #include <linux/string.h> 49 #include <linux/gfp.h> 50 #include <linux/random.h> 51 #include <linux/jiffies.h> 52 #include <linux/mutex.h> 53 #include <linux/rcupdate.h> 54 #include <linux/slab.h> 55 #include <linux/workqueue.h> 56 #include <asm/byteorder.h> 57 #include <net/devlink.h> 58 #include <trace/events/devlink.h> 59 60 #include "core.h" 61 #include "item.h" 62 #include "cmd.h" 63 #include "port.h" 64 #include "trap.h" 65 #include "emad.h" 66 #include "reg.h" 67 #include "resources.h" 68 69 static LIST_HEAD(mlxsw_core_driver_list); 70 static DEFINE_SPINLOCK(mlxsw_core_driver_list_lock); 71 72 static const char mlxsw_core_driver_name[] = "mlxsw_core"; 73 74 static struct workqueue_struct *mlxsw_wq; 75 static struct workqueue_struct *mlxsw_owq; 76 77 struct mlxsw_core_port { 78 struct devlink_port devlink_port; 79 void *port_driver_priv; 80 u8 local_port; 81 }; 82 83 void *mlxsw_core_port_driver_priv(struct mlxsw_core_port *mlxsw_core_port) 84 { 85 return mlxsw_core_port->port_driver_priv; 86 } 87 EXPORT_SYMBOL(mlxsw_core_port_driver_priv); 88 89 static bool mlxsw_core_port_check(struct mlxsw_core_port *mlxsw_core_port) 90 { 91 return mlxsw_core_port->port_driver_priv != NULL; 92 } 93 94 struct mlxsw_core { 95 struct mlxsw_driver *driver; 96 const struct mlxsw_bus *bus; 97 void *bus_priv; 98 const struct mlxsw_bus_info *bus_info; 99 struct workqueue_struct *emad_wq; 100 struct list_head rx_listener_list; 101 struct list_head event_listener_list; 102 struct { 103 atomic64_t tid; 104 struct list_head trans_list; 105 spinlock_t trans_list_lock; /* protects trans_list writes */ 106 bool use_emad; 107 } emad; 108 struct { 109 u8 *mapping; /* lag_id+port_index to local_port mapping */ 110 } lag; 111 struct mlxsw_res res; 112 struct mlxsw_hwmon *hwmon; 113 struct mlxsw_thermal *thermal; 114 struct mlxsw_core_port *ports; 115 unsigned int max_ports; 116 bool reload_fail; 117 unsigned long driver_priv[0]; 118 /* driver_priv has to be always the last item */ 119 }; 120 121 #define MLXSW_PORT_MAX_PORTS_DEFAULT 0x40 122 123 static int mlxsw_ports_init(struct mlxsw_core *mlxsw_core) 124 { 125 /* Switch ports are numbered from 1 to queried value */ 126 if (MLXSW_CORE_RES_VALID(mlxsw_core, MAX_SYSTEM_PORT)) 127 mlxsw_core->max_ports = MLXSW_CORE_RES_GET(mlxsw_core, 128 MAX_SYSTEM_PORT) + 1; 129 else 130 mlxsw_core->max_ports = MLXSW_PORT_MAX_PORTS_DEFAULT + 1; 131 132 mlxsw_core->ports = kcalloc(mlxsw_core->max_ports, 133 sizeof(struct mlxsw_core_port), GFP_KERNEL); 134 if (!mlxsw_core->ports) 135 return -ENOMEM; 136 137 return 0; 138 } 139 140 static void mlxsw_ports_fini(struct mlxsw_core *mlxsw_core) 141 { 142 kfree(mlxsw_core->ports); 143 } 144 145 unsigned int mlxsw_core_max_ports(const struct mlxsw_core *mlxsw_core) 146 { 147 return mlxsw_core->max_ports; 148 } 149 EXPORT_SYMBOL(mlxsw_core_max_ports); 150 151 void *mlxsw_core_driver_priv(struct mlxsw_core *mlxsw_core) 152 { 153 return mlxsw_core->driver_priv; 154 } 155 EXPORT_SYMBOL(mlxsw_core_driver_priv); 156 157 struct mlxsw_rx_listener_item { 158 struct list_head list; 159 struct mlxsw_rx_listener rxl; 160 void *priv; 161 }; 162 163 struct mlxsw_event_listener_item { 164 struct list_head list; 165 struct mlxsw_event_listener el; 166 void *priv; 167 }; 168 169 /****************** 170 * EMAD processing 171 ******************/ 172 173 /* emad_eth_hdr_dmac 174 * Destination MAC in EMAD's Ethernet header. 175 * Must be set to 01:02:c9:00:00:01 176 */ 177 MLXSW_ITEM_BUF(emad, eth_hdr, dmac, 0x00, 6); 178 179 /* emad_eth_hdr_smac 180 * Source MAC in EMAD's Ethernet header. 181 * Must be set to 00:02:c9:01:02:03 182 */ 183 MLXSW_ITEM_BUF(emad, eth_hdr, smac, 0x06, 6); 184 185 /* emad_eth_hdr_ethertype 186 * Ethertype in EMAD's Ethernet header. 187 * Must be set to 0x8932 188 */ 189 MLXSW_ITEM32(emad, eth_hdr, ethertype, 0x0C, 16, 16); 190 191 /* emad_eth_hdr_mlx_proto 192 * Mellanox protocol. 193 * Must be set to 0x0. 194 */ 195 MLXSW_ITEM32(emad, eth_hdr, mlx_proto, 0x0C, 8, 8); 196 197 /* emad_eth_hdr_ver 198 * Mellanox protocol version. 199 * Must be set to 0x0. 200 */ 201 MLXSW_ITEM32(emad, eth_hdr, ver, 0x0C, 4, 4); 202 203 /* emad_op_tlv_type 204 * Type of the TLV. 205 * Must be set to 0x1 (operation TLV). 206 */ 207 MLXSW_ITEM32(emad, op_tlv, type, 0x00, 27, 5); 208 209 /* emad_op_tlv_len 210 * Length of the operation TLV in u32. 211 * Must be set to 0x4. 212 */ 213 MLXSW_ITEM32(emad, op_tlv, len, 0x00, 16, 11); 214 215 /* emad_op_tlv_dr 216 * Direct route bit. Setting to 1 indicates the EMAD is a direct route 217 * EMAD. DR TLV must follow. 218 * 219 * Note: Currently not supported and must not be set. 220 */ 221 MLXSW_ITEM32(emad, op_tlv, dr, 0x00, 15, 1); 222 223 /* emad_op_tlv_status 224 * Returned status in case of EMAD response. Must be set to 0 in case 225 * of EMAD request. 226 * 0x0 - success 227 * 0x1 - device is busy. Requester should retry 228 * 0x2 - Mellanox protocol version not supported 229 * 0x3 - unknown TLV 230 * 0x4 - register not supported 231 * 0x5 - operation class not supported 232 * 0x6 - EMAD method not supported 233 * 0x7 - bad parameter (e.g. port out of range) 234 * 0x8 - resource not available 235 * 0x9 - message receipt acknowledgment. Requester should retry 236 * 0x70 - internal error 237 */ 238 MLXSW_ITEM32(emad, op_tlv, status, 0x00, 8, 7); 239 240 /* emad_op_tlv_register_id 241 * Register ID of register within register TLV. 242 */ 243 MLXSW_ITEM32(emad, op_tlv, register_id, 0x04, 16, 16); 244 245 /* emad_op_tlv_r 246 * Response bit. Setting to 1 indicates Response, otherwise request. 247 */ 248 MLXSW_ITEM32(emad, op_tlv, r, 0x04, 15, 1); 249 250 /* emad_op_tlv_method 251 * EMAD method type. 252 * 0x1 - query 253 * 0x2 - write 254 * 0x3 - send (currently not supported) 255 * 0x4 - event 256 */ 257 MLXSW_ITEM32(emad, op_tlv, method, 0x04, 8, 7); 258 259 /* emad_op_tlv_class 260 * EMAD operation class. Must be set to 0x1 (REG_ACCESS). 261 */ 262 MLXSW_ITEM32(emad, op_tlv, class, 0x04, 0, 8); 263 264 /* emad_op_tlv_tid 265 * EMAD transaction ID. Used for pairing request and response EMADs. 266 */ 267 MLXSW_ITEM64(emad, op_tlv, tid, 0x08, 0, 64); 268 269 /* emad_reg_tlv_type 270 * Type of the TLV. 271 * Must be set to 0x3 (register TLV). 272 */ 273 MLXSW_ITEM32(emad, reg_tlv, type, 0x00, 27, 5); 274 275 /* emad_reg_tlv_len 276 * Length of the operation TLV in u32. 277 */ 278 MLXSW_ITEM32(emad, reg_tlv, len, 0x00, 16, 11); 279 280 /* emad_end_tlv_type 281 * Type of the TLV. 282 * Must be set to 0x0 (end TLV). 283 */ 284 MLXSW_ITEM32(emad, end_tlv, type, 0x00, 27, 5); 285 286 /* emad_end_tlv_len 287 * Length of the end TLV in u32. 288 * Must be set to 1. 289 */ 290 MLXSW_ITEM32(emad, end_tlv, len, 0x00, 16, 11); 291 292 enum mlxsw_core_reg_access_type { 293 MLXSW_CORE_REG_ACCESS_TYPE_QUERY, 294 MLXSW_CORE_REG_ACCESS_TYPE_WRITE, 295 }; 296 297 static inline const char * 298 mlxsw_core_reg_access_type_str(enum mlxsw_core_reg_access_type type) 299 { 300 switch (type) { 301 case MLXSW_CORE_REG_ACCESS_TYPE_QUERY: 302 return "query"; 303 case MLXSW_CORE_REG_ACCESS_TYPE_WRITE: 304 return "write"; 305 } 306 BUG(); 307 } 308 309 static void mlxsw_emad_pack_end_tlv(char *end_tlv) 310 { 311 mlxsw_emad_end_tlv_type_set(end_tlv, MLXSW_EMAD_TLV_TYPE_END); 312 mlxsw_emad_end_tlv_len_set(end_tlv, MLXSW_EMAD_END_TLV_LEN); 313 } 314 315 static void mlxsw_emad_pack_reg_tlv(char *reg_tlv, 316 const struct mlxsw_reg_info *reg, 317 char *payload) 318 { 319 mlxsw_emad_reg_tlv_type_set(reg_tlv, MLXSW_EMAD_TLV_TYPE_REG); 320 mlxsw_emad_reg_tlv_len_set(reg_tlv, reg->len / sizeof(u32) + 1); 321 memcpy(reg_tlv + sizeof(u32), payload, reg->len); 322 } 323 324 static void mlxsw_emad_pack_op_tlv(char *op_tlv, 325 const struct mlxsw_reg_info *reg, 326 enum mlxsw_core_reg_access_type type, 327 u64 tid) 328 { 329 mlxsw_emad_op_tlv_type_set(op_tlv, MLXSW_EMAD_TLV_TYPE_OP); 330 mlxsw_emad_op_tlv_len_set(op_tlv, MLXSW_EMAD_OP_TLV_LEN); 331 mlxsw_emad_op_tlv_dr_set(op_tlv, 0); 332 mlxsw_emad_op_tlv_status_set(op_tlv, 0); 333 mlxsw_emad_op_tlv_register_id_set(op_tlv, reg->id); 334 mlxsw_emad_op_tlv_r_set(op_tlv, MLXSW_EMAD_OP_TLV_REQUEST); 335 if (type == MLXSW_CORE_REG_ACCESS_TYPE_QUERY) 336 mlxsw_emad_op_tlv_method_set(op_tlv, 337 MLXSW_EMAD_OP_TLV_METHOD_QUERY); 338 else 339 mlxsw_emad_op_tlv_method_set(op_tlv, 340 MLXSW_EMAD_OP_TLV_METHOD_WRITE); 341 mlxsw_emad_op_tlv_class_set(op_tlv, 342 MLXSW_EMAD_OP_TLV_CLASS_REG_ACCESS); 343 mlxsw_emad_op_tlv_tid_set(op_tlv, tid); 344 } 345 346 static int mlxsw_emad_construct_eth_hdr(struct sk_buff *skb) 347 { 348 char *eth_hdr = skb_push(skb, MLXSW_EMAD_ETH_HDR_LEN); 349 350 mlxsw_emad_eth_hdr_dmac_memcpy_to(eth_hdr, MLXSW_EMAD_EH_DMAC); 351 mlxsw_emad_eth_hdr_smac_memcpy_to(eth_hdr, MLXSW_EMAD_EH_SMAC); 352 mlxsw_emad_eth_hdr_ethertype_set(eth_hdr, MLXSW_EMAD_EH_ETHERTYPE); 353 mlxsw_emad_eth_hdr_mlx_proto_set(eth_hdr, MLXSW_EMAD_EH_MLX_PROTO); 354 mlxsw_emad_eth_hdr_ver_set(eth_hdr, MLXSW_EMAD_EH_PROTO_VERSION); 355 356 skb_reset_mac_header(skb); 357 358 return 0; 359 } 360 361 static void mlxsw_emad_construct(struct sk_buff *skb, 362 const struct mlxsw_reg_info *reg, 363 char *payload, 364 enum mlxsw_core_reg_access_type type, 365 u64 tid) 366 { 367 char *buf; 368 369 buf = skb_push(skb, MLXSW_EMAD_END_TLV_LEN * sizeof(u32)); 370 mlxsw_emad_pack_end_tlv(buf); 371 372 buf = skb_push(skb, reg->len + sizeof(u32)); 373 mlxsw_emad_pack_reg_tlv(buf, reg, payload); 374 375 buf = skb_push(skb, MLXSW_EMAD_OP_TLV_LEN * sizeof(u32)); 376 mlxsw_emad_pack_op_tlv(buf, reg, type, tid); 377 378 mlxsw_emad_construct_eth_hdr(skb); 379 } 380 381 static char *mlxsw_emad_op_tlv(const struct sk_buff *skb) 382 { 383 return ((char *) (skb->data + MLXSW_EMAD_ETH_HDR_LEN)); 384 } 385 386 static char *mlxsw_emad_reg_tlv(const struct sk_buff *skb) 387 { 388 return ((char *) (skb->data + MLXSW_EMAD_ETH_HDR_LEN + 389 MLXSW_EMAD_OP_TLV_LEN * sizeof(u32))); 390 } 391 392 static char *mlxsw_emad_reg_payload(const char *op_tlv) 393 { 394 return ((char *) (op_tlv + (MLXSW_EMAD_OP_TLV_LEN + 1) * sizeof(u32))); 395 } 396 397 static u64 mlxsw_emad_get_tid(const struct sk_buff *skb) 398 { 399 char *op_tlv; 400 401 op_tlv = mlxsw_emad_op_tlv(skb); 402 return mlxsw_emad_op_tlv_tid_get(op_tlv); 403 } 404 405 static bool mlxsw_emad_is_resp(const struct sk_buff *skb) 406 { 407 char *op_tlv; 408 409 op_tlv = mlxsw_emad_op_tlv(skb); 410 return (mlxsw_emad_op_tlv_r_get(op_tlv) == MLXSW_EMAD_OP_TLV_RESPONSE); 411 } 412 413 static int mlxsw_emad_process_status(char *op_tlv, 414 enum mlxsw_emad_op_tlv_status *p_status) 415 { 416 *p_status = mlxsw_emad_op_tlv_status_get(op_tlv); 417 418 switch (*p_status) { 419 case MLXSW_EMAD_OP_TLV_STATUS_SUCCESS: 420 return 0; 421 case MLXSW_EMAD_OP_TLV_STATUS_BUSY: 422 case MLXSW_EMAD_OP_TLV_STATUS_MESSAGE_RECEIPT_ACK: 423 return -EAGAIN; 424 case MLXSW_EMAD_OP_TLV_STATUS_VERSION_NOT_SUPPORTED: 425 case MLXSW_EMAD_OP_TLV_STATUS_UNKNOWN_TLV: 426 case MLXSW_EMAD_OP_TLV_STATUS_REGISTER_NOT_SUPPORTED: 427 case MLXSW_EMAD_OP_TLV_STATUS_CLASS_NOT_SUPPORTED: 428 case MLXSW_EMAD_OP_TLV_STATUS_METHOD_NOT_SUPPORTED: 429 case MLXSW_EMAD_OP_TLV_STATUS_BAD_PARAMETER: 430 case MLXSW_EMAD_OP_TLV_STATUS_RESOURCE_NOT_AVAILABLE: 431 case MLXSW_EMAD_OP_TLV_STATUS_INTERNAL_ERROR: 432 default: 433 return -EIO; 434 } 435 } 436 437 static int 438 mlxsw_emad_process_status_skb(struct sk_buff *skb, 439 enum mlxsw_emad_op_tlv_status *p_status) 440 { 441 return mlxsw_emad_process_status(mlxsw_emad_op_tlv(skb), p_status); 442 } 443 444 struct mlxsw_reg_trans { 445 struct list_head list; 446 struct list_head bulk_list; 447 struct mlxsw_core *core; 448 struct sk_buff *tx_skb; 449 struct mlxsw_tx_info tx_info; 450 struct delayed_work timeout_dw; 451 unsigned int retries; 452 u64 tid; 453 struct completion completion; 454 atomic_t active; 455 mlxsw_reg_trans_cb_t *cb; 456 unsigned long cb_priv; 457 const struct mlxsw_reg_info *reg; 458 enum mlxsw_core_reg_access_type type; 459 int err; 460 enum mlxsw_emad_op_tlv_status emad_status; 461 struct rcu_head rcu; 462 }; 463 464 #define MLXSW_EMAD_TIMEOUT_MS 200 465 466 static void mlxsw_emad_trans_timeout_schedule(struct mlxsw_reg_trans *trans) 467 { 468 unsigned long timeout = msecs_to_jiffies(MLXSW_EMAD_TIMEOUT_MS); 469 470 queue_delayed_work(trans->core->emad_wq, &trans->timeout_dw, timeout); 471 } 472 473 static int mlxsw_emad_transmit(struct mlxsw_core *mlxsw_core, 474 struct mlxsw_reg_trans *trans) 475 { 476 struct sk_buff *skb; 477 int err; 478 479 skb = skb_copy(trans->tx_skb, GFP_KERNEL); 480 if (!skb) 481 return -ENOMEM; 482 483 trace_devlink_hwmsg(priv_to_devlink(mlxsw_core), false, 0, 484 skb->data + mlxsw_core->driver->txhdr_len, 485 skb->len - mlxsw_core->driver->txhdr_len); 486 487 atomic_set(&trans->active, 1); 488 err = mlxsw_core_skb_transmit(mlxsw_core, skb, &trans->tx_info); 489 if (err) { 490 dev_kfree_skb(skb); 491 return err; 492 } 493 mlxsw_emad_trans_timeout_schedule(trans); 494 return 0; 495 } 496 497 static void mlxsw_emad_trans_finish(struct mlxsw_reg_trans *trans, int err) 498 { 499 struct mlxsw_core *mlxsw_core = trans->core; 500 501 dev_kfree_skb(trans->tx_skb); 502 spin_lock_bh(&mlxsw_core->emad.trans_list_lock); 503 list_del_rcu(&trans->list); 504 spin_unlock_bh(&mlxsw_core->emad.trans_list_lock); 505 trans->err = err; 506 complete(&trans->completion); 507 } 508 509 static void mlxsw_emad_transmit_retry(struct mlxsw_core *mlxsw_core, 510 struct mlxsw_reg_trans *trans) 511 { 512 int err; 513 514 if (trans->retries < MLXSW_EMAD_MAX_RETRY) { 515 trans->retries++; 516 err = mlxsw_emad_transmit(trans->core, trans); 517 if (err == 0) 518 return; 519 } else { 520 err = -EIO; 521 } 522 mlxsw_emad_trans_finish(trans, err); 523 } 524 525 static void mlxsw_emad_trans_timeout_work(struct work_struct *work) 526 { 527 struct mlxsw_reg_trans *trans = container_of(work, 528 struct mlxsw_reg_trans, 529 timeout_dw.work); 530 531 if (!atomic_dec_and_test(&trans->active)) 532 return; 533 534 mlxsw_emad_transmit_retry(trans->core, trans); 535 } 536 537 static void mlxsw_emad_process_response(struct mlxsw_core *mlxsw_core, 538 struct mlxsw_reg_trans *trans, 539 struct sk_buff *skb) 540 { 541 int err; 542 543 if (!atomic_dec_and_test(&trans->active)) 544 return; 545 546 err = mlxsw_emad_process_status_skb(skb, &trans->emad_status); 547 if (err == -EAGAIN) { 548 mlxsw_emad_transmit_retry(mlxsw_core, trans); 549 } else { 550 if (err == 0) { 551 char *op_tlv = mlxsw_emad_op_tlv(skb); 552 553 if (trans->cb) 554 trans->cb(mlxsw_core, 555 mlxsw_emad_reg_payload(op_tlv), 556 trans->reg->len, trans->cb_priv); 557 } 558 mlxsw_emad_trans_finish(trans, err); 559 } 560 } 561 562 /* called with rcu read lock held */ 563 static void mlxsw_emad_rx_listener_func(struct sk_buff *skb, u8 local_port, 564 void *priv) 565 { 566 struct mlxsw_core *mlxsw_core = priv; 567 struct mlxsw_reg_trans *trans; 568 569 trace_devlink_hwmsg(priv_to_devlink(mlxsw_core), true, 0, 570 skb->data, skb->len); 571 572 if (!mlxsw_emad_is_resp(skb)) 573 goto free_skb; 574 575 list_for_each_entry_rcu(trans, &mlxsw_core->emad.trans_list, list) { 576 if (mlxsw_emad_get_tid(skb) == trans->tid) { 577 mlxsw_emad_process_response(mlxsw_core, trans, skb); 578 break; 579 } 580 } 581 582 free_skb: 583 dev_kfree_skb(skb); 584 } 585 586 static const struct mlxsw_listener mlxsw_emad_rx_listener = 587 MLXSW_RXL(mlxsw_emad_rx_listener_func, ETHEMAD, TRAP_TO_CPU, false, 588 EMAD, DISCARD); 589 590 static int mlxsw_emad_init(struct mlxsw_core *mlxsw_core) 591 { 592 struct workqueue_struct *emad_wq; 593 u64 tid; 594 int err; 595 596 if (!(mlxsw_core->bus->features & MLXSW_BUS_F_TXRX)) 597 return 0; 598 599 emad_wq = alloc_workqueue("mlxsw_core_emad", WQ_MEM_RECLAIM, 0); 600 if (!emad_wq) 601 return -ENOMEM; 602 mlxsw_core->emad_wq = emad_wq; 603 604 /* Set the upper 32 bits of the transaction ID field to a random 605 * number. This allows us to discard EMADs addressed to other 606 * devices. 607 */ 608 get_random_bytes(&tid, 4); 609 tid <<= 32; 610 atomic64_set(&mlxsw_core->emad.tid, tid); 611 612 INIT_LIST_HEAD(&mlxsw_core->emad.trans_list); 613 spin_lock_init(&mlxsw_core->emad.trans_list_lock); 614 615 err = mlxsw_core_trap_register(mlxsw_core, &mlxsw_emad_rx_listener, 616 mlxsw_core); 617 if (err) 618 return err; 619 620 err = mlxsw_core->driver->basic_trap_groups_set(mlxsw_core); 621 if (err) 622 goto err_emad_trap_set; 623 mlxsw_core->emad.use_emad = true; 624 625 return 0; 626 627 err_emad_trap_set: 628 mlxsw_core_trap_unregister(mlxsw_core, &mlxsw_emad_rx_listener, 629 mlxsw_core); 630 destroy_workqueue(mlxsw_core->emad_wq); 631 return err; 632 } 633 634 static void mlxsw_emad_fini(struct mlxsw_core *mlxsw_core) 635 { 636 637 if (!(mlxsw_core->bus->features & MLXSW_BUS_F_TXRX)) 638 return; 639 640 mlxsw_core->emad.use_emad = false; 641 mlxsw_core_trap_unregister(mlxsw_core, &mlxsw_emad_rx_listener, 642 mlxsw_core); 643 destroy_workqueue(mlxsw_core->emad_wq); 644 } 645 646 static struct sk_buff *mlxsw_emad_alloc(const struct mlxsw_core *mlxsw_core, 647 u16 reg_len) 648 { 649 struct sk_buff *skb; 650 u16 emad_len; 651 652 emad_len = (reg_len + sizeof(u32) + MLXSW_EMAD_ETH_HDR_LEN + 653 (MLXSW_EMAD_OP_TLV_LEN + MLXSW_EMAD_END_TLV_LEN) * 654 sizeof(u32) + mlxsw_core->driver->txhdr_len); 655 if (emad_len > MLXSW_EMAD_MAX_FRAME_LEN) 656 return NULL; 657 658 skb = netdev_alloc_skb(NULL, emad_len); 659 if (!skb) 660 return NULL; 661 memset(skb->data, 0, emad_len); 662 skb_reserve(skb, emad_len); 663 664 return skb; 665 } 666 667 static int mlxsw_emad_reg_access(struct mlxsw_core *mlxsw_core, 668 const struct mlxsw_reg_info *reg, 669 char *payload, 670 enum mlxsw_core_reg_access_type type, 671 struct mlxsw_reg_trans *trans, 672 struct list_head *bulk_list, 673 mlxsw_reg_trans_cb_t *cb, 674 unsigned long cb_priv, u64 tid) 675 { 676 struct sk_buff *skb; 677 int err; 678 679 dev_dbg(mlxsw_core->bus_info->dev, "EMAD reg access (tid=%llx,reg_id=%x(%s),type=%s)\n", 680 tid, reg->id, mlxsw_reg_id_str(reg->id), 681 mlxsw_core_reg_access_type_str(type)); 682 683 skb = mlxsw_emad_alloc(mlxsw_core, reg->len); 684 if (!skb) 685 return -ENOMEM; 686 687 list_add_tail(&trans->bulk_list, bulk_list); 688 trans->core = mlxsw_core; 689 trans->tx_skb = skb; 690 trans->tx_info.local_port = MLXSW_PORT_CPU_PORT; 691 trans->tx_info.is_emad = true; 692 INIT_DELAYED_WORK(&trans->timeout_dw, mlxsw_emad_trans_timeout_work); 693 trans->tid = tid; 694 init_completion(&trans->completion); 695 trans->cb = cb; 696 trans->cb_priv = cb_priv; 697 trans->reg = reg; 698 trans->type = type; 699 700 mlxsw_emad_construct(skb, reg, payload, type, trans->tid); 701 mlxsw_core->driver->txhdr_construct(skb, &trans->tx_info); 702 703 spin_lock_bh(&mlxsw_core->emad.trans_list_lock); 704 list_add_tail_rcu(&trans->list, &mlxsw_core->emad.trans_list); 705 spin_unlock_bh(&mlxsw_core->emad.trans_list_lock); 706 err = mlxsw_emad_transmit(mlxsw_core, trans); 707 if (err) 708 goto err_out; 709 return 0; 710 711 err_out: 712 spin_lock_bh(&mlxsw_core->emad.trans_list_lock); 713 list_del_rcu(&trans->list); 714 spin_unlock_bh(&mlxsw_core->emad.trans_list_lock); 715 list_del(&trans->bulk_list); 716 dev_kfree_skb(trans->tx_skb); 717 return err; 718 } 719 720 /***************** 721 * Core functions 722 *****************/ 723 724 int mlxsw_core_driver_register(struct mlxsw_driver *mlxsw_driver) 725 { 726 spin_lock(&mlxsw_core_driver_list_lock); 727 list_add_tail(&mlxsw_driver->list, &mlxsw_core_driver_list); 728 spin_unlock(&mlxsw_core_driver_list_lock); 729 return 0; 730 } 731 EXPORT_SYMBOL(mlxsw_core_driver_register); 732 733 void mlxsw_core_driver_unregister(struct mlxsw_driver *mlxsw_driver) 734 { 735 spin_lock(&mlxsw_core_driver_list_lock); 736 list_del(&mlxsw_driver->list); 737 spin_unlock(&mlxsw_core_driver_list_lock); 738 } 739 EXPORT_SYMBOL(mlxsw_core_driver_unregister); 740 741 static struct mlxsw_driver *__driver_find(const char *kind) 742 { 743 struct mlxsw_driver *mlxsw_driver; 744 745 list_for_each_entry(mlxsw_driver, &mlxsw_core_driver_list, list) { 746 if (strcmp(mlxsw_driver->kind, kind) == 0) 747 return mlxsw_driver; 748 } 749 return NULL; 750 } 751 752 static struct mlxsw_driver *mlxsw_core_driver_get(const char *kind) 753 { 754 struct mlxsw_driver *mlxsw_driver; 755 756 spin_lock(&mlxsw_core_driver_list_lock); 757 mlxsw_driver = __driver_find(kind); 758 spin_unlock(&mlxsw_core_driver_list_lock); 759 return mlxsw_driver; 760 } 761 762 static void mlxsw_core_driver_put(const char *kind) 763 { 764 struct mlxsw_driver *mlxsw_driver; 765 766 spin_lock(&mlxsw_core_driver_list_lock); 767 mlxsw_driver = __driver_find(kind); 768 spin_unlock(&mlxsw_core_driver_list_lock); 769 } 770 771 static int mlxsw_devlink_port_split(struct devlink *devlink, 772 unsigned int port_index, 773 unsigned int count) 774 { 775 struct mlxsw_core *mlxsw_core = devlink_priv(devlink); 776 777 if (port_index >= mlxsw_core->max_ports) 778 return -EINVAL; 779 if (!mlxsw_core->driver->port_split) 780 return -EOPNOTSUPP; 781 return mlxsw_core->driver->port_split(mlxsw_core, port_index, count); 782 } 783 784 static int mlxsw_devlink_port_unsplit(struct devlink *devlink, 785 unsigned int port_index) 786 { 787 struct mlxsw_core *mlxsw_core = devlink_priv(devlink); 788 789 if (port_index >= mlxsw_core->max_ports) 790 return -EINVAL; 791 if (!mlxsw_core->driver->port_unsplit) 792 return -EOPNOTSUPP; 793 return mlxsw_core->driver->port_unsplit(mlxsw_core, port_index); 794 } 795 796 static int 797 mlxsw_devlink_sb_pool_get(struct devlink *devlink, 798 unsigned int sb_index, u16 pool_index, 799 struct devlink_sb_pool_info *pool_info) 800 { 801 struct mlxsw_core *mlxsw_core = devlink_priv(devlink); 802 struct mlxsw_driver *mlxsw_driver = mlxsw_core->driver; 803 804 if (!mlxsw_driver->sb_pool_get) 805 return -EOPNOTSUPP; 806 return mlxsw_driver->sb_pool_get(mlxsw_core, sb_index, 807 pool_index, pool_info); 808 } 809 810 static int 811 mlxsw_devlink_sb_pool_set(struct devlink *devlink, 812 unsigned int sb_index, u16 pool_index, u32 size, 813 enum devlink_sb_threshold_type threshold_type) 814 { 815 struct mlxsw_core *mlxsw_core = devlink_priv(devlink); 816 struct mlxsw_driver *mlxsw_driver = mlxsw_core->driver; 817 818 if (!mlxsw_driver->sb_pool_set) 819 return -EOPNOTSUPP; 820 return mlxsw_driver->sb_pool_set(mlxsw_core, sb_index, 821 pool_index, size, threshold_type); 822 } 823 824 static void *__dl_port(struct devlink_port *devlink_port) 825 { 826 return container_of(devlink_port, struct mlxsw_core_port, devlink_port); 827 } 828 829 static int mlxsw_devlink_port_type_set(struct devlink_port *devlink_port, 830 enum devlink_port_type port_type) 831 { 832 struct mlxsw_core *mlxsw_core = devlink_priv(devlink_port->devlink); 833 struct mlxsw_driver *mlxsw_driver = mlxsw_core->driver; 834 struct mlxsw_core_port *mlxsw_core_port = __dl_port(devlink_port); 835 836 if (!mlxsw_driver->port_type_set) 837 return -EOPNOTSUPP; 838 839 return mlxsw_driver->port_type_set(mlxsw_core, 840 mlxsw_core_port->local_port, 841 port_type); 842 } 843 844 static int mlxsw_devlink_sb_port_pool_get(struct devlink_port *devlink_port, 845 unsigned int sb_index, u16 pool_index, 846 u32 *p_threshold) 847 { 848 struct mlxsw_core *mlxsw_core = devlink_priv(devlink_port->devlink); 849 struct mlxsw_driver *mlxsw_driver = mlxsw_core->driver; 850 struct mlxsw_core_port *mlxsw_core_port = __dl_port(devlink_port); 851 852 if (!mlxsw_driver->sb_port_pool_get || 853 !mlxsw_core_port_check(mlxsw_core_port)) 854 return -EOPNOTSUPP; 855 return mlxsw_driver->sb_port_pool_get(mlxsw_core_port, sb_index, 856 pool_index, p_threshold); 857 } 858 859 static int mlxsw_devlink_sb_port_pool_set(struct devlink_port *devlink_port, 860 unsigned int sb_index, u16 pool_index, 861 u32 threshold) 862 { 863 struct mlxsw_core *mlxsw_core = devlink_priv(devlink_port->devlink); 864 struct mlxsw_driver *mlxsw_driver = mlxsw_core->driver; 865 struct mlxsw_core_port *mlxsw_core_port = __dl_port(devlink_port); 866 867 if (!mlxsw_driver->sb_port_pool_set || 868 !mlxsw_core_port_check(mlxsw_core_port)) 869 return -EOPNOTSUPP; 870 return mlxsw_driver->sb_port_pool_set(mlxsw_core_port, sb_index, 871 pool_index, threshold); 872 } 873 874 static int 875 mlxsw_devlink_sb_tc_pool_bind_get(struct devlink_port *devlink_port, 876 unsigned int sb_index, u16 tc_index, 877 enum devlink_sb_pool_type pool_type, 878 u16 *p_pool_index, u32 *p_threshold) 879 { 880 struct mlxsw_core *mlxsw_core = devlink_priv(devlink_port->devlink); 881 struct mlxsw_driver *mlxsw_driver = mlxsw_core->driver; 882 struct mlxsw_core_port *mlxsw_core_port = __dl_port(devlink_port); 883 884 if (!mlxsw_driver->sb_tc_pool_bind_get || 885 !mlxsw_core_port_check(mlxsw_core_port)) 886 return -EOPNOTSUPP; 887 return mlxsw_driver->sb_tc_pool_bind_get(mlxsw_core_port, sb_index, 888 tc_index, pool_type, 889 p_pool_index, p_threshold); 890 } 891 892 static int 893 mlxsw_devlink_sb_tc_pool_bind_set(struct devlink_port *devlink_port, 894 unsigned int sb_index, u16 tc_index, 895 enum devlink_sb_pool_type pool_type, 896 u16 pool_index, u32 threshold) 897 { 898 struct mlxsw_core *mlxsw_core = devlink_priv(devlink_port->devlink); 899 struct mlxsw_driver *mlxsw_driver = mlxsw_core->driver; 900 struct mlxsw_core_port *mlxsw_core_port = __dl_port(devlink_port); 901 902 if (!mlxsw_driver->sb_tc_pool_bind_set || 903 !mlxsw_core_port_check(mlxsw_core_port)) 904 return -EOPNOTSUPP; 905 return mlxsw_driver->sb_tc_pool_bind_set(mlxsw_core_port, sb_index, 906 tc_index, pool_type, 907 pool_index, threshold); 908 } 909 910 static int mlxsw_devlink_sb_occ_snapshot(struct devlink *devlink, 911 unsigned int sb_index) 912 { 913 struct mlxsw_core *mlxsw_core = devlink_priv(devlink); 914 struct mlxsw_driver *mlxsw_driver = mlxsw_core->driver; 915 916 if (!mlxsw_driver->sb_occ_snapshot) 917 return -EOPNOTSUPP; 918 return mlxsw_driver->sb_occ_snapshot(mlxsw_core, sb_index); 919 } 920 921 static int mlxsw_devlink_sb_occ_max_clear(struct devlink *devlink, 922 unsigned int sb_index) 923 { 924 struct mlxsw_core *mlxsw_core = devlink_priv(devlink); 925 struct mlxsw_driver *mlxsw_driver = mlxsw_core->driver; 926 927 if (!mlxsw_driver->sb_occ_max_clear) 928 return -EOPNOTSUPP; 929 return mlxsw_driver->sb_occ_max_clear(mlxsw_core, sb_index); 930 } 931 932 static int 933 mlxsw_devlink_sb_occ_port_pool_get(struct devlink_port *devlink_port, 934 unsigned int sb_index, u16 pool_index, 935 u32 *p_cur, u32 *p_max) 936 { 937 struct mlxsw_core *mlxsw_core = devlink_priv(devlink_port->devlink); 938 struct mlxsw_driver *mlxsw_driver = mlxsw_core->driver; 939 struct mlxsw_core_port *mlxsw_core_port = __dl_port(devlink_port); 940 941 if (!mlxsw_driver->sb_occ_port_pool_get || 942 !mlxsw_core_port_check(mlxsw_core_port)) 943 return -EOPNOTSUPP; 944 return mlxsw_driver->sb_occ_port_pool_get(mlxsw_core_port, sb_index, 945 pool_index, p_cur, p_max); 946 } 947 948 static int 949 mlxsw_devlink_sb_occ_tc_port_bind_get(struct devlink_port *devlink_port, 950 unsigned int sb_index, u16 tc_index, 951 enum devlink_sb_pool_type pool_type, 952 u32 *p_cur, u32 *p_max) 953 { 954 struct mlxsw_core *mlxsw_core = devlink_priv(devlink_port->devlink); 955 struct mlxsw_driver *mlxsw_driver = mlxsw_core->driver; 956 struct mlxsw_core_port *mlxsw_core_port = __dl_port(devlink_port); 957 958 if (!mlxsw_driver->sb_occ_tc_port_bind_get || 959 !mlxsw_core_port_check(mlxsw_core_port)) 960 return -EOPNOTSUPP; 961 return mlxsw_driver->sb_occ_tc_port_bind_get(mlxsw_core_port, 962 sb_index, tc_index, 963 pool_type, p_cur, p_max); 964 } 965 966 static int mlxsw_devlink_core_bus_device_reload(struct devlink *devlink) 967 { 968 struct mlxsw_core *mlxsw_core = devlink_priv(devlink); 969 const struct mlxsw_bus *mlxsw_bus = mlxsw_core->bus; 970 int err; 971 972 if (!mlxsw_bus->reset) 973 return -EOPNOTSUPP; 974 975 mlxsw_core_bus_device_unregister(mlxsw_core, true); 976 mlxsw_bus->reset(mlxsw_core->bus_priv); 977 err = mlxsw_core_bus_device_register(mlxsw_core->bus_info, 978 mlxsw_core->bus, 979 mlxsw_core->bus_priv, true, 980 devlink); 981 if (err) 982 mlxsw_core->reload_fail = true; 983 return err; 984 } 985 986 static const struct devlink_ops mlxsw_devlink_ops = { 987 .reload = mlxsw_devlink_core_bus_device_reload, 988 .port_type_set = mlxsw_devlink_port_type_set, 989 .port_split = mlxsw_devlink_port_split, 990 .port_unsplit = mlxsw_devlink_port_unsplit, 991 .sb_pool_get = mlxsw_devlink_sb_pool_get, 992 .sb_pool_set = mlxsw_devlink_sb_pool_set, 993 .sb_port_pool_get = mlxsw_devlink_sb_port_pool_get, 994 .sb_port_pool_set = mlxsw_devlink_sb_port_pool_set, 995 .sb_tc_pool_bind_get = mlxsw_devlink_sb_tc_pool_bind_get, 996 .sb_tc_pool_bind_set = mlxsw_devlink_sb_tc_pool_bind_set, 997 .sb_occ_snapshot = mlxsw_devlink_sb_occ_snapshot, 998 .sb_occ_max_clear = mlxsw_devlink_sb_occ_max_clear, 999 .sb_occ_port_pool_get = mlxsw_devlink_sb_occ_port_pool_get, 1000 .sb_occ_tc_port_bind_get = mlxsw_devlink_sb_occ_tc_port_bind_get, 1001 }; 1002 1003 int mlxsw_core_bus_device_register(const struct mlxsw_bus_info *mlxsw_bus_info, 1004 const struct mlxsw_bus *mlxsw_bus, 1005 void *bus_priv, bool reload, 1006 struct devlink *devlink) 1007 { 1008 const char *device_kind = mlxsw_bus_info->device_kind; 1009 struct mlxsw_core *mlxsw_core; 1010 struct mlxsw_driver *mlxsw_driver; 1011 size_t alloc_size; 1012 int err; 1013 1014 mlxsw_driver = mlxsw_core_driver_get(device_kind); 1015 if (!mlxsw_driver) 1016 return -EINVAL; 1017 1018 if (!reload) { 1019 alloc_size = sizeof(*mlxsw_core) + mlxsw_driver->priv_size; 1020 devlink = devlink_alloc(&mlxsw_devlink_ops, alloc_size); 1021 if (!devlink) { 1022 err = -ENOMEM; 1023 goto err_devlink_alloc; 1024 } 1025 } 1026 1027 mlxsw_core = devlink_priv(devlink); 1028 INIT_LIST_HEAD(&mlxsw_core->rx_listener_list); 1029 INIT_LIST_HEAD(&mlxsw_core->event_listener_list); 1030 mlxsw_core->driver = mlxsw_driver; 1031 mlxsw_core->bus = mlxsw_bus; 1032 mlxsw_core->bus_priv = bus_priv; 1033 mlxsw_core->bus_info = mlxsw_bus_info; 1034 1035 err = mlxsw_bus->init(bus_priv, mlxsw_core, mlxsw_driver->profile, 1036 &mlxsw_core->res); 1037 if (err) 1038 goto err_bus_init; 1039 1040 if (mlxsw_driver->resources_register && !reload) { 1041 err = mlxsw_driver->resources_register(mlxsw_core); 1042 if (err) 1043 goto err_register_resources; 1044 } 1045 1046 err = mlxsw_ports_init(mlxsw_core); 1047 if (err) 1048 goto err_ports_init; 1049 1050 if (MLXSW_CORE_RES_VALID(mlxsw_core, MAX_LAG) && 1051 MLXSW_CORE_RES_VALID(mlxsw_core, MAX_LAG_MEMBERS)) { 1052 alloc_size = sizeof(u8) * 1053 MLXSW_CORE_RES_GET(mlxsw_core, MAX_LAG) * 1054 MLXSW_CORE_RES_GET(mlxsw_core, MAX_LAG_MEMBERS); 1055 mlxsw_core->lag.mapping = kzalloc(alloc_size, GFP_KERNEL); 1056 if (!mlxsw_core->lag.mapping) { 1057 err = -ENOMEM; 1058 goto err_alloc_lag_mapping; 1059 } 1060 } 1061 1062 err = mlxsw_emad_init(mlxsw_core); 1063 if (err) 1064 goto err_emad_init; 1065 1066 if (!reload) { 1067 err = devlink_register(devlink, mlxsw_bus_info->dev); 1068 if (err) 1069 goto err_devlink_register; 1070 } 1071 1072 err = mlxsw_hwmon_init(mlxsw_core, mlxsw_bus_info, &mlxsw_core->hwmon); 1073 if (err) 1074 goto err_hwmon_init; 1075 1076 err = mlxsw_thermal_init(mlxsw_core, mlxsw_bus_info, 1077 &mlxsw_core->thermal); 1078 if (err) 1079 goto err_thermal_init; 1080 1081 if (mlxsw_driver->init) { 1082 err = mlxsw_driver->init(mlxsw_core, mlxsw_bus_info); 1083 if (err) 1084 goto err_driver_init; 1085 } 1086 1087 return 0; 1088 1089 err_driver_init: 1090 mlxsw_thermal_fini(mlxsw_core->thermal); 1091 err_thermal_init: 1092 err_hwmon_init: 1093 if (!reload) 1094 devlink_unregister(devlink); 1095 err_devlink_register: 1096 mlxsw_emad_fini(mlxsw_core); 1097 err_emad_init: 1098 kfree(mlxsw_core->lag.mapping); 1099 err_alloc_lag_mapping: 1100 mlxsw_ports_fini(mlxsw_core); 1101 err_ports_init: 1102 mlxsw_bus->fini(bus_priv); 1103 err_bus_init: 1104 if (!reload) 1105 devlink_resources_unregister(devlink, NULL); 1106 err_register_resources: 1107 if (!reload) 1108 devlink_free(devlink); 1109 err_devlink_alloc: 1110 mlxsw_core_driver_put(device_kind); 1111 return err; 1112 } 1113 EXPORT_SYMBOL(mlxsw_core_bus_device_register); 1114 1115 void mlxsw_core_bus_device_unregister(struct mlxsw_core *mlxsw_core, 1116 bool reload) 1117 { 1118 const char *device_kind = mlxsw_core->bus_info->device_kind; 1119 struct devlink *devlink = priv_to_devlink(mlxsw_core); 1120 1121 if (mlxsw_core->reload_fail) 1122 goto reload_fail; 1123 1124 if (mlxsw_core->driver->fini) 1125 mlxsw_core->driver->fini(mlxsw_core); 1126 mlxsw_thermal_fini(mlxsw_core->thermal); 1127 if (!reload) 1128 devlink_unregister(devlink); 1129 mlxsw_emad_fini(mlxsw_core); 1130 kfree(mlxsw_core->lag.mapping); 1131 mlxsw_ports_fini(mlxsw_core); 1132 if (!reload) 1133 devlink_resources_unregister(devlink, NULL); 1134 mlxsw_core->bus->fini(mlxsw_core->bus_priv); 1135 if (reload) 1136 return; 1137 reload_fail: 1138 devlink_free(devlink); 1139 mlxsw_core_driver_put(device_kind); 1140 } 1141 EXPORT_SYMBOL(mlxsw_core_bus_device_unregister); 1142 1143 bool mlxsw_core_skb_transmit_busy(struct mlxsw_core *mlxsw_core, 1144 const struct mlxsw_tx_info *tx_info) 1145 { 1146 return mlxsw_core->bus->skb_transmit_busy(mlxsw_core->bus_priv, 1147 tx_info); 1148 } 1149 EXPORT_SYMBOL(mlxsw_core_skb_transmit_busy); 1150 1151 int mlxsw_core_skb_transmit(struct mlxsw_core *mlxsw_core, struct sk_buff *skb, 1152 const struct mlxsw_tx_info *tx_info) 1153 { 1154 return mlxsw_core->bus->skb_transmit(mlxsw_core->bus_priv, skb, 1155 tx_info); 1156 } 1157 EXPORT_SYMBOL(mlxsw_core_skb_transmit); 1158 1159 static bool __is_rx_listener_equal(const struct mlxsw_rx_listener *rxl_a, 1160 const struct mlxsw_rx_listener *rxl_b) 1161 { 1162 return (rxl_a->func == rxl_b->func && 1163 rxl_a->local_port == rxl_b->local_port && 1164 rxl_a->trap_id == rxl_b->trap_id); 1165 } 1166 1167 static struct mlxsw_rx_listener_item * 1168 __find_rx_listener_item(struct mlxsw_core *mlxsw_core, 1169 const struct mlxsw_rx_listener *rxl, 1170 void *priv) 1171 { 1172 struct mlxsw_rx_listener_item *rxl_item; 1173 1174 list_for_each_entry(rxl_item, &mlxsw_core->rx_listener_list, list) { 1175 if (__is_rx_listener_equal(&rxl_item->rxl, rxl) && 1176 rxl_item->priv == priv) 1177 return rxl_item; 1178 } 1179 return NULL; 1180 } 1181 1182 int mlxsw_core_rx_listener_register(struct mlxsw_core *mlxsw_core, 1183 const struct mlxsw_rx_listener *rxl, 1184 void *priv) 1185 { 1186 struct mlxsw_rx_listener_item *rxl_item; 1187 1188 rxl_item = __find_rx_listener_item(mlxsw_core, rxl, priv); 1189 if (rxl_item) 1190 return -EEXIST; 1191 rxl_item = kmalloc(sizeof(*rxl_item), GFP_KERNEL); 1192 if (!rxl_item) 1193 return -ENOMEM; 1194 rxl_item->rxl = *rxl; 1195 rxl_item->priv = priv; 1196 1197 list_add_rcu(&rxl_item->list, &mlxsw_core->rx_listener_list); 1198 return 0; 1199 } 1200 EXPORT_SYMBOL(mlxsw_core_rx_listener_register); 1201 1202 void mlxsw_core_rx_listener_unregister(struct mlxsw_core *mlxsw_core, 1203 const struct mlxsw_rx_listener *rxl, 1204 void *priv) 1205 { 1206 struct mlxsw_rx_listener_item *rxl_item; 1207 1208 rxl_item = __find_rx_listener_item(mlxsw_core, rxl, priv); 1209 if (!rxl_item) 1210 return; 1211 list_del_rcu(&rxl_item->list); 1212 synchronize_rcu(); 1213 kfree(rxl_item); 1214 } 1215 EXPORT_SYMBOL(mlxsw_core_rx_listener_unregister); 1216 1217 static void mlxsw_core_event_listener_func(struct sk_buff *skb, u8 local_port, 1218 void *priv) 1219 { 1220 struct mlxsw_event_listener_item *event_listener_item = priv; 1221 struct mlxsw_reg_info reg; 1222 char *payload; 1223 char *op_tlv = mlxsw_emad_op_tlv(skb); 1224 char *reg_tlv = mlxsw_emad_reg_tlv(skb); 1225 1226 reg.id = mlxsw_emad_op_tlv_register_id_get(op_tlv); 1227 reg.len = (mlxsw_emad_reg_tlv_len_get(reg_tlv) - 1) * sizeof(u32); 1228 payload = mlxsw_emad_reg_payload(op_tlv); 1229 event_listener_item->el.func(®, payload, event_listener_item->priv); 1230 dev_kfree_skb(skb); 1231 } 1232 1233 static bool __is_event_listener_equal(const struct mlxsw_event_listener *el_a, 1234 const struct mlxsw_event_listener *el_b) 1235 { 1236 return (el_a->func == el_b->func && 1237 el_a->trap_id == el_b->trap_id); 1238 } 1239 1240 static struct mlxsw_event_listener_item * 1241 __find_event_listener_item(struct mlxsw_core *mlxsw_core, 1242 const struct mlxsw_event_listener *el, 1243 void *priv) 1244 { 1245 struct mlxsw_event_listener_item *el_item; 1246 1247 list_for_each_entry(el_item, &mlxsw_core->event_listener_list, list) { 1248 if (__is_event_listener_equal(&el_item->el, el) && 1249 el_item->priv == priv) 1250 return el_item; 1251 } 1252 return NULL; 1253 } 1254 1255 int mlxsw_core_event_listener_register(struct mlxsw_core *mlxsw_core, 1256 const struct mlxsw_event_listener *el, 1257 void *priv) 1258 { 1259 int err; 1260 struct mlxsw_event_listener_item *el_item; 1261 const struct mlxsw_rx_listener rxl = { 1262 .func = mlxsw_core_event_listener_func, 1263 .local_port = MLXSW_PORT_DONT_CARE, 1264 .trap_id = el->trap_id, 1265 }; 1266 1267 el_item = __find_event_listener_item(mlxsw_core, el, priv); 1268 if (el_item) 1269 return -EEXIST; 1270 el_item = kmalloc(sizeof(*el_item), GFP_KERNEL); 1271 if (!el_item) 1272 return -ENOMEM; 1273 el_item->el = *el; 1274 el_item->priv = priv; 1275 1276 err = mlxsw_core_rx_listener_register(mlxsw_core, &rxl, el_item); 1277 if (err) 1278 goto err_rx_listener_register; 1279 1280 /* No reason to save item if we did not manage to register an RX 1281 * listener for it. 1282 */ 1283 list_add_rcu(&el_item->list, &mlxsw_core->event_listener_list); 1284 1285 return 0; 1286 1287 err_rx_listener_register: 1288 kfree(el_item); 1289 return err; 1290 } 1291 EXPORT_SYMBOL(mlxsw_core_event_listener_register); 1292 1293 void mlxsw_core_event_listener_unregister(struct mlxsw_core *mlxsw_core, 1294 const struct mlxsw_event_listener *el, 1295 void *priv) 1296 { 1297 struct mlxsw_event_listener_item *el_item; 1298 const struct mlxsw_rx_listener rxl = { 1299 .func = mlxsw_core_event_listener_func, 1300 .local_port = MLXSW_PORT_DONT_CARE, 1301 .trap_id = el->trap_id, 1302 }; 1303 1304 el_item = __find_event_listener_item(mlxsw_core, el, priv); 1305 if (!el_item) 1306 return; 1307 mlxsw_core_rx_listener_unregister(mlxsw_core, &rxl, el_item); 1308 list_del(&el_item->list); 1309 kfree(el_item); 1310 } 1311 EXPORT_SYMBOL(mlxsw_core_event_listener_unregister); 1312 1313 static int mlxsw_core_listener_register(struct mlxsw_core *mlxsw_core, 1314 const struct mlxsw_listener *listener, 1315 void *priv) 1316 { 1317 if (listener->is_event) 1318 return mlxsw_core_event_listener_register(mlxsw_core, 1319 &listener->u.event_listener, 1320 priv); 1321 else 1322 return mlxsw_core_rx_listener_register(mlxsw_core, 1323 &listener->u.rx_listener, 1324 priv); 1325 } 1326 1327 static void mlxsw_core_listener_unregister(struct mlxsw_core *mlxsw_core, 1328 const struct mlxsw_listener *listener, 1329 void *priv) 1330 { 1331 if (listener->is_event) 1332 mlxsw_core_event_listener_unregister(mlxsw_core, 1333 &listener->u.event_listener, 1334 priv); 1335 else 1336 mlxsw_core_rx_listener_unregister(mlxsw_core, 1337 &listener->u.rx_listener, 1338 priv); 1339 } 1340 1341 int mlxsw_core_trap_register(struct mlxsw_core *mlxsw_core, 1342 const struct mlxsw_listener *listener, void *priv) 1343 { 1344 char hpkt_pl[MLXSW_REG_HPKT_LEN]; 1345 int err; 1346 1347 err = mlxsw_core_listener_register(mlxsw_core, listener, priv); 1348 if (err) 1349 return err; 1350 1351 mlxsw_reg_hpkt_pack(hpkt_pl, listener->action, listener->trap_id, 1352 listener->trap_group, listener->is_ctrl); 1353 err = mlxsw_reg_write(mlxsw_core, MLXSW_REG(hpkt), hpkt_pl); 1354 if (err) 1355 goto err_trap_set; 1356 1357 return 0; 1358 1359 err_trap_set: 1360 mlxsw_core_listener_unregister(mlxsw_core, listener, priv); 1361 return err; 1362 } 1363 EXPORT_SYMBOL(mlxsw_core_trap_register); 1364 1365 void mlxsw_core_trap_unregister(struct mlxsw_core *mlxsw_core, 1366 const struct mlxsw_listener *listener, 1367 void *priv) 1368 { 1369 char hpkt_pl[MLXSW_REG_HPKT_LEN]; 1370 1371 if (!listener->is_event) { 1372 mlxsw_reg_hpkt_pack(hpkt_pl, listener->unreg_action, 1373 listener->trap_id, listener->trap_group, 1374 listener->is_ctrl); 1375 mlxsw_reg_write(mlxsw_core, MLXSW_REG(hpkt), hpkt_pl); 1376 } 1377 1378 mlxsw_core_listener_unregister(mlxsw_core, listener, priv); 1379 } 1380 EXPORT_SYMBOL(mlxsw_core_trap_unregister); 1381 1382 static u64 mlxsw_core_tid_get(struct mlxsw_core *mlxsw_core) 1383 { 1384 return atomic64_inc_return(&mlxsw_core->emad.tid); 1385 } 1386 1387 static int mlxsw_core_reg_access_emad(struct mlxsw_core *mlxsw_core, 1388 const struct mlxsw_reg_info *reg, 1389 char *payload, 1390 enum mlxsw_core_reg_access_type type, 1391 struct list_head *bulk_list, 1392 mlxsw_reg_trans_cb_t *cb, 1393 unsigned long cb_priv) 1394 { 1395 u64 tid = mlxsw_core_tid_get(mlxsw_core); 1396 struct mlxsw_reg_trans *trans; 1397 int err; 1398 1399 trans = kzalloc(sizeof(*trans), GFP_KERNEL); 1400 if (!trans) 1401 return -ENOMEM; 1402 1403 err = mlxsw_emad_reg_access(mlxsw_core, reg, payload, type, trans, 1404 bulk_list, cb, cb_priv, tid); 1405 if (err) { 1406 kfree(trans); 1407 return err; 1408 } 1409 return 0; 1410 } 1411 1412 int mlxsw_reg_trans_query(struct mlxsw_core *mlxsw_core, 1413 const struct mlxsw_reg_info *reg, char *payload, 1414 struct list_head *bulk_list, 1415 mlxsw_reg_trans_cb_t *cb, unsigned long cb_priv) 1416 { 1417 return mlxsw_core_reg_access_emad(mlxsw_core, reg, payload, 1418 MLXSW_CORE_REG_ACCESS_TYPE_QUERY, 1419 bulk_list, cb, cb_priv); 1420 } 1421 EXPORT_SYMBOL(mlxsw_reg_trans_query); 1422 1423 int mlxsw_reg_trans_write(struct mlxsw_core *mlxsw_core, 1424 const struct mlxsw_reg_info *reg, char *payload, 1425 struct list_head *bulk_list, 1426 mlxsw_reg_trans_cb_t *cb, unsigned long cb_priv) 1427 { 1428 return mlxsw_core_reg_access_emad(mlxsw_core, reg, payload, 1429 MLXSW_CORE_REG_ACCESS_TYPE_WRITE, 1430 bulk_list, cb, cb_priv); 1431 } 1432 EXPORT_SYMBOL(mlxsw_reg_trans_write); 1433 1434 static int mlxsw_reg_trans_wait(struct mlxsw_reg_trans *trans) 1435 { 1436 struct mlxsw_core *mlxsw_core = trans->core; 1437 int err; 1438 1439 wait_for_completion(&trans->completion); 1440 cancel_delayed_work_sync(&trans->timeout_dw); 1441 err = trans->err; 1442 1443 if (trans->retries) 1444 dev_warn(mlxsw_core->bus_info->dev, "EMAD retries (%d/%d) (tid=%llx)\n", 1445 trans->retries, MLXSW_EMAD_MAX_RETRY, trans->tid); 1446 if (err) 1447 dev_err(mlxsw_core->bus_info->dev, "EMAD reg access failed (tid=%llx,reg_id=%x(%s),type=%s,status=%x(%s))\n", 1448 trans->tid, trans->reg->id, 1449 mlxsw_reg_id_str(trans->reg->id), 1450 mlxsw_core_reg_access_type_str(trans->type), 1451 trans->emad_status, 1452 mlxsw_emad_op_tlv_status_str(trans->emad_status)); 1453 1454 list_del(&trans->bulk_list); 1455 kfree_rcu(trans, rcu); 1456 return err; 1457 } 1458 1459 int mlxsw_reg_trans_bulk_wait(struct list_head *bulk_list) 1460 { 1461 struct mlxsw_reg_trans *trans; 1462 struct mlxsw_reg_trans *tmp; 1463 int sum_err = 0; 1464 int err; 1465 1466 list_for_each_entry_safe(trans, tmp, bulk_list, bulk_list) { 1467 err = mlxsw_reg_trans_wait(trans); 1468 if (err && sum_err == 0) 1469 sum_err = err; /* first error to be returned */ 1470 } 1471 return sum_err; 1472 } 1473 EXPORT_SYMBOL(mlxsw_reg_trans_bulk_wait); 1474 1475 static int mlxsw_core_reg_access_cmd(struct mlxsw_core *mlxsw_core, 1476 const struct mlxsw_reg_info *reg, 1477 char *payload, 1478 enum mlxsw_core_reg_access_type type) 1479 { 1480 enum mlxsw_emad_op_tlv_status status; 1481 int err, n_retry; 1482 char *in_mbox, *out_mbox, *tmp; 1483 1484 dev_dbg(mlxsw_core->bus_info->dev, "Reg cmd access (reg_id=%x(%s),type=%s)\n", 1485 reg->id, mlxsw_reg_id_str(reg->id), 1486 mlxsw_core_reg_access_type_str(type)); 1487 1488 in_mbox = mlxsw_cmd_mbox_alloc(); 1489 if (!in_mbox) 1490 return -ENOMEM; 1491 1492 out_mbox = mlxsw_cmd_mbox_alloc(); 1493 if (!out_mbox) { 1494 err = -ENOMEM; 1495 goto free_in_mbox; 1496 } 1497 1498 mlxsw_emad_pack_op_tlv(in_mbox, reg, type, 1499 mlxsw_core_tid_get(mlxsw_core)); 1500 tmp = in_mbox + MLXSW_EMAD_OP_TLV_LEN * sizeof(u32); 1501 mlxsw_emad_pack_reg_tlv(tmp, reg, payload); 1502 1503 n_retry = 0; 1504 retry: 1505 err = mlxsw_cmd_access_reg(mlxsw_core, in_mbox, out_mbox); 1506 if (!err) { 1507 err = mlxsw_emad_process_status(out_mbox, &status); 1508 if (err) { 1509 if (err == -EAGAIN && n_retry++ < MLXSW_EMAD_MAX_RETRY) 1510 goto retry; 1511 dev_err(mlxsw_core->bus_info->dev, "Reg cmd access status failed (status=%x(%s))\n", 1512 status, mlxsw_emad_op_tlv_status_str(status)); 1513 } 1514 } 1515 1516 if (!err) 1517 memcpy(payload, mlxsw_emad_reg_payload(out_mbox), 1518 reg->len); 1519 1520 mlxsw_cmd_mbox_free(out_mbox); 1521 free_in_mbox: 1522 mlxsw_cmd_mbox_free(in_mbox); 1523 if (err) 1524 dev_err(mlxsw_core->bus_info->dev, "Reg cmd access failed (reg_id=%x(%s),type=%s)\n", 1525 reg->id, mlxsw_reg_id_str(reg->id), 1526 mlxsw_core_reg_access_type_str(type)); 1527 return err; 1528 } 1529 1530 static void mlxsw_core_reg_access_cb(struct mlxsw_core *mlxsw_core, 1531 char *payload, size_t payload_len, 1532 unsigned long cb_priv) 1533 { 1534 char *orig_payload = (char *) cb_priv; 1535 1536 memcpy(orig_payload, payload, payload_len); 1537 } 1538 1539 static int mlxsw_core_reg_access(struct mlxsw_core *mlxsw_core, 1540 const struct mlxsw_reg_info *reg, 1541 char *payload, 1542 enum mlxsw_core_reg_access_type type) 1543 { 1544 LIST_HEAD(bulk_list); 1545 int err; 1546 1547 /* During initialization EMAD interface is not available to us, 1548 * so we default to command interface. We switch to EMAD interface 1549 * after setting the appropriate traps. 1550 */ 1551 if (!mlxsw_core->emad.use_emad) 1552 return mlxsw_core_reg_access_cmd(mlxsw_core, reg, 1553 payload, type); 1554 1555 err = mlxsw_core_reg_access_emad(mlxsw_core, reg, 1556 payload, type, &bulk_list, 1557 mlxsw_core_reg_access_cb, 1558 (unsigned long) payload); 1559 if (err) 1560 return err; 1561 return mlxsw_reg_trans_bulk_wait(&bulk_list); 1562 } 1563 1564 int mlxsw_reg_query(struct mlxsw_core *mlxsw_core, 1565 const struct mlxsw_reg_info *reg, char *payload) 1566 { 1567 return mlxsw_core_reg_access(mlxsw_core, reg, payload, 1568 MLXSW_CORE_REG_ACCESS_TYPE_QUERY); 1569 } 1570 EXPORT_SYMBOL(mlxsw_reg_query); 1571 1572 int mlxsw_reg_write(struct mlxsw_core *mlxsw_core, 1573 const struct mlxsw_reg_info *reg, char *payload) 1574 { 1575 return mlxsw_core_reg_access(mlxsw_core, reg, payload, 1576 MLXSW_CORE_REG_ACCESS_TYPE_WRITE); 1577 } 1578 EXPORT_SYMBOL(mlxsw_reg_write); 1579 1580 void mlxsw_core_skb_receive(struct mlxsw_core *mlxsw_core, struct sk_buff *skb, 1581 struct mlxsw_rx_info *rx_info) 1582 { 1583 struct mlxsw_rx_listener_item *rxl_item; 1584 const struct mlxsw_rx_listener *rxl; 1585 u8 local_port; 1586 bool found = false; 1587 1588 if (rx_info->is_lag) { 1589 dev_dbg_ratelimited(mlxsw_core->bus_info->dev, "%s: lag_id = %d, lag_port_index = 0x%x\n", 1590 __func__, rx_info->u.lag_id, 1591 rx_info->trap_id); 1592 /* Upper layer does not care if the skb came from LAG or not, 1593 * so just get the local_port for the lag port and push it up. 1594 */ 1595 local_port = mlxsw_core_lag_mapping_get(mlxsw_core, 1596 rx_info->u.lag_id, 1597 rx_info->lag_port_index); 1598 } else { 1599 local_port = rx_info->u.sys_port; 1600 } 1601 1602 dev_dbg_ratelimited(mlxsw_core->bus_info->dev, "%s: local_port = %d, trap_id = 0x%x\n", 1603 __func__, local_port, rx_info->trap_id); 1604 1605 if ((rx_info->trap_id >= MLXSW_TRAP_ID_MAX) || 1606 (local_port >= mlxsw_core->max_ports)) 1607 goto drop; 1608 1609 rcu_read_lock(); 1610 list_for_each_entry_rcu(rxl_item, &mlxsw_core->rx_listener_list, list) { 1611 rxl = &rxl_item->rxl; 1612 if ((rxl->local_port == MLXSW_PORT_DONT_CARE || 1613 rxl->local_port == local_port) && 1614 rxl->trap_id == rx_info->trap_id) { 1615 found = true; 1616 break; 1617 } 1618 } 1619 rcu_read_unlock(); 1620 if (!found) 1621 goto drop; 1622 1623 rxl->func(skb, local_port, rxl_item->priv); 1624 return; 1625 1626 drop: 1627 dev_kfree_skb(skb); 1628 } 1629 EXPORT_SYMBOL(mlxsw_core_skb_receive); 1630 1631 static int mlxsw_core_lag_mapping_index(struct mlxsw_core *mlxsw_core, 1632 u16 lag_id, u8 port_index) 1633 { 1634 return MLXSW_CORE_RES_GET(mlxsw_core, MAX_LAG_MEMBERS) * lag_id + 1635 port_index; 1636 } 1637 1638 void mlxsw_core_lag_mapping_set(struct mlxsw_core *mlxsw_core, 1639 u16 lag_id, u8 port_index, u8 local_port) 1640 { 1641 int index = mlxsw_core_lag_mapping_index(mlxsw_core, 1642 lag_id, port_index); 1643 1644 mlxsw_core->lag.mapping[index] = local_port; 1645 } 1646 EXPORT_SYMBOL(mlxsw_core_lag_mapping_set); 1647 1648 u8 mlxsw_core_lag_mapping_get(struct mlxsw_core *mlxsw_core, 1649 u16 lag_id, u8 port_index) 1650 { 1651 int index = mlxsw_core_lag_mapping_index(mlxsw_core, 1652 lag_id, port_index); 1653 1654 return mlxsw_core->lag.mapping[index]; 1655 } 1656 EXPORT_SYMBOL(mlxsw_core_lag_mapping_get); 1657 1658 void mlxsw_core_lag_mapping_clear(struct mlxsw_core *mlxsw_core, 1659 u16 lag_id, u8 local_port) 1660 { 1661 int i; 1662 1663 for (i = 0; i < MLXSW_CORE_RES_GET(mlxsw_core, MAX_LAG_MEMBERS); i++) { 1664 int index = mlxsw_core_lag_mapping_index(mlxsw_core, 1665 lag_id, i); 1666 1667 if (mlxsw_core->lag.mapping[index] == local_port) 1668 mlxsw_core->lag.mapping[index] = 0; 1669 } 1670 } 1671 EXPORT_SYMBOL(mlxsw_core_lag_mapping_clear); 1672 1673 bool mlxsw_core_res_valid(struct mlxsw_core *mlxsw_core, 1674 enum mlxsw_res_id res_id) 1675 { 1676 return mlxsw_res_valid(&mlxsw_core->res, res_id); 1677 } 1678 EXPORT_SYMBOL(mlxsw_core_res_valid); 1679 1680 u64 mlxsw_core_res_get(struct mlxsw_core *mlxsw_core, 1681 enum mlxsw_res_id res_id) 1682 { 1683 return mlxsw_res_get(&mlxsw_core->res, res_id); 1684 } 1685 EXPORT_SYMBOL(mlxsw_core_res_get); 1686 1687 int mlxsw_core_port_init(struct mlxsw_core *mlxsw_core, u8 local_port) 1688 { 1689 struct devlink *devlink = priv_to_devlink(mlxsw_core); 1690 struct mlxsw_core_port *mlxsw_core_port = 1691 &mlxsw_core->ports[local_port]; 1692 struct devlink_port *devlink_port = &mlxsw_core_port->devlink_port; 1693 int err; 1694 1695 mlxsw_core_port->local_port = local_port; 1696 err = devlink_port_register(devlink, devlink_port, local_port); 1697 if (err) 1698 memset(mlxsw_core_port, 0, sizeof(*mlxsw_core_port)); 1699 return err; 1700 } 1701 EXPORT_SYMBOL(mlxsw_core_port_init); 1702 1703 void mlxsw_core_port_fini(struct mlxsw_core *mlxsw_core, u8 local_port) 1704 { 1705 struct mlxsw_core_port *mlxsw_core_port = 1706 &mlxsw_core->ports[local_port]; 1707 struct devlink_port *devlink_port = &mlxsw_core_port->devlink_port; 1708 1709 devlink_port_unregister(devlink_port); 1710 memset(mlxsw_core_port, 0, sizeof(*mlxsw_core_port)); 1711 } 1712 EXPORT_SYMBOL(mlxsw_core_port_fini); 1713 1714 void mlxsw_core_port_eth_set(struct mlxsw_core *mlxsw_core, u8 local_port, 1715 void *port_driver_priv, struct net_device *dev, 1716 bool split, u32 split_group) 1717 { 1718 struct mlxsw_core_port *mlxsw_core_port = 1719 &mlxsw_core->ports[local_port]; 1720 struct devlink_port *devlink_port = &mlxsw_core_port->devlink_port; 1721 1722 mlxsw_core_port->port_driver_priv = port_driver_priv; 1723 if (split) 1724 devlink_port_split_set(devlink_port, split_group); 1725 devlink_port_type_eth_set(devlink_port, dev); 1726 } 1727 EXPORT_SYMBOL(mlxsw_core_port_eth_set); 1728 1729 void mlxsw_core_port_ib_set(struct mlxsw_core *mlxsw_core, u8 local_port, 1730 void *port_driver_priv) 1731 { 1732 struct mlxsw_core_port *mlxsw_core_port = 1733 &mlxsw_core->ports[local_port]; 1734 struct devlink_port *devlink_port = &mlxsw_core_port->devlink_port; 1735 1736 mlxsw_core_port->port_driver_priv = port_driver_priv; 1737 devlink_port_type_ib_set(devlink_port, NULL); 1738 } 1739 EXPORT_SYMBOL(mlxsw_core_port_ib_set); 1740 1741 void mlxsw_core_port_clear(struct mlxsw_core *mlxsw_core, u8 local_port, 1742 void *port_driver_priv) 1743 { 1744 struct mlxsw_core_port *mlxsw_core_port = 1745 &mlxsw_core->ports[local_port]; 1746 struct devlink_port *devlink_port = &mlxsw_core_port->devlink_port; 1747 1748 mlxsw_core_port->port_driver_priv = port_driver_priv; 1749 devlink_port_type_clear(devlink_port); 1750 } 1751 EXPORT_SYMBOL(mlxsw_core_port_clear); 1752 1753 enum devlink_port_type mlxsw_core_port_type_get(struct mlxsw_core *mlxsw_core, 1754 u8 local_port) 1755 { 1756 struct mlxsw_core_port *mlxsw_core_port = 1757 &mlxsw_core->ports[local_port]; 1758 struct devlink_port *devlink_port = &mlxsw_core_port->devlink_port; 1759 1760 return devlink_port->type; 1761 } 1762 EXPORT_SYMBOL(mlxsw_core_port_type_get); 1763 1764 static void mlxsw_core_buf_dump_dbg(struct mlxsw_core *mlxsw_core, 1765 const char *buf, size_t size) 1766 { 1767 __be32 *m = (__be32 *) buf; 1768 int i; 1769 int count = size / sizeof(__be32); 1770 1771 for (i = count - 1; i >= 0; i--) 1772 if (m[i]) 1773 break; 1774 i++; 1775 count = i ? i : 1; 1776 for (i = 0; i < count; i += 4) 1777 dev_dbg(mlxsw_core->bus_info->dev, "%04x - %08x %08x %08x %08x\n", 1778 i * 4, be32_to_cpu(m[i]), be32_to_cpu(m[i + 1]), 1779 be32_to_cpu(m[i + 2]), be32_to_cpu(m[i + 3])); 1780 } 1781 1782 int mlxsw_cmd_exec(struct mlxsw_core *mlxsw_core, u16 opcode, u8 opcode_mod, 1783 u32 in_mod, bool out_mbox_direct, 1784 char *in_mbox, size_t in_mbox_size, 1785 char *out_mbox, size_t out_mbox_size) 1786 { 1787 u8 status; 1788 int err; 1789 1790 BUG_ON(in_mbox_size % sizeof(u32) || out_mbox_size % sizeof(u32)); 1791 if (!mlxsw_core->bus->cmd_exec) 1792 return -EOPNOTSUPP; 1793 1794 dev_dbg(mlxsw_core->bus_info->dev, "Cmd exec (opcode=%x(%s),opcode_mod=%x,in_mod=%x)\n", 1795 opcode, mlxsw_cmd_opcode_str(opcode), opcode_mod, in_mod); 1796 if (in_mbox) { 1797 dev_dbg(mlxsw_core->bus_info->dev, "Input mailbox:\n"); 1798 mlxsw_core_buf_dump_dbg(mlxsw_core, in_mbox, in_mbox_size); 1799 } 1800 1801 err = mlxsw_core->bus->cmd_exec(mlxsw_core->bus_priv, opcode, 1802 opcode_mod, in_mod, out_mbox_direct, 1803 in_mbox, in_mbox_size, 1804 out_mbox, out_mbox_size, &status); 1805 1806 if (err == -EIO && status != MLXSW_CMD_STATUS_OK) { 1807 dev_err(mlxsw_core->bus_info->dev, "Cmd exec failed (opcode=%x(%s),opcode_mod=%x,in_mod=%x,status=%x(%s))\n", 1808 opcode, mlxsw_cmd_opcode_str(opcode), opcode_mod, 1809 in_mod, status, mlxsw_cmd_status_str(status)); 1810 } else if (err == -ETIMEDOUT) { 1811 dev_err(mlxsw_core->bus_info->dev, "Cmd exec timed-out (opcode=%x(%s),opcode_mod=%x,in_mod=%x)\n", 1812 opcode, mlxsw_cmd_opcode_str(opcode), opcode_mod, 1813 in_mod); 1814 } 1815 1816 if (!err && out_mbox) { 1817 dev_dbg(mlxsw_core->bus_info->dev, "Output mailbox:\n"); 1818 mlxsw_core_buf_dump_dbg(mlxsw_core, out_mbox, out_mbox_size); 1819 } 1820 return err; 1821 } 1822 EXPORT_SYMBOL(mlxsw_cmd_exec); 1823 1824 int mlxsw_core_schedule_dw(struct delayed_work *dwork, unsigned long delay) 1825 { 1826 return queue_delayed_work(mlxsw_wq, dwork, delay); 1827 } 1828 EXPORT_SYMBOL(mlxsw_core_schedule_dw); 1829 1830 bool mlxsw_core_schedule_work(struct work_struct *work) 1831 { 1832 return queue_work(mlxsw_owq, work); 1833 } 1834 EXPORT_SYMBOL(mlxsw_core_schedule_work); 1835 1836 void mlxsw_core_flush_owq(void) 1837 { 1838 flush_workqueue(mlxsw_owq); 1839 } 1840 EXPORT_SYMBOL(mlxsw_core_flush_owq); 1841 1842 int mlxsw_core_kvd_sizes_get(struct mlxsw_core *mlxsw_core, 1843 const struct mlxsw_config_profile *profile, 1844 u64 *p_single_size, u64 *p_double_size, 1845 u64 *p_linear_size) 1846 { 1847 struct mlxsw_driver *driver = mlxsw_core->driver; 1848 1849 if (!driver->kvd_sizes_get) 1850 return -EINVAL; 1851 1852 return driver->kvd_sizes_get(mlxsw_core, profile, 1853 p_single_size, p_double_size, 1854 p_linear_size); 1855 } 1856 EXPORT_SYMBOL(mlxsw_core_kvd_sizes_get); 1857 1858 static int __init mlxsw_core_module_init(void) 1859 { 1860 int err; 1861 1862 mlxsw_wq = alloc_workqueue(mlxsw_core_driver_name, WQ_MEM_RECLAIM, 0); 1863 if (!mlxsw_wq) 1864 return -ENOMEM; 1865 mlxsw_owq = alloc_ordered_workqueue("%s_ordered", WQ_MEM_RECLAIM, 1866 mlxsw_core_driver_name); 1867 if (!mlxsw_owq) { 1868 err = -ENOMEM; 1869 goto err_alloc_ordered_workqueue; 1870 } 1871 return 0; 1872 1873 err_alloc_ordered_workqueue: 1874 destroy_workqueue(mlxsw_wq); 1875 return err; 1876 } 1877 1878 static void __exit mlxsw_core_module_exit(void) 1879 { 1880 destroy_workqueue(mlxsw_owq); 1881 destroy_workqueue(mlxsw_wq); 1882 } 1883 1884 module_init(mlxsw_core_module_init); 1885 module_exit(mlxsw_core_module_exit); 1886 1887 MODULE_LICENSE("Dual BSD/GPL"); 1888 MODULE_AUTHOR("Jiri Pirko <jiri@mellanox.com>"); 1889 MODULE_DESCRIPTION("Mellanox switch device core driver"); 1890