1 /*
2  * drivers/net/ethernet/mellanox/mlxsw/core.c
3  * Copyright (c) 2015 Mellanox Technologies. All rights reserved.
4  * Copyright (c) 2015 Jiri Pirko <jiri@mellanox.com>
5  * Copyright (c) 2015 Ido Schimmel <idosch@mellanox.com>
6  * Copyright (c) 2015 Elad Raz <eladr@mellanox.com>
7  *
8  * Redistribution and use in source and binary forms, with or without
9  * modification, are permitted provided that the following conditions are met:
10  *
11  * 1. Redistributions of source code must retain the above copyright
12  *    notice, this list of conditions and the following disclaimer.
13  * 2. Redistributions in binary form must reproduce the above copyright
14  *    notice, this list of conditions and the following disclaimer in the
15  *    documentation and/or other materials provided with the distribution.
16  * 3. Neither the names of the copyright holders nor the names of its
17  *    contributors may be used to endorse or promote products derived from
18  *    this software without specific prior written permission.
19  *
20  * Alternatively, this software may be distributed under the terms of the
21  * GNU General Public License ("GPL") version 2 as published by the Free
22  * Software Foundation.
23  *
24  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
25  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
26  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
27  * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
28  * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
29  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
30  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
31  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
32  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
33  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
34  * POSSIBILITY OF SUCH DAMAGE.
35  */
36 
37 #include <linux/kernel.h>
38 #include <linux/module.h>
39 #include <linux/device.h>
40 #include <linux/export.h>
41 #include <linux/err.h>
42 #include <linux/if_link.h>
43 #include <linux/netdevice.h>
44 #include <linux/completion.h>
45 #include <linux/skbuff.h>
46 #include <linux/etherdevice.h>
47 #include <linux/types.h>
48 #include <linux/string.h>
49 #include <linux/gfp.h>
50 #include <linux/random.h>
51 #include <linux/jiffies.h>
52 #include <linux/mutex.h>
53 #include <linux/rcupdate.h>
54 #include <linux/slab.h>
55 #include <linux/workqueue.h>
56 #include <asm/byteorder.h>
57 #include <net/devlink.h>
58 #include <trace/events/devlink.h>
59 
60 #include "core.h"
61 #include "item.h"
62 #include "cmd.h"
63 #include "port.h"
64 #include "trap.h"
65 #include "emad.h"
66 #include "reg.h"
67 #include "resources.h"
68 
69 static LIST_HEAD(mlxsw_core_driver_list);
70 static DEFINE_SPINLOCK(mlxsw_core_driver_list_lock);
71 
72 static const char mlxsw_core_driver_name[] = "mlxsw_core";
73 
74 static struct workqueue_struct *mlxsw_wq;
75 static struct workqueue_struct *mlxsw_owq;
76 
77 struct mlxsw_core_port {
78 	struct devlink_port devlink_port;
79 	void *port_driver_priv;
80 	u8 local_port;
81 };
82 
83 void *mlxsw_core_port_driver_priv(struct mlxsw_core_port *mlxsw_core_port)
84 {
85 	return mlxsw_core_port->port_driver_priv;
86 }
87 EXPORT_SYMBOL(mlxsw_core_port_driver_priv);
88 
89 static bool mlxsw_core_port_check(struct mlxsw_core_port *mlxsw_core_port)
90 {
91 	return mlxsw_core_port->port_driver_priv != NULL;
92 }
93 
94 struct mlxsw_core {
95 	struct mlxsw_driver *driver;
96 	const struct mlxsw_bus *bus;
97 	void *bus_priv;
98 	const struct mlxsw_bus_info *bus_info;
99 	struct workqueue_struct *emad_wq;
100 	struct list_head rx_listener_list;
101 	struct list_head event_listener_list;
102 	struct {
103 		atomic64_t tid;
104 		struct list_head trans_list;
105 		spinlock_t trans_list_lock; /* protects trans_list writes */
106 		bool use_emad;
107 	} emad;
108 	struct {
109 		u8 *mapping; /* lag_id+port_index to local_port mapping */
110 	} lag;
111 	struct mlxsw_res res;
112 	struct mlxsw_hwmon *hwmon;
113 	struct mlxsw_thermal *thermal;
114 	struct mlxsw_core_port *ports;
115 	unsigned int max_ports;
116 	bool reload_fail;
117 	unsigned long driver_priv[0];
118 	/* driver_priv has to be always the last item */
119 };
120 
121 #define MLXSW_PORT_MAX_PORTS_DEFAULT	0x40
122 
123 static int mlxsw_ports_init(struct mlxsw_core *mlxsw_core)
124 {
125 	/* Switch ports are numbered from 1 to queried value */
126 	if (MLXSW_CORE_RES_VALID(mlxsw_core, MAX_SYSTEM_PORT))
127 		mlxsw_core->max_ports = MLXSW_CORE_RES_GET(mlxsw_core,
128 							   MAX_SYSTEM_PORT) + 1;
129 	else
130 		mlxsw_core->max_ports = MLXSW_PORT_MAX_PORTS_DEFAULT + 1;
131 
132 	mlxsw_core->ports = kcalloc(mlxsw_core->max_ports,
133 				    sizeof(struct mlxsw_core_port), GFP_KERNEL);
134 	if (!mlxsw_core->ports)
135 		return -ENOMEM;
136 
137 	return 0;
138 }
139 
140 static void mlxsw_ports_fini(struct mlxsw_core *mlxsw_core)
141 {
142 	kfree(mlxsw_core->ports);
143 }
144 
145 unsigned int mlxsw_core_max_ports(const struct mlxsw_core *mlxsw_core)
146 {
147 	return mlxsw_core->max_ports;
148 }
149 EXPORT_SYMBOL(mlxsw_core_max_ports);
150 
151 void *mlxsw_core_driver_priv(struct mlxsw_core *mlxsw_core)
152 {
153 	return mlxsw_core->driver_priv;
154 }
155 EXPORT_SYMBOL(mlxsw_core_driver_priv);
156 
157 struct mlxsw_rx_listener_item {
158 	struct list_head list;
159 	struct mlxsw_rx_listener rxl;
160 	void *priv;
161 };
162 
163 struct mlxsw_event_listener_item {
164 	struct list_head list;
165 	struct mlxsw_event_listener el;
166 	void *priv;
167 };
168 
169 /******************
170  * EMAD processing
171  ******************/
172 
173 /* emad_eth_hdr_dmac
174  * Destination MAC in EMAD's Ethernet header.
175  * Must be set to 01:02:c9:00:00:01
176  */
177 MLXSW_ITEM_BUF(emad, eth_hdr, dmac, 0x00, 6);
178 
179 /* emad_eth_hdr_smac
180  * Source MAC in EMAD's Ethernet header.
181  * Must be set to 00:02:c9:01:02:03
182  */
183 MLXSW_ITEM_BUF(emad, eth_hdr, smac, 0x06, 6);
184 
185 /* emad_eth_hdr_ethertype
186  * Ethertype in EMAD's Ethernet header.
187  * Must be set to 0x8932
188  */
189 MLXSW_ITEM32(emad, eth_hdr, ethertype, 0x0C, 16, 16);
190 
191 /* emad_eth_hdr_mlx_proto
192  * Mellanox protocol.
193  * Must be set to 0x0.
194  */
195 MLXSW_ITEM32(emad, eth_hdr, mlx_proto, 0x0C, 8, 8);
196 
197 /* emad_eth_hdr_ver
198  * Mellanox protocol version.
199  * Must be set to 0x0.
200  */
201 MLXSW_ITEM32(emad, eth_hdr, ver, 0x0C, 4, 4);
202 
203 /* emad_op_tlv_type
204  * Type of the TLV.
205  * Must be set to 0x1 (operation TLV).
206  */
207 MLXSW_ITEM32(emad, op_tlv, type, 0x00, 27, 5);
208 
209 /* emad_op_tlv_len
210  * Length of the operation TLV in u32.
211  * Must be set to 0x4.
212  */
213 MLXSW_ITEM32(emad, op_tlv, len, 0x00, 16, 11);
214 
215 /* emad_op_tlv_dr
216  * Direct route bit. Setting to 1 indicates the EMAD is a direct route
217  * EMAD. DR TLV must follow.
218  *
219  * Note: Currently not supported and must not be set.
220  */
221 MLXSW_ITEM32(emad, op_tlv, dr, 0x00, 15, 1);
222 
223 /* emad_op_tlv_status
224  * Returned status in case of EMAD response. Must be set to 0 in case
225  * of EMAD request.
226  * 0x0 - success
227  * 0x1 - device is busy. Requester should retry
228  * 0x2 - Mellanox protocol version not supported
229  * 0x3 - unknown TLV
230  * 0x4 - register not supported
231  * 0x5 - operation class not supported
232  * 0x6 - EMAD method not supported
233  * 0x7 - bad parameter (e.g. port out of range)
234  * 0x8 - resource not available
235  * 0x9 - message receipt acknowledgment. Requester should retry
236  * 0x70 - internal error
237  */
238 MLXSW_ITEM32(emad, op_tlv, status, 0x00, 8, 7);
239 
240 /* emad_op_tlv_register_id
241  * Register ID of register within register TLV.
242  */
243 MLXSW_ITEM32(emad, op_tlv, register_id, 0x04, 16, 16);
244 
245 /* emad_op_tlv_r
246  * Response bit. Setting to 1 indicates Response, otherwise request.
247  */
248 MLXSW_ITEM32(emad, op_tlv, r, 0x04, 15, 1);
249 
250 /* emad_op_tlv_method
251  * EMAD method type.
252  * 0x1 - query
253  * 0x2 - write
254  * 0x3 - send (currently not supported)
255  * 0x4 - event
256  */
257 MLXSW_ITEM32(emad, op_tlv, method, 0x04, 8, 7);
258 
259 /* emad_op_tlv_class
260  * EMAD operation class. Must be set to 0x1 (REG_ACCESS).
261  */
262 MLXSW_ITEM32(emad, op_tlv, class, 0x04, 0, 8);
263 
264 /* emad_op_tlv_tid
265  * EMAD transaction ID. Used for pairing request and response EMADs.
266  */
267 MLXSW_ITEM64(emad, op_tlv, tid, 0x08, 0, 64);
268 
269 /* emad_reg_tlv_type
270  * Type of the TLV.
271  * Must be set to 0x3 (register TLV).
272  */
273 MLXSW_ITEM32(emad, reg_tlv, type, 0x00, 27, 5);
274 
275 /* emad_reg_tlv_len
276  * Length of the operation TLV in u32.
277  */
278 MLXSW_ITEM32(emad, reg_tlv, len, 0x00, 16, 11);
279 
280 /* emad_end_tlv_type
281  * Type of the TLV.
282  * Must be set to 0x0 (end TLV).
283  */
284 MLXSW_ITEM32(emad, end_tlv, type, 0x00, 27, 5);
285 
286 /* emad_end_tlv_len
287  * Length of the end TLV in u32.
288  * Must be set to 1.
289  */
290 MLXSW_ITEM32(emad, end_tlv, len, 0x00, 16, 11);
291 
292 enum mlxsw_core_reg_access_type {
293 	MLXSW_CORE_REG_ACCESS_TYPE_QUERY,
294 	MLXSW_CORE_REG_ACCESS_TYPE_WRITE,
295 };
296 
297 static inline const char *
298 mlxsw_core_reg_access_type_str(enum mlxsw_core_reg_access_type type)
299 {
300 	switch (type) {
301 	case MLXSW_CORE_REG_ACCESS_TYPE_QUERY:
302 		return "query";
303 	case MLXSW_CORE_REG_ACCESS_TYPE_WRITE:
304 		return "write";
305 	}
306 	BUG();
307 }
308 
309 static void mlxsw_emad_pack_end_tlv(char *end_tlv)
310 {
311 	mlxsw_emad_end_tlv_type_set(end_tlv, MLXSW_EMAD_TLV_TYPE_END);
312 	mlxsw_emad_end_tlv_len_set(end_tlv, MLXSW_EMAD_END_TLV_LEN);
313 }
314 
315 static void mlxsw_emad_pack_reg_tlv(char *reg_tlv,
316 				    const struct mlxsw_reg_info *reg,
317 				    char *payload)
318 {
319 	mlxsw_emad_reg_tlv_type_set(reg_tlv, MLXSW_EMAD_TLV_TYPE_REG);
320 	mlxsw_emad_reg_tlv_len_set(reg_tlv, reg->len / sizeof(u32) + 1);
321 	memcpy(reg_tlv + sizeof(u32), payload, reg->len);
322 }
323 
324 static void mlxsw_emad_pack_op_tlv(char *op_tlv,
325 				   const struct mlxsw_reg_info *reg,
326 				   enum mlxsw_core_reg_access_type type,
327 				   u64 tid)
328 {
329 	mlxsw_emad_op_tlv_type_set(op_tlv, MLXSW_EMAD_TLV_TYPE_OP);
330 	mlxsw_emad_op_tlv_len_set(op_tlv, MLXSW_EMAD_OP_TLV_LEN);
331 	mlxsw_emad_op_tlv_dr_set(op_tlv, 0);
332 	mlxsw_emad_op_tlv_status_set(op_tlv, 0);
333 	mlxsw_emad_op_tlv_register_id_set(op_tlv, reg->id);
334 	mlxsw_emad_op_tlv_r_set(op_tlv, MLXSW_EMAD_OP_TLV_REQUEST);
335 	if (type == MLXSW_CORE_REG_ACCESS_TYPE_QUERY)
336 		mlxsw_emad_op_tlv_method_set(op_tlv,
337 					     MLXSW_EMAD_OP_TLV_METHOD_QUERY);
338 	else
339 		mlxsw_emad_op_tlv_method_set(op_tlv,
340 					     MLXSW_EMAD_OP_TLV_METHOD_WRITE);
341 	mlxsw_emad_op_tlv_class_set(op_tlv,
342 				    MLXSW_EMAD_OP_TLV_CLASS_REG_ACCESS);
343 	mlxsw_emad_op_tlv_tid_set(op_tlv, tid);
344 }
345 
346 static int mlxsw_emad_construct_eth_hdr(struct sk_buff *skb)
347 {
348 	char *eth_hdr = skb_push(skb, MLXSW_EMAD_ETH_HDR_LEN);
349 
350 	mlxsw_emad_eth_hdr_dmac_memcpy_to(eth_hdr, MLXSW_EMAD_EH_DMAC);
351 	mlxsw_emad_eth_hdr_smac_memcpy_to(eth_hdr, MLXSW_EMAD_EH_SMAC);
352 	mlxsw_emad_eth_hdr_ethertype_set(eth_hdr, MLXSW_EMAD_EH_ETHERTYPE);
353 	mlxsw_emad_eth_hdr_mlx_proto_set(eth_hdr, MLXSW_EMAD_EH_MLX_PROTO);
354 	mlxsw_emad_eth_hdr_ver_set(eth_hdr, MLXSW_EMAD_EH_PROTO_VERSION);
355 
356 	skb_reset_mac_header(skb);
357 
358 	return 0;
359 }
360 
361 static void mlxsw_emad_construct(struct sk_buff *skb,
362 				 const struct mlxsw_reg_info *reg,
363 				 char *payload,
364 				 enum mlxsw_core_reg_access_type type,
365 				 u64 tid)
366 {
367 	char *buf;
368 
369 	buf = skb_push(skb, MLXSW_EMAD_END_TLV_LEN * sizeof(u32));
370 	mlxsw_emad_pack_end_tlv(buf);
371 
372 	buf = skb_push(skb, reg->len + sizeof(u32));
373 	mlxsw_emad_pack_reg_tlv(buf, reg, payload);
374 
375 	buf = skb_push(skb, MLXSW_EMAD_OP_TLV_LEN * sizeof(u32));
376 	mlxsw_emad_pack_op_tlv(buf, reg, type, tid);
377 
378 	mlxsw_emad_construct_eth_hdr(skb);
379 }
380 
381 static char *mlxsw_emad_op_tlv(const struct sk_buff *skb)
382 {
383 	return ((char *) (skb->data + MLXSW_EMAD_ETH_HDR_LEN));
384 }
385 
386 static char *mlxsw_emad_reg_tlv(const struct sk_buff *skb)
387 {
388 	return ((char *) (skb->data + MLXSW_EMAD_ETH_HDR_LEN +
389 				      MLXSW_EMAD_OP_TLV_LEN * sizeof(u32)));
390 }
391 
392 static char *mlxsw_emad_reg_payload(const char *op_tlv)
393 {
394 	return ((char *) (op_tlv + (MLXSW_EMAD_OP_TLV_LEN + 1) * sizeof(u32)));
395 }
396 
397 static u64 mlxsw_emad_get_tid(const struct sk_buff *skb)
398 {
399 	char *op_tlv;
400 
401 	op_tlv = mlxsw_emad_op_tlv(skb);
402 	return mlxsw_emad_op_tlv_tid_get(op_tlv);
403 }
404 
405 static bool mlxsw_emad_is_resp(const struct sk_buff *skb)
406 {
407 	char *op_tlv;
408 
409 	op_tlv = mlxsw_emad_op_tlv(skb);
410 	return (mlxsw_emad_op_tlv_r_get(op_tlv) == MLXSW_EMAD_OP_TLV_RESPONSE);
411 }
412 
413 static int mlxsw_emad_process_status(char *op_tlv,
414 				     enum mlxsw_emad_op_tlv_status *p_status)
415 {
416 	*p_status = mlxsw_emad_op_tlv_status_get(op_tlv);
417 
418 	switch (*p_status) {
419 	case MLXSW_EMAD_OP_TLV_STATUS_SUCCESS:
420 		return 0;
421 	case MLXSW_EMAD_OP_TLV_STATUS_BUSY:
422 	case MLXSW_EMAD_OP_TLV_STATUS_MESSAGE_RECEIPT_ACK:
423 		return -EAGAIN;
424 	case MLXSW_EMAD_OP_TLV_STATUS_VERSION_NOT_SUPPORTED:
425 	case MLXSW_EMAD_OP_TLV_STATUS_UNKNOWN_TLV:
426 	case MLXSW_EMAD_OP_TLV_STATUS_REGISTER_NOT_SUPPORTED:
427 	case MLXSW_EMAD_OP_TLV_STATUS_CLASS_NOT_SUPPORTED:
428 	case MLXSW_EMAD_OP_TLV_STATUS_METHOD_NOT_SUPPORTED:
429 	case MLXSW_EMAD_OP_TLV_STATUS_BAD_PARAMETER:
430 	case MLXSW_EMAD_OP_TLV_STATUS_RESOURCE_NOT_AVAILABLE:
431 	case MLXSW_EMAD_OP_TLV_STATUS_INTERNAL_ERROR:
432 	default:
433 		return -EIO;
434 	}
435 }
436 
437 static int
438 mlxsw_emad_process_status_skb(struct sk_buff *skb,
439 			      enum mlxsw_emad_op_tlv_status *p_status)
440 {
441 	return mlxsw_emad_process_status(mlxsw_emad_op_tlv(skb), p_status);
442 }
443 
444 struct mlxsw_reg_trans {
445 	struct list_head list;
446 	struct list_head bulk_list;
447 	struct mlxsw_core *core;
448 	struct sk_buff *tx_skb;
449 	struct mlxsw_tx_info tx_info;
450 	struct delayed_work timeout_dw;
451 	unsigned int retries;
452 	u64 tid;
453 	struct completion completion;
454 	atomic_t active;
455 	mlxsw_reg_trans_cb_t *cb;
456 	unsigned long cb_priv;
457 	const struct mlxsw_reg_info *reg;
458 	enum mlxsw_core_reg_access_type type;
459 	int err;
460 	enum mlxsw_emad_op_tlv_status emad_status;
461 	struct rcu_head rcu;
462 };
463 
464 #define MLXSW_EMAD_TIMEOUT_MS 200
465 
466 static void mlxsw_emad_trans_timeout_schedule(struct mlxsw_reg_trans *trans)
467 {
468 	unsigned long timeout = msecs_to_jiffies(MLXSW_EMAD_TIMEOUT_MS);
469 
470 	queue_delayed_work(trans->core->emad_wq, &trans->timeout_dw, timeout);
471 }
472 
473 static int mlxsw_emad_transmit(struct mlxsw_core *mlxsw_core,
474 			       struct mlxsw_reg_trans *trans)
475 {
476 	struct sk_buff *skb;
477 	int err;
478 
479 	skb = skb_copy(trans->tx_skb, GFP_KERNEL);
480 	if (!skb)
481 		return -ENOMEM;
482 
483 	trace_devlink_hwmsg(priv_to_devlink(mlxsw_core), false, 0,
484 			    skb->data + mlxsw_core->driver->txhdr_len,
485 			    skb->len - mlxsw_core->driver->txhdr_len);
486 
487 	atomic_set(&trans->active, 1);
488 	err = mlxsw_core_skb_transmit(mlxsw_core, skb, &trans->tx_info);
489 	if (err) {
490 		dev_kfree_skb(skb);
491 		return err;
492 	}
493 	mlxsw_emad_trans_timeout_schedule(trans);
494 	return 0;
495 }
496 
497 static void mlxsw_emad_trans_finish(struct mlxsw_reg_trans *trans, int err)
498 {
499 	struct mlxsw_core *mlxsw_core = trans->core;
500 
501 	dev_kfree_skb(trans->tx_skb);
502 	spin_lock_bh(&mlxsw_core->emad.trans_list_lock);
503 	list_del_rcu(&trans->list);
504 	spin_unlock_bh(&mlxsw_core->emad.trans_list_lock);
505 	trans->err = err;
506 	complete(&trans->completion);
507 }
508 
509 static void mlxsw_emad_transmit_retry(struct mlxsw_core *mlxsw_core,
510 				      struct mlxsw_reg_trans *trans)
511 {
512 	int err;
513 
514 	if (trans->retries < MLXSW_EMAD_MAX_RETRY) {
515 		trans->retries++;
516 		err = mlxsw_emad_transmit(trans->core, trans);
517 		if (err == 0)
518 			return;
519 	} else {
520 		err = -EIO;
521 	}
522 	mlxsw_emad_trans_finish(trans, err);
523 }
524 
525 static void mlxsw_emad_trans_timeout_work(struct work_struct *work)
526 {
527 	struct mlxsw_reg_trans *trans = container_of(work,
528 						     struct mlxsw_reg_trans,
529 						     timeout_dw.work);
530 
531 	if (!atomic_dec_and_test(&trans->active))
532 		return;
533 
534 	mlxsw_emad_transmit_retry(trans->core, trans);
535 }
536 
537 static void mlxsw_emad_process_response(struct mlxsw_core *mlxsw_core,
538 					struct mlxsw_reg_trans *trans,
539 					struct sk_buff *skb)
540 {
541 	int err;
542 
543 	if (!atomic_dec_and_test(&trans->active))
544 		return;
545 
546 	err = mlxsw_emad_process_status_skb(skb, &trans->emad_status);
547 	if (err == -EAGAIN) {
548 		mlxsw_emad_transmit_retry(mlxsw_core, trans);
549 	} else {
550 		if (err == 0) {
551 			char *op_tlv = mlxsw_emad_op_tlv(skb);
552 
553 			if (trans->cb)
554 				trans->cb(mlxsw_core,
555 					  mlxsw_emad_reg_payload(op_tlv),
556 					  trans->reg->len, trans->cb_priv);
557 		}
558 		mlxsw_emad_trans_finish(trans, err);
559 	}
560 }
561 
562 /* called with rcu read lock held */
563 static void mlxsw_emad_rx_listener_func(struct sk_buff *skb, u8 local_port,
564 					void *priv)
565 {
566 	struct mlxsw_core *mlxsw_core = priv;
567 	struct mlxsw_reg_trans *trans;
568 
569 	trace_devlink_hwmsg(priv_to_devlink(mlxsw_core), true, 0,
570 			    skb->data, skb->len);
571 
572 	if (!mlxsw_emad_is_resp(skb))
573 		goto free_skb;
574 
575 	list_for_each_entry_rcu(trans, &mlxsw_core->emad.trans_list, list) {
576 		if (mlxsw_emad_get_tid(skb) == trans->tid) {
577 			mlxsw_emad_process_response(mlxsw_core, trans, skb);
578 			break;
579 		}
580 	}
581 
582 free_skb:
583 	dev_kfree_skb(skb);
584 }
585 
586 static const struct mlxsw_listener mlxsw_emad_rx_listener =
587 	MLXSW_RXL(mlxsw_emad_rx_listener_func, ETHEMAD, TRAP_TO_CPU, false,
588 		  EMAD, DISCARD);
589 
590 static int mlxsw_emad_init(struct mlxsw_core *mlxsw_core)
591 {
592 	struct workqueue_struct *emad_wq;
593 	u64 tid;
594 	int err;
595 
596 	if (!(mlxsw_core->bus->features & MLXSW_BUS_F_TXRX))
597 		return 0;
598 
599 	emad_wq = alloc_workqueue("mlxsw_core_emad", WQ_MEM_RECLAIM, 0);
600 	if (!emad_wq)
601 		return -ENOMEM;
602 	mlxsw_core->emad_wq = emad_wq;
603 
604 	/* Set the upper 32 bits of the transaction ID field to a random
605 	 * number. This allows us to discard EMADs addressed to other
606 	 * devices.
607 	 */
608 	get_random_bytes(&tid, 4);
609 	tid <<= 32;
610 	atomic64_set(&mlxsw_core->emad.tid, tid);
611 
612 	INIT_LIST_HEAD(&mlxsw_core->emad.trans_list);
613 	spin_lock_init(&mlxsw_core->emad.trans_list_lock);
614 
615 	err = mlxsw_core_trap_register(mlxsw_core, &mlxsw_emad_rx_listener,
616 				       mlxsw_core);
617 	if (err)
618 		return err;
619 
620 	err = mlxsw_core->driver->basic_trap_groups_set(mlxsw_core);
621 	if (err)
622 		goto err_emad_trap_set;
623 	mlxsw_core->emad.use_emad = true;
624 
625 	return 0;
626 
627 err_emad_trap_set:
628 	mlxsw_core_trap_unregister(mlxsw_core, &mlxsw_emad_rx_listener,
629 				   mlxsw_core);
630 	destroy_workqueue(mlxsw_core->emad_wq);
631 	return err;
632 }
633 
634 static void mlxsw_emad_fini(struct mlxsw_core *mlxsw_core)
635 {
636 
637 	if (!(mlxsw_core->bus->features & MLXSW_BUS_F_TXRX))
638 		return;
639 
640 	mlxsw_core->emad.use_emad = false;
641 	mlxsw_core_trap_unregister(mlxsw_core, &mlxsw_emad_rx_listener,
642 				   mlxsw_core);
643 	destroy_workqueue(mlxsw_core->emad_wq);
644 }
645 
646 static struct sk_buff *mlxsw_emad_alloc(const struct mlxsw_core *mlxsw_core,
647 					u16 reg_len)
648 {
649 	struct sk_buff *skb;
650 	u16 emad_len;
651 
652 	emad_len = (reg_len + sizeof(u32) + MLXSW_EMAD_ETH_HDR_LEN +
653 		    (MLXSW_EMAD_OP_TLV_LEN + MLXSW_EMAD_END_TLV_LEN) *
654 		    sizeof(u32) + mlxsw_core->driver->txhdr_len);
655 	if (emad_len > MLXSW_EMAD_MAX_FRAME_LEN)
656 		return NULL;
657 
658 	skb = netdev_alloc_skb(NULL, emad_len);
659 	if (!skb)
660 		return NULL;
661 	memset(skb->data, 0, emad_len);
662 	skb_reserve(skb, emad_len);
663 
664 	return skb;
665 }
666 
667 static int mlxsw_emad_reg_access(struct mlxsw_core *mlxsw_core,
668 				 const struct mlxsw_reg_info *reg,
669 				 char *payload,
670 				 enum mlxsw_core_reg_access_type type,
671 				 struct mlxsw_reg_trans *trans,
672 				 struct list_head *bulk_list,
673 				 mlxsw_reg_trans_cb_t *cb,
674 				 unsigned long cb_priv, u64 tid)
675 {
676 	struct sk_buff *skb;
677 	int err;
678 
679 	dev_dbg(mlxsw_core->bus_info->dev, "EMAD reg access (tid=%llx,reg_id=%x(%s),type=%s)\n",
680 		tid, reg->id, mlxsw_reg_id_str(reg->id),
681 		mlxsw_core_reg_access_type_str(type));
682 
683 	skb = mlxsw_emad_alloc(mlxsw_core, reg->len);
684 	if (!skb)
685 		return -ENOMEM;
686 
687 	list_add_tail(&trans->bulk_list, bulk_list);
688 	trans->core = mlxsw_core;
689 	trans->tx_skb = skb;
690 	trans->tx_info.local_port = MLXSW_PORT_CPU_PORT;
691 	trans->tx_info.is_emad = true;
692 	INIT_DELAYED_WORK(&trans->timeout_dw, mlxsw_emad_trans_timeout_work);
693 	trans->tid = tid;
694 	init_completion(&trans->completion);
695 	trans->cb = cb;
696 	trans->cb_priv = cb_priv;
697 	trans->reg = reg;
698 	trans->type = type;
699 
700 	mlxsw_emad_construct(skb, reg, payload, type, trans->tid);
701 	mlxsw_core->driver->txhdr_construct(skb, &trans->tx_info);
702 
703 	spin_lock_bh(&mlxsw_core->emad.trans_list_lock);
704 	list_add_tail_rcu(&trans->list, &mlxsw_core->emad.trans_list);
705 	spin_unlock_bh(&mlxsw_core->emad.trans_list_lock);
706 	err = mlxsw_emad_transmit(mlxsw_core, trans);
707 	if (err)
708 		goto err_out;
709 	return 0;
710 
711 err_out:
712 	spin_lock_bh(&mlxsw_core->emad.trans_list_lock);
713 	list_del_rcu(&trans->list);
714 	spin_unlock_bh(&mlxsw_core->emad.trans_list_lock);
715 	list_del(&trans->bulk_list);
716 	dev_kfree_skb(trans->tx_skb);
717 	return err;
718 }
719 
720 /*****************
721  * Core functions
722  *****************/
723 
724 int mlxsw_core_driver_register(struct mlxsw_driver *mlxsw_driver)
725 {
726 	spin_lock(&mlxsw_core_driver_list_lock);
727 	list_add_tail(&mlxsw_driver->list, &mlxsw_core_driver_list);
728 	spin_unlock(&mlxsw_core_driver_list_lock);
729 	return 0;
730 }
731 EXPORT_SYMBOL(mlxsw_core_driver_register);
732 
733 void mlxsw_core_driver_unregister(struct mlxsw_driver *mlxsw_driver)
734 {
735 	spin_lock(&mlxsw_core_driver_list_lock);
736 	list_del(&mlxsw_driver->list);
737 	spin_unlock(&mlxsw_core_driver_list_lock);
738 }
739 EXPORT_SYMBOL(mlxsw_core_driver_unregister);
740 
741 static struct mlxsw_driver *__driver_find(const char *kind)
742 {
743 	struct mlxsw_driver *mlxsw_driver;
744 
745 	list_for_each_entry(mlxsw_driver, &mlxsw_core_driver_list, list) {
746 		if (strcmp(mlxsw_driver->kind, kind) == 0)
747 			return mlxsw_driver;
748 	}
749 	return NULL;
750 }
751 
752 static struct mlxsw_driver *mlxsw_core_driver_get(const char *kind)
753 {
754 	struct mlxsw_driver *mlxsw_driver;
755 
756 	spin_lock(&mlxsw_core_driver_list_lock);
757 	mlxsw_driver = __driver_find(kind);
758 	spin_unlock(&mlxsw_core_driver_list_lock);
759 	return mlxsw_driver;
760 }
761 
762 static void mlxsw_core_driver_put(const char *kind)
763 {
764 	struct mlxsw_driver *mlxsw_driver;
765 
766 	spin_lock(&mlxsw_core_driver_list_lock);
767 	mlxsw_driver = __driver_find(kind);
768 	spin_unlock(&mlxsw_core_driver_list_lock);
769 }
770 
771 static int mlxsw_devlink_port_split(struct devlink *devlink,
772 				    unsigned int port_index,
773 				    unsigned int count,
774 				    struct netlink_ext_ack *extack)
775 {
776 	struct mlxsw_core *mlxsw_core = devlink_priv(devlink);
777 
778 	if (port_index >= mlxsw_core->max_ports) {
779 		NL_SET_ERR_MSG_MOD(extack, "Port index exceeds maximum number of ports");
780 		return -EINVAL;
781 	}
782 	if (!mlxsw_core->driver->port_split)
783 		return -EOPNOTSUPP;
784 	return mlxsw_core->driver->port_split(mlxsw_core, port_index, count,
785 					      extack);
786 }
787 
788 static int mlxsw_devlink_port_unsplit(struct devlink *devlink,
789 				      unsigned int port_index,
790 				      struct netlink_ext_ack *extack)
791 {
792 	struct mlxsw_core *mlxsw_core = devlink_priv(devlink);
793 
794 	if (port_index >= mlxsw_core->max_ports) {
795 		NL_SET_ERR_MSG_MOD(extack, "Port index exceeds maximum number of ports");
796 		return -EINVAL;
797 	}
798 	if (!mlxsw_core->driver->port_unsplit)
799 		return -EOPNOTSUPP;
800 	return mlxsw_core->driver->port_unsplit(mlxsw_core, port_index,
801 						extack);
802 }
803 
804 static int
805 mlxsw_devlink_sb_pool_get(struct devlink *devlink,
806 			  unsigned int sb_index, u16 pool_index,
807 			  struct devlink_sb_pool_info *pool_info)
808 {
809 	struct mlxsw_core *mlxsw_core = devlink_priv(devlink);
810 	struct mlxsw_driver *mlxsw_driver = mlxsw_core->driver;
811 
812 	if (!mlxsw_driver->sb_pool_get)
813 		return -EOPNOTSUPP;
814 	return mlxsw_driver->sb_pool_get(mlxsw_core, sb_index,
815 					 pool_index, pool_info);
816 }
817 
818 static int
819 mlxsw_devlink_sb_pool_set(struct devlink *devlink,
820 			  unsigned int sb_index, u16 pool_index, u32 size,
821 			  enum devlink_sb_threshold_type threshold_type)
822 {
823 	struct mlxsw_core *mlxsw_core = devlink_priv(devlink);
824 	struct mlxsw_driver *mlxsw_driver = mlxsw_core->driver;
825 
826 	if (!mlxsw_driver->sb_pool_set)
827 		return -EOPNOTSUPP;
828 	return mlxsw_driver->sb_pool_set(mlxsw_core, sb_index,
829 					 pool_index, size, threshold_type);
830 }
831 
832 static void *__dl_port(struct devlink_port *devlink_port)
833 {
834 	return container_of(devlink_port, struct mlxsw_core_port, devlink_port);
835 }
836 
837 static int mlxsw_devlink_port_type_set(struct devlink_port *devlink_port,
838 				       enum devlink_port_type port_type)
839 {
840 	struct mlxsw_core *mlxsw_core = devlink_priv(devlink_port->devlink);
841 	struct mlxsw_driver *mlxsw_driver = mlxsw_core->driver;
842 	struct mlxsw_core_port *mlxsw_core_port = __dl_port(devlink_port);
843 
844 	if (!mlxsw_driver->port_type_set)
845 		return -EOPNOTSUPP;
846 
847 	return mlxsw_driver->port_type_set(mlxsw_core,
848 					   mlxsw_core_port->local_port,
849 					   port_type);
850 }
851 
852 static int mlxsw_devlink_sb_port_pool_get(struct devlink_port *devlink_port,
853 					  unsigned int sb_index, u16 pool_index,
854 					  u32 *p_threshold)
855 {
856 	struct mlxsw_core *mlxsw_core = devlink_priv(devlink_port->devlink);
857 	struct mlxsw_driver *mlxsw_driver = mlxsw_core->driver;
858 	struct mlxsw_core_port *mlxsw_core_port = __dl_port(devlink_port);
859 
860 	if (!mlxsw_driver->sb_port_pool_get ||
861 	    !mlxsw_core_port_check(mlxsw_core_port))
862 		return -EOPNOTSUPP;
863 	return mlxsw_driver->sb_port_pool_get(mlxsw_core_port, sb_index,
864 					      pool_index, p_threshold);
865 }
866 
867 static int mlxsw_devlink_sb_port_pool_set(struct devlink_port *devlink_port,
868 					  unsigned int sb_index, u16 pool_index,
869 					  u32 threshold)
870 {
871 	struct mlxsw_core *mlxsw_core = devlink_priv(devlink_port->devlink);
872 	struct mlxsw_driver *mlxsw_driver = mlxsw_core->driver;
873 	struct mlxsw_core_port *mlxsw_core_port = __dl_port(devlink_port);
874 
875 	if (!mlxsw_driver->sb_port_pool_set ||
876 	    !mlxsw_core_port_check(mlxsw_core_port))
877 		return -EOPNOTSUPP;
878 	return mlxsw_driver->sb_port_pool_set(mlxsw_core_port, sb_index,
879 					      pool_index, threshold);
880 }
881 
882 static int
883 mlxsw_devlink_sb_tc_pool_bind_get(struct devlink_port *devlink_port,
884 				  unsigned int sb_index, u16 tc_index,
885 				  enum devlink_sb_pool_type pool_type,
886 				  u16 *p_pool_index, u32 *p_threshold)
887 {
888 	struct mlxsw_core *mlxsw_core = devlink_priv(devlink_port->devlink);
889 	struct mlxsw_driver *mlxsw_driver = mlxsw_core->driver;
890 	struct mlxsw_core_port *mlxsw_core_port = __dl_port(devlink_port);
891 
892 	if (!mlxsw_driver->sb_tc_pool_bind_get ||
893 	    !mlxsw_core_port_check(mlxsw_core_port))
894 		return -EOPNOTSUPP;
895 	return mlxsw_driver->sb_tc_pool_bind_get(mlxsw_core_port, sb_index,
896 						 tc_index, pool_type,
897 						 p_pool_index, p_threshold);
898 }
899 
900 static int
901 mlxsw_devlink_sb_tc_pool_bind_set(struct devlink_port *devlink_port,
902 				  unsigned int sb_index, u16 tc_index,
903 				  enum devlink_sb_pool_type pool_type,
904 				  u16 pool_index, u32 threshold)
905 {
906 	struct mlxsw_core *mlxsw_core = devlink_priv(devlink_port->devlink);
907 	struct mlxsw_driver *mlxsw_driver = mlxsw_core->driver;
908 	struct mlxsw_core_port *mlxsw_core_port = __dl_port(devlink_port);
909 
910 	if (!mlxsw_driver->sb_tc_pool_bind_set ||
911 	    !mlxsw_core_port_check(mlxsw_core_port))
912 		return -EOPNOTSUPP;
913 	return mlxsw_driver->sb_tc_pool_bind_set(mlxsw_core_port, sb_index,
914 						 tc_index, pool_type,
915 						 pool_index, threshold);
916 }
917 
918 static int mlxsw_devlink_sb_occ_snapshot(struct devlink *devlink,
919 					 unsigned int sb_index)
920 {
921 	struct mlxsw_core *mlxsw_core = devlink_priv(devlink);
922 	struct mlxsw_driver *mlxsw_driver = mlxsw_core->driver;
923 
924 	if (!mlxsw_driver->sb_occ_snapshot)
925 		return -EOPNOTSUPP;
926 	return mlxsw_driver->sb_occ_snapshot(mlxsw_core, sb_index);
927 }
928 
929 static int mlxsw_devlink_sb_occ_max_clear(struct devlink *devlink,
930 					  unsigned int sb_index)
931 {
932 	struct mlxsw_core *mlxsw_core = devlink_priv(devlink);
933 	struct mlxsw_driver *mlxsw_driver = mlxsw_core->driver;
934 
935 	if (!mlxsw_driver->sb_occ_max_clear)
936 		return -EOPNOTSUPP;
937 	return mlxsw_driver->sb_occ_max_clear(mlxsw_core, sb_index);
938 }
939 
940 static int
941 mlxsw_devlink_sb_occ_port_pool_get(struct devlink_port *devlink_port,
942 				   unsigned int sb_index, u16 pool_index,
943 				   u32 *p_cur, u32 *p_max)
944 {
945 	struct mlxsw_core *mlxsw_core = devlink_priv(devlink_port->devlink);
946 	struct mlxsw_driver *mlxsw_driver = mlxsw_core->driver;
947 	struct mlxsw_core_port *mlxsw_core_port = __dl_port(devlink_port);
948 
949 	if (!mlxsw_driver->sb_occ_port_pool_get ||
950 	    !mlxsw_core_port_check(mlxsw_core_port))
951 		return -EOPNOTSUPP;
952 	return mlxsw_driver->sb_occ_port_pool_get(mlxsw_core_port, sb_index,
953 						  pool_index, p_cur, p_max);
954 }
955 
956 static int
957 mlxsw_devlink_sb_occ_tc_port_bind_get(struct devlink_port *devlink_port,
958 				      unsigned int sb_index, u16 tc_index,
959 				      enum devlink_sb_pool_type pool_type,
960 				      u32 *p_cur, u32 *p_max)
961 {
962 	struct mlxsw_core *mlxsw_core = devlink_priv(devlink_port->devlink);
963 	struct mlxsw_driver *mlxsw_driver = mlxsw_core->driver;
964 	struct mlxsw_core_port *mlxsw_core_port = __dl_port(devlink_port);
965 
966 	if (!mlxsw_driver->sb_occ_tc_port_bind_get ||
967 	    !mlxsw_core_port_check(mlxsw_core_port))
968 		return -EOPNOTSUPP;
969 	return mlxsw_driver->sb_occ_tc_port_bind_get(mlxsw_core_port,
970 						     sb_index, tc_index,
971 						     pool_type, p_cur, p_max);
972 }
973 
974 static int mlxsw_devlink_core_bus_device_reload(struct devlink *devlink,
975 						struct netlink_ext_ack *extack)
976 {
977 	struct mlxsw_core *mlxsw_core = devlink_priv(devlink);
978 	int err;
979 
980 	if (!(mlxsw_core->bus->features & MLXSW_BUS_F_RESET))
981 		return -EOPNOTSUPP;
982 
983 	mlxsw_core_bus_device_unregister(mlxsw_core, true);
984 	err = mlxsw_core_bus_device_register(mlxsw_core->bus_info,
985 					     mlxsw_core->bus,
986 					     mlxsw_core->bus_priv, true,
987 					     devlink);
988 	if (err)
989 		mlxsw_core->reload_fail = true;
990 	return err;
991 }
992 
993 static const struct devlink_ops mlxsw_devlink_ops = {
994 	.reload				= mlxsw_devlink_core_bus_device_reload,
995 	.port_type_set			= mlxsw_devlink_port_type_set,
996 	.port_split			= mlxsw_devlink_port_split,
997 	.port_unsplit			= mlxsw_devlink_port_unsplit,
998 	.sb_pool_get			= mlxsw_devlink_sb_pool_get,
999 	.sb_pool_set			= mlxsw_devlink_sb_pool_set,
1000 	.sb_port_pool_get		= mlxsw_devlink_sb_port_pool_get,
1001 	.sb_port_pool_set		= mlxsw_devlink_sb_port_pool_set,
1002 	.sb_tc_pool_bind_get		= mlxsw_devlink_sb_tc_pool_bind_get,
1003 	.sb_tc_pool_bind_set		= mlxsw_devlink_sb_tc_pool_bind_set,
1004 	.sb_occ_snapshot		= mlxsw_devlink_sb_occ_snapshot,
1005 	.sb_occ_max_clear		= mlxsw_devlink_sb_occ_max_clear,
1006 	.sb_occ_port_pool_get		= mlxsw_devlink_sb_occ_port_pool_get,
1007 	.sb_occ_tc_port_bind_get	= mlxsw_devlink_sb_occ_tc_port_bind_get,
1008 };
1009 
1010 int mlxsw_core_bus_device_register(const struct mlxsw_bus_info *mlxsw_bus_info,
1011 				   const struct mlxsw_bus *mlxsw_bus,
1012 				   void *bus_priv, bool reload,
1013 				   struct devlink *devlink)
1014 {
1015 	const char *device_kind = mlxsw_bus_info->device_kind;
1016 	struct mlxsw_core *mlxsw_core;
1017 	struct mlxsw_driver *mlxsw_driver;
1018 	struct mlxsw_res *res;
1019 	size_t alloc_size;
1020 	int err;
1021 
1022 	mlxsw_driver = mlxsw_core_driver_get(device_kind);
1023 	if (!mlxsw_driver)
1024 		return -EINVAL;
1025 
1026 	if (!reload) {
1027 		alloc_size = sizeof(*mlxsw_core) + mlxsw_driver->priv_size;
1028 		devlink = devlink_alloc(&mlxsw_devlink_ops, alloc_size);
1029 		if (!devlink) {
1030 			err = -ENOMEM;
1031 			goto err_devlink_alloc;
1032 		}
1033 	}
1034 
1035 	mlxsw_core = devlink_priv(devlink);
1036 	INIT_LIST_HEAD(&mlxsw_core->rx_listener_list);
1037 	INIT_LIST_HEAD(&mlxsw_core->event_listener_list);
1038 	mlxsw_core->driver = mlxsw_driver;
1039 	mlxsw_core->bus = mlxsw_bus;
1040 	mlxsw_core->bus_priv = bus_priv;
1041 	mlxsw_core->bus_info = mlxsw_bus_info;
1042 
1043 	res = mlxsw_driver->res_query_enabled ? &mlxsw_core->res : NULL;
1044 	err = mlxsw_bus->init(bus_priv, mlxsw_core, mlxsw_driver->profile, res);
1045 	if (err)
1046 		goto err_bus_init;
1047 
1048 	if (mlxsw_driver->resources_register && !reload) {
1049 		err = mlxsw_driver->resources_register(mlxsw_core);
1050 		if (err)
1051 			goto err_register_resources;
1052 	}
1053 
1054 	err = mlxsw_ports_init(mlxsw_core);
1055 	if (err)
1056 		goto err_ports_init;
1057 
1058 	if (MLXSW_CORE_RES_VALID(mlxsw_core, MAX_LAG) &&
1059 	    MLXSW_CORE_RES_VALID(mlxsw_core, MAX_LAG_MEMBERS)) {
1060 		alloc_size = sizeof(u8) *
1061 			MLXSW_CORE_RES_GET(mlxsw_core, MAX_LAG) *
1062 			MLXSW_CORE_RES_GET(mlxsw_core, MAX_LAG_MEMBERS);
1063 		mlxsw_core->lag.mapping = kzalloc(alloc_size, GFP_KERNEL);
1064 		if (!mlxsw_core->lag.mapping) {
1065 			err = -ENOMEM;
1066 			goto err_alloc_lag_mapping;
1067 		}
1068 	}
1069 
1070 	err = mlxsw_emad_init(mlxsw_core);
1071 	if (err)
1072 		goto err_emad_init;
1073 
1074 	if (!reload) {
1075 		err = devlink_register(devlink, mlxsw_bus_info->dev);
1076 		if (err)
1077 			goto err_devlink_register;
1078 	}
1079 
1080 	err = mlxsw_hwmon_init(mlxsw_core, mlxsw_bus_info, &mlxsw_core->hwmon);
1081 	if (err)
1082 		goto err_hwmon_init;
1083 
1084 	err = mlxsw_thermal_init(mlxsw_core, mlxsw_bus_info,
1085 				 &mlxsw_core->thermal);
1086 	if (err)
1087 		goto err_thermal_init;
1088 
1089 	if (mlxsw_driver->init) {
1090 		err = mlxsw_driver->init(mlxsw_core, mlxsw_bus_info);
1091 		if (err)
1092 			goto err_driver_init;
1093 	}
1094 
1095 	return 0;
1096 
1097 err_driver_init:
1098 	mlxsw_thermal_fini(mlxsw_core->thermal);
1099 err_thermal_init:
1100 err_hwmon_init:
1101 	if (!reload)
1102 		devlink_unregister(devlink);
1103 err_devlink_register:
1104 	mlxsw_emad_fini(mlxsw_core);
1105 err_emad_init:
1106 	kfree(mlxsw_core->lag.mapping);
1107 err_alloc_lag_mapping:
1108 	mlxsw_ports_fini(mlxsw_core);
1109 err_ports_init:
1110 	if (!reload)
1111 		devlink_resources_unregister(devlink, NULL);
1112 err_register_resources:
1113 	mlxsw_bus->fini(bus_priv);
1114 err_bus_init:
1115 	if (!reload)
1116 		devlink_free(devlink);
1117 err_devlink_alloc:
1118 	mlxsw_core_driver_put(device_kind);
1119 	return err;
1120 }
1121 EXPORT_SYMBOL(mlxsw_core_bus_device_register);
1122 
1123 void mlxsw_core_bus_device_unregister(struct mlxsw_core *mlxsw_core,
1124 				      bool reload)
1125 {
1126 	const char *device_kind = mlxsw_core->bus_info->device_kind;
1127 	struct devlink *devlink = priv_to_devlink(mlxsw_core);
1128 
1129 	if (mlxsw_core->reload_fail)
1130 		goto reload_fail;
1131 
1132 	if (mlxsw_core->driver->fini)
1133 		mlxsw_core->driver->fini(mlxsw_core);
1134 	mlxsw_thermal_fini(mlxsw_core->thermal);
1135 	if (!reload)
1136 		devlink_unregister(devlink);
1137 	mlxsw_emad_fini(mlxsw_core);
1138 	kfree(mlxsw_core->lag.mapping);
1139 	mlxsw_ports_fini(mlxsw_core);
1140 	if (!reload)
1141 		devlink_resources_unregister(devlink, NULL);
1142 	mlxsw_core->bus->fini(mlxsw_core->bus_priv);
1143 	if (reload)
1144 		return;
1145 reload_fail:
1146 	devlink_free(devlink);
1147 	mlxsw_core_driver_put(device_kind);
1148 }
1149 EXPORT_SYMBOL(mlxsw_core_bus_device_unregister);
1150 
1151 bool mlxsw_core_skb_transmit_busy(struct mlxsw_core *mlxsw_core,
1152 				  const struct mlxsw_tx_info *tx_info)
1153 {
1154 	return mlxsw_core->bus->skb_transmit_busy(mlxsw_core->bus_priv,
1155 						  tx_info);
1156 }
1157 EXPORT_SYMBOL(mlxsw_core_skb_transmit_busy);
1158 
1159 int mlxsw_core_skb_transmit(struct mlxsw_core *mlxsw_core, struct sk_buff *skb,
1160 			    const struct mlxsw_tx_info *tx_info)
1161 {
1162 	return mlxsw_core->bus->skb_transmit(mlxsw_core->bus_priv, skb,
1163 					     tx_info);
1164 }
1165 EXPORT_SYMBOL(mlxsw_core_skb_transmit);
1166 
1167 static bool __is_rx_listener_equal(const struct mlxsw_rx_listener *rxl_a,
1168 				   const struct mlxsw_rx_listener *rxl_b)
1169 {
1170 	return (rxl_a->func == rxl_b->func &&
1171 		rxl_a->local_port == rxl_b->local_port &&
1172 		rxl_a->trap_id == rxl_b->trap_id);
1173 }
1174 
1175 static struct mlxsw_rx_listener_item *
1176 __find_rx_listener_item(struct mlxsw_core *mlxsw_core,
1177 			const struct mlxsw_rx_listener *rxl,
1178 			void *priv)
1179 {
1180 	struct mlxsw_rx_listener_item *rxl_item;
1181 
1182 	list_for_each_entry(rxl_item, &mlxsw_core->rx_listener_list, list) {
1183 		if (__is_rx_listener_equal(&rxl_item->rxl, rxl) &&
1184 		    rxl_item->priv == priv)
1185 			return rxl_item;
1186 	}
1187 	return NULL;
1188 }
1189 
1190 int mlxsw_core_rx_listener_register(struct mlxsw_core *mlxsw_core,
1191 				    const struct mlxsw_rx_listener *rxl,
1192 				    void *priv)
1193 {
1194 	struct mlxsw_rx_listener_item *rxl_item;
1195 
1196 	rxl_item = __find_rx_listener_item(mlxsw_core, rxl, priv);
1197 	if (rxl_item)
1198 		return -EEXIST;
1199 	rxl_item = kmalloc(sizeof(*rxl_item), GFP_KERNEL);
1200 	if (!rxl_item)
1201 		return -ENOMEM;
1202 	rxl_item->rxl = *rxl;
1203 	rxl_item->priv = priv;
1204 
1205 	list_add_rcu(&rxl_item->list, &mlxsw_core->rx_listener_list);
1206 	return 0;
1207 }
1208 EXPORT_SYMBOL(mlxsw_core_rx_listener_register);
1209 
1210 void mlxsw_core_rx_listener_unregister(struct mlxsw_core *mlxsw_core,
1211 				       const struct mlxsw_rx_listener *rxl,
1212 				       void *priv)
1213 {
1214 	struct mlxsw_rx_listener_item *rxl_item;
1215 
1216 	rxl_item = __find_rx_listener_item(mlxsw_core, rxl, priv);
1217 	if (!rxl_item)
1218 		return;
1219 	list_del_rcu(&rxl_item->list);
1220 	synchronize_rcu();
1221 	kfree(rxl_item);
1222 }
1223 EXPORT_SYMBOL(mlxsw_core_rx_listener_unregister);
1224 
1225 static void mlxsw_core_event_listener_func(struct sk_buff *skb, u8 local_port,
1226 					   void *priv)
1227 {
1228 	struct mlxsw_event_listener_item *event_listener_item = priv;
1229 	struct mlxsw_reg_info reg;
1230 	char *payload;
1231 	char *op_tlv = mlxsw_emad_op_tlv(skb);
1232 	char *reg_tlv = mlxsw_emad_reg_tlv(skb);
1233 
1234 	reg.id = mlxsw_emad_op_tlv_register_id_get(op_tlv);
1235 	reg.len = (mlxsw_emad_reg_tlv_len_get(reg_tlv) - 1) * sizeof(u32);
1236 	payload = mlxsw_emad_reg_payload(op_tlv);
1237 	event_listener_item->el.func(&reg, payload, event_listener_item->priv);
1238 	dev_kfree_skb(skb);
1239 }
1240 
1241 static bool __is_event_listener_equal(const struct mlxsw_event_listener *el_a,
1242 				      const struct mlxsw_event_listener *el_b)
1243 {
1244 	return (el_a->func == el_b->func &&
1245 		el_a->trap_id == el_b->trap_id);
1246 }
1247 
1248 static struct mlxsw_event_listener_item *
1249 __find_event_listener_item(struct mlxsw_core *mlxsw_core,
1250 			   const struct mlxsw_event_listener *el,
1251 			   void *priv)
1252 {
1253 	struct mlxsw_event_listener_item *el_item;
1254 
1255 	list_for_each_entry(el_item, &mlxsw_core->event_listener_list, list) {
1256 		if (__is_event_listener_equal(&el_item->el, el) &&
1257 		    el_item->priv == priv)
1258 			return el_item;
1259 	}
1260 	return NULL;
1261 }
1262 
1263 int mlxsw_core_event_listener_register(struct mlxsw_core *mlxsw_core,
1264 				       const struct mlxsw_event_listener *el,
1265 				       void *priv)
1266 {
1267 	int err;
1268 	struct mlxsw_event_listener_item *el_item;
1269 	const struct mlxsw_rx_listener rxl = {
1270 		.func = mlxsw_core_event_listener_func,
1271 		.local_port = MLXSW_PORT_DONT_CARE,
1272 		.trap_id = el->trap_id,
1273 	};
1274 
1275 	el_item = __find_event_listener_item(mlxsw_core, el, priv);
1276 	if (el_item)
1277 		return -EEXIST;
1278 	el_item = kmalloc(sizeof(*el_item), GFP_KERNEL);
1279 	if (!el_item)
1280 		return -ENOMEM;
1281 	el_item->el = *el;
1282 	el_item->priv = priv;
1283 
1284 	err = mlxsw_core_rx_listener_register(mlxsw_core, &rxl, el_item);
1285 	if (err)
1286 		goto err_rx_listener_register;
1287 
1288 	/* No reason to save item if we did not manage to register an RX
1289 	 * listener for it.
1290 	 */
1291 	list_add_rcu(&el_item->list, &mlxsw_core->event_listener_list);
1292 
1293 	return 0;
1294 
1295 err_rx_listener_register:
1296 	kfree(el_item);
1297 	return err;
1298 }
1299 EXPORT_SYMBOL(mlxsw_core_event_listener_register);
1300 
1301 void mlxsw_core_event_listener_unregister(struct mlxsw_core *mlxsw_core,
1302 					  const struct mlxsw_event_listener *el,
1303 					  void *priv)
1304 {
1305 	struct mlxsw_event_listener_item *el_item;
1306 	const struct mlxsw_rx_listener rxl = {
1307 		.func = mlxsw_core_event_listener_func,
1308 		.local_port = MLXSW_PORT_DONT_CARE,
1309 		.trap_id = el->trap_id,
1310 	};
1311 
1312 	el_item = __find_event_listener_item(mlxsw_core, el, priv);
1313 	if (!el_item)
1314 		return;
1315 	mlxsw_core_rx_listener_unregister(mlxsw_core, &rxl, el_item);
1316 	list_del(&el_item->list);
1317 	kfree(el_item);
1318 }
1319 EXPORT_SYMBOL(mlxsw_core_event_listener_unregister);
1320 
1321 static int mlxsw_core_listener_register(struct mlxsw_core *mlxsw_core,
1322 					const struct mlxsw_listener *listener,
1323 					void *priv)
1324 {
1325 	if (listener->is_event)
1326 		return mlxsw_core_event_listener_register(mlxsw_core,
1327 						&listener->u.event_listener,
1328 						priv);
1329 	else
1330 		return mlxsw_core_rx_listener_register(mlxsw_core,
1331 						&listener->u.rx_listener,
1332 						priv);
1333 }
1334 
1335 static void mlxsw_core_listener_unregister(struct mlxsw_core *mlxsw_core,
1336 				      const struct mlxsw_listener *listener,
1337 				      void *priv)
1338 {
1339 	if (listener->is_event)
1340 		mlxsw_core_event_listener_unregister(mlxsw_core,
1341 						     &listener->u.event_listener,
1342 						     priv);
1343 	else
1344 		mlxsw_core_rx_listener_unregister(mlxsw_core,
1345 						  &listener->u.rx_listener,
1346 						  priv);
1347 }
1348 
1349 int mlxsw_core_trap_register(struct mlxsw_core *mlxsw_core,
1350 			     const struct mlxsw_listener *listener, void *priv)
1351 {
1352 	char hpkt_pl[MLXSW_REG_HPKT_LEN];
1353 	int err;
1354 
1355 	err = mlxsw_core_listener_register(mlxsw_core, listener, priv);
1356 	if (err)
1357 		return err;
1358 
1359 	mlxsw_reg_hpkt_pack(hpkt_pl, listener->action, listener->trap_id,
1360 			    listener->trap_group, listener->is_ctrl);
1361 	err = mlxsw_reg_write(mlxsw_core,  MLXSW_REG(hpkt), hpkt_pl);
1362 	if (err)
1363 		goto err_trap_set;
1364 
1365 	return 0;
1366 
1367 err_trap_set:
1368 	mlxsw_core_listener_unregister(mlxsw_core, listener, priv);
1369 	return err;
1370 }
1371 EXPORT_SYMBOL(mlxsw_core_trap_register);
1372 
1373 void mlxsw_core_trap_unregister(struct mlxsw_core *mlxsw_core,
1374 				const struct mlxsw_listener *listener,
1375 				void *priv)
1376 {
1377 	char hpkt_pl[MLXSW_REG_HPKT_LEN];
1378 
1379 	if (!listener->is_event) {
1380 		mlxsw_reg_hpkt_pack(hpkt_pl, listener->unreg_action,
1381 				    listener->trap_id, listener->trap_group,
1382 				    listener->is_ctrl);
1383 		mlxsw_reg_write(mlxsw_core, MLXSW_REG(hpkt), hpkt_pl);
1384 	}
1385 
1386 	mlxsw_core_listener_unregister(mlxsw_core, listener, priv);
1387 }
1388 EXPORT_SYMBOL(mlxsw_core_trap_unregister);
1389 
1390 static u64 mlxsw_core_tid_get(struct mlxsw_core *mlxsw_core)
1391 {
1392 	return atomic64_inc_return(&mlxsw_core->emad.tid);
1393 }
1394 
1395 static int mlxsw_core_reg_access_emad(struct mlxsw_core *mlxsw_core,
1396 				      const struct mlxsw_reg_info *reg,
1397 				      char *payload,
1398 				      enum mlxsw_core_reg_access_type type,
1399 				      struct list_head *bulk_list,
1400 				      mlxsw_reg_trans_cb_t *cb,
1401 				      unsigned long cb_priv)
1402 {
1403 	u64 tid = mlxsw_core_tid_get(mlxsw_core);
1404 	struct mlxsw_reg_trans *trans;
1405 	int err;
1406 
1407 	trans = kzalloc(sizeof(*trans), GFP_KERNEL);
1408 	if (!trans)
1409 		return -ENOMEM;
1410 
1411 	err = mlxsw_emad_reg_access(mlxsw_core, reg, payload, type, trans,
1412 				    bulk_list, cb, cb_priv, tid);
1413 	if (err) {
1414 		kfree(trans);
1415 		return err;
1416 	}
1417 	return 0;
1418 }
1419 
1420 int mlxsw_reg_trans_query(struct mlxsw_core *mlxsw_core,
1421 			  const struct mlxsw_reg_info *reg, char *payload,
1422 			  struct list_head *bulk_list,
1423 			  mlxsw_reg_trans_cb_t *cb, unsigned long cb_priv)
1424 {
1425 	return mlxsw_core_reg_access_emad(mlxsw_core, reg, payload,
1426 					  MLXSW_CORE_REG_ACCESS_TYPE_QUERY,
1427 					  bulk_list, cb, cb_priv);
1428 }
1429 EXPORT_SYMBOL(mlxsw_reg_trans_query);
1430 
1431 int mlxsw_reg_trans_write(struct mlxsw_core *mlxsw_core,
1432 			  const struct mlxsw_reg_info *reg, char *payload,
1433 			  struct list_head *bulk_list,
1434 			  mlxsw_reg_trans_cb_t *cb, unsigned long cb_priv)
1435 {
1436 	return mlxsw_core_reg_access_emad(mlxsw_core, reg, payload,
1437 					  MLXSW_CORE_REG_ACCESS_TYPE_WRITE,
1438 					  bulk_list, cb, cb_priv);
1439 }
1440 EXPORT_SYMBOL(mlxsw_reg_trans_write);
1441 
1442 static int mlxsw_reg_trans_wait(struct mlxsw_reg_trans *trans)
1443 {
1444 	struct mlxsw_core *mlxsw_core = trans->core;
1445 	int err;
1446 
1447 	wait_for_completion(&trans->completion);
1448 	cancel_delayed_work_sync(&trans->timeout_dw);
1449 	err = trans->err;
1450 
1451 	if (trans->retries)
1452 		dev_warn(mlxsw_core->bus_info->dev, "EMAD retries (%d/%d) (tid=%llx)\n",
1453 			 trans->retries, MLXSW_EMAD_MAX_RETRY, trans->tid);
1454 	if (err)
1455 		dev_err(mlxsw_core->bus_info->dev, "EMAD reg access failed (tid=%llx,reg_id=%x(%s),type=%s,status=%x(%s))\n",
1456 			trans->tid, trans->reg->id,
1457 			mlxsw_reg_id_str(trans->reg->id),
1458 			mlxsw_core_reg_access_type_str(trans->type),
1459 			trans->emad_status,
1460 			mlxsw_emad_op_tlv_status_str(trans->emad_status));
1461 
1462 	list_del(&trans->bulk_list);
1463 	kfree_rcu(trans, rcu);
1464 	return err;
1465 }
1466 
1467 int mlxsw_reg_trans_bulk_wait(struct list_head *bulk_list)
1468 {
1469 	struct mlxsw_reg_trans *trans;
1470 	struct mlxsw_reg_trans *tmp;
1471 	int sum_err = 0;
1472 	int err;
1473 
1474 	list_for_each_entry_safe(trans, tmp, bulk_list, bulk_list) {
1475 		err = mlxsw_reg_trans_wait(trans);
1476 		if (err && sum_err == 0)
1477 			sum_err = err; /* first error to be returned */
1478 	}
1479 	return sum_err;
1480 }
1481 EXPORT_SYMBOL(mlxsw_reg_trans_bulk_wait);
1482 
1483 static int mlxsw_core_reg_access_cmd(struct mlxsw_core *mlxsw_core,
1484 				     const struct mlxsw_reg_info *reg,
1485 				     char *payload,
1486 				     enum mlxsw_core_reg_access_type type)
1487 {
1488 	enum mlxsw_emad_op_tlv_status status;
1489 	int err, n_retry;
1490 	bool reset_ok;
1491 	char *in_mbox, *out_mbox, *tmp;
1492 
1493 	dev_dbg(mlxsw_core->bus_info->dev, "Reg cmd access (reg_id=%x(%s),type=%s)\n",
1494 		reg->id, mlxsw_reg_id_str(reg->id),
1495 		mlxsw_core_reg_access_type_str(type));
1496 
1497 	in_mbox = mlxsw_cmd_mbox_alloc();
1498 	if (!in_mbox)
1499 		return -ENOMEM;
1500 
1501 	out_mbox = mlxsw_cmd_mbox_alloc();
1502 	if (!out_mbox) {
1503 		err = -ENOMEM;
1504 		goto free_in_mbox;
1505 	}
1506 
1507 	mlxsw_emad_pack_op_tlv(in_mbox, reg, type,
1508 			       mlxsw_core_tid_get(mlxsw_core));
1509 	tmp = in_mbox + MLXSW_EMAD_OP_TLV_LEN * sizeof(u32);
1510 	mlxsw_emad_pack_reg_tlv(tmp, reg, payload);
1511 
1512 	/* There is a special treatment needed for MRSR (reset) register.
1513 	 * The command interface will return error after the command
1514 	 * is executed, so tell the lower layer to expect it
1515 	 * and cope accordingly.
1516 	 */
1517 	reset_ok = reg->id == MLXSW_REG_MRSR_ID;
1518 
1519 	n_retry = 0;
1520 retry:
1521 	err = mlxsw_cmd_access_reg(mlxsw_core, reset_ok, in_mbox, out_mbox);
1522 	if (!err) {
1523 		err = mlxsw_emad_process_status(out_mbox, &status);
1524 		if (err) {
1525 			if (err == -EAGAIN && n_retry++ < MLXSW_EMAD_MAX_RETRY)
1526 				goto retry;
1527 			dev_err(mlxsw_core->bus_info->dev, "Reg cmd access status failed (status=%x(%s))\n",
1528 				status, mlxsw_emad_op_tlv_status_str(status));
1529 		}
1530 	}
1531 
1532 	if (!err)
1533 		memcpy(payload, mlxsw_emad_reg_payload(out_mbox),
1534 		       reg->len);
1535 
1536 	mlxsw_cmd_mbox_free(out_mbox);
1537 free_in_mbox:
1538 	mlxsw_cmd_mbox_free(in_mbox);
1539 	if (err)
1540 		dev_err(mlxsw_core->bus_info->dev, "Reg cmd access failed (reg_id=%x(%s),type=%s)\n",
1541 			reg->id, mlxsw_reg_id_str(reg->id),
1542 			mlxsw_core_reg_access_type_str(type));
1543 	return err;
1544 }
1545 
1546 static void mlxsw_core_reg_access_cb(struct mlxsw_core *mlxsw_core,
1547 				     char *payload, size_t payload_len,
1548 				     unsigned long cb_priv)
1549 {
1550 	char *orig_payload = (char *) cb_priv;
1551 
1552 	memcpy(orig_payload, payload, payload_len);
1553 }
1554 
1555 static int mlxsw_core_reg_access(struct mlxsw_core *mlxsw_core,
1556 				 const struct mlxsw_reg_info *reg,
1557 				 char *payload,
1558 				 enum mlxsw_core_reg_access_type type)
1559 {
1560 	LIST_HEAD(bulk_list);
1561 	int err;
1562 
1563 	/* During initialization EMAD interface is not available to us,
1564 	 * so we default to command interface. We switch to EMAD interface
1565 	 * after setting the appropriate traps.
1566 	 */
1567 	if (!mlxsw_core->emad.use_emad)
1568 		return mlxsw_core_reg_access_cmd(mlxsw_core, reg,
1569 						 payload, type);
1570 
1571 	err = mlxsw_core_reg_access_emad(mlxsw_core, reg,
1572 					 payload, type, &bulk_list,
1573 					 mlxsw_core_reg_access_cb,
1574 					 (unsigned long) payload);
1575 	if (err)
1576 		return err;
1577 	return mlxsw_reg_trans_bulk_wait(&bulk_list);
1578 }
1579 
1580 int mlxsw_reg_query(struct mlxsw_core *mlxsw_core,
1581 		    const struct mlxsw_reg_info *reg, char *payload)
1582 {
1583 	return mlxsw_core_reg_access(mlxsw_core, reg, payload,
1584 				     MLXSW_CORE_REG_ACCESS_TYPE_QUERY);
1585 }
1586 EXPORT_SYMBOL(mlxsw_reg_query);
1587 
1588 int mlxsw_reg_write(struct mlxsw_core *mlxsw_core,
1589 		    const struct mlxsw_reg_info *reg, char *payload)
1590 {
1591 	return mlxsw_core_reg_access(mlxsw_core, reg, payload,
1592 				     MLXSW_CORE_REG_ACCESS_TYPE_WRITE);
1593 }
1594 EXPORT_SYMBOL(mlxsw_reg_write);
1595 
1596 void mlxsw_core_skb_receive(struct mlxsw_core *mlxsw_core, struct sk_buff *skb,
1597 			    struct mlxsw_rx_info *rx_info)
1598 {
1599 	struct mlxsw_rx_listener_item *rxl_item;
1600 	const struct mlxsw_rx_listener *rxl;
1601 	u8 local_port;
1602 	bool found = false;
1603 
1604 	if (rx_info->is_lag) {
1605 		dev_dbg_ratelimited(mlxsw_core->bus_info->dev, "%s: lag_id = %d, lag_port_index = 0x%x\n",
1606 				    __func__, rx_info->u.lag_id,
1607 				    rx_info->trap_id);
1608 		/* Upper layer does not care if the skb came from LAG or not,
1609 		 * so just get the local_port for the lag port and push it up.
1610 		 */
1611 		local_port = mlxsw_core_lag_mapping_get(mlxsw_core,
1612 							rx_info->u.lag_id,
1613 							rx_info->lag_port_index);
1614 	} else {
1615 		local_port = rx_info->u.sys_port;
1616 	}
1617 
1618 	dev_dbg_ratelimited(mlxsw_core->bus_info->dev, "%s: local_port = %d, trap_id = 0x%x\n",
1619 			    __func__, local_port, rx_info->trap_id);
1620 
1621 	if ((rx_info->trap_id >= MLXSW_TRAP_ID_MAX) ||
1622 	    (local_port >= mlxsw_core->max_ports))
1623 		goto drop;
1624 
1625 	rcu_read_lock();
1626 	list_for_each_entry_rcu(rxl_item, &mlxsw_core->rx_listener_list, list) {
1627 		rxl = &rxl_item->rxl;
1628 		if ((rxl->local_port == MLXSW_PORT_DONT_CARE ||
1629 		     rxl->local_port == local_port) &&
1630 		    rxl->trap_id == rx_info->trap_id) {
1631 			found = true;
1632 			break;
1633 		}
1634 	}
1635 	rcu_read_unlock();
1636 	if (!found)
1637 		goto drop;
1638 
1639 	rxl->func(skb, local_port, rxl_item->priv);
1640 	return;
1641 
1642 drop:
1643 	dev_kfree_skb(skb);
1644 }
1645 EXPORT_SYMBOL(mlxsw_core_skb_receive);
1646 
1647 static int mlxsw_core_lag_mapping_index(struct mlxsw_core *mlxsw_core,
1648 					u16 lag_id, u8 port_index)
1649 {
1650 	return MLXSW_CORE_RES_GET(mlxsw_core, MAX_LAG_MEMBERS) * lag_id +
1651 	       port_index;
1652 }
1653 
1654 void mlxsw_core_lag_mapping_set(struct mlxsw_core *mlxsw_core,
1655 				u16 lag_id, u8 port_index, u8 local_port)
1656 {
1657 	int index = mlxsw_core_lag_mapping_index(mlxsw_core,
1658 						 lag_id, port_index);
1659 
1660 	mlxsw_core->lag.mapping[index] = local_port;
1661 }
1662 EXPORT_SYMBOL(mlxsw_core_lag_mapping_set);
1663 
1664 u8 mlxsw_core_lag_mapping_get(struct mlxsw_core *mlxsw_core,
1665 			      u16 lag_id, u8 port_index)
1666 {
1667 	int index = mlxsw_core_lag_mapping_index(mlxsw_core,
1668 						 lag_id, port_index);
1669 
1670 	return mlxsw_core->lag.mapping[index];
1671 }
1672 EXPORT_SYMBOL(mlxsw_core_lag_mapping_get);
1673 
1674 void mlxsw_core_lag_mapping_clear(struct mlxsw_core *mlxsw_core,
1675 				  u16 lag_id, u8 local_port)
1676 {
1677 	int i;
1678 
1679 	for (i = 0; i < MLXSW_CORE_RES_GET(mlxsw_core, MAX_LAG_MEMBERS); i++) {
1680 		int index = mlxsw_core_lag_mapping_index(mlxsw_core,
1681 							 lag_id, i);
1682 
1683 		if (mlxsw_core->lag.mapping[index] == local_port)
1684 			mlxsw_core->lag.mapping[index] = 0;
1685 	}
1686 }
1687 EXPORT_SYMBOL(mlxsw_core_lag_mapping_clear);
1688 
1689 bool mlxsw_core_res_valid(struct mlxsw_core *mlxsw_core,
1690 			  enum mlxsw_res_id res_id)
1691 {
1692 	return mlxsw_res_valid(&mlxsw_core->res, res_id);
1693 }
1694 EXPORT_SYMBOL(mlxsw_core_res_valid);
1695 
1696 u64 mlxsw_core_res_get(struct mlxsw_core *mlxsw_core,
1697 		       enum mlxsw_res_id res_id)
1698 {
1699 	return mlxsw_res_get(&mlxsw_core->res, res_id);
1700 }
1701 EXPORT_SYMBOL(mlxsw_core_res_get);
1702 
1703 int mlxsw_core_port_init(struct mlxsw_core *mlxsw_core, u8 local_port)
1704 {
1705 	struct devlink *devlink = priv_to_devlink(mlxsw_core);
1706 	struct mlxsw_core_port *mlxsw_core_port =
1707 					&mlxsw_core->ports[local_port];
1708 	struct devlink_port *devlink_port = &mlxsw_core_port->devlink_port;
1709 	int err;
1710 
1711 	mlxsw_core_port->local_port = local_port;
1712 	err = devlink_port_register(devlink, devlink_port, local_port);
1713 	if (err)
1714 		memset(mlxsw_core_port, 0, sizeof(*mlxsw_core_port));
1715 	return err;
1716 }
1717 EXPORT_SYMBOL(mlxsw_core_port_init);
1718 
1719 void mlxsw_core_port_fini(struct mlxsw_core *mlxsw_core, u8 local_port)
1720 {
1721 	struct mlxsw_core_port *mlxsw_core_port =
1722 					&mlxsw_core->ports[local_port];
1723 	struct devlink_port *devlink_port = &mlxsw_core_port->devlink_port;
1724 
1725 	devlink_port_unregister(devlink_port);
1726 	memset(mlxsw_core_port, 0, sizeof(*mlxsw_core_port));
1727 }
1728 EXPORT_SYMBOL(mlxsw_core_port_fini);
1729 
1730 void mlxsw_core_port_eth_set(struct mlxsw_core *mlxsw_core, u8 local_port,
1731 			     void *port_driver_priv, struct net_device *dev,
1732 			     u32 port_number, bool split,
1733 			     u32 split_port_subnumber)
1734 {
1735 	struct mlxsw_core_port *mlxsw_core_port =
1736 					&mlxsw_core->ports[local_port];
1737 	struct devlink_port *devlink_port = &mlxsw_core_port->devlink_port;
1738 
1739 	mlxsw_core_port->port_driver_priv = port_driver_priv;
1740 	devlink_port_attrs_set(devlink_port, DEVLINK_PORT_FLAVOUR_PHYSICAL,
1741 			       port_number, split, split_port_subnumber);
1742 	devlink_port_type_eth_set(devlink_port, dev);
1743 }
1744 EXPORT_SYMBOL(mlxsw_core_port_eth_set);
1745 
1746 void mlxsw_core_port_ib_set(struct mlxsw_core *mlxsw_core, u8 local_port,
1747 			    void *port_driver_priv)
1748 {
1749 	struct mlxsw_core_port *mlxsw_core_port =
1750 					&mlxsw_core->ports[local_port];
1751 	struct devlink_port *devlink_port = &mlxsw_core_port->devlink_port;
1752 
1753 	mlxsw_core_port->port_driver_priv = port_driver_priv;
1754 	devlink_port_type_ib_set(devlink_port, NULL);
1755 }
1756 EXPORT_SYMBOL(mlxsw_core_port_ib_set);
1757 
1758 void mlxsw_core_port_clear(struct mlxsw_core *mlxsw_core, u8 local_port,
1759 			   void *port_driver_priv)
1760 {
1761 	struct mlxsw_core_port *mlxsw_core_port =
1762 					&mlxsw_core->ports[local_port];
1763 	struct devlink_port *devlink_port = &mlxsw_core_port->devlink_port;
1764 
1765 	mlxsw_core_port->port_driver_priv = port_driver_priv;
1766 	devlink_port_type_clear(devlink_port);
1767 }
1768 EXPORT_SYMBOL(mlxsw_core_port_clear);
1769 
1770 enum devlink_port_type mlxsw_core_port_type_get(struct mlxsw_core *mlxsw_core,
1771 						u8 local_port)
1772 {
1773 	struct mlxsw_core_port *mlxsw_core_port =
1774 					&mlxsw_core->ports[local_port];
1775 	struct devlink_port *devlink_port = &mlxsw_core_port->devlink_port;
1776 
1777 	return devlink_port->type;
1778 }
1779 EXPORT_SYMBOL(mlxsw_core_port_type_get);
1780 
1781 int mlxsw_core_port_get_phys_port_name(struct mlxsw_core *mlxsw_core,
1782 				       u8 local_port, char *name, size_t len)
1783 {
1784 	struct mlxsw_core_port *mlxsw_core_port =
1785 					&mlxsw_core->ports[local_port];
1786 	struct devlink_port *devlink_port = &mlxsw_core_port->devlink_port;
1787 
1788 	return devlink_port_get_phys_port_name(devlink_port, name, len);
1789 }
1790 EXPORT_SYMBOL(mlxsw_core_port_get_phys_port_name);
1791 
1792 static void mlxsw_core_buf_dump_dbg(struct mlxsw_core *mlxsw_core,
1793 				    const char *buf, size_t size)
1794 {
1795 	__be32 *m = (__be32 *) buf;
1796 	int i;
1797 	int count = size / sizeof(__be32);
1798 
1799 	for (i = count - 1; i >= 0; i--)
1800 		if (m[i])
1801 			break;
1802 	i++;
1803 	count = i ? i : 1;
1804 	for (i = 0; i < count; i += 4)
1805 		dev_dbg(mlxsw_core->bus_info->dev, "%04x - %08x %08x %08x %08x\n",
1806 			i * 4, be32_to_cpu(m[i]), be32_to_cpu(m[i + 1]),
1807 			be32_to_cpu(m[i + 2]), be32_to_cpu(m[i + 3]));
1808 }
1809 
1810 int mlxsw_cmd_exec(struct mlxsw_core *mlxsw_core, u16 opcode, u8 opcode_mod,
1811 		   u32 in_mod, bool out_mbox_direct, bool reset_ok,
1812 		   char *in_mbox, size_t in_mbox_size,
1813 		   char *out_mbox, size_t out_mbox_size)
1814 {
1815 	u8 status;
1816 	int err;
1817 
1818 	BUG_ON(in_mbox_size % sizeof(u32) || out_mbox_size % sizeof(u32));
1819 	if (!mlxsw_core->bus->cmd_exec)
1820 		return -EOPNOTSUPP;
1821 
1822 	dev_dbg(mlxsw_core->bus_info->dev, "Cmd exec (opcode=%x(%s),opcode_mod=%x,in_mod=%x)\n",
1823 		opcode, mlxsw_cmd_opcode_str(opcode), opcode_mod, in_mod);
1824 	if (in_mbox) {
1825 		dev_dbg(mlxsw_core->bus_info->dev, "Input mailbox:\n");
1826 		mlxsw_core_buf_dump_dbg(mlxsw_core, in_mbox, in_mbox_size);
1827 	}
1828 
1829 	err = mlxsw_core->bus->cmd_exec(mlxsw_core->bus_priv, opcode,
1830 					opcode_mod, in_mod, out_mbox_direct,
1831 					in_mbox, in_mbox_size,
1832 					out_mbox, out_mbox_size, &status);
1833 
1834 	if (!err && out_mbox) {
1835 		dev_dbg(mlxsw_core->bus_info->dev, "Output mailbox:\n");
1836 		mlxsw_core_buf_dump_dbg(mlxsw_core, out_mbox, out_mbox_size);
1837 	}
1838 
1839 	if (reset_ok && err == -EIO &&
1840 	    status == MLXSW_CMD_STATUS_RUNNING_RESET) {
1841 		err = 0;
1842 	} else if (err == -EIO && status != MLXSW_CMD_STATUS_OK) {
1843 		dev_err(mlxsw_core->bus_info->dev, "Cmd exec failed (opcode=%x(%s),opcode_mod=%x,in_mod=%x,status=%x(%s))\n",
1844 			opcode, mlxsw_cmd_opcode_str(opcode), opcode_mod,
1845 			in_mod, status, mlxsw_cmd_status_str(status));
1846 	} else if (err == -ETIMEDOUT) {
1847 		dev_err(mlxsw_core->bus_info->dev, "Cmd exec timed-out (opcode=%x(%s),opcode_mod=%x,in_mod=%x)\n",
1848 			opcode, mlxsw_cmd_opcode_str(opcode), opcode_mod,
1849 			in_mod);
1850 	}
1851 
1852 	return err;
1853 }
1854 EXPORT_SYMBOL(mlxsw_cmd_exec);
1855 
1856 int mlxsw_core_schedule_dw(struct delayed_work *dwork, unsigned long delay)
1857 {
1858 	return queue_delayed_work(mlxsw_wq, dwork, delay);
1859 }
1860 EXPORT_SYMBOL(mlxsw_core_schedule_dw);
1861 
1862 bool mlxsw_core_schedule_work(struct work_struct *work)
1863 {
1864 	return queue_work(mlxsw_owq, work);
1865 }
1866 EXPORT_SYMBOL(mlxsw_core_schedule_work);
1867 
1868 void mlxsw_core_flush_owq(void)
1869 {
1870 	flush_workqueue(mlxsw_owq);
1871 }
1872 EXPORT_SYMBOL(mlxsw_core_flush_owq);
1873 
1874 int mlxsw_core_kvd_sizes_get(struct mlxsw_core *mlxsw_core,
1875 			     const struct mlxsw_config_profile *profile,
1876 			     u64 *p_single_size, u64 *p_double_size,
1877 			     u64 *p_linear_size)
1878 {
1879 	struct mlxsw_driver *driver = mlxsw_core->driver;
1880 
1881 	if (!driver->kvd_sizes_get)
1882 		return -EINVAL;
1883 
1884 	return driver->kvd_sizes_get(mlxsw_core, profile,
1885 				     p_single_size, p_double_size,
1886 				     p_linear_size);
1887 }
1888 EXPORT_SYMBOL(mlxsw_core_kvd_sizes_get);
1889 
1890 static int __init mlxsw_core_module_init(void)
1891 {
1892 	int err;
1893 
1894 	mlxsw_wq = alloc_workqueue(mlxsw_core_driver_name, WQ_MEM_RECLAIM, 0);
1895 	if (!mlxsw_wq)
1896 		return -ENOMEM;
1897 	mlxsw_owq = alloc_ordered_workqueue("%s_ordered", WQ_MEM_RECLAIM,
1898 					    mlxsw_core_driver_name);
1899 	if (!mlxsw_owq) {
1900 		err = -ENOMEM;
1901 		goto err_alloc_ordered_workqueue;
1902 	}
1903 	return 0;
1904 
1905 err_alloc_ordered_workqueue:
1906 	destroy_workqueue(mlxsw_wq);
1907 	return err;
1908 }
1909 
1910 static void __exit mlxsw_core_module_exit(void)
1911 {
1912 	destroy_workqueue(mlxsw_owq);
1913 	destroy_workqueue(mlxsw_wq);
1914 }
1915 
1916 module_init(mlxsw_core_module_init);
1917 module_exit(mlxsw_core_module_exit);
1918 
1919 MODULE_LICENSE("Dual BSD/GPL");
1920 MODULE_AUTHOR("Jiri Pirko <jiri@mellanox.com>");
1921 MODULE_DESCRIPTION("Mellanox switch device core driver");
1922