1 // SPDX-License-Identifier: BSD-3-Clause OR GPL-2.0
2 /* Copyright (c) 2015-2018 Mellanox Technologies. All rights reserved */
3 
4 #include <linux/kernel.h>
5 #include <linux/module.h>
6 #include <linux/device.h>
7 #include <linux/export.h>
8 #include <linux/err.h>
9 #include <linux/if_link.h>
10 #include <linux/netdevice.h>
11 #include <linux/completion.h>
12 #include <linux/skbuff.h>
13 #include <linux/etherdevice.h>
14 #include <linux/types.h>
15 #include <linux/string.h>
16 #include <linux/gfp.h>
17 #include <linux/random.h>
18 #include <linux/jiffies.h>
19 #include <linux/mutex.h>
20 #include <linux/rcupdate.h>
21 #include <linux/slab.h>
22 #include <linux/workqueue.h>
23 #include <asm/byteorder.h>
24 #include <net/devlink.h>
25 #include <trace/events/devlink.h>
26 
27 #include "core.h"
28 #include "item.h"
29 #include "cmd.h"
30 #include "port.h"
31 #include "trap.h"
32 #include "emad.h"
33 #include "reg.h"
34 #include "resources.h"
35 
36 static LIST_HEAD(mlxsw_core_driver_list);
37 static DEFINE_SPINLOCK(mlxsw_core_driver_list_lock);
38 
39 static const char mlxsw_core_driver_name[] = "mlxsw_core";
40 
41 static struct workqueue_struct *mlxsw_wq;
42 static struct workqueue_struct *mlxsw_owq;
43 
44 struct mlxsw_core_port {
45 	struct devlink_port devlink_port;
46 	void *port_driver_priv;
47 	u8 local_port;
48 };
49 
50 void *mlxsw_core_port_driver_priv(struct mlxsw_core_port *mlxsw_core_port)
51 {
52 	return mlxsw_core_port->port_driver_priv;
53 }
54 EXPORT_SYMBOL(mlxsw_core_port_driver_priv);
55 
56 static bool mlxsw_core_port_check(struct mlxsw_core_port *mlxsw_core_port)
57 {
58 	return mlxsw_core_port->port_driver_priv != NULL;
59 }
60 
61 struct mlxsw_core {
62 	struct mlxsw_driver *driver;
63 	const struct mlxsw_bus *bus;
64 	void *bus_priv;
65 	const struct mlxsw_bus_info *bus_info;
66 	struct workqueue_struct *emad_wq;
67 	struct list_head rx_listener_list;
68 	struct list_head event_listener_list;
69 	struct {
70 		atomic64_t tid;
71 		struct list_head trans_list;
72 		spinlock_t trans_list_lock; /* protects trans_list writes */
73 		bool use_emad;
74 	} emad;
75 	struct {
76 		u8 *mapping; /* lag_id+port_index to local_port mapping */
77 	} lag;
78 	struct mlxsw_res res;
79 	struct mlxsw_hwmon *hwmon;
80 	struct mlxsw_thermal *thermal;
81 	struct mlxsw_core_port *ports;
82 	unsigned int max_ports;
83 	bool reload_fail;
84 	bool fw_flash_in_progress;
85 	unsigned long driver_priv[0];
86 	/* driver_priv has to be always the last item */
87 };
88 
89 #define MLXSW_PORT_MAX_PORTS_DEFAULT	0x40
90 
91 static int mlxsw_ports_init(struct mlxsw_core *mlxsw_core)
92 {
93 	/* Switch ports are numbered from 1 to queried value */
94 	if (MLXSW_CORE_RES_VALID(mlxsw_core, MAX_SYSTEM_PORT))
95 		mlxsw_core->max_ports = MLXSW_CORE_RES_GET(mlxsw_core,
96 							   MAX_SYSTEM_PORT) + 1;
97 	else
98 		mlxsw_core->max_ports = MLXSW_PORT_MAX_PORTS_DEFAULT + 1;
99 
100 	mlxsw_core->ports = kcalloc(mlxsw_core->max_ports,
101 				    sizeof(struct mlxsw_core_port), GFP_KERNEL);
102 	if (!mlxsw_core->ports)
103 		return -ENOMEM;
104 
105 	return 0;
106 }
107 
108 static void mlxsw_ports_fini(struct mlxsw_core *mlxsw_core)
109 {
110 	kfree(mlxsw_core->ports);
111 }
112 
113 unsigned int mlxsw_core_max_ports(const struct mlxsw_core *mlxsw_core)
114 {
115 	return mlxsw_core->max_ports;
116 }
117 EXPORT_SYMBOL(mlxsw_core_max_ports);
118 
119 void *mlxsw_core_driver_priv(struct mlxsw_core *mlxsw_core)
120 {
121 	return mlxsw_core->driver_priv;
122 }
123 EXPORT_SYMBOL(mlxsw_core_driver_priv);
124 
125 struct mlxsw_rx_listener_item {
126 	struct list_head list;
127 	struct mlxsw_rx_listener rxl;
128 	void *priv;
129 };
130 
131 struct mlxsw_event_listener_item {
132 	struct list_head list;
133 	struct mlxsw_event_listener el;
134 	void *priv;
135 };
136 
137 /******************
138  * EMAD processing
139  ******************/
140 
141 /* emad_eth_hdr_dmac
142  * Destination MAC in EMAD's Ethernet header.
143  * Must be set to 01:02:c9:00:00:01
144  */
145 MLXSW_ITEM_BUF(emad, eth_hdr, dmac, 0x00, 6);
146 
147 /* emad_eth_hdr_smac
148  * Source MAC in EMAD's Ethernet header.
149  * Must be set to 00:02:c9:01:02:03
150  */
151 MLXSW_ITEM_BUF(emad, eth_hdr, smac, 0x06, 6);
152 
153 /* emad_eth_hdr_ethertype
154  * Ethertype in EMAD's Ethernet header.
155  * Must be set to 0x8932
156  */
157 MLXSW_ITEM32(emad, eth_hdr, ethertype, 0x0C, 16, 16);
158 
159 /* emad_eth_hdr_mlx_proto
160  * Mellanox protocol.
161  * Must be set to 0x0.
162  */
163 MLXSW_ITEM32(emad, eth_hdr, mlx_proto, 0x0C, 8, 8);
164 
165 /* emad_eth_hdr_ver
166  * Mellanox protocol version.
167  * Must be set to 0x0.
168  */
169 MLXSW_ITEM32(emad, eth_hdr, ver, 0x0C, 4, 4);
170 
171 /* emad_op_tlv_type
172  * Type of the TLV.
173  * Must be set to 0x1 (operation TLV).
174  */
175 MLXSW_ITEM32(emad, op_tlv, type, 0x00, 27, 5);
176 
177 /* emad_op_tlv_len
178  * Length of the operation TLV in u32.
179  * Must be set to 0x4.
180  */
181 MLXSW_ITEM32(emad, op_tlv, len, 0x00, 16, 11);
182 
183 /* emad_op_tlv_dr
184  * Direct route bit. Setting to 1 indicates the EMAD is a direct route
185  * EMAD. DR TLV must follow.
186  *
187  * Note: Currently not supported and must not be set.
188  */
189 MLXSW_ITEM32(emad, op_tlv, dr, 0x00, 15, 1);
190 
191 /* emad_op_tlv_status
192  * Returned status in case of EMAD response. Must be set to 0 in case
193  * of EMAD request.
194  * 0x0 - success
195  * 0x1 - device is busy. Requester should retry
196  * 0x2 - Mellanox protocol version not supported
197  * 0x3 - unknown TLV
198  * 0x4 - register not supported
199  * 0x5 - operation class not supported
200  * 0x6 - EMAD method not supported
201  * 0x7 - bad parameter (e.g. port out of range)
202  * 0x8 - resource not available
203  * 0x9 - message receipt acknowledgment. Requester should retry
204  * 0x70 - internal error
205  */
206 MLXSW_ITEM32(emad, op_tlv, status, 0x00, 8, 7);
207 
208 /* emad_op_tlv_register_id
209  * Register ID of register within register TLV.
210  */
211 MLXSW_ITEM32(emad, op_tlv, register_id, 0x04, 16, 16);
212 
213 /* emad_op_tlv_r
214  * Response bit. Setting to 1 indicates Response, otherwise request.
215  */
216 MLXSW_ITEM32(emad, op_tlv, r, 0x04, 15, 1);
217 
218 /* emad_op_tlv_method
219  * EMAD method type.
220  * 0x1 - query
221  * 0x2 - write
222  * 0x3 - send (currently not supported)
223  * 0x4 - event
224  */
225 MLXSW_ITEM32(emad, op_tlv, method, 0x04, 8, 7);
226 
227 /* emad_op_tlv_class
228  * EMAD operation class. Must be set to 0x1 (REG_ACCESS).
229  */
230 MLXSW_ITEM32(emad, op_tlv, class, 0x04, 0, 8);
231 
232 /* emad_op_tlv_tid
233  * EMAD transaction ID. Used for pairing request and response EMADs.
234  */
235 MLXSW_ITEM64(emad, op_tlv, tid, 0x08, 0, 64);
236 
237 /* emad_reg_tlv_type
238  * Type of the TLV.
239  * Must be set to 0x3 (register TLV).
240  */
241 MLXSW_ITEM32(emad, reg_tlv, type, 0x00, 27, 5);
242 
243 /* emad_reg_tlv_len
244  * Length of the operation TLV in u32.
245  */
246 MLXSW_ITEM32(emad, reg_tlv, len, 0x00, 16, 11);
247 
248 /* emad_end_tlv_type
249  * Type of the TLV.
250  * Must be set to 0x0 (end TLV).
251  */
252 MLXSW_ITEM32(emad, end_tlv, type, 0x00, 27, 5);
253 
254 /* emad_end_tlv_len
255  * Length of the end TLV in u32.
256  * Must be set to 1.
257  */
258 MLXSW_ITEM32(emad, end_tlv, len, 0x00, 16, 11);
259 
260 enum mlxsw_core_reg_access_type {
261 	MLXSW_CORE_REG_ACCESS_TYPE_QUERY,
262 	MLXSW_CORE_REG_ACCESS_TYPE_WRITE,
263 };
264 
265 static inline const char *
266 mlxsw_core_reg_access_type_str(enum mlxsw_core_reg_access_type type)
267 {
268 	switch (type) {
269 	case MLXSW_CORE_REG_ACCESS_TYPE_QUERY:
270 		return "query";
271 	case MLXSW_CORE_REG_ACCESS_TYPE_WRITE:
272 		return "write";
273 	}
274 	BUG();
275 }
276 
277 static void mlxsw_emad_pack_end_tlv(char *end_tlv)
278 {
279 	mlxsw_emad_end_tlv_type_set(end_tlv, MLXSW_EMAD_TLV_TYPE_END);
280 	mlxsw_emad_end_tlv_len_set(end_tlv, MLXSW_EMAD_END_TLV_LEN);
281 }
282 
283 static void mlxsw_emad_pack_reg_tlv(char *reg_tlv,
284 				    const struct mlxsw_reg_info *reg,
285 				    char *payload)
286 {
287 	mlxsw_emad_reg_tlv_type_set(reg_tlv, MLXSW_EMAD_TLV_TYPE_REG);
288 	mlxsw_emad_reg_tlv_len_set(reg_tlv, reg->len / sizeof(u32) + 1);
289 	memcpy(reg_tlv + sizeof(u32), payload, reg->len);
290 }
291 
292 static void mlxsw_emad_pack_op_tlv(char *op_tlv,
293 				   const struct mlxsw_reg_info *reg,
294 				   enum mlxsw_core_reg_access_type type,
295 				   u64 tid)
296 {
297 	mlxsw_emad_op_tlv_type_set(op_tlv, MLXSW_EMAD_TLV_TYPE_OP);
298 	mlxsw_emad_op_tlv_len_set(op_tlv, MLXSW_EMAD_OP_TLV_LEN);
299 	mlxsw_emad_op_tlv_dr_set(op_tlv, 0);
300 	mlxsw_emad_op_tlv_status_set(op_tlv, 0);
301 	mlxsw_emad_op_tlv_register_id_set(op_tlv, reg->id);
302 	mlxsw_emad_op_tlv_r_set(op_tlv, MLXSW_EMAD_OP_TLV_REQUEST);
303 	if (type == MLXSW_CORE_REG_ACCESS_TYPE_QUERY)
304 		mlxsw_emad_op_tlv_method_set(op_tlv,
305 					     MLXSW_EMAD_OP_TLV_METHOD_QUERY);
306 	else
307 		mlxsw_emad_op_tlv_method_set(op_tlv,
308 					     MLXSW_EMAD_OP_TLV_METHOD_WRITE);
309 	mlxsw_emad_op_tlv_class_set(op_tlv,
310 				    MLXSW_EMAD_OP_TLV_CLASS_REG_ACCESS);
311 	mlxsw_emad_op_tlv_tid_set(op_tlv, tid);
312 }
313 
314 static int mlxsw_emad_construct_eth_hdr(struct sk_buff *skb)
315 {
316 	char *eth_hdr = skb_push(skb, MLXSW_EMAD_ETH_HDR_LEN);
317 
318 	mlxsw_emad_eth_hdr_dmac_memcpy_to(eth_hdr, MLXSW_EMAD_EH_DMAC);
319 	mlxsw_emad_eth_hdr_smac_memcpy_to(eth_hdr, MLXSW_EMAD_EH_SMAC);
320 	mlxsw_emad_eth_hdr_ethertype_set(eth_hdr, MLXSW_EMAD_EH_ETHERTYPE);
321 	mlxsw_emad_eth_hdr_mlx_proto_set(eth_hdr, MLXSW_EMAD_EH_MLX_PROTO);
322 	mlxsw_emad_eth_hdr_ver_set(eth_hdr, MLXSW_EMAD_EH_PROTO_VERSION);
323 
324 	skb_reset_mac_header(skb);
325 
326 	return 0;
327 }
328 
329 static void mlxsw_emad_construct(struct sk_buff *skb,
330 				 const struct mlxsw_reg_info *reg,
331 				 char *payload,
332 				 enum mlxsw_core_reg_access_type type,
333 				 u64 tid)
334 {
335 	char *buf;
336 
337 	buf = skb_push(skb, MLXSW_EMAD_END_TLV_LEN * sizeof(u32));
338 	mlxsw_emad_pack_end_tlv(buf);
339 
340 	buf = skb_push(skb, reg->len + sizeof(u32));
341 	mlxsw_emad_pack_reg_tlv(buf, reg, payload);
342 
343 	buf = skb_push(skb, MLXSW_EMAD_OP_TLV_LEN * sizeof(u32));
344 	mlxsw_emad_pack_op_tlv(buf, reg, type, tid);
345 
346 	mlxsw_emad_construct_eth_hdr(skb);
347 }
348 
349 static char *mlxsw_emad_op_tlv(const struct sk_buff *skb)
350 {
351 	return ((char *) (skb->data + MLXSW_EMAD_ETH_HDR_LEN));
352 }
353 
354 static char *mlxsw_emad_reg_tlv(const struct sk_buff *skb)
355 {
356 	return ((char *) (skb->data + MLXSW_EMAD_ETH_HDR_LEN +
357 				      MLXSW_EMAD_OP_TLV_LEN * sizeof(u32)));
358 }
359 
360 static char *mlxsw_emad_reg_payload(const char *op_tlv)
361 {
362 	return ((char *) (op_tlv + (MLXSW_EMAD_OP_TLV_LEN + 1) * sizeof(u32)));
363 }
364 
365 static u64 mlxsw_emad_get_tid(const struct sk_buff *skb)
366 {
367 	char *op_tlv;
368 
369 	op_tlv = mlxsw_emad_op_tlv(skb);
370 	return mlxsw_emad_op_tlv_tid_get(op_tlv);
371 }
372 
373 static bool mlxsw_emad_is_resp(const struct sk_buff *skb)
374 {
375 	char *op_tlv;
376 
377 	op_tlv = mlxsw_emad_op_tlv(skb);
378 	return (mlxsw_emad_op_tlv_r_get(op_tlv) == MLXSW_EMAD_OP_TLV_RESPONSE);
379 }
380 
381 static int mlxsw_emad_process_status(char *op_tlv,
382 				     enum mlxsw_emad_op_tlv_status *p_status)
383 {
384 	*p_status = mlxsw_emad_op_tlv_status_get(op_tlv);
385 
386 	switch (*p_status) {
387 	case MLXSW_EMAD_OP_TLV_STATUS_SUCCESS:
388 		return 0;
389 	case MLXSW_EMAD_OP_TLV_STATUS_BUSY:
390 	case MLXSW_EMAD_OP_TLV_STATUS_MESSAGE_RECEIPT_ACK:
391 		return -EAGAIN;
392 	case MLXSW_EMAD_OP_TLV_STATUS_VERSION_NOT_SUPPORTED:
393 	case MLXSW_EMAD_OP_TLV_STATUS_UNKNOWN_TLV:
394 	case MLXSW_EMAD_OP_TLV_STATUS_REGISTER_NOT_SUPPORTED:
395 	case MLXSW_EMAD_OP_TLV_STATUS_CLASS_NOT_SUPPORTED:
396 	case MLXSW_EMAD_OP_TLV_STATUS_METHOD_NOT_SUPPORTED:
397 	case MLXSW_EMAD_OP_TLV_STATUS_BAD_PARAMETER:
398 	case MLXSW_EMAD_OP_TLV_STATUS_RESOURCE_NOT_AVAILABLE:
399 	case MLXSW_EMAD_OP_TLV_STATUS_INTERNAL_ERROR:
400 	default:
401 		return -EIO;
402 	}
403 }
404 
405 static int
406 mlxsw_emad_process_status_skb(struct sk_buff *skb,
407 			      enum mlxsw_emad_op_tlv_status *p_status)
408 {
409 	return mlxsw_emad_process_status(mlxsw_emad_op_tlv(skb), p_status);
410 }
411 
412 struct mlxsw_reg_trans {
413 	struct list_head list;
414 	struct list_head bulk_list;
415 	struct mlxsw_core *core;
416 	struct sk_buff *tx_skb;
417 	struct mlxsw_tx_info tx_info;
418 	struct delayed_work timeout_dw;
419 	unsigned int retries;
420 	u64 tid;
421 	struct completion completion;
422 	atomic_t active;
423 	mlxsw_reg_trans_cb_t *cb;
424 	unsigned long cb_priv;
425 	const struct mlxsw_reg_info *reg;
426 	enum mlxsw_core_reg_access_type type;
427 	int err;
428 	enum mlxsw_emad_op_tlv_status emad_status;
429 	struct rcu_head rcu;
430 };
431 
432 #define MLXSW_EMAD_TIMEOUT_DURING_FW_FLASH_MS	3000
433 #define MLXSW_EMAD_TIMEOUT_MS			200
434 
435 static void mlxsw_emad_trans_timeout_schedule(struct mlxsw_reg_trans *trans)
436 {
437 	unsigned long timeout = msecs_to_jiffies(MLXSW_EMAD_TIMEOUT_MS);
438 
439 	if (trans->core->fw_flash_in_progress)
440 		timeout = msecs_to_jiffies(MLXSW_EMAD_TIMEOUT_DURING_FW_FLASH_MS);
441 
442 	queue_delayed_work(trans->core->emad_wq, &trans->timeout_dw, timeout);
443 }
444 
445 static int mlxsw_emad_transmit(struct mlxsw_core *mlxsw_core,
446 			       struct mlxsw_reg_trans *trans)
447 {
448 	struct sk_buff *skb;
449 	int err;
450 
451 	skb = skb_copy(trans->tx_skb, GFP_KERNEL);
452 	if (!skb)
453 		return -ENOMEM;
454 
455 	trace_devlink_hwmsg(priv_to_devlink(mlxsw_core), false, 0,
456 			    skb->data + mlxsw_core->driver->txhdr_len,
457 			    skb->len - mlxsw_core->driver->txhdr_len);
458 
459 	atomic_set(&trans->active, 1);
460 	err = mlxsw_core_skb_transmit(mlxsw_core, skb, &trans->tx_info);
461 	if (err) {
462 		dev_kfree_skb(skb);
463 		return err;
464 	}
465 	mlxsw_emad_trans_timeout_schedule(trans);
466 	return 0;
467 }
468 
469 static void mlxsw_emad_trans_finish(struct mlxsw_reg_trans *trans, int err)
470 {
471 	struct mlxsw_core *mlxsw_core = trans->core;
472 
473 	dev_kfree_skb(trans->tx_skb);
474 	spin_lock_bh(&mlxsw_core->emad.trans_list_lock);
475 	list_del_rcu(&trans->list);
476 	spin_unlock_bh(&mlxsw_core->emad.trans_list_lock);
477 	trans->err = err;
478 	complete(&trans->completion);
479 }
480 
481 static void mlxsw_emad_transmit_retry(struct mlxsw_core *mlxsw_core,
482 				      struct mlxsw_reg_trans *trans)
483 {
484 	int err;
485 
486 	if (trans->retries < MLXSW_EMAD_MAX_RETRY) {
487 		trans->retries++;
488 		err = mlxsw_emad_transmit(trans->core, trans);
489 		if (err == 0)
490 			return;
491 	} else {
492 		err = -EIO;
493 	}
494 	mlxsw_emad_trans_finish(trans, err);
495 }
496 
497 static void mlxsw_emad_trans_timeout_work(struct work_struct *work)
498 {
499 	struct mlxsw_reg_trans *trans = container_of(work,
500 						     struct mlxsw_reg_trans,
501 						     timeout_dw.work);
502 
503 	if (!atomic_dec_and_test(&trans->active))
504 		return;
505 
506 	mlxsw_emad_transmit_retry(trans->core, trans);
507 }
508 
509 static void mlxsw_emad_process_response(struct mlxsw_core *mlxsw_core,
510 					struct mlxsw_reg_trans *trans,
511 					struct sk_buff *skb)
512 {
513 	int err;
514 
515 	if (!atomic_dec_and_test(&trans->active))
516 		return;
517 
518 	err = mlxsw_emad_process_status_skb(skb, &trans->emad_status);
519 	if (err == -EAGAIN) {
520 		mlxsw_emad_transmit_retry(mlxsw_core, trans);
521 	} else {
522 		if (err == 0) {
523 			char *op_tlv = mlxsw_emad_op_tlv(skb);
524 
525 			if (trans->cb)
526 				trans->cb(mlxsw_core,
527 					  mlxsw_emad_reg_payload(op_tlv),
528 					  trans->reg->len, trans->cb_priv);
529 		}
530 		mlxsw_emad_trans_finish(trans, err);
531 	}
532 }
533 
534 /* called with rcu read lock held */
535 static void mlxsw_emad_rx_listener_func(struct sk_buff *skb, u8 local_port,
536 					void *priv)
537 {
538 	struct mlxsw_core *mlxsw_core = priv;
539 	struct mlxsw_reg_trans *trans;
540 
541 	trace_devlink_hwmsg(priv_to_devlink(mlxsw_core), true, 0,
542 			    skb->data, skb->len);
543 
544 	if (!mlxsw_emad_is_resp(skb))
545 		goto free_skb;
546 
547 	list_for_each_entry_rcu(trans, &mlxsw_core->emad.trans_list, list) {
548 		if (mlxsw_emad_get_tid(skb) == trans->tid) {
549 			mlxsw_emad_process_response(mlxsw_core, trans, skb);
550 			break;
551 		}
552 	}
553 
554 free_skb:
555 	dev_kfree_skb(skb);
556 }
557 
558 static const struct mlxsw_listener mlxsw_emad_rx_listener =
559 	MLXSW_RXL(mlxsw_emad_rx_listener_func, ETHEMAD, TRAP_TO_CPU, false,
560 		  EMAD, DISCARD);
561 
562 static int mlxsw_emad_init(struct mlxsw_core *mlxsw_core)
563 {
564 	struct workqueue_struct *emad_wq;
565 	u64 tid;
566 	int err;
567 
568 	if (!(mlxsw_core->bus->features & MLXSW_BUS_F_TXRX))
569 		return 0;
570 
571 	emad_wq = alloc_workqueue("mlxsw_core_emad", WQ_MEM_RECLAIM, 0);
572 	if (!emad_wq)
573 		return -ENOMEM;
574 	mlxsw_core->emad_wq = emad_wq;
575 
576 	/* Set the upper 32 bits of the transaction ID field to a random
577 	 * number. This allows us to discard EMADs addressed to other
578 	 * devices.
579 	 */
580 	get_random_bytes(&tid, 4);
581 	tid <<= 32;
582 	atomic64_set(&mlxsw_core->emad.tid, tid);
583 
584 	INIT_LIST_HEAD(&mlxsw_core->emad.trans_list);
585 	spin_lock_init(&mlxsw_core->emad.trans_list_lock);
586 
587 	err = mlxsw_core_trap_register(mlxsw_core, &mlxsw_emad_rx_listener,
588 				       mlxsw_core);
589 	if (err)
590 		return err;
591 
592 	err = mlxsw_core->driver->basic_trap_groups_set(mlxsw_core);
593 	if (err)
594 		goto err_emad_trap_set;
595 	mlxsw_core->emad.use_emad = true;
596 
597 	return 0;
598 
599 err_emad_trap_set:
600 	mlxsw_core_trap_unregister(mlxsw_core, &mlxsw_emad_rx_listener,
601 				   mlxsw_core);
602 	destroy_workqueue(mlxsw_core->emad_wq);
603 	return err;
604 }
605 
606 static void mlxsw_emad_fini(struct mlxsw_core *mlxsw_core)
607 {
608 
609 	if (!(mlxsw_core->bus->features & MLXSW_BUS_F_TXRX))
610 		return;
611 
612 	mlxsw_core->emad.use_emad = false;
613 	mlxsw_core_trap_unregister(mlxsw_core, &mlxsw_emad_rx_listener,
614 				   mlxsw_core);
615 	destroy_workqueue(mlxsw_core->emad_wq);
616 }
617 
618 static struct sk_buff *mlxsw_emad_alloc(const struct mlxsw_core *mlxsw_core,
619 					u16 reg_len)
620 {
621 	struct sk_buff *skb;
622 	u16 emad_len;
623 
624 	emad_len = (reg_len + sizeof(u32) + MLXSW_EMAD_ETH_HDR_LEN +
625 		    (MLXSW_EMAD_OP_TLV_LEN + MLXSW_EMAD_END_TLV_LEN) *
626 		    sizeof(u32) + mlxsw_core->driver->txhdr_len);
627 	if (emad_len > MLXSW_EMAD_MAX_FRAME_LEN)
628 		return NULL;
629 
630 	skb = netdev_alloc_skb(NULL, emad_len);
631 	if (!skb)
632 		return NULL;
633 	memset(skb->data, 0, emad_len);
634 	skb_reserve(skb, emad_len);
635 
636 	return skb;
637 }
638 
639 static int mlxsw_emad_reg_access(struct mlxsw_core *mlxsw_core,
640 				 const struct mlxsw_reg_info *reg,
641 				 char *payload,
642 				 enum mlxsw_core_reg_access_type type,
643 				 struct mlxsw_reg_trans *trans,
644 				 struct list_head *bulk_list,
645 				 mlxsw_reg_trans_cb_t *cb,
646 				 unsigned long cb_priv, u64 tid)
647 {
648 	struct sk_buff *skb;
649 	int err;
650 
651 	dev_dbg(mlxsw_core->bus_info->dev, "EMAD reg access (tid=%llx,reg_id=%x(%s),type=%s)\n",
652 		tid, reg->id, mlxsw_reg_id_str(reg->id),
653 		mlxsw_core_reg_access_type_str(type));
654 
655 	skb = mlxsw_emad_alloc(mlxsw_core, reg->len);
656 	if (!skb)
657 		return -ENOMEM;
658 
659 	list_add_tail(&trans->bulk_list, bulk_list);
660 	trans->core = mlxsw_core;
661 	trans->tx_skb = skb;
662 	trans->tx_info.local_port = MLXSW_PORT_CPU_PORT;
663 	trans->tx_info.is_emad = true;
664 	INIT_DELAYED_WORK(&trans->timeout_dw, mlxsw_emad_trans_timeout_work);
665 	trans->tid = tid;
666 	init_completion(&trans->completion);
667 	trans->cb = cb;
668 	trans->cb_priv = cb_priv;
669 	trans->reg = reg;
670 	trans->type = type;
671 
672 	mlxsw_emad_construct(skb, reg, payload, type, trans->tid);
673 	mlxsw_core->driver->txhdr_construct(skb, &trans->tx_info);
674 
675 	spin_lock_bh(&mlxsw_core->emad.trans_list_lock);
676 	list_add_tail_rcu(&trans->list, &mlxsw_core->emad.trans_list);
677 	spin_unlock_bh(&mlxsw_core->emad.trans_list_lock);
678 	err = mlxsw_emad_transmit(mlxsw_core, trans);
679 	if (err)
680 		goto err_out;
681 	return 0;
682 
683 err_out:
684 	spin_lock_bh(&mlxsw_core->emad.trans_list_lock);
685 	list_del_rcu(&trans->list);
686 	spin_unlock_bh(&mlxsw_core->emad.trans_list_lock);
687 	list_del(&trans->bulk_list);
688 	dev_kfree_skb(trans->tx_skb);
689 	return err;
690 }
691 
692 /*****************
693  * Core functions
694  *****************/
695 
696 int mlxsw_core_driver_register(struct mlxsw_driver *mlxsw_driver)
697 {
698 	spin_lock(&mlxsw_core_driver_list_lock);
699 	list_add_tail(&mlxsw_driver->list, &mlxsw_core_driver_list);
700 	spin_unlock(&mlxsw_core_driver_list_lock);
701 	return 0;
702 }
703 EXPORT_SYMBOL(mlxsw_core_driver_register);
704 
705 void mlxsw_core_driver_unregister(struct mlxsw_driver *mlxsw_driver)
706 {
707 	spin_lock(&mlxsw_core_driver_list_lock);
708 	list_del(&mlxsw_driver->list);
709 	spin_unlock(&mlxsw_core_driver_list_lock);
710 }
711 EXPORT_SYMBOL(mlxsw_core_driver_unregister);
712 
713 static struct mlxsw_driver *__driver_find(const char *kind)
714 {
715 	struct mlxsw_driver *mlxsw_driver;
716 
717 	list_for_each_entry(mlxsw_driver, &mlxsw_core_driver_list, list) {
718 		if (strcmp(mlxsw_driver->kind, kind) == 0)
719 			return mlxsw_driver;
720 	}
721 	return NULL;
722 }
723 
724 static struct mlxsw_driver *mlxsw_core_driver_get(const char *kind)
725 {
726 	struct mlxsw_driver *mlxsw_driver;
727 
728 	spin_lock(&mlxsw_core_driver_list_lock);
729 	mlxsw_driver = __driver_find(kind);
730 	spin_unlock(&mlxsw_core_driver_list_lock);
731 	return mlxsw_driver;
732 }
733 
734 static int mlxsw_devlink_port_split(struct devlink *devlink,
735 				    unsigned int port_index,
736 				    unsigned int count,
737 				    struct netlink_ext_ack *extack)
738 {
739 	struct mlxsw_core *mlxsw_core = devlink_priv(devlink);
740 
741 	if (port_index >= mlxsw_core->max_ports) {
742 		NL_SET_ERR_MSG_MOD(extack, "Port index exceeds maximum number of ports");
743 		return -EINVAL;
744 	}
745 	if (!mlxsw_core->driver->port_split)
746 		return -EOPNOTSUPP;
747 	return mlxsw_core->driver->port_split(mlxsw_core, port_index, count,
748 					      extack);
749 }
750 
751 static int mlxsw_devlink_port_unsplit(struct devlink *devlink,
752 				      unsigned int port_index,
753 				      struct netlink_ext_ack *extack)
754 {
755 	struct mlxsw_core *mlxsw_core = devlink_priv(devlink);
756 
757 	if (port_index >= mlxsw_core->max_ports) {
758 		NL_SET_ERR_MSG_MOD(extack, "Port index exceeds maximum number of ports");
759 		return -EINVAL;
760 	}
761 	if (!mlxsw_core->driver->port_unsplit)
762 		return -EOPNOTSUPP;
763 	return mlxsw_core->driver->port_unsplit(mlxsw_core, port_index,
764 						extack);
765 }
766 
767 static int
768 mlxsw_devlink_sb_pool_get(struct devlink *devlink,
769 			  unsigned int sb_index, u16 pool_index,
770 			  struct devlink_sb_pool_info *pool_info)
771 {
772 	struct mlxsw_core *mlxsw_core = devlink_priv(devlink);
773 	struct mlxsw_driver *mlxsw_driver = mlxsw_core->driver;
774 
775 	if (!mlxsw_driver->sb_pool_get)
776 		return -EOPNOTSUPP;
777 	return mlxsw_driver->sb_pool_get(mlxsw_core, sb_index,
778 					 pool_index, pool_info);
779 }
780 
781 static int
782 mlxsw_devlink_sb_pool_set(struct devlink *devlink,
783 			  unsigned int sb_index, u16 pool_index, u32 size,
784 			  enum devlink_sb_threshold_type threshold_type)
785 {
786 	struct mlxsw_core *mlxsw_core = devlink_priv(devlink);
787 	struct mlxsw_driver *mlxsw_driver = mlxsw_core->driver;
788 
789 	if (!mlxsw_driver->sb_pool_set)
790 		return -EOPNOTSUPP;
791 	return mlxsw_driver->sb_pool_set(mlxsw_core, sb_index,
792 					 pool_index, size, threshold_type);
793 }
794 
795 static void *__dl_port(struct devlink_port *devlink_port)
796 {
797 	return container_of(devlink_port, struct mlxsw_core_port, devlink_port);
798 }
799 
800 static int mlxsw_devlink_port_type_set(struct devlink_port *devlink_port,
801 				       enum devlink_port_type port_type)
802 {
803 	struct mlxsw_core *mlxsw_core = devlink_priv(devlink_port->devlink);
804 	struct mlxsw_driver *mlxsw_driver = mlxsw_core->driver;
805 	struct mlxsw_core_port *mlxsw_core_port = __dl_port(devlink_port);
806 
807 	if (!mlxsw_driver->port_type_set)
808 		return -EOPNOTSUPP;
809 
810 	return mlxsw_driver->port_type_set(mlxsw_core,
811 					   mlxsw_core_port->local_port,
812 					   port_type);
813 }
814 
815 static int mlxsw_devlink_sb_port_pool_get(struct devlink_port *devlink_port,
816 					  unsigned int sb_index, u16 pool_index,
817 					  u32 *p_threshold)
818 {
819 	struct mlxsw_core *mlxsw_core = devlink_priv(devlink_port->devlink);
820 	struct mlxsw_driver *mlxsw_driver = mlxsw_core->driver;
821 	struct mlxsw_core_port *mlxsw_core_port = __dl_port(devlink_port);
822 
823 	if (!mlxsw_driver->sb_port_pool_get ||
824 	    !mlxsw_core_port_check(mlxsw_core_port))
825 		return -EOPNOTSUPP;
826 	return mlxsw_driver->sb_port_pool_get(mlxsw_core_port, sb_index,
827 					      pool_index, p_threshold);
828 }
829 
830 static int mlxsw_devlink_sb_port_pool_set(struct devlink_port *devlink_port,
831 					  unsigned int sb_index, u16 pool_index,
832 					  u32 threshold)
833 {
834 	struct mlxsw_core *mlxsw_core = devlink_priv(devlink_port->devlink);
835 	struct mlxsw_driver *mlxsw_driver = mlxsw_core->driver;
836 	struct mlxsw_core_port *mlxsw_core_port = __dl_port(devlink_port);
837 
838 	if (!mlxsw_driver->sb_port_pool_set ||
839 	    !mlxsw_core_port_check(mlxsw_core_port))
840 		return -EOPNOTSUPP;
841 	return mlxsw_driver->sb_port_pool_set(mlxsw_core_port, sb_index,
842 					      pool_index, threshold);
843 }
844 
845 static int
846 mlxsw_devlink_sb_tc_pool_bind_get(struct devlink_port *devlink_port,
847 				  unsigned int sb_index, u16 tc_index,
848 				  enum devlink_sb_pool_type pool_type,
849 				  u16 *p_pool_index, u32 *p_threshold)
850 {
851 	struct mlxsw_core *mlxsw_core = devlink_priv(devlink_port->devlink);
852 	struct mlxsw_driver *mlxsw_driver = mlxsw_core->driver;
853 	struct mlxsw_core_port *mlxsw_core_port = __dl_port(devlink_port);
854 
855 	if (!mlxsw_driver->sb_tc_pool_bind_get ||
856 	    !mlxsw_core_port_check(mlxsw_core_port))
857 		return -EOPNOTSUPP;
858 	return mlxsw_driver->sb_tc_pool_bind_get(mlxsw_core_port, sb_index,
859 						 tc_index, pool_type,
860 						 p_pool_index, p_threshold);
861 }
862 
863 static int
864 mlxsw_devlink_sb_tc_pool_bind_set(struct devlink_port *devlink_port,
865 				  unsigned int sb_index, u16 tc_index,
866 				  enum devlink_sb_pool_type pool_type,
867 				  u16 pool_index, u32 threshold)
868 {
869 	struct mlxsw_core *mlxsw_core = devlink_priv(devlink_port->devlink);
870 	struct mlxsw_driver *mlxsw_driver = mlxsw_core->driver;
871 	struct mlxsw_core_port *mlxsw_core_port = __dl_port(devlink_port);
872 
873 	if (!mlxsw_driver->sb_tc_pool_bind_set ||
874 	    !mlxsw_core_port_check(mlxsw_core_port))
875 		return -EOPNOTSUPP;
876 	return mlxsw_driver->sb_tc_pool_bind_set(mlxsw_core_port, sb_index,
877 						 tc_index, pool_type,
878 						 pool_index, threshold);
879 }
880 
881 static int mlxsw_devlink_sb_occ_snapshot(struct devlink *devlink,
882 					 unsigned int sb_index)
883 {
884 	struct mlxsw_core *mlxsw_core = devlink_priv(devlink);
885 	struct mlxsw_driver *mlxsw_driver = mlxsw_core->driver;
886 
887 	if (!mlxsw_driver->sb_occ_snapshot)
888 		return -EOPNOTSUPP;
889 	return mlxsw_driver->sb_occ_snapshot(mlxsw_core, sb_index);
890 }
891 
892 static int mlxsw_devlink_sb_occ_max_clear(struct devlink *devlink,
893 					  unsigned int sb_index)
894 {
895 	struct mlxsw_core *mlxsw_core = devlink_priv(devlink);
896 	struct mlxsw_driver *mlxsw_driver = mlxsw_core->driver;
897 
898 	if (!mlxsw_driver->sb_occ_max_clear)
899 		return -EOPNOTSUPP;
900 	return mlxsw_driver->sb_occ_max_clear(mlxsw_core, sb_index);
901 }
902 
903 static int
904 mlxsw_devlink_sb_occ_port_pool_get(struct devlink_port *devlink_port,
905 				   unsigned int sb_index, u16 pool_index,
906 				   u32 *p_cur, u32 *p_max)
907 {
908 	struct mlxsw_core *mlxsw_core = devlink_priv(devlink_port->devlink);
909 	struct mlxsw_driver *mlxsw_driver = mlxsw_core->driver;
910 	struct mlxsw_core_port *mlxsw_core_port = __dl_port(devlink_port);
911 
912 	if (!mlxsw_driver->sb_occ_port_pool_get ||
913 	    !mlxsw_core_port_check(mlxsw_core_port))
914 		return -EOPNOTSUPP;
915 	return mlxsw_driver->sb_occ_port_pool_get(mlxsw_core_port, sb_index,
916 						  pool_index, p_cur, p_max);
917 }
918 
919 static int
920 mlxsw_devlink_sb_occ_tc_port_bind_get(struct devlink_port *devlink_port,
921 				      unsigned int sb_index, u16 tc_index,
922 				      enum devlink_sb_pool_type pool_type,
923 				      u32 *p_cur, u32 *p_max)
924 {
925 	struct mlxsw_core *mlxsw_core = devlink_priv(devlink_port->devlink);
926 	struct mlxsw_driver *mlxsw_driver = mlxsw_core->driver;
927 	struct mlxsw_core_port *mlxsw_core_port = __dl_port(devlink_port);
928 
929 	if (!mlxsw_driver->sb_occ_tc_port_bind_get ||
930 	    !mlxsw_core_port_check(mlxsw_core_port))
931 		return -EOPNOTSUPP;
932 	return mlxsw_driver->sb_occ_tc_port_bind_get(mlxsw_core_port,
933 						     sb_index, tc_index,
934 						     pool_type, p_cur, p_max);
935 }
936 
937 static int mlxsw_devlink_core_bus_device_reload(struct devlink *devlink,
938 						struct netlink_ext_ack *extack)
939 {
940 	struct mlxsw_core *mlxsw_core = devlink_priv(devlink);
941 	int err;
942 
943 	if (!(mlxsw_core->bus->features & MLXSW_BUS_F_RESET))
944 		return -EOPNOTSUPP;
945 
946 	mlxsw_core_bus_device_unregister(mlxsw_core, true);
947 	err = mlxsw_core_bus_device_register(mlxsw_core->bus_info,
948 					     mlxsw_core->bus,
949 					     mlxsw_core->bus_priv, true,
950 					     devlink);
951 	mlxsw_core->reload_fail = !!err;
952 
953 	return err;
954 }
955 
956 static const struct devlink_ops mlxsw_devlink_ops = {
957 	.reload				= mlxsw_devlink_core_bus_device_reload,
958 	.port_type_set			= mlxsw_devlink_port_type_set,
959 	.port_split			= mlxsw_devlink_port_split,
960 	.port_unsplit			= mlxsw_devlink_port_unsplit,
961 	.sb_pool_get			= mlxsw_devlink_sb_pool_get,
962 	.sb_pool_set			= mlxsw_devlink_sb_pool_set,
963 	.sb_port_pool_get		= mlxsw_devlink_sb_port_pool_get,
964 	.sb_port_pool_set		= mlxsw_devlink_sb_port_pool_set,
965 	.sb_tc_pool_bind_get		= mlxsw_devlink_sb_tc_pool_bind_get,
966 	.sb_tc_pool_bind_set		= mlxsw_devlink_sb_tc_pool_bind_set,
967 	.sb_occ_snapshot		= mlxsw_devlink_sb_occ_snapshot,
968 	.sb_occ_max_clear		= mlxsw_devlink_sb_occ_max_clear,
969 	.sb_occ_port_pool_get		= mlxsw_devlink_sb_occ_port_pool_get,
970 	.sb_occ_tc_port_bind_get	= mlxsw_devlink_sb_occ_tc_port_bind_get,
971 };
972 
973 static int
974 __mlxsw_core_bus_device_register(const struct mlxsw_bus_info *mlxsw_bus_info,
975 				 const struct mlxsw_bus *mlxsw_bus,
976 				 void *bus_priv, bool reload,
977 				 struct devlink *devlink)
978 {
979 	const char *device_kind = mlxsw_bus_info->device_kind;
980 	struct mlxsw_core *mlxsw_core;
981 	struct mlxsw_driver *mlxsw_driver;
982 	struct mlxsw_res *res;
983 	size_t alloc_size;
984 	int err;
985 
986 	mlxsw_driver = mlxsw_core_driver_get(device_kind);
987 	if (!mlxsw_driver)
988 		return -EINVAL;
989 
990 	if (!reload) {
991 		alloc_size = sizeof(*mlxsw_core) + mlxsw_driver->priv_size;
992 		devlink = devlink_alloc(&mlxsw_devlink_ops, alloc_size);
993 		if (!devlink) {
994 			err = -ENOMEM;
995 			goto err_devlink_alloc;
996 		}
997 	}
998 
999 	mlxsw_core = devlink_priv(devlink);
1000 	INIT_LIST_HEAD(&mlxsw_core->rx_listener_list);
1001 	INIT_LIST_HEAD(&mlxsw_core->event_listener_list);
1002 	mlxsw_core->driver = mlxsw_driver;
1003 	mlxsw_core->bus = mlxsw_bus;
1004 	mlxsw_core->bus_priv = bus_priv;
1005 	mlxsw_core->bus_info = mlxsw_bus_info;
1006 
1007 	res = mlxsw_driver->res_query_enabled ? &mlxsw_core->res : NULL;
1008 	err = mlxsw_bus->init(bus_priv, mlxsw_core, mlxsw_driver->profile, res);
1009 	if (err)
1010 		goto err_bus_init;
1011 
1012 	if (mlxsw_driver->resources_register && !reload) {
1013 		err = mlxsw_driver->resources_register(mlxsw_core);
1014 		if (err)
1015 			goto err_register_resources;
1016 	}
1017 
1018 	err = mlxsw_ports_init(mlxsw_core);
1019 	if (err)
1020 		goto err_ports_init;
1021 
1022 	if (MLXSW_CORE_RES_VALID(mlxsw_core, MAX_LAG) &&
1023 	    MLXSW_CORE_RES_VALID(mlxsw_core, MAX_LAG_MEMBERS)) {
1024 		alloc_size = sizeof(u8) *
1025 			MLXSW_CORE_RES_GET(mlxsw_core, MAX_LAG) *
1026 			MLXSW_CORE_RES_GET(mlxsw_core, MAX_LAG_MEMBERS);
1027 		mlxsw_core->lag.mapping = kzalloc(alloc_size, GFP_KERNEL);
1028 		if (!mlxsw_core->lag.mapping) {
1029 			err = -ENOMEM;
1030 			goto err_alloc_lag_mapping;
1031 		}
1032 	}
1033 
1034 	err = mlxsw_emad_init(mlxsw_core);
1035 	if (err)
1036 		goto err_emad_init;
1037 
1038 	if (!reload) {
1039 		err = devlink_register(devlink, mlxsw_bus_info->dev);
1040 		if (err)
1041 			goto err_devlink_register;
1042 	}
1043 
1044 	if (mlxsw_driver->params_register && !reload) {
1045 		err = mlxsw_driver->params_register(mlxsw_core);
1046 		if (err)
1047 			goto err_register_params;
1048 	}
1049 
1050 	err = mlxsw_hwmon_init(mlxsw_core, mlxsw_bus_info, &mlxsw_core->hwmon);
1051 	if (err)
1052 		goto err_hwmon_init;
1053 
1054 	err = mlxsw_thermal_init(mlxsw_core, mlxsw_bus_info,
1055 				 &mlxsw_core->thermal);
1056 	if (err)
1057 		goto err_thermal_init;
1058 
1059 	if (mlxsw_driver->init) {
1060 		err = mlxsw_driver->init(mlxsw_core, mlxsw_bus_info);
1061 		if (err)
1062 			goto err_driver_init;
1063 	}
1064 
1065 	if (mlxsw_driver->params_register && !reload)
1066 		devlink_params_publish(devlink);
1067 
1068 	return 0;
1069 
1070 err_driver_init:
1071 	mlxsw_thermal_fini(mlxsw_core->thermal);
1072 err_thermal_init:
1073 	mlxsw_hwmon_fini(mlxsw_core->hwmon);
1074 err_hwmon_init:
1075 	if (mlxsw_driver->params_unregister && !reload)
1076 		mlxsw_driver->params_unregister(mlxsw_core);
1077 err_register_params:
1078 	if (!reload)
1079 		devlink_unregister(devlink);
1080 err_devlink_register:
1081 	mlxsw_emad_fini(mlxsw_core);
1082 err_emad_init:
1083 	kfree(mlxsw_core->lag.mapping);
1084 err_alloc_lag_mapping:
1085 	mlxsw_ports_fini(mlxsw_core);
1086 err_ports_init:
1087 	if (!reload)
1088 		devlink_resources_unregister(devlink, NULL);
1089 err_register_resources:
1090 	mlxsw_bus->fini(bus_priv);
1091 err_bus_init:
1092 	if (!reload)
1093 		devlink_free(devlink);
1094 err_devlink_alloc:
1095 	return err;
1096 }
1097 
1098 int mlxsw_core_bus_device_register(const struct mlxsw_bus_info *mlxsw_bus_info,
1099 				   const struct mlxsw_bus *mlxsw_bus,
1100 				   void *bus_priv, bool reload,
1101 				   struct devlink *devlink)
1102 {
1103 	bool called_again = false;
1104 	int err;
1105 
1106 again:
1107 	err = __mlxsw_core_bus_device_register(mlxsw_bus_info, mlxsw_bus,
1108 					       bus_priv, reload, devlink);
1109 	/* -EAGAIN is returned in case the FW was updated. FW needs
1110 	 * a reset, so lets try to call __mlxsw_core_bus_device_register()
1111 	 * again.
1112 	 */
1113 	if (err == -EAGAIN && !called_again) {
1114 		called_again = true;
1115 		goto again;
1116 	}
1117 
1118 	return err;
1119 }
1120 EXPORT_SYMBOL(mlxsw_core_bus_device_register);
1121 
1122 void mlxsw_core_bus_device_unregister(struct mlxsw_core *mlxsw_core,
1123 				      bool reload)
1124 {
1125 	struct devlink *devlink = priv_to_devlink(mlxsw_core);
1126 
1127 	if (mlxsw_core->reload_fail) {
1128 		if (!reload)
1129 			/* Only the parts that were not de-initialized in the
1130 			 * failed reload attempt need to be de-initialized.
1131 			 */
1132 			goto reload_fail_deinit;
1133 		else
1134 			return;
1135 	}
1136 
1137 	if (mlxsw_core->driver->params_unregister && !reload)
1138 		devlink_params_unpublish(devlink);
1139 	if (mlxsw_core->driver->fini)
1140 		mlxsw_core->driver->fini(mlxsw_core);
1141 	mlxsw_thermal_fini(mlxsw_core->thermal);
1142 	mlxsw_hwmon_fini(mlxsw_core->hwmon);
1143 	if (mlxsw_core->driver->params_unregister && !reload)
1144 		mlxsw_core->driver->params_unregister(mlxsw_core);
1145 	if (!reload)
1146 		devlink_unregister(devlink);
1147 	mlxsw_emad_fini(mlxsw_core);
1148 	kfree(mlxsw_core->lag.mapping);
1149 	mlxsw_ports_fini(mlxsw_core);
1150 	if (!reload)
1151 		devlink_resources_unregister(devlink, NULL);
1152 	mlxsw_core->bus->fini(mlxsw_core->bus_priv);
1153 
1154 	return;
1155 
1156 reload_fail_deinit:
1157 	if (mlxsw_core->driver->params_unregister)
1158 		mlxsw_core->driver->params_unregister(mlxsw_core);
1159 	devlink_unregister(devlink);
1160 	devlink_resources_unregister(devlink, NULL);
1161 	devlink_free(devlink);
1162 }
1163 EXPORT_SYMBOL(mlxsw_core_bus_device_unregister);
1164 
1165 bool mlxsw_core_skb_transmit_busy(struct mlxsw_core *mlxsw_core,
1166 				  const struct mlxsw_tx_info *tx_info)
1167 {
1168 	return mlxsw_core->bus->skb_transmit_busy(mlxsw_core->bus_priv,
1169 						  tx_info);
1170 }
1171 EXPORT_SYMBOL(mlxsw_core_skb_transmit_busy);
1172 
1173 int mlxsw_core_skb_transmit(struct mlxsw_core *mlxsw_core, struct sk_buff *skb,
1174 			    const struct mlxsw_tx_info *tx_info)
1175 {
1176 	return mlxsw_core->bus->skb_transmit(mlxsw_core->bus_priv, skb,
1177 					     tx_info);
1178 }
1179 EXPORT_SYMBOL(mlxsw_core_skb_transmit);
1180 
1181 static bool __is_rx_listener_equal(const struct mlxsw_rx_listener *rxl_a,
1182 				   const struct mlxsw_rx_listener *rxl_b)
1183 {
1184 	return (rxl_a->func == rxl_b->func &&
1185 		rxl_a->local_port == rxl_b->local_port &&
1186 		rxl_a->trap_id == rxl_b->trap_id);
1187 }
1188 
1189 static struct mlxsw_rx_listener_item *
1190 __find_rx_listener_item(struct mlxsw_core *mlxsw_core,
1191 			const struct mlxsw_rx_listener *rxl,
1192 			void *priv)
1193 {
1194 	struct mlxsw_rx_listener_item *rxl_item;
1195 
1196 	list_for_each_entry(rxl_item, &mlxsw_core->rx_listener_list, list) {
1197 		if (__is_rx_listener_equal(&rxl_item->rxl, rxl) &&
1198 		    rxl_item->priv == priv)
1199 			return rxl_item;
1200 	}
1201 	return NULL;
1202 }
1203 
1204 int mlxsw_core_rx_listener_register(struct mlxsw_core *mlxsw_core,
1205 				    const struct mlxsw_rx_listener *rxl,
1206 				    void *priv)
1207 {
1208 	struct mlxsw_rx_listener_item *rxl_item;
1209 
1210 	rxl_item = __find_rx_listener_item(mlxsw_core, rxl, priv);
1211 	if (rxl_item)
1212 		return -EEXIST;
1213 	rxl_item = kmalloc(sizeof(*rxl_item), GFP_KERNEL);
1214 	if (!rxl_item)
1215 		return -ENOMEM;
1216 	rxl_item->rxl = *rxl;
1217 	rxl_item->priv = priv;
1218 
1219 	list_add_rcu(&rxl_item->list, &mlxsw_core->rx_listener_list);
1220 	return 0;
1221 }
1222 EXPORT_SYMBOL(mlxsw_core_rx_listener_register);
1223 
1224 void mlxsw_core_rx_listener_unregister(struct mlxsw_core *mlxsw_core,
1225 				       const struct mlxsw_rx_listener *rxl,
1226 				       void *priv)
1227 {
1228 	struct mlxsw_rx_listener_item *rxl_item;
1229 
1230 	rxl_item = __find_rx_listener_item(mlxsw_core, rxl, priv);
1231 	if (!rxl_item)
1232 		return;
1233 	list_del_rcu(&rxl_item->list);
1234 	synchronize_rcu();
1235 	kfree(rxl_item);
1236 }
1237 EXPORT_SYMBOL(mlxsw_core_rx_listener_unregister);
1238 
1239 static void mlxsw_core_event_listener_func(struct sk_buff *skb, u8 local_port,
1240 					   void *priv)
1241 {
1242 	struct mlxsw_event_listener_item *event_listener_item = priv;
1243 	struct mlxsw_reg_info reg;
1244 	char *payload;
1245 	char *op_tlv = mlxsw_emad_op_tlv(skb);
1246 	char *reg_tlv = mlxsw_emad_reg_tlv(skb);
1247 
1248 	reg.id = mlxsw_emad_op_tlv_register_id_get(op_tlv);
1249 	reg.len = (mlxsw_emad_reg_tlv_len_get(reg_tlv) - 1) * sizeof(u32);
1250 	payload = mlxsw_emad_reg_payload(op_tlv);
1251 	event_listener_item->el.func(&reg, payload, event_listener_item->priv);
1252 	dev_kfree_skb(skb);
1253 }
1254 
1255 static bool __is_event_listener_equal(const struct mlxsw_event_listener *el_a,
1256 				      const struct mlxsw_event_listener *el_b)
1257 {
1258 	return (el_a->func == el_b->func &&
1259 		el_a->trap_id == el_b->trap_id);
1260 }
1261 
1262 static struct mlxsw_event_listener_item *
1263 __find_event_listener_item(struct mlxsw_core *mlxsw_core,
1264 			   const struct mlxsw_event_listener *el,
1265 			   void *priv)
1266 {
1267 	struct mlxsw_event_listener_item *el_item;
1268 
1269 	list_for_each_entry(el_item, &mlxsw_core->event_listener_list, list) {
1270 		if (__is_event_listener_equal(&el_item->el, el) &&
1271 		    el_item->priv == priv)
1272 			return el_item;
1273 	}
1274 	return NULL;
1275 }
1276 
1277 int mlxsw_core_event_listener_register(struct mlxsw_core *mlxsw_core,
1278 				       const struct mlxsw_event_listener *el,
1279 				       void *priv)
1280 {
1281 	int err;
1282 	struct mlxsw_event_listener_item *el_item;
1283 	const struct mlxsw_rx_listener rxl = {
1284 		.func = mlxsw_core_event_listener_func,
1285 		.local_port = MLXSW_PORT_DONT_CARE,
1286 		.trap_id = el->trap_id,
1287 	};
1288 
1289 	el_item = __find_event_listener_item(mlxsw_core, el, priv);
1290 	if (el_item)
1291 		return -EEXIST;
1292 	el_item = kmalloc(sizeof(*el_item), GFP_KERNEL);
1293 	if (!el_item)
1294 		return -ENOMEM;
1295 	el_item->el = *el;
1296 	el_item->priv = priv;
1297 
1298 	err = mlxsw_core_rx_listener_register(mlxsw_core, &rxl, el_item);
1299 	if (err)
1300 		goto err_rx_listener_register;
1301 
1302 	/* No reason to save item if we did not manage to register an RX
1303 	 * listener for it.
1304 	 */
1305 	list_add_rcu(&el_item->list, &mlxsw_core->event_listener_list);
1306 
1307 	return 0;
1308 
1309 err_rx_listener_register:
1310 	kfree(el_item);
1311 	return err;
1312 }
1313 EXPORT_SYMBOL(mlxsw_core_event_listener_register);
1314 
1315 void mlxsw_core_event_listener_unregister(struct mlxsw_core *mlxsw_core,
1316 					  const struct mlxsw_event_listener *el,
1317 					  void *priv)
1318 {
1319 	struct mlxsw_event_listener_item *el_item;
1320 	const struct mlxsw_rx_listener rxl = {
1321 		.func = mlxsw_core_event_listener_func,
1322 		.local_port = MLXSW_PORT_DONT_CARE,
1323 		.trap_id = el->trap_id,
1324 	};
1325 
1326 	el_item = __find_event_listener_item(mlxsw_core, el, priv);
1327 	if (!el_item)
1328 		return;
1329 	mlxsw_core_rx_listener_unregister(mlxsw_core, &rxl, el_item);
1330 	list_del(&el_item->list);
1331 	kfree(el_item);
1332 }
1333 EXPORT_SYMBOL(mlxsw_core_event_listener_unregister);
1334 
1335 static int mlxsw_core_listener_register(struct mlxsw_core *mlxsw_core,
1336 					const struct mlxsw_listener *listener,
1337 					void *priv)
1338 {
1339 	if (listener->is_event)
1340 		return mlxsw_core_event_listener_register(mlxsw_core,
1341 						&listener->u.event_listener,
1342 						priv);
1343 	else
1344 		return mlxsw_core_rx_listener_register(mlxsw_core,
1345 						&listener->u.rx_listener,
1346 						priv);
1347 }
1348 
1349 static void mlxsw_core_listener_unregister(struct mlxsw_core *mlxsw_core,
1350 				      const struct mlxsw_listener *listener,
1351 				      void *priv)
1352 {
1353 	if (listener->is_event)
1354 		mlxsw_core_event_listener_unregister(mlxsw_core,
1355 						     &listener->u.event_listener,
1356 						     priv);
1357 	else
1358 		mlxsw_core_rx_listener_unregister(mlxsw_core,
1359 						  &listener->u.rx_listener,
1360 						  priv);
1361 }
1362 
1363 int mlxsw_core_trap_register(struct mlxsw_core *mlxsw_core,
1364 			     const struct mlxsw_listener *listener, void *priv)
1365 {
1366 	char hpkt_pl[MLXSW_REG_HPKT_LEN];
1367 	int err;
1368 
1369 	err = mlxsw_core_listener_register(mlxsw_core, listener, priv);
1370 	if (err)
1371 		return err;
1372 
1373 	mlxsw_reg_hpkt_pack(hpkt_pl, listener->action, listener->trap_id,
1374 			    listener->trap_group, listener->is_ctrl);
1375 	err = mlxsw_reg_write(mlxsw_core,  MLXSW_REG(hpkt), hpkt_pl);
1376 	if (err)
1377 		goto err_trap_set;
1378 
1379 	return 0;
1380 
1381 err_trap_set:
1382 	mlxsw_core_listener_unregister(mlxsw_core, listener, priv);
1383 	return err;
1384 }
1385 EXPORT_SYMBOL(mlxsw_core_trap_register);
1386 
1387 void mlxsw_core_trap_unregister(struct mlxsw_core *mlxsw_core,
1388 				const struct mlxsw_listener *listener,
1389 				void *priv)
1390 {
1391 	char hpkt_pl[MLXSW_REG_HPKT_LEN];
1392 
1393 	if (!listener->is_event) {
1394 		mlxsw_reg_hpkt_pack(hpkt_pl, listener->unreg_action,
1395 				    listener->trap_id, listener->trap_group,
1396 				    listener->is_ctrl);
1397 		mlxsw_reg_write(mlxsw_core, MLXSW_REG(hpkt), hpkt_pl);
1398 	}
1399 
1400 	mlxsw_core_listener_unregister(mlxsw_core, listener, priv);
1401 }
1402 EXPORT_SYMBOL(mlxsw_core_trap_unregister);
1403 
1404 static u64 mlxsw_core_tid_get(struct mlxsw_core *mlxsw_core)
1405 {
1406 	return atomic64_inc_return(&mlxsw_core->emad.tid);
1407 }
1408 
1409 static int mlxsw_core_reg_access_emad(struct mlxsw_core *mlxsw_core,
1410 				      const struct mlxsw_reg_info *reg,
1411 				      char *payload,
1412 				      enum mlxsw_core_reg_access_type type,
1413 				      struct list_head *bulk_list,
1414 				      mlxsw_reg_trans_cb_t *cb,
1415 				      unsigned long cb_priv)
1416 {
1417 	u64 tid = mlxsw_core_tid_get(mlxsw_core);
1418 	struct mlxsw_reg_trans *trans;
1419 	int err;
1420 
1421 	trans = kzalloc(sizeof(*trans), GFP_KERNEL);
1422 	if (!trans)
1423 		return -ENOMEM;
1424 
1425 	err = mlxsw_emad_reg_access(mlxsw_core, reg, payload, type, trans,
1426 				    bulk_list, cb, cb_priv, tid);
1427 	if (err) {
1428 		kfree(trans);
1429 		return err;
1430 	}
1431 	return 0;
1432 }
1433 
1434 int mlxsw_reg_trans_query(struct mlxsw_core *mlxsw_core,
1435 			  const struct mlxsw_reg_info *reg, char *payload,
1436 			  struct list_head *bulk_list,
1437 			  mlxsw_reg_trans_cb_t *cb, unsigned long cb_priv)
1438 {
1439 	return mlxsw_core_reg_access_emad(mlxsw_core, reg, payload,
1440 					  MLXSW_CORE_REG_ACCESS_TYPE_QUERY,
1441 					  bulk_list, cb, cb_priv);
1442 }
1443 EXPORT_SYMBOL(mlxsw_reg_trans_query);
1444 
1445 int mlxsw_reg_trans_write(struct mlxsw_core *mlxsw_core,
1446 			  const struct mlxsw_reg_info *reg, char *payload,
1447 			  struct list_head *bulk_list,
1448 			  mlxsw_reg_trans_cb_t *cb, unsigned long cb_priv)
1449 {
1450 	return mlxsw_core_reg_access_emad(mlxsw_core, reg, payload,
1451 					  MLXSW_CORE_REG_ACCESS_TYPE_WRITE,
1452 					  bulk_list, cb, cb_priv);
1453 }
1454 EXPORT_SYMBOL(mlxsw_reg_trans_write);
1455 
1456 static int mlxsw_reg_trans_wait(struct mlxsw_reg_trans *trans)
1457 {
1458 	struct mlxsw_core *mlxsw_core = trans->core;
1459 	int err;
1460 
1461 	wait_for_completion(&trans->completion);
1462 	cancel_delayed_work_sync(&trans->timeout_dw);
1463 	err = trans->err;
1464 
1465 	if (trans->retries)
1466 		dev_warn(mlxsw_core->bus_info->dev, "EMAD retries (%d/%d) (tid=%llx)\n",
1467 			 trans->retries, MLXSW_EMAD_MAX_RETRY, trans->tid);
1468 	if (err) {
1469 		dev_err(mlxsw_core->bus_info->dev, "EMAD reg access failed (tid=%llx,reg_id=%x(%s),type=%s,status=%x(%s))\n",
1470 			trans->tid, trans->reg->id,
1471 			mlxsw_reg_id_str(trans->reg->id),
1472 			mlxsw_core_reg_access_type_str(trans->type),
1473 			trans->emad_status,
1474 			mlxsw_emad_op_tlv_status_str(trans->emad_status));
1475 		trace_devlink_hwerr(priv_to_devlink(mlxsw_core),
1476 				    trans->emad_status,
1477 				    mlxsw_emad_op_tlv_status_str(trans->emad_status));
1478 	}
1479 
1480 	list_del(&trans->bulk_list);
1481 	kfree_rcu(trans, rcu);
1482 	return err;
1483 }
1484 
1485 int mlxsw_reg_trans_bulk_wait(struct list_head *bulk_list)
1486 {
1487 	struct mlxsw_reg_trans *trans;
1488 	struct mlxsw_reg_trans *tmp;
1489 	int sum_err = 0;
1490 	int err;
1491 
1492 	list_for_each_entry_safe(trans, tmp, bulk_list, bulk_list) {
1493 		err = mlxsw_reg_trans_wait(trans);
1494 		if (err && sum_err == 0)
1495 			sum_err = err; /* first error to be returned */
1496 	}
1497 	return sum_err;
1498 }
1499 EXPORT_SYMBOL(mlxsw_reg_trans_bulk_wait);
1500 
1501 static int mlxsw_core_reg_access_cmd(struct mlxsw_core *mlxsw_core,
1502 				     const struct mlxsw_reg_info *reg,
1503 				     char *payload,
1504 				     enum mlxsw_core_reg_access_type type)
1505 {
1506 	enum mlxsw_emad_op_tlv_status status;
1507 	int err, n_retry;
1508 	bool reset_ok;
1509 	char *in_mbox, *out_mbox, *tmp;
1510 
1511 	dev_dbg(mlxsw_core->bus_info->dev, "Reg cmd access (reg_id=%x(%s),type=%s)\n",
1512 		reg->id, mlxsw_reg_id_str(reg->id),
1513 		mlxsw_core_reg_access_type_str(type));
1514 
1515 	in_mbox = mlxsw_cmd_mbox_alloc();
1516 	if (!in_mbox)
1517 		return -ENOMEM;
1518 
1519 	out_mbox = mlxsw_cmd_mbox_alloc();
1520 	if (!out_mbox) {
1521 		err = -ENOMEM;
1522 		goto free_in_mbox;
1523 	}
1524 
1525 	mlxsw_emad_pack_op_tlv(in_mbox, reg, type,
1526 			       mlxsw_core_tid_get(mlxsw_core));
1527 	tmp = in_mbox + MLXSW_EMAD_OP_TLV_LEN * sizeof(u32);
1528 	mlxsw_emad_pack_reg_tlv(tmp, reg, payload);
1529 
1530 	/* There is a special treatment needed for MRSR (reset) register.
1531 	 * The command interface will return error after the command
1532 	 * is executed, so tell the lower layer to expect it
1533 	 * and cope accordingly.
1534 	 */
1535 	reset_ok = reg->id == MLXSW_REG_MRSR_ID;
1536 
1537 	n_retry = 0;
1538 retry:
1539 	err = mlxsw_cmd_access_reg(mlxsw_core, reset_ok, in_mbox, out_mbox);
1540 	if (!err) {
1541 		err = mlxsw_emad_process_status(out_mbox, &status);
1542 		if (err) {
1543 			if (err == -EAGAIN && n_retry++ < MLXSW_EMAD_MAX_RETRY)
1544 				goto retry;
1545 			dev_err(mlxsw_core->bus_info->dev, "Reg cmd access status failed (status=%x(%s))\n",
1546 				status, mlxsw_emad_op_tlv_status_str(status));
1547 		}
1548 	}
1549 
1550 	if (!err)
1551 		memcpy(payload, mlxsw_emad_reg_payload(out_mbox),
1552 		       reg->len);
1553 
1554 	mlxsw_cmd_mbox_free(out_mbox);
1555 free_in_mbox:
1556 	mlxsw_cmd_mbox_free(in_mbox);
1557 	if (err)
1558 		dev_err(mlxsw_core->bus_info->dev, "Reg cmd access failed (reg_id=%x(%s),type=%s)\n",
1559 			reg->id, mlxsw_reg_id_str(reg->id),
1560 			mlxsw_core_reg_access_type_str(type));
1561 	return err;
1562 }
1563 
1564 static void mlxsw_core_reg_access_cb(struct mlxsw_core *mlxsw_core,
1565 				     char *payload, size_t payload_len,
1566 				     unsigned long cb_priv)
1567 {
1568 	char *orig_payload = (char *) cb_priv;
1569 
1570 	memcpy(orig_payload, payload, payload_len);
1571 }
1572 
1573 static int mlxsw_core_reg_access(struct mlxsw_core *mlxsw_core,
1574 				 const struct mlxsw_reg_info *reg,
1575 				 char *payload,
1576 				 enum mlxsw_core_reg_access_type type)
1577 {
1578 	LIST_HEAD(bulk_list);
1579 	int err;
1580 
1581 	/* During initialization EMAD interface is not available to us,
1582 	 * so we default to command interface. We switch to EMAD interface
1583 	 * after setting the appropriate traps.
1584 	 */
1585 	if (!mlxsw_core->emad.use_emad)
1586 		return mlxsw_core_reg_access_cmd(mlxsw_core, reg,
1587 						 payload, type);
1588 
1589 	err = mlxsw_core_reg_access_emad(mlxsw_core, reg,
1590 					 payload, type, &bulk_list,
1591 					 mlxsw_core_reg_access_cb,
1592 					 (unsigned long) payload);
1593 	if (err)
1594 		return err;
1595 	return mlxsw_reg_trans_bulk_wait(&bulk_list);
1596 }
1597 
1598 int mlxsw_reg_query(struct mlxsw_core *mlxsw_core,
1599 		    const struct mlxsw_reg_info *reg, char *payload)
1600 {
1601 	return mlxsw_core_reg_access(mlxsw_core, reg, payload,
1602 				     MLXSW_CORE_REG_ACCESS_TYPE_QUERY);
1603 }
1604 EXPORT_SYMBOL(mlxsw_reg_query);
1605 
1606 int mlxsw_reg_write(struct mlxsw_core *mlxsw_core,
1607 		    const struct mlxsw_reg_info *reg, char *payload)
1608 {
1609 	return mlxsw_core_reg_access(mlxsw_core, reg, payload,
1610 				     MLXSW_CORE_REG_ACCESS_TYPE_WRITE);
1611 }
1612 EXPORT_SYMBOL(mlxsw_reg_write);
1613 
1614 void mlxsw_core_skb_receive(struct mlxsw_core *mlxsw_core, struct sk_buff *skb,
1615 			    struct mlxsw_rx_info *rx_info)
1616 {
1617 	struct mlxsw_rx_listener_item *rxl_item;
1618 	const struct mlxsw_rx_listener *rxl;
1619 	u8 local_port;
1620 	bool found = false;
1621 
1622 	if (rx_info->is_lag) {
1623 		dev_dbg_ratelimited(mlxsw_core->bus_info->dev, "%s: lag_id = %d, lag_port_index = 0x%x\n",
1624 				    __func__, rx_info->u.lag_id,
1625 				    rx_info->trap_id);
1626 		/* Upper layer does not care if the skb came from LAG or not,
1627 		 * so just get the local_port for the lag port and push it up.
1628 		 */
1629 		local_port = mlxsw_core_lag_mapping_get(mlxsw_core,
1630 							rx_info->u.lag_id,
1631 							rx_info->lag_port_index);
1632 	} else {
1633 		local_port = rx_info->u.sys_port;
1634 	}
1635 
1636 	dev_dbg_ratelimited(mlxsw_core->bus_info->dev, "%s: local_port = %d, trap_id = 0x%x\n",
1637 			    __func__, local_port, rx_info->trap_id);
1638 
1639 	if ((rx_info->trap_id >= MLXSW_TRAP_ID_MAX) ||
1640 	    (local_port >= mlxsw_core->max_ports))
1641 		goto drop;
1642 
1643 	rcu_read_lock();
1644 	list_for_each_entry_rcu(rxl_item, &mlxsw_core->rx_listener_list, list) {
1645 		rxl = &rxl_item->rxl;
1646 		if ((rxl->local_port == MLXSW_PORT_DONT_CARE ||
1647 		     rxl->local_port == local_port) &&
1648 		    rxl->trap_id == rx_info->trap_id) {
1649 			found = true;
1650 			break;
1651 		}
1652 	}
1653 	rcu_read_unlock();
1654 	if (!found)
1655 		goto drop;
1656 
1657 	rxl->func(skb, local_port, rxl_item->priv);
1658 	return;
1659 
1660 drop:
1661 	dev_kfree_skb(skb);
1662 }
1663 EXPORT_SYMBOL(mlxsw_core_skb_receive);
1664 
1665 static int mlxsw_core_lag_mapping_index(struct mlxsw_core *mlxsw_core,
1666 					u16 lag_id, u8 port_index)
1667 {
1668 	return MLXSW_CORE_RES_GET(mlxsw_core, MAX_LAG_MEMBERS) * lag_id +
1669 	       port_index;
1670 }
1671 
1672 void mlxsw_core_lag_mapping_set(struct mlxsw_core *mlxsw_core,
1673 				u16 lag_id, u8 port_index, u8 local_port)
1674 {
1675 	int index = mlxsw_core_lag_mapping_index(mlxsw_core,
1676 						 lag_id, port_index);
1677 
1678 	mlxsw_core->lag.mapping[index] = local_port;
1679 }
1680 EXPORT_SYMBOL(mlxsw_core_lag_mapping_set);
1681 
1682 u8 mlxsw_core_lag_mapping_get(struct mlxsw_core *mlxsw_core,
1683 			      u16 lag_id, u8 port_index)
1684 {
1685 	int index = mlxsw_core_lag_mapping_index(mlxsw_core,
1686 						 lag_id, port_index);
1687 
1688 	return mlxsw_core->lag.mapping[index];
1689 }
1690 EXPORT_SYMBOL(mlxsw_core_lag_mapping_get);
1691 
1692 void mlxsw_core_lag_mapping_clear(struct mlxsw_core *mlxsw_core,
1693 				  u16 lag_id, u8 local_port)
1694 {
1695 	int i;
1696 
1697 	for (i = 0; i < MLXSW_CORE_RES_GET(mlxsw_core, MAX_LAG_MEMBERS); i++) {
1698 		int index = mlxsw_core_lag_mapping_index(mlxsw_core,
1699 							 lag_id, i);
1700 
1701 		if (mlxsw_core->lag.mapping[index] == local_port)
1702 			mlxsw_core->lag.mapping[index] = 0;
1703 	}
1704 }
1705 EXPORT_SYMBOL(mlxsw_core_lag_mapping_clear);
1706 
1707 bool mlxsw_core_res_valid(struct mlxsw_core *mlxsw_core,
1708 			  enum mlxsw_res_id res_id)
1709 {
1710 	return mlxsw_res_valid(&mlxsw_core->res, res_id);
1711 }
1712 EXPORT_SYMBOL(mlxsw_core_res_valid);
1713 
1714 u64 mlxsw_core_res_get(struct mlxsw_core *mlxsw_core,
1715 		       enum mlxsw_res_id res_id)
1716 {
1717 	return mlxsw_res_get(&mlxsw_core->res, res_id);
1718 }
1719 EXPORT_SYMBOL(mlxsw_core_res_get);
1720 
1721 int mlxsw_core_port_init(struct mlxsw_core *mlxsw_core, u8 local_port)
1722 {
1723 	struct devlink *devlink = priv_to_devlink(mlxsw_core);
1724 	struct mlxsw_core_port *mlxsw_core_port =
1725 					&mlxsw_core->ports[local_port];
1726 	struct devlink_port *devlink_port = &mlxsw_core_port->devlink_port;
1727 	int err;
1728 
1729 	mlxsw_core_port->local_port = local_port;
1730 	err = devlink_port_register(devlink, devlink_port, local_port);
1731 	if (err)
1732 		memset(mlxsw_core_port, 0, sizeof(*mlxsw_core_port));
1733 	return err;
1734 }
1735 EXPORT_SYMBOL(mlxsw_core_port_init);
1736 
1737 void mlxsw_core_port_fini(struct mlxsw_core *mlxsw_core, u8 local_port)
1738 {
1739 	struct mlxsw_core_port *mlxsw_core_port =
1740 					&mlxsw_core->ports[local_port];
1741 	struct devlink_port *devlink_port = &mlxsw_core_port->devlink_port;
1742 
1743 	devlink_port_unregister(devlink_port);
1744 	memset(mlxsw_core_port, 0, sizeof(*mlxsw_core_port));
1745 }
1746 EXPORT_SYMBOL(mlxsw_core_port_fini);
1747 
1748 void mlxsw_core_port_eth_set(struct mlxsw_core *mlxsw_core, u8 local_port,
1749 			     void *port_driver_priv, struct net_device *dev,
1750 			     u32 port_number, bool split,
1751 			     u32 split_port_subnumber)
1752 {
1753 	struct mlxsw_core_port *mlxsw_core_port =
1754 					&mlxsw_core->ports[local_port];
1755 	struct devlink_port *devlink_port = &mlxsw_core_port->devlink_port;
1756 
1757 	mlxsw_core_port->port_driver_priv = port_driver_priv;
1758 	devlink_port_attrs_set(devlink_port, DEVLINK_PORT_FLAVOUR_PHYSICAL,
1759 			       port_number, split, split_port_subnumber);
1760 	devlink_port_type_eth_set(devlink_port, dev);
1761 }
1762 EXPORT_SYMBOL(mlxsw_core_port_eth_set);
1763 
1764 void mlxsw_core_port_ib_set(struct mlxsw_core *mlxsw_core, u8 local_port,
1765 			    void *port_driver_priv)
1766 {
1767 	struct mlxsw_core_port *mlxsw_core_port =
1768 					&mlxsw_core->ports[local_port];
1769 	struct devlink_port *devlink_port = &mlxsw_core_port->devlink_port;
1770 
1771 	mlxsw_core_port->port_driver_priv = port_driver_priv;
1772 	devlink_port_type_ib_set(devlink_port, NULL);
1773 }
1774 EXPORT_SYMBOL(mlxsw_core_port_ib_set);
1775 
1776 void mlxsw_core_port_clear(struct mlxsw_core *mlxsw_core, u8 local_port,
1777 			   void *port_driver_priv)
1778 {
1779 	struct mlxsw_core_port *mlxsw_core_port =
1780 					&mlxsw_core->ports[local_port];
1781 	struct devlink_port *devlink_port = &mlxsw_core_port->devlink_port;
1782 
1783 	mlxsw_core_port->port_driver_priv = port_driver_priv;
1784 	devlink_port_type_clear(devlink_port);
1785 }
1786 EXPORT_SYMBOL(mlxsw_core_port_clear);
1787 
1788 enum devlink_port_type mlxsw_core_port_type_get(struct mlxsw_core *mlxsw_core,
1789 						u8 local_port)
1790 {
1791 	struct mlxsw_core_port *mlxsw_core_port =
1792 					&mlxsw_core->ports[local_port];
1793 	struct devlink_port *devlink_port = &mlxsw_core_port->devlink_port;
1794 
1795 	return devlink_port->type;
1796 }
1797 EXPORT_SYMBOL(mlxsw_core_port_type_get);
1798 
1799 int mlxsw_core_port_get_phys_port_name(struct mlxsw_core *mlxsw_core,
1800 				       u8 local_port, char *name, size_t len)
1801 {
1802 	struct mlxsw_core_port *mlxsw_core_port =
1803 					&mlxsw_core->ports[local_port];
1804 	struct devlink_port *devlink_port = &mlxsw_core_port->devlink_port;
1805 
1806 	return devlink_port_get_phys_port_name(devlink_port, name, len);
1807 }
1808 EXPORT_SYMBOL(mlxsw_core_port_get_phys_port_name);
1809 
1810 static void mlxsw_core_buf_dump_dbg(struct mlxsw_core *mlxsw_core,
1811 				    const char *buf, size_t size)
1812 {
1813 	__be32 *m = (__be32 *) buf;
1814 	int i;
1815 	int count = size / sizeof(__be32);
1816 
1817 	for (i = count - 1; i >= 0; i--)
1818 		if (m[i])
1819 			break;
1820 	i++;
1821 	count = i ? i : 1;
1822 	for (i = 0; i < count; i += 4)
1823 		dev_dbg(mlxsw_core->bus_info->dev, "%04x - %08x %08x %08x %08x\n",
1824 			i * 4, be32_to_cpu(m[i]), be32_to_cpu(m[i + 1]),
1825 			be32_to_cpu(m[i + 2]), be32_to_cpu(m[i + 3]));
1826 }
1827 
1828 int mlxsw_cmd_exec(struct mlxsw_core *mlxsw_core, u16 opcode, u8 opcode_mod,
1829 		   u32 in_mod, bool out_mbox_direct, bool reset_ok,
1830 		   char *in_mbox, size_t in_mbox_size,
1831 		   char *out_mbox, size_t out_mbox_size)
1832 {
1833 	u8 status;
1834 	int err;
1835 
1836 	BUG_ON(in_mbox_size % sizeof(u32) || out_mbox_size % sizeof(u32));
1837 	if (!mlxsw_core->bus->cmd_exec)
1838 		return -EOPNOTSUPP;
1839 
1840 	dev_dbg(mlxsw_core->bus_info->dev, "Cmd exec (opcode=%x(%s),opcode_mod=%x,in_mod=%x)\n",
1841 		opcode, mlxsw_cmd_opcode_str(opcode), opcode_mod, in_mod);
1842 	if (in_mbox) {
1843 		dev_dbg(mlxsw_core->bus_info->dev, "Input mailbox:\n");
1844 		mlxsw_core_buf_dump_dbg(mlxsw_core, in_mbox, in_mbox_size);
1845 	}
1846 
1847 	err = mlxsw_core->bus->cmd_exec(mlxsw_core->bus_priv, opcode,
1848 					opcode_mod, in_mod, out_mbox_direct,
1849 					in_mbox, in_mbox_size,
1850 					out_mbox, out_mbox_size, &status);
1851 
1852 	if (!err && out_mbox) {
1853 		dev_dbg(mlxsw_core->bus_info->dev, "Output mailbox:\n");
1854 		mlxsw_core_buf_dump_dbg(mlxsw_core, out_mbox, out_mbox_size);
1855 	}
1856 
1857 	if (reset_ok && err == -EIO &&
1858 	    status == MLXSW_CMD_STATUS_RUNNING_RESET) {
1859 		err = 0;
1860 	} else if (err == -EIO && status != MLXSW_CMD_STATUS_OK) {
1861 		dev_err(mlxsw_core->bus_info->dev, "Cmd exec failed (opcode=%x(%s),opcode_mod=%x,in_mod=%x,status=%x(%s))\n",
1862 			opcode, mlxsw_cmd_opcode_str(opcode), opcode_mod,
1863 			in_mod, status, mlxsw_cmd_status_str(status));
1864 	} else if (err == -ETIMEDOUT) {
1865 		dev_err(mlxsw_core->bus_info->dev, "Cmd exec timed-out (opcode=%x(%s),opcode_mod=%x,in_mod=%x)\n",
1866 			opcode, mlxsw_cmd_opcode_str(opcode), opcode_mod,
1867 			in_mod);
1868 	}
1869 
1870 	return err;
1871 }
1872 EXPORT_SYMBOL(mlxsw_cmd_exec);
1873 
1874 int mlxsw_core_schedule_dw(struct delayed_work *dwork, unsigned long delay)
1875 {
1876 	return queue_delayed_work(mlxsw_wq, dwork, delay);
1877 }
1878 EXPORT_SYMBOL(mlxsw_core_schedule_dw);
1879 
1880 bool mlxsw_core_schedule_work(struct work_struct *work)
1881 {
1882 	return queue_work(mlxsw_owq, work);
1883 }
1884 EXPORT_SYMBOL(mlxsw_core_schedule_work);
1885 
1886 void mlxsw_core_flush_owq(void)
1887 {
1888 	flush_workqueue(mlxsw_owq);
1889 }
1890 EXPORT_SYMBOL(mlxsw_core_flush_owq);
1891 
1892 int mlxsw_core_kvd_sizes_get(struct mlxsw_core *mlxsw_core,
1893 			     const struct mlxsw_config_profile *profile,
1894 			     u64 *p_single_size, u64 *p_double_size,
1895 			     u64 *p_linear_size)
1896 {
1897 	struct mlxsw_driver *driver = mlxsw_core->driver;
1898 
1899 	if (!driver->kvd_sizes_get)
1900 		return -EINVAL;
1901 
1902 	return driver->kvd_sizes_get(mlxsw_core, profile,
1903 				     p_single_size, p_double_size,
1904 				     p_linear_size);
1905 }
1906 EXPORT_SYMBOL(mlxsw_core_kvd_sizes_get);
1907 
1908 void mlxsw_core_fw_flash_start(struct mlxsw_core *mlxsw_core)
1909 {
1910 	mlxsw_core->fw_flash_in_progress = true;
1911 }
1912 EXPORT_SYMBOL(mlxsw_core_fw_flash_start);
1913 
1914 void mlxsw_core_fw_flash_end(struct mlxsw_core *mlxsw_core)
1915 {
1916 	mlxsw_core->fw_flash_in_progress = false;
1917 }
1918 EXPORT_SYMBOL(mlxsw_core_fw_flash_end);
1919 
1920 int mlxsw_core_resources_query(struct mlxsw_core *mlxsw_core, char *mbox,
1921 			       struct mlxsw_res *res)
1922 {
1923 	int index, i;
1924 	u64 data;
1925 	u16 id;
1926 	int err;
1927 
1928 	if (!res)
1929 		return 0;
1930 
1931 	mlxsw_cmd_mbox_zero(mbox);
1932 
1933 	for (index = 0; index < MLXSW_CMD_QUERY_RESOURCES_MAX_QUERIES;
1934 	     index++) {
1935 		err = mlxsw_cmd_query_resources(mlxsw_core, mbox, index);
1936 		if (err)
1937 			return err;
1938 
1939 		for (i = 0; i < MLXSW_CMD_QUERY_RESOURCES_PER_QUERY; i++) {
1940 			id = mlxsw_cmd_mbox_query_resource_id_get(mbox, i);
1941 			data = mlxsw_cmd_mbox_query_resource_data_get(mbox, i);
1942 
1943 			if (id == MLXSW_CMD_QUERY_RESOURCES_TABLE_END_ID)
1944 				return 0;
1945 
1946 			mlxsw_res_parse(res, id, data);
1947 		}
1948 	}
1949 
1950 	/* If after MLXSW_RESOURCES_QUERY_MAX_QUERIES we still didn't get
1951 	 * MLXSW_RESOURCES_TABLE_END_ID, something went bad in the FW.
1952 	 */
1953 	return -EIO;
1954 }
1955 EXPORT_SYMBOL(mlxsw_core_resources_query);
1956 
1957 static int __init mlxsw_core_module_init(void)
1958 {
1959 	int err;
1960 
1961 	mlxsw_wq = alloc_workqueue(mlxsw_core_driver_name, WQ_MEM_RECLAIM, 0);
1962 	if (!mlxsw_wq)
1963 		return -ENOMEM;
1964 	mlxsw_owq = alloc_ordered_workqueue("%s_ordered", WQ_MEM_RECLAIM,
1965 					    mlxsw_core_driver_name);
1966 	if (!mlxsw_owq) {
1967 		err = -ENOMEM;
1968 		goto err_alloc_ordered_workqueue;
1969 	}
1970 	return 0;
1971 
1972 err_alloc_ordered_workqueue:
1973 	destroy_workqueue(mlxsw_wq);
1974 	return err;
1975 }
1976 
1977 static void __exit mlxsw_core_module_exit(void)
1978 {
1979 	destroy_workqueue(mlxsw_owq);
1980 	destroy_workqueue(mlxsw_wq);
1981 }
1982 
1983 module_init(mlxsw_core_module_init);
1984 module_exit(mlxsw_core_module_exit);
1985 
1986 MODULE_LICENSE("Dual BSD/GPL");
1987 MODULE_AUTHOR("Jiri Pirko <jiri@mellanox.com>");
1988 MODULE_DESCRIPTION("Mellanox switch device core driver");
1989