1 // SPDX-License-Identifier: BSD-3-Clause OR GPL-2.0 2 /* Copyright (c) 2015-2018 Mellanox Technologies. All rights reserved */ 3 4 #include <linux/kernel.h> 5 #include <linux/module.h> 6 #include <linux/device.h> 7 #include <linux/export.h> 8 #include <linux/err.h> 9 #include <linux/if_link.h> 10 #include <linux/netdevice.h> 11 #include <linux/completion.h> 12 #include <linux/skbuff.h> 13 #include <linux/etherdevice.h> 14 #include <linux/types.h> 15 #include <linux/string.h> 16 #include <linux/gfp.h> 17 #include <linux/random.h> 18 #include <linux/jiffies.h> 19 #include <linux/mutex.h> 20 #include <linux/rcupdate.h> 21 #include <linux/slab.h> 22 #include <linux/workqueue.h> 23 #include <asm/byteorder.h> 24 #include <net/devlink.h> 25 #include <trace/events/devlink.h> 26 27 #include "core.h" 28 #include "item.h" 29 #include "cmd.h" 30 #include "port.h" 31 #include "trap.h" 32 #include "emad.h" 33 #include "reg.h" 34 #include "resources.h" 35 36 static LIST_HEAD(mlxsw_core_driver_list); 37 static DEFINE_SPINLOCK(mlxsw_core_driver_list_lock); 38 39 static const char mlxsw_core_driver_name[] = "mlxsw_core"; 40 41 static struct workqueue_struct *mlxsw_wq; 42 static struct workqueue_struct *mlxsw_owq; 43 44 struct mlxsw_core_port { 45 struct devlink_port devlink_port; 46 void *port_driver_priv; 47 u8 local_port; 48 }; 49 50 void *mlxsw_core_port_driver_priv(struct mlxsw_core_port *mlxsw_core_port) 51 { 52 return mlxsw_core_port->port_driver_priv; 53 } 54 EXPORT_SYMBOL(mlxsw_core_port_driver_priv); 55 56 static bool mlxsw_core_port_check(struct mlxsw_core_port *mlxsw_core_port) 57 { 58 return mlxsw_core_port->port_driver_priv != NULL; 59 } 60 61 struct mlxsw_core { 62 struct mlxsw_driver *driver; 63 const struct mlxsw_bus *bus; 64 void *bus_priv; 65 const struct mlxsw_bus_info *bus_info; 66 struct workqueue_struct *emad_wq; 67 struct list_head rx_listener_list; 68 struct list_head event_listener_list; 69 struct { 70 atomic64_t tid; 71 struct list_head trans_list; 72 spinlock_t trans_list_lock; /* protects trans_list writes */ 73 bool use_emad; 74 } emad; 75 struct { 76 u8 *mapping; /* lag_id+port_index to local_port mapping */ 77 } lag; 78 struct mlxsw_res res; 79 struct mlxsw_hwmon *hwmon; 80 struct mlxsw_thermal *thermal; 81 struct mlxsw_core_port *ports; 82 unsigned int max_ports; 83 bool reload_fail; 84 bool fw_flash_in_progress; 85 unsigned long driver_priv[0]; 86 /* driver_priv has to be always the last item */ 87 }; 88 89 #define MLXSW_PORT_MAX_PORTS_DEFAULT 0x40 90 91 static int mlxsw_ports_init(struct mlxsw_core *mlxsw_core) 92 { 93 /* Switch ports are numbered from 1 to queried value */ 94 if (MLXSW_CORE_RES_VALID(mlxsw_core, MAX_SYSTEM_PORT)) 95 mlxsw_core->max_ports = MLXSW_CORE_RES_GET(mlxsw_core, 96 MAX_SYSTEM_PORT) + 1; 97 else 98 mlxsw_core->max_ports = MLXSW_PORT_MAX_PORTS_DEFAULT + 1; 99 100 mlxsw_core->ports = kcalloc(mlxsw_core->max_ports, 101 sizeof(struct mlxsw_core_port), GFP_KERNEL); 102 if (!mlxsw_core->ports) 103 return -ENOMEM; 104 105 return 0; 106 } 107 108 static void mlxsw_ports_fini(struct mlxsw_core *mlxsw_core) 109 { 110 kfree(mlxsw_core->ports); 111 } 112 113 unsigned int mlxsw_core_max_ports(const struct mlxsw_core *mlxsw_core) 114 { 115 return mlxsw_core->max_ports; 116 } 117 EXPORT_SYMBOL(mlxsw_core_max_ports); 118 119 void *mlxsw_core_driver_priv(struct mlxsw_core *mlxsw_core) 120 { 121 return mlxsw_core->driver_priv; 122 } 123 EXPORT_SYMBOL(mlxsw_core_driver_priv); 124 125 bool mlxsw_core_res_query_enabled(const struct mlxsw_core *mlxsw_core) 126 { 127 return mlxsw_core->driver->res_query_enabled; 128 } 129 EXPORT_SYMBOL(mlxsw_core_res_query_enabled); 130 131 struct mlxsw_rx_listener_item { 132 struct list_head list; 133 struct mlxsw_rx_listener rxl; 134 void *priv; 135 }; 136 137 struct mlxsw_event_listener_item { 138 struct list_head list; 139 struct mlxsw_event_listener el; 140 void *priv; 141 }; 142 143 /****************** 144 * EMAD processing 145 ******************/ 146 147 /* emad_eth_hdr_dmac 148 * Destination MAC in EMAD's Ethernet header. 149 * Must be set to 01:02:c9:00:00:01 150 */ 151 MLXSW_ITEM_BUF(emad, eth_hdr, dmac, 0x00, 6); 152 153 /* emad_eth_hdr_smac 154 * Source MAC in EMAD's Ethernet header. 155 * Must be set to 00:02:c9:01:02:03 156 */ 157 MLXSW_ITEM_BUF(emad, eth_hdr, smac, 0x06, 6); 158 159 /* emad_eth_hdr_ethertype 160 * Ethertype in EMAD's Ethernet header. 161 * Must be set to 0x8932 162 */ 163 MLXSW_ITEM32(emad, eth_hdr, ethertype, 0x0C, 16, 16); 164 165 /* emad_eth_hdr_mlx_proto 166 * Mellanox protocol. 167 * Must be set to 0x0. 168 */ 169 MLXSW_ITEM32(emad, eth_hdr, mlx_proto, 0x0C, 8, 8); 170 171 /* emad_eth_hdr_ver 172 * Mellanox protocol version. 173 * Must be set to 0x0. 174 */ 175 MLXSW_ITEM32(emad, eth_hdr, ver, 0x0C, 4, 4); 176 177 /* emad_op_tlv_type 178 * Type of the TLV. 179 * Must be set to 0x1 (operation TLV). 180 */ 181 MLXSW_ITEM32(emad, op_tlv, type, 0x00, 27, 5); 182 183 /* emad_op_tlv_len 184 * Length of the operation TLV in u32. 185 * Must be set to 0x4. 186 */ 187 MLXSW_ITEM32(emad, op_tlv, len, 0x00, 16, 11); 188 189 /* emad_op_tlv_dr 190 * Direct route bit. Setting to 1 indicates the EMAD is a direct route 191 * EMAD. DR TLV must follow. 192 * 193 * Note: Currently not supported and must not be set. 194 */ 195 MLXSW_ITEM32(emad, op_tlv, dr, 0x00, 15, 1); 196 197 /* emad_op_tlv_status 198 * Returned status in case of EMAD response. Must be set to 0 in case 199 * of EMAD request. 200 * 0x0 - success 201 * 0x1 - device is busy. Requester should retry 202 * 0x2 - Mellanox protocol version not supported 203 * 0x3 - unknown TLV 204 * 0x4 - register not supported 205 * 0x5 - operation class not supported 206 * 0x6 - EMAD method not supported 207 * 0x7 - bad parameter (e.g. port out of range) 208 * 0x8 - resource not available 209 * 0x9 - message receipt acknowledgment. Requester should retry 210 * 0x70 - internal error 211 */ 212 MLXSW_ITEM32(emad, op_tlv, status, 0x00, 8, 7); 213 214 /* emad_op_tlv_register_id 215 * Register ID of register within register TLV. 216 */ 217 MLXSW_ITEM32(emad, op_tlv, register_id, 0x04, 16, 16); 218 219 /* emad_op_tlv_r 220 * Response bit. Setting to 1 indicates Response, otherwise request. 221 */ 222 MLXSW_ITEM32(emad, op_tlv, r, 0x04, 15, 1); 223 224 /* emad_op_tlv_method 225 * EMAD method type. 226 * 0x1 - query 227 * 0x2 - write 228 * 0x3 - send (currently not supported) 229 * 0x4 - event 230 */ 231 MLXSW_ITEM32(emad, op_tlv, method, 0x04, 8, 7); 232 233 /* emad_op_tlv_class 234 * EMAD operation class. Must be set to 0x1 (REG_ACCESS). 235 */ 236 MLXSW_ITEM32(emad, op_tlv, class, 0x04, 0, 8); 237 238 /* emad_op_tlv_tid 239 * EMAD transaction ID. Used for pairing request and response EMADs. 240 */ 241 MLXSW_ITEM64(emad, op_tlv, tid, 0x08, 0, 64); 242 243 /* emad_reg_tlv_type 244 * Type of the TLV. 245 * Must be set to 0x3 (register TLV). 246 */ 247 MLXSW_ITEM32(emad, reg_tlv, type, 0x00, 27, 5); 248 249 /* emad_reg_tlv_len 250 * Length of the operation TLV in u32. 251 */ 252 MLXSW_ITEM32(emad, reg_tlv, len, 0x00, 16, 11); 253 254 /* emad_end_tlv_type 255 * Type of the TLV. 256 * Must be set to 0x0 (end TLV). 257 */ 258 MLXSW_ITEM32(emad, end_tlv, type, 0x00, 27, 5); 259 260 /* emad_end_tlv_len 261 * Length of the end TLV in u32. 262 * Must be set to 1. 263 */ 264 MLXSW_ITEM32(emad, end_tlv, len, 0x00, 16, 11); 265 266 enum mlxsw_core_reg_access_type { 267 MLXSW_CORE_REG_ACCESS_TYPE_QUERY, 268 MLXSW_CORE_REG_ACCESS_TYPE_WRITE, 269 }; 270 271 static inline const char * 272 mlxsw_core_reg_access_type_str(enum mlxsw_core_reg_access_type type) 273 { 274 switch (type) { 275 case MLXSW_CORE_REG_ACCESS_TYPE_QUERY: 276 return "query"; 277 case MLXSW_CORE_REG_ACCESS_TYPE_WRITE: 278 return "write"; 279 } 280 BUG(); 281 } 282 283 static void mlxsw_emad_pack_end_tlv(char *end_tlv) 284 { 285 mlxsw_emad_end_tlv_type_set(end_tlv, MLXSW_EMAD_TLV_TYPE_END); 286 mlxsw_emad_end_tlv_len_set(end_tlv, MLXSW_EMAD_END_TLV_LEN); 287 } 288 289 static void mlxsw_emad_pack_reg_tlv(char *reg_tlv, 290 const struct mlxsw_reg_info *reg, 291 char *payload) 292 { 293 mlxsw_emad_reg_tlv_type_set(reg_tlv, MLXSW_EMAD_TLV_TYPE_REG); 294 mlxsw_emad_reg_tlv_len_set(reg_tlv, reg->len / sizeof(u32) + 1); 295 memcpy(reg_tlv + sizeof(u32), payload, reg->len); 296 } 297 298 static void mlxsw_emad_pack_op_tlv(char *op_tlv, 299 const struct mlxsw_reg_info *reg, 300 enum mlxsw_core_reg_access_type type, 301 u64 tid) 302 { 303 mlxsw_emad_op_tlv_type_set(op_tlv, MLXSW_EMAD_TLV_TYPE_OP); 304 mlxsw_emad_op_tlv_len_set(op_tlv, MLXSW_EMAD_OP_TLV_LEN); 305 mlxsw_emad_op_tlv_dr_set(op_tlv, 0); 306 mlxsw_emad_op_tlv_status_set(op_tlv, 0); 307 mlxsw_emad_op_tlv_register_id_set(op_tlv, reg->id); 308 mlxsw_emad_op_tlv_r_set(op_tlv, MLXSW_EMAD_OP_TLV_REQUEST); 309 if (type == MLXSW_CORE_REG_ACCESS_TYPE_QUERY) 310 mlxsw_emad_op_tlv_method_set(op_tlv, 311 MLXSW_EMAD_OP_TLV_METHOD_QUERY); 312 else 313 mlxsw_emad_op_tlv_method_set(op_tlv, 314 MLXSW_EMAD_OP_TLV_METHOD_WRITE); 315 mlxsw_emad_op_tlv_class_set(op_tlv, 316 MLXSW_EMAD_OP_TLV_CLASS_REG_ACCESS); 317 mlxsw_emad_op_tlv_tid_set(op_tlv, tid); 318 } 319 320 static int mlxsw_emad_construct_eth_hdr(struct sk_buff *skb) 321 { 322 char *eth_hdr = skb_push(skb, MLXSW_EMAD_ETH_HDR_LEN); 323 324 mlxsw_emad_eth_hdr_dmac_memcpy_to(eth_hdr, MLXSW_EMAD_EH_DMAC); 325 mlxsw_emad_eth_hdr_smac_memcpy_to(eth_hdr, MLXSW_EMAD_EH_SMAC); 326 mlxsw_emad_eth_hdr_ethertype_set(eth_hdr, MLXSW_EMAD_EH_ETHERTYPE); 327 mlxsw_emad_eth_hdr_mlx_proto_set(eth_hdr, MLXSW_EMAD_EH_MLX_PROTO); 328 mlxsw_emad_eth_hdr_ver_set(eth_hdr, MLXSW_EMAD_EH_PROTO_VERSION); 329 330 skb_reset_mac_header(skb); 331 332 return 0; 333 } 334 335 static void mlxsw_emad_construct(struct sk_buff *skb, 336 const struct mlxsw_reg_info *reg, 337 char *payload, 338 enum mlxsw_core_reg_access_type type, 339 u64 tid) 340 { 341 char *buf; 342 343 buf = skb_push(skb, MLXSW_EMAD_END_TLV_LEN * sizeof(u32)); 344 mlxsw_emad_pack_end_tlv(buf); 345 346 buf = skb_push(skb, reg->len + sizeof(u32)); 347 mlxsw_emad_pack_reg_tlv(buf, reg, payload); 348 349 buf = skb_push(skb, MLXSW_EMAD_OP_TLV_LEN * sizeof(u32)); 350 mlxsw_emad_pack_op_tlv(buf, reg, type, tid); 351 352 mlxsw_emad_construct_eth_hdr(skb); 353 } 354 355 static char *mlxsw_emad_op_tlv(const struct sk_buff *skb) 356 { 357 return ((char *) (skb->data + MLXSW_EMAD_ETH_HDR_LEN)); 358 } 359 360 static char *mlxsw_emad_reg_tlv(const struct sk_buff *skb) 361 { 362 return ((char *) (skb->data + MLXSW_EMAD_ETH_HDR_LEN + 363 MLXSW_EMAD_OP_TLV_LEN * sizeof(u32))); 364 } 365 366 static char *mlxsw_emad_reg_payload(const char *op_tlv) 367 { 368 return ((char *) (op_tlv + (MLXSW_EMAD_OP_TLV_LEN + 1) * sizeof(u32))); 369 } 370 371 static u64 mlxsw_emad_get_tid(const struct sk_buff *skb) 372 { 373 char *op_tlv; 374 375 op_tlv = mlxsw_emad_op_tlv(skb); 376 return mlxsw_emad_op_tlv_tid_get(op_tlv); 377 } 378 379 static bool mlxsw_emad_is_resp(const struct sk_buff *skb) 380 { 381 char *op_tlv; 382 383 op_tlv = mlxsw_emad_op_tlv(skb); 384 return (mlxsw_emad_op_tlv_r_get(op_tlv) == MLXSW_EMAD_OP_TLV_RESPONSE); 385 } 386 387 static int mlxsw_emad_process_status(char *op_tlv, 388 enum mlxsw_emad_op_tlv_status *p_status) 389 { 390 *p_status = mlxsw_emad_op_tlv_status_get(op_tlv); 391 392 switch (*p_status) { 393 case MLXSW_EMAD_OP_TLV_STATUS_SUCCESS: 394 return 0; 395 case MLXSW_EMAD_OP_TLV_STATUS_BUSY: 396 case MLXSW_EMAD_OP_TLV_STATUS_MESSAGE_RECEIPT_ACK: 397 return -EAGAIN; 398 case MLXSW_EMAD_OP_TLV_STATUS_VERSION_NOT_SUPPORTED: 399 case MLXSW_EMAD_OP_TLV_STATUS_UNKNOWN_TLV: 400 case MLXSW_EMAD_OP_TLV_STATUS_REGISTER_NOT_SUPPORTED: 401 case MLXSW_EMAD_OP_TLV_STATUS_CLASS_NOT_SUPPORTED: 402 case MLXSW_EMAD_OP_TLV_STATUS_METHOD_NOT_SUPPORTED: 403 case MLXSW_EMAD_OP_TLV_STATUS_BAD_PARAMETER: 404 case MLXSW_EMAD_OP_TLV_STATUS_RESOURCE_NOT_AVAILABLE: 405 case MLXSW_EMAD_OP_TLV_STATUS_INTERNAL_ERROR: 406 default: 407 return -EIO; 408 } 409 } 410 411 static int 412 mlxsw_emad_process_status_skb(struct sk_buff *skb, 413 enum mlxsw_emad_op_tlv_status *p_status) 414 { 415 return mlxsw_emad_process_status(mlxsw_emad_op_tlv(skb), p_status); 416 } 417 418 struct mlxsw_reg_trans { 419 struct list_head list; 420 struct list_head bulk_list; 421 struct mlxsw_core *core; 422 struct sk_buff *tx_skb; 423 struct mlxsw_tx_info tx_info; 424 struct delayed_work timeout_dw; 425 unsigned int retries; 426 u64 tid; 427 struct completion completion; 428 atomic_t active; 429 mlxsw_reg_trans_cb_t *cb; 430 unsigned long cb_priv; 431 const struct mlxsw_reg_info *reg; 432 enum mlxsw_core_reg_access_type type; 433 int err; 434 enum mlxsw_emad_op_tlv_status emad_status; 435 struct rcu_head rcu; 436 }; 437 438 #define MLXSW_EMAD_TIMEOUT_DURING_FW_FLASH_MS 3000 439 #define MLXSW_EMAD_TIMEOUT_MS 200 440 441 static void mlxsw_emad_trans_timeout_schedule(struct mlxsw_reg_trans *trans) 442 { 443 unsigned long timeout = msecs_to_jiffies(MLXSW_EMAD_TIMEOUT_MS); 444 445 if (trans->core->fw_flash_in_progress) 446 timeout = msecs_to_jiffies(MLXSW_EMAD_TIMEOUT_DURING_FW_FLASH_MS); 447 448 queue_delayed_work(trans->core->emad_wq, &trans->timeout_dw, timeout); 449 } 450 451 static int mlxsw_emad_transmit(struct mlxsw_core *mlxsw_core, 452 struct mlxsw_reg_trans *trans) 453 { 454 struct sk_buff *skb; 455 int err; 456 457 skb = skb_copy(trans->tx_skb, GFP_KERNEL); 458 if (!skb) 459 return -ENOMEM; 460 461 trace_devlink_hwmsg(priv_to_devlink(mlxsw_core), false, 0, 462 skb->data + mlxsw_core->driver->txhdr_len, 463 skb->len - mlxsw_core->driver->txhdr_len); 464 465 atomic_set(&trans->active, 1); 466 err = mlxsw_core_skb_transmit(mlxsw_core, skb, &trans->tx_info); 467 if (err) { 468 dev_kfree_skb(skb); 469 return err; 470 } 471 mlxsw_emad_trans_timeout_schedule(trans); 472 return 0; 473 } 474 475 static void mlxsw_emad_trans_finish(struct mlxsw_reg_trans *trans, int err) 476 { 477 struct mlxsw_core *mlxsw_core = trans->core; 478 479 dev_kfree_skb(trans->tx_skb); 480 spin_lock_bh(&mlxsw_core->emad.trans_list_lock); 481 list_del_rcu(&trans->list); 482 spin_unlock_bh(&mlxsw_core->emad.trans_list_lock); 483 trans->err = err; 484 complete(&trans->completion); 485 } 486 487 static void mlxsw_emad_transmit_retry(struct mlxsw_core *mlxsw_core, 488 struct mlxsw_reg_trans *trans) 489 { 490 int err; 491 492 if (trans->retries < MLXSW_EMAD_MAX_RETRY) { 493 trans->retries++; 494 err = mlxsw_emad_transmit(trans->core, trans); 495 if (err == 0) 496 return; 497 } else { 498 err = -EIO; 499 } 500 mlxsw_emad_trans_finish(trans, err); 501 } 502 503 static void mlxsw_emad_trans_timeout_work(struct work_struct *work) 504 { 505 struct mlxsw_reg_trans *trans = container_of(work, 506 struct mlxsw_reg_trans, 507 timeout_dw.work); 508 509 if (!atomic_dec_and_test(&trans->active)) 510 return; 511 512 mlxsw_emad_transmit_retry(trans->core, trans); 513 } 514 515 static void mlxsw_emad_process_response(struct mlxsw_core *mlxsw_core, 516 struct mlxsw_reg_trans *trans, 517 struct sk_buff *skb) 518 { 519 int err; 520 521 if (!atomic_dec_and_test(&trans->active)) 522 return; 523 524 err = mlxsw_emad_process_status_skb(skb, &trans->emad_status); 525 if (err == -EAGAIN) { 526 mlxsw_emad_transmit_retry(mlxsw_core, trans); 527 } else { 528 if (err == 0) { 529 char *op_tlv = mlxsw_emad_op_tlv(skb); 530 531 if (trans->cb) 532 trans->cb(mlxsw_core, 533 mlxsw_emad_reg_payload(op_tlv), 534 trans->reg->len, trans->cb_priv); 535 } 536 mlxsw_emad_trans_finish(trans, err); 537 } 538 } 539 540 /* called with rcu read lock held */ 541 static void mlxsw_emad_rx_listener_func(struct sk_buff *skb, u8 local_port, 542 void *priv) 543 { 544 struct mlxsw_core *mlxsw_core = priv; 545 struct mlxsw_reg_trans *trans; 546 547 trace_devlink_hwmsg(priv_to_devlink(mlxsw_core), true, 0, 548 skb->data, skb->len); 549 550 if (!mlxsw_emad_is_resp(skb)) 551 goto free_skb; 552 553 list_for_each_entry_rcu(trans, &mlxsw_core->emad.trans_list, list) { 554 if (mlxsw_emad_get_tid(skb) == trans->tid) { 555 mlxsw_emad_process_response(mlxsw_core, trans, skb); 556 break; 557 } 558 } 559 560 free_skb: 561 dev_kfree_skb(skb); 562 } 563 564 static const struct mlxsw_listener mlxsw_emad_rx_listener = 565 MLXSW_RXL(mlxsw_emad_rx_listener_func, ETHEMAD, TRAP_TO_CPU, false, 566 EMAD, DISCARD); 567 568 static int mlxsw_emad_init(struct mlxsw_core *mlxsw_core) 569 { 570 struct workqueue_struct *emad_wq; 571 u64 tid; 572 int err; 573 574 if (!(mlxsw_core->bus->features & MLXSW_BUS_F_TXRX)) 575 return 0; 576 577 emad_wq = alloc_workqueue("mlxsw_core_emad", 0, 0); 578 if (!emad_wq) 579 return -ENOMEM; 580 mlxsw_core->emad_wq = emad_wq; 581 582 /* Set the upper 32 bits of the transaction ID field to a random 583 * number. This allows us to discard EMADs addressed to other 584 * devices. 585 */ 586 get_random_bytes(&tid, 4); 587 tid <<= 32; 588 atomic64_set(&mlxsw_core->emad.tid, tid); 589 590 INIT_LIST_HEAD(&mlxsw_core->emad.trans_list); 591 spin_lock_init(&mlxsw_core->emad.trans_list_lock); 592 593 err = mlxsw_core_trap_register(mlxsw_core, &mlxsw_emad_rx_listener, 594 mlxsw_core); 595 if (err) 596 return err; 597 598 err = mlxsw_core->driver->basic_trap_groups_set(mlxsw_core); 599 if (err) 600 goto err_emad_trap_set; 601 mlxsw_core->emad.use_emad = true; 602 603 return 0; 604 605 err_emad_trap_set: 606 mlxsw_core_trap_unregister(mlxsw_core, &mlxsw_emad_rx_listener, 607 mlxsw_core); 608 destroy_workqueue(mlxsw_core->emad_wq); 609 return err; 610 } 611 612 static void mlxsw_emad_fini(struct mlxsw_core *mlxsw_core) 613 { 614 615 if (!(mlxsw_core->bus->features & MLXSW_BUS_F_TXRX)) 616 return; 617 618 mlxsw_core->emad.use_emad = false; 619 mlxsw_core_trap_unregister(mlxsw_core, &mlxsw_emad_rx_listener, 620 mlxsw_core); 621 destroy_workqueue(mlxsw_core->emad_wq); 622 } 623 624 static struct sk_buff *mlxsw_emad_alloc(const struct mlxsw_core *mlxsw_core, 625 u16 reg_len) 626 { 627 struct sk_buff *skb; 628 u16 emad_len; 629 630 emad_len = (reg_len + sizeof(u32) + MLXSW_EMAD_ETH_HDR_LEN + 631 (MLXSW_EMAD_OP_TLV_LEN + MLXSW_EMAD_END_TLV_LEN) * 632 sizeof(u32) + mlxsw_core->driver->txhdr_len); 633 if (emad_len > MLXSW_EMAD_MAX_FRAME_LEN) 634 return NULL; 635 636 skb = netdev_alloc_skb(NULL, emad_len); 637 if (!skb) 638 return NULL; 639 memset(skb->data, 0, emad_len); 640 skb_reserve(skb, emad_len); 641 642 return skb; 643 } 644 645 static int mlxsw_emad_reg_access(struct mlxsw_core *mlxsw_core, 646 const struct mlxsw_reg_info *reg, 647 char *payload, 648 enum mlxsw_core_reg_access_type type, 649 struct mlxsw_reg_trans *trans, 650 struct list_head *bulk_list, 651 mlxsw_reg_trans_cb_t *cb, 652 unsigned long cb_priv, u64 tid) 653 { 654 struct sk_buff *skb; 655 int err; 656 657 dev_dbg(mlxsw_core->bus_info->dev, "EMAD reg access (tid=%llx,reg_id=%x(%s),type=%s)\n", 658 tid, reg->id, mlxsw_reg_id_str(reg->id), 659 mlxsw_core_reg_access_type_str(type)); 660 661 skb = mlxsw_emad_alloc(mlxsw_core, reg->len); 662 if (!skb) 663 return -ENOMEM; 664 665 list_add_tail(&trans->bulk_list, bulk_list); 666 trans->core = mlxsw_core; 667 trans->tx_skb = skb; 668 trans->tx_info.local_port = MLXSW_PORT_CPU_PORT; 669 trans->tx_info.is_emad = true; 670 INIT_DELAYED_WORK(&trans->timeout_dw, mlxsw_emad_trans_timeout_work); 671 trans->tid = tid; 672 init_completion(&trans->completion); 673 trans->cb = cb; 674 trans->cb_priv = cb_priv; 675 trans->reg = reg; 676 trans->type = type; 677 678 mlxsw_emad_construct(skb, reg, payload, type, trans->tid); 679 mlxsw_core->driver->txhdr_construct(skb, &trans->tx_info); 680 681 spin_lock_bh(&mlxsw_core->emad.trans_list_lock); 682 list_add_tail_rcu(&trans->list, &mlxsw_core->emad.trans_list); 683 spin_unlock_bh(&mlxsw_core->emad.trans_list_lock); 684 err = mlxsw_emad_transmit(mlxsw_core, trans); 685 if (err) 686 goto err_out; 687 return 0; 688 689 err_out: 690 spin_lock_bh(&mlxsw_core->emad.trans_list_lock); 691 list_del_rcu(&trans->list); 692 spin_unlock_bh(&mlxsw_core->emad.trans_list_lock); 693 list_del(&trans->bulk_list); 694 dev_kfree_skb(trans->tx_skb); 695 return err; 696 } 697 698 /***************** 699 * Core functions 700 *****************/ 701 702 int mlxsw_core_driver_register(struct mlxsw_driver *mlxsw_driver) 703 { 704 spin_lock(&mlxsw_core_driver_list_lock); 705 list_add_tail(&mlxsw_driver->list, &mlxsw_core_driver_list); 706 spin_unlock(&mlxsw_core_driver_list_lock); 707 return 0; 708 } 709 EXPORT_SYMBOL(mlxsw_core_driver_register); 710 711 void mlxsw_core_driver_unregister(struct mlxsw_driver *mlxsw_driver) 712 { 713 spin_lock(&mlxsw_core_driver_list_lock); 714 list_del(&mlxsw_driver->list); 715 spin_unlock(&mlxsw_core_driver_list_lock); 716 } 717 EXPORT_SYMBOL(mlxsw_core_driver_unregister); 718 719 static struct mlxsw_driver *__driver_find(const char *kind) 720 { 721 struct mlxsw_driver *mlxsw_driver; 722 723 list_for_each_entry(mlxsw_driver, &mlxsw_core_driver_list, list) { 724 if (strcmp(mlxsw_driver->kind, kind) == 0) 725 return mlxsw_driver; 726 } 727 return NULL; 728 } 729 730 static struct mlxsw_driver *mlxsw_core_driver_get(const char *kind) 731 { 732 struct mlxsw_driver *mlxsw_driver; 733 734 spin_lock(&mlxsw_core_driver_list_lock); 735 mlxsw_driver = __driver_find(kind); 736 spin_unlock(&mlxsw_core_driver_list_lock); 737 return mlxsw_driver; 738 } 739 740 static int mlxsw_devlink_port_split(struct devlink *devlink, 741 unsigned int port_index, 742 unsigned int count, 743 struct netlink_ext_ack *extack) 744 { 745 struct mlxsw_core *mlxsw_core = devlink_priv(devlink); 746 747 if (port_index >= mlxsw_core->max_ports) { 748 NL_SET_ERR_MSG_MOD(extack, "Port index exceeds maximum number of ports"); 749 return -EINVAL; 750 } 751 if (!mlxsw_core->driver->port_split) 752 return -EOPNOTSUPP; 753 return mlxsw_core->driver->port_split(mlxsw_core, port_index, count, 754 extack); 755 } 756 757 static int mlxsw_devlink_port_unsplit(struct devlink *devlink, 758 unsigned int port_index, 759 struct netlink_ext_ack *extack) 760 { 761 struct mlxsw_core *mlxsw_core = devlink_priv(devlink); 762 763 if (port_index >= mlxsw_core->max_ports) { 764 NL_SET_ERR_MSG_MOD(extack, "Port index exceeds maximum number of ports"); 765 return -EINVAL; 766 } 767 if (!mlxsw_core->driver->port_unsplit) 768 return -EOPNOTSUPP; 769 return mlxsw_core->driver->port_unsplit(mlxsw_core, port_index, 770 extack); 771 } 772 773 static int 774 mlxsw_devlink_sb_pool_get(struct devlink *devlink, 775 unsigned int sb_index, u16 pool_index, 776 struct devlink_sb_pool_info *pool_info) 777 { 778 struct mlxsw_core *mlxsw_core = devlink_priv(devlink); 779 struct mlxsw_driver *mlxsw_driver = mlxsw_core->driver; 780 781 if (!mlxsw_driver->sb_pool_get) 782 return -EOPNOTSUPP; 783 return mlxsw_driver->sb_pool_get(mlxsw_core, sb_index, 784 pool_index, pool_info); 785 } 786 787 static int 788 mlxsw_devlink_sb_pool_set(struct devlink *devlink, 789 unsigned int sb_index, u16 pool_index, u32 size, 790 enum devlink_sb_threshold_type threshold_type, 791 struct netlink_ext_ack *extack) 792 { 793 struct mlxsw_core *mlxsw_core = devlink_priv(devlink); 794 struct mlxsw_driver *mlxsw_driver = mlxsw_core->driver; 795 796 if (!mlxsw_driver->sb_pool_set) 797 return -EOPNOTSUPP; 798 return mlxsw_driver->sb_pool_set(mlxsw_core, sb_index, 799 pool_index, size, threshold_type, 800 extack); 801 } 802 803 static void *__dl_port(struct devlink_port *devlink_port) 804 { 805 return container_of(devlink_port, struct mlxsw_core_port, devlink_port); 806 } 807 808 static int mlxsw_devlink_port_type_set(struct devlink_port *devlink_port, 809 enum devlink_port_type port_type) 810 { 811 struct mlxsw_core *mlxsw_core = devlink_priv(devlink_port->devlink); 812 struct mlxsw_driver *mlxsw_driver = mlxsw_core->driver; 813 struct mlxsw_core_port *mlxsw_core_port = __dl_port(devlink_port); 814 815 if (!mlxsw_driver->port_type_set) 816 return -EOPNOTSUPP; 817 818 return mlxsw_driver->port_type_set(mlxsw_core, 819 mlxsw_core_port->local_port, 820 port_type); 821 } 822 823 static int mlxsw_devlink_sb_port_pool_get(struct devlink_port *devlink_port, 824 unsigned int sb_index, u16 pool_index, 825 u32 *p_threshold) 826 { 827 struct mlxsw_core *mlxsw_core = devlink_priv(devlink_port->devlink); 828 struct mlxsw_driver *mlxsw_driver = mlxsw_core->driver; 829 struct mlxsw_core_port *mlxsw_core_port = __dl_port(devlink_port); 830 831 if (!mlxsw_driver->sb_port_pool_get || 832 !mlxsw_core_port_check(mlxsw_core_port)) 833 return -EOPNOTSUPP; 834 return mlxsw_driver->sb_port_pool_get(mlxsw_core_port, sb_index, 835 pool_index, p_threshold); 836 } 837 838 static int mlxsw_devlink_sb_port_pool_set(struct devlink_port *devlink_port, 839 unsigned int sb_index, u16 pool_index, 840 u32 threshold, 841 struct netlink_ext_ack *extack) 842 { 843 struct mlxsw_core *mlxsw_core = devlink_priv(devlink_port->devlink); 844 struct mlxsw_driver *mlxsw_driver = mlxsw_core->driver; 845 struct mlxsw_core_port *mlxsw_core_port = __dl_port(devlink_port); 846 847 if (!mlxsw_driver->sb_port_pool_set || 848 !mlxsw_core_port_check(mlxsw_core_port)) 849 return -EOPNOTSUPP; 850 return mlxsw_driver->sb_port_pool_set(mlxsw_core_port, sb_index, 851 pool_index, threshold, extack); 852 } 853 854 static int 855 mlxsw_devlink_sb_tc_pool_bind_get(struct devlink_port *devlink_port, 856 unsigned int sb_index, u16 tc_index, 857 enum devlink_sb_pool_type pool_type, 858 u16 *p_pool_index, u32 *p_threshold) 859 { 860 struct mlxsw_core *mlxsw_core = devlink_priv(devlink_port->devlink); 861 struct mlxsw_driver *mlxsw_driver = mlxsw_core->driver; 862 struct mlxsw_core_port *mlxsw_core_port = __dl_port(devlink_port); 863 864 if (!mlxsw_driver->sb_tc_pool_bind_get || 865 !mlxsw_core_port_check(mlxsw_core_port)) 866 return -EOPNOTSUPP; 867 return mlxsw_driver->sb_tc_pool_bind_get(mlxsw_core_port, sb_index, 868 tc_index, pool_type, 869 p_pool_index, p_threshold); 870 } 871 872 static int 873 mlxsw_devlink_sb_tc_pool_bind_set(struct devlink_port *devlink_port, 874 unsigned int sb_index, u16 tc_index, 875 enum devlink_sb_pool_type pool_type, 876 u16 pool_index, u32 threshold, 877 struct netlink_ext_ack *extack) 878 { 879 struct mlxsw_core *mlxsw_core = devlink_priv(devlink_port->devlink); 880 struct mlxsw_driver *mlxsw_driver = mlxsw_core->driver; 881 struct mlxsw_core_port *mlxsw_core_port = __dl_port(devlink_port); 882 883 if (!mlxsw_driver->sb_tc_pool_bind_set || 884 !mlxsw_core_port_check(mlxsw_core_port)) 885 return -EOPNOTSUPP; 886 return mlxsw_driver->sb_tc_pool_bind_set(mlxsw_core_port, sb_index, 887 tc_index, pool_type, 888 pool_index, threshold, extack); 889 } 890 891 static int mlxsw_devlink_sb_occ_snapshot(struct devlink *devlink, 892 unsigned int sb_index) 893 { 894 struct mlxsw_core *mlxsw_core = devlink_priv(devlink); 895 struct mlxsw_driver *mlxsw_driver = mlxsw_core->driver; 896 897 if (!mlxsw_driver->sb_occ_snapshot) 898 return -EOPNOTSUPP; 899 return mlxsw_driver->sb_occ_snapshot(mlxsw_core, sb_index); 900 } 901 902 static int mlxsw_devlink_sb_occ_max_clear(struct devlink *devlink, 903 unsigned int sb_index) 904 { 905 struct mlxsw_core *mlxsw_core = devlink_priv(devlink); 906 struct mlxsw_driver *mlxsw_driver = mlxsw_core->driver; 907 908 if (!mlxsw_driver->sb_occ_max_clear) 909 return -EOPNOTSUPP; 910 return mlxsw_driver->sb_occ_max_clear(mlxsw_core, sb_index); 911 } 912 913 static int 914 mlxsw_devlink_sb_occ_port_pool_get(struct devlink_port *devlink_port, 915 unsigned int sb_index, u16 pool_index, 916 u32 *p_cur, u32 *p_max) 917 { 918 struct mlxsw_core *mlxsw_core = devlink_priv(devlink_port->devlink); 919 struct mlxsw_driver *mlxsw_driver = mlxsw_core->driver; 920 struct mlxsw_core_port *mlxsw_core_port = __dl_port(devlink_port); 921 922 if (!mlxsw_driver->sb_occ_port_pool_get || 923 !mlxsw_core_port_check(mlxsw_core_port)) 924 return -EOPNOTSUPP; 925 return mlxsw_driver->sb_occ_port_pool_get(mlxsw_core_port, sb_index, 926 pool_index, p_cur, p_max); 927 } 928 929 static int 930 mlxsw_devlink_sb_occ_tc_port_bind_get(struct devlink_port *devlink_port, 931 unsigned int sb_index, u16 tc_index, 932 enum devlink_sb_pool_type pool_type, 933 u32 *p_cur, u32 *p_max) 934 { 935 struct mlxsw_core *mlxsw_core = devlink_priv(devlink_port->devlink); 936 struct mlxsw_driver *mlxsw_driver = mlxsw_core->driver; 937 struct mlxsw_core_port *mlxsw_core_port = __dl_port(devlink_port); 938 939 if (!mlxsw_driver->sb_occ_tc_port_bind_get || 940 !mlxsw_core_port_check(mlxsw_core_port)) 941 return -EOPNOTSUPP; 942 return mlxsw_driver->sb_occ_tc_port_bind_get(mlxsw_core_port, 943 sb_index, tc_index, 944 pool_type, p_cur, p_max); 945 } 946 947 static int 948 mlxsw_devlink_info_get(struct devlink *devlink, struct devlink_info_req *req, 949 struct netlink_ext_ack *extack) 950 { 951 struct mlxsw_core *mlxsw_core = devlink_priv(devlink); 952 char fw_info_psid[MLXSW_REG_MGIR_FW_INFO_PSID_SIZE]; 953 u32 hw_rev, fw_major, fw_minor, fw_sub_minor; 954 char mgir_pl[MLXSW_REG_MGIR_LEN]; 955 char buf[32]; 956 int err; 957 958 err = devlink_info_driver_name_put(req, 959 mlxsw_core->bus_info->device_kind); 960 if (err) 961 return err; 962 963 mlxsw_reg_mgir_pack(mgir_pl); 964 err = mlxsw_reg_query(mlxsw_core, MLXSW_REG(mgir), mgir_pl); 965 if (err) 966 return err; 967 mlxsw_reg_mgir_unpack(mgir_pl, &hw_rev, fw_info_psid, &fw_major, 968 &fw_minor, &fw_sub_minor); 969 970 sprintf(buf, "%X", hw_rev); 971 err = devlink_info_version_fixed_put(req, "hw.revision", buf); 972 if (err) 973 return err; 974 975 err = devlink_info_version_fixed_put(req, "fw.psid", fw_info_psid); 976 if (err) 977 return err; 978 979 sprintf(buf, "%d.%d.%d", fw_major, fw_minor, fw_sub_minor); 980 err = devlink_info_version_running_put(req, "fw.version", buf); 981 if (err) 982 return err; 983 984 return 0; 985 } 986 987 static int mlxsw_devlink_core_bus_device_reload(struct devlink *devlink, 988 struct netlink_ext_ack *extack) 989 { 990 struct mlxsw_core *mlxsw_core = devlink_priv(devlink); 991 int err; 992 993 if (!(mlxsw_core->bus->features & MLXSW_BUS_F_RESET)) 994 return -EOPNOTSUPP; 995 996 mlxsw_core_bus_device_unregister(mlxsw_core, true); 997 err = mlxsw_core_bus_device_register(mlxsw_core->bus_info, 998 mlxsw_core->bus, 999 mlxsw_core->bus_priv, true, 1000 devlink); 1001 mlxsw_core->reload_fail = !!err; 1002 1003 return err; 1004 } 1005 1006 static const struct devlink_ops mlxsw_devlink_ops = { 1007 .reload = mlxsw_devlink_core_bus_device_reload, 1008 .port_type_set = mlxsw_devlink_port_type_set, 1009 .port_split = mlxsw_devlink_port_split, 1010 .port_unsplit = mlxsw_devlink_port_unsplit, 1011 .sb_pool_get = mlxsw_devlink_sb_pool_get, 1012 .sb_pool_set = mlxsw_devlink_sb_pool_set, 1013 .sb_port_pool_get = mlxsw_devlink_sb_port_pool_get, 1014 .sb_port_pool_set = mlxsw_devlink_sb_port_pool_set, 1015 .sb_tc_pool_bind_get = mlxsw_devlink_sb_tc_pool_bind_get, 1016 .sb_tc_pool_bind_set = mlxsw_devlink_sb_tc_pool_bind_set, 1017 .sb_occ_snapshot = mlxsw_devlink_sb_occ_snapshot, 1018 .sb_occ_max_clear = mlxsw_devlink_sb_occ_max_clear, 1019 .sb_occ_port_pool_get = mlxsw_devlink_sb_occ_port_pool_get, 1020 .sb_occ_tc_port_bind_get = mlxsw_devlink_sb_occ_tc_port_bind_get, 1021 .info_get = mlxsw_devlink_info_get, 1022 }; 1023 1024 static int 1025 __mlxsw_core_bus_device_register(const struct mlxsw_bus_info *mlxsw_bus_info, 1026 const struct mlxsw_bus *mlxsw_bus, 1027 void *bus_priv, bool reload, 1028 struct devlink *devlink) 1029 { 1030 const char *device_kind = mlxsw_bus_info->device_kind; 1031 struct mlxsw_core *mlxsw_core; 1032 struct mlxsw_driver *mlxsw_driver; 1033 struct mlxsw_res *res; 1034 size_t alloc_size; 1035 int err; 1036 1037 mlxsw_driver = mlxsw_core_driver_get(device_kind); 1038 if (!mlxsw_driver) 1039 return -EINVAL; 1040 1041 if (!reload) { 1042 alloc_size = sizeof(*mlxsw_core) + mlxsw_driver->priv_size; 1043 devlink = devlink_alloc(&mlxsw_devlink_ops, alloc_size); 1044 if (!devlink) { 1045 err = -ENOMEM; 1046 goto err_devlink_alloc; 1047 } 1048 } 1049 1050 mlxsw_core = devlink_priv(devlink); 1051 INIT_LIST_HEAD(&mlxsw_core->rx_listener_list); 1052 INIT_LIST_HEAD(&mlxsw_core->event_listener_list); 1053 mlxsw_core->driver = mlxsw_driver; 1054 mlxsw_core->bus = mlxsw_bus; 1055 mlxsw_core->bus_priv = bus_priv; 1056 mlxsw_core->bus_info = mlxsw_bus_info; 1057 1058 res = mlxsw_driver->res_query_enabled ? &mlxsw_core->res : NULL; 1059 err = mlxsw_bus->init(bus_priv, mlxsw_core, mlxsw_driver->profile, res); 1060 if (err) 1061 goto err_bus_init; 1062 1063 if (mlxsw_driver->resources_register && !reload) { 1064 err = mlxsw_driver->resources_register(mlxsw_core); 1065 if (err) 1066 goto err_register_resources; 1067 } 1068 1069 err = mlxsw_ports_init(mlxsw_core); 1070 if (err) 1071 goto err_ports_init; 1072 1073 if (MLXSW_CORE_RES_VALID(mlxsw_core, MAX_LAG) && 1074 MLXSW_CORE_RES_VALID(mlxsw_core, MAX_LAG_MEMBERS)) { 1075 alloc_size = sizeof(u8) * 1076 MLXSW_CORE_RES_GET(mlxsw_core, MAX_LAG) * 1077 MLXSW_CORE_RES_GET(mlxsw_core, MAX_LAG_MEMBERS); 1078 mlxsw_core->lag.mapping = kzalloc(alloc_size, GFP_KERNEL); 1079 if (!mlxsw_core->lag.mapping) { 1080 err = -ENOMEM; 1081 goto err_alloc_lag_mapping; 1082 } 1083 } 1084 1085 err = mlxsw_emad_init(mlxsw_core); 1086 if (err) 1087 goto err_emad_init; 1088 1089 if (!reload) { 1090 err = devlink_register(devlink, mlxsw_bus_info->dev); 1091 if (err) 1092 goto err_devlink_register; 1093 } 1094 1095 if (mlxsw_driver->params_register && !reload) { 1096 err = mlxsw_driver->params_register(mlxsw_core); 1097 if (err) 1098 goto err_register_params; 1099 } 1100 1101 err = mlxsw_hwmon_init(mlxsw_core, mlxsw_bus_info, &mlxsw_core->hwmon); 1102 if (err) 1103 goto err_hwmon_init; 1104 1105 err = mlxsw_thermal_init(mlxsw_core, mlxsw_bus_info, 1106 &mlxsw_core->thermal); 1107 if (err) 1108 goto err_thermal_init; 1109 1110 if (mlxsw_driver->init) { 1111 err = mlxsw_driver->init(mlxsw_core, mlxsw_bus_info); 1112 if (err) 1113 goto err_driver_init; 1114 } 1115 1116 if (mlxsw_driver->params_register && !reload) 1117 devlink_params_publish(devlink); 1118 1119 return 0; 1120 1121 err_driver_init: 1122 mlxsw_thermal_fini(mlxsw_core->thermal); 1123 err_thermal_init: 1124 mlxsw_hwmon_fini(mlxsw_core->hwmon); 1125 err_hwmon_init: 1126 if (mlxsw_driver->params_unregister && !reload) 1127 mlxsw_driver->params_unregister(mlxsw_core); 1128 err_register_params: 1129 if (!reload) 1130 devlink_unregister(devlink); 1131 err_devlink_register: 1132 mlxsw_emad_fini(mlxsw_core); 1133 err_emad_init: 1134 kfree(mlxsw_core->lag.mapping); 1135 err_alloc_lag_mapping: 1136 mlxsw_ports_fini(mlxsw_core); 1137 err_ports_init: 1138 if (!reload) 1139 devlink_resources_unregister(devlink, NULL); 1140 err_register_resources: 1141 mlxsw_bus->fini(bus_priv); 1142 err_bus_init: 1143 if (!reload) 1144 devlink_free(devlink); 1145 err_devlink_alloc: 1146 return err; 1147 } 1148 1149 int mlxsw_core_bus_device_register(const struct mlxsw_bus_info *mlxsw_bus_info, 1150 const struct mlxsw_bus *mlxsw_bus, 1151 void *bus_priv, bool reload, 1152 struct devlink *devlink) 1153 { 1154 bool called_again = false; 1155 int err; 1156 1157 again: 1158 err = __mlxsw_core_bus_device_register(mlxsw_bus_info, mlxsw_bus, 1159 bus_priv, reload, devlink); 1160 /* -EAGAIN is returned in case the FW was updated. FW needs 1161 * a reset, so lets try to call __mlxsw_core_bus_device_register() 1162 * again. 1163 */ 1164 if (err == -EAGAIN && !called_again) { 1165 called_again = true; 1166 goto again; 1167 } 1168 1169 return err; 1170 } 1171 EXPORT_SYMBOL(mlxsw_core_bus_device_register); 1172 1173 void mlxsw_core_bus_device_unregister(struct mlxsw_core *mlxsw_core, 1174 bool reload) 1175 { 1176 struct devlink *devlink = priv_to_devlink(mlxsw_core); 1177 1178 if (mlxsw_core->reload_fail) { 1179 if (!reload) 1180 /* Only the parts that were not de-initialized in the 1181 * failed reload attempt need to be de-initialized. 1182 */ 1183 goto reload_fail_deinit; 1184 else 1185 return; 1186 } 1187 1188 if (mlxsw_core->driver->params_unregister && !reload) 1189 devlink_params_unpublish(devlink); 1190 if (mlxsw_core->driver->fini) 1191 mlxsw_core->driver->fini(mlxsw_core); 1192 mlxsw_thermal_fini(mlxsw_core->thermal); 1193 mlxsw_hwmon_fini(mlxsw_core->hwmon); 1194 if (mlxsw_core->driver->params_unregister && !reload) 1195 mlxsw_core->driver->params_unregister(mlxsw_core); 1196 if (!reload) 1197 devlink_unregister(devlink); 1198 mlxsw_emad_fini(mlxsw_core); 1199 kfree(mlxsw_core->lag.mapping); 1200 mlxsw_ports_fini(mlxsw_core); 1201 if (!reload) 1202 devlink_resources_unregister(devlink, NULL); 1203 mlxsw_core->bus->fini(mlxsw_core->bus_priv); 1204 1205 return; 1206 1207 reload_fail_deinit: 1208 if (mlxsw_core->driver->params_unregister) 1209 mlxsw_core->driver->params_unregister(mlxsw_core); 1210 devlink_unregister(devlink); 1211 devlink_resources_unregister(devlink, NULL); 1212 devlink_free(devlink); 1213 } 1214 EXPORT_SYMBOL(mlxsw_core_bus_device_unregister); 1215 1216 bool mlxsw_core_skb_transmit_busy(struct mlxsw_core *mlxsw_core, 1217 const struct mlxsw_tx_info *tx_info) 1218 { 1219 return mlxsw_core->bus->skb_transmit_busy(mlxsw_core->bus_priv, 1220 tx_info); 1221 } 1222 EXPORT_SYMBOL(mlxsw_core_skb_transmit_busy); 1223 1224 int mlxsw_core_skb_transmit(struct mlxsw_core *mlxsw_core, struct sk_buff *skb, 1225 const struct mlxsw_tx_info *tx_info) 1226 { 1227 return mlxsw_core->bus->skb_transmit(mlxsw_core->bus_priv, skb, 1228 tx_info); 1229 } 1230 EXPORT_SYMBOL(mlxsw_core_skb_transmit); 1231 1232 static bool __is_rx_listener_equal(const struct mlxsw_rx_listener *rxl_a, 1233 const struct mlxsw_rx_listener *rxl_b) 1234 { 1235 return (rxl_a->func == rxl_b->func && 1236 rxl_a->local_port == rxl_b->local_port && 1237 rxl_a->trap_id == rxl_b->trap_id); 1238 } 1239 1240 static struct mlxsw_rx_listener_item * 1241 __find_rx_listener_item(struct mlxsw_core *mlxsw_core, 1242 const struct mlxsw_rx_listener *rxl, 1243 void *priv) 1244 { 1245 struct mlxsw_rx_listener_item *rxl_item; 1246 1247 list_for_each_entry(rxl_item, &mlxsw_core->rx_listener_list, list) { 1248 if (__is_rx_listener_equal(&rxl_item->rxl, rxl) && 1249 rxl_item->priv == priv) 1250 return rxl_item; 1251 } 1252 return NULL; 1253 } 1254 1255 int mlxsw_core_rx_listener_register(struct mlxsw_core *mlxsw_core, 1256 const struct mlxsw_rx_listener *rxl, 1257 void *priv) 1258 { 1259 struct mlxsw_rx_listener_item *rxl_item; 1260 1261 rxl_item = __find_rx_listener_item(mlxsw_core, rxl, priv); 1262 if (rxl_item) 1263 return -EEXIST; 1264 rxl_item = kmalloc(sizeof(*rxl_item), GFP_KERNEL); 1265 if (!rxl_item) 1266 return -ENOMEM; 1267 rxl_item->rxl = *rxl; 1268 rxl_item->priv = priv; 1269 1270 list_add_rcu(&rxl_item->list, &mlxsw_core->rx_listener_list); 1271 return 0; 1272 } 1273 EXPORT_SYMBOL(mlxsw_core_rx_listener_register); 1274 1275 void mlxsw_core_rx_listener_unregister(struct mlxsw_core *mlxsw_core, 1276 const struct mlxsw_rx_listener *rxl, 1277 void *priv) 1278 { 1279 struct mlxsw_rx_listener_item *rxl_item; 1280 1281 rxl_item = __find_rx_listener_item(mlxsw_core, rxl, priv); 1282 if (!rxl_item) 1283 return; 1284 list_del_rcu(&rxl_item->list); 1285 synchronize_rcu(); 1286 kfree(rxl_item); 1287 } 1288 EXPORT_SYMBOL(mlxsw_core_rx_listener_unregister); 1289 1290 static void mlxsw_core_event_listener_func(struct sk_buff *skb, u8 local_port, 1291 void *priv) 1292 { 1293 struct mlxsw_event_listener_item *event_listener_item = priv; 1294 struct mlxsw_reg_info reg; 1295 char *payload; 1296 char *op_tlv = mlxsw_emad_op_tlv(skb); 1297 char *reg_tlv = mlxsw_emad_reg_tlv(skb); 1298 1299 reg.id = mlxsw_emad_op_tlv_register_id_get(op_tlv); 1300 reg.len = (mlxsw_emad_reg_tlv_len_get(reg_tlv) - 1) * sizeof(u32); 1301 payload = mlxsw_emad_reg_payload(op_tlv); 1302 event_listener_item->el.func(®, payload, event_listener_item->priv); 1303 dev_kfree_skb(skb); 1304 } 1305 1306 static bool __is_event_listener_equal(const struct mlxsw_event_listener *el_a, 1307 const struct mlxsw_event_listener *el_b) 1308 { 1309 return (el_a->func == el_b->func && 1310 el_a->trap_id == el_b->trap_id); 1311 } 1312 1313 static struct mlxsw_event_listener_item * 1314 __find_event_listener_item(struct mlxsw_core *mlxsw_core, 1315 const struct mlxsw_event_listener *el, 1316 void *priv) 1317 { 1318 struct mlxsw_event_listener_item *el_item; 1319 1320 list_for_each_entry(el_item, &mlxsw_core->event_listener_list, list) { 1321 if (__is_event_listener_equal(&el_item->el, el) && 1322 el_item->priv == priv) 1323 return el_item; 1324 } 1325 return NULL; 1326 } 1327 1328 int mlxsw_core_event_listener_register(struct mlxsw_core *mlxsw_core, 1329 const struct mlxsw_event_listener *el, 1330 void *priv) 1331 { 1332 int err; 1333 struct mlxsw_event_listener_item *el_item; 1334 const struct mlxsw_rx_listener rxl = { 1335 .func = mlxsw_core_event_listener_func, 1336 .local_port = MLXSW_PORT_DONT_CARE, 1337 .trap_id = el->trap_id, 1338 }; 1339 1340 el_item = __find_event_listener_item(mlxsw_core, el, priv); 1341 if (el_item) 1342 return -EEXIST; 1343 el_item = kmalloc(sizeof(*el_item), GFP_KERNEL); 1344 if (!el_item) 1345 return -ENOMEM; 1346 el_item->el = *el; 1347 el_item->priv = priv; 1348 1349 err = mlxsw_core_rx_listener_register(mlxsw_core, &rxl, el_item); 1350 if (err) 1351 goto err_rx_listener_register; 1352 1353 /* No reason to save item if we did not manage to register an RX 1354 * listener for it. 1355 */ 1356 list_add_rcu(&el_item->list, &mlxsw_core->event_listener_list); 1357 1358 return 0; 1359 1360 err_rx_listener_register: 1361 kfree(el_item); 1362 return err; 1363 } 1364 EXPORT_SYMBOL(mlxsw_core_event_listener_register); 1365 1366 void mlxsw_core_event_listener_unregister(struct mlxsw_core *mlxsw_core, 1367 const struct mlxsw_event_listener *el, 1368 void *priv) 1369 { 1370 struct mlxsw_event_listener_item *el_item; 1371 const struct mlxsw_rx_listener rxl = { 1372 .func = mlxsw_core_event_listener_func, 1373 .local_port = MLXSW_PORT_DONT_CARE, 1374 .trap_id = el->trap_id, 1375 }; 1376 1377 el_item = __find_event_listener_item(mlxsw_core, el, priv); 1378 if (!el_item) 1379 return; 1380 mlxsw_core_rx_listener_unregister(mlxsw_core, &rxl, el_item); 1381 list_del(&el_item->list); 1382 kfree(el_item); 1383 } 1384 EXPORT_SYMBOL(mlxsw_core_event_listener_unregister); 1385 1386 static int mlxsw_core_listener_register(struct mlxsw_core *mlxsw_core, 1387 const struct mlxsw_listener *listener, 1388 void *priv) 1389 { 1390 if (listener->is_event) 1391 return mlxsw_core_event_listener_register(mlxsw_core, 1392 &listener->u.event_listener, 1393 priv); 1394 else 1395 return mlxsw_core_rx_listener_register(mlxsw_core, 1396 &listener->u.rx_listener, 1397 priv); 1398 } 1399 1400 static void mlxsw_core_listener_unregister(struct mlxsw_core *mlxsw_core, 1401 const struct mlxsw_listener *listener, 1402 void *priv) 1403 { 1404 if (listener->is_event) 1405 mlxsw_core_event_listener_unregister(mlxsw_core, 1406 &listener->u.event_listener, 1407 priv); 1408 else 1409 mlxsw_core_rx_listener_unregister(mlxsw_core, 1410 &listener->u.rx_listener, 1411 priv); 1412 } 1413 1414 int mlxsw_core_trap_register(struct mlxsw_core *mlxsw_core, 1415 const struct mlxsw_listener *listener, void *priv) 1416 { 1417 char hpkt_pl[MLXSW_REG_HPKT_LEN]; 1418 int err; 1419 1420 err = mlxsw_core_listener_register(mlxsw_core, listener, priv); 1421 if (err) 1422 return err; 1423 1424 mlxsw_reg_hpkt_pack(hpkt_pl, listener->action, listener->trap_id, 1425 listener->trap_group, listener->is_ctrl); 1426 err = mlxsw_reg_write(mlxsw_core, MLXSW_REG(hpkt), hpkt_pl); 1427 if (err) 1428 goto err_trap_set; 1429 1430 return 0; 1431 1432 err_trap_set: 1433 mlxsw_core_listener_unregister(mlxsw_core, listener, priv); 1434 return err; 1435 } 1436 EXPORT_SYMBOL(mlxsw_core_trap_register); 1437 1438 void mlxsw_core_trap_unregister(struct mlxsw_core *mlxsw_core, 1439 const struct mlxsw_listener *listener, 1440 void *priv) 1441 { 1442 char hpkt_pl[MLXSW_REG_HPKT_LEN]; 1443 1444 if (!listener->is_event) { 1445 mlxsw_reg_hpkt_pack(hpkt_pl, listener->unreg_action, 1446 listener->trap_id, listener->trap_group, 1447 listener->is_ctrl); 1448 mlxsw_reg_write(mlxsw_core, MLXSW_REG(hpkt), hpkt_pl); 1449 } 1450 1451 mlxsw_core_listener_unregister(mlxsw_core, listener, priv); 1452 } 1453 EXPORT_SYMBOL(mlxsw_core_trap_unregister); 1454 1455 static u64 mlxsw_core_tid_get(struct mlxsw_core *mlxsw_core) 1456 { 1457 return atomic64_inc_return(&mlxsw_core->emad.tid); 1458 } 1459 1460 static int mlxsw_core_reg_access_emad(struct mlxsw_core *mlxsw_core, 1461 const struct mlxsw_reg_info *reg, 1462 char *payload, 1463 enum mlxsw_core_reg_access_type type, 1464 struct list_head *bulk_list, 1465 mlxsw_reg_trans_cb_t *cb, 1466 unsigned long cb_priv) 1467 { 1468 u64 tid = mlxsw_core_tid_get(mlxsw_core); 1469 struct mlxsw_reg_trans *trans; 1470 int err; 1471 1472 trans = kzalloc(sizeof(*trans), GFP_KERNEL); 1473 if (!trans) 1474 return -ENOMEM; 1475 1476 err = mlxsw_emad_reg_access(mlxsw_core, reg, payload, type, trans, 1477 bulk_list, cb, cb_priv, tid); 1478 if (err) { 1479 kfree(trans); 1480 return err; 1481 } 1482 return 0; 1483 } 1484 1485 int mlxsw_reg_trans_query(struct mlxsw_core *mlxsw_core, 1486 const struct mlxsw_reg_info *reg, char *payload, 1487 struct list_head *bulk_list, 1488 mlxsw_reg_trans_cb_t *cb, unsigned long cb_priv) 1489 { 1490 return mlxsw_core_reg_access_emad(mlxsw_core, reg, payload, 1491 MLXSW_CORE_REG_ACCESS_TYPE_QUERY, 1492 bulk_list, cb, cb_priv); 1493 } 1494 EXPORT_SYMBOL(mlxsw_reg_trans_query); 1495 1496 int mlxsw_reg_trans_write(struct mlxsw_core *mlxsw_core, 1497 const struct mlxsw_reg_info *reg, char *payload, 1498 struct list_head *bulk_list, 1499 mlxsw_reg_trans_cb_t *cb, unsigned long cb_priv) 1500 { 1501 return mlxsw_core_reg_access_emad(mlxsw_core, reg, payload, 1502 MLXSW_CORE_REG_ACCESS_TYPE_WRITE, 1503 bulk_list, cb, cb_priv); 1504 } 1505 EXPORT_SYMBOL(mlxsw_reg_trans_write); 1506 1507 static int mlxsw_reg_trans_wait(struct mlxsw_reg_trans *trans) 1508 { 1509 struct mlxsw_core *mlxsw_core = trans->core; 1510 int err; 1511 1512 wait_for_completion(&trans->completion); 1513 cancel_delayed_work_sync(&trans->timeout_dw); 1514 err = trans->err; 1515 1516 if (trans->retries) 1517 dev_warn(mlxsw_core->bus_info->dev, "EMAD retries (%d/%d) (tid=%llx)\n", 1518 trans->retries, MLXSW_EMAD_MAX_RETRY, trans->tid); 1519 if (err) { 1520 dev_err(mlxsw_core->bus_info->dev, "EMAD reg access failed (tid=%llx,reg_id=%x(%s),type=%s,status=%x(%s))\n", 1521 trans->tid, trans->reg->id, 1522 mlxsw_reg_id_str(trans->reg->id), 1523 mlxsw_core_reg_access_type_str(trans->type), 1524 trans->emad_status, 1525 mlxsw_emad_op_tlv_status_str(trans->emad_status)); 1526 trace_devlink_hwerr(priv_to_devlink(mlxsw_core), 1527 trans->emad_status, 1528 mlxsw_emad_op_tlv_status_str(trans->emad_status)); 1529 } 1530 1531 list_del(&trans->bulk_list); 1532 kfree_rcu(trans, rcu); 1533 return err; 1534 } 1535 1536 int mlxsw_reg_trans_bulk_wait(struct list_head *bulk_list) 1537 { 1538 struct mlxsw_reg_trans *trans; 1539 struct mlxsw_reg_trans *tmp; 1540 int sum_err = 0; 1541 int err; 1542 1543 list_for_each_entry_safe(trans, tmp, bulk_list, bulk_list) { 1544 err = mlxsw_reg_trans_wait(trans); 1545 if (err && sum_err == 0) 1546 sum_err = err; /* first error to be returned */ 1547 } 1548 return sum_err; 1549 } 1550 EXPORT_SYMBOL(mlxsw_reg_trans_bulk_wait); 1551 1552 static int mlxsw_core_reg_access_cmd(struct mlxsw_core *mlxsw_core, 1553 const struct mlxsw_reg_info *reg, 1554 char *payload, 1555 enum mlxsw_core_reg_access_type type) 1556 { 1557 enum mlxsw_emad_op_tlv_status status; 1558 int err, n_retry; 1559 bool reset_ok; 1560 char *in_mbox, *out_mbox, *tmp; 1561 1562 dev_dbg(mlxsw_core->bus_info->dev, "Reg cmd access (reg_id=%x(%s),type=%s)\n", 1563 reg->id, mlxsw_reg_id_str(reg->id), 1564 mlxsw_core_reg_access_type_str(type)); 1565 1566 in_mbox = mlxsw_cmd_mbox_alloc(); 1567 if (!in_mbox) 1568 return -ENOMEM; 1569 1570 out_mbox = mlxsw_cmd_mbox_alloc(); 1571 if (!out_mbox) { 1572 err = -ENOMEM; 1573 goto free_in_mbox; 1574 } 1575 1576 mlxsw_emad_pack_op_tlv(in_mbox, reg, type, 1577 mlxsw_core_tid_get(mlxsw_core)); 1578 tmp = in_mbox + MLXSW_EMAD_OP_TLV_LEN * sizeof(u32); 1579 mlxsw_emad_pack_reg_tlv(tmp, reg, payload); 1580 1581 /* There is a special treatment needed for MRSR (reset) register. 1582 * The command interface will return error after the command 1583 * is executed, so tell the lower layer to expect it 1584 * and cope accordingly. 1585 */ 1586 reset_ok = reg->id == MLXSW_REG_MRSR_ID; 1587 1588 n_retry = 0; 1589 retry: 1590 err = mlxsw_cmd_access_reg(mlxsw_core, reset_ok, in_mbox, out_mbox); 1591 if (!err) { 1592 err = mlxsw_emad_process_status(out_mbox, &status); 1593 if (err) { 1594 if (err == -EAGAIN && n_retry++ < MLXSW_EMAD_MAX_RETRY) 1595 goto retry; 1596 dev_err(mlxsw_core->bus_info->dev, "Reg cmd access status failed (status=%x(%s))\n", 1597 status, mlxsw_emad_op_tlv_status_str(status)); 1598 } 1599 } 1600 1601 if (!err) 1602 memcpy(payload, mlxsw_emad_reg_payload(out_mbox), 1603 reg->len); 1604 1605 mlxsw_cmd_mbox_free(out_mbox); 1606 free_in_mbox: 1607 mlxsw_cmd_mbox_free(in_mbox); 1608 if (err) 1609 dev_err(mlxsw_core->bus_info->dev, "Reg cmd access failed (reg_id=%x(%s),type=%s)\n", 1610 reg->id, mlxsw_reg_id_str(reg->id), 1611 mlxsw_core_reg_access_type_str(type)); 1612 return err; 1613 } 1614 1615 static void mlxsw_core_reg_access_cb(struct mlxsw_core *mlxsw_core, 1616 char *payload, size_t payload_len, 1617 unsigned long cb_priv) 1618 { 1619 char *orig_payload = (char *) cb_priv; 1620 1621 memcpy(orig_payload, payload, payload_len); 1622 } 1623 1624 static int mlxsw_core_reg_access(struct mlxsw_core *mlxsw_core, 1625 const struct mlxsw_reg_info *reg, 1626 char *payload, 1627 enum mlxsw_core_reg_access_type type) 1628 { 1629 LIST_HEAD(bulk_list); 1630 int err; 1631 1632 /* During initialization EMAD interface is not available to us, 1633 * so we default to command interface. We switch to EMAD interface 1634 * after setting the appropriate traps. 1635 */ 1636 if (!mlxsw_core->emad.use_emad) 1637 return mlxsw_core_reg_access_cmd(mlxsw_core, reg, 1638 payload, type); 1639 1640 err = mlxsw_core_reg_access_emad(mlxsw_core, reg, 1641 payload, type, &bulk_list, 1642 mlxsw_core_reg_access_cb, 1643 (unsigned long) payload); 1644 if (err) 1645 return err; 1646 return mlxsw_reg_trans_bulk_wait(&bulk_list); 1647 } 1648 1649 int mlxsw_reg_query(struct mlxsw_core *mlxsw_core, 1650 const struct mlxsw_reg_info *reg, char *payload) 1651 { 1652 return mlxsw_core_reg_access(mlxsw_core, reg, payload, 1653 MLXSW_CORE_REG_ACCESS_TYPE_QUERY); 1654 } 1655 EXPORT_SYMBOL(mlxsw_reg_query); 1656 1657 int mlxsw_reg_write(struct mlxsw_core *mlxsw_core, 1658 const struct mlxsw_reg_info *reg, char *payload) 1659 { 1660 return mlxsw_core_reg_access(mlxsw_core, reg, payload, 1661 MLXSW_CORE_REG_ACCESS_TYPE_WRITE); 1662 } 1663 EXPORT_SYMBOL(mlxsw_reg_write); 1664 1665 void mlxsw_core_skb_receive(struct mlxsw_core *mlxsw_core, struct sk_buff *skb, 1666 struct mlxsw_rx_info *rx_info) 1667 { 1668 struct mlxsw_rx_listener_item *rxl_item; 1669 const struct mlxsw_rx_listener *rxl; 1670 u8 local_port; 1671 bool found = false; 1672 1673 if (rx_info->is_lag) { 1674 dev_dbg_ratelimited(mlxsw_core->bus_info->dev, "%s: lag_id = %d, lag_port_index = 0x%x\n", 1675 __func__, rx_info->u.lag_id, 1676 rx_info->trap_id); 1677 /* Upper layer does not care if the skb came from LAG or not, 1678 * so just get the local_port for the lag port and push it up. 1679 */ 1680 local_port = mlxsw_core_lag_mapping_get(mlxsw_core, 1681 rx_info->u.lag_id, 1682 rx_info->lag_port_index); 1683 } else { 1684 local_port = rx_info->u.sys_port; 1685 } 1686 1687 dev_dbg_ratelimited(mlxsw_core->bus_info->dev, "%s: local_port = %d, trap_id = 0x%x\n", 1688 __func__, local_port, rx_info->trap_id); 1689 1690 if ((rx_info->trap_id >= MLXSW_TRAP_ID_MAX) || 1691 (local_port >= mlxsw_core->max_ports)) 1692 goto drop; 1693 1694 rcu_read_lock(); 1695 list_for_each_entry_rcu(rxl_item, &mlxsw_core->rx_listener_list, list) { 1696 rxl = &rxl_item->rxl; 1697 if ((rxl->local_port == MLXSW_PORT_DONT_CARE || 1698 rxl->local_port == local_port) && 1699 rxl->trap_id == rx_info->trap_id) { 1700 found = true; 1701 break; 1702 } 1703 } 1704 rcu_read_unlock(); 1705 if (!found) 1706 goto drop; 1707 1708 rxl->func(skb, local_port, rxl_item->priv); 1709 return; 1710 1711 drop: 1712 dev_kfree_skb(skb); 1713 } 1714 EXPORT_SYMBOL(mlxsw_core_skb_receive); 1715 1716 static int mlxsw_core_lag_mapping_index(struct mlxsw_core *mlxsw_core, 1717 u16 lag_id, u8 port_index) 1718 { 1719 return MLXSW_CORE_RES_GET(mlxsw_core, MAX_LAG_MEMBERS) * lag_id + 1720 port_index; 1721 } 1722 1723 void mlxsw_core_lag_mapping_set(struct mlxsw_core *mlxsw_core, 1724 u16 lag_id, u8 port_index, u8 local_port) 1725 { 1726 int index = mlxsw_core_lag_mapping_index(mlxsw_core, 1727 lag_id, port_index); 1728 1729 mlxsw_core->lag.mapping[index] = local_port; 1730 } 1731 EXPORT_SYMBOL(mlxsw_core_lag_mapping_set); 1732 1733 u8 mlxsw_core_lag_mapping_get(struct mlxsw_core *mlxsw_core, 1734 u16 lag_id, u8 port_index) 1735 { 1736 int index = mlxsw_core_lag_mapping_index(mlxsw_core, 1737 lag_id, port_index); 1738 1739 return mlxsw_core->lag.mapping[index]; 1740 } 1741 EXPORT_SYMBOL(mlxsw_core_lag_mapping_get); 1742 1743 void mlxsw_core_lag_mapping_clear(struct mlxsw_core *mlxsw_core, 1744 u16 lag_id, u8 local_port) 1745 { 1746 int i; 1747 1748 for (i = 0; i < MLXSW_CORE_RES_GET(mlxsw_core, MAX_LAG_MEMBERS); i++) { 1749 int index = mlxsw_core_lag_mapping_index(mlxsw_core, 1750 lag_id, i); 1751 1752 if (mlxsw_core->lag.mapping[index] == local_port) 1753 mlxsw_core->lag.mapping[index] = 0; 1754 } 1755 } 1756 EXPORT_SYMBOL(mlxsw_core_lag_mapping_clear); 1757 1758 bool mlxsw_core_res_valid(struct mlxsw_core *mlxsw_core, 1759 enum mlxsw_res_id res_id) 1760 { 1761 return mlxsw_res_valid(&mlxsw_core->res, res_id); 1762 } 1763 EXPORT_SYMBOL(mlxsw_core_res_valid); 1764 1765 u64 mlxsw_core_res_get(struct mlxsw_core *mlxsw_core, 1766 enum mlxsw_res_id res_id) 1767 { 1768 return mlxsw_res_get(&mlxsw_core->res, res_id); 1769 } 1770 EXPORT_SYMBOL(mlxsw_core_res_get); 1771 1772 int mlxsw_core_port_init(struct mlxsw_core *mlxsw_core, u8 local_port, 1773 u32 port_number, bool split, 1774 u32 split_port_subnumber, 1775 const unsigned char *switch_id, 1776 unsigned char switch_id_len) 1777 { 1778 struct devlink *devlink = priv_to_devlink(mlxsw_core); 1779 struct mlxsw_core_port *mlxsw_core_port = 1780 &mlxsw_core->ports[local_port]; 1781 struct devlink_port *devlink_port = &mlxsw_core_port->devlink_port; 1782 int err; 1783 1784 mlxsw_core_port->local_port = local_port; 1785 devlink_port_attrs_set(devlink_port, DEVLINK_PORT_FLAVOUR_PHYSICAL, 1786 port_number, split, split_port_subnumber, 1787 switch_id, switch_id_len); 1788 err = devlink_port_register(devlink, devlink_port, local_port); 1789 if (err) 1790 memset(mlxsw_core_port, 0, sizeof(*mlxsw_core_port)); 1791 return err; 1792 } 1793 EXPORT_SYMBOL(mlxsw_core_port_init); 1794 1795 void mlxsw_core_port_fini(struct mlxsw_core *mlxsw_core, u8 local_port) 1796 { 1797 struct mlxsw_core_port *mlxsw_core_port = 1798 &mlxsw_core->ports[local_port]; 1799 struct devlink_port *devlink_port = &mlxsw_core_port->devlink_port; 1800 1801 devlink_port_unregister(devlink_port); 1802 memset(mlxsw_core_port, 0, sizeof(*mlxsw_core_port)); 1803 } 1804 EXPORT_SYMBOL(mlxsw_core_port_fini); 1805 1806 void mlxsw_core_port_eth_set(struct mlxsw_core *mlxsw_core, u8 local_port, 1807 void *port_driver_priv, struct net_device *dev) 1808 { 1809 struct mlxsw_core_port *mlxsw_core_port = 1810 &mlxsw_core->ports[local_port]; 1811 struct devlink_port *devlink_port = &mlxsw_core_port->devlink_port; 1812 1813 mlxsw_core_port->port_driver_priv = port_driver_priv; 1814 devlink_port_type_eth_set(devlink_port, dev); 1815 } 1816 EXPORT_SYMBOL(mlxsw_core_port_eth_set); 1817 1818 void mlxsw_core_port_ib_set(struct mlxsw_core *mlxsw_core, u8 local_port, 1819 void *port_driver_priv) 1820 { 1821 struct mlxsw_core_port *mlxsw_core_port = 1822 &mlxsw_core->ports[local_port]; 1823 struct devlink_port *devlink_port = &mlxsw_core_port->devlink_port; 1824 1825 mlxsw_core_port->port_driver_priv = port_driver_priv; 1826 devlink_port_type_ib_set(devlink_port, NULL); 1827 } 1828 EXPORT_SYMBOL(mlxsw_core_port_ib_set); 1829 1830 void mlxsw_core_port_clear(struct mlxsw_core *mlxsw_core, u8 local_port, 1831 void *port_driver_priv) 1832 { 1833 struct mlxsw_core_port *mlxsw_core_port = 1834 &mlxsw_core->ports[local_port]; 1835 struct devlink_port *devlink_port = &mlxsw_core_port->devlink_port; 1836 1837 mlxsw_core_port->port_driver_priv = port_driver_priv; 1838 devlink_port_type_clear(devlink_port); 1839 } 1840 EXPORT_SYMBOL(mlxsw_core_port_clear); 1841 1842 enum devlink_port_type mlxsw_core_port_type_get(struct mlxsw_core *mlxsw_core, 1843 u8 local_port) 1844 { 1845 struct mlxsw_core_port *mlxsw_core_port = 1846 &mlxsw_core->ports[local_port]; 1847 struct devlink_port *devlink_port = &mlxsw_core_port->devlink_port; 1848 1849 return devlink_port->type; 1850 } 1851 EXPORT_SYMBOL(mlxsw_core_port_type_get); 1852 1853 1854 struct devlink_port * 1855 mlxsw_core_port_devlink_port_get(struct mlxsw_core *mlxsw_core, 1856 u8 local_port) 1857 { 1858 struct mlxsw_core_port *mlxsw_core_port = 1859 &mlxsw_core->ports[local_port]; 1860 struct devlink_port *devlink_port = &mlxsw_core_port->devlink_port; 1861 1862 return devlink_port; 1863 } 1864 EXPORT_SYMBOL(mlxsw_core_port_devlink_port_get); 1865 1866 static void mlxsw_core_buf_dump_dbg(struct mlxsw_core *mlxsw_core, 1867 const char *buf, size_t size) 1868 { 1869 __be32 *m = (__be32 *) buf; 1870 int i; 1871 int count = size / sizeof(__be32); 1872 1873 for (i = count - 1; i >= 0; i--) 1874 if (m[i]) 1875 break; 1876 i++; 1877 count = i ? i : 1; 1878 for (i = 0; i < count; i += 4) 1879 dev_dbg(mlxsw_core->bus_info->dev, "%04x - %08x %08x %08x %08x\n", 1880 i * 4, be32_to_cpu(m[i]), be32_to_cpu(m[i + 1]), 1881 be32_to_cpu(m[i + 2]), be32_to_cpu(m[i + 3])); 1882 } 1883 1884 int mlxsw_cmd_exec(struct mlxsw_core *mlxsw_core, u16 opcode, u8 opcode_mod, 1885 u32 in_mod, bool out_mbox_direct, bool reset_ok, 1886 char *in_mbox, size_t in_mbox_size, 1887 char *out_mbox, size_t out_mbox_size) 1888 { 1889 u8 status; 1890 int err; 1891 1892 BUG_ON(in_mbox_size % sizeof(u32) || out_mbox_size % sizeof(u32)); 1893 if (!mlxsw_core->bus->cmd_exec) 1894 return -EOPNOTSUPP; 1895 1896 dev_dbg(mlxsw_core->bus_info->dev, "Cmd exec (opcode=%x(%s),opcode_mod=%x,in_mod=%x)\n", 1897 opcode, mlxsw_cmd_opcode_str(opcode), opcode_mod, in_mod); 1898 if (in_mbox) { 1899 dev_dbg(mlxsw_core->bus_info->dev, "Input mailbox:\n"); 1900 mlxsw_core_buf_dump_dbg(mlxsw_core, in_mbox, in_mbox_size); 1901 } 1902 1903 err = mlxsw_core->bus->cmd_exec(mlxsw_core->bus_priv, opcode, 1904 opcode_mod, in_mod, out_mbox_direct, 1905 in_mbox, in_mbox_size, 1906 out_mbox, out_mbox_size, &status); 1907 1908 if (!err && out_mbox) { 1909 dev_dbg(mlxsw_core->bus_info->dev, "Output mailbox:\n"); 1910 mlxsw_core_buf_dump_dbg(mlxsw_core, out_mbox, out_mbox_size); 1911 } 1912 1913 if (reset_ok && err == -EIO && 1914 status == MLXSW_CMD_STATUS_RUNNING_RESET) { 1915 err = 0; 1916 } else if (err == -EIO && status != MLXSW_CMD_STATUS_OK) { 1917 dev_err(mlxsw_core->bus_info->dev, "Cmd exec failed (opcode=%x(%s),opcode_mod=%x,in_mod=%x,status=%x(%s))\n", 1918 opcode, mlxsw_cmd_opcode_str(opcode), opcode_mod, 1919 in_mod, status, mlxsw_cmd_status_str(status)); 1920 } else if (err == -ETIMEDOUT) { 1921 dev_err(mlxsw_core->bus_info->dev, "Cmd exec timed-out (opcode=%x(%s),opcode_mod=%x,in_mod=%x)\n", 1922 opcode, mlxsw_cmd_opcode_str(opcode), opcode_mod, 1923 in_mod); 1924 } 1925 1926 return err; 1927 } 1928 EXPORT_SYMBOL(mlxsw_cmd_exec); 1929 1930 int mlxsw_core_schedule_dw(struct delayed_work *dwork, unsigned long delay) 1931 { 1932 return queue_delayed_work(mlxsw_wq, dwork, delay); 1933 } 1934 EXPORT_SYMBOL(mlxsw_core_schedule_dw); 1935 1936 bool mlxsw_core_schedule_work(struct work_struct *work) 1937 { 1938 return queue_work(mlxsw_owq, work); 1939 } 1940 EXPORT_SYMBOL(mlxsw_core_schedule_work); 1941 1942 void mlxsw_core_flush_owq(void) 1943 { 1944 flush_workqueue(mlxsw_owq); 1945 } 1946 EXPORT_SYMBOL(mlxsw_core_flush_owq); 1947 1948 int mlxsw_core_kvd_sizes_get(struct mlxsw_core *mlxsw_core, 1949 const struct mlxsw_config_profile *profile, 1950 u64 *p_single_size, u64 *p_double_size, 1951 u64 *p_linear_size) 1952 { 1953 struct mlxsw_driver *driver = mlxsw_core->driver; 1954 1955 if (!driver->kvd_sizes_get) 1956 return -EINVAL; 1957 1958 return driver->kvd_sizes_get(mlxsw_core, profile, 1959 p_single_size, p_double_size, 1960 p_linear_size); 1961 } 1962 EXPORT_SYMBOL(mlxsw_core_kvd_sizes_get); 1963 1964 void mlxsw_core_fw_flash_start(struct mlxsw_core *mlxsw_core) 1965 { 1966 mlxsw_core->fw_flash_in_progress = true; 1967 } 1968 EXPORT_SYMBOL(mlxsw_core_fw_flash_start); 1969 1970 void mlxsw_core_fw_flash_end(struct mlxsw_core *mlxsw_core) 1971 { 1972 mlxsw_core->fw_flash_in_progress = false; 1973 } 1974 EXPORT_SYMBOL(mlxsw_core_fw_flash_end); 1975 1976 int mlxsw_core_resources_query(struct mlxsw_core *mlxsw_core, char *mbox, 1977 struct mlxsw_res *res) 1978 { 1979 int index, i; 1980 u64 data; 1981 u16 id; 1982 int err; 1983 1984 if (!res) 1985 return 0; 1986 1987 mlxsw_cmd_mbox_zero(mbox); 1988 1989 for (index = 0; index < MLXSW_CMD_QUERY_RESOURCES_MAX_QUERIES; 1990 index++) { 1991 err = mlxsw_cmd_query_resources(mlxsw_core, mbox, index); 1992 if (err) 1993 return err; 1994 1995 for (i = 0; i < MLXSW_CMD_QUERY_RESOURCES_PER_QUERY; i++) { 1996 id = mlxsw_cmd_mbox_query_resource_id_get(mbox, i); 1997 data = mlxsw_cmd_mbox_query_resource_data_get(mbox, i); 1998 1999 if (id == MLXSW_CMD_QUERY_RESOURCES_TABLE_END_ID) 2000 return 0; 2001 2002 mlxsw_res_parse(res, id, data); 2003 } 2004 } 2005 2006 /* If after MLXSW_RESOURCES_QUERY_MAX_QUERIES we still didn't get 2007 * MLXSW_RESOURCES_TABLE_END_ID, something went bad in the FW. 2008 */ 2009 return -EIO; 2010 } 2011 EXPORT_SYMBOL(mlxsw_core_resources_query); 2012 2013 static int __init mlxsw_core_module_init(void) 2014 { 2015 int err; 2016 2017 mlxsw_wq = alloc_workqueue(mlxsw_core_driver_name, 0, 0); 2018 if (!mlxsw_wq) 2019 return -ENOMEM; 2020 mlxsw_owq = alloc_ordered_workqueue("%s_ordered", 0, 2021 mlxsw_core_driver_name); 2022 if (!mlxsw_owq) { 2023 err = -ENOMEM; 2024 goto err_alloc_ordered_workqueue; 2025 } 2026 return 0; 2027 2028 err_alloc_ordered_workqueue: 2029 destroy_workqueue(mlxsw_wq); 2030 return err; 2031 } 2032 2033 static void __exit mlxsw_core_module_exit(void) 2034 { 2035 destroy_workqueue(mlxsw_owq); 2036 destroy_workqueue(mlxsw_wq); 2037 } 2038 2039 module_init(mlxsw_core_module_init); 2040 module_exit(mlxsw_core_module_exit); 2041 2042 MODULE_LICENSE("Dual BSD/GPL"); 2043 MODULE_AUTHOR("Jiri Pirko <jiri@mellanox.com>"); 2044 MODULE_DESCRIPTION("Mellanox switch device core driver"); 2045