1 // SPDX-License-Identifier: BSD-3-Clause OR GPL-2.0 2 /* Copyright (c) 2015-2018 Mellanox Technologies. All rights reserved */ 3 4 #include <linux/kernel.h> 5 #include <linux/module.h> 6 #include <linux/device.h> 7 #include <linux/export.h> 8 #include <linux/err.h> 9 #include <linux/if_link.h> 10 #include <linux/netdevice.h> 11 #include <linux/completion.h> 12 #include <linux/skbuff.h> 13 #include <linux/etherdevice.h> 14 #include <linux/types.h> 15 #include <linux/string.h> 16 #include <linux/gfp.h> 17 #include <linux/random.h> 18 #include <linux/jiffies.h> 19 #include <linux/mutex.h> 20 #include <linux/rcupdate.h> 21 #include <linux/slab.h> 22 #include <linux/workqueue.h> 23 #include <asm/byteorder.h> 24 #include <net/devlink.h> 25 #include <trace/events/devlink.h> 26 27 #include "core.h" 28 #include "item.h" 29 #include "cmd.h" 30 #include "port.h" 31 #include "trap.h" 32 #include "emad.h" 33 #include "reg.h" 34 #include "resources.h" 35 36 static LIST_HEAD(mlxsw_core_driver_list); 37 static DEFINE_SPINLOCK(mlxsw_core_driver_list_lock); 38 39 static const char mlxsw_core_driver_name[] = "mlxsw_core"; 40 41 static struct workqueue_struct *mlxsw_wq; 42 static struct workqueue_struct *mlxsw_owq; 43 44 struct mlxsw_core_port { 45 struct devlink_port devlink_port; 46 void *port_driver_priv; 47 u8 local_port; 48 }; 49 50 void *mlxsw_core_port_driver_priv(struct mlxsw_core_port *mlxsw_core_port) 51 { 52 return mlxsw_core_port->port_driver_priv; 53 } 54 EXPORT_SYMBOL(mlxsw_core_port_driver_priv); 55 56 static bool mlxsw_core_port_check(struct mlxsw_core_port *mlxsw_core_port) 57 { 58 return mlxsw_core_port->port_driver_priv != NULL; 59 } 60 61 struct mlxsw_core { 62 struct mlxsw_driver *driver; 63 const struct mlxsw_bus *bus; 64 void *bus_priv; 65 const struct mlxsw_bus_info *bus_info; 66 struct workqueue_struct *emad_wq; 67 struct list_head rx_listener_list; 68 struct list_head event_listener_list; 69 struct { 70 atomic64_t tid; 71 struct list_head trans_list; 72 spinlock_t trans_list_lock; /* protects trans_list writes */ 73 bool use_emad; 74 } emad; 75 struct { 76 u8 *mapping; /* lag_id+port_index to local_port mapping */ 77 } lag; 78 struct mlxsw_res res; 79 struct mlxsw_hwmon *hwmon; 80 struct mlxsw_thermal *thermal; 81 struct mlxsw_core_port *ports; 82 unsigned int max_ports; 83 bool reload_fail; 84 bool fw_flash_in_progress; 85 unsigned long driver_priv[0]; 86 /* driver_priv has to be always the last item */ 87 }; 88 89 #define MLXSW_PORT_MAX_PORTS_DEFAULT 0x40 90 91 static int mlxsw_ports_init(struct mlxsw_core *mlxsw_core) 92 { 93 /* Switch ports are numbered from 1 to queried value */ 94 if (MLXSW_CORE_RES_VALID(mlxsw_core, MAX_SYSTEM_PORT)) 95 mlxsw_core->max_ports = MLXSW_CORE_RES_GET(mlxsw_core, 96 MAX_SYSTEM_PORT) + 1; 97 else 98 mlxsw_core->max_ports = MLXSW_PORT_MAX_PORTS_DEFAULT + 1; 99 100 mlxsw_core->ports = kcalloc(mlxsw_core->max_ports, 101 sizeof(struct mlxsw_core_port), GFP_KERNEL); 102 if (!mlxsw_core->ports) 103 return -ENOMEM; 104 105 return 0; 106 } 107 108 static void mlxsw_ports_fini(struct mlxsw_core *mlxsw_core) 109 { 110 kfree(mlxsw_core->ports); 111 } 112 113 unsigned int mlxsw_core_max_ports(const struct mlxsw_core *mlxsw_core) 114 { 115 return mlxsw_core->max_ports; 116 } 117 EXPORT_SYMBOL(mlxsw_core_max_ports); 118 119 void *mlxsw_core_driver_priv(struct mlxsw_core *mlxsw_core) 120 { 121 return mlxsw_core->driver_priv; 122 } 123 EXPORT_SYMBOL(mlxsw_core_driver_priv); 124 125 bool mlxsw_core_res_query_enabled(const struct mlxsw_core *mlxsw_core) 126 { 127 return mlxsw_core->driver->res_query_enabled; 128 } 129 EXPORT_SYMBOL(mlxsw_core_res_query_enabled); 130 131 struct mlxsw_rx_listener_item { 132 struct list_head list; 133 struct mlxsw_rx_listener rxl; 134 void *priv; 135 }; 136 137 struct mlxsw_event_listener_item { 138 struct list_head list; 139 struct mlxsw_event_listener el; 140 void *priv; 141 }; 142 143 /****************** 144 * EMAD processing 145 ******************/ 146 147 /* emad_eth_hdr_dmac 148 * Destination MAC in EMAD's Ethernet header. 149 * Must be set to 01:02:c9:00:00:01 150 */ 151 MLXSW_ITEM_BUF(emad, eth_hdr, dmac, 0x00, 6); 152 153 /* emad_eth_hdr_smac 154 * Source MAC in EMAD's Ethernet header. 155 * Must be set to 00:02:c9:01:02:03 156 */ 157 MLXSW_ITEM_BUF(emad, eth_hdr, smac, 0x06, 6); 158 159 /* emad_eth_hdr_ethertype 160 * Ethertype in EMAD's Ethernet header. 161 * Must be set to 0x8932 162 */ 163 MLXSW_ITEM32(emad, eth_hdr, ethertype, 0x0C, 16, 16); 164 165 /* emad_eth_hdr_mlx_proto 166 * Mellanox protocol. 167 * Must be set to 0x0. 168 */ 169 MLXSW_ITEM32(emad, eth_hdr, mlx_proto, 0x0C, 8, 8); 170 171 /* emad_eth_hdr_ver 172 * Mellanox protocol version. 173 * Must be set to 0x0. 174 */ 175 MLXSW_ITEM32(emad, eth_hdr, ver, 0x0C, 4, 4); 176 177 /* emad_op_tlv_type 178 * Type of the TLV. 179 * Must be set to 0x1 (operation TLV). 180 */ 181 MLXSW_ITEM32(emad, op_tlv, type, 0x00, 27, 5); 182 183 /* emad_op_tlv_len 184 * Length of the operation TLV in u32. 185 * Must be set to 0x4. 186 */ 187 MLXSW_ITEM32(emad, op_tlv, len, 0x00, 16, 11); 188 189 /* emad_op_tlv_dr 190 * Direct route bit. Setting to 1 indicates the EMAD is a direct route 191 * EMAD. DR TLV must follow. 192 * 193 * Note: Currently not supported and must not be set. 194 */ 195 MLXSW_ITEM32(emad, op_tlv, dr, 0x00, 15, 1); 196 197 /* emad_op_tlv_status 198 * Returned status in case of EMAD response. Must be set to 0 in case 199 * of EMAD request. 200 * 0x0 - success 201 * 0x1 - device is busy. Requester should retry 202 * 0x2 - Mellanox protocol version not supported 203 * 0x3 - unknown TLV 204 * 0x4 - register not supported 205 * 0x5 - operation class not supported 206 * 0x6 - EMAD method not supported 207 * 0x7 - bad parameter (e.g. port out of range) 208 * 0x8 - resource not available 209 * 0x9 - message receipt acknowledgment. Requester should retry 210 * 0x70 - internal error 211 */ 212 MLXSW_ITEM32(emad, op_tlv, status, 0x00, 8, 7); 213 214 /* emad_op_tlv_register_id 215 * Register ID of register within register TLV. 216 */ 217 MLXSW_ITEM32(emad, op_tlv, register_id, 0x04, 16, 16); 218 219 /* emad_op_tlv_r 220 * Response bit. Setting to 1 indicates Response, otherwise request. 221 */ 222 MLXSW_ITEM32(emad, op_tlv, r, 0x04, 15, 1); 223 224 /* emad_op_tlv_method 225 * EMAD method type. 226 * 0x1 - query 227 * 0x2 - write 228 * 0x3 - send (currently not supported) 229 * 0x4 - event 230 */ 231 MLXSW_ITEM32(emad, op_tlv, method, 0x04, 8, 7); 232 233 /* emad_op_tlv_class 234 * EMAD operation class. Must be set to 0x1 (REG_ACCESS). 235 */ 236 MLXSW_ITEM32(emad, op_tlv, class, 0x04, 0, 8); 237 238 /* emad_op_tlv_tid 239 * EMAD transaction ID. Used for pairing request and response EMADs. 240 */ 241 MLXSW_ITEM64(emad, op_tlv, tid, 0x08, 0, 64); 242 243 /* emad_reg_tlv_type 244 * Type of the TLV. 245 * Must be set to 0x3 (register TLV). 246 */ 247 MLXSW_ITEM32(emad, reg_tlv, type, 0x00, 27, 5); 248 249 /* emad_reg_tlv_len 250 * Length of the operation TLV in u32. 251 */ 252 MLXSW_ITEM32(emad, reg_tlv, len, 0x00, 16, 11); 253 254 /* emad_end_tlv_type 255 * Type of the TLV. 256 * Must be set to 0x0 (end TLV). 257 */ 258 MLXSW_ITEM32(emad, end_tlv, type, 0x00, 27, 5); 259 260 /* emad_end_tlv_len 261 * Length of the end TLV in u32. 262 * Must be set to 1. 263 */ 264 MLXSW_ITEM32(emad, end_tlv, len, 0x00, 16, 11); 265 266 enum mlxsw_core_reg_access_type { 267 MLXSW_CORE_REG_ACCESS_TYPE_QUERY, 268 MLXSW_CORE_REG_ACCESS_TYPE_WRITE, 269 }; 270 271 static inline const char * 272 mlxsw_core_reg_access_type_str(enum mlxsw_core_reg_access_type type) 273 { 274 switch (type) { 275 case MLXSW_CORE_REG_ACCESS_TYPE_QUERY: 276 return "query"; 277 case MLXSW_CORE_REG_ACCESS_TYPE_WRITE: 278 return "write"; 279 } 280 BUG(); 281 } 282 283 static void mlxsw_emad_pack_end_tlv(char *end_tlv) 284 { 285 mlxsw_emad_end_tlv_type_set(end_tlv, MLXSW_EMAD_TLV_TYPE_END); 286 mlxsw_emad_end_tlv_len_set(end_tlv, MLXSW_EMAD_END_TLV_LEN); 287 } 288 289 static void mlxsw_emad_pack_reg_tlv(char *reg_tlv, 290 const struct mlxsw_reg_info *reg, 291 char *payload) 292 { 293 mlxsw_emad_reg_tlv_type_set(reg_tlv, MLXSW_EMAD_TLV_TYPE_REG); 294 mlxsw_emad_reg_tlv_len_set(reg_tlv, reg->len / sizeof(u32) + 1); 295 memcpy(reg_tlv + sizeof(u32), payload, reg->len); 296 } 297 298 static void mlxsw_emad_pack_op_tlv(char *op_tlv, 299 const struct mlxsw_reg_info *reg, 300 enum mlxsw_core_reg_access_type type, 301 u64 tid) 302 { 303 mlxsw_emad_op_tlv_type_set(op_tlv, MLXSW_EMAD_TLV_TYPE_OP); 304 mlxsw_emad_op_tlv_len_set(op_tlv, MLXSW_EMAD_OP_TLV_LEN); 305 mlxsw_emad_op_tlv_dr_set(op_tlv, 0); 306 mlxsw_emad_op_tlv_status_set(op_tlv, 0); 307 mlxsw_emad_op_tlv_register_id_set(op_tlv, reg->id); 308 mlxsw_emad_op_tlv_r_set(op_tlv, MLXSW_EMAD_OP_TLV_REQUEST); 309 if (type == MLXSW_CORE_REG_ACCESS_TYPE_QUERY) 310 mlxsw_emad_op_tlv_method_set(op_tlv, 311 MLXSW_EMAD_OP_TLV_METHOD_QUERY); 312 else 313 mlxsw_emad_op_tlv_method_set(op_tlv, 314 MLXSW_EMAD_OP_TLV_METHOD_WRITE); 315 mlxsw_emad_op_tlv_class_set(op_tlv, 316 MLXSW_EMAD_OP_TLV_CLASS_REG_ACCESS); 317 mlxsw_emad_op_tlv_tid_set(op_tlv, tid); 318 } 319 320 static int mlxsw_emad_construct_eth_hdr(struct sk_buff *skb) 321 { 322 char *eth_hdr = skb_push(skb, MLXSW_EMAD_ETH_HDR_LEN); 323 324 mlxsw_emad_eth_hdr_dmac_memcpy_to(eth_hdr, MLXSW_EMAD_EH_DMAC); 325 mlxsw_emad_eth_hdr_smac_memcpy_to(eth_hdr, MLXSW_EMAD_EH_SMAC); 326 mlxsw_emad_eth_hdr_ethertype_set(eth_hdr, MLXSW_EMAD_EH_ETHERTYPE); 327 mlxsw_emad_eth_hdr_mlx_proto_set(eth_hdr, MLXSW_EMAD_EH_MLX_PROTO); 328 mlxsw_emad_eth_hdr_ver_set(eth_hdr, MLXSW_EMAD_EH_PROTO_VERSION); 329 330 skb_reset_mac_header(skb); 331 332 return 0; 333 } 334 335 static void mlxsw_emad_construct(struct sk_buff *skb, 336 const struct mlxsw_reg_info *reg, 337 char *payload, 338 enum mlxsw_core_reg_access_type type, 339 u64 tid) 340 { 341 char *buf; 342 343 buf = skb_push(skb, MLXSW_EMAD_END_TLV_LEN * sizeof(u32)); 344 mlxsw_emad_pack_end_tlv(buf); 345 346 buf = skb_push(skb, reg->len + sizeof(u32)); 347 mlxsw_emad_pack_reg_tlv(buf, reg, payload); 348 349 buf = skb_push(skb, MLXSW_EMAD_OP_TLV_LEN * sizeof(u32)); 350 mlxsw_emad_pack_op_tlv(buf, reg, type, tid); 351 352 mlxsw_emad_construct_eth_hdr(skb); 353 } 354 355 static char *mlxsw_emad_op_tlv(const struct sk_buff *skb) 356 { 357 return ((char *) (skb->data + MLXSW_EMAD_ETH_HDR_LEN)); 358 } 359 360 static char *mlxsw_emad_reg_tlv(const struct sk_buff *skb) 361 { 362 return ((char *) (skb->data + MLXSW_EMAD_ETH_HDR_LEN + 363 MLXSW_EMAD_OP_TLV_LEN * sizeof(u32))); 364 } 365 366 static char *mlxsw_emad_reg_payload(const char *op_tlv) 367 { 368 return ((char *) (op_tlv + (MLXSW_EMAD_OP_TLV_LEN + 1) * sizeof(u32))); 369 } 370 371 static u64 mlxsw_emad_get_tid(const struct sk_buff *skb) 372 { 373 char *op_tlv; 374 375 op_tlv = mlxsw_emad_op_tlv(skb); 376 return mlxsw_emad_op_tlv_tid_get(op_tlv); 377 } 378 379 static bool mlxsw_emad_is_resp(const struct sk_buff *skb) 380 { 381 char *op_tlv; 382 383 op_tlv = mlxsw_emad_op_tlv(skb); 384 return (mlxsw_emad_op_tlv_r_get(op_tlv) == MLXSW_EMAD_OP_TLV_RESPONSE); 385 } 386 387 static int mlxsw_emad_process_status(char *op_tlv, 388 enum mlxsw_emad_op_tlv_status *p_status) 389 { 390 *p_status = mlxsw_emad_op_tlv_status_get(op_tlv); 391 392 switch (*p_status) { 393 case MLXSW_EMAD_OP_TLV_STATUS_SUCCESS: 394 return 0; 395 case MLXSW_EMAD_OP_TLV_STATUS_BUSY: 396 case MLXSW_EMAD_OP_TLV_STATUS_MESSAGE_RECEIPT_ACK: 397 return -EAGAIN; 398 case MLXSW_EMAD_OP_TLV_STATUS_VERSION_NOT_SUPPORTED: 399 case MLXSW_EMAD_OP_TLV_STATUS_UNKNOWN_TLV: 400 case MLXSW_EMAD_OP_TLV_STATUS_REGISTER_NOT_SUPPORTED: 401 case MLXSW_EMAD_OP_TLV_STATUS_CLASS_NOT_SUPPORTED: 402 case MLXSW_EMAD_OP_TLV_STATUS_METHOD_NOT_SUPPORTED: 403 case MLXSW_EMAD_OP_TLV_STATUS_BAD_PARAMETER: 404 case MLXSW_EMAD_OP_TLV_STATUS_RESOURCE_NOT_AVAILABLE: 405 case MLXSW_EMAD_OP_TLV_STATUS_INTERNAL_ERROR: 406 default: 407 return -EIO; 408 } 409 } 410 411 static int 412 mlxsw_emad_process_status_skb(struct sk_buff *skb, 413 enum mlxsw_emad_op_tlv_status *p_status) 414 { 415 return mlxsw_emad_process_status(mlxsw_emad_op_tlv(skb), p_status); 416 } 417 418 struct mlxsw_reg_trans { 419 struct list_head list; 420 struct list_head bulk_list; 421 struct mlxsw_core *core; 422 struct sk_buff *tx_skb; 423 struct mlxsw_tx_info tx_info; 424 struct delayed_work timeout_dw; 425 unsigned int retries; 426 u64 tid; 427 struct completion completion; 428 atomic_t active; 429 mlxsw_reg_trans_cb_t *cb; 430 unsigned long cb_priv; 431 const struct mlxsw_reg_info *reg; 432 enum mlxsw_core_reg_access_type type; 433 int err; 434 enum mlxsw_emad_op_tlv_status emad_status; 435 struct rcu_head rcu; 436 }; 437 438 #define MLXSW_EMAD_TIMEOUT_DURING_FW_FLASH_MS 3000 439 #define MLXSW_EMAD_TIMEOUT_MS 200 440 441 static void mlxsw_emad_trans_timeout_schedule(struct mlxsw_reg_trans *trans) 442 { 443 unsigned long timeout = msecs_to_jiffies(MLXSW_EMAD_TIMEOUT_MS); 444 445 if (trans->core->fw_flash_in_progress) 446 timeout = msecs_to_jiffies(MLXSW_EMAD_TIMEOUT_DURING_FW_FLASH_MS); 447 448 queue_delayed_work(trans->core->emad_wq, &trans->timeout_dw, timeout); 449 } 450 451 static int mlxsw_emad_transmit(struct mlxsw_core *mlxsw_core, 452 struct mlxsw_reg_trans *trans) 453 { 454 struct sk_buff *skb; 455 int err; 456 457 skb = skb_copy(trans->tx_skb, GFP_KERNEL); 458 if (!skb) 459 return -ENOMEM; 460 461 trace_devlink_hwmsg(priv_to_devlink(mlxsw_core), false, 0, 462 skb->data + mlxsw_core->driver->txhdr_len, 463 skb->len - mlxsw_core->driver->txhdr_len); 464 465 atomic_set(&trans->active, 1); 466 err = mlxsw_core_skb_transmit(mlxsw_core, skb, &trans->tx_info); 467 if (err) { 468 dev_kfree_skb(skb); 469 return err; 470 } 471 mlxsw_emad_trans_timeout_schedule(trans); 472 return 0; 473 } 474 475 static void mlxsw_emad_trans_finish(struct mlxsw_reg_trans *trans, int err) 476 { 477 struct mlxsw_core *mlxsw_core = trans->core; 478 479 dev_kfree_skb(trans->tx_skb); 480 spin_lock_bh(&mlxsw_core->emad.trans_list_lock); 481 list_del_rcu(&trans->list); 482 spin_unlock_bh(&mlxsw_core->emad.trans_list_lock); 483 trans->err = err; 484 complete(&trans->completion); 485 } 486 487 static void mlxsw_emad_transmit_retry(struct mlxsw_core *mlxsw_core, 488 struct mlxsw_reg_trans *trans) 489 { 490 int err; 491 492 if (trans->retries < MLXSW_EMAD_MAX_RETRY) { 493 trans->retries++; 494 err = mlxsw_emad_transmit(trans->core, trans); 495 if (err == 0) 496 return; 497 } else { 498 err = -EIO; 499 } 500 mlxsw_emad_trans_finish(trans, err); 501 } 502 503 static void mlxsw_emad_trans_timeout_work(struct work_struct *work) 504 { 505 struct mlxsw_reg_trans *trans = container_of(work, 506 struct mlxsw_reg_trans, 507 timeout_dw.work); 508 509 if (!atomic_dec_and_test(&trans->active)) 510 return; 511 512 mlxsw_emad_transmit_retry(trans->core, trans); 513 } 514 515 static void mlxsw_emad_process_response(struct mlxsw_core *mlxsw_core, 516 struct mlxsw_reg_trans *trans, 517 struct sk_buff *skb) 518 { 519 int err; 520 521 if (!atomic_dec_and_test(&trans->active)) 522 return; 523 524 err = mlxsw_emad_process_status_skb(skb, &trans->emad_status); 525 if (err == -EAGAIN) { 526 mlxsw_emad_transmit_retry(mlxsw_core, trans); 527 } else { 528 if (err == 0) { 529 char *op_tlv = mlxsw_emad_op_tlv(skb); 530 531 if (trans->cb) 532 trans->cb(mlxsw_core, 533 mlxsw_emad_reg_payload(op_tlv), 534 trans->reg->len, trans->cb_priv); 535 } 536 mlxsw_emad_trans_finish(trans, err); 537 } 538 } 539 540 /* called with rcu read lock held */ 541 static void mlxsw_emad_rx_listener_func(struct sk_buff *skb, u8 local_port, 542 void *priv) 543 { 544 struct mlxsw_core *mlxsw_core = priv; 545 struct mlxsw_reg_trans *trans; 546 547 trace_devlink_hwmsg(priv_to_devlink(mlxsw_core), true, 0, 548 skb->data, skb->len); 549 550 if (!mlxsw_emad_is_resp(skb)) 551 goto free_skb; 552 553 list_for_each_entry_rcu(trans, &mlxsw_core->emad.trans_list, list) { 554 if (mlxsw_emad_get_tid(skb) == trans->tid) { 555 mlxsw_emad_process_response(mlxsw_core, trans, skb); 556 break; 557 } 558 } 559 560 free_skb: 561 dev_kfree_skb(skb); 562 } 563 564 static const struct mlxsw_listener mlxsw_emad_rx_listener = 565 MLXSW_RXL(mlxsw_emad_rx_listener_func, ETHEMAD, TRAP_TO_CPU, false, 566 EMAD, DISCARD); 567 568 static int mlxsw_emad_init(struct mlxsw_core *mlxsw_core) 569 { 570 struct workqueue_struct *emad_wq; 571 u64 tid; 572 int err; 573 574 if (!(mlxsw_core->bus->features & MLXSW_BUS_F_TXRX)) 575 return 0; 576 577 emad_wq = alloc_workqueue("mlxsw_core_emad", 0, 0); 578 if (!emad_wq) 579 return -ENOMEM; 580 mlxsw_core->emad_wq = emad_wq; 581 582 /* Set the upper 32 bits of the transaction ID field to a random 583 * number. This allows us to discard EMADs addressed to other 584 * devices. 585 */ 586 get_random_bytes(&tid, 4); 587 tid <<= 32; 588 atomic64_set(&mlxsw_core->emad.tid, tid); 589 590 INIT_LIST_HEAD(&mlxsw_core->emad.trans_list); 591 spin_lock_init(&mlxsw_core->emad.trans_list_lock); 592 593 err = mlxsw_core_trap_register(mlxsw_core, &mlxsw_emad_rx_listener, 594 mlxsw_core); 595 if (err) 596 return err; 597 598 err = mlxsw_core->driver->basic_trap_groups_set(mlxsw_core); 599 if (err) 600 goto err_emad_trap_set; 601 mlxsw_core->emad.use_emad = true; 602 603 return 0; 604 605 err_emad_trap_set: 606 mlxsw_core_trap_unregister(mlxsw_core, &mlxsw_emad_rx_listener, 607 mlxsw_core); 608 destroy_workqueue(mlxsw_core->emad_wq); 609 return err; 610 } 611 612 static void mlxsw_emad_fini(struct mlxsw_core *mlxsw_core) 613 { 614 615 if (!(mlxsw_core->bus->features & MLXSW_BUS_F_TXRX)) 616 return; 617 618 mlxsw_core->emad.use_emad = false; 619 mlxsw_core_trap_unregister(mlxsw_core, &mlxsw_emad_rx_listener, 620 mlxsw_core); 621 destroy_workqueue(mlxsw_core->emad_wq); 622 } 623 624 static struct sk_buff *mlxsw_emad_alloc(const struct mlxsw_core *mlxsw_core, 625 u16 reg_len) 626 { 627 struct sk_buff *skb; 628 u16 emad_len; 629 630 emad_len = (reg_len + sizeof(u32) + MLXSW_EMAD_ETH_HDR_LEN + 631 (MLXSW_EMAD_OP_TLV_LEN + MLXSW_EMAD_END_TLV_LEN) * 632 sizeof(u32) + mlxsw_core->driver->txhdr_len); 633 if (emad_len > MLXSW_EMAD_MAX_FRAME_LEN) 634 return NULL; 635 636 skb = netdev_alloc_skb(NULL, emad_len); 637 if (!skb) 638 return NULL; 639 memset(skb->data, 0, emad_len); 640 skb_reserve(skb, emad_len); 641 642 return skb; 643 } 644 645 static int mlxsw_emad_reg_access(struct mlxsw_core *mlxsw_core, 646 const struct mlxsw_reg_info *reg, 647 char *payload, 648 enum mlxsw_core_reg_access_type type, 649 struct mlxsw_reg_trans *trans, 650 struct list_head *bulk_list, 651 mlxsw_reg_trans_cb_t *cb, 652 unsigned long cb_priv, u64 tid) 653 { 654 struct sk_buff *skb; 655 int err; 656 657 dev_dbg(mlxsw_core->bus_info->dev, "EMAD reg access (tid=%llx,reg_id=%x(%s),type=%s)\n", 658 tid, reg->id, mlxsw_reg_id_str(reg->id), 659 mlxsw_core_reg_access_type_str(type)); 660 661 skb = mlxsw_emad_alloc(mlxsw_core, reg->len); 662 if (!skb) 663 return -ENOMEM; 664 665 list_add_tail(&trans->bulk_list, bulk_list); 666 trans->core = mlxsw_core; 667 trans->tx_skb = skb; 668 trans->tx_info.local_port = MLXSW_PORT_CPU_PORT; 669 trans->tx_info.is_emad = true; 670 INIT_DELAYED_WORK(&trans->timeout_dw, mlxsw_emad_trans_timeout_work); 671 trans->tid = tid; 672 init_completion(&trans->completion); 673 trans->cb = cb; 674 trans->cb_priv = cb_priv; 675 trans->reg = reg; 676 trans->type = type; 677 678 mlxsw_emad_construct(skb, reg, payload, type, trans->tid); 679 mlxsw_core->driver->txhdr_construct(skb, &trans->tx_info); 680 681 spin_lock_bh(&mlxsw_core->emad.trans_list_lock); 682 list_add_tail_rcu(&trans->list, &mlxsw_core->emad.trans_list); 683 spin_unlock_bh(&mlxsw_core->emad.trans_list_lock); 684 err = mlxsw_emad_transmit(mlxsw_core, trans); 685 if (err) 686 goto err_out; 687 return 0; 688 689 err_out: 690 spin_lock_bh(&mlxsw_core->emad.trans_list_lock); 691 list_del_rcu(&trans->list); 692 spin_unlock_bh(&mlxsw_core->emad.trans_list_lock); 693 list_del(&trans->bulk_list); 694 dev_kfree_skb(trans->tx_skb); 695 return err; 696 } 697 698 /***************** 699 * Core functions 700 *****************/ 701 702 int mlxsw_core_driver_register(struct mlxsw_driver *mlxsw_driver) 703 { 704 spin_lock(&mlxsw_core_driver_list_lock); 705 list_add_tail(&mlxsw_driver->list, &mlxsw_core_driver_list); 706 spin_unlock(&mlxsw_core_driver_list_lock); 707 return 0; 708 } 709 EXPORT_SYMBOL(mlxsw_core_driver_register); 710 711 void mlxsw_core_driver_unregister(struct mlxsw_driver *mlxsw_driver) 712 { 713 spin_lock(&mlxsw_core_driver_list_lock); 714 list_del(&mlxsw_driver->list); 715 spin_unlock(&mlxsw_core_driver_list_lock); 716 } 717 EXPORT_SYMBOL(mlxsw_core_driver_unregister); 718 719 static struct mlxsw_driver *__driver_find(const char *kind) 720 { 721 struct mlxsw_driver *mlxsw_driver; 722 723 list_for_each_entry(mlxsw_driver, &mlxsw_core_driver_list, list) { 724 if (strcmp(mlxsw_driver->kind, kind) == 0) 725 return mlxsw_driver; 726 } 727 return NULL; 728 } 729 730 static struct mlxsw_driver *mlxsw_core_driver_get(const char *kind) 731 { 732 struct mlxsw_driver *mlxsw_driver; 733 734 spin_lock(&mlxsw_core_driver_list_lock); 735 mlxsw_driver = __driver_find(kind); 736 spin_unlock(&mlxsw_core_driver_list_lock); 737 return mlxsw_driver; 738 } 739 740 static int mlxsw_devlink_port_split(struct devlink *devlink, 741 unsigned int port_index, 742 unsigned int count, 743 struct netlink_ext_ack *extack) 744 { 745 struct mlxsw_core *mlxsw_core = devlink_priv(devlink); 746 747 if (port_index >= mlxsw_core->max_ports) { 748 NL_SET_ERR_MSG_MOD(extack, "Port index exceeds maximum number of ports"); 749 return -EINVAL; 750 } 751 if (!mlxsw_core->driver->port_split) 752 return -EOPNOTSUPP; 753 return mlxsw_core->driver->port_split(mlxsw_core, port_index, count, 754 extack); 755 } 756 757 static int mlxsw_devlink_port_unsplit(struct devlink *devlink, 758 unsigned int port_index, 759 struct netlink_ext_ack *extack) 760 { 761 struct mlxsw_core *mlxsw_core = devlink_priv(devlink); 762 763 if (port_index >= mlxsw_core->max_ports) { 764 NL_SET_ERR_MSG_MOD(extack, "Port index exceeds maximum number of ports"); 765 return -EINVAL; 766 } 767 if (!mlxsw_core->driver->port_unsplit) 768 return -EOPNOTSUPP; 769 return mlxsw_core->driver->port_unsplit(mlxsw_core, port_index, 770 extack); 771 } 772 773 static int 774 mlxsw_devlink_sb_pool_get(struct devlink *devlink, 775 unsigned int sb_index, u16 pool_index, 776 struct devlink_sb_pool_info *pool_info) 777 { 778 struct mlxsw_core *mlxsw_core = devlink_priv(devlink); 779 struct mlxsw_driver *mlxsw_driver = mlxsw_core->driver; 780 781 if (!mlxsw_driver->sb_pool_get) 782 return -EOPNOTSUPP; 783 return mlxsw_driver->sb_pool_get(mlxsw_core, sb_index, 784 pool_index, pool_info); 785 } 786 787 static int 788 mlxsw_devlink_sb_pool_set(struct devlink *devlink, 789 unsigned int sb_index, u16 pool_index, u32 size, 790 enum devlink_sb_threshold_type threshold_type, 791 struct netlink_ext_ack *extack) 792 { 793 struct mlxsw_core *mlxsw_core = devlink_priv(devlink); 794 struct mlxsw_driver *mlxsw_driver = mlxsw_core->driver; 795 796 if (!mlxsw_driver->sb_pool_set) 797 return -EOPNOTSUPP; 798 return mlxsw_driver->sb_pool_set(mlxsw_core, sb_index, 799 pool_index, size, threshold_type, 800 extack); 801 } 802 803 static void *__dl_port(struct devlink_port *devlink_port) 804 { 805 return container_of(devlink_port, struct mlxsw_core_port, devlink_port); 806 } 807 808 static int mlxsw_devlink_port_type_set(struct devlink_port *devlink_port, 809 enum devlink_port_type port_type) 810 { 811 struct mlxsw_core *mlxsw_core = devlink_priv(devlink_port->devlink); 812 struct mlxsw_driver *mlxsw_driver = mlxsw_core->driver; 813 struct mlxsw_core_port *mlxsw_core_port = __dl_port(devlink_port); 814 815 if (!mlxsw_driver->port_type_set) 816 return -EOPNOTSUPP; 817 818 return mlxsw_driver->port_type_set(mlxsw_core, 819 mlxsw_core_port->local_port, 820 port_type); 821 } 822 823 static int mlxsw_devlink_sb_port_pool_get(struct devlink_port *devlink_port, 824 unsigned int sb_index, u16 pool_index, 825 u32 *p_threshold) 826 { 827 struct mlxsw_core *mlxsw_core = devlink_priv(devlink_port->devlink); 828 struct mlxsw_driver *mlxsw_driver = mlxsw_core->driver; 829 struct mlxsw_core_port *mlxsw_core_port = __dl_port(devlink_port); 830 831 if (!mlxsw_driver->sb_port_pool_get || 832 !mlxsw_core_port_check(mlxsw_core_port)) 833 return -EOPNOTSUPP; 834 return mlxsw_driver->sb_port_pool_get(mlxsw_core_port, sb_index, 835 pool_index, p_threshold); 836 } 837 838 static int mlxsw_devlink_sb_port_pool_set(struct devlink_port *devlink_port, 839 unsigned int sb_index, u16 pool_index, 840 u32 threshold, 841 struct netlink_ext_ack *extack) 842 { 843 struct mlxsw_core *mlxsw_core = devlink_priv(devlink_port->devlink); 844 struct mlxsw_driver *mlxsw_driver = mlxsw_core->driver; 845 struct mlxsw_core_port *mlxsw_core_port = __dl_port(devlink_port); 846 847 if (!mlxsw_driver->sb_port_pool_set || 848 !mlxsw_core_port_check(mlxsw_core_port)) 849 return -EOPNOTSUPP; 850 return mlxsw_driver->sb_port_pool_set(mlxsw_core_port, sb_index, 851 pool_index, threshold, extack); 852 } 853 854 static int 855 mlxsw_devlink_sb_tc_pool_bind_get(struct devlink_port *devlink_port, 856 unsigned int sb_index, u16 tc_index, 857 enum devlink_sb_pool_type pool_type, 858 u16 *p_pool_index, u32 *p_threshold) 859 { 860 struct mlxsw_core *mlxsw_core = devlink_priv(devlink_port->devlink); 861 struct mlxsw_driver *mlxsw_driver = mlxsw_core->driver; 862 struct mlxsw_core_port *mlxsw_core_port = __dl_port(devlink_port); 863 864 if (!mlxsw_driver->sb_tc_pool_bind_get || 865 !mlxsw_core_port_check(mlxsw_core_port)) 866 return -EOPNOTSUPP; 867 return mlxsw_driver->sb_tc_pool_bind_get(mlxsw_core_port, sb_index, 868 tc_index, pool_type, 869 p_pool_index, p_threshold); 870 } 871 872 static int 873 mlxsw_devlink_sb_tc_pool_bind_set(struct devlink_port *devlink_port, 874 unsigned int sb_index, u16 tc_index, 875 enum devlink_sb_pool_type pool_type, 876 u16 pool_index, u32 threshold, 877 struct netlink_ext_ack *extack) 878 { 879 struct mlxsw_core *mlxsw_core = devlink_priv(devlink_port->devlink); 880 struct mlxsw_driver *mlxsw_driver = mlxsw_core->driver; 881 struct mlxsw_core_port *mlxsw_core_port = __dl_port(devlink_port); 882 883 if (!mlxsw_driver->sb_tc_pool_bind_set || 884 !mlxsw_core_port_check(mlxsw_core_port)) 885 return -EOPNOTSUPP; 886 return mlxsw_driver->sb_tc_pool_bind_set(mlxsw_core_port, sb_index, 887 tc_index, pool_type, 888 pool_index, threshold, extack); 889 } 890 891 static int mlxsw_devlink_sb_occ_snapshot(struct devlink *devlink, 892 unsigned int sb_index) 893 { 894 struct mlxsw_core *mlxsw_core = devlink_priv(devlink); 895 struct mlxsw_driver *mlxsw_driver = mlxsw_core->driver; 896 897 if (!mlxsw_driver->sb_occ_snapshot) 898 return -EOPNOTSUPP; 899 return mlxsw_driver->sb_occ_snapshot(mlxsw_core, sb_index); 900 } 901 902 static int mlxsw_devlink_sb_occ_max_clear(struct devlink *devlink, 903 unsigned int sb_index) 904 { 905 struct mlxsw_core *mlxsw_core = devlink_priv(devlink); 906 struct mlxsw_driver *mlxsw_driver = mlxsw_core->driver; 907 908 if (!mlxsw_driver->sb_occ_max_clear) 909 return -EOPNOTSUPP; 910 return mlxsw_driver->sb_occ_max_clear(mlxsw_core, sb_index); 911 } 912 913 static int 914 mlxsw_devlink_sb_occ_port_pool_get(struct devlink_port *devlink_port, 915 unsigned int sb_index, u16 pool_index, 916 u32 *p_cur, u32 *p_max) 917 { 918 struct mlxsw_core *mlxsw_core = devlink_priv(devlink_port->devlink); 919 struct mlxsw_driver *mlxsw_driver = mlxsw_core->driver; 920 struct mlxsw_core_port *mlxsw_core_port = __dl_port(devlink_port); 921 922 if (!mlxsw_driver->sb_occ_port_pool_get || 923 !mlxsw_core_port_check(mlxsw_core_port)) 924 return -EOPNOTSUPP; 925 return mlxsw_driver->sb_occ_port_pool_get(mlxsw_core_port, sb_index, 926 pool_index, p_cur, p_max); 927 } 928 929 static int 930 mlxsw_devlink_sb_occ_tc_port_bind_get(struct devlink_port *devlink_port, 931 unsigned int sb_index, u16 tc_index, 932 enum devlink_sb_pool_type pool_type, 933 u32 *p_cur, u32 *p_max) 934 { 935 struct mlxsw_core *mlxsw_core = devlink_priv(devlink_port->devlink); 936 struct mlxsw_driver *mlxsw_driver = mlxsw_core->driver; 937 struct mlxsw_core_port *mlxsw_core_port = __dl_port(devlink_port); 938 939 if (!mlxsw_driver->sb_occ_tc_port_bind_get || 940 !mlxsw_core_port_check(mlxsw_core_port)) 941 return -EOPNOTSUPP; 942 return mlxsw_driver->sb_occ_tc_port_bind_get(mlxsw_core_port, 943 sb_index, tc_index, 944 pool_type, p_cur, p_max); 945 } 946 947 static int 948 mlxsw_devlink_info_get(struct devlink *devlink, struct devlink_info_req *req, 949 struct netlink_ext_ack *extack) 950 { 951 struct mlxsw_core *mlxsw_core = devlink_priv(devlink); 952 char fw_info_psid[MLXSW_REG_MGIR_FW_INFO_PSID_SIZE]; 953 u32 hw_rev, fw_major, fw_minor, fw_sub_minor; 954 char mgir_pl[MLXSW_REG_MGIR_LEN]; 955 char buf[32]; 956 int err; 957 958 err = devlink_info_driver_name_put(req, 959 mlxsw_core->bus_info->device_kind); 960 if (err) 961 return err; 962 963 mlxsw_reg_mgir_pack(mgir_pl); 964 err = mlxsw_reg_query(mlxsw_core, MLXSW_REG(mgir), mgir_pl); 965 if (err) 966 return err; 967 mlxsw_reg_mgir_unpack(mgir_pl, &hw_rev, fw_info_psid, &fw_major, 968 &fw_minor, &fw_sub_minor); 969 970 sprintf(buf, "%X", hw_rev); 971 err = devlink_info_version_fixed_put(req, "hw.revision", buf); 972 if (err) 973 return err; 974 975 err = devlink_info_version_fixed_put(req, "fw.psid", fw_info_psid); 976 if (err) 977 return err; 978 979 sprintf(buf, "%d.%d.%d", fw_major, fw_minor, fw_sub_minor); 980 err = devlink_info_version_running_put(req, "fw.version", buf); 981 if (err) 982 return err; 983 984 return 0; 985 } 986 987 static int mlxsw_devlink_core_bus_device_reload(struct devlink *devlink, 988 struct netlink_ext_ack *extack) 989 { 990 struct mlxsw_core *mlxsw_core = devlink_priv(devlink); 991 int err; 992 993 if (!(mlxsw_core->bus->features & MLXSW_BUS_F_RESET)) 994 return -EOPNOTSUPP; 995 996 mlxsw_core_bus_device_unregister(mlxsw_core, true); 997 err = mlxsw_core_bus_device_register(mlxsw_core->bus_info, 998 mlxsw_core->bus, 999 mlxsw_core->bus_priv, true, 1000 devlink); 1001 mlxsw_core->reload_fail = !!err; 1002 1003 return err; 1004 } 1005 1006 static int mlxsw_devlink_flash_update(struct devlink *devlink, 1007 const char *file_name, 1008 const char *component, 1009 struct netlink_ext_ack *extack) 1010 { 1011 struct mlxsw_core *mlxsw_core = devlink_priv(devlink); 1012 struct mlxsw_driver *mlxsw_driver = mlxsw_core->driver; 1013 1014 if (!mlxsw_driver->flash_update) 1015 return -EOPNOTSUPP; 1016 return mlxsw_driver->flash_update(mlxsw_core, file_name, 1017 component, extack); 1018 } 1019 1020 static int mlxsw_devlink_trap_init(struct devlink *devlink, 1021 const struct devlink_trap *trap, 1022 void *trap_ctx) 1023 { 1024 struct mlxsw_core *mlxsw_core = devlink_priv(devlink); 1025 struct mlxsw_driver *mlxsw_driver = mlxsw_core->driver; 1026 1027 if (!mlxsw_driver->trap_init) 1028 return -EOPNOTSUPP; 1029 return mlxsw_driver->trap_init(mlxsw_core, trap, trap_ctx); 1030 } 1031 1032 static void mlxsw_devlink_trap_fini(struct devlink *devlink, 1033 const struct devlink_trap *trap, 1034 void *trap_ctx) 1035 { 1036 struct mlxsw_core *mlxsw_core = devlink_priv(devlink); 1037 struct mlxsw_driver *mlxsw_driver = mlxsw_core->driver; 1038 1039 if (!mlxsw_driver->trap_fini) 1040 return; 1041 mlxsw_driver->trap_fini(mlxsw_core, trap, trap_ctx); 1042 } 1043 1044 static int mlxsw_devlink_trap_action_set(struct devlink *devlink, 1045 const struct devlink_trap *trap, 1046 enum devlink_trap_action action) 1047 { 1048 struct mlxsw_core *mlxsw_core = devlink_priv(devlink); 1049 struct mlxsw_driver *mlxsw_driver = mlxsw_core->driver; 1050 1051 if (!mlxsw_driver->trap_action_set) 1052 return -EOPNOTSUPP; 1053 return mlxsw_driver->trap_action_set(mlxsw_core, trap, action); 1054 } 1055 1056 static int 1057 mlxsw_devlink_trap_group_init(struct devlink *devlink, 1058 const struct devlink_trap_group *group) 1059 { 1060 struct mlxsw_core *mlxsw_core = devlink_priv(devlink); 1061 struct mlxsw_driver *mlxsw_driver = mlxsw_core->driver; 1062 1063 if (!mlxsw_driver->trap_group_init) 1064 return -EOPNOTSUPP; 1065 return mlxsw_driver->trap_group_init(mlxsw_core, group); 1066 } 1067 1068 static const struct devlink_ops mlxsw_devlink_ops = { 1069 .reload = mlxsw_devlink_core_bus_device_reload, 1070 .port_type_set = mlxsw_devlink_port_type_set, 1071 .port_split = mlxsw_devlink_port_split, 1072 .port_unsplit = mlxsw_devlink_port_unsplit, 1073 .sb_pool_get = mlxsw_devlink_sb_pool_get, 1074 .sb_pool_set = mlxsw_devlink_sb_pool_set, 1075 .sb_port_pool_get = mlxsw_devlink_sb_port_pool_get, 1076 .sb_port_pool_set = mlxsw_devlink_sb_port_pool_set, 1077 .sb_tc_pool_bind_get = mlxsw_devlink_sb_tc_pool_bind_get, 1078 .sb_tc_pool_bind_set = mlxsw_devlink_sb_tc_pool_bind_set, 1079 .sb_occ_snapshot = mlxsw_devlink_sb_occ_snapshot, 1080 .sb_occ_max_clear = mlxsw_devlink_sb_occ_max_clear, 1081 .sb_occ_port_pool_get = mlxsw_devlink_sb_occ_port_pool_get, 1082 .sb_occ_tc_port_bind_get = mlxsw_devlink_sb_occ_tc_port_bind_get, 1083 .info_get = mlxsw_devlink_info_get, 1084 .flash_update = mlxsw_devlink_flash_update, 1085 .trap_init = mlxsw_devlink_trap_init, 1086 .trap_fini = mlxsw_devlink_trap_fini, 1087 .trap_action_set = mlxsw_devlink_trap_action_set, 1088 .trap_group_init = mlxsw_devlink_trap_group_init, 1089 }; 1090 1091 static int 1092 __mlxsw_core_bus_device_register(const struct mlxsw_bus_info *mlxsw_bus_info, 1093 const struct mlxsw_bus *mlxsw_bus, 1094 void *bus_priv, bool reload, 1095 struct devlink *devlink) 1096 { 1097 const char *device_kind = mlxsw_bus_info->device_kind; 1098 struct mlxsw_core *mlxsw_core; 1099 struct mlxsw_driver *mlxsw_driver; 1100 struct mlxsw_res *res; 1101 size_t alloc_size; 1102 int err; 1103 1104 mlxsw_driver = mlxsw_core_driver_get(device_kind); 1105 if (!mlxsw_driver) 1106 return -EINVAL; 1107 1108 if (!reload) { 1109 alloc_size = sizeof(*mlxsw_core) + mlxsw_driver->priv_size; 1110 devlink = devlink_alloc(&mlxsw_devlink_ops, alloc_size); 1111 if (!devlink) { 1112 err = -ENOMEM; 1113 goto err_devlink_alloc; 1114 } 1115 } 1116 1117 mlxsw_core = devlink_priv(devlink); 1118 INIT_LIST_HEAD(&mlxsw_core->rx_listener_list); 1119 INIT_LIST_HEAD(&mlxsw_core->event_listener_list); 1120 mlxsw_core->driver = mlxsw_driver; 1121 mlxsw_core->bus = mlxsw_bus; 1122 mlxsw_core->bus_priv = bus_priv; 1123 mlxsw_core->bus_info = mlxsw_bus_info; 1124 1125 res = mlxsw_driver->res_query_enabled ? &mlxsw_core->res : NULL; 1126 err = mlxsw_bus->init(bus_priv, mlxsw_core, mlxsw_driver->profile, res); 1127 if (err) 1128 goto err_bus_init; 1129 1130 if (mlxsw_driver->resources_register && !reload) { 1131 err = mlxsw_driver->resources_register(mlxsw_core); 1132 if (err) 1133 goto err_register_resources; 1134 } 1135 1136 err = mlxsw_ports_init(mlxsw_core); 1137 if (err) 1138 goto err_ports_init; 1139 1140 if (MLXSW_CORE_RES_VALID(mlxsw_core, MAX_LAG) && 1141 MLXSW_CORE_RES_VALID(mlxsw_core, MAX_LAG_MEMBERS)) { 1142 alloc_size = sizeof(u8) * 1143 MLXSW_CORE_RES_GET(mlxsw_core, MAX_LAG) * 1144 MLXSW_CORE_RES_GET(mlxsw_core, MAX_LAG_MEMBERS); 1145 mlxsw_core->lag.mapping = kzalloc(alloc_size, GFP_KERNEL); 1146 if (!mlxsw_core->lag.mapping) { 1147 err = -ENOMEM; 1148 goto err_alloc_lag_mapping; 1149 } 1150 } 1151 1152 err = mlxsw_emad_init(mlxsw_core); 1153 if (err) 1154 goto err_emad_init; 1155 1156 if (!reload) { 1157 err = devlink_register(devlink, mlxsw_bus_info->dev); 1158 if (err) 1159 goto err_devlink_register; 1160 } 1161 1162 if (mlxsw_driver->params_register && !reload) { 1163 err = mlxsw_driver->params_register(mlxsw_core); 1164 if (err) 1165 goto err_register_params; 1166 } 1167 1168 if (mlxsw_driver->init) { 1169 err = mlxsw_driver->init(mlxsw_core, mlxsw_bus_info); 1170 if (err) 1171 goto err_driver_init; 1172 } 1173 1174 err = mlxsw_hwmon_init(mlxsw_core, mlxsw_bus_info, &mlxsw_core->hwmon); 1175 if (err) 1176 goto err_hwmon_init; 1177 1178 err = mlxsw_thermal_init(mlxsw_core, mlxsw_bus_info, 1179 &mlxsw_core->thermal); 1180 if (err) 1181 goto err_thermal_init; 1182 1183 if (mlxsw_driver->params_register && !reload) 1184 devlink_params_publish(devlink); 1185 1186 return 0; 1187 1188 err_thermal_init: 1189 mlxsw_hwmon_fini(mlxsw_core->hwmon); 1190 err_hwmon_init: 1191 if (mlxsw_core->driver->fini) 1192 mlxsw_core->driver->fini(mlxsw_core); 1193 err_driver_init: 1194 if (mlxsw_driver->params_unregister && !reload) 1195 mlxsw_driver->params_unregister(mlxsw_core); 1196 err_register_params: 1197 if (!reload) 1198 devlink_unregister(devlink); 1199 err_devlink_register: 1200 mlxsw_emad_fini(mlxsw_core); 1201 err_emad_init: 1202 kfree(mlxsw_core->lag.mapping); 1203 err_alloc_lag_mapping: 1204 mlxsw_ports_fini(mlxsw_core); 1205 err_ports_init: 1206 if (!reload) 1207 devlink_resources_unregister(devlink, NULL); 1208 err_register_resources: 1209 mlxsw_bus->fini(bus_priv); 1210 err_bus_init: 1211 if (!reload) 1212 devlink_free(devlink); 1213 err_devlink_alloc: 1214 return err; 1215 } 1216 1217 int mlxsw_core_bus_device_register(const struct mlxsw_bus_info *mlxsw_bus_info, 1218 const struct mlxsw_bus *mlxsw_bus, 1219 void *bus_priv, bool reload, 1220 struct devlink *devlink) 1221 { 1222 bool called_again = false; 1223 int err; 1224 1225 again: 1226 err = __mlxsw_core_bus_device_register(mlxsw_bus_info, mlxsw_bus, 1227 bus_priv, reload, devlink); 1228 /* -EAGAIN is returned in case the FW was updated. FW needs 1229 * a reset, so lets try to call __mlxsw_core_bus_device_register() 1230 * again. 1231 */ 1232 if (err == -EAGAIN && !called_again) { 1233 called_again = true; 1234 goto again; 1235 } 1236 1237 return err; 1238 } 1239 EXPORT_SYMBOL(mlxsw_core_bus_device_register); 1240 1241 void mlxsw_core_bus_device_unregister(struct mlxsw_core *mlxsw_core, 1242 bool reload) 1243 { 1244 struct devlink *devlink = priv_to_devlink(mlxsw_core); 1245 1246 if (mlxsw_core->reload_fail) { 1247 if (!reload) 1248 /* Only the parts that were not de-initialized in the 1249 * failed reload attempt need to be de-initialized. 1250 */ 1251 goto reload_fail_deinit; 1252 else 1253 return; 1254 } 1255 1256 if (mlxsw_core->driver->params_unregister && !reload) 1257 devlink_params_unpublish(devlink); 1258 mlxsw_thermal_fini(mlxsw_core->thermal); 1259 mlxsw_hwmon_fini(mlxsw_core->hwmon); 1260 if (mlxsw_core->driver->fini) 1261 mlxsw_core->driver->fini(mlxsw_core); 1262 if (mlxsw_core->driver->params_unregister && !reload) 1263 mlxsw_core->driver->params_unregister(mlxsw_core); 1264 if (!reload) 1265 devlink_unregister(devlink); 1266 mlxsw_emad_fini(mlxsw_core); 1267 kfree(mlxsw_core->lag.mapping); 1268 mlxsw_ports_fini(mlxsw_core); 1269 if (!reload) 1270 devlink_resources_unregister(devlink, NULL); 1271 mlxsw_core->bus->fini(mlxsw_core->bus_priv); 1272 1273 return; 1274 1275 reload_fail_deinit: 1276 if (mlxsw_core->driver->params_unregister) 1277 mlxsw_core->driver->params_unregister(mlxsw_core); 1278 devlink_unregister(devlink); 1279 devlink_resources_unregister(devlink, NULL); 1280 devlink_free(devlink); 1281 } 1282 EXPORT_SYMBOL(mlxsw_core_bus_device_unregister); 1283 1284 bool mlxsw_core_skb_transmit_busy(struct mlxsw_core *mlxsw_core, 1285 const struct mlxsw_tx_info *tx_info) 1286 { 1287 return mlxsw_core->bus->skb_transmit_busy(mlxsw_core->bus_priv, 1288 tx_info); 1289 } 1290 EXPORT_SYMBOL(mlxsw_core_skb_transmit_busy); 1291 1292 int mlxsw_core_skb_transmit(struct mlxsw_core *mlxsw_core, struct sk_buff *skb, 1293 const struct mlxsw_tx_info *tx_info) 1294 { 1295 return mlxsw_core->bus->skb_transmit(mlxsw_core->bus_priv, skb, 1296 tx_info); 1297 } 1298 EXPORT_SYMBOL(mlxsw_core_skb_transmit); 1299 1300 void mlxsw_core_ptp_transmitted(struct mlxsw_core *mlxsw_core, 1301 struct sk_buff *skb, u8 local_port) 1302 { 1303 if (mlxsw_core->driver->ptp_transmitted) 1304 mlxsw_core->driver->ptp_transmitted(mlxsw_core, skb, 1305 local_port); 1306 } 1307 EXPORT_SYMBOL(mlxsw_core_ptp_transmitted); 1308 1309 static bool __is_rx_listener_equal(const struct mlxsw_rx_listener *rxl_a, 1310 const struct mlxsw_rx_listener *rxl_b) 1311 { 1312 return (rxl_a->func == rxl_b->func && 1313 rxl_a->local_port == rxl_b->local_port && 1314 rxl_a->trap_id == rxl_b->trap_id); 1315 } 1316 1317 static struct mlxsw_rx_listener_item * 1318 __find_rx_listener_item(struct mlxsw_core *mlxsw_core, 1319 const struct mlxsw_rx_listener *rxl, 1320 void *priv) 1321 { 1322 struct mlxsw_rx_listener_item *rxl_item; 1323 1324 list_for_each_entry(rxl_item, &mlxsw_core->rx_listener_list, list) { 1325 if (__is_rx_listener_equal(&rxl_item->rxl, rxl) && 1326 rxl_item->priv == priv) 1327 return rxl_item; 1328 } 1329 return NULL; 1330 } 1331 1332 int mlxsw_core_rx_listener_register(struct mlxsw_core *mlxsw_core, 1333 const struct mlxsw_rx_listener *rxl, 1334 void *priv) 1335 { 1336 struct mlxsw_rx_listener_item *rxl_item; 1337 1338 rxl_item = __find_rx_listener_item(mlxsw_core, rxl, priv); 1339 if (rxl_item) 1340 return -EEXIST; 1341 rxl_item = kmalloc(sizeof(*rxl_item), GFP_KERNEL); 1342 if (!rxl_item) 1343 return -ENOMEM; 1344 rxl_item->rxl = *rxl; 1345 rxl_item->priv = priv; 1346 1347 list_add_rcu(&rxl_item->list, &mlxsw_core->rx_listener_list); 1348 return 0; 1349 } 1350 EXPORT_SYMBOL(mlxsw_core_rx_listener_register); 1351 1352 void mlxsw_core_rx_listener_unregister(struct mlxsw_core *mlxsw_core, 1353 const struct mlxsw_rx_listener *rxl, 1354 void *priv) 1355 { 1356 struct mlxsw_rx_listener_item *rxl_item; 1357 1358 rxl_item = __find_rx_listener_item(mlxsw_core, rxl, priv); 1359 if (!rxl_item) 1360 return; 1361 list_del_rcu(&rxl_item->list); 1362 synchronize_rcu(); 1363 kfree(rxl_item); 1364 } 1365 EXPORT_SYMBOL(mlxsw_core_rx_listener_unregister); 1366 1367 static void mlxsw_core_event_listener_func(struct sk_buff *skb, u8 local_port, 1368 void *priv) 1369 { 1370 struct mlxsw_event_listener_item *event_listener_item = priv; 1371 struct mlxsw_reg_info reg; 1372 char *payload; 1373 char *op_tlv = mlxsw_emad_op_tlv(skb); 1374 char *reg_tlv = mlxsw_emad_reg_tlv(skb); 1375 1376 reg.id = mlxsw_emad_op_tlv_register_id_get(op_tlv); 1377 reg.len = (mlxsw_emad_reg_tlv_len_get(reg_tlv) - 1) * sizeof(u32); 1378 payload = mlxsw_emad_reg_payload(op_tlv); 1379 event_listener_item->el.func(®, payload, event_listener_item->priv); 1380 dev_kfree_skb(skb); 1381 } 1382 1383 static bool __is_event_listener_equal(const struct mlxsw_event_listener *el_a, 1384 const struct mlxsw_event_listener *el_b) 1385 { 1386 return (el_a->func == el_b->func && 1387 el_a->trap_id == el_b->trap_id); 1388 } 1389 1390 static struct mlxsw_event_listener_item * 1391 __find_event_listener_item(struct mlxsw_core *mlxsw_core, 1392 const struct mlxsw_event_listener *el, 1393 void *priv) 1394 { 1395 struct mlxsw_event_listener_item *el_item; 1396 1397 list_for_each_entry(el_item, &mlxsw_core->event_listener_list, list) { 1398 if (__is_event_listener_equal(&el_item->el, el) && 1399 el_item->priv == priv) 1400 return el_item; 1401 } 1402 return NULL; 1403 } 1404 1405 int mlxsw_core_event_listener_register(struct mlxsw_core *mlxsw_core, 1406 const struct mlxsw_event_listener *el, 1407 void *priv) 1408 { 1409 int err; 1410 struct mlxsw_event_listener_item *el_item; 1411 const struct mlxsw_rx_listener rxl = { 1412 .func = mlxsw_core_event_listener_func, 1413 .local_port = MLXSW_PORT_DONT_CARE, 1414 .trap_id = el->trap_id, 1415 }; 1416 1417 el_item = __find_event_listener_item(mlxsw_core, el, priv); 1418 if (el_item) 1419 return -EEXIST; 1420 el_item = kmalloc(sizeof(*el_item), GFP_KERNEL); 1421 if (!el_item) 1422 return -ENOMEM; 1423 el_item->el = *el; 1424 el_item->priv = priv; 1425 1426 err = mlxsw_core_rx_listener_register(mlxsw_core, &rxl, el_item); 1427 if (err) 1428 goto err_rx_listener_register; 1429 1430 /* No reason to save item if we did not manage to register an RX 1431 * listener for it. 1432 */ 1433 list_add_rcu(&el_item->list, &mlxsw_core->event_listener_list); 1434 1435 return 0; 1436 1437 err_rx_listener_register: 1438 kfree(el_item); 1439 return err; 1440 } 1441 EXPORT_SYMBOL(mlxsw_core_event_listener_register); 1442 1443 void mlxsw_core_event_listener_unregister(struct mlxsw_core *mlxsw_core, 1444 const struct mlxsw_event_listener *el, 1445 void *priv) 1446 { 1447 struct mlxsw_event_listener_item *el_item; 1448 const struct mlxsw_rx_listener rxl = { 1449 .func = mlxsw_core_event_listener_func, 1450 .local_port = MLXSW_PORT_DONT_CARE, 1451 .trap_id = el->trap_id, 1452 }; 1453 1454 el_item = __find_event_listener_item(mlxsw_core, el, priv); 1455 if (!el_item) 1456 return; 1457 mlxsw_core_rx_listener_unregister(mlxsw_core, &rxl, el_item); 1458 list_del(&el_item->list); 1459 kfree(el_item); 1460 } 1461 EXPORT_SYMBOL(mlxsw_core_event_listener_unregister); 1462 1463 static int mlxsw_core_listener_register(struct mlxsw_core *mlxsw_core, 1464 const struct mlxsw_listener *listener, 1465 void *priv) 1466 { 1467 if (listener->is_event) 1468 return mlxsw_core_event_listener_register(mlxsw_core, 1469 &listener->u.event_listener, 1470 priv); 1471 else 1472 return mlxsw_core_rx_listener_register(mlxsw_core, 1473 &listener->u.rx_listener, 1474 priv); 1475 } 1476 1477 static void mlxsw_core_listener_unregister(struct mlxsw_core *mlxsw_core, 1478 const struct mlxsw_listener *listener, 1479 void *priv) 1480 { 1481 if (listener->is_event) 1482 mlxsw_core_event_listener_unregister(mlxsw_core, 1483 &listener->u.event_listener, 1484 priv); 1485 else 1486 mlxsw_core_rx_listener_unregister(mlxsw_core, 1487 &listener->u.rx_listener, 1488 priv); 1489 } 1490 1491 int mlxsw_core_trap_register(struct mlxsw_core *mlxsw_core, 1492 const struct mlxsw_listener *listener, void *priv) 1493 { 1494 char hpkt_pl[MLXSW_REG_HPKT_LEN]; 1495 int err; 1496 1497 err = mlxsw_core_listener_register(mlxsw_core, listener, priv); 1498 if (err) 1499 return err; 1500 1501 mlxsw_reg_hpkt_pack(hpkt_pl, listener->action, listener->trap_id, 1502 listener->trap_group, listener->is_ctrl); 1503 err = mlxsw_reg_write(mlxsw_core, MLXSW_REG(hpkt), hpkt_pl); 1504 if (err) 1505 goto err_trap_set; 1506 1507 return 0; 1508 1509 err_trap_set: 1510 mlxsw_core_listener_unregister(mlxsw_core, listener, priv); 1511 return err; 1512 } 1513 EXPORT_SYMBOL(mlxsw_core_trap_register); 1514 1515 void mlxsw_core_trap_unregister(struct mlxsw_core *mlxsw_core, 1516 const struct mlxsw_listener *listener, 1517 void *priv) 1518 { 1519 char hpkt_pl[MLXSW_REG_HPKT_LEN]; 1520 1521 if (!listener->is_event) { 1522 mlxsw_reg_hpkt_pack(hpkt_pl, listener->unreg_action, 1523 listener->trap_id, listener->trap_group, 1524 listener->is_ctrl); 1525 mlxsw_reg_write(mlxsw_core, MLXSW_REG(hpkt), hpkt_pl); 1526 } 1527 1528 mlxsw_core_listener_unregister(mlxsw_core, listener, priv); 1529 } 1530 EXPORT_SYMBOL(mlxsw_core_trap_unregister); 1531 1532 int mlxsw_core_trap_action_set(struct mlxsw_core *mlxsw_core, 1533 const struct mlxsw_listener *listener, 1534 enum mlxsw_reg_hpkt_action action) 1535 { 1536 char hpkt_pl[MLXSW_REG_HPKT_LEN]; 1537 1538 mlxsw_reg_hpkt_pack(hpkt_pl, action, listener->trap_id, 1539 listener->trap_group, listener->is_ctrl); 1540 return mlxsw_reg_write(mlxsw_core, MLXSW_REG(hpkt), hpkt_pl); 1541 } 1542 EXPORT_SYMBOL(mlxsw_core_trap_action_set); 1543 1544 static u64 mlxsw_core_tid_get(struct mlxsw_core *mlxsw_core) 1545 { 1546 return atomic64_inc_return(&mlxsw_core->emad.tid); 1547 } 1548 1549 static int mlxsw_core_reg_access_emad(struct mlxsw_core *mlxsw_core, 1550 const struct mlxsw_reg_info *reg, 1551 char *payload, 1552 enum mlxsw_core_reg_access_type type, 1553 struct list_head *bulk_list, 1554 mlxsw_reg_trans_cb_t *cb, 1555 unsigned long cb_priv) 1556 { 1557 u64 tid = mlxsw_core_tid_get(mlxsw_core); 1558 struct mlxsw_reg_trans *trans; 1559 int err; 1560 1561 trans = kzalloc(sizeof(*trans), GFP_KERNEL); 1562 if (!trans) 1563 return -ENOMEM; 1564 1565 err = mlxsw_emad_reg_access(mlxsw_core, reg, payload, type, trans, 1566 bulk_list, cb, cb_priv, tid); 1567 if (err) { 1568 kfree(trans); 1569 return err; 1570 } 1571 return 0; 1572 } 1573 1574 int mlxsw_reg_trans_query(struct mlxsw_core *mlxsw_core, 1575 const struct mlxsw_reg_info *reg, char *payload, 1576 struct list_head *bulk_list, 1577 mlxsw_reg_trans_cb_t *cb, unsigned long cb_priv) 1578 { 1579 return mlxsw_core_reg_access_emad(mlxsw_core, reg, payload, 1580 MLXSW_CORE_REG_ACCESS_TYPE_QUERY, 1581 bulk_list, cb, cb_priv); 1582 } 1583 EXPORT_SYMBOL(mlxsw_reg_trans_query); 1584 1585 int mlxsw_reg_trans_write(struct mlxsw_core *mlxsw_core, 1586 const struct mlxsw_reg_info *reg, char *payload, 1587 struct list_head *bulk_list, 1588 mlxsw_reg_trans_cb_t *cb, unsigned long cb_priv) 1589 { 1590 return mlxsw_core_reg_access_emad(mlxsw_core, reg, payload, 1591 MLXSW_CORE_REG_ACCESS_TYPE_WRITE, 1592 bulk_list, cb, cb_priv); 1593 } 1594 EXPORT_SYMBOL(mlxsw_reg_trans_write); 1595 1596 static int mlxsw_reg_trans_wait(struct mlxsw_reg_trans *trans) 1597 { 1598 struct mlxsw_core *mlxsw_core = trans->core; 1599 int err; 1600 1601 wait_for_completion(&trans->completion); 1602 cancel_delayed_work_sync(&trans->timeout_dw); 1603 err = trans->err; 1604 1605 if (trans->retries) 1606 dev_warn(mlxsw_core->bus_info->dev, "EMAD retries (%d/%d) (tid=%llx)\n", 1607 trans->retries, MLXSW_EMAD_MAX_RETRY, trans->tid); 1608 if (err) { 1609 dev_err(mlxsw_core->bus_info->dev, "EMAD reg access failed (tid=%llx,reg_id=%x(%s),type=%s,status=%x(%s))\n", 1610 trans->tid, trans->reg->id, 1611 mlxsw_reg_id_str(trans->reg->id), 1612 mlxsw_core_reg_access_type_str(trans->type), 1613 trans->emad_status, 1614 mlxsw_emad_op_tlv_status_str(trans->emad_status)); 1615 trace_devlink_hwerr(priv_to_devlink(mlxsw_core), 1616 trans->emad_status, 1617 mlxsw_emad_op_tlv_status_str(trans->emad_status)); 1618 } 1619 1620 list_del(&trans->bulk_list); 1621 kfree_rcu(trans, rcu); 1622 return err; 1623 } 1624 1625 int mlxsw_reg_trans_bulk_wait(struct list_head *bulk_list) 1626 { 1627 struct mlxsw_reg_trans *trans; 1628 struct mlxsw_reg_trans *tmp; 1629 int sum_err = 0; 1630 int err; 1631 1632 list_for_each_entry_safe(trans, tmp, bulk_list, bulk_list) { 1633 err = mlxsw_reg_trans_wait(trans); 1634 if (err && sum_err == 0) 1635 sum_err = err; /* first error to be returned */ 1636 } 1637 return sum_err; 1638 } 1639 EXPORT_SYMBOL(mlxsw_reg_trans_bulk_wait); 1640 1641 static int mlxsw_core_reg_access_cmd(struct mlxsw_core *mlxsw_core, 1642 const struct mlxsw_reg_info *reg, 1643 char *payload, 1644 enum mlxsw_core_reg_access_type type) 1645 { 1646 enum mlxsw_emad_op_tlv_status status; 1647 int err, n_retry; 1648 bool reset_ok; 1649 char *in_mbox, *out_mbox, *tmp; 1650 1651 dev_dbg(mlxsw_core->bus_info->dev, "Reg cmd access (reg_id=%x(%s),type=%s)\n", 1652 reg->id, mlxsw_reg_id_str(reg->id), 1653 mlxsw_core_reg_access_type_str(type)); 1654 1655 in_mbox = mlxsw_cmd_mbox_alloc(); 1656 if (!in_mbox) 1657 return -ENOMEM; 1658 1659 out_mbox = mlxsw_cmd_mbox_alloc(); 1660 if (!out_mbox) { 1661 err = -ENOMEM; 1662 goto free_in_mbox; 1663 } 1664 1665 mlxsw_emad_pack_op_tlv(in_mbox, reg, type, 1666 mlxsw_core_tid_get(mlxsw_core)); 1667 tmp = in_mbox + MLXSW_EMAD_OP_TLV_LEN * sizeof(u32); 1668 mlxsw_emad_pack_reg_tlv(tmp, reg, payload); 1669 1670 /* There is a special treatment needed for MRSR (reset) register. 1671 * The command interface will return error after the command 1672 * is executed, so tell the lower layer to expect it 1673 * and cope accordingly. 1674 */ 1675 reset_ok = reg->id == MLXSW_REG_MRSR_ID; 1676 1677 n_retry = 0; 1678 retry: 1679 err = mlxsw_cmd_access_reg(mlxsw_core, reset_ok, in_mbox, out_mbox); 1680 if (!err) { 1681 err = mlxsw_emad_process_status(out_mbox, &status); 1682 if (err) { 1683 if (err == -EAGAIN && n_retry++ < MLXSW_EMAD_MAX_RETRY) 1684 goto retry; 1685 dev_err(mlxsw_core->bus_info->dev, "Reg cmd access status failed (status=%x(%s))\n", 1686 status, mlxsw_emad_op_tlv_status_str(status)); 1687 } 1688 } 1689 1690 if (!err) 1691 memcpy(payload, mlxsw_emad_reg_payload(out_mbox), 1692 reg->len); 1693 1694 mlxsw_cmd_mbox_free(out_mbox); 1695 free_in_mbox: 1696 mlxsw_cmd_mbox_free(in_mbox); 1697 if (err) 1698 dev_err(mlxsw_core->bus_info->dev, "Reg cmd access failed (reg_id=%x(%s),type=%s)\n", 1699 reg->id, mlxsw_reg_id_str(reg->id), 1700 mlxsw_core_reg_access_type_str(type)); 1701 return err; 1702 } 1703 1704 static void mlxsw_core_reg_access_cb(struct mlxsw_core *mlxsw_core, 1705 char *payload, size_t payload_len, 1706 unsigned long cb_priv) 1707 { 1708 char *orig_payload = (char *) cb_priv; 1709 1710 memcpy(orig_payload, payload, payload_len); 1711 } 1712 1713 static int mlxsw_core_reg_access(struct mlxsw_core *mlxsw_core, 1714 const struct mlxsw_reg_info *reg, 1715 char *payload, 1716 enum mlxsw_core_reg_access_type type) 1717 { 1718 LIST_HEAD(bulk_list); 1719 int err; 1720 1721 /* During initialization EMAD interface is not available to us, 1722 * so we default to command interface. We switch to EMAD interface 1723 * after setting the appropriate traps. 1724 */ 1725 if (!mlxsw_core->emad.use_emad) 1726 return mlxsw_core_reg_access_cmd(mlxsw_core, reg, 1727 payload, type); 1728 1729 err = mlxsw_core_reg_access_emad(mlxsw_core, reg, 1730 payload, type, &bulk_list, 1731 mlxsw_core_reg_access_cb, 1732 (unsigned long) payload); 1733 if (err) 1734 return err; 1735 return mlxsw_reg_trans_bulk_wait(&bulk_list); 1736 } 1737 1738 int mlxsw_reg_query(struct mlxsw_core *mlxsw_core, 1739 const struct mlxsw_reg_info *reg, char *payload) 1740 { 1741 return mlxsw_core_reg_access(mlxsw_core, reg, payload, 1742 MLXSW_CORE_REG_ACCESS_TYPE_QUERY); 1743 } 1744 EXPORT_SYMBOL(mlxsw_reg_query); 1745 1746 int mlxsw_reg_write(struct mlxsw_core *mlxsw_core, 1747 const struct mlxsw_reg_info *reg, char *payload) 1748 { 1749 return mlxsw_core_reg_access(mlxsw_core, reg, payload, 1750 MLXSW_CORE_REG_ACCESS_TYPE_WRITE); 1751 } 1752 EXPORT_SYMBOL(mlxsw_reg_write); 1753 1754 void mlxsw_core_skb_receive(struct mlxsw_core *mlxsw_core, struct sk_buff *skb, 1755 struct mlxsw_rx_info *rx_info) 1756 { 1757 struct mlxsw_rx_listener_item *rxl_item; 1758 const struct mlxsw_rx_listener *rxl; 1759 u8 local_port; 1760 bool found = false; 1761 1762 if (rx_info->is_lag) { 1763 dev_dbg_ratelimited(mlxsw_core->bus_info->dev, "%s: lag_id = %d, lag_port_index = 0x%x\n", 1764 __func__, rx_info->u.lag_id, 1765 rx_info->trap_id); 1766 /* Upper layer does not care if the skb came from LAG or not, 1767 * so just get the local_port for the lag port and push it up. 1768 */ 1769 local_port = mlxsw_core_lag_mapping_get(mlxsw_core, 1770 rx_info->u.lag_id, 1771 rx_info->lag_port_index); 1772 } else { 1773 local_port = rx_info->u.sys_port; 1774 } 1775 1776 dev_dbg_ratelimited(mlxsw_core->bus_info->dev, "%s: local_port = %d, trap_id = 0x%x\n", 1777 __func__, local_port, rx_info->trap_id); 1778 1779 if ((rx_info->trap_id >= MLXSW_TRAP_ID_MAX) || 1780 (local_port >= mlxsw_core->max_ports)) 1781 goto drop; 1782 1783 rcu_read_lock(); 1784 list_for_each_entry_rcu(rxl_item, &mlxsw_core->rx_listener_list, list) { 1785 rxl = &rxl_item->rxl; 1786 if ((rxl->local_port == MLXSW_PORT_DONT_CARE || 1787 rxl->local_port == local_port) && 1788 rxl->trap_id == rx_info->trap_id) { 1789 found = true; 1790 break; 1791 } 1792 } 1793 rcu_read_unlock(); 1794 if (!found) 1795 goto drop; 1796 1797 rxl->func(skb, local_port, rxl_item->priv); 1798 return; 1799 1800 drop: 1801 dev_kfree_skb(skb); 1802 } 1803 EXPORT_SYMBOL(mlxsw_core_skb_receive); 1804 1805 static int mlxsw_core_lag_mapping_index(struct mlxsw_core *mlxsw_core, 1806 u16 lag_id, u8 port_index) 1807 { 1808 return MLXSW_CORE_RES_GET(mlxsw_core, MAX_LAG_MEMBERS) * lag_id + 1809 port_index; 1810 } 1811 1812 void mlxsw_core_lag_mapping_set(struct mlxsw_core *mlxsw_core, 1813 u16 lag_id, u8 port_index, u8 local_port) 1814 { 1815 int index = mlxsw_core_lag_mapping_index(mlxsw_core, 1816 lag_id, port_index); 1817 1818 mlxsw_core->lag.mapping[index] = local_port; 1819 } 1820 EXPORT_SYMBOL(mlxsw_core_lag_mapping_set); 1821 1822 u8 mlxsw_core_lag_mapping_get(struct mlxsw_core *mlxsw_core, 1823 u16 lag_id, u8 port_index) 1824 { 1825 int index = mlxsw_core_lag_mapping_index(mlxsw_core, 1826 lag_id, port_index); 1827 1828 return mlxsw_core->lag.mapping[index]; 1829 } 1830 EXPORT_SYMBOL(mlxsw_core_lag_mapping_get); 1831 1832 void mlxsw_core_lag_mapping_clear(struct mlxsw_core *mlxsw_core, 1833 u16 lag_id, u8 local_port) 1834 { 1835 int i; 1836 1837 for (i = 0; i < MLXSW_CORE_RES_GET(mlxsw_core, MAX_LAG_MEMBERS); i++) { 1838 int index = mlxsw_core_lag_mapping_index(mlxsw_core, 1839 lag_id, i); 1840 1841 if (mlxsw_core->lag.mapping[index] == local_port) 1842 mlxsw_core->lag.mapping[index] = 0; 1843 } 1844 } 1845 EXPORT_SYMBOL(mlxsw_core_lag_mapping_clear); 1846 1847 bool mlxsw_core_res_valid(struct mlxsw_core *mlxsw_core, 1848 enum mlxsw_res_id res_id) 1849 { 1850 return mlxsw_res_valid(&mlxsw_core->res, res_id); 1851 } 1852 EXPORT_SYMBOL(mlxsw_core_res_valid); 1853 1854 u64 mlxsw_core_res_get(struct mlxsw_core *mlxsw_core, 1855 enum mlxsw_res_id res_id) 1856 { 1857 return mlxsw_res_get(&mlxsw_core->res, res_id); 1858 } 1859 EXPORT_SYMBOL(mlxsw_core_res_get); 1860 1861 int mlxsw_core_port_init(struct mlxsw_core *mlxsw_core, u8 local_port, 1862 u32 port_number, bool split, 1863 u32 split_port_subnumber, 1864 const unsigned char *switch_id, 1865 unsigned char switch_id_len) 1866 { 1867 struct devlink *devlink = priv_to_devlink(mlxsw_core); 1868 struct mlxsw_core_port *mlxsw_core_port = 1869 &mlxsw_core->ports[local_port]; 1870 struct devlink_port *devlink_port = &mlxsw_core_port->devlink_port; 1871 int err; 1872 1873 mlxsw_core_port->local_port = local_port; 1874 devlink_port_attrs_set(devlink_port, DEVLINK_PORT_FLAVOUR_PHYSICAL, 1875 port_number, split, split_port_subnumber, 1876 switch_id, switch_id_len); 1877 err = devlink_port_register(devlink, devlink_port, local_port); 1878 if (err) 1879 memset(mlxsw_core_port, 0, sizeof(*mlxsw_core_port)); 1880 return err; 1881 } 1882 EXPORT_SYMBOL(mlxsw_core_port_init); 1883 1884 void mlxsw_core_port_fini(struct mlxsw_core *mlxsw_core, u8 local_port) 1885 { 1886 struct mlxsw_core_port *mlxsw_core_port = 1887 &mlxsw_core->ports[local_port]; 1888 struct devlink_port *devlink_port = &mlxsw_core_port->devlink_port; 1889 1890 devlink_port_unregister(devlink_port); 1891 memset(mlxsw_core_port, 0, sizeof(*mlxsw_core_port)); 1892 } 1893 EXPORT_SYMBOL(mlxsw_core_port_fini); 1894 1895 void mlxsw_core_port_eth_set(struct mlxsw_core *mlxsw_core, u8 local_port, 1896 void *port_driver_priv, struct net_device *dev) 1897 { 1898 struct mlxsw_core_port *mlxsw_core_port = 1899 &mlxsw_core->ports[local_port]; 1900 struct devlink_port *devlink_port = &mlxsw_core_port->devlink_port; 1901 1902 mlxsw_core_port->port_driver_priv = port_driver_priv; 1903 devlink_port_type_eth_set(devlink_port, dev); 1904 } 1905 EXPORT_SYMBOL(mlxsw_core_port_eth_set); 1906 1907 void mlxsw_core_port_ib_set(struct mlxsw_core *mlxsw_core, u8 local_port, 1908 void *port_driver_priv) 1909 { 1910 struct mlxsw_core_port *mlxsw_core_port = 1911 &mlxsw_core->ports[local_port]; 1912 struct devlink_port *devlink_port = &mlxsw_core_port->devlink_port; 1913 1914 mlxsw_core_port->port_driver_priv = port_driver_priv; 1915 devlink_port_type_ib_set(devlink_port, NULL); 1916 } 1917 EXPORT_SYMBOL(mlxsw_core_port_ib_set); 1918 1919 void mlxsw_core_port_clear(struct mlxsw_core *mlxsw_core, u8 local_port, 1920 void *port_driver_priv) 1921 { 1922 struct mlxsw_core_port *mlxsw_core_port = 1923 &mlxsw_core->ports[local_port]; 1924 struct devlink_port *devlink_port = &mlxsw_core_port->devlink_port; 1925 1926 mlxsw_core_port->port_driver_priv = port_driver_priv; 1927 devlink_port_type_clear(devlink_port); 1928 } 1929 EXPORT_SYMBOL(mlxsw_core_port_clear); 1930 1931 enum devlink_port_type mlxsw_core_port_type_get(struct mlxsw_core *mlxsw_core, 1932 u8 local_port) 1933 { 1934 struct mlxsw_core_port *mlxsw_core_port = 1935 &mlxsw_core->ports[local_port]; 1936 struct devlink_port *devlink_port = &mlxsw_core_port->devlink_port; 1937 1938 return devlink_port->type; 1939 } 1940 EXPORT_SYMBOL(mlxsw_core_port_type_get); 1941 1942 1943 struct devlink_port * 1944 mlxsw_core_port_devlink_port_get(struct mlxsw_core *mlxsw_core, 1945 u8 local_port) 1946 { 1947 struct mlxsw_core_port *mlxsw_core_port = 1948 &mlxsw_core->ports[local_port]; 1949 struct devlink_port *devlink_port = &mlxsw_core_port->devlink_port; 1950 1951 return devlink_port; 1952 } 1953 EXPORT_SYMBOL(mlxsw_core_port_devlink_port_get); 1954 1955 static void mlxsw_core_buf_dump_dbg(struct mlxsw_core *mlxsw_core, 1956 const char *buf, size_t size) 1957 { 1958 __be32 *m = (__be32 *) buf; 1959 int i; 1960 int count = size / sizeof(__be32); 1961 1962 for (i = count - 1; i >= 0; i--) 1963 if (m[i]) 1964 break; 1965 i++; 1966 count = i ? i : 1; 1967 for (i = 0; i < count; i += 4) 1968 dev_dbg(mlxsw_core->bus_info->dev, "%04x - %08x %08x %08x %08x\n", 1969 i * 4, be32_to_cpu(m[i]), be32_to_cpu(m[i + 1]), 1970 be32_to_cpu(m[i + 2]), be32_to_cpu(m[i + 3])); 1971 } 1972 1973 int mlxsw_cmd_exec(struct mlxsw_core *mlxsw_core, u16 opcode, u8 opcode_mod, 1974 u32 in_mod, bool out_mbox_direct, bool reset_ok, 1975 char *in_mbox, size_t in_mbox_size, 1976 char *out_mbox, size_t out_mbox_size) 1977 { 1978 u8 status; 1979 int err; 1980 1981 BUG_ON(in_mbox_size % sizeof(u32) || out_mbox_size % sizeof(u32)); 1982 if (!mlxsw_core->bus->cmd_exec) 1983 return -EOPNOTSUPP; 1984 1985 dev_dbg(mlxsw_core->bus_info->dev, "Cmd exec (opcode=%x(%s),opcode_mod=%x,in_mod=%x)\n", 1986 opcode, mlxsw_cmd_opcode_str(opcode), opcode_mod, in_mod); 1987 if (in_mbox) { 1988 dev_dbg(mlxsw_core->bus_info->dev, "Input mailbox:\n"); 1989 mlxsw_core_buf_dump_dbg(mlxsw_core, in_mbox, in_mbox_size); 1990 } 1991 1992 err = mlxsw_core->bus->cmd_exec(mlxsw_core->bus_priv, opcode, 1993 opcode_mod, in_mod, out_mbox_direct, 1994 in_mbox, in_mbox_size, 1995 out_mbox, out_mbox_size, &status); 1996 1997 if (!err && out_mbox) { 1998 dev_dbg(mlxsw_core->bus_info->dev, "Output mailbox:\n"); 1999 mlxsw_core_buf_dump_dbg(mlxsw_core, out_mbox, out_mbox_size); 2000 } 2001 2002 if (reset_ok && err == -EIO && 2003 status == MLXSW_CMD_STATUS_RUNNING_RESET) { 2004 err = 0; 2005 } else if (err == -EIO && status != MLXSW_CMD_STATUS_OK) { 2006 dev_err(mlxsw_core->bus_info->dev, "Cmd exec failed (opcode=%x(%s),opcode_mod=%x,in_mod=%x,status=%x(%s))\n", 2007 opcode, mlxsw_cmd_opcode_str(opcode), opcode_mod, 2008 in_mod, status, mlxsw_cmd_status_str(status)); 2009 } else if (err == -ETIMEDOUT) { 2010 dev_err(mlxsw_core->bus_info->dev, "Cmd exec timed-out (opcode=%x(%s),opcode_mod=%x,in_mod=%x)\n", 2011 opcode, mlxsw_cmd_opcode_str(opcode), opcode_mod, 2012 in_mod); 2013 } 2014 2015 return err; 2016 } 2017 EXPORT_SYMBOL(mlxsw_cmd_exec); 2018 2019 int mlxsw_core_schedule_dw(struct delayed_work *dwork, unsigned long delay) 2020 { 2021 return queue_delayed_work(mlxsw_wq, dwork, delay); 2022 } 2023 EXPORT_SYMBOL(mlxsw_core_schedule_dw); 2024 2025 bool mlxsw_core_schedule_work(struct work_struct *work) 2026 { 2027 return queue_work(mlxsw_owq, work); 2028 } 2029 EXPORT_SYMBOL(mlxsw_core_schedule_work); 2030 2031 void mlxsw_core_flush_owq(void) 2032 { 2033 flush_workqueue(mlxsw_owq); 2034 } 2035 EXPORT_SYMBOL(mlxsw_core_flush_owq); 2036 2037 int mlxsw_core_kvd_sizes_get(struct mlxsw_core *mlxsw_core, 2038 const struct mlxsw_config_profile *profile, 2039 u64 *p_single_size, u64 *p_double_size, 2040 u64 *p_linear_size) 2041 { 2042 struct mlxsw_driver *driver = mlxsw_core->driver; 2043 2044 if (!driver->kvd_sizes_get) 2045 return -EINVAL; 2046 2047 return driver->kvd_sizes_get(mlxsw_core, profile, 2048 p_single_size, p_double_size, 2049 p_linear_size); 2050 } 2051 EXPORT_SYMBOL(mlxsw_core_kvd_sizes_get); 2052 2053 void mlxsw_core_fw_flash_start(struct mlxsw_core *mlxsw_core) 2054 { 2055 mlxsw_core->fw_flash_in_progress = true; 2056 } 2057 EXPORT_SYMBOL(mlxsw_core_fw_flash_start); 2058 2059 void mlxsw_core_fw_flash_end(struct mlxsw_core *mlxsw_core) 2060 { 2061 mlxsw_core->fw_flash_in_progress = false; 2062 } 2063 EXPORT_SYMBOL(mlxsw_core_fw_flash_end); 2064 2065 int mlxsw_core_resources_query(struct mlxsw_core *mlxsw_core, char *mbox, 2066 struct mlxsw_res *res) 2067 { 2068 int index, i; 2069 u64 data; 2070 u16 id; 2071 int err; 2072 2073 if (!res) 2074 return 0; 2075 2076 mlxsw_cmd_mbox_zero(mbox); 2077 2078 for (index = 0; index < MLXSW_CMD_QUERY_RESOURCES_MAX_QUERIES; 2079 index++) { 2080 err = mlxsw_cmd_query_resources(mlxsw_core, mbox, index); 2081 if (err) 2082 return err; 2083 2084 for (i = 0; i < MLXSW_CMD_QUERY_RESOURCES_PER_QUERY; i++) { 2085 id = mlxsw_cmd_mbox_query_resource_id_get(mbox, i); 2086 data = mlxsw_cmd_mbox_query_resource_data_get(mbox, i); 2087 2088 if (id == MLXSW_CMD_QUERY_RESOURCES_TABLE_END_ID) 2089 return 0; 2090 2091 mlxsw_res_parse(res, id, data); 2092 } 2093 } 2094 2095 /* If after MLXSW_RESOURCES_QUERY_MAX_QUERIES we still didn't get 2096 * MLXSW_RESOURCES_TABLE_END_ID, something went bad in the FW. 2097 */ 2098 return -EIO; 2099 } 2100 EXPORT_SYMBOL(mlxsw_core_resources_query); 2101 2102 u32 mlxsw_core_read_frc_h(struct mlxsw_core *mlxsw_core) 2103 { 2104 return mlxsw_core->bus->read_frc_h(mlxsw_core->bus_priv); 2105 } 2106 EXPORT_SYMBOL(mlxsw_core_read_frc_h); 2107 2108 u32 mlxsw_core_read_frc_l(struct mlxsw_core *mlxsw_core) 2109 { 2110 return mlxsw_core->bus->read_frc_l(mlxsw_core->bus_priv); 2111 } 2112 EXPORT_SYMBOL(mlxsw_core_read_frc_l); 2113 2114 static int __init mlxsw_core_module_init(void) 2115 { 2116 int err; 2117 2118 mlxsw_wq = alloc_workqueue(mlxsw_core_driver_name, 0, 0); 2119 if (!mlxsw_wq) 2120 return -ENOMEM; 2121 mlxsw_owq = alloc_ordered_workqueue("%s_ordered", 0, 2122 mlxsw_core_driver_name); 2123 if (!mlxsw_owq) { 2124 err = -ENOMEM; 2125 goto err_alloc_ordered_workqueue; 2126 } 2127 return 0; 2128 2129 err_alloc_ordered_workqueue: 2130 destroy_workqueue(mlxsw_wq); 2131 return err; 2132 } 2133 2134 static void __exit mlxsw_core_module_exit(void) 2135 { 2136 destroy_workqueue(mlxsw_owq); 2137 destroy_workqueue(mlxsw_wq); 2138 } 2139 2140 module_init(mlxsw_core_module_init); 2141 module_exit(mlxsw_core_module_exit); 2142 2143 MODULE_LICENSE("Dual BSD/GPL"); 2144 MODULE_AUTHOR("Jiri Pirko <jiri@mellanox.com>"); 2145 MODULE_DESCRIPTION("Mellanox switch device core driver"); 2146