1 // SPDX-License-Identifier: BSD-3-Clause OR GPL-2.0 2 /* Copyright (c) 2015-2018 Mellanox Technologies. All rights reserved */ 3 4 #include <linux/kernel.h> 5 #include <linux/module.h> 6 #include <linux/device.h> 7 #include <linux/export.h> 8 #include <linux/err.h> 9 #include <linux/if_link.h> 10 #include <linux/netdevice.h> 11 #include <linux/completion.h> 12 #include <linux/skbuff.h> 13 #include <linux/etherdevice.h> 14 #include <linux/types.h> 15 #include <linux/string.h> 16 #include <linux/gfp.h> 17 #include <linux/random.h> 18 #include <linux/jiffies.h> 19 #include <linux/mutex.h> 20 #include <linux/rcupdate.h> 21 #include <linux/slab.h> 22 #include <linux/workqueue.h> 23 #include <linux/firmware.h> 24 #include <asm/byteorder.h> 25 #include <net/devlink.h> 26 #include <trace/events/devlink.h> 27 28 #include "core.h" 29 #include "core_env.h" 30 #include "item.h" 31 #include "cmd.h" 32 #include "port.h" 33 #include "trap.h" 34 #include "emad.h" 35 #include "reg.h" 36 #include "resources.h" 37 #include "../mlxfw/mlxfw.h" 38 39 static LIST_HEAD(mlxsw_core_driver_list); 40 static DEFINE_SPINLOCK(mlxsw_core_driver_list_lock); 41 42 static const char mlxsw_core_driver_name[] = "mlxsw_core"; 43 44 static struct workqueue_struct *mlxsw_wq; 45 static struct workqueue_struct *mlxsw_owq; 46 47 struct mlxsw_core_port { 48 struct devlink_port devlink_port; 49 void *port_driver_priv; 50 u8 local_port; 51 }; 52 53 void *mlxsw_core_port_driver_priv(struct mlxsw_core_port *mlxsw_core_port) 54 { 55 return mlxsw_core_port->port_driver_priv; 56 } 57 EXPORT_SYMBOL(mlxsw_core_port_driver_priv); 58 59 static bool mlxsw_core_port_check(struct mlxsw_core_port *mlxsw_core_port) 60 { 61 return mlxsw_core_port->port_driver_priv != NULL; 62 } 63 64 struct mlxsw_core { 65 struct mlxsw_driver *driver; 66 const struct mlxsw_bus *bus; 67 void *bus_priv; 68 const struct mlxsw_bus_info *bus_info; 69 struct workqueue_struct *emad_wq; 70 struct list_head rx_listener_list; 71 struct list_head event_listener_list; 72 struct { 73 atomic64_t tid; 74 struct list_head trans_list; 75 spinlock_t trans_list_lock; /* protects trans_list writes */ 76 bool use_emad; 77 bool enable_string_tlv; 78 } emad; 79 struct { 80 u8 *mapping; /* lag_id+port_index to local_port mapping */ 81 } lag; 82 struct mlxsw_res res; 83 struct mlxsw_hwmon *hwmon; 84 struct mlxsw_thermal *thermal; 85 struct mlxsw_core_port *ports; 86 unsigned int max_ports; 87 bool fw_flash_in_progress; 88 struct { 89 struct devlink_health_reporter *fw_fatal; 90 } health; 91 struct mlxsw_env *env; 92 bool is_initialized; /* Denotes if core was already initialized. */ 93 unsigned long driver_priv[]; 94 /* driver_priv has to be always the last item */ 95 }; 96 97 #define MLXSW_PORT_MAX_PORTS_DEFAULT 0x40 98 99 static int mlxsw_ports_init(struct mlxsw_core *mlxsw_core) 100 { 101 /* Switch ports are numbered from 1 to queried value */ 102 if (MLXSW_CORE_RES_VALID(mlxsw_core, MAX_SYSTEM_PORT)) 103 mlxsw_core->max_ports = MLXSW_CORE_RES_GET(mlxsw_core, 104 MAX_SYSTEM_PORT) + 1; 105 else 106 mlxsw_core->max_ports = MLXSW_PORT_MAX_PORTS_DEFAULT + 1; 107 108 mlxsw_core->ports = kcalloc(mlxsw_core->max_ports, 109 sizeof(struct mlxsw_core_port), GFP_KERNEL); 110 if (!mlxsw_core->ports) 111 return -ENOMEM; 112 113 return 0; 114 } 115 116 static void mlxsw_ports_fini(struct mlxsw_core *mlxsw_core) 117 { 118 kfree(mlxsw_core->ports); 119 } 120 121 unsigned int mlxsw_core_max_ports(const struct mlxsw_core *mlxsw_core) 122 { 123 return mlxsw_core->max_ports; 124 } 125 EXPORT_SYMBOL(mlxsw_core_max_ports); 126 127 void *mlxsw_core_driver_priv(struct mlxsw_core *mlxsw_core) 128 { 129 return mlxsw_core->driver_priv; 130 } 131 EXPORT_SYMBOL(mlxsw_core_driver_priv); 132 133 bool mlxsw_core_res_query_enabled(const struct mlxsw_core *mlxsw_core) 134 { 135 return mlxsw_core->driver->res_query_enabled; 136 } 137 EXPORT_SYMBOL(mlxsw_core_res_query_enabled); 138 139 bool mlxsw_core_temp_warn_enabled(const struct mlxsw_core *mlxsw_core) 140 { 141 return mlxsw_core->driver->temp_warn_enabled; 142 } 143 144 bool 145 mlxsw_core_fw_rev_minor_subminor_validate(const struct mlxsw_fw_rev *rev, 146 const struct mlxsw_fw_rev *req_rev) 147 { 148 return rev->minor > req_rev->minor || 149 (rev->minor == req_rev->minor && 150 rev->subminor >= req_rev->subminor); 151 } 152 EXPORT_SYMBOL(mlxsw_core_fw_rev_minor_subminor_validate); 153 154 struct mlxsw_rx_listener_item { 155 struct list_head list; 156 struct mlxsw_rx_listener rxl; 157 void *priv; 158 bool enabled; 159 }; 160 161 struct mlxsw_event_listener_item { 162 struct list_head list; 163 struct mlxsw_event_listener el; 164 void *priv; 165 }; 166 167 /****************** 168 * EMAD processing 169 ******************/ 170 171 /* emad_eth_hdr_dmac 172 * Destination MAC in EMAD's Ethernet header. 173 * Must be set to 01:02:c9:00:00:01 174 */ 175 MLXSW_ITEM_BUF(emad, eth_hdr, dmac, 0x00, 6); 176 177 /* emad_eth_hdr_smac 178 * Source MAC in EMAD's Ethernet header. 179 * Must be set to 00:02:c9:01:02:03 180 */ 181 MLXSW_ITEM_BUF(emad, eth_hdr, smac, 0x06, 6); 182 183 /* emad_eth_hdr_ethertype 184 * Ethertype in EMAD's Ethernet header. 185 * Must be set to 0x8932 186 */ 187 MLXSW_ITEM32(emad, eth_hdr, ethertype, 0x0C, 16, 16); 188 189 /* emad_eth_hdr_mlx_proto 190 * Mellanox protocol. 191 * Must be set to 0x0. 192 */ 193 MLXSW_ITEM32(emad, eth_hdr, mlx_proto, 0x0C, 8, 8); 194 195 /* emad_eth_hdr_ver 196 * Mellanox protocol version. 197 * Must be set to 0x0. 198 */ 199 MLXSW_ITEM32(emad, eth_hdr, ver, 0x0C, 4, 4); 200 201 /* emad_op_tlv_type 202 * Type of the TLV. 203 * Must be set to 0x1 (operation TLV). 204 */ 205 MLXSW_ITEM32(emad, op_tlv, type, 0x00, 27, 5); 206 207 /* emad_op_tlv_len 208 * Length of the operation TLV in u32. 209 * Must be set to 0x4. 210 */ 211 MLXSW_ITEM32(emad, op_tlv, len, 0x00, 16, 11); 212 213 /* emad_op_tlv_dr 214 * Direct route bit. Setting to 1 indicates the EMAD is a direct route 215 * EMAD. DR TLV must follow. 216 * 217 * Note: Currently not supported and must not be set. 218 */ 219 MLXSW_ITEM32(emad, op_tlv, dr, 0x00, 15, 1); 220 221 /* emad_op_tlv_status 222 * Returned status in case of EMAD response. Must be set to 0 in case 223 * of EMAD request. 224 * 0x0 - success 225 * 0x1 - device is busy. Requester should retry 226 * 0x2 - Mellanox protocol version not supported 227 * 0x3 - unknown TLV 228 * 0x4 - register not supported 229 * 0x5 - operation class not supported 230 * 0x6 - EMAD method not supported 231 * 0x7 - bad parameter (e.g. port out of range) 232 * 0x8 - resource not available 233 * 0x9 - message receipt acknowledgment. Requester should retry 234 * 0x70 - internal error 235 */ 236 MLXSW_ITEM32(emad, op_tlv, status, 0x00, 8, 7); 237 238 /* emad_op_tlv_register_id 239 * Register ID of register within register TLV. 240 */ 241 MLXSW_ITEM32(emad, op_tlv, register_id, 0x04, 16, 16); 242 243 /* emad_op_tlv_r 244 * Response bit. Setting to 1 indicates Response, otherwise request. 245 */ 246 MLXSW_ITEM32(emad, op_tlv, r, 0x04, 15, 1); 247 248 /* emad_op_tlv_method 249 * EMAD method type. 250 * 0x1 - query 251 * 0x2 - write 252 * 0x3 - send (currently not supported) 253 * 0x4 - event 254 */ 255 MLXSW_ITEM32(emad, op_tlv, method, 0x04, 8, 7); 256 257 /* emad_op_tlv_class 258 * EMAD operation class. Must be set to 0x1 (REG_ACCESS). 259 */ 260 MLXSW_ITEM32(emad, op_tlv, class, 0x04, 0, 8); 261 262 /* emad_op_tlv_tid 263 * EMAD transaction ID. Used for pairing request and response EMADs. 264 */ 265 MLXSW_ITEM64(emad, op_tlv, tid, 0x08, 0, 64); 266 267 /* emad_string_tlv_type 268 * Type of the TLV. 269 * Must be set to 0x2 (string TLV). 270 */ 271 MLXSW_ITEM32(emad, string_tlv, type, 0x00, 27, 5); 272 273 /* emad_string_tlv_len 274 * Length of the string TLV in u32. 275 */ 276 MLXSW_ITEM32(emad, string_tlv, len, 0x00, 16, 11); 277 278 #define MLXSW_EMAD_STRING_TLV_STRING_LEN 128 279 280 /* emad_string_tlv_string 281 * String provided by the device's firmware in case of erroneous register access 282 */ 283 MLXSW_ITEM_BUF(emad, string_tlv, string, 0x04, 284 MLXSW_EMAD_STRING_TLV_STRING_LEN); 285 286 /* emad_reg_tlv_type 287 * Type of the TLV. 288 * Must be set to 0x3 (register TLV). 289 */ 290 MLXSW_ITEM32(emad, reg_tlv, type, 0x00, 27, 5); 291 292 /* emad_reg_tlv_len 293 * Length of the operation TLV in u32. 294 */ 295 MLXSW_ITEM32(emad, reg_tlv, len, 0x00, 16, 11); 296 297 /* emad_end_tlv_type 298 * Type of the TLV. 299 * Must be set to 0x0 (end TLV). 300 */ 301 MLXSW_ITEM32(emad, end_tlv, type, 0x00, 27, 5); 302 303 /* emad_end_tlv_len 304 * Length of the end TLV in u32. 305 * Must be set to 1. 306 */ 307 MLXSW_ITEM32(emad, end_tlv, len, 0x00, 16, 11); 308 309 enum mlxsw_core_reg_access_type { 310 MLXSW_CORE_REG_ACCESS_TYPE_QUERY, 311 MLXSW_CORE_REG_ACCESS_TYPE_WRITE, 312 }; 313 314 static inline const char * 315 mlxsw_core_reg_access_type_str(enum mlxsw_core_reg_access_type type) 316 { 317 switch (type) { 318 case MLXSW_CORE_REG_ACCESS_TYPE_QUERY: 319 return "query"; 320 case MLXSW_CORE_REG_ACCESS_TYPE_WRITE: 321 return "write"; 322 } 323 BUG(); 324 } 325 326 static void mlxsw_emad_pack_end_tlv(char *end_tlv) 327 { 328 mlxsw_emad_end_tlv_type_set(end_tlv, MLXSW_EMAD_TLV_TYPE_END); 329 mlxsw_emad_end_tlv_len_set(end_tlv, MLXSW_EMAD_END_TLV_LEN); 330 } 331 332 static void mlxsw_emad_pack_reg_tlv(char *reg_tlv, 333 const struct mlxsw_reg_info *reg, 334 char *payload) 335 { 336 mlxsw_emad_reg_tlv_type_set(reg_tlv, MLXSW_EMAD_TLV_TYPE_REG); 337 mlxsw_emad_reg_tlv_len_set(reg_tlv, reg->len / sizeof(u32) + 1); 338 memcpy(reg_tlv + sizeof(u32), payload, reg->len); 339 } 340 341 static void mlxsw_emad_pack_string_tlv(char *string_tlv) 342 { 343 mlxsw_emad_string_tlv_type_set(string_tlv, MLXSW_EMAD_TLV_TYPE_STRING); 344 mlxsw_emad_string_tlv_len_set(string_tlv, MLXSW_EMAD_STRING_TLV_LEN); 345 } 346 347 static void mlxsw_emad_pack_op_tlv(char *op_tlv, 348 const struct mlxsw_reg_info *reg, 349 enum mlxsw_core_reg_access_type type, 350 u64 tid) 351 { 352 mlxsw_emad_op_tlv_type_set(op_tlv, MLXSW_EMAD_TLV_TYPE_OP); 353 mlxsw_emad_op_tlv_len_set(op_tlv, MLXSW_EMAD_OP_TLV_LEN); 354 mlxsw_emad_op_tlv_dr_set(op_tlv, 0); 355 mlxsw_emad_op_tlv_status_set(op_tlv, 0); 356 mlxsw_emad_op_tlv_register_id_set(op_tlv, reg->id); 357 mlxsw_emad_op_tlv_r_set(op_tlv, MLXSW_EMAD_OP_TLV_REQUEST); 358 if (type == MLXSW_CORE_REG_ACCESS_TYPE_QUERY) 359 mlxsw_emad_op_tlv_method_set(op_tlv, 360 MLXSW_EMAD_OP_TLV_METHOD_QUERY); 361 else 362 mlxsw_emad_op_tlv_method_set(op_tlv, 363 MLXSW_EMAD_OP_TLV_METHOD_WRITE); 364 mlxsw_emad_op_tlv_class_set(op_tlv, 365 MLXSW_EMAD_OP_TLV_CLASS_REG_ACCESS); 366 mlxsw_emad_op_tlv_tid_set(op_tlv, tid); 367 } 368 369 static int mlxsw_emad_construct_eth_hdr(struct sk_buff *skb) 370 { 371 char *eth_hdr = skb_push(skb, MLXSW_EMAD_ETH_HDR_LEN); 372 373 mlxsw_emad_eth_hdr_dmac_memcpy_to(eth_hdr, MLXSW_EMAD_EH_DMAC); 374 mlxsw_emad_eth_hdr_smac_memcpy_to(eth_hdr, MLXSW_EMAD_EH_SMAC); 375 mlxsw_emad_eth_hdr_ethertype_set(eth_hdr, MLXSW_EMAD_EH_ETHERTYPE); 376 mlxsw_emad_eth_hdr_mlx_proto_set(eth_hdr, MLXSW_EMAD_EH_MLX_PROTO); 377 mlxsw_emad_eth_hdr_ver_set(eth_hdr, MLXSW_EMAD_EH_PROTO_VERSION); 378 379 skb_reset_mac_header(skb); 380 381 return 0; 382 } 383 384 static void mlxsw_emad_construct(struct sk_buff *skb, 385 const struct mlxsw_reg_info *reg, 386 char *payload, 387 enum mlxsw_core_reg_access_type type, 388 u64 tid, bool enable_string_tlv) 389 { 390 char *buf; 391 392 buf = skb_push(skb, MLXSW_EMAD_END_TLV_LEN * sizeof(u32)); 393 mlxsw_emad_pack_end_tlv(buf); 394 395 buf = skb_push(skb, reg->len + sizeof(u32)); 396 mlxsw_emad_pack_reg_tlv(buf, reg, payload); 397 398 if (enable_string_tlv) { 399 buf = skb_push(skb, MLXSW_EMAD_STRING_TLV_LEN * sizeof(u32)); 400 mlxsw_emad_pack_string_tlv(buf); 401 } 402 403 buf = skb_push(skb, MLXSW_EMAD_OP_TLV_LEN * sizeof(u32)); 404 mlxsw_emad_pack_op_tlv(buf, reg, type, tid); 405 406 mlxsw_emad_construct_eth_hdr(skb); 407 } 408 409 struct mlxsw_emad_tlv_offsets { 410 u16 op_tlv; 411 u16 string_tlv; 412 u16 reg_tlv; 413 }; 414 415 static bool mlxsw_emad_tlv_is_string_tlv(const char *tlv) 416 { 417 u8 tlv_type = mlxsw_emad_string_tlv_type_get(tlv); 418 419 return tlv_type == MLXSW_EMAD_TLV_TYPE_STRING; 420 } 421 422 static void mlxsw_emad_tlv_parse(struct sk_buff *skb) 423 { 424 struct mlxsw_emad_tlv_offsets *offsets = 425 (struct mlxsw_emad_tlv_offsets *) skb->cb; 426 427 offsets->op_tlv = MLXSW_EMAD_ETH_HDR_LEN; 428 offsets->string_tlv = 0; 429 offsets->reg_tlv = MLXSW_EMAD_ETH_HDR_LEN + 430 MLXSW_EMAD_OP_TLV_LEN * sizeof(u32); 431 432 /* If string TLV is present, it must come after the operation TLV. */ 433 if (mlxsw_emad_tlv_is_string_tlv(skb->data + offsets->reg_tlv)) { 434 offsets->string_tlv = offsets->reg_tlv; 435 offsets->reg_tlv += MLXSW_EMAD_STRING_TLV_LEN * sizeof(u32); 436 } 437 } 438 439 static char *mlxsw_emad_op_tlv(const struct sk_buff *skb) 440 { 441 struct mlxsw_emad_tlv_offsets *offsets = 442 (struct mlxsw_emad_tlv_offsets *) skb->cb; 443 444 return ((char *) (skb->data + offsets->op_tlv)); 445 } 446 447 static char *mlxsw_emad_string_tlv(const struct sk_buff *skb) 448 { 449 struct mlxsw_emad_tlv_offsets *offsets = 450 (struct mlxsw_emad_tlv_offsets *) skb->cb; 451 452 if (!offsets->string_tlv) 453 return NULL; 454 455 return ((char *) (skb->data + offsets->string_tlv)); 456 } 457 458 static char *mlxsw_emad_reg_tlv(const struct sk_buff *skb) 459 { 460 struct mlxsw_emad_tlv_offsets *offsets = 461 (struct mlxsw_emad_tlv_offsets *) skb->cb; 462 463 return ((char *) (skb->data + offsets->reg_tlv)); 464 } 465 466 static char *mlxsw_emad_reg_payload(const char *reg_tlv) 467 { 468 return ((char *) (reg_tlv + sizeof(u32))); 469 } 470 471 static char *mlxsw_emad_reg_payload_cmd(const char *mbox) 472 { 473 return ((char *) (mbox + (MLXSW_EMAD_OP_TLV_LEN + 1) * sizeof(u32))); 474 } 475 476 static u64 mlxsw_emad_get_tid(const struct sk_buff *skb) 477 { 478 char *op_tlv; 479 480 op_tlv = mlxsw_emad_op_tlv(skb); 481 return mlxsw_emad_op_tlv_tid_get(op_tlv); 482 } 483 484 static bool mlxsw_emad_is_resp(const struct sk_buff *skb) 485 { 486 char *op_tlv; 487 488 op_tlv = mlxsw_emad_op_tlv(skb); 489 return (mlxsw_emad_op_tlv_r_get(op_tlv) == MLXSW_EMAD_OP_TLV_RESPONSE); 490 } 491 492 static int mlxsw_emad_process_status(char *op_tlv, 493 enum mlxsw_emad_op_tlv_status *p_status) 494 { 495 *p_status = mlxsw_emad_op_tlv_status_get(op_tlv); 496 497 switch (*p_status) { 498 case MLXSW_EMAD_OP_TLV_STATUS_SUCCESS: 499 return 0; 500 case MLXSW_EMAD_OP_TLV_STATUS_BUSY: 501 case MLXSW_EMAD_OP_TLV_STATUS_MESSAGE_RECEIPT_ACK: 502 return -EAGAIN; 503 case MLXSW_EMAD_OP_TLV_STATUS_VERSION_NOT_SUPPORTED: 504 case MLXSW_EMAD_OP_TLV_STATUS_UNKNOWN_TLV: 505 case MLXSW_EMAD_OP_TLV_STATUS_REGISTER_NOT_SUPPORTED: 506 case MLXSW_EMAD_OP_TLV_STATUS_CLASS_NOT_SUPPORTED: 507 case MLXSW_EMAD_OP_TLV_STATUS_METHOD_NOT_SUPPORTED: 508 case MLXSW_EMAD_OP_TLV_STATUS_BAD_PARAMETER: 509 case MLXSW_EMAD_OP_TLV_STATUS_RESOURCE_NOT_AVAILABLE: 510 case MLXSW_EMAD_OP_TLV_STATUS_INTERNAL_ERROR: 511 default: 512 return -EIO; 513 } 514 } 515 516 static int 517 mlxsw_emad_process_status_skb(struct sk_buff *skb, 518 enum mlxsw_emad_op_tlv_status *p_status) 519 { 520 return mlxsw_emad_process_status(mlxsw_emad_op_tlv(skb), p_status); 521 } 522 523 struct mlxsw_reg_trans { 524 struct list_head list; 525 struct list_head bulk_list; 526 struct mlxsw_core *core; 527 struct sk_buff *tx_skb; 528 struct mlxsw_tx_info tx_info; 529 struct delayed_work timeout_dw; 530 unsigned int retries; 531 u64 tid; 532 struct completion completion; 533 atomic_t active; 534 mlxsw_reg_trans_cb_t *cb; 535 unsigned long cb_priv; 536 const struct mlxsw_reg_info *reg; 537 enum mlxsw_core_reg_access_type type; 538 int err; 539 char *emad_err_string; 540 enum mlxsw_emad_op_tlv_status emad_status; 541 struct rcu_head rcu; 542 }; 543 544 static void mlxsw_emad_process_string_tlv(const struct sk_buff *skb, 545 struct mlxsw_reg_trans *trans) 546 { 547 char *string_tlv; 548 char *string; 549 550 string_tlv = mlxsw_emad_string_tlv(skb); 551 if (!string_tlv) 552 return; 553 554 trans->emad_err_string = kzalloc(MLXSW_EMAD_STRING_TLV_STRING_LEN, 555 GFP_ATOMIC); 556 if (!trans->emad_err_string) 557 return; 558 559 string = mlxsw_emad_string_tlv_string_data(string_tlv); 560 strlcpy(trans->emad_err_string, string, 561 MLXSW_EMAD_STRING_TLV_STRING_LEN); 562 } 563 564 #define MLXSW_EMAD_TIMEOUT_DURING_FW_FLASH_MS 3000 565 #define MLXSW_EMAD_TIMEOUT_MS 200 566 567 static void mlxsw_emad_trans_timeout_schedule(struct mlxsw_reg_trans *trans) 568 { 569 unsigned long timeout = msecs_to_jiffies(MLXSW_EMAD_TIMEOUT_MS); 570 571 if (trans->core->fw_flash_in_progress) 572 timeout = msecs_to_jiffies(MLXSW_EMAD_TIMEOUT_DURING_FW_FLASH_MS); 573 574 queue_delayed_work(trans->core->emad_wq, &trans->timeout_dw, timeout); 575 } 576 577 static int mlxsw_emad_transmit(struct mlxsw_core *mlxsw_core, 578 struct mlxsw_reg_trans *trans) 579 { 580 struct sk_buff *skb; 581 int err; 582 583 skb = skb_copy(trans->tx_skb, GFP_KERNEL); 584 if (!skb) 585 return -ENOMEM; 586 587 trace_devlink_hwmsg(priv_to_devlink(mlxsw_core), false, 0, 588 skb->data + mlxsw_core->driver->txhdr_len, 589 skb->len - mlxsw_core->driver->txhdr_len); 590 591 atomic_set(&trans->active, 1); 592 err = mlxsw_core_skb_transmit(mlxsw_core, skb, &trans->tx_info); 593 if (err) { 594 dev_kfree_skb(skb); 595 return err; 596 } 597 mlxsw_emad_trans_timeout_schedule(trans); 598 return 0; 599 } 600 601 static void mlxsw_emad_trans_finish(struct mlxsw_reg_trans *trans, int err) 602 { 603 struct mlxsw_core *mlxsw_core = trans->core; 604 605 dev_kfree_skb(trans->tx_skb); 606 spin_lock_bh(&mlxsw_core->emad.trans_list_lock); 607 list_del_rcu(&trans->list); 608 spin_unlock_bh(&mlxsw_core->emad.trans_list_lock); 609 trans->err = err; 610 complete(&trans->completion); 611 } 612 613 static void mlxsw_emad_transmit_retry(struct mlxsw_core *mlxsw_core, 614 struct mlxsw_reg_trans *trans) 615 { 616 int err; 617 618 if (trans->retries < MLXSW_EMAD_MAX_RETRY) { 619 trans->retries++; 620 err = mlxsw_emad_transmit(trans->core, trans); 621 if (err == 0) 622 return; 623 624 if (!atomic_dec_and_test(&trans->active)) 625 return; 626 } else { 627 err = -EIO; 628 } 629 mlxsw_emad_trans_finish(trans, err); 630 } 631 632 static void mlxsw_emad_trans_timeout_work(struct work_struct *work) 633 { 634 struct mlxsw_reg_trans *trans = container_of(work, 635 struct mlxsw_reg_trans, 636 timeout_dw.work); 637 638 if (!atomic_dec_and_test(&trans->active)) 639 return; 640 641 mlxsw_emad_transmit_retry(trans->core, trans); 642 } 643 644 static void mlxsw_emad_process_response(struct mlxsw_core *mlxsw_core, 645 struct mlxsw_reg_trans *trans, 646 struct sk_buff *skb) 647 { 648 int err; 649 650 if (!atomic_dec_and_test(&trans->active)) 651 return; 652 653 err = mlxsw_emad_process_status_skb(skb, &trans->emad_status); 654 if (err == -EAGAIN) { 655 mlxsw_emad_transmit_retry(mlxsw_core, trans); 656 } else { 657 if (err == 0) { 658 char *reg_tlv = mlxsw_emad_reg_tlv(skb); 659 660 if (trans->cb) 661 trans->cb(mlxsw_core, 662 mlxsw_emad_reg_payload(reg_tlv), 663 trans->reg->len, trans->cb_priv); 664 } else { 665 mlxsw_emad_process_string_tlv(skb, trans); 666 } 667 mlxsw_emad_trans_finish(trans, err); 668 } 669 } 670 671 /* called with rcu read lock held */ 672 static void mlxsw_emad_rx_listener_func(struct sk_buff *skb, u8 local_port, 673 void *priv) 674 { 675 struct mlxsw_core *mlxsw_core = priv; 676 struct mlxsw_reg_trans *trans; 677 678 trace_devlink_hwmsg(priv_to_devlink(mlxsw_core), true, 0, 679 skb->data, skb->len); 680 681 mlxsw_emad_tlv_parse(skb); 682 683 if (!mlxsw_emad_is_resp(skb)) 684 goto free_skb; 685 686 list_for_each_entry_rcu(trans, &mlxsw_core->emad.trans_list, list) { 687 if (mlxsw_emad_get_tid(skb) == trans->tid) { 688 mlxsw_emad_process_response(mlxsw_core, trans, skb); 689 break; 690 } 691 } 692 693 free_skb: 694 dev_kfree_skb(skb); 695 } 696 697 static const struct mlxsw_listener mlxsw_emad_rx_listener = 698 MLXSW_RXL(mlxsw_emad_rx_listener_func, ETHEMAD, TRAP_TO_CPU, false, 699 EMAD, DISCARD); 700 701 static int mlxsw_emad_init(struct mlxsw_core *mlxsw_core) 702 { 703 struct workqueue_struct *emad_wq; 704 u64 tid; 705 int err; 706 707 if (!(mlxsw_core->bus->features & MLXSW_BUS_F_TXRX)) 708 return 0; 709 710 emad_wq = alloc_workqueue("mlxsw_core_emad", 0, 0); 711 if (!emad_wq) 712 return -ENOMEM; 713 mlxsw_core->emad_wq = emad_wq; 714 715 /* Set the upper 32 bits of the transaction ID field to a random 716 * number. This allows us to discard EMADs addressed to other 717 * devices. 718 */ 719 get_random_bytes(&tid, 4); 720 tid <<= 32; 721 atomic64_set(&mlxsw_core->emad.tid, tid); 722 723 INIT_LIST_HEAD(&mlxsw_core->emad.trans_list); 724 spin_lock_init(&mlxsw_core->emad.trans_list_lock); 725 726 err = mlxsw_core_trap_register(mlxsw_core, &mlxsw_emad_rx_listener, 727 mlxsw_core); 728 if (err) 729 goto err_trap_register; 730 731 err = mlxsw_core->driver->basic_trap_groups_set(mlxsw_core); 732 if (err) 733 goto err_emad_trap_set; 734 mlxsw_core->emad.use_emad = true; 735 736 return 0; 737 738 err_emad_trap_set: 739 mlxsw_core_trap_unregister(mlxsw_core, &mlxsw_emad_rx_listener, 740 mlxsw_core); 741 err_trap_register: 742 destroy_workqueue(mlxsw_core->emad_wq); 743 return err; 744 } 745 746 static void mlxsw_emad_fini(struct mlxsw_core *mlxsw_core) 747 { 748 749 if (!(mlxsw_core->bus->features & MLXSW_BUS_F_TXRX)) 750 return; 751 752 mlxsw_core->emad.use_emad = false; 753 mlxsw_core_trap_unregister(mlxsw_core, &mlxsw_emad_rx_listener, 754 mlxsw_core); 755 destroy_workqueue(mlxsw_core->emad_wq); 756 } 757 758 static struct sk_buff *mlxsw_emad_alloc(const struct mlxsw_core *mlxsw_core, 759 u16 reg_len, bool enable_string_tlv) 760 { 761 struct sk_buff *skb; 762 u16 emad_len; 763 764 emad_len = (reg_len + sizeof(u32) + MLXSW_EMAD_ETH_HDR_LEN + 765 (MLXSW_EMAD_OP_TLV_LEN + MLXSW_EMAD_END_TLV_LEN) * 766 sizeof(u32) + mlxsw_core->driver->txhdr_len); 767 if (enable_string_tlv) 768 emad_len += MLXSW_EMAD_STRING_TLV_LEN * sizeof(u32); 769 if (emad_len > MLXSW_EMAD_MAX_FRAME_LEN) 770 return NULL; 771 772 skb = netdev_alloc_skb(NULL, emad_len); 773 if (!skb) 774 return NULL; 775 memset(skb->data, 0, emad_len); 776 skb_reserve(skb, emad_len); 777 778 return skb; 779 } 780 781 static int mlxsw_emad_reg_access(struct mlxsw_core *mlxsw_core, 782 const struct mlxsw_reg_info *reg, 783 char *payload, 784 enum mlxsw_core_reg_access_type type, 785 struct mlxsw_reg_trans *trans, 786 struct list_head *bulk_list, 787 mlxsw_reg_trans_cb_t *cb, 788 unsigned long cb_priv, u64 tid) 789 { 790 bool enable_string_tlv; 791 struct sk_buff *skb; 792 int err; 793 794 dev_dbg(mlxsw_core->bus_info->dev, "EMAD reg access (tid=%llx,reg_id=%x(%s),type=%s)\n", 795 tid, reg->id, mlxsw_reg_id_str(reg->id), 796 mlxsw_core_reg_access_type_str(type)); 797 798 /* Since this can be changed during emad_reg_access, read it once and 799 * use the value all the way. 800 */ 801 enable_string_tlv = mlxsw_core->emad.enable_string_tlv; 802 803 skb = mlxsw_emad_alloc(mlxsw_core, reg->len, enable_string_tlv); 804 if (!skb) 805 return -ENOMEM; 806 807 list_add_tail(&trans->bulk_list, bulk_list); 808 trans->core = mlxsw_core; 809 trans->tx_skb = skb; 810 trans->tx_info.local_port = MLXSW_PORT_CPU_PORT; 811 trans->tx_info.is_emad = true; 812 INIT_DELAYED_WORK(&trans->timeout_dw, mlxsw_emad_trans_timeout_work); 813 trans->tid = tid; 814 init_completion(&trans->completion); 815 trans->cb = cb; 816 trans->cb_priv = cb_priv; 817 trans->reg = reg; 818 trans->type = type; 819 820 mlxsw_emad_construct(skb, reg, payload, type, trans->tid, 821 enable_string_tlv); 822 mlxsw_core->driver->txhdr_construct(skb, &trans->tx_info); 823 824 spin_lock_bh(&mlxsw_core->emad.trans_list_lock); 825 list_add_tail_rcu(&trans->list, &mlxsw_core->emad.trans_list); 826 spin_unlock_bh(&mlxsw_core->emad.trans_list_lock); 827 err = mlxsw_emad_transmit(mlxsw_core, trans); 828 if (err) 829 goto err_out; 830 return 0; 831 832 err_out: 833 spin_lock_bh(&mlxsw_core->emad.trans_list_lock); 834 list_del_rcu(&trans->list); 835 spin_unlock_bh(&mlxsw_core->emad.trans_list_lock); 836 list_del(&trans->bulk_list); 837 dev_kfree_skb(trans->tx_skb); 838 return err; 839 } 840 841 /***************** 842 * Core functions 843 *****************/ 844 845 int mlxsw_core_driver_register(struct mlxsw_driver *mlxsw_driver) 846 { 847 spin_lock(&mlxsw_core_driver_list_lock); 848 list_add_tail(&mlxsw_driver->list, &mlxsw_core_driver_list); 849 spin_unlock(&mlxsw_core_driver_list_lock); 850 return 0; 851 } 852 EXPORT_SYMBOL(mlxsw_core_driver_register); 853 854 void mlxsw_core_driver_unregister(struct mlxsw_driver *mlxsw_driver) 855 { 856 spin_lock(&mlxsw_core_driver_list_lock); 857 list_del(&mlxsw_driver->list); 858 spin_unlock(&mlxsw_core_driver_list_lock); 859 } 860 EXPORT_SYMBOL(mlxsw_core_driver_unregister); 861 862 static struct mlxsw_driver *__driver_find(const char *kind) 863 { 864 struct mlxsw_driver *mlxsw_driver; 865 866 list_for_each_entry(mlxsw_driver, &mlxsw_core_driver_list, list) { 867 if (strcmp(mlxsw_driver->kind, kind) == 0) 868 return mlxsw_driver; 869 } 870 return NULL; 871 } 872 873 static struct mlxsw_driver *mlxsw_core_driver_get(const char *kind) 874 { 875 struct mlxsw_driver *mlxsw_driver; 876 877 spin_lock(&mlxsw_core_driver_list_lock); 878 mlxsw_driver = __driver_find(kind); 879 spin_unlock(&mlxsw_core_driver_list_lock); 880 return mlxsw_driver; 881 } 882 883 struct mlxsw_core_fw_info { 884 struct mlxfw_dev mlxfw_dev; 885 struct mlxsw_core *mlxsw_core; 886 }; 887 888 static int mlxsw_core_fw_component_query(struct mlxfw_dev *mlxfw_dev, 889 u16 component_index, u32 *p_max_size, 890 u8 *p_align_bits, u16 *p_max_write_size) 891 { 892 struct mlxsw_core_fw_info *mlxsw_core_fw_info = 893 container_of(mlxfw_dev, struct mlxsw_core_fw_info, mlxfw_dev); 894 struct mlxsw_core *mlxsw_core = mlxsw_core_fw_info->mlxsw_core; 895 char mcqi_pl[MLXSW_REG_MCQI_LEN]; 896 int err; 897 898 mlxsw_reg_mcqi_pack(mcqi_pl, component_index); 899 err = mlxsw_reg_query(mlxsw_core, MLXSW_REG(mcqi), mcqi_pl); 900 if (err) 901 return err; 902 mlxsw_reg_mcqi_unpack(mcqi_pl, p_max_size, p_align_bits, p_max_write_size); 903 904 *p_align_bits = max_t(u8, *p_align_bits, 2); 905 *p_max_write_size = min_t(u16, *p_max_write_size, MLXSW_REG_MCDA_MAX_DATA_LEN); 906 return 0; 907 } 908 909 static int mlxsw_core_fw_fsm_lock(struct mlxfw_dev *mlxfw_dev, u32 *fwhandle) 910 { 911 struct mlxsw_core_fw_info *mlxsw_core_fw_info = 912 container_of(mlxfw_dev, struct mlxsw_core_fw_info, mlxfw_dev); 913 struct mlxsw_core *mlxsw_core = mlxsw_core_fw_info->mlxsw_core; 914 char mcc_pl[MLXSW_REG_MCC_LEN]; 915 u8 control_state; 916 int err; 917 918 mlxsw_reg_mcc_pack(mcc_pl, 0, 0, 0, 0); 919 err = mlxsw_reg_query(mlxsw_core, MLXSW_REG(mcc), mcc_pl); 920 if (err) 921 return err; 922 923 mlxsw_reg_mcc_unpack(mcc_pl, fwhandle, NULL, &control_state); 924 if (control_state != MLXFW_FSM_STATE_IDLE) 925 return -EBUSY; 926 927 mlxsw_reg_mcc_pack(mcc_pl, MLXSW_REG_MCC_INSTRUCTION_LOCK_UPDATE_HANDLE, 0, *fwhandle, 0); 928 return mlxsw_reg_write(mlxsw_core, MLXSW_REG(mcc), mcc_pl); 929 } 930 931 static int mlxsw_core_fw_fsm_component_update(struct mlxfw_dev *mlxfw_dev, u32 fwhandle, 932 u16 component_index, u32 component_size) 933 { 934 struct mlxsw_core_fw_info *mlxsw_core_fw_info = 935 container_of(mlxfw_dev, struct mlxsw_core_fw_info, mlxfw_dev); 936 struct mlxsw_core *mlxsw_core = mlxsw_core_fw_info->mlxsw_core; 937 char mcc_pl[MLXSW_REG_MCC_LEN]; 938 939 mlxsw_reg_mcc_pack(mcc_pl, MLXSW_REG_MCC_INSTRUCTION_UPDATE_COMPONENT, 940 component_index, fwhandle, component_size); 941 return mlxsw_reg_write(mlxsw_core, MLXSW_REG(mcc), mcc_pl); 942 } 943 944 static int mlxsw_core_fw_fsm_block_download(struct mlxfw_dev *mlxfw_dev, u32 fwhandle, 945 u8 *data, u16 size, u32 offset) 946 { 947 struct mlxsw_core_fw_info *mlxsw_core_fw_info = 948 container_of(mlxfw_dev, struct mlxsw_core_fw_info, mlxfw_dev); 949 struct mlxsw_core *mlxsw_core = mlxsw_core_fw_info->mlxsw_core; 950 char mcda_pl[MLXSW_REG_MCDA_LEN]; 951 952 mlxsw_reg_mcda_pack(mcda_pl, fwhandle, offset, size, data); 953 return mlxsw_reg_write(mlxsw_core, MLXSW_REG(mcda), mcda_pl); 954 } 955 956 static int mlxsw_core_fw_fsm_component_verify(struct mlxfw_dev *mlxfw_dev, u32 fwhandle, 957 u16 component_index) 958 { 959 struct mlxsw_core_fw_info *mlxsw_core_fw_info = 960 container_of(mlxfw_dev, struct mlxsw_core_fw_info, mlxfw_dev); 961 struct mlxsw_core *mlxsw_core = mlxsw_core_fw_info->mlxsw_core; 962 char mcc_pl[MLXSW_REG_MCC_LEN]; 963 964 mlxsw_reg_mcc_pack(mcc_pl, MLXSW_REG_MCC_INSTRUCTION_VERIFY_COMPONENT, 965 component_index, fwhandle, 0); 966 return mlxsw_reg_write(mlxsw_core, MLXSW_REG(mcc), mcc_pl); 967 } 968 969 static int mlxsw_core_fw_fsm_activate(struct mlxfw_dev *mlxfw_dev, u32 fwhandle) 970 { 971 struct mlxsw_core_fw_info *mlxsw_core_fw_info = 972 container_of(mlxfw_dev, struct mlxsw_core_fw_info, mlxfw_dev); 973 struct mlxsw_core *mlxsw_core = mlxsw_core_fw_info->mlxsw_core; 974 char mcc_pl[MLXSW_REG_MCC_LEN]; 975 976 mlxsw_reg_mcc_pack(mcc_pl, MLXSW_REG_MCC_INSTRUCTION_ACTIVATE, 0, fwhandle, 0); 977 return mlxsw_reg_write(mlxsw_core, MLXSW_REG(mcc), mcc_pl); 978 } 979 980 static int mlxsw_core_fw_fsm_query_state(struct mlxfw_dev *mlxfw_dev, u32 fwhandle, 981 enum mlxfw_fsm_state *fsm_state, 982 enum mlxfw_fsm_state_err *fsm_state_err) 983 { 984 struct mlxsw_core_fw_info *mlxsw_core_fw_info = 985 container_of(mlxfw_dev, struct mlxsw_core_fw_info, mlxfw_dev); 986 struct mlxsw_core *mlxsw_core = mlxsw_core_fw_info->mlxsw_core; 987 char mcc_pl[MLXSW_REG_MCC_LEN]; 988 u8 control_state; 989 u8 error_code; 990 int err; 991 992 mlxsw_reg_mcc_pack(mcc_pl, 0, 0, fwhandle, 0); 993 err = mlxsw_reg_query(mlxsw_core, MLXSW_REG(mcc), mcc_pl); 994 if (err) 995 return err; 996 997 mlxsw_reg_mcc_unpack(mcc_pl, NULL, &error_code, &control_state); 998 *fsm_state = control_state; 999 *fsm_state_err = min_t(enum mlxfw_fsm_state_err, error_code, MLXFW_FSM_STATE_ERR_MAX); 1000 return 0; 1001 } 1002 1003 static void mlxsw_core_fw_fsm_cancel(struct mlxfw_dev *mlxfw_dev, u32 fwhandle) 1004 { 1005 struct mlxsw_core_fw_info *mlxsw_core_fw_info = 1006 container_of(mlxfw_dev, struct mlxsw_core_fw_info, mlxfw_dev); 1007 struct mlxsw_core *mlxsw_core = mlxsw_core_fw_info->mlxsw_core; 1008 char mcc_pl[MLXSW_REG_MCC_LEN]; 1009 1010 mlxsw_reg_mcc_pack(mcc_pl, MLXSW_REG_MCC_INSTRUCTION_CANCEL, 0, fwhandle, 0); 1011 mlxsw_reg_write(mlxsw_core, MLXSW_REG(mcc), mcc_pl); 1012 } 1013 1014 static void mlxsw_core_fw_fsm_release(struct mlxfw_dev *mlxfw_dev, u32 fwhandle) 1015 { 1016 struct mlxsw_core_fw_info *mlxsw_core_fw_info = 1017 container_of(mlxfw_dev, struct mlxsw_core_fw_info, mlxfw_dev); 1018 struct mlxsw_core *mlxsw_core = mlxsw_core_fw_info->mlxsw_core; 1019 char mcc_pl[MLXSW_REG_MCC_LEN]; 1020 1021 mlxsw_reg_mcc_pack(mcc_pl, MLXSW_REG_MCC_INSTRUCTION_RELEASE_UPDATE_HANDLE, 0, fwhandle, 0); 1022 mlxsw_reg_write(mlxsw_core, MLXSW_REG(mcc), mcc_pl); 1023 } 1024 1025 static const struct mlxfw_dev_ops mlxsw_core_fw_mlxsw_dev_ops = { 1026 .component_query = mlxsw_core_fw_component_query, 1027 .fsm_lock = mlxsw_core_fw_fsm_lock, 1028 .fsm_component_update = mlxsw_core_fw_fsm_component_update, 1029 .fsm_block_download = mlxsw_core_fw_fsm_block_download, 1030 .fsm_component_verify = mlxsw_core_fw_fsm_component_verify, 1031 .fsm_activate = mlxsw_core_fw_fsm_activate, 1032 .fsm_query_state = mlxsw_core_fw_fsm_query_state, 1033 .fsm_cancel = mlxsw_core_fw_fsm_cancel, 1034 .fsm_release = mlxsw_core_fw_fsm_release, 1035 }; 1036 1037 static int mlxsw_core_fw_flash(struct mlxsw_core *mlxsw_core, const struct firmware *firmware, 1038 struct netlink_ext_ack *extack) 1039 { 1040 struct mlxsw_core_fw_info mlxsw_core_fw_info = { 1041 .mlxfw_dev = { 1042 .ops = &mlxsw_core_fw_mlxsw_dev_ops, 1043 .psid = mlxsw_core->bus_info->psid, 1044 .psid_size = strlen(mlxsw_core->bus_info->psid), 1045 .devlink = priv_to_devlink(mlxsw_core), 1046 }, 1047 .mlxsw_core = mlxsw_core 1048 }; 1049 int err; 1050 1051 mlxsw_core->fw_flash_in_progress = true; 1052 err = mlxfw_firmware_flash(&mlxsw_core_fw_info.mlxfw_dev, firmware, extack); 1053 mlxsw_core->fw_flash_in_progress = false; 1054 1055 return err; 1056 } 1057 1058 static int mlxsw_core_fw_rev_validate(struct mlxsw_core *mlxsw_core, 1059 const struct mlxsw_bus_info *mlxsw_bus_info, 1060 const struct mlxsw_fw_rev *req_rev, 1061 const char *filename) 1062 { 1063 const struct mlxsw_fw_rev *rev = &mlxsw_bus_info->fw_rev; 1064 union devlink_param_value value; 1065 const struct firmware *firmware; 1066 int err; 1067 1068 /* Don't check if driver does not require it */ 1069 if (!req_rev || !filename) 1070 return 0; 1071 1072 /* Don't check if devlink 'fw_load_policy' param is 'flash' */ 1073 err = devlink_param_driverinit_value_get(priv_to_devlink(mlxsw_core), 1074 DEVLINK_PARAM_GENERIC_ID_FW_LOAD_POLICY, 1075 &value); 1076 if (err) 1077 return err; 1078 if (value.vu8 == DEVLINK_PARAM_FW_LOAD_POLICY_VALUE_FLASH) 1079 return 0; 1080 1081 /* Validate driver & FW are compatible */ 1082 if (rev->major != req_rev->major) { 1083 WARN(1, "Mismatch in major FW version [%d:%d] is never expected; Please contact support\n", 1084 rev->major, req_rev->major); 1085 return -EINVAL; 1086 } 1087 if (mlxsw_core_fw_rev_minor_subminor_validate(rev, req_rev)) 1088 return 0; 1089 1090 dev_err(mlxsw_bus_info->dev, "The firmware version %d.%d.%d is incompatible with the driver (required >= %d.%d.%d)\n", 1091 rev->major, rev->minor, rev->subminor, req_rev->major, 1092 req_rev->minor, req_rev->subminor); 1093 dev_info(mlxsw_bus_info->dev, "Flashing firmware using file %s\n", filename); 1094 1095 err = request_firmware_direct(&firmware, filename, mlxsw_bus_info->dev); 1096 if (err) { 1097 dev_err(mlxsw_bus_info->dev, "Could not request firmware file %s\n", filename); 1098 return err; 1099 } 1100 1101 err = mlxsw_core_fw_flash(mlxsw_core, firmware, NULL); 1102 release_firmware(firmware); 1103 if (err) 1104 dev_err(mlxsw_bus_info->dev, "Could not upgrade firmware\n"); 1105 1106 /* On FW flash success, tell the caller FW reset is needed 1107 * if current FW supports it. 1108 */ 1109 if (rev->minor >= req_rev->can_reset_minor) 1110 return err ? err : -EAGAIN; 1111 else 1112 return 0; 1113 } 1114 1115 static int mlxsw_core_fw_flash_update(struct mlxsw_core *mlxsw_core, 1116 struct devlink_flash_update_params *params, 1117 struct netlink_ext_ack *extack) 1118 { 1119 const struct firmware *firmware; 1120 int err; 1121 1122 err = request_firmware_direct(&firmware, params->file_name, mlxsw_core->bus_info->dev); 1123 if (err) 1124 return err; 1125 err = mlxsw_core_fw_flash(mlxsw_core, firmware, extack); 1126 release_firmware(firmware); 1127 1128 return err; 1129 } 1130 1131 static int mlxsw_core_devlink_param_fw_load_policy_validate(struct devlink *devlink, u32 id, 1132 union devlink_param_value val, 1133 struct netlink_ext_ack *extack) 1134 { 1135 if (val.vu8 != DEVLINK_PARAM_FW_LOAD_POLICY_VALUE_DRIVER && 1136 val.vu8 != DEVLINK_PARAM_FW_LOAD_POLICY_VALUE_FLASH) { 1137 NL_SET_ERR_MSG_MOD(extack, "'fw_load_policy' must be 'driver' or 'flash'"); 1138 return -EINVAL; 1139 } 1140 1141 return 0; 1142 } 1143 1144 static const struct devlink_param mlxsw_core_fw_devlink_params[] = { 1145 DEVLINK_PARAM_GENERIC(FW_LOAD_POLICY, BIT(DEVLINK_PARAM_CMODE_DRIVERINIT), NULL, NULL, 1146 mlxsw_core_devlink_param_fw_load_policy_validate), 1147 }; 1148 1149 static int mlxsw_core_fw_params_register(struct mlxsw_core *mlxsw_core) 1150 { 1151 struct devlink *devlink = priv_to_devlink(mlxsw_core); 1152 union devlink_param_value value; 1153 int err; 1154 1155 err = devlink_params_register(devlink, mlxsw_core_fw_devlink_params, 1156 ARRAY_SIZE(mlxsw_core_fw_devlink_params)); 1157 if (err) 1158 return err; 1159 1160 value.vu8 = DEVLINK_PARAM_FW_LOAD_POLICY_VALUE_DRIVER; 1161 devlink_param_driverinit_value_set(devlink, DEVLINK_PARAM_GENERIC_ID_FW_LOAD_POLICY, value); 1162 return 0; 1163 } 1164 1165 static void mlxsw_core_fw_params_unregister(struct mlxsw_core *mlxsw_core) 1166 { 1167 devlink_params_unregister(priv_to_devlink(mlxsw_core), mlxsw_core_fw_devlink_params, 1168 ARRAY_SIZE(mlxsw_core_fw_devlink_params)); 1169 } 1170 1171 static int mlxsw_devlink_port_split(struct devlink *devlink, 1172 unsigned int port_index, 1173 unsigned int count, 1174 struct netlink_ext_ack *extack) 1175 { 1176 struct mlxsw_core *mlxsw_core = devlink_priv(devlink); 1177 1178 if (port_index >= mlxsw_core->max_ports) { 1179 NL_SET_ERR_MSG_MOD(extack, "Port index exceeds maximum number of ports"); 1180 return -EINVAL; 1181 } 1182 if (!mlxsw_core->driver->port_split) 1183 return -EOPNOTSUPP; 1184 return mlxsw_core->driver->port_split(mlxsw_core, port_index, count, 1185 extack); 1186 } 1187 1188 static int mlxsw_devlink_port_unsplit(struct devlink *devlink, 1189 unsigned int port_index, 1190 struct netlink_ext_ack *extack) 1191 { 1192 struct mlxsw_core *mlxsw_core = devlink_priv(devlink); 1193 1194 if (port_index >= mlxsw_core->max_ports) { 1195 NL_SET_ERR_MSG_MOD(extack, "Port index exceeds maximum number of ports"); 1196 return -EINVAL; 1197 } 1198 if (!mlxsw_core->driver->port_unsplit) 1199 return -EOPNOTSUPP; 1200 return mlxsw_core->driver->port_unsplit(mlxsw_core, port_index, 1201 extack); 1202 } 1203 1204 static int 1205 mlxsw_devlink_sb_pool_get(struct devlink *devlink, 1206 unsigned int sb_index, u16 pool_index, 1207 struct devlink_sb_pool_info *pool_info) 1208 { 1209 struct mlxsw_core *mlxsw_core = devlink_priv(devlink); 1210 struct mlxsw_driver *mlxsw_driver = mlxsw_core->driver; 1211 1212 if (!mlxsw_driver->sb_pool_get) 1213 return -EOPNOTSUPP; 1214 return mlxsw_driver->sb_pool_get(mlxsw_core, sb_index, 1215 pool_index, pool_info); 1216 } 1217 1218 static int 1219 mlxsw_devlink_sb_pool_set(struct devlink *devlink, 1220 unsigned int sb_index, u16 pool_index, u32 size, 1221 enum devlink_sb_threshold_type threshold_type, 1222 struct netlink_ext_ack *extack) 1223 { 1224 struct mlxsw_core *mlxsw_core = devlink_priv(devlink); 1225 struct mlxsw_driver *mlxsw_driver = mlxsw_core->driver; 1226 1227 if (!mlxsw_driver->sb_pool_set) 1228 return -EOPNOTSUPP; 1229 return mlxsw_driver->sb_pool_set(mlxsw_core, sb_index, 1230 pool_index, size, threshold_type, 1231 extack); 1232 } 1233 1234 static void *__dl_port(struct devlink_port *devlink_port) 1235 { 1236 return container_of(devlink_port, struct mlxsw_core_port, devlink_port); 1237 } 1238 1239 static int mlxsw_devlink_port_type_set(struct devlink_port *devlink_port, 1240 enum devlink_port_type port_type) 1241 { 1242 struct mlxsw_core *mlxsw_core = devlink_priv(devlink_port->devlink); 1243 struct mlxsw_driver *mlxsw_driver = mlxsw_core->driver; 1244 struct mlxsw_core_port *mlxsw_core_port = __dl_port(devlink_port); 1245 1246 if (!mlxsw_driver->port_type_set) 1247 return -EOPNOTSUPP; 1248 1249 return mlxsw_driver->port_type_set(mlxsw_core, 1250 mlxsw_core_port->local_port, 1251 port_type); 1252 } 1253 1254 static int mlxsw_devlink_sb_port_pool_get(struct devlink_port *devlink_port, 1255 unsigned int sb_index, u16 pool_index, 1256 u32 *p_threshold) 1257 { 1258 struct mlxsw_core *mlxsw_core = devlink_priv(devlink_port->devlink); 1259 struct mlxsw_driver *mlxsw_driver = mlxsw_core->driver; 1260 struct mlxsw_core_port *mlxsw_core_port = __dl_port(devlink_port); 1261 1262 if (!mlxsw_driver->sb_port_pool_get || 1263 !mlxsw_core_port_check(mlxsw_core_port)) 1264 return -EOPNOTSUPP; 1265 return mlxsw_driver->sb_port_pool_get(mlxsw_core_port, sb_index, 1266 pool_index, p_threshold); 1267 } 1268 1269 static int mlxsw_devlink_sb_port_pool_set(struct devlink_port *devlink_port, 1270 unsigned int sb_index, u16 pool_index, 1271 u32 threshold, 1272 struct netlink_ext_ack *extack) 1273 { 1274 struct mlxsw_core *mlxsw_core = devlink_priv(devlink_port->devlink); 1275 struct mlxsw_driver *mlxsw_driver = mlxsw_core->driver; 1276 struct mlxsw_core_port *mlxsw_core_port = __dl_port(devlink_port); 1277 1278 if (!mlxsw_driver->sb_port_pool_set || 1279 !mlxsw_core_port_check(mlxsw_core_port)) 1280 return -EOPNOTSUPP; 1281 return mlxsw_driver->sb_port_pool_set(mlxsw_core_port, sb_index, 1282 pool_index, threshold, extack); 1283 } 1284 1285 static int 1286 mlxsw_devlink_sb_tc_pool_bind_get(struct devlink_port *devlink_port, 1287 unsigned int sb_index, u16 tc_index, 1288 enum devlink_sb_pool_type pool_type, 1289 u16 *p_pool_index, u32 *p_threshold) 1290 { 1291 struct mlxsw_core *mlxsw_core = devlink_priv(devlink_port->devlink); 1292 struct mlxsw_driver *mlxsw_driver = mlxsw_core->driver; 1293 struct mlxsw_core_port *mlxsw_core_port = __dl_port(devlink_port); 1294 1295 if (!mlxsw_driver->sb_tc_pool_bind_get || 1296 !mlxsw_core_port_check(mlxsw_core_port)) 1297 return -EOPNOTSUPP; 1298 return mlxsw_driver->sb_tc_pool_bind_get(mlxsw_core_port, sb_index, 1299 tc_index, pool_type, 1300 p_pool_index, p_threshold); 1301 } 1302 1303 static int 1304 mlxsw_devlink_sb_tc_pool_bind_set(struct devlink_port *devlink_port, 1305 unsigned int sb_index, u16 tc_index, 1306 enum devlink_sb_pool_type pool_type, 1307 u16 pool_index, u32 threshold, 1308 struct netlink_ext_ack *extack) 1309 { 1310 struct mlxsw_core *mlxsw_core = devlink_priv(devlink_port->devlink); 1311 struct mlxsw_driver *mlxsw_driver = mlxsw_core->driver; 1312 struct mlxsw_core_port *mlxsw_core_port = __dl_port(devlink_port); 1313 1314 if (!mlxsw_driver->sb_tc_pool_bind_set || 1315 !mlxsw_core_port_check(mlxsw_core_port)) 1316 return -EOPNOTSUPP; 1317 return mlxsw_driver->sb_tc_pool_bind_set(mlxsw_core_port, sb_index, 1318 tc_index, pool_type, 1319 pool_index, threshold, extack); 1320 } 1321 1322 static int mlxsw_devlink_sb_occ_snapshot(struct devlink *devlink, 1323 unsigned int sb_index) 1324 { 1325 struct mlxsw_core *mlxsw_core = devlink_priv(devlink); 1326 struct mlxsw_driver *mlxsw_driver = mlxsw_core->driver; 1327 1328 if (!mlxsw_driver->sb_occ_snapshot) 1329 return -EOPNOTSUPP; 1330 return mlxsw_driver->sb_occ_snapshot(mlxsw_core, sb_index); 1331 } 1332 1333 static int mlxsw_devlink_sb_occ_max_clear(struct devlink *devlink, 1334 unsigned int sb_index) 1335 { 1336 struct mlxsw_core *mlxsw_core = devlink_priv(devlink); 1337 struct mlxsw_driver *mlxsw_driver = mlxsw_core->driver; 1338 1339 if (!mlxsw_driver->sb_occ_max_clear) 1340 return -EOPNOTSUPP; 1341 return mlxsw_driver->sb_occ_max_clear(mlxsw_core, sb_index); 1342 } 1343 1344 static int 1345 mlxsw_devlink_sb_occ_port_pool_get(struct devlink_port *devlink_port, 1346 unsigned int sb_index, u16 pool_index, 1347 u32 *p_cur, u32 *p_max) 1348 { 1349 struct mlxsw_core *mlxsw_core = devlink_priv(devlink_port->devlink); 1350 struct mlxsw_driver *mlxsw_driver = mlxsw_core->driver; 1351 struct mlxsw_core_port *mlxsw_core_port = __dl_port(devlink_port); 1352 1353 if (!mlxsw_driver->sb_occ_port_pool_get || 1354 !mlxsw_core_port_check(mlxsw_core_port)) 1355 return -EOPNOTSUPP; 1356 return mlxsw_driver->sb_occ_port_pool_get(mlxsw_core_port, sb_index, 1357 pool_index, p_cur, p_max); 1358 } 1359 1360 static int 1361 mlxsw_devlink_sb_occ_tc_port_bind_get(struct devlink_port *devlink_port, 1362 unsigned int sb_index, u16 tc_index, 1363 enum devlink_sb_pool_type pool_type, 1364 u32 *p_cur, u32 *p_max) 1365 { 1366 struct mlxsw_core *mlxsw_core = devlink_priv(devlink_port->devlink); 1367 struct mlxsw_driver *mlxsw_driver = mlxsw_core->driver; 1368 struct mlxsw_core_port *mlxsw_core_port = __dl_port(devlink_port); 1369 1370 if (!mlxsw_driver->sb_occ_tc_port_bind_get || 1371 !mlxsw_core_port_check(mlxsw_core_port)) 1372 return -EOPNOTSUPP; 1373 return mlxsw_driver->sb_occ_tc_port_bind_get(mlxsw_core_port, 1374 sb_index, tc_index, 1375 pool_type, p_cur, p_max); 1376 } 1377 1378 static int 1379 mlxsw_devlink_info_get(struct devlink *devlink, struct devlink_info_req *req, 1380 struct netlink_ext_ack *extack) 1381 { 1382 struct mlxsw_core *mlxsw_core = devlink_priv(devlink); 1383 char fw_info_psid[MLXSW_REG_MGIR_FW_INFO_PSID_SIZE]; 1384 u32 hw_rev, fw_major, fw_minor, fw_sub_minor; 1385 char mgir_pl[MLXSW_REG_MGIR_LEN]; 1386 char buf[32]; 1387 int err; 1388 1389 err = devlink_info_driver_name_put(req, 1390 mlxsw_core->bus_info->device_kind); 1391 if (err) 1392 return err; 1393 1394 mlxsw_reg_mgir_pack(mgir_pl); 1395 err = mlxsw_reg_query(mlxsw_core, MLXSW_REG(mgir), mgir_pl); 1396 if (err) 1397 return err; 1398 mlxsw_reg_mgir_unpack(mgir_pl, &hw_rev, fw_info_psid, &fw_major, 1399 &fw_minor, &fw_sub_minor); 1400 1401 sprintf(buf, "%X", hw_rev); 1402 err = devlink_info_version_fixed_put(req, "hw.revision", buf); 1403 if (err) 1404 return err; 1405 1406 err = devlink_info_version_fixed_put(req, "fw.psid", fw_info_psid); 1407 if (err) 1408 return err; 1409 1410 sprintf(buf, "%d.%d.%d", fw_major, fw_minor, fw_sub_minor); 1411 err = devlink_info_version_running_put(req, "fw.version", buf); 1412 if (err) 1413 return err; 1414 1415 return 0; 1416 } 1417 1418 static int 1419 mlxsw_devlink_core_bus_device_reload_down(struct devlink *devlink, 1420 bool netns_change, enum devlink_reload_action action, 1421 enum devlink_reload_limit limit, 1422 struct netlink_ext_ack *extack) 1423 { 1424 struct mlxsw_core *mlxsw_core = devlink_priv(devlink); 1425 1426 if (!(mlxsw_core->bus->features & MLXSW_BUS_F_RESET)) 1427 return -EOPNOTSUPP; 1428 1429 mlxsw_core_bus_device_unregister(mlxsw_core, true); 1430 return 0; 1431 } 1432 1433 static int 1434 mlxsw_devlink_core_bus_device_reload_up(struct devlink *devlink, enum devlink_reload_action action, 1435 enum devlink_reload_limit limit, u32 *actions_performed, 1436 struct netlink_ext_ack *extack) 1437 { 1438 struct mlxsw_core *mlxsw_core = devlink_priv(devlink); 1439 1440 *actions_performed = BIT(DEVLINK_RELOAD_ACTION_DRIVER_REINIT) | 1441 BIT(DEVLINK_RELOAD_ACTION_FW_ACTIVATE); 1442 return mlxsw_core_bus_device_register(mlxsw_core->bus_info, 1443 mlxsw_core->bus, 1444 mlxsw_core->bus_priv, true, 1445 devlink, extack); 1446 } 1447 1448 static int mlxsw_devlink_flash_update(struct devlink *devlink, 1449 struct devlink_flash_update_params *params, 1450 struct netlink_ext_ack *extack) 1451 { 1452 struct mlxsw_core *mlxsw_core = devlink_priv(devlink); 1453 1454 return mlxsw_core_fw_flash_update(mlxsw_core, params, extack); 1455 } 1456 1457 static int mlxsw_devlink_trap_init(struct devlink *devlink, 1458 const struct devlink_trap *trap, 1459 void *trap_ctx) 1460 { 1461 struct mlxsw_core *mlxsw_core = devlink_priv(devlink); 1462 struct mlxsw_driver *mlxsw_driver = mlxsw_core->driver; 1463 1464 if (!mlxsw_driver->trap_init) 1465 return -EOPNOTSUPP; 1466 return mlxsw_driver->trap_init(mlxsw_core, trap, trap_ctx); 1467 } 1468 1469 static void mlxsw_devlink_trap_fini(struct devlink *devlink, 1470 const struct devlink_trap *trap, 1471 void *trap_ctx) 1472 { 1473 struct mlxsw_core *mlxsw_core = devlink_priv(devlink); 1474 struct mlxsw_driver *mlxsw_driver = mlxsw_core->driver; 1475 1476 if (!mlxsw_driver->trap_fini) 1477 return; 1478 mlxsw_driver->trap_fini(mlxsw_core, trap, trap_ctx); 1479 } 1480 1481 static int mlxsw_devlink_trap_action_set(struct devlink *devlink, 1482 const struct devlink_trap *trap, 1483 enum devlink_trap_action action, 1484 struct netlink_ext_ack *extack) 1485 { 1486 struct mlxsw_core *mlxsw_core = devlink_priv(devlink); 1487 struct mlxsw_driver *mlxsw_driver = mlxsw_core->driver; 1488 1489 if (!mlxsw_driver->trap_action_set) 1490 return -EOPNOTSUPP; 1491 return mlxsw_driver->trap_action_set(mlxsw_core, trap, action, extack); 1492 } 1493 1494 static int 1495 mlxsw_devlink_trap_group_init(struct devlink *devlink, 1496 const struct devlink_trap_group *group) 1497 { 1498 struct mlxsw_core *mlxsw_core = devlink_priv(devlink); 1499 struct mlxsw_driver *mlxsw_driver = mlxsw_core->driver; 1500 1501 if (!mlxsw_driver->trap_group_init) 1502 return -EOPNOTSUPP; 1503 return mlxsw_driver->trap_group_init(mlxsw_core, group); 1504 } 1505 1506 static int 1507 mlxsw_devlink_trap_group_set(struct devlink *devlink, 1508 const struct devlink_trap_group *group, 1509 const struct devlink_trap_policer *policer, 1510 struct netlink_ext_ack *extack) 1511 { 1512 struct mlxsw_core *mlxsw_core = devlink_priv(devlink); 1513 struct mlxsw_driver *mlxsw_driver = mlxsw_core->driver; 1514 1515 if (!mlxsw_driver->trap_group_set) 1516 return -EOPNOTSUPP; 1517 return mlxsw_driver->trap_group_set(mlxsw_core, group, policer, extack); 1518 } 1519 1520 static int 1521 mlxsw_devlink_trap_policer_init(struct devlink *devlink, 1522 const struct devlink_trap_policer *policer) 1523 { 1524 struct mlxsw_core *mlxsw_core = devlink_priv(devlink); 1525 struct mlxsw_driver *mlxsw_driver = mlxsw_core->driver; 1526 1527 if (!mlxsw_driver->trap_policer_init) 1528 return -EOPNOTSUPP; 1529 return mlxsw_driver->trap_policer_init(mlxsw_core, policer); 1530 } 1531 1532 static void 1533 mlxsw_devlink_trap_policer_fini(struct devlink *devlink, 1534 const struct devlink_trap_policer *policer) 1535 { 1536 struct mlxsw_core *mlxsw_core = devlink_priv(devlink); 1537 struct mlxsw_driver *mlxsw_driver = mlxsw_core->driver; 1538 1539 if (!mlxsw_driver->trap_policer_fini) 1540 return; 1541 mlxsw_driver->trap_policer_fini(mlxsw_core, policer); 1542 } 1543 1544 static int 1545 mlxsw_devlink_trap_policer_set(struct devlink *devlink, 1546 const struct devlink_trap_policer *policer, 1547 u64 rate, u64 burst, 1548 struct netlink_ext_ack *extack) 1549 { 1550 struct mlxsw_core *mlxsw_core = devlink_priv(devlink); 1551 struct mlxsw_driver *mlxsw_driver = mlxsw_core->driver; 1552 1553 if (!mlxsw_driver->trap_policer_set) 1554 return -EOPNOTSUPP; 1555 return mlxsw_driver->trap_policer_set(mlxsw_core, policer, rate, burst, 1556 extack); 1557 } 1558 1559 static int 1560 mlxsw_devlink_trap_policer_counter_get(struct devlink *devlink, 1561 const struct devlink_trap_policer *policer, 1562 u64 *p_drops) 1563 { 1564 struct mlxsw_core *mlxsw_core = devlink_priv(devlink); 1565 struct mlxsw_driver *mlxsw_driver = mlxsw_core->driver; 1566 1567 if (!mlxsw_driver->trap_policer_counter_get) 1568 return -EOPNOTSUPP; 1569 return mlxsw_driver->trap_policer_counter_get(mlxsw_core, policer, 1570 p_drops); 1571 } 1572 1573 static const struct devlink_ops mlxsw_devlink_ops = { 1574 .reload_actions = BIT(DEVLINK_RELOAD_ACTION_DRIVER_REINIT) | 1575 BIT(DEVLINK_RELOAD_ACTION_FW_ACTIVATE), 1576 .reload_down = mlxsw_devlink_core_bus_device_reload_down, 1577 .reload_up = mlxsw_devlink_core_bus_device_reload_up, 1578 .port_type_set = mlxsw_devlink_port_type_set, 1579 .port_split = mlxsw_devlink_port_split, 1580 .port_unsplit = mlxsw_devlink_port_unsplit, 1581 .sb_pool_get = mlxsw_devlink_sb_pool_get, 1582 .sb_pool_set = mlxsw_devlink_sb_pool_set, 1583 .sb_port_pool_get = mlxsw_devlink_sb_port_pool_get, 1584 .sb_port_pool_set = mlxsw_devlink_sb_port_pool_set, 1585 .sb_tc_pool_bind_get = mlxsw_devlink_sb_tc_pool_bind_get, 1586 .sb_tc_pool_bind_set = mlxsw_devlink_sb_tc_pool_bind_set, 1587 .sb_occ_snapshot = mlxsw_devlink_sb_occ_snapshot, 1588 .sb_occ_max_clear = mlxsw_devlink_sb_occ_max_clear, 1589 .sb_occ_port_pool_get = mlxsw_devlink_sb_occ_port_pool_get, 1590 .sb_occ_tc_port_bind_get = mlxsw_devlink_sb_occ_tc_port_bind_get, 1591 .info_get = mlxsw_devlink_info_get, 1592 .flash_update = mlxsw_devlink_flash_update, 1593 .trap_init = mlxsw_devlink_trap_init, 1594 .trap_fini = mlxsw_devlink_trap_fini, 1595 .trap_action_set = mlxsw_devlink_trap_action_set, 1596 .trap_group_init = mlxsw_devlink_trap_group_init, 1597 .trap_group_set = mlxsw_devlink_trap_group_set, 1598 .trap_policer_init = mlxsw_devlink_trap_policer_init, 1599 .trap_policer_fini = mlxsw_devlink_trap_policer_fini, 1600 .trap_policer_set = mlxsw_devlink_trap_policer_set, 1601 .trap_policer_counter_get = mlxsw_devlink_trap_policer_counter_get, 1602 }; 1603 1604 static int mlxsw_core_params_register(struct mlxsw_core *mlxsw_core) 1605 { 1606 int err; 1607 1608 err = mlxsw_core_fw_params_register(mlxsw_core); 1609 if (err) 1610 return err; 1611 1612 if (mlxsw_core->driver->params_register) { 1613 err = mlxsw_core->driver->params_register(mlxsw_core); 1614 if (err) 1615 goto err_params_register; 1616 } 1617 return 0; 1618 1619 err_params_register: 1620 mlxsw_core_fw_params_unregister(mlxsw_core); 1621 return err; 1622 } 1623 1624 static void mlxsw_core_params_unregister(struct mlxsw_core *mlxsw_core) 1625 { 1626 mlxsw_core_fw_params_unregister(mlxsw_core); 1627 if (mlxsw_core->driver->params_register) 1628 mlxsw_core->driver->params_unregister(mlxsw_core); 1629 } 1630 1631 struct mlxsw_core_health_event { 1632 struct mlxsw_core *mlxsw_core; 1633 char mfde_pl[MLXSW_REG_MFDE_LEN]; 1634 struct work_struct work; 1635 }; 1636 1637 static void mlxsw_core_health_event_work(struct work_struct *work) 1638 { 1639 struct mlxsw_core_health_event *event; 1640 struct mlxsw_core *mlxsw_core; 1641 1642 event = container_of(work, struct mlxsw_core_health_event, work); 1643 mlxsw_core = event->mlxsw_core; 1644 devlink_health_report(mlxsw_core->health.fw_fatal, "FW fatal event occurred", 1645 event->mfde_pl); 1646 kfree(event); 1647 } 1648 1649 static void mlxsw_core_health_listener_func(const struct mlxsw_reg_info *reg, 1650 char *mfde_pl, void *priv) 1651 { 1652 struct mlxsw_core_health_event *event; 1653 struct mlxsw_core *mlxsw_core = priv; 1654 1655 event = kmalloc(sizeof(*event), GFP_ATOMIC); 1656 if (!event) 1657 return; 1658 event->mlxsw_core = mlxsw_core; 1659 memcpy(event->mfde_pl, mfde_pl, sizeof(event->mfde_pl)); 1660 INIT_WORK(&event->work, mlxsw_core_health_event_work); 1661 mlxsw_core_schedule_work(&event->work); 1662 } 1663 1664 static const struct mlxsw_listener mlxsw_core_health_listener = 1665 MLXSW_EVENTL(mlxsw_core_health_listener_func, MFDE, MFDE); 1666 1667 static int mlxsw_core_health_fw_fatal_dump(struct devlink_health_reporter *reporter, 1668 struct devlink_fmsg *fmsg, void *priv_ctx, 1669 struct netlink_ext_ack *extack) 1670 { 1671 char *mfde_pl = priv_ctx; 1672 char *val_str; 1673 u8 event_id; 1674 u32 val; 1675 int err; 1676 1677 if (!priv_ctx) 1678 /* User-triggered dumps are not possible */ 1679 return -EOPNOTSUPP; 1680 1681 val = mlxsw_reg_mfde_irisc_id_get(mfde_pl); 1682 err = devlink_fmsg_u8_pair_put(fmsg, "irisc_id", val); 1683 if (err) 1684 return err; 1685 err = devlink_fmsg_arr_pair_nest_start(fmsg, "event"); 1686 if (err) 1687 return err; 1688 1689 event_id = mlxsw_reg_mfde_event_id_get(mfde_pl); 1690 err = devlink_fmsg_u8_pair_put(fmsg, "id", event_id); 1691 if (err) 1692 return err; 1693 switch (event_id) { 1694 case MLXSW_REG_MFDE_EVENT_ID_CRSPACE_TO: 1695 val_str = "CR space timeout"; 1696 break; 1697 case MLXSW_REG_MFDE_EVENT_ID_KVD_IM_STOP: 1698 val_str = "KVD insertion machine stopped"; 1699 break; 1700 default: 1701 val_str = NULL; 1702 } 1703 if (val_str) { 1704 err = devlink_fmsg_string_pair_put(fmsg, "desc", val_str); 1705 if (err) 1706 return err; 1707 } 1708 err = devlink_fmsg_arr_pair_nest_end(fmsg); 1709 if (err) 1710 return err; 1711 1712 val = mlxsw_reg_mfde_method_get(mfde_pl); 1713 switch (val) { 1714 case MLXSW_REG_MFDE_METHOD_QUERY: 1715 val_str = "query"; 1716 break; 1717 case MLXSW_REG_MFDE_METHOD_WRITE: 1718 val_str = "write"; 1719 break; 1720 default: 1721 val_str = NULL; 1722 } 1723 if (val_str) { 1724 err = devlink_fmsg_string_pair_put(fmsg, "method", val_str); 1725 if (err) 1726 return err; 1727 } 1728 1729 val = mlxsw_reg_mfde_long_process_get(mfde_pl); 1730 err = devlink_fmsg_bool_pair_put(fmsg, "long_process", val); 1731 if (err) 1732 return err; 1733 1734 val = mlxsw_reg_mfde_command_type_get(mfde_pl); 1735 switch (val) { 1736 case MLXSW_REG_MFDE_COMMAND_TYPE_MAD: 1737 val_str = "mad"; 1738 break; 1739 case MLXSW_REG_MFDE_COMMAND_TYPE_EMAD: 1740 val_str = "emad"; 1741 break; 1742 case MLXSW_REG_MFDE_COMMAND_TYPE_CMDIF: 1743 val_str = "cmdif"; 1744 break; 1745 default: 1746 val_str = NULL; 1747 } 1748 if (val_str) { 1749 err = devlink_fmsg_string_pair_put(fmsg, "command_type", val_str); 1750 if (err) 1751 return err; 1752 } 1753 1754 val = mlxsw_reg_mfde_reg_attr_id_get(mfde_pl); 1755 err = devlink_fmsg_u32_pair_put(fmsg, "reg_attr_id", val); 1756 if (err) 1757 return err; 1758 1759 if (event_id == MLXSW_REG_MFDE_EVENT_ID_CRSPACE_TO) { 1760 val = mlxsw_reg_mfde_log_address_get(mfde_pl); 1761 err = devlink_fmsg_u32_pair_put(fmsg, "log_address", val); 1762 if (err) 1763 return err; 1764 val = mlxsw_reg_mfde_log_id_get(mfde_pl); 1765 err = devlink_fmsg_u8_pair_put(fmsg, "log_irisc_id", val); 1766 if (err) 1767 return err; 1768 } else if (event_id == MLXSW_REG_MFDE_EVENT_ID_KVD_IM_STOP) { 1769 val = mlxsw_reg_mfde_pipes_mask_get(mfde_pl); 1770 err = devlink_fmsg_u32_pair_put(fmsg, "pipes_mask", val); 1771 if (err) 1772 return err; 1773 } 1774 1775 return 0; 1776 } 1777 1778 static int 1779 mlxsw_core_health_fw_fatal_test(struct devlink_health_reporter *reporter, 1780 struct netlink_ext_ack *extack) 1781 { 1782 struct mlxsw_core *mlxsw_core = devlink_health_reporter_priv(reporter); 1783 char mfgd_pl[MLXSW_REG_MFGD_LEN]; 1784 int err; 1785 1786 /* Read the register first to make sure no other bits are changed. */ 1787 err = mlxsw_reg_query(mlxsw_core, MLXSW_REG(mfgd), mfgd_pl); 1788 if (err) 1789 return err; 1790 mlxsw_reg_mfgd_trigger_test_set(mfgd_pl, true); 1791 return mlxsw_reg_write(mlxsw_core, MLXSW_REG(mfgd), mfgd_pl); 1792 } 1793 1794 static const struct devlink_health_reporter_ops 1795 mlxsw_core_health_fw_fatal_ops = { 1796 .name = "fw_fatal", 1797 .dump = mlxsw_core_health_fw_fatal_dump, 1798 .test = mlxsw_core_health_fw_fatal_test, 1799 }; 1800 1801 static int mlxsw_core_health_fw_fatal_config(struct mlxsw_core *mlxsw_core, 1802 bool enable) 1803 { 1804 char mfgd_pl[MLXSW_REG_MFGD_LEN]; 1805 int err; 1806 1807 /* Read the register first to make sure no other bits are changed. */ 1808 err = mlxsw_reg_query(mlxsw_core, MLXSW_REG(mfgd), mfgd_pl); 1809 if (err) 1810 return err; 1811 mlxsw_reg_mfgd_fatal_event_mode_set(mfgd_pl, enable); 1812 return mlxsw_reg_write(mlxsw_core, MLXSW_REG(mfgd), mfgd_pl); 1813 } 1814 1815 static int mlxsw_core_health_init(struct mlxsw_core *mlxsw_core) 1816 { 1817 struct devlink *devlink = priv_to_devlink(mlxsw_core); 1818 struct devlink_health_reporter *fw_fatal; 1819 int err; 1820 1821 if (!mlxsw_core->driver->fw_fatal_enabled) 1822 return 0; 1823 1824 fw_fatal = devlink_health_reporter_create(devlink, &mlxsw_core_health_fw_fatal_ops, 1825 0, mlxsw_core); 1826 if (IS_ERR(fw_fatal)) { 1827 dev_err(mlxsw_core->bus_info->dev, "Failed to create fw fatal reporter"); 1828 return PTR_ERR(fw_fatal); 1829 } 1830 mlxsw_core->health.fw_fatal = fw_fatal; 1831 1832 err = mlxsw_core_trap_register(mlxsw_core, &mlxsw_core_health_listener, mlxsw_core); 1833 if (err) 1834 goto err_trap_register; 1835 1836 err = mlxsw_core_health_fw_fatal_config(mlxsw_core, true); 1837 if (err) 1838 goto err_fw_fatal_config; 1839 1840 return 0; 1841 1842 err_fw_fatal_config: 1843 mlxsw_core_trap_unregister(mlxsw_core, &mlxsw_core_health_listener, mlxsw_core); 1844 err_trap_register: 1845 devlink_health_reporter_destroy(mlxsw_core->health.fw_fatal); 1846 return err; 1847 } 1848 1849 static void mlxsw_core_health_fini(struct mlxsw_core *mlxsw_core) 1850 { 1851 if (!mlxsw_core->driver->fw_fatal_enabled) 1852 return; 1853 1854 mlxsw_core_health_fw_fatal_config(mlxsw_core, false); 1855 mlxsw_core_trap_unregister(mlxsw_core, &mlxsw_core_health_listener, mlxsw_core); 1856 /* Make sure there is no more event work scheduled */ 1857 mlxsw_core_flush_owq(); 1858 devlink_health_reporter_destroy(mlxsw_core->health.fw_fatal); 1859 } 1860 1861 static int 1862 __mlxsw_core_bus_device_register(const struct mlxsw_bus_info *mlxsw_bus_info, 1863 const struct mlxsw_bus *mlxsw_bus, 1864 void *bus_priv, bool reload, 1865 struct devlink *devlink, 1866 struct netlink_ext_ack *extack) 1867 { 1868 const char *device_kind = mlxsw_bus_info->device_kind; 1869 struct mlxsw_core *mlxsw_core; 1870 struct mlxsw_driver *mlxsw_driver; 1871 struct mlxsw_res *res; 1872 size_t alloc_size; 1873 int err; 1874 1875 mlxsw_driver = mlxsw_core_driver_get(device_kind); 1876 if (!mlxsw_driver) 1877 return -EINVAL; 1878 1879 if (!reload) { 1880 alloc_size = sizeof(*mlxsw_core) + mlxsw_driver->priv_size; 1881 devlink = devlink_alloc(&mlxsw_devlink_ops, alloc_size); 1882 if (!devlink) { 1883 err = -ENOMEM; 1884 goto err_devlink_alloc; 1885 } 1886 } 1887 1888 mlxsw_core = devlink_priv(devlink); 1889 INIT_LIST_HEAD(&mlxsw_core->rx_listener_list); 1890 INIT_LIST_HEAD(&mlxsw_core->event_listener_list); 1891 mlxsw_core->driver = mlxsw_driver; 1892 mlxsw_core->bus = mlxsw_bus; 1893 mlxsw_core->bus_priv = bus_priv; 1894 mlxsw_core->bus_info = mlxsw_bus_info; 1895 1896 res = mlxsw_driver->res_query_enabled ? &mlxsw_core->res : NULL; 1897 err = mlxsw_bus->init(bus_priv, mlxsw_core, mlxsw_driver->profile, res); 1898 if (err) 1899 goto err_bus_init; 1900 1901 if (mlxsw_driver->resources_register && !reload) { 1902 err = mlxsw_driver->resources_register(mlxsw_core); 1903 if (err) 1904 goto err_register_resources; 1905 } 1906 1907 err = mlxsw_ports_init(mlxsw_core); 1908 if (err) 1909 goto err_ports_init; 1910 1911 if (MLXSW_CORE_RES_VALID(mlxsw_core, MAX_LAG) && 1912 MLXSW_CORE_RES_VALID(mlxsw_core, MAX_LAG_MEMBERS)) { 1913 alloc_size = sizeof(u8) * 1914 MLXSW_CORE_RES_GET(mlxsw_core, MAX_LAG) * 1915 MLXSW_CORE_RES_GET(mlxsw_core, MAX_LAG_MEMBERS); 1916 mlxsw_core->lag.mapping = kzalloc(alloc_size, GFP_KERNEL); 1917 if (!mlxsw_core->lag.mapping) { 1918 err = -ENOMEM; 1919 goto err_alloc_lag_mapping; 1920 } 1921 } 1922 1923 err = mlxsw_emad_init(mlxsw_core); 1924 if (err) 1925 goto err_emad_init; 1926 1927 if (!reload) { 1928 err = devlink_register(devlink, mlxsw_bus_info->dev); 1929 if (err) 1930 goto err_devlink_register; 1931 } 1932 1933 if (!reload) { 1934 err = mlxsw_core_params_register(mlxsw_core); 1935 if (err) 1936 goto err_register_params; 1937 } 1938 1939 err = mlxsw_core_fw_rev_validate(mlxsw_core, mlxsw_bus_info, mlxsw_driver->fw_req_rev, 1940 mlxsw_driver->fw_filename); 1941 if (err) 1942 goto err_fw_rev_validate; 1943 1944 err = mlxsw_core_health_init(mlxsw_core); 1945 if (err) 1946 goto err_health_init; 1947 1948 if (mlxsw_driver->init) { 1949 err = mlxsw_driver->init(mlxsw_core, mlxsw_bus_info, extack); 1950 if (err) 1951 goto err_driver_init; 1952 } 1953 1954 err = mlxsw_hwmon_init(mlxsw_core, mlxsw_bus_info, &mlxsw_core->hwmon); 1955 if (err) 1956 goto err_hwmon_init; 1957 1958 err = mlxsw_thermal_init(mlxsw_core, mlxsw_bus_info, 1959 &mlxsw_core->thermal); 1960 if (err) 1961 goto err_thermal_init; 1962 1963 err = mlxsw_env_init(mlxsw_core, &mlxsw_core->env); 1964 if (err) 1965 goto err_env_init; 1966 1967 mlxsw_core->is_initialized = true; 1968 devlink_params_publish(devlink); 1969 1970 if (!reload) 1971 devlink_reload_enable(devlink); 1972 1973 return 0; 1974 1975 err_env_init: 1976 mlxsw_thermal_fini(mlxsw_core->thermal); 1977 err_thermal_init: 1978 mlxsw_hwmon_fini(mlxsw_core->hwmon); 1979 err_hwmon_init: 1980 if (mlxsw_core->driver->fini) 1981 mlxsw_core->driver->fini(mlxsw_core); 1982 err_driver_init: 1983 mlxsw_core_health_fini(mlxsw_core); 1984 err_health_init: 1985 err_fw_rev_validate: 1986 if (!reload) 1987 mlxsw_core_params_unregister(mlxsw_core); 1988 err_register_params: 1989 if (!reload) 1990 devlink_unregister(devlink); 1991 err_devlink_register: 1992 mlxsw_emad_fini(mlxsw_core); 1993 err_emad_init: 1994 kfree(mlxsw_core->lag.mapping); 1995 err_alloc_lag_mapping: 1996 mlxsw_ports_fini(mlxsw_core); 1997 err_ports_init: 1998 if (!reload) 1999 devlink_resources_unregister(devlink, NULL); 2000 err_register_resources: 2001 mlxsw_bus->fini(bus_priv); 2002 err_bus_init: 2003 if (!reload) 2004 devlink_free(devlink); 2005 err_devlink_alloc: 2006 return err; 2007 } 2008 2009 int mlxsw_core_bus_device_register(const struct mlxsw_bus_info *mlxsw_bus_info, 2010 const struct mlxsw_bus *mlxsw_bus, 2011 void *bus_priv, bool reload, 2012 struct devlink *devlink, 2013 struct netlink_ext_ack *extack) 2014 { 2015 bool called_again = false; 2016 int err; 2017 2018 again: 2019 err = __mlxsw_core_bus_device_register(mlxsw_bus_info, mlxsw_bus, 2020 bus_priv, reload, 2021 devlink, extack); 2022 /* -EAGAIN is returned in case the FW was updated. FW needs 2023 * a reset, so lets try to call __mlxsw_core_bus_device_register() 2024 * again. 2025 */ 2026 if (err == -EAGAIN && !called_again) { 2027 called_again = true; 2028 goto again; 2029 } 2030 2031 return err; 2032 } 2033 EXPORT_SYMBOL(mlxsw_core_bus_device_register); 2034 2035 void mlxsw_core_bus_device_unregister(struct mlxsw_core *mlxsw_core, 2036 bool reload) 2037 { 2038 struct devlink *devlink = priv_to_devlink(mlxsw_core); 2039 2040 if (!reload) 2041 devlink_reload_disable(devlink); 2042 if (devlink_is_reload_failed(devlink)) { 2043 if (!reload) 2044 /* Only the parts that were not de-initialized in the 2045 * failed reload attempt need to be de-initialized. 2046 */ 2047 goto reload_fail_deinit; 2048 else 2049 return; 2050 } 2051 2052 devlink_params_unpublish(devlink); 2053 mlxsw_core->is_initialized = false; 2054 mlxsw_env_fini(mlxsw_core->env); 2055 mlxsw_thermal_fini(mlxsw_core->thermal); 2056 mlxsw_hwmon_fini(mlxsw_core->hwmon); 2057 if (mlxsw_core->driver->fini) 2058 mlxsw_core->driver->fini(mlxsw_core); 2059 mlxsw_core_health_fini(mlxsw_core); 2060 if (!reload) 2061 mlxsw_core_params_unregister(mlxsw_core); 2062 if (!reload) 2063 devlink_unregister(devlink); 2064 mlxsw_emad_fini(mlxsw_core); 2065 kfree(mlxsw_core->lag.mapping); 2066 mlxsw_ports_fini(mlxsw_core); 2067 if (!reload) 2068 devlink_resources_unregister(devlink, NULL); 2069 mlxsw_core->bus->fini(mlxsw_core->bus_priv); 2070 if (!reload) 2071 devlink_free(devlink); 2072 2073 return; 2074 2075 reload_fail_deinit: 2076 mlxsw_core_params_unregister(mlxsw_core); 2077 devlink_unregister(devlink); 2078 devlink_resources_unregister(devlink, NULL); 2079 devlink_free(devlink); 2080 } 2081 EXPORT_SYMBOL(mlxsw_core_bus_device_unregister); 2082 2083 bool mlxsw_core_skb_transmit_busy(struct mlxsw_core *mlxsw_core, 2084 const struct mlxsw_tx_info *tx_info) 2085 { 2086 return mlxsw_core->bus->skb_transmit_busy(mlxsw_core->bus_priv, 2087 tx_info); 2088 } 2089 EXPORT_SYMBOL(mlxsw_core_skb_transmit_busy); 2090 2091 int mlxsw_core_skb_transmit(struct mlxsw_core *mlxsw_core, struct sk_buff *skb, 2092 const struct mlxsw_tx_info *tx_info) 2093 { 2094 return mlxsw_core->bus->skb_transmit(mlxsw_core->bus_priv, skb, 2095 tx_info); 2096 } 2097 EXPORT_SYMBOL(mlxsw_core_skb_transmit); 2098 2099 void mlxsw_core_ptp_transmitted(struct mlxsw_core *mlxsw_core, 2100 struct sk_buff *skb, u8 local_port) 2101 { 2102 if (mlxsw_core->driver->ptp_transmitted) 2103 mlxsw_core->driver->ptp_transmitted(mlxsw_core, skb, 2104 local_port); 2105 } 2106 EXPORT_SYMBOL(mlxsw_core_ptp_transmitted); 2107 2108 static bool __is_rx_listener_equal(const struct mlxsw_rx_listener *rxl_a, 2109 const struct mlxsw_rx_listener *rxl_b) 2110 { 2111 return (rxl_a->func == rxl_b->func && 2112 rxl_a->local_port == rxl_b->local_port && 2113 rxl_a->trap_id == rxl_b->trap_id && 2114 rxl_a->mirror_reason == rxl_b->mirror_reason); 2115 } 2116 2117 static struct mlxsw_rx_listener_item * 2118 __find_rx_listener_item(struct mlxsw_core *mlxsw_core, 2119 const struct mlxsw_rx_listener *rxl) 2120 { 2121 struct mlxsw_rx_listener_item *rxl_item; 2122 2123 list_for_each_entry(rxl_item, &mlxsw_core->rx_listener_list, list) { 2124 if (__is_rx_listener_equal(&rxl_item->rxl, rxl)) 2125 return rxl_item; 2126 } 2127 return NULL; 2128 } 2129 2130 int mlxsw_core_rx_listener_register(struct mlxsw_core *mlxsw_core, 2131 const struct mlxsw_rx_listener *rxl, 2132 void *priv, bool enabled) 2133 { 2134 struct mlxsw_rx_listener_item *rxl_item; 2135 2136 rxl_item = __find_rx_listener_item(mlxsw_core, rxl); 2137 if (rxl_item) 2138 return -EEXIST; 2139 rxl_item = kmalloc(sizeof(*rxl_item), GFP_KERNEL); 2140 if (!rxl_item) 2141 return -ENOMEM; 2142 rxl_item->rxl = *rxl; 2143 rxl_item->priv = priv; 2144 rxl_item->enabled = enabled; 2145 2146 list_add_rcu(&rxl_item->list, &mlxsw_core->rx_listener_list); 2147 return 0; 2148 } 2149 EXPORT_SYMBOL(mlxsw_core_rx_listener_register); 2150 2151 void mlxsw_core_rx_listener_unregister(struct mlxsw_core *mlxsw_core, 2152 const struct mlxsw_rx_listener *rxl) 2153 { 2154 struct mlxsw_rx_listener_item *rxl_item; 2155 2156 rxl_item = __find_rx_listener_item(mlxsw_core, rxl); 2157 if (!rxl_item) 2158 return; 2159 list_del_rcu(&rxl_item->list); 2160 synchronize_rcu(); 2161 kfree(rxl_item); 2162 } 2163 EXPORT_SYMBOL(mlxsw_core_rx_listener_unregister); 2164 2165 static void 2166 mlxsw_core_rx_listener_state_set(struct mlxsw_core *mlxsw_core, 2167 const struct mlxsw_rx_listener *rxl, 2168 bool enabled) 2169 { 2170 struct mlxsw_rx_listener_item *rxl_item; 2171 2172 rxl_item = __find_rx_listener_item(mlxsw_core, rxl); 2173 if (WARN_ON(!rxl_item)) 2174 return; 2175 rxl_item->enabled = enabled; 2176 } 2177 2178 static void mlxsw_core_event_listener_func(struct sk_buff *skb, u8 local_port, 2179 void *priv) 2180 { 2181 struct mlxsw_event_listener_item *event_listener_item = priv; 2182 struct mlxsw_reg_info reg; 2183 char *payload; 2184 char *reg_tlv; 2185 char *op_tlv; 2186 2187 mlxsw_emad_tlv_parse(skb); 2188 op_tlv = mlxsw_emad_op_tlv(skb); 2189 reg_tlv = mlxsw_emad_reg_tlv(skb); 2190 2191 reg.id = mlxsw_emad_op_tlv_register_id_get(op_tlv); 2192 reg.len = (mlxsw_emad_reg_tlv_len_get(reg_tlv) - 1) * sizeof(u32); 2193 payload = mlxsw_emad_reg_payload(reg_tlv); 2194 event_listener_item->el.func(®, payload, event_listener_item->priv); 2195 dev_kfree_skb(skb); 2196 } 2197 2198 static bool __is_event_listener_equal(const struct mlxsw_event_listener *el_a, 2199 const struct mlxsw_event_listener *el_b) 2200 { 2201 return (el_a->func == el_b->func && 2202 el_a->trap_id == el_b->trap_id); 2203 } 2204 2205 static struct mlxsw_event_listener_item * 2206 __find_event_listener_item(struct mlxsw_core *mlxsw_core, 2207 const struct mlxsw_event_listener *el) 2208 { 2209 struct mlxsw_event_listener_item *el_item; 2210 2211 list_for_each_entry(el_item, &mlxsw_core->event_listener_list, list) { 2212 if (__is_event_listener_equal(&el_item->el, el)) 2213 return el_item; 2214 } 2215 return NULL; 2216 } 2217 2218 int mlxsw_core_event_listener_register(struct mlxsw_core *mlxsw_core, 2219 const struct mlxsw_event_listener *el, 2220 void *priv) 2221 { 2222 int err; 2223 struct mlxsw_event_listener_item *el_item; 2224 const struct mlxsw_rx_listener rxl = { 2225 .func = mlxsw_core_event_listener_func, 2226 .local_port = MLXSW_PORT_DONT_CARE, 2227 .trap_id = el->trap_id, 2228 }; 2229 2230 el_item = __find_event_listener_item(mlxsw_core, el); 2231 if (el_item) 2232 return -EEXIST; 2233 el_item = kmalloc(sizeof(*el_item), GFP_KERNEL); 2234 if (!el_item) 2235 return -ENOMEM; 2236 el_item->el = *el; 2237 el_item->priv = priv; 2238 2239 err = mlxsw_core_rx_listener_register(mlxsw_core, &rxl, el_item, true); 2240 if (err) 2241 goto err_rx_listener_register; 2242 2243 /* No reason to save item if we did not manage to register an RX 2244 * listener for it. 2245 */ 2246 list_add_rcu(&el_item->list, &mlxsw_core->event_listener_list); 2247 2248 return 0; 2249 2250 err_rx_listener_register: 2251 kfree(el_item); 2252 return err; 2253 } 2254 EXPORT_SYMBOL(mlxsw_core_event_listener_register); 2255 2256 void mlxsw_core_event_listener_unregister(struct mlxsw_core *mlxsw_core, 2257 const struct mlxsw_event_listener *el) 2258 { 2259 struct mlxsw_event_listener_item *el_item; 2260 const struct mlxsw_rx_listener rxl = { 2261 .func = mlxsw_core_event_listener_func, 2262 .local_port = MLXSW_PORT_DONT_CARE, 2263 .trap_id = el->trap_id, 2264 }; 2265 2266 el_item = __find_event_listener_item(mlxsw_core, el); 2267 if (!el_item) 2268 return; 2269 mlxsw_core_rx_listener_unregister(mlxsw_core, &rxl); 2270 list_del(&el_item->list); 2271 kfree(el_item); 2272 } 2273 EXPORT_SYMBOL(mlxsw_core_event_listener_unregister); 2274 2275 static int mlxsw_core_listener_register(struct mlxsw_core *mlxsw_core, 2276 const struct mlxsw_listener *listener, 2277 void *priv, bool enabled) 2278 { 2279 if (listener->is_event) { 2280 WARN_ON(!enabled); 2281 return mlxsw_core_event_listener_register(mlxsw_core, 2282 &listener->event_listener, 2283 priv); 2284 } else { 2285 return mlxsw_core_rx_listener_register(mlxsw_core, 2286 &listener->rx_listener, 2287 priv, enabled); 2288 } 2289 } 2290 2291 static void mlxsw_core_listener_unregister(struct mlxsw_core *mlxsw_core, 2292 const struct mlxsw_listener *listener, 2293 void *priv) 2294 { 2295 if (listener->is_event) 2296 mlxsw_core_event_listener_unregister(mlxsw_core, 2297 &listener->event_listener); 2298 else 2299 mlxsw_core_rx_listener_unregister(mlxsw_core, 2300 &listener->rx_listener); 2301 } 2302 2303 int mlxsw_core_trap_register(struct mlxsw_core *mlxsw_core, 2304 const struct mlxsw_listener *listener, void *priv) 2305 { 2306 enum mlxsw_reg_htgt_trap_group trap_group; 2307 enum mlxsw_reg_hpkt_action action; 2308 char hpkt_pl[MLXSW_REG_HPKT_LEN]; 2309 int err; 2310 2311 err = mlxsw_core_listener_register(mlxsw_core, listener, priv, 2312 listener->enabled_on_register); 2313 if (err) 2314 return err; 2315 2316 action = listener->enabled_on_register ? listener->en_action : 2317 listener->dis_action; 2318 trap_group = listener->enabled_on_register ? listener->en_trap_group : 2319 listener->dis_trap_group; 2320 mlxsw_reg_hpkt_pack(hpkt_pl, action, listener->trap_id, 2321 trap_group, listener->is_ctrl); 2322 err = mlxsw_reg_write(mlxsw_core, MLXSW_REG(hpkt), hpkt_pl); 2323 if (err) 2324 goto err_trap_set; 2325 2326 return 0; 2327 2328 err_trap_set: 2329 mlxsw_core_listener_unregister(mlxsw_core, listener, priv); 2330 return err; 2331 } 2332 EXPORT_SYMBOL(mlxsw_core_trap_register); 2333 2334 void mlxsw_core_trap_unregister(struct mlxsw_core *mlxsw_core, 2335 const struct mlxsw_listener *listener, 2336 void *priv) 2337 { 2338 char hpkt_pl[MLXSW_REG_HPKT_LEN]; 2339 2340 if (!listener->is_event) { 2341 mlxsw_reg_hpkt_pack(hpkt_pl, listener->dis_action, 2342 listener->trap_id, listener->dis_trap_group, 2343 listener->is_ctrl); 2344 mlxsw_reg_write(mlxsw_core, MLXSW_REG(hpkt), hpkt_pl); 2345 } 2346 2347 mlxsw_core_listener_unregister(mlxsw_core, listener, priv); 2348 } 2349 EXPORT_SYMBOL(mlxsw_core_trap_unregister); 2350 2351 int mlxsw_core_trap_state_set(struct mlxsw_core *mlxsw_core, 2352 const struct mlxsw_listener *listener, 2353 bool enabled) 2354 { 2355 enum mlxsw_reg_htgt_trap_group trap_group; 2356 enum mlxsw_reg_hpkt_action action; 2357 char hpkt_pl[MLXSW_REG_HPKT_LEN]; 2358 int err; 2359 2360 /* Not supported for event listener */ 2361 if (WARN_ON(listener->is_event)) 2362 return -EINVAL; 2363 2364 action = enabled ? listener->en_action : listener->dis_action; 2365 trap_group = enabled ? listener->en_trap_group : 2366 listener->dis_trap_group; 2367 mlxsw_reg_hpkt_pack(hpkt_pl, action, listener->trap_id, 2368 trap_group, listener->is_ctrl); 2369 err = mlxsw_reg_write(mlxsw_core, MLXSW_REG(hpkt), hpkt_pl); 2370 if (err) 2371 return err; 2372 2373 mlxsw_core_rx_listener_state_set(mlxsw_core, &listener->rx_listener, 2374 enabled); 2375 return 0; 2376 } 2377 EXPORT_SYMBOL(mlxsw_core_trap_state_set); 2378 2379 static u64 mlxsw_core_tid_get(struct mlxsw_core *mlxsw_core) 2380 { 2381 return atomic64_inc_return(&mlxsw_core->emad.tid); 2382 } 2383 2384 static int mlxsw_core_reg_access_emad(struct mlxsw_core *mlxsw_core, 2385 const struct mlxsw_reg_info *reg, 2386 char *payload, 2387 enum mlxsw_core_reg_access_type type, 2388 struct list_head *bulk_list, 2389 mlxsw_reg_trans_cb_t *cb, 2390 unsigned long cb_priv) 2391 { 2392 u64 tid = mlxsw_core_tid_get(mlxsw_core); 2393 struct mlxsw_reg_trans *trans; 2394 int err; 2395 2396 trans = kzalloc(sizeof(*trans), GFP_KERNEL); 2397 if (!trans) 2398 return -ENOMEM; 2399 2400 err = mlxsw_emad_reg_access(mlxsw_core, reg, payload, type, trans, 2401 bulk_list, cb, cb_priv, tid); 2402 if (err) { 2403 kfree_rcu(trans, rcu); 2404 return err; 2405 } 2406 return 0; 2407 } 2408 2409 int mlxsw_reg_trans_query(struct mlxsw_core *mlxsw_core, 2410 const struct mlxsw_reg_info *reg, char *payload, 2411 struct list_head *bulk_list, 2412 mlxsw_reg_trans_cb_t *cb, unsigned long cb_priv) 2413 { 2414 return mlxsw_core_reg_access_emad(mlxsw_core, reg, payload, 2415 MLXSW_CORE_REG_ACCESS_TYPE_QUERY, 2416 bulk_list, cb, cb_priv); 2417 } 2418 EXPORT_SYMBOL(mlxsw_reg_trans_query); 2419 2420 int mlxsw_reg_trans_write(struct mlxsw_core *mlxsw_core, 2421 const struct mlxsw_reg_info *reg, char *payload, 2422 struct list_head *bulk_list, 2423 mlxsw_reg_trans_cb_t *cb, unsigned long cb_priv) 2424 { 2425 return mlxsw_core_reg_access_emad(mlxsw_core, reg, payload, 2426 MLXSW_CORE_REG_ACCESS_TYPE_WRITE, 2427 bulk_list, cb, cb_priv); 2428 } 2429 EXPORT_SYMBOL(mlxsw_reg_trans_write); 2430 2431 #define MLXSW_REG_TRANS_ERR_STRING_SIZE 256 2432 2433 static int mlxsw_reg_trans_wait(struct mlxsw_reg_trans *trans) 2434 { 2435 char err_string[MLXSW_REG_TRANS_ERR_STRING_SIZE]; 2436 struct mlxsw_core *mlxsw_core = trans->core; 2437 int err; 2438 2439 wait_for_completion(&trans->completion); 2440 cancel_delayed_work_sync(&trans->timeout_dw); 2441 err = trans->err; 2442 2443 if (trans->retries) 2444 dev_warn(mlxsw_core->bus_info->dev, "EMAD retries (%d/%d) (tid=%llx)\n", 2445 trans->retries, MLXSW_EMAD_MAX_RETRY, trans->tid); 2446 if (err) { 2447 dev_err(mlxsw_core->bus_info->dev, "EMAD reg access failed (tid=%llx,reg_id=%x(%s),type=%s,status=%x(%s))\n", 2448 trans->tid, trans->reg->id, 2449 mlxsw_reg_id_str(trans->reg->id), 2450 mlxsw_core_reg_access_type_str(trans->type), 2451 trans->emad_status, 2452 mlxsw_emad_op_tlv_status_str(trans->emad_status)); 2453 2454 snprintf(err_string, MLXSW_REG_TRANS_ERR_STRING_SIZE, 2455 "(tid=%llx,reg_id=%x(%s)) %s (%s)\n", trans->tid, 2456 trans->reg->id, mlxsw_reg_id_str(trans->reg->id), 2457 mlxsw_emad_op_tlv_status_str(trans->emad_status), 2458 trans->emad_err_string ? trans->emad_err_string : ""); 2459 2460 trace_devlink_hwerr(priv_to_devlink(mlxsw_core), 2461 trans->emad_status, err_string); 2462 2463 kfree(trans->emad_err_string); 2464 } 2465 2466 list_del(&trans->bulk_list); 2467 kfree_rcu(trans, rcu); 2468 return err; 2469 } 2470 2471 int mlxsw_reg_trans_bulk_wait(struct list_head *bulk_list) 2472 { 2473 struct mlxsw_reg_trans *trans; 2474 struct mlxsw_reg_trans *tmp; 2475 int sum_err = 0; 2476 int err; 2477 2478 list_for_each_entry_safe(trans, tmp, bulk_list, bulk_list) { 2479 err = mlxsw_reg_trans_wait(trans); 2480 if (err && sum_err == 0) 2481 sum_err = err; /* first error to be returned */ 2482 } 2483 return sum_err; 2484 } 2485 EXPORT_SYMBOL(mlxsw_reg_trans_bulk_wait); 2486 2487 static int mlxsw_core_reg_access_cmd(struct mlxsw_core *mlxsw_core, 2488 const struct mlxsw_reg_info *reg, 2489 char *payload, 2490 enum mlxsw_core_reg_access_type type) 2491 { 2492 enum mlxsw_emad_op_tlv_status status; 2493 int err, n_retry; 2494 bool reset_ok; 2495 char *in_mbox, *out_mbox, *tmp; 2496 2497 dev_dbg(mlxsw_core->bus_info->dev, "Reg cmd access (reg_id=%x(%s),type=%s)\n", 2498 reg->id, mlxsw_reg_id_str(reg->id), 2499 mlxsw_core_reg_access_type_str(type)); 2500 2501 in_mbox = mlxsw_cmd_mbox_alloc(); 2502 if (!in_mbox) 2503 return -ENOMEM; 2504 2505 out_mbox = mlxsw_cmd_mbox_alloc(); 2506 if (!out_mbox) { 2507 err = -ENOMEM; 2508 goto free_in_mbox; 2509 } 2510 2511 mlxsw_emad_pack_op_tlv(in_mbox, reg, type, 2512 mlxsw_core_tid_get(mlxsw_core)); 2513 tmp = in_mbox + MLXSW_EMAD_OP_TLV_LEN * sizeof(u32); 2514 mlxsw_emad_pack_reg_tlv(tmp, reg, payload); 2515 2516 /* There is a special treatment needed for MRSR (reset) register. 2517 * The command interface will return error after the command 2518 * is executed, so tell the lower layer to expect it 2519 * and cope accordingly. 2520 */ 2521 reset_ok = reg->id == MLXSW_REG_MRSR_ID; 2522 2523 n_retry = 0; 2524 retry: 2525 err = mlxsw_cmd_access_reg(mlxsw_core, reset_ok, in_mbox, out_mbox); 2526 if (!err) { 2527 err = mlxsw_emad_process_status(out_mbox, &status); 2528 if (err) { 2529 if (err == -EAGAIN && n_retry++ < MLXSW_EMAD_MAX_RETRY) 2530 goto retry; 2531 dev_err(mlxsw_core->bus_info->dev, "Reg cmd access status failed (status=%x(%s))\n", 2532 status, mlxsw_emad_op_tlv_status_str(status)); 2533 } 2534 } 2535 2536 if (!err) 2537 memcpy(payload, mlxsw_emad_reg_payload_cmd(out_mbox), 2538 reg->len); 2539 2540 mlxsw_cmd_mbox_free(out_mbox); 2541 free_in_mbox: 2542 mlxsw_cmd_mbox_free(in_mbox); 2543 if (err) 2544 dev_err(mlxsw_core->bus_info->dev, "Reg cmd access failed (reg_id=%x(%s),type=%s)\n", 2545 reg->id, mlxsw_reg_id_str(reg->id), 2546 mlxsw_core_reg_access_type_str(type)); 2547 return err; 2548 } 2549 2550 static void mlxsw_core_reg_access_cb(struct mlxsw_core *mlxsw_core, 2551 char *payload, size_t payload_len, 2552 unsigned long cb_priv) 2553 { 2554 char *orig_payload = (char *) cb_priv; 2555 2556 memcpy(orig_payload, payload, payload_len); 2557 } 2558 2559 static int mlxsw_core_reg_access(struct mlxsw_core *mlxsw_core, 2560 const struct mlxsw_reg_info *reg, 2561 char *payload, 2562 enum mlxsw_core_reg_access_type type) 2563 { 2564 LIST_HEAD(bulk_list); 2565 int err; 2566 2567 /* During initialization EMAD interface is not available to us, 2568 * so we default to command interface. We switch to EMAD interface 2569 * after setting the appropriate traps. 2570 */ 2571 if (!mlxsw_core->emad.use_emad) 2572 return mlxsw_core_reg_access_cmd(mlxsw_core, reg, 2573 payload, type); 2574 2575 err = mlxsw_core_reg_access_emad(mlxsw_core, reg, 2576 payload, type, &bulk_list, 2577 mlxsw_core_reg_access_cb, 2578 (unsigned long) payload); 2579 if (err) 2580 return err; 2581 return mlxsw_reg_trans_bulk_wait(&bulk_list); 2582 } 2583 2584 int mlxsw_reg_query(struct mlxsw_core *mlxsw_core, 2585 const struct mlxsw_reg_info *reg, char *payload) 2586 { 2587 return mlxsw_core_reg_access(mlxsw_core, reg, payload, 2588 MLXSW_CORE_REG_ACCESS_TYPE_QUERY); 2589 } 2590 EXPORT_SYMBOL(mlxsw_reg_query); 2591 2592 int mlxsw_reg_write(struct mlxsw_core *mlxsw_core, 2593 const struct mlxsw_reg_info *reg, char *payload) 2594 { 2595 return mlxsw_core_reg_access(mlxsw_core, reg, payload, 2596 MLXSW_CORE_REG_ACCESS_TYPE_WRITE); 2597 } 2598 EXPORT_SYMBOL(mlxsw_reg_write); 2599 2600 void mlxsw_core_skb_receive(struct mlxsw_core *mlxsw_core, struct sk_buff *skb, 2601 struct mlxsw_rx_info *rx_info) 2602 { 2603 struct mlxsw_rx_listener_item *rxl_item; 2604 const struct mlxsw_rx_listener *rxl; 2605 u8 local_port; 2606 bool found = false; 2607 2608 if (rx_info->is_lag) { 2609 dev_dbg_ratelimited(mlxsw_core->bus_info->dev, "%s: lag_id = %d, lag_port_index = 0x%x\n", 2610 __func__, rx_info->u.lag_id, 2611 rx_info->trap_id); 2612 /* Upper layer does not care if the skb came from LAG or not, 2613 * so just get the local_port for the lag port and push it up. 2614 */ 2615 local_port = mlxsw_core_lag_mapping_get(mlxsw_core, 2616 rx_info->u.lag_id, 2617 rx_info->lag_port_index); 2618 } else { 2619 local_port = rx_info->u.sys_port; 2620 } 2621 2622 dev_dbg_ratelimited(mlxsw_core->bus_info->dev, "%s: local_port = %d, trap_id = 0x%x\n", 2623 __func__, local_port, rx_info->trap_id); 2624 2625 if ((rx_info->trap_id >= MLXSW_TRAP_ID_MAX) || 2626 (local_port >= mlxsw_core->max_ports)) 2627 goto drop; 2628 2629 rcu_read_lock(); 2630 list_for_each_entry_rcu(rxl_item, &mlxsw_core->rx_listener_list, list) { 2631 rxl = &rxl_item->rxl; 2632 if ((rxl->local_port == MLXSW_PORT_DONT_CARE || 2633 rxl->local_port == local_port) && 2634 rxl->trap_id == rx_info->trap_id && 2635 rxl->mirror_reason == rx_info->mirror_reason) { 2636 if (rxl_item->enabled) 2637 found = true; 2638 break; 2639 } 2640 } 2641 if (!found) { 2642 rcu_read_unlock(); 2643 goto drop; 2644 } 2645 2646 rxl->func(skb, local_port, rxl_item->priv); 2647 rcu_read_unlock(); 2648 return; 2649 2650 drop: 2651 dev_kfree_skb(skb); 2652 } 2653 EXPORT_SYMBOL(mlxsw_core_skb_receive); 2654 2655 static int mlxsw_core_lag_mapping_index(struct mlxsw_core *mlxsw_core, 2656 u16 lag_id, u8 port_index) 2657 { 2658 return MLXSW_CORE_RES_GET(mlxsw_core, MAX_LAG_MEMBERS) * lag_id + 2659 port_index; 2660 } 2661 2662 void mlxsw_core_lag_mapping_set(struct mlxsw_core *mlxsw_core, 2663 u16 lag_id, u8 port_index, u8 local_port) 2664 { 2665 int index = mlxsw_core_lag_mapping_index(mlxsw_core, 2666 lag_id, port_index); 2667 2668 mlxsw_core->lag.mapping[index] = local_port; 2669 } 2670 EXPORT_SYMBOL(mlxsw_core_lag_mapping_set); 2671 2672 u8 mlxsw_core_lag_mapping_get(struct mlxsw_core *mlxsw_core, 2673 u16 lag_id, u8 port_index) 2674 { 2675 int index = mlxsw_core_lag_mapping_index(mlxsw_core, 2676 lag_id, port_index); 2677 2678 return mlxsw_core->lag.mapping[index]; 2679 } 2680 EXPORT_SYMBOL(mlxsw_core_lag_mapping_get); 2681 2682 void mlxsw_core_lag_mapping_clear(struct mlxsw_core *mlxsw_core, 2683 u16 lag_id, u8 local_port) 2684 { 2685 int i; 2686 2687 for (i = 0; i < MLXSW_CORE_RES_GET(mlxsw_core, MAX_LAG_MEMBERS); i++) { 2688 int index = mlxsw_core_lag_mapping_index(mlxsw_core, 2689 lag_id, i); 2690 2691 if (mlxsw_core->lag.mapping[index] == local_port) 2692 mlxsw_core->lag.mapping[index] = 0; 2693 } 2694 } 2695 EXPORT_SYMBOL(mlxsw_core_lag_mapping_clear); 2696 2697 bool mlxsw_core_res_valid(struct mlxsw_core *mlxsw_core, 2698 enum mlxsw_res_id res_id) 2699 { 2700 return mlxsw_res_valid(&mlxsw_core->res, res_id); 2701 } 2702 EXPORT_SYMBOL(mlxsw_core_res_valid); 2703 2704 u64 mlxsw_core_res_get(struct mlxsw_core *mlxsw_core, 2705 enum mlxsw_res_id res_id) 2706 { 2707 return mlxsw_res_get(&mlxsw_core->res, res_id); 2708 } 2709 EXPORT_SYMBOL(mlxsw_core_res_get); 2710 2711 static int __mlxsw_core_port_init(struct mlxsw_core *mlxsw_core, u8 local_port, 2712 enum devlink_port_flavour flavour, 2713 u32 port_number, bool split, 2714 u32 split_port_subnumber, 2715 bool splittable, u32 lanes, 2716 const unsigned char *switch_id, 2717 unsigned char switch_id_len) 2718 { 2719 struct devlink *devlink = priv_to_devlink(mlxsw_core); 2720 struct mlxsw_core_port *mlxsw_core_port = 2721 &mlxsw_core->ports[local_port]; 2722 struct devlink_port *devlink_port = &mlxsw_core_port->devlink_port; 2723 struct devlink_port_attrs attrs = {}; 2724 int err; 2725 2726 attrs.split = split; 2727 attrs.lanes = lanes; 2728 attrs.splittable = splittable; 2729 attrs.flavour = flavour; 2730 attrs.phys.port_number = port_number; 2731 attrs.phys.split_subport_number = split_port_subnumber; 2732 memcpy(attrs.switch_id.id, switch_id, switch_id_len); 2733 attrs.switch_id.id_len = switch_id_len; 2734 mlxsw_core_port->local_port = local_port; 2735 devlink_port_attrs_set(devlink_port, &attrs); 2736 err = devlink_port_register(devlink, devlink_port, local_port); 2737 if (err) 2738 memset(mlxsw_core_port, 0, sizeof(*mlxsw_core_port)); 2739 return err; 2740 } 2741 2742 static void __mlxsw_core_port_fini(struct mlxsw_core *mlxsw_core, u8 local_port) 2743 { 2744 struct mlxsw_core_port *mlxsw_core_port = 2745 &mlxsw_core->ports[local_port]; 2746 struct devlink_port *devlink_port = &mlxsw_core_port->devlink_port; 2747 2748 devlink_port_unregister(devlink_port); 2749 memset(mlxsw_core_port, 0, sizeof(*mlxsw_core_port)); 2750 } 2751 2752 int mlxsw_core_port_init(struct mlxsw_core *mlxsw_core, u8 local_port, 2753 u32 port_number, bool split, 2754 u32 split_port_subnumber, 2755 bool splittable, u32 lanes, 2756 const unsigned char *switch_id, 2757 unsigned char switch_id_len) 2758 { 2759 return __mlxsw_core_port_init(mlxsw_core, local_port, 2760 DEVLINK_PORT_FLAVOUR_PHYSICAL, 2761 port_number, split, split_port_subnumber, 2762 splittable, lanes, 2763 switch_id, switch_id_len); 2764 } 2765 EXPORT_SYMBOL(mlxsw_core_port_init); 2766 2767 void mlxsw_core_port_fini(struct mlxsw_core *mlxsw_core, u8 local_port) 2768 { 2769 __mlxsw_core_port_fini(mlxsw_core, local_port); 2770 } 2771 EXPORT_SYMBOL(mlxsw_core_port_fini); 2772 2773 int mlxsw_core_cpu_port_init(struct mlxsw_core *mlxsw_core, 2774 void *port_driver_priv, 2775 const unsigned char *switch_id, 2776 unsigned char switch_id_len) 2777 { 2778 struct mlxsw_core_port *mlxsw_core_port = 2779 &mlxsw_core->ports[MLXSW_PORT_CPU_PORT]; 2780 int err; 2781 2782 err = __mlxsw_core_port_init(mlxsw_core, MLXSW_PORT_CPU_PORT, 2783 DEVLINK_PORT_FLAVOUR_CPU, 2784 0, false, 0, false, 0, 2785 switch_id, switch_id_len); 2786 if (err) 2787 return err; 2788 2789 mlxsw_core_port->port_driver_priv = port_driver_priv; 2790 return 0; 2791 } 2792 EXPORT_SYMBOL(mlxsw_core_cpu_port_init); 2793 2794 void mlxsw_core_cpu_port_fini(struct mlxsw_core *mlxsw_core) 2795 { 2796 __mlxsw_core_port_fini(mlxsw_core, MLXSW_PORT_CPU_PORT); 2797 } 2798 EXPORT_SYMBOL(mlxsw_core_cpu_port_fini); 2799 2800 void mlxsw_core_port_eth_set(struct mlxsw_core *mlxsw_core, u8 local_port, 2801 void *port_driver_priv, struct net_device *dev) 2802 { 2803 struct mlxsw_core_port *mlxsw_core_port = 2804 &mlxsw_core->ports[local_port]; 2805 struct devlink_port *devlink_port = &mlxsw_core_port->devlink_port; 2806 2807 mlxsw_core_port->port_driver_priv = port_driver_priv; 2808 devlink_port_type_eth_set(devlink_port, dev); 2809 } 2810 EXPORT_SYMBOL(mlxsw_core_port_eth_set); 2811 2812 void mlxsw_core_port_ib_set(struct mlxsw_core *mlxsw_core, u8 local_port, 2813 void *port_driver_priv) 2814 { 2815 struct mlxsw_core_port *mlxsw_core_port = 2816 &mlxsw_core->ports[local_port]; 2817 struct devlink_port *devlink_port = &mlxsw_core_port->devlink_port; 2818 2819 mlxsw_core_port->port_driver_priv = port_driver_priv; 2820 devlink_port_type_ib_set(devlink_port, NULL); 2821 } 2822 EXPORT_SYMBOL(mlxsw_core_port_ib_set); 2823 2824 void mlxsw_core_port_clear(struct mlxsw_core *mlxsw_core, u8 local_port, 2825 void *port_driver_priv) 2826 { 2827 struct mlxsw_core_port *mlxsw_core_port = 2828 &mlxsw_core->ports[local_port]; 2829 struct devlink_port *devlink_port = &mlxsw_core_port->devlink_port; 2830 2831 mlxsw_core_port->port_driver_priv = port_driver_priv; 2832 devlink_port_type_clear(devlink_port); 2833 } 2834 EXPORT_SYMBOL(mlxsw_core_port_clear); 2835 2836 enum devlink_port_type mlxsw_core_port_type_get(struct mlxsw_core *mlxsw_core, 2837 u8 local_port) 2838 { 2839 struct mlxsw_core_port *mlxsw_core_port = 2840 &mlxsw_core->ports[local_port]; 2841 struct devlink_port *devlink_port = &mlxsw_core_port->devlink_port; 2842 2843 return devlink_port->type; 2844 } 2845 EXPORT_SYMBOL(mlxsw_core_port_type_get); 2846 2847 2848 struct devlink_port * 2849 mlxsw_core_port_devlink_port_get(struct mlxsw_core *mlxsw_core, 2850 u8 local_port) 2851 { 2852 struct mlxsw_core_port *mlxsw_core_port = 2853 &mlxsw_core->ports[local_port]; 2854 struct devlink_port *devlink_port = &mlxsw_core_port->devlink_port; 2855 2856 return devlink_port; 2857 } 2858 EXPORT_SYMBOL(mlxsw_core_port_devlink_port_get); 2859 2860 struct mlxsw_env *mlxsw_core_env(const struct mlxsw_core *mlxsw_core) 2861 { 2862 return mlxsw_core->env; 2863 } 2864 2865 bool mlxsw_core_is_initialized(const struct mlxsw_core *mlxsw_core) 2866 { 2867 return mlxsw_core->is_initialized; 2868 } 2869 2870 int mlxsw_core_module_max_width(struct mlxsw_core *mlxsw_core, u8 module) 2871 { 2872 enum mlxsw_reg_pmtm_module_type module_type; 2873 char pmtm_pl[MLXSW_REG_PMTM_LEN]; 2874 int err; 2875 2876 mlxsw_reg_pmtm_pack(pmtm_pl, module); 2877 err = mlxsw_reg_query(mlxsw_core, MLXSW_REG(pmtm), pmtm_pl); 2878 if (err) 2879 return err; 2880 mlxsw_reg_pmtm_unpack(pmtm_pl, &module_type); 2881 2882 /* Here we need to get the module width according to the module type. */ 2883 2884 switch (module_type) { 2885 case MLXSW_REG_PMTM_MODULE_TYPE_C2C8X: 2886 case MLXSW_REG_PMTM_MODULE_TYPE_QSFP_DD: 2887 case MLXSW_REG_PMTM_MODULE_TYPE_OSFP: 2888 return 8; 2889 case MLXSW_REG_PMTM_MODULE_TYPE_C2C4X: 2890 case MLXSW_REG_PMTM_MODULE_TYPE_BP_4X: 2891 case MLXSW_REG_PMTM_MODULE_TYPE_QSFP: 2892 return 4; 2893 case MLXSW_REG_PMTM_MODULE_TYPE_C2C2X: 2894 case MLXSW_REG_PMTM_MODULE_TYPE_BP_2X: 2895 case MLXSW_REG_PMTM_MODULE_TYPE_SFP_DD: 2896 case MLXSW_REG_PMTM_MODULE_TYPE_DSFP: 2897 return 2; 2898 case MLXSW_REG_PMTM_MODULE_TYPE_C2C1X: 2899 case MLXSW_REG_PMTM_MODULE_TYPE_BP_1X: 2900 case MLXSW_REG_PMTM_MODULE_TYPE_SFP: 2901 return 1; 2902 default: 2903 return -EINVAL; 2904 } 2905 } 2906 EXPORT_SYMBOL(mlxsw_core_module_max_width); 2907 2908 static void mlxsw_core_buf_dump_dbg(struct mlxsw_core *mlxsw_core, 2909 const char *buf, size_t size) 2910 { 2911 __be32 *m = (__be32 *) buf; 2912 int i; 2913 int count = size / sizeof(__be32); 2914 2915 for (i = count - 1; i >= 0; i--) 2916 if (m[i]) 2917 break; 2918 i++; 2919 count = i ? i : 1; 2920 for (i = 0; i < count; i += 4) 2921 dev_dbg(mlxsw_core->bus_info->dev, "%04x - %08x %08x %08x %08x\n", 2922 i * 4, be32_to_cpu(m[i]), be32_to_cpu(m[i + 1]), 2923 be32_to_cpu(m[i + 2]), be32_to_cpu(m[i + 3])); 2924 } 2925 2926 int mlxsw_cmd_exec(struct mlxsw_core *mlxsw_core, u16 opcode, u8 opcode_mod, 2927 u32 in_mod, bool out_mbox_direct, bool reset_ok, 2928 char *in_mbox, size_t in_mbox_size, 2929 char *out_mbox, size_t out_mbox_size) 2930 { 2931 u8 status; 2932 int err; 2933 2934 BUG_ON(in_mbox_size % sizeof(u32) || out_mbox_size % sizeof(u32)); 2935 if (!mlxsw_core->bus->cmd_exec) 2936 return -EOPNOTSUPP; 2937 2938 dev_dbg(mlxsw_core->bus_info->dev, "Cmd exec (opcode=%x(%s),opcode_mod=%x,in_mod=%x)\n", 2939 opcode, mlxsw_cmd_opcode_str(opcode), opcode_mod, in_mod); 2940 if (in_mbox) { 2941 dev_dbg(mlxsw_core->bus_info->dev, "Input mailbox:\n"); 2942 mlxsw_core_buf_dump_dbg(mlxsw_core, in_mbox, in_mbox_size); 2943 } 2944 2945 err = mlxsw_core->bus->cmd_exec(mlxsw_core->bus_priv, opcode, 2946 opcode_mod, in_mod, out_mbox_direct, 2947 in_mbox, in_mbox_size, 2948 out_mbox, out_mbox_size, &status); 2949 2950 if (!err && out_mbox) { 2951 dev_dbg(mlxsw_core->bus_info->dev, "Output mailbox:\n"); 2952 mlxsw_core_buf_dump_dbg(mlxsw_core, out_mbox, out_mbox_size); 2953 } 2954 2955 if (reset_ok && err == -EIO && 2956 status == MLXSW_CMD_STATUS_RUNNING_RESET) { 2957 err = 0; 2958 } else if (err == -EIO && status != MLXSW_CMD_STATUS_OK) { 2959 dev_err(mlxsw_core->bus_info->dev, "Cmd exec failed (opcode=%x(%s),opcode_mod=%x,in_mod=%x,status=%x(%s))\n", 2960 opcode, mlxsw_cmd_opcode_str(opcode), opcode_mod, 2961 in_mod, status, mlxsw_cmd_status_str(status)); 2962 } else if (err == -ETIMEDOUT) { 2963 dev_err(mlxsw_core->bus_info->dev, "Cmd exec timed-out (opcode=%x(%s),opcode_mod=%x,in_mod=%x)\n", 2964 opcode, mlxsw_cmd_opcode_str(opcode), opcode_mod, 2965 in_mod); 2966 } 2967 2968 return err; 2969 } 2970 EXPORT_SYMBOL(mlxsw_cmd_exec); 2971 2972 int mlxsw_core_schedule_dw(struct delayed_work *dwork, unsigned long delay) 2973 { 2974 return queue_delayed_work(mlxsw_wq, dwork, delay); 2975 } 2976 EXPORT_SYMBOL(mlxsw_core_schedule_dw); 2977 2978 bool mlxsw_core_schedule_work(struct work_struct *work) 2979 { 2980 return queue_work(mlxsw_owq, work); 2981 } 2982 EXPORT_SYMBOL(mlxsw_core_schedule_work); 2983 2984 void mlxsw_core_flush_owq(void) 2985 { 2986 flush_workqueue(mlxsw_owq); 2987 } 2988 EXPORT_SYMBOL(mlxsw_core_flush_owq); 2989 2990 int mlxsw_core_kvd_sizes_get(struct mlxsw_core *mlxsw_core, 2991 const struct mlxsw_config_profile *profile, 2992 u64 *p_single_size, u64 *p_double_size, 2993 u64 *p_linear_size) 2994 { 2995 struct mlxsw_driver *driver = mlxsw_core->driver; 2996 2997 if (!driver->kvd_sizes_get) 2998 return -EINVAL; 2999 3000 return driver->kvd_sizes_get(mlxsw_core, profile, 3001 p_single_size, p_double_size, 3002 p_linear_size); 3003 } 3004 EXPORT_SYMBOL(mlxsw_core_kvd_sizes_get); 3005 3006 int mlxsw_core_resources_query(struct mlxsw_core *mlxsw_core, char *mbox, 3007 struct mlxsw_res *res) 3008 { 3009 int index, i; 3010 u64 data; 3011 u16 id; 3012 int err; 3013 3014 if (!res) 3015 return 0; 3016 3017 mlxsw_cmd_mbox_zero(mbox); 3018 3019 for (index = 0; index < MLXSW_CMD_QUERY_RESOURCES_MAX_QUERIES; 3020 index++) { 3021 err = mlxsw_cmd_query_resources(mlxsw_core, mbox, index); 3022 if (err) 3023 return err; 3024 3025 for (i = 0; i < MLXSW_CMD_QUERY_RESOURCES_PER_QUERY; i++) { 3026 id = mlxsw_cmd_mbox_query_resource_id_get(mbox, i); 3027 data = mlxsw_cmd_mbox_query_resource_data_get(mbox, i); 3028 3029 if (id == MLXSW_CMD_QUERY_RESOURCES_TABLE_END_ID) 3030 return 0; 3031 3032 mlxsw_res_parse(res, id, data); 3033 } 3034 } 3035 3036 /* If after MLXSW_RESOURCES_QUERY_MAX_QUERIES we still didn't get 3037 * MLXSW_RESOURCES_TABLE_END_ID, something went bad in the FW. 3038 */ 3039 return -EIO; 3040 } 3041 EXPORT_SYMBOL(mlxsw_core_resources_query); 3042 3043 u32 mlxsw_core_read_frc_h(struct mlxsw_core *mlxsw_core) 3044 { 3045 return mlxsw_core->bus->read_frc_h(mlxsw_core->bus_priv); 3046 } 3047 EXPORT_SYMBOL(mlxsw_core_read_frc_h); 3048 3049 u32 mlxsw_core_read_frc_l(struct mlxsw_core *mlxsw_core) 3050 { 3051 return mlxsw_core->bus->read_frc_l(mlxsw_core->bus_priv); 3052 } 3053 EXPORT_SYMBOL(mlxsw_core_read_frc_l); 3054 3055 void mlxsw_core_emad_string_tlv_enable(struct mlxsw_core *mlxsw_core) 3056 { 3057 mlxsw_core->emad.enable_string_tlv = true; 3058 } 3059 EXPORT_SYMBOL(mlxsw_core_emad_string_tlv_enable); 3060 3061 static int __init mlxsw_core_module_init(void) 3062 { 3063 int err; 3064 3065 mlxsw_wq = alloc_workqueue(mlxsw_core_driver_name, 0, 0); 3066 if (!mlxsw_wq) 3067 return -ENOMEM; 3068 mlxsw_owq = alloc_ordered_workqueue("%s_ordered", 0, 3069 mlxsw_core_driver_name); 3070 if (!mlxsw_owq) { 3071 err = -ENOMEM; 3072 goto err_alloc_ordered_workqueue; 3073 } 3074 return 0; 3075 3076 err_alloc_ordered_workqueue: 3077 destroy_workqueue(mlxsw_wq); 3078 return err; 3079 } 3080 3081 static void __exit mlxsw_core_module_exit(void) 3082 { 3083 destroy_workqueue(mlxsw_owq); 3084 destroy_workqueue(mlxsw_wq); 3085 } 3086 3087 module_init(mlxsw_core_module_init); 3088 module_exit(mlxsw_core_module_exit); 3089 3090 MODULE_LICENSE("Dual BSD/GPL"); 3091 MODULE_AUTHOR("Jiri Pirko <jiri@mellanox.com>"); 3092 MODULE_DESCRIPTION("Mellanox switch device core driver"); 3093