1 // SPDX-License-Identifier: BSD-3-Clause OR GPL-2.0 2 /* Copyright (c) 2015-2018 Mellanox Technologies. All rights reserved */ 3 4 #include <linux/kernel.h> 5 #include <linux/module.h> 6 #include <linux/device.h> 7 #include <linux/export.h> 8 #include <linux/err.h> 9 #include <linux/if_link.h> 10 #include <linux/netdevice.h> 11 #include <linux/completion.h> 12 #include <linux/skbuff.h> 13 #include <linux/etherdevice.h> 14 #include <linux/types.h> 15 #include <linux/string.h> 16 #include <linux/gfp.h> 17 #include <linux/random.h> 18 #include <linux/jiffies.h> 19 #include <linux/mutex.h> 20 #include <linux/rcupdate.h> 21 #include <linux/slab.h> 22 #include <linux/workqueue.h> 23 #include <linux/firmware.h> 24 #include <asm/byteorder.h> 25 #include <net/devlink.h> 26 #include <trace/events/devlink.h> 27 28 #include "core.h" 29 #include "core_env.h" 30 #include "item.h" 31 #include "cmd.h" 32 #include "port.h" 33 #include "trap.h" 34 #include "emad.h" 35 #include "reg.h" 36 #include "resources.h" 37 #include "../mlxfw/mlxfw.h" 38 39 static LIST_HEAD(mlxsw_core_driver_list); 40 static DEFINE_SPINLOCK(mlxsw_core_driver_list_lock); 41 42 static const char mlxsw_core_driver_name[] = "mlxsw_core"; 43 44 static struct workqueue_struct *mlxsw_wq; 45 static struct workqueue_struct *mlxsw_owq; 46 47 struct mlxsw_core_port { 48 struct devlink_port devlink_port; 49 void *port_driver_priv; 50 u16 local_port; 51 struct mlxsw_linecard *linecard; 52 }; 53 54 void *mlxsw_core_port_driver_priv(struct mlxsw_core_port *mlxsw_core_port) 55 { 56 return mlxsw_core_port->port_driver_priv; 57 } 58 EXPORT_SYMBOL(mlxsw_core_port_driver_priv); 59 60 static bool mlxsw_core_port_check(struct mlxsw_core_port *mlxsw_core_port) 61 { 62 return mlxsw_core_port->port_driver_priv != NULL; 63 } 64 65 struct mlxsw_core { 66 struct mlxsw_driver *driver; 67 const struct mlxsw_bus *bus; 68 void *bus_priv; 69 const struct mlxsw_bus_info *bus_info; 70 struct workqueue_struct *emad_wq; 71 struct list_head rx_listener_list; 72 struct list_head event_listener_list; 73 struct list_head irq_event_handler_list; 74 struct mutex irq_event_handler_lock; /* Locks access to handlers list */ 75 struct { 76 atomic64_t tid; 77 struct list_head trans_list; 78 spinlock_t trans_list_lock; /* protects trans_list writes */ 79 bool use_emad; 80 bool enable_string_tlv; 81 } emad; 82 struct { 83 u16 *mapping; /* lag_id+port_index to local_port mapping */ 84 } lag; 85 struct mlxsw_res res; 86 struct mlxsw_hwmon *hwmon; 87 struct mlxsw_thermal *thermal; 88 struct mlxsw_linecards *linecards; 89 struct mlxsw_core_port *ports; 90 unsigned int max_ports; 91 atomic_t active_ports_count; 92 bool fw_flash_in_progress; 93 struct { 94 struct devlink_health_reporter *fw_fatal; 95 } health; 96 struct mlxsw_env *env; 97 unsigned long driver_priv[]; 98 /* driver_priv has to be always the last item */ 99 }; 100 101 struct mlxsw_linecards *mlxsw_core_linecards(struct mlxsw_core *mlxsw_core) 102 { 103 return mlxsw_core->linecards; 104 } 105 106 void mlxsw_core_linecards_set(struct mlxsw_core *mlxsw_core, 107 struct mlxsw_linecards *linecards) 108 { 109 mlxsw_core->linecards = linecards; 110 } 111 112 #define MLXSW_PORT_MAX_PORTS_DEFAULT 0x40 113 114 static u64 mlxsw_ports_occ_get(void *priv) 115 { 116 struct mlxsw_core *mlxsw_core = priv; 117 118 return atomic_read(&mlxsw_core->active_ports_count); 119 } 120 121 static int mlxsw_core_resources_ports_register(struct mlxsw_core *mlxsw_core) 122 { 123 struct devlink *devlink = priv_to_devlink(mlxsw_core); 124 struct devlink_resource_size_params ports_num_params; 125 u32 max_ports; 126 127 max_ports = mlxsw_core->max_ports - 1; 128 devlink_resource_size_params_init(&ports_num_params, max_ports, 129 max_ports, 1, 130 DEVLINK_RESOURCE_UNIT_ENTRY); 131 132 return devl_resource_register(devlink, 133 DEVLINK_RESOURCE_GENERIC_NAME_PORTS, 134 max_ports, MLXSW_CORE_RESOURCE_PORTS, 135 DEVLINK_RESOURCE_ID_PARENT_TOP, 136 &ports_num_params); 137 } 138 139 static int mlxsw_ports_init(struct mlxsw_core *mlxsw_core, bool reload) 140 { 141 struct devlink *devlink = priv_to_devlink(mlxsw_core); 142 int err; 143 144 /* Switch ports are numbered from 1 to queried value */ 145 if (MLXSW_CORE_RES_VALID(mlxsw_core, MAX_SYSTEM_PORT)) 146 mlxsw_core->max_ports = MLXSW_CORE_RES_GET(mlxsw_core, 147 MAX_SYSTEM_PORT) + 1; 148 else 149 mlxsw_core->max_ports = MLXSW_PORT_MAX_PORTS_DEFAULT + 1; 150 151 mlxsw_core->ports = kcalloc(mlxsw_core->max_ports, 152 sizeof(struct mlxsw_core_port), GFP_KERNEL); 153 if (!mlxsw_core->ports) 154 return -ENOMEM; 155 156 if (!reload) { 157 err = mlxsw_core_resources_ports_register(mlxsw_core); 158 if (err) 159 goto err_resources_ports_register; 160 } 161 atomic_set(&mlxsw_core->active_ports_count, 0); 162 devl_resource_occ_get_register(devlink, MLXSW_CORE_RESOURCE_PORTS, 163 mlxsw_ports_occ_get, mlxsw_core); 164 165 return 0; 166 167 err_resources_ports_register: 168 kfree(mlxsw_core->ports); 169 return err; 170 } 171 172 static void mlxsw_ports_fini(struct mlxsw_core *mlxsw_core, bool reload) 173 { 174 struct devlink *devlink = priv_to_devlink(mlxsw_core); 175 176 devl_resource_occ_get_unregister(devlink, MLXSW_CORE_RESOURCE_PORTS); 177 if (!reload) 178 devl_resources_unregister(priv_to_devlink(mlxsw_core)); 179 180 kfree(mlxsw_core->ports); 181 } 182 183 unsigned int mlxsw_core_max_ports(const struct mlxsw_core *mlxsw_core) 184 { 185 return mlxsw_core->max_ports; 186 } 187 EXPORT_SYMBOL(mlxsw_core_max_ports); 188 189 int mlxsw_core_max_lag(struct mlxsw_core *mlxsw_core, u16 *p_max_lag) 190 { 191 struct mlxsw_driver *driver = mlxsw_core->driver; 192 193 if (driver->profile->used_max_lag) { 194 *p_max_lag = driver->profile->max_lag; 195 return 0; 196 } 197 198 if (!MLXSW_CORE_RES_VALID(mlxsw_core, MAX_LAG)) 199 return -EIO; 200 201 *p_max_lag = MLXSW_CORE_RES_GET(mlxsw_core, MAX_LAG); 202 return 0; 203 } 204 EXPORT_SYMBOL(mlxsw_core_max_lag); 205 206 void *mlxsw_core_driver_priv(struct mlxsw_core *mlxsw_core) 207 { 208 return mlxsw_core->driver_priv; 209 } 210 EXPORT_SYMBOL(mlxsw_core_driver_priv); 211 212 bool 213 mlxsw_core_fw_rev_minor_subminor_validate(const struct mlxsw_fw_rev *rev, 214 const struct mlxsw_fw_rev *req_rev) 215 { 216 return rev->minor > req_rev->minor || 217 (rev->minor == req_rev->minor && 218 rev->subminor >= req_rev->subminor); 219 } 220 EXPORT_SYMBOL(mlxsw_core_fw_rev_minor_subminor_validate); 221 222 struct mlxsw_rx_listener_item { 223 struct list_head list; 224 struct mlxsw_rx_listener rxl; 225 void *priv; 226 bool enabled; 227 }; 228 229 struct mlxsw_event_listener_item { 230 struct list_head list; 231 struct mlxsw_core *mlxsw_core; 232 struct mlxsw_event_listener el; 233 void *priv; 234 }; 235 236 static const u8 mlxsw_core_trap_groups[] = { 237 MLXSW_REG_HTGT_TRAP_GROUP_EMAD, 238 MLXSW_REG_HTGT_TRAP_GROUP_CORE_EVENT, 239 }; 240 241 static int mlxsw_core_trap_groups_set(struct mlxsw_core *mlxsw_core) 242 { 243 char htgt_pl[MLXSW_REG_HTGT_LEN]; 244 int err; 245 int i; 246 247 if (!(mlxsw_core->bus->features & MLXSW_BUS_F_TXRX)) 248 return 0; 249 250 for (i = 0; i < ARRAY_SIZE(mlxsw_core_trap_groups); i++) { 251 mlxsw_reg_htgt_pack(htgt_pl, mlxsw_core_trap_groups[i], 252 MLXSW_REG_HTGT_INVALID_POLICER, 253 MLXSW_REG_HTGT_DEFAULT_PRIORITY, 254 MLXSW_REG_HTGT_DEFAULT_TC); 255 err = mlxsw_reg_write(mlxsw_core, MLXSW_REG(htgt), htgt_pl); 256 if (err) 257 return err; 258 } 259 return 0; 260 } 261 262 /****************** 263 * EMAD processing 264 ******************/ 265 266 /* emad_eth_hdr_dmac 267 * Destination MAC in EMAD's Ethernet header. 268 * Must be set to 01:02:c9:00:00:01 269 */ 270 MLXSW_ITEM_BUF(emad, eth_hdr, dmac, 0x00, 6); 271 272 /* emad_eth_hdr_smac 273 * Source MAC in EMAD's Ethernet header. 274 * Must be set to 00:02:c9:01:02:03 275 */ 276 MLXSW_ITEM_BUF(emad, eth_hdr, smac, 0x06, 6); 277 278 /* emad_eth_hdr_ethertype 279 * Ethertype in EMAD's Ethernet header. 280 * Must be set to 0x8932 281 */ 282 MLXSW_ITEM32(emad, eth_hdr, ethertype, 0x0C, 16, 16); 283 284 /* emad_eth_hdr_mlx_proto 285 * Mellanox protocol. 286 * Must be set to 0x0. 287 */ 288 MLXSW_ITEM32(emad, eth_hdr, mlx_proto, 0x0C, 8, 8); 289 290 /* emad_eth_hdr_ver 291 * Mellanox protocol version. 292 * Must be set to 0x0. 293 */ 294 MLXSW_ITEM32(emad, eth_hdr, ver, 0x0C, 4, 4); 295 296 /* emad_op_tlv_type 297 * Type of the TLV. 298 * Must be set to 0x1 (operation TLV). 299 */ 300 MLXSW_ITEM32(emad, op_tlv, type, 0x00, 27, 5); 301 302 /* emad_op_tlv_len 303 * Length of the operation TLV in u32. 304 * Must be set to 0x4. 305 */ 306 MLXSW_ITEM32(emad, op_tlv, len, 0x00, 16, 11); 307 308 /* emad_op_tlv_dr 309 * Direct route bit. Setting to 1 indicates the EMAD is a direct route 310 * EMAD. DR TLV must follow. 311 * 312 * Note: Currently not supported and must not be set. 313 */ 314 MLXSW_ITEM32(emad, op_tlv, dr, 0x00, 15, 1); 315 316 /* emad_op_tlv_status 317 * Returned status in case of EMAD response. Must be set to 0 in case 318 * of EMAD request. 319 * 0x0 - success 320 * 0x1 - device is busy. Requester should retry 321 * 0x2 - Mellanox protocol version not supported 322 * 0x3 - unknown TLV 323 * 0x4 - register not supported 324 * 0x5 - operation class not supported 325 * 0x6 - EMAD method not supported 326 * 0x7 - bad parameter (e.g. port out of range) 327 * 0x8 - resource not available 328 * 0x9 - message receipt acknowledgment. Requester should retry 329 * 0x70 - internal error 330 */ 331 MLXSW_ITEM32(emad, op_tlv, status, 0x00, 8, 7); 332 333 /* emad_op_tlv_register_id 334 * Register ID of register within register TLV. 335 */ 336 MLXSW_ITEM32(emad, op_tlv, register_id, 0x04, 16, 16); 337 338 /* emad_op_tlv_r 339 * Response bit. Setting to 1 indicates Response, otherwise request. 340 */ 341 MLXSW_ITEM32(emad, op_tlv, r, 0x04, 15, 1); 342 343 /* emad_op_tlv_method 344 * EMAD method type. 345 * 0x1 - query 346 * 0x2 - write 347 * 0x3 - send (currently not supported) 348 * 0x4 - event 349 */ 350 MLXSW_ITEM32(emad, op_tlv, method, 0x04, 8, 7); 351 352 /* emad_op_tlv_class 353 * EMAD operation class. Must be set to 0x1 (REG_ACCESS). 354 */ 355 MLXSW_ITEM32(emad, op_tlv, class, 0x04, 0, 8); 356 357 /* emad_op_tlv_tid 358 * EMAD transaction ID. Used for pairing request and response EMADs. 359 */ 360 MLXSW_ITEM64(emad, op_tlv, tid, 0x08, 0, 64); 361 362 /* emad_string_tlv_type 363 * Type of the TLV. 364 * Must be set to 0x2 (string TLV). 365 */ 366 MLXSW_ITEM32(emad, string_tlv, type, 0x00, 27, 5); 367 368 /* emad_string_tlv_len 369 * Length of the string TLV in u32. 370 */ 371 MLXSW_ITEM32(emad, string_tlv, len, 0x00, 16, 11); 372 373 #define MLXSW_EMAD_STRING_TLV_STRING_LEN 128 374 375 /* emad_string_tlv_string 376 * String provided by the device's firmware in case of erroneous register access 377 */ 378 MLXSW_ITEM_BUF(emad, string_tlv, string, 0x04, 379 MLXSW_EMAD_STRING_TLV_STRING_LEN); 380 381 /* emad_reg_tlv_type 382 * Type of the TLV. 383 * Must be set to 0x3 (register TLV). 384 */ 385 MLXSW_ITEM32(emad, reg_tlv, type, 0x00, 27, 5); 386 387 /* emad_reg_tlv_len 388 * Length of the operation TLV in u32. 389 */ 390 MLXSW_ITEM32(emad, reg_tlv, len, 0x00, 16, 11); 391 392 /* emad_end_tlv_type 393 * Type of the TLV. 394 * Must be set to 0x0 (end TLV). 395 */ 396 MLXSW_ITEM32(emad, end_tlv, type, 0x00, 27, 5); 397 398 /* emad_end_tlv_len 399 * Length of the end TLV in u32. 400 * Must be set to 1. 401 */ 402 MLXSW_ITEM32(emad, end_tlv, len, 0x00, 16, 11); 403 404 enum mlxsw_core_reg_access_type { 405 MLXSW_CORE_REG_ACCESS_TYPE_QUERY, 406 MLXSW_CORE_REG_ACCESS_TYPE_WRITE, 407 }; 408 409 static inline const char * 410 mlxsw_core_reg_access_type_str(enum mlxsw_core_reg_access_type type) 411 { 412 switch (type) { 413 case MLXSW_CORE_REG_ACCESS_TYPE_QUERY: 414 return "query"; 415 case MLXSW_CORE_REG_ACCESS_TYPE_WRITE: 416 return "write"; 417 } 418 BUG(); 419 } 420 421 static void mlxsw_emad_pack_end_tlv(char *end_tlv) 422 { 423 mlxsw_emad_end_tlv_type_set(end_tlv, MLXSW_EMAD_TLV_TYPE_END); 424 mlxsw_emad_end_tlv_len_set(end_tlv, MLXSW_EMAD_END_TLV_LEN); 425 } 426 427 static void mlxsw_emad_pack_reg_tlv(char *reg_tlv, 428 const struct mlxsw_reg_info *reg, 429 char *payload) 430 { 431 mlxsw_emad_reg_tlv_type_set(reg_tlv, MLXSW_EMAD_TLV_TYPE_REG); 432 mlxsw_emad_reg_tlv_len_set(reg_tlv, reg->len / sizeof(u32) + 1); 433 memcpy(reg_tlv + sizeof(u32), payload, reg->len); 434 } 435 436 static void mlxsw_emad_pack_string_tlv(char *string_tlv) 437 { 438 mlxsw_emad_string_tlv_type_set(string_tlv, MLXSW_EMAD_TLV_TYPE_STRING); 439 mlxsw_emad_string_tlv_len_set(string_tlv, MLXSW_EMAD_STRING_TLV_LEN); 440 } 441 442 static void mlxsw_emad_pack_op_tlv(char *op_tlv, 443 const struct mlxsw_reg_info *reg, 444 enum mlxsw_core_reg_access_type type, 445 u64 tid) 446 { 447 mlxsw_emad_op_tlv_type_set(op_tlv, MLXSW_EMAD_TLV_TYPE_OP); 448 mlxsw_emad_op_tlv_len_set(op_tlv, MLXSW_EMAD_OP_TLV_LEN); 449 mlxsw_emad_op_tlv_dr_set(op_tlv, 0); 450 mlxsw_emad_op_tlv_status_set(op_tlv, 0); 451 mlxsw_emad_op_tlv_register_id_set(op_tlv, reg->id); 452 mlxsw_emad_op_tlv_r_set(op_tlv, MLXSW_EMAD_OP_TLV_REQUEST); 453 if (type == MLXSW_CORE_REG_ACCESS_TYPE_QUERY) 454 mlxsw_emad_op_tlv_method_set(op_tlv, 455 MLXSW_EMAD_OP_TLV_METHOD_QUERY); 456 else 457 mlxsw_emad_op_tlv_method_set(op_tlv, 458 MLXSW_EMAD_OP_TLV_METHOD_WRITE); 459 mlxsw_emad_op_tlv_class_set(op_tlv, 460 MLXSW_EMAD_OP_TLV_CLASS_REG_ACCESS); 461 mlxsw_emad_op_tlv_tid_set(op_tlv, tid); 462 } 463 464 static int mlxsw_emad_construct_eth_hdr(struct sk_buff *skb) 465 { 466 char *eth_hdr = skb_push(skb, MLXSW_EMAD_ETH_HDR_LEN); 467 468 mlxsw_emad_eth_hdr_dmac_memcpy_to(eth_hdr, MLXSW_EMAD_EH_DMAC); 469 mlxsw_emad_eth_hdr_smac_memcpy_to(eth_hdr, MLXSW_EMAD_EH_SMAC); 470 mlxsw_emad_eth_hdr_ethertype_set(eth_hdr, MLXSW_EMAD_EH_ETHERTYPE); 471 mlxsw_emad_eth_hdr_mlx_proto_set(eth_hdr, MLXSW_EMAD_EH_MLX_PROTO); 472 mlxsw_emad_eth_hdr_ver_set(eth_hdr, MLXSW_EMAD_EH_PROTO_VERSION); 473 474 skb_reset_mac_header(skb); 475 476 return 0; 477 } 478 479 static void mlxsw_emad_construct(struct sk_buff *skb, 480 const struct mlxsw_reg_info *reg, 481 char *payload, 482 enum mlxsw_core_reg_access_type type, 483 u64 tid, bool enable_string_tlv) 484 { 485 char *buf; 486 487 buf = skb_push(skb, MLXSW_EMAD_END_TLV_LEN * sizeof(u32)); 488 mlxsw_emad_pack_end_tlv(buf); 489 490 buf = skb_push(skb, reg->len + sizeof(u32)); 491 mlxsw_emad_pack_reg_tlv(buf, reg, payload); 492 493 if (enable_string_tlv) { 494 buf = skb_push(skb, MLXSW_EMAD_STRING_TLV_LEN * sizeof(u32)); 495 mlxsw_emad_pack_string_tlv(buf); 496 } 497 498 buf = skb_push(skb, MLXSW_EMAD_OP_TLV_LEN * sizeof(u32)); 499 mlxsw_emad_pack_op_tlv(buf, reg, type, tid); 500 501 mlxsw_emad_construct_eth_hdr(skb); 502 } 503 504 struct mlxsw_emad_tlv_offsets { 505 u16 op_tlv; 506 u16 string_tlv; 507 u16 reg_tlv; 508 }; 509 510 static bool mlxsw_emad_tlv_is_string_tlv(const char *tlv) 511 { 512 u8 tlv_type = mlxsw_emad_string_tlv_type_get(tlv); 513 514 return tlv_type == MLXSW_EMAD_TLV_TYPE_STRING; 515 } 516 517 static void mlxsw_emad_tlv_parse(struct sk_buff *skb) 518 { 519 struct mlxsw_emad_tlv_offsets *offsets = 520 (struct mlxsw_emad_tlv_offsets *) skb->cb; 521 522 offsets->op_tlv = MLXSW_EMAD_ETH_HDR_LEN; 523 offsets->string_tlv = 0; 524 offsets->reg_tlv = MLXSW_EMAD_ETH_HDR_LEN + 525 MLXSW_EMAD_OP_TLV_LEN * sizeof(u32); 526 527 /* If string TLV is present, it must come after the operation TLV. */ 528 if (mlxsw_emad_tlv_is_string_tlv(skb->data + offsets->reg_tlv)) { 529 offsets->string_tlv = offsets->reg_tlv; 530 offsets->reg_tlv += MLXSW_EMAD_STRING_TLV_LEN * sizeof(u32); 531 } 532 } 533 534 static char *mlxsw_emad_op_tlv(const struct sk_buff *skb) 535 { 536 struct mlxsw_emad_tlv_offsets *offsets = 537 (struct mlxsw_emad_tlv_offsets *) skb->cb; 538 539 return ((char *) (skb->data + offsets->op_tlv)); 540 } 541 542 static char *mlxsw_emad_string_tlv(const struct sk_buff *skb) 543 { 544 struct mlxsw_emad_tlv_offsets *offsets = 545 (struct mlxsw_emad_tlv_offsets *) skb->cb; 546 547 if (!offsets->string_tlv) 548 return NULL; 549 550 return ((char *) (skb->data + offsets->string_tlv)); 551 } 552 553 static char *mlxsw_emad_reg_tlv(const struct sk_buff *skb) 554 { 555 struct mlxsw_emad_tlv_offsets *offsets = 556 (struct mlxsw_emad_tlv_offsets *) skb->cb; 557 558 return ((char *) (skb->data + offsets->reg_tlv)); 559 } 560 561 static char *mlxsw_emad_reg_payload(const char *reg_tlv) 562 { 563 return ((char *) (reg_tlv + sizeof(u32))); 564 } 565 566 static char *mlxsw_emad_reg_payload_cmd(const char *mbox) 567 { 568 return ((char *) (mbox + (MLXSW_EMAD_OP_TLV_LEN + 1) * sizeof(u32))); 569 } 570 571 static u64 mlxsw_emad_get_tid(const struct sk_buff *skb) 572 { 573 char *op_tlv; 574 575 op_tlv = mlxsw_emad_op_tlv(skb); 576 return mlxsw_emad_op_tlv_tid_get(op_tlv); 577 } 578 579 static bool mlxsw_emad_is_resp(const struct sk_buff *skb) 580 { 581 char *op_tlv; 582 583 op_tlv = mlxsw_emad_op_tlv(skb); 584 return (mlxsw_emad_op_tlv_r_get(op_tlv) == MLXSW_EMAD_OP_TLV_RESPONSE); 585 } 586 587 static int mlxsw_emad_process_status(char *op_tlv, 588 enum mlxsw_emad_op_tlv_status *p_status) 589 { 590 *p_status = mlxsw_emad_op_tlv_status_get(op_tlv); 591 592 switch (*p_status) { 593 case MLXSW_EMAD_OP_TLV_STATUS_SUCCESS: 594 return 0; 595 case MLXSW_EMAD_OP_TLV_STATUS_BUSY: 596 case MLXSW_EMAD_OP_TLV_STATUS_MESSAGE_RECEIPT_ACK: 597 return -EAGAIN; 598 case MLXSW_EMAD_OP_TLV_STATUS_VERSION_NOT_SUPPORTED: 599 case MLXSW_EMAD_OP_TLV_STATUS_UNKNOWN_TLV: 600 case MLXSW_EMAD_OP_TLV_STATUS_REGISTER_NOT_SUPPORTED: 601 case MLXSW_EMAD_OP_TLV_STATUS_CLASS_NOT_SUPPORTED: 602 case MLXSW_EMAD_OP_TLV_STATUS_METHOD_NOT_SUPPORTED: 603 case MLXSW_EMAD_OP_TLV_STATUS_BAD_PARAMETER: 604 case MLXSW_EMAD_OP_TLV_STATUS_RESOURCE_NOT_AVAILABLE: 605 case MLXSW_EMAD_OP_TLV_STATUS_INTERNAL_ERROR: 606 default: 607 return -EIO; 608 } 609 } 610 611 static int 612 mlxsw_emad_process_status_skb(struct sk_buff *skb, 613 enum mlxsw_emad_op_tlv_status *p_status) 614 { 615 return mlxsw_emad_process_status(mlxsw_emad_op_tlv(skb), p_status); 616 } 617 618 struct mlxsw_reg_trans { 619 struct list_head list; 620 struct list_head bulk_list; 621 struct mlxsw_core *core; 622 struct sk_buff *tx_skb; 623 struct mlxsw_tx_info tx_info; 624 struct delayed_work timeout_dw; 625 unsigned int retries; 626 u64 tid; 627 struct completion completion; 628 atomic_t active; 629 mlxsw_reg_trans_cb_t *cb; 630 unsigned long cb_priv; 631 const struct mlxsw_reg_info *reg; 632 enum mlxsw_core_reg_access_type type; 633 int err; 634 char *emad_err_string; 635 enum mlxsw_emad_op_tlv_status emad_status; 636 struct rcu_head rcu; 637 }; 638 639 static void mlxsw_emad_process_string_tlv(const struct sk_buff *skb, 640 struct mlxsw_reg_trans *trans) 641 { 642 char *string_tlv; 643 char *string; 644 645 string_tlv = mlxsw_emad_string_tlv(skb); 646 if (!string_tlv) 647 return; 648 649 trans->emad_err_string = kzalloc(MLXSW_EMAD_STRING_TLV_STRING_LEN, 650 GFP_ATOMIC); 651 if (!trans->emad_err_string) 652 return; 653 654 string = mlxsw_emad_string_tlv_string_data(string_tlv); 655 strscpy(trans->emad_err_string, string, 656 MLXSW_EMAD_STRING_TLV_STRING_LEN); 657 } 658 659 #define MLXSW_EMAD_TIMEOUT_DURING_FW_FLASH_MS 3000 660 #define MLXSW_EMAD_TIMEOUT_MS 200 661 662 static void mlxsw_emad_trans_timeout_schedule(struct mlxsw_reg_trans *trans) 663 { 664 unsigned long timeout = msecs_to_jiffies(MLXSW_EMAD_TIMEOUT_MS); 665 666 if (trans->core->fw_flash_in_progress) 667 timeout = msecs_to_jiffies(MLXSW_EMAD_TIMEOUT_DURING_FW_FLASH_MS); 668 669 queue_delayed_work(trans->core->emad_wq, &trans->timeout_dw, 670 timeout << trans->retries); 671 } 672 673 static int mlxsw_emad_transmit(struct mlxsw_core *mlxsw_core, 674 struct mlxsw_reg_trans *trans) 675 { 676 struct sk_buff *skb; 677 int err; 678 679 skb = skb_clone(trans->tx_skb, GFP_KERNEL); 680 if (!skb) 681 return -ENOMEM; 682 683 trace_devlink_hwmsg(priv_to_devlink(mlxsw_core), false, 0, 684 skb->data + mlxsw_core->driver->txhdr_len, 685 skb->len - mlxsw_core->driver->txhdr_len); 686 687 atomic_set(&trans->active, 1); 688 err = mlxsw_core_skb_transmit(mlxsw_core, skb, &trans->tx_info); 689 if (err) { 690 dev_kfree_skb(skb); 691 return err; 692 } 693 mlxsw_emad_trans_timeout_schedule(trans); 694 return 0; 695 } 696 697 static void mlxsw_emad_trans_finish(struct mlxsw_reg_trans *trans, int err) 698 { 699 struct mlxsw_core *mlxsw_core = trans->core; 700 701 dev_kfree_skb(trans->tx_skb); 702 spin_lock_bh(&mlxsw_core->emad.trans_list_lock); 703 list_del_rcu(&trans->list); 704 spin_unlock_bh(&mlxsw_core->emad.trans_list_lock); 705 trans->err = err; 706 complete(&trans->completion); 707 } 708 709 static void mlxsw_emad_transmit_retry(struct mlxsw_core *mlxsw_core, 710 struct mlxsw_reg_trans *trans) 711 { 712 int err; 713 714 if (trans->retries < MLXSW_EMAD_MAX_RETRY) { 715 trans->retries++; 716 err = mlxsw_emad_transmit(trans->core, trans); 717 if (err == 0) 718 return; 719 720 if (!atomic_dec_and_test(&trans->active)) 721 return; 722 } else { 723 err = -EIO; 724 } 725 mlxsw_emad_trans_finish(trans, err); 726 } 727 728 static void mlxsw_emad_trans_timeout_work(struct work_struct *work) 729 { 730 struct mlxsw_reg_trans *trans = container_of(work, 731 struct mlxsw_reg_trans, 732 timeout_dw.work); 733 734 if (!atomic_dec_and_test(&trans->active)) 735 return; 736 737 mlxsw_emad_transmit_retry(trans->core, trans); 738 } 739 740 static void mlxsw_emad_process_response(struct mlxsw_core *mlxsw_core, 741 struct mlxsw_reg_trans *trans, 742 struct sk_buff *skb) 743 { 744 int err; 745 746 if (!atomic_dec_and_test(&trans->active)) 747 return; 748 749 err = mlxsw_emad_process_status_skb(skb, &trans->emad_status); 750 if (err == -EAGAIN) { 751 mlxsw_emad_transmit_retry(mlxsw_core, trans); 752 } else { 753 if (err == 0) { 754 char *reg_tlv = mlxsw_emad_reg_tlv(skb); 755 756 if (trans->cb) 757 trans->cb(mlxsw_core, 758 mlxsw_emad_reg_payload(reg_tlv), 759 trans->reg->len, trans->cb_priv); 760 } else { 761 mlxsw_emad_process_string_tlv(skb, trans); 762 } 763 mlxsw_emad_trans_finish(trans, err); 764 } 765 } 766 767 /* called with rcu read lock held */ 768 static void mlxsw_emad_rx_listener_func(struct sk_buff *skb, u16 local_port, 769 void *priv) 770 { 771 struct mlxsw_core *mlxsw_core = priv; 772 struct mlxsw_reg_trans *trans; 773 774 trace_devlink_hwmsg(priv_to_devlink(mlxsw_core), true, 0, 775 skb->data, skb->len); 776 777 mlxsw_emad_tlv_parse(skb); 778 779 if (!mlxsw_emad_is_resp(skb)) 780 goto free_skb; 781 782 list_for_each_entry_rcu(trans, &mlxsw_core->emad.trans_list, list) { 783 if (mlxsw_emad_get_tid(skb) == trans->tid) { 784 mlxsw_emad_process_response(mlxsw_core, trans, skb); 785 break; 786 } 787 } 788 789 free_skb: 790 dev_kfree_skb(skb); 791 } 792 793 static const struct mlxsw_listener mlxsw_emad_rx_listener = 794 MLXSW_RXL(mlxsw_emad_rx_listener_func, ETHEMAD, TRAP_TO_CPU, false, 795 EMAD, DISCARD); 796 797 static int mlxsw_emad_init(struct mlxsw_core *mlxsw_core) 798 { 799 struct workqueue_struct *emad_wq; 800 u64 tid; 801 int err; 802 803 if (!(mlxsw_core->bus->features & MLXSW_BUS_F_TXRX)) 804 return 0; 805 806 emad_wq = alloc_workqueue("mlxsw_core_emad", 0, 0); 807 if (!emad_wq) 808 return -ENOMEM; 809 mlxsw_core->emad_wq = emad_wq; 810 811 /* Set the upper 32 bits of the transaction ID field to a random 812 * number. This allows us to discard EMADs addressed to other 813 * devices. 814 */ 815 get_random_bytes(&tid, 4); 816 tid <<= 32; 817 atomic64_set(&mlxsw_core->emad.tid, tid); 818 819 INIT_LIST_HEAD(&mlxsw_core->emad.trans_list); 820 spin_lock_init(&mlxsw_core->emad.trans_list_lock); 821 822 err = mlxsw_core_trap_register(mlxsw_core, &mlxsw_emad_rx_listener, 823 mlxsw_core); 824 if (err) 825 goto err_trap_register; 826 827 mlxsw_core->emad.use_emad = true; 828 829 return 0; 830 831 err_trap_register: 832 destroy_workqueue(mlxsw_core->emad_wq); 833 return err; 834 } 835 836 static void mlxsw_emad_fini(struct mlxsw_core *mlxsw_core) 837 { 838 839 if (!(mlxsw_core->bus->features & MLXSW_BUS_F_TXRX)) 840 return; 841 842 mlxsw_core->emad.use_emad = false; 843 mlxsw_core_trap_unregister(mlxsw_core, &mlxsw_emad_rx_listener, 844 mlxsw_core); 845 destroy_workqueue(mlxsw_core->emad_wq); 846 } 847 848 static struct sk_buff *mlxsw_emad_alloc(const struct mlxsw_core *mlxsw_core, 849 u16 reg_len, bool enable_string_tlv) 850 { 851 struct sk_buff *skb; 852 u16 emad_len; 853 854 emad_len = (reg_len + sizeof(u32) + MLXSW_EMAD_ETH_HDR_LEN + 855 (MLXSW_EMAD_OP_TLV_LEN + MLXSW_EMAD_END_TLV_LEN) * 856 sizeof(u32) + mlxsw_core->driver->txhdr_len); 857 if (enable_string_tlv) 858 emad_len += MLXSW_EMAD_STRING_TLV_LEN * sizeof(u32); 859 if (emad_len > MLXSW_EMAD_MAX_FRAME_LEN) 860 return NULL; 861 862 skb = netdev_alloc_skb(NULL, emad_len); 863 if (!skb) 864 return NULL; 865 memset(skb->data, 0, emad_len); 866 skb_reserve(skb, emad_len); 867 868 return skb; 869 } 870 871 static int mlxsw_emad_reg_access(struct mlxsw_core *mlxsw_core, 872 const struct mlxsw_reg_info *reg, 873 char *payload, 874 enum mlxsw_core_reg_access_type type, 875 struct mlxsw_reg_trans *trans, 876 struct list_head *bulk_list, 877 mlxsw_reg_trans_cb_t *cb, 878 unsigned long cb_priv, u64 tid) 879 { 880 bool enable_string_tlv; 881 struct sk_buff *skb; 882 int err; 883 884 dev_dbg(mlxsw_core->bus_info->dev, "EMAD reg access (tid=%llx,reg_id=%x(%s),type=%s)\n", 885 tid, reg->id, mlxsw_reg_id_str(reg->id), 886 mlxsw_core_reg_access_type_str(type)); 887 888 /* Since this can be changed during emad_reg_access, read it once and 889 * use the value all the way. 890 */ 891 enable_string_tlv = mlxsw_core->emad.enable_string_tlv; 892 893 skb = mlxsw_emad_alloc(mlxsw_core, reg->len, enable_string_tlv); 894 if (!skb) 895 return -ENOMEM; 896 897 list_add_tail(&trans->bulk_list, bulk_list); 898 trans->core = mlxsw_core; 899 trans->tx_skb = skb; 900 trans->tx_info.local_port = MLXSW_PORT_CPU_PORT; 901 trans->tx_info.is_emad = true; 902 INIT_DELAYED_WORK(&trans->timeout_dw, mlxsw_emad_trans_timeout_work); 903 trans->tid = tid; 904 init_completion(&trans->completion); 905 trans->cb = cb; 906 trans->cb_priv = cb_priv; 907 trans->reg = reg; 908 trans->type = type; 909 910 mlxsw_emad_construct(skb, reg, payload, type, trans->tid, 911 enable_string_tlv); 912 mlxsw_core->driver->txhdr_construct(skb, &trans->tx_info); 913 914 spin_lock_bh(&mlxsw_core->emad.trans_list_lock); 915 list_add_tail_rcu(&trans->list, &mlxsw_core->emad.trans_list); 916 spin_unlock_bh(&mlxsw_core->emad.trans_list_lock); 917 err = mlxsw_emad_transmit(mlxsw_core, trans); 918 if (err) 919 goto err_out; 920 return 0; 921 922 err_out: 923 spin_lock_bh(&mlxsw_core->emad.trans_list_lock); 924 list_del_rcu(&trans->list); 925 spin_unlock_bh(&mlxsw_core->emad.trans_list_lock); 926 list_del(&trans->bulk_list); 927 dev_kfree_skb(trans->tx_skb); 928 return err; 929 } 930 931 /***************** 932 * Core functions 933 *****************/ 934 935 int mlxsw_core_driver_register(struct mlxsw_driver *mlxsw_driver) 936 { 937 spin_lock(&mlxsw_core_driver_list_lock); 938 list_add_tail(&mlxsw_driver->list, &mlxsw_core_driver_list); 939 spin_unlock(&mlxsw_core_driver_list_lock); 940 return 0; 941 } 942 EXPORT_SYMBOL(mlxsw_core_driver_register); 943 944 void mlxsw_core_driver_unregister(struct mlxsw_driver *mlxsw_driver) 945 { 946 spin_lock(&mlxsw_core_driver_list_lock); 947 list_del(&mlxsw_driver->list); 948 spin_unlock(&mlxsw_core_driver_list_lock); 949 } 950 EXPORT_SYMBOL(mlxsw_core_driver_unregister); 951 952 static struct mlxsw_driver *__driver_find(const char *kind) 953 { 954 struct mlxsw_driver *mlxsw_driver; 955 956 list_for_each_entry(mlxsw_driver, &mlxsw_core_driver_list, list) { 957 if (strcmp(mlxsw_driver->kind, kind) == 0) 958 return mlxsw_driver; 959 } 960 return NULL; 961 } 962 963 static struct mlxsw_driver *mlxsw_core_driver_get(const char *kind) 964 { 965 struct mlxsw_driver *mlxsw_driver; 966 967 spin_lock(&mlxsw_core_driver_list_lock); 968 mlxsw_driver = __driver_find(kind); 969 spin_unlock(&mlxsw_core_driver_list_lock); 970 return mlxsw_driver; 971 } 972 973 int mlxsw_core_fw_flash(struct mlxsw_core *mlxsw_core, 974 struct mlxfw_dev *mlxfw_dev, 975 const struct firmware *firmware, 976 struct netlink_ext_ack *extack) 977 { 978 int err; 979 980 mlxsw_core->fw_flash_in_progress = true; 981 err = mlxfw_firmware_flash(mlxfw_dev, firmware, extack); 982 mlxsw_core->fw_flash_in_progress = false; 983 984 return err; 985 } 986 987 struct mlxsw_core_fw_info { 988 struct mlxfw_dev mlxfw_dev; 989 struct mlxsw_core *mlxsw_core; 990 }; 991 992 static int mlxsw_core_fw_component_query(struct mlxfw_dev *mlxfw_dev, 993 u16 component_index, u32 *p_max_size, 994 u8 *p_align_bits, u16 *p_max_write_size) 995 { 996 struct mlxsw_core_fw_info *mlxsw_core_fw_info = 997 container_of(mlxfw_dev, struct mlxsw_core_fw_info, mlxfw_dev); 998 struct mlxsw_core *mlxsw_core = mlxsw_core_fw_info->mlxsw_core; 999 char mcqi_pl[MLXSW_REG_MCQI_LEN]; 1000 int err; 1001 1002 mlxsw_reg_mcqi_pack(mcqi_pl, component_index); 1003 err = mlxsw_reg_query(mlxsw_core, MLXSW_REG(mcqi), mcqi_pl); 1004 if (err) 1005 return err; 1006 mlxsw_reg_mcqi_unpack(mcqi_pl, p_max_size, p_align_bits, p_max_write_size); 1007 1008 *p_align_bits = max_t(u8, *p_align_bits, 2); 1009 *p_max_write_size = min_t(u16, *p_max_write_size, MLXSW_REG_MCDA_MAX_DATA_LEN); 1010 return 0; 1011 } 1012 1013 static int mlxsw_core_fw_fsm_lock(struct mlxfw_dev *mlxfw_dev, u32 *fwhandle) 1014 { 1015 struct mlxsw_core_fw_info *mlxsw_core_fw_info = 1016 container_of(mlxfw_dev, struct mlxsw_core_fw_info, mlxfw_dev); 1017 struct mlxsw_core *mlxsw_core = mlxsw_core_fw_info->mlxsw_core; 1018 char mcc_pl[MLXSW_REG_MCC_LEN]; 1019 u8 control_state; 1020 int err; 1021 1022 mlxsw_reg_mcc_pack(mcc_pl, 0, 0, 0, 0); 1023 err = mlxsw_reg_query(mlxsw_core, MLXSW_REG(mcc), mcc_pl); 1024 if (err) 1025 return err; 1026 1027 mlxsw_reg_mcc_unpack(mcc_pl, fwhandle, NULL, &control_state); 1028 if (control_state != MLXFW_FSM_STATE_IDLE) 1029 return -EBUSY; 1030 1031 mlxsw_reg_mcc_pack(mcc_pl, MLXSW_REG_MCC_INSTRUCTION_LOCK_UPDATE_HANDLE, 0, *fwhandle, 0); 1032 return mlxsw_reg_write(mlxsw_core, MLXSW_REG(mcc), mcc_pl); 1033 } 1034 1035 static int mlxsw_core_fw_fsm_component_update(struct mlxfw_dev *mlxfw_dev, u32 fwhandle, 1036 u16 component_index, u32 component_size) 1037 { 1038 struct mlxsw_core_fw_info *mlxsw_core_fw_info = 1039 container_of(mlxfw_dev, struct mlxsw_core_fw_info, mlxfw_dev); 1040 struct mlxsw_core *mlxsw_core = mlxsw_core_fw_info->mlxsw_core; 1041 char mcc_pl[MLXSW_REG_MCC_LEN]; 1042 1043 mlxsw_reg_mcc_pack(mcc_pl, MLXSW_REG_MCC_INSTRUCTION_UPDATE_COMPONENT, 1044 component_index, fwhandle, component_size); 1045 return mlxsw_reg_write(mlxsw_core, MLXSW_REG(mcc), mcc_pl); 1046 } 1047 1048 static int mlxsw_core_fw_fsm_block_download(struct mlxfw_dev *mlxfw_dev, u32 fwhandle, 1049 u8 *data, u16 size, u32 offset) 1050 { 1051 struct mlxsw_core_fw_info *mlxsw_core_fw_info = 1052 container_of(mlxfw_dev, struct mlxsw_core_fw_info, mlxfw_dev); 1053 struct mlxsw_core *mlxsw_core = mlxsw_core_fw_info->mlxsw_core; 1054 char mcda_pl[MLXSW_REG_MCDA_LEN]; 1055 1056 mlxsw_reg_mcda_pack(mcda_pl, fwhandle, offset, size, data); 1057 return mlxsw_reg_write(mlxsw_core, MLXSW_REG(mcda), mcda_pl); 1058 } 1059 1060 static int mlxsw_core_fw_fsm_component_verify(struct mlxfw_dev *mlxfw_dev, u32 fwhandle, 1061 u16 component_index) 1062 { 1063 struct mlxsw_core_fw_info *mlxsw_core_fw_info = 1064 container_of(mlxfw_dev, struct mlxsw_core_fw_info, mlxfw_dev); 1065 struct mlxsw_core *mlxsw_core = mlxsw_core_fw_info->mlxsw_core; 1066 char mcc_pl[MLXSW_REG_MCC_LEN]; 1067 1068 mlxsw_reg_mcc_pack(mcc_pl, MLXSW_REG_MCC_INSTRUCTION_VERIFY_COMPONENT, 1069 component_index, fwhandle, 0); 1070 return mlxsw_reg_write(mlxsw_core, MLXSW_REG(mcc), mcc_pl); 1071 } 1072 1073 static int mlxsw_core_fw_fsm_activate(struct mlxfw_dev *mlxfw_dev, u32 fwhandle) 1074 { 1075 struct mlxsw_core_fw_info *mlxsw_core_fw_info = 1076 container_of(mlxfw_dev, struct mlxsw_core_fw_info, mlxfw_dev); 1077 struct mlxsw_core *mlxsw_core = mlxsw_core_fw_info->mlxsw_core; 1078 char mcc_pl[MLXSW_REG_MCC_LEN]; 1079 1080 mlxsw_reg_mcc_pack(mcc_pl, MLXSW_REG_MCC_INSTRUCTION_ACTIVATE, 0, fwhandle, 0); 1081 return mlxsw_reg_write(mlxsw_core, MLXSW_REG(mcc), mcc_pl); 1082 } 1083 1084 static int mlxsw_core_fw_fsm_query_state(struct mlxfw_dev *mlxfw_dev, u32 fwhandle, 1085 enum mlxfw_fsm_state *fsm_state, 1086 enum mlxfw_fsm_state_err *fsm_state_err) 1087 { 1088 struct mlxsw_core_fw_info *mlxsw_core_fw_info = 1089 container_of(mlxfw_dev, struct mlxsw_core_fw_info, mlxfw_dev); 1090 struct mlxsw_core *mlxsw_core = mlxsw_core_fw_info->mlxsw_core; 1091 char mcc_pl[MLXSW_REG_MCC_LEN]; 1092 u8 control_state; 1093 u8 error_code; 1094 int err; 1095 1096 mlxsw_reg_mcc_pack(mcc_pl, 0, 0, fwhandle, 0); 1097 err = mlxsw_reg_query(mlxsw_core, MLXSW_REG(mcc), mcc_pl); 1098 if (err) 1099 return err; 1100 1101 mlxsw_reg_mcc_unpack(mcc_pl, NULL, &error_code, &control_state); 1102 *fsm_state = control_state; 1103 *fsm_state_err = min_t(enum mlxfw_fsm_state_err, error_code, MLXFW_FSM_STATE_ERR_MAX); 1104 return 0; 1105 } 1106 1107 static void mlxsw_core_fw_fsm_cancel(struct mlxfw_dev *mlxfw_dev, u32 fwhandle) 1108 { 1109 struct mlxsw_core_fw_info *mlxsw_core_fw_info = 1110 container_of(mlxfw_dev, struct mlxsw_core_fw_info, mlxfw_dev); 1111 struct mlxsw_core *mlxsw_core = mlxsw_core_fw_info->mlxsw_core; 1112 char mcc_pl[MLXSW_REG_MCC_LEN]; 1113 1114 mlxsw_reg_mcc_pack(mcc_pl, MLXSW_REG_MCC_INSTRUCTION_CANCEL, 0, fwhandle, 0); 1115 mlxsw_reg_write(mlxsw_core, MLXSW_REG(mcc), mcc_pl); 1116 } 1117 1118 static void mlxsw_core_fw_fsm_release(struct mlxfw_dev *mlxfw_dev, u32 fwhandle) 1119 { 1120 struct mlxsw_core_fw_info *mlxsw_core_fw_info = 1121 container_of(mlxfw_dev, struct mlxsw_core_fw_info, mlxfw_dev); 1122 struct mlxsw_core *mlxsw_core = mlxsw_core_fw_info->mlxsw_core; 1123 char mcc_pl[MLXSW_REG_MCC_LEN]; 1124 1125 mlxsw_reg_mcc_pack(mcc_pl, MLXSW_REG_MCC_INSTRUCTION_RELEASE_UPDATE_HANDLE, 0, fwhandle, 0); 1126 mlxsw_reg_write(mlxsw_core, MLXSW_REG(mcc), mcc_pl); 1127 } 1128 1129 static const struct mlxfw_dev_ops mlxsw_core_fw_mlxsw_dev_ops = { 1130 .component_query = mlxsw_core_fw_component_query, 1131 .fsm_lock = mlxsw_core_fw_fsm_lock, 1132 .fsm_component_update = mlxsw_core_fw_fsm_component_update, 1133 .fsm_block_download = mlxsw_core_fw_fsm_block_download, 1134 .fsm_component_verify = mlxsw_core_fw_fsm_component_verify, 1135 .fsm_activate = mlxsw_core_fw_fsm_activate, 1136 .fsm_query_state = mlxsw_core_fw_fsm_query_state, 1137 .fsm_cancel = mlxsw_core_fw_fsm_cancel, 1138 .fsm_release = mlxsw_core_fw_fsm_release, 1139 }; 1140 1141 static int mlxsw_core_dev_fw_flash(struct mlxsw_core *mlxsw_core, 1142 const struct firmware *firmware, 1143 struct netlink_ext_ack *extack) 1144 { 1145 struct mlxsw_core_fw_info mlxsw_core_fw_info = { 1146 .mlxfw_dev = { 1147 .ops = &mlxsw_core_fw_mlxsw_dev_ops, 1148 .psid = mlxsw_core->bus_info->psid, 1149 .psid_size = strlen(mlxsw_core->bus_info->psid), 1150 .devlink = priv_to_devlink(mlxsw_core), 1151 }, 1152 .mlxsw_core = mlxsw_core 1153 }; 1154 1155 return mlxsw_core_fw_flash(mlxsw_core, &mlxsw_core_fw_info.mlxfw_dev, 1156 firmware, extack); 1157 } 1158 1159 static int mlxsw_core_fw_rev_validate(struct mlxsw_core *mlxsw_core, 1160 const struct mlxsw_bus_info *mlxsw_bus_info, 1161 const struct mlxsw_fw_rev *req_rev, 1162 const char *filename) 1163 { 1164 const struct mlxsw_fw_rev *rev = &mlxsw_bus_info->fw_rev; 1165 union devlink_param_value value; 1166 const struct firmware *firmware; 1167 int err; 1168 1169 /* Don't check if driver does not require it */ 1170 if (!req_rev || !filename) 1171 return 0; 1172 1173 /* Don't check if devlink 'fw_load_policy' param is 'flash' */ 1174 err = devlink_param_driverinit_value_get(priv_to_devlink(mlxsw_core), 1175 DEVLINK_PARAM_GENERIC_ID_FW_LOAD_POLICY, 1176 &value); 1177 if (err) 1178 return err; 1179 if (value.vu8 == DEVLINK_PARAM_FW_LOAD_POLICY_VALUE_FLASH) 1180 return 0; 1181 1182 /* Validate driver & FW are compatible */ 1183 if (rev->major != req_rev->major) { 1184 WARN(1, "Mismatch in major FW version [%d:%d] is never expected; Please contact support\n", 1185 rev->major, req_rev->major); 1186 return -EINVAL; 1187 } 1188 if (mlxsw_core_fw_rev_minor_subminor_validate(rev, req_rev)) 1189 return 0; 1190 1191 dev_err(mlxsw_bus_info->dev, "The firmware version %d.%d.%d is incompatible with the driver (required >= %d.%d.%d)\n", 1192 rev->major, rev->minor, rev->subminor, req_rev->major, 1193 req_rev->minor, req_rev->subminor); 1194 dev_info(mlxsw_bus_info->dev, "Flashing firmware using file %s\n", filename); 1195 1196 err = request_firmware_direct(&firmware, filename, mlxsw_bus_info->dev); 1197 if (err) { 1198 dev_err(mlxsw_bus_info->dev, "Could not request firmware file %s\n", filename); 1199 return err; 1200 } 1201 1202 err = mlxsw_core_dev_fw_flash(mlxsw_core, firmware, NULL); 1203 release_firmware(firmware); 1204 if (err) 1205 dev_err(mlxsw_bus_info->dev, "Could not upgrade firmware\n"); 1206 1207 /* On FW flash success, tell the caller FW reset is needed 1208 * if current FW supports it. 1209 */ 1210 if (rev->minor >= req_rev->can_reset_minor) 1211 return err ? err : -EAGAIN; 1212 else 1213 return 0; 1214 } 1215 1216 static int mlxsw_core_fw_flash_update(struct mlxsw_core *mlxsw_core, 1217 struct devlink_flash_update_params *params, 1218 struct netlink_ext_ack *extack) 1219 { 1220 return mlxsw_core_dev_fw_flash(mlxsw_core, params->fw, extack); 1221 } 1222 1223 static int mlxsw_core_devlink_param_fw_load_policy_validate(struct devlink *devlink, u32 id, 1224 union devlink_param_value val, 1225 struct netlink_ext_ack *extack) 1226 { 1227 if (val.vu8 != DEVLINK_PARAM_FW_LOAD_POLICY_VALUE_DRIVER && 1228 val.vu8 != DEVLINK_PARAM_FW_LOAD_POLICY_VALUE_FLASH) { 1229 NL_SET_ERR_MSG_MOD(extack, "'fw_load_policy' must be 'driver' or 'flash'"); 1230 return -EINVAL; 1231 } 1232 1233 return 0; 1234 } 1235 1236 static const struct devlink_param mlxsw_core_fw_devlink_params[] = { 1237 DEVLINK_PARAM_GENERIC(FW_LOAD_POLICY, BIT(DEVLINK_PARAM_CMODE_DRIVERINIT), NULL, NULL, 1238 mlxsw_core_devlink_param_fw_load_policy_validate), 1239 }; 1240 1241 static int mlxsw_core_fw_params_register(struct mlxsw_core *mlxsw_core) 1242 { 1243 struct devlink *devlink = priv_to_devlink(mlxsw_core); 1244 union devlink_param_value value; 1245 int err; 1246 1247 err = devlink_params_register(devlink, mlxsw_core_fw_devlink_params, 1248 ARRAY_SIZE(mlxsw_core_fw_devlink_params)); 1249 if (err) 1250 return err; 1251 1252 value.vu8 = DEVLINK_PARAM_FW_LOAD_POLICY_VALUE_DRIVER; 1253 devlink_param_driverinit_value_set(devlink, DEVLINK_PARAM_GENERIC_ID_FW_LOAD_POLICY, value); 1254 return 0; 1255 } 1256 1257 static void mlxsw_core_fw_params_unregister(struct mlxsw_core *mlxsw_core) 1258 { 1259 devlink_params_unregister(priv_to_devlink(mlxsw_core), mlxsw_core_fw_devlink_params, 1260 ARRAY_SIZE(mlxsw_core_fw_devlink_params)); 1261 } 1262 1263 static void *__dl_port(struct devlink_port *devlink_port) 1264 { 1265 return container_of(devlink_port, struct mlxsw_core_port, devlink_port); 1266 } 1267 1268 static int mlxsw_devlink_port_split(struct devlink *devlink, 1269 struct devlink_port *port, 1270 unsigned int count, 1271 struct netlink_ext_ack *extack) 1272 { 1273 struct mlxsw_core_port *mlxsw_core_port = __dl_port(port); 1274 struct mlxsw_core *mlxsw_core = devlink_priv(devlink); 1275 1276 if (!mlxsw_core->driver->port_split) 1277 return -EOPNOTSUPP; 1278 return mlxsw_core->driver->port_split(mlxsw_core, 1279 mlxsw_core_port->local_port, 1280 count, extack); 1281 } 1282 1283 static int mlxsw_devlink_port_unsplit(struct devlink *devlink, 1284 struct devlink_port *port, 1285 struct netlink_ext_ack *extack) 1286 { 1287 struct mlxsw_core_port *mlxsw_core_port = __dl_port(port); 1288 struct mlxsw_core *mlxsw_core = devlink_priv(devlink); 1289 1290 if (!mlxsw_core->driver->port_unsplit) 1291 return -EOPNOTSUPP; 1292 return mlxsw_core->driver->port_unsplit(mlxsw_core, 1293 mlxsw_core_port->local_port, 1294 extack); 1295 } 1296 1297 static int 1298 mlxsw_devlink_sb_pool_get(struct devlink *devlink, 1299 unsigned int sb_index, u16 pool_index, 1300 struct devlink_sb_pool_info *pool_info) 1301 { 1302 struct mlxsw_core *mlxsw_core = devlink_priv(devlink); 1303 struct mlxsw_driver *mlxsw_driver = mlxsw_core->driver; 1304 1305 if (!mlxsw_driver->sb_pool_get) 1306 return -EOPNOTSUPP; 1307 return mlxsw_driver->sb_pool_get(mlxsw_core, sb_index, 1308 pool_index, pool_info); 1309 } 1310 1311 static int 1312 mlxsw_devlink_sb_pool_set(struct devlink *devlink, 1313 unsigned int sb_index, u16 pool_index, u32 size, 1314 enum devlink_sb_threshold_type threshold_type, 1315 struct netlink_ext_ack *extack) 1316 { 1317 struct mlxsw_core *mlxsw_core = devlink_priv(devlink); 1318 struct mlxsw_driver *mlxsw_driver = mlxsw_core->driver; 1319 1320 if (!mlxsw_driver->sb_pool_set) 1321 return -EOPNOTSUPP; 1322 return mlxsw_driver->sb_pool_set(mlxsw_core, sb_index, 1323 pool_index, size, threshold_type, 1324 extack); 1325 } 1326 1327 static int mlxsw_devlink_sb_port_pool_get(struct devlink_port *devlink_port, 1328 unsigned int sb_index, u16 pool_index, 1329 u32 *p_threshold) 1330 { 1331 struct mlxsw_core *mlxsw_core = devlink_priv(devlink_port->devlink); 1332 struct mlxsw_driver *mlxsw_driver = mlxsw_core->driver; 1333 struct mlxsw_core_port *mlxsw_core_port = __dl_port(devlink_port); 1334 1335 if (!mlxsw_driver->sb_port_pool_get || 1336 !mlxsw_core_port_check(mlxsw_core_port)) 1337 return -EOPNOTSUPP; 1338 return mlxsw_driver->sb_port_pool_get(mlxsw_core_port, sb_index, 1339 pool_index, p_threshold); 1340 } 1341 1342 static int mlxsw_devlink_sb_port_pool_set(struct devlink_port *devlink_port, 1343 unsigned int sb_index, u16 pool_index, 1344 u32 threshold, 1345 struct netlink_ext_ack *extack) 1346 { 1347 struct mlxsw_core *mlxsw_core = devlink_priv(devlink_port->devlink); 1348 struct mlxsw_driver *mlxsw_driver = mlxsw_core->driver; 1349 struct mlxsw_core_port *mlxsw_core_port = __dl_port(devlink_port); 1350 1351 if (!mlxsw_driver->sb_port_pool_set || 1352 !mlxsw_core_port_check(mlxsw_core_port)) 1353 return -EOPNOTSUPP; 1354 return mlxsw_driver->sb_port_pool_set(mlxsw_core_port, sb_index, 1355 pool_index, threshold, extack); 1356 } 1357 1358 static int 1359 mlxsw_devlink_sb_tc_pool_bind_get(struct devlink_port *devlink_port, 1360 unsigned int sb_index, u16 tc_index, 1361 enum devlink_sb_pool_type pool_type, 1362 u16 *p_pool_index, u32 *p_threshold) 1363 { 1364 struct mlxsw_core *mlxsw_core = devlink_priv(devlink_port->devlink); 1365 struct mlxsw_driver *mlxsw_driver = mlxsw_core->driver; 1366 struct mlxsw_core_port *mlxsw_core_port = __dl_port(devlink_port); 1367 1368 if (!mlxsw_driver->sb_tc_pool_bind_get || 1369 !mlxsw_core_port_check(mlxsw_core_port)) 1370 return -EOPNOTSUPP; 1371 return mlxsw_driver->sb_tc_pool_bind_get(mlxsw_core_port, sb_index, 1372 tc_index, pool_type, 1373 p_pool_index, p_threshold); 1374 } 1375 1376 static int 1377 mlxsw_devlink_sb_tc_pool_bind_set(struct devlink_port *devlink_port, 1378 unsigned int sb_index, u16 tc_index, 1379 enum devlink_sb_pool_type pool_type, 1380 u16 pool_index, u32 threshold, 1381 struct netlink_ext_ack *extack) 1382 { 1383 struct mlxsw_core *mlxsw_core = devlink_priv(devlink_port->devlink); 1384 struct mlxsw_driver *mlxsw_driver = mlxsw_core->driver; 1385 struct mlxsw_core_port *mlxsw_core_port = __dl_port(devlink_port); 1386 1387 if (!mlxsw_driver->sb_tc_pool_bind_set || 1388 !mlxsw_core_port_check(mlxsw_core_port)) 1389 return -EOPNOTSUPP; 1390 return mlxsw_driver->sb_tc_pool_bind_set(mlxsw_core_port, sb_index, 1391 tc_index, pool_type, 1392 pool_index, threshold, extack); 1393 } 1394 1395 static int mlxsw_devlink_sb_occ_snapshot(struct devlink *devlink, 1396 unsigned int sb_index) 1397 { 1398 struct mlxsw_core *mlxsw_core = devlink_priv(devlink); 1399 struct mlxsw_driver *mlxsw_driver = mlxsw_core->driver; 1400 1401 if (!mlxsw_driver->sb_occ_snapshot) 1402 return -EOPNOTSUPP; 1403 return mlxsw_driver->sb_occ_snapshot(mlxsw_core, sb_index); 1404 } 1405 1406 static int mlxsw_devlink_sb_occ_max_clear(struct devlink *devlink, 1407 unsigned int sb_index) 1408 { 1409 struct mlxsw_core *mlxsw_core = devlink_priv(devlink); 1410 struct mlxsw_driver *mlxsw_driver = mlxsw_core->driver; 1411 1412 if (!mlxsw_driver->sb_occ_max_clear) 1413 return -EOPNOTSUPP; 1414 return mlxsw_driver->sb_occ_max_clear(mlxsw_core, sb_index); 1415 } 1416 1417 static int 1418 mlxsw_devlink_sb_occ_port_pool_get(struct devlink_port *devlink_port, 1419 unsigned int sb_index, u16 pool_index, 1420 u32 *p_cur, u32 *p_max) 1421 { 1422 struct mlxsw_core *mlxsw_core = devlink_priv(devlink_port->devlink); 1423 struct mlxsw_driver *mlxsw_driver = mlxsw_core->driver; 1424 struct mlxsw_core_port *mlxsw_core_port = __dl_port(devlink_port); 1425 1426 if (!mlxsw_driver->sb_occ_port_pool_get || 1427 !mlxsw_core_port_check(mlxsw_core_port)) 1428 return -EOPNOTSUPP; 1429 return mlxsw_driver->sb_occ_port_pool_get(mlxsw_core_port, sb_index, 1430 pool_index, p_cur, p_max); 1431 } 1432 1433 static int 1434 mlxsw_devlink_sb_occ_tc_port_bind_get(struct devlink_port *devlink_port, 1435 unsigned int sb_index, u16 tc_index, 1436 enum devlink_sb_pool_type pool_type, 1437 u32 *p_cur, u32 *p_max) 1438 { 1439 struct mlxsw_core *mlxsw_core = devlink_priv(devlink_port->devlink); 1440 struct mlxsw_driver *mlxsw_driver = mlxsw_core->driver; 1441 struct mlxsw_core_port *mlxsw_core_port = __dl_port(devlink_port); 1442 1443 if (!mlxsw_driver->sb_occ_tc_port_bind_get || 1444 !mlxsw_core_port_check(mlxsw_core_port)) 1445 return -EOPNOTSUPP; 1446 return mlxsw_driver->sb_occ_tc_port_bind_get(mlxsw_core_port, 1447 sb_index, tc_index, 1448 pool_type, p_cur, p_max); 1449 } 1450 1451 static int 1452 mlxsw_devlink_info_get(struct devlink *devlink, struct devlink_info_req *req, 1453 struct netlink_ext_ack *extack) 1454 { 1455 struct mlxsw_core *mlxsw_core = devlink_priv(devlink); 1456 char fw_info_psid[MLXSW_REG_MGIR_FW_INFO_PSID_SIZE]; 1457 u32 hw_rev, fw_major, fw_minor, fw_sub_minor; 1458 char mgir_pl[MLXSW_REG_MGIR_LEN]; 1459 char buf[32]; 1460 int err; 1461 1462 mlxsw_reg_mgir_pack(mgir_pl); 1463 err = mlxsw_reg_query(mlxsw_core, MLXSW_REG(mgir), mgir_pl); 1464 if (err) 1465 return err; 1466 mlxsw_reg_mgir_unpack(mgir_pl, &hw_rev, fw_info_psid, &fw_major, 1467 &fw_minor, &fw_sub_minor); 1468 1469 sprintf(buf, "%X", hw_rev); 1470 err = devlink_info_version_fixed_put(req, "hw.revision", buf); 1471 if (err) 1472 return err; 1473 1474 err = devlink_info_version_fixed_put(req, 1475 DEVLINK_INFO_VERSION_GENERIC_FW_PSID, 1476 fw_info_psid); 1477 if (err) 1478 return err; 1479 1480 sprintf(buf, "%d.%d.%d", fw_major, fw_minor, fw_sub_minor); 1481 err = devlink_info_version_running_put(req, "fw.version", buf); 1482 if (err) 1483 return err; 1484 1485 return devlink_info_version_running_put(req, 1486 DEVLINK_INFO_VERSION_GENERIC_FW, 1487 buf); 1488 } 1489 1490 static int 1491 mlxsw_devlink_core_bus_device_reload_down(struct devlink *devlink, 1492 bool netns_change, enum devlink_reload_action action, 1493 enum devlink_reload_limit limit, 1494 struct netlink_ext_ack *extack) 1495 { 1496 struct mlxsw_core *mlxsw_core = devlink_priv(devlink); 1497 1498 if (!(mlxsw_core->bus->features & MLXSW_BUS_F_RESET)) 1499 return -EOPNOTSUPP; 1500 1501 mlxsw_core_bus_device_unregister(mlxsw_core, true); 1502 return 0; 1503 } 1504 1505 static int 1506 mlxsw_devlink_core_bus_device_reload_up(struct devlink *devlink, enum devlink_reload_action action, 1507 enum devlink_reload_limit limit, u32 *actions_performed, 1508 struct netlink_ext_ack *extack) 1509 { 1510 struct mlxsw_core *mlxsw_core = devlink_priv(devlink); 1511 int err; 1512 1513 *actions_performed = BIT(DEVLINK_RELOAD_ACTION_DRIVER_REINIT) | 1514 BIT(DEVLINK_RELOAD_ACTION_FW_ACTIVATE); 1515 err = mlxsw_core_bus_device_register(mlxsw_core->bus_info, 1516 mlxsw_core->bus, 1517 mlxsw_core->bus_priv, true, 1518 devlink, extack); 1519 return err; 1520 } 1521 1522 static int mlxsw_devlink_flash_update(struct devlink *devlink, 1523 struct devlink_flash_update_params *params, 1524 struct netlink_ext_ack *extack) 1525 { 1526 struct mlxsw_core *mlxsw_core = devlink_priv(devlink); 1527 1528 return mlxsw_core_fw_flash_update(mlxsw_core, params, extack); 1529 } 1530 1531 static int mlxsw_devlink_trap_init(struct devlink *devlink, 1532 const struct devlink_trap *trap, 1533 void *trap_ctx) 1534 { 1535 struct mlxsw_core *mlxsw_core = devlink_priv(devlink); 1536 struct mlxsw_driver *mlxsw_driver = mlxsw_core->driver; 1537 1538 if (!mlxsw_driver->trap_init) 1539 return -EOPNOTSUPP; 1540 return mlxsw_driver->trap_init(mlxsw_core, trap, trap_ctx); 1541 } 1542 1543 static void mlxsw_devlink_trap_fini(struct devlink *devlink, 1544 const struct devlink_trap *trap, 1545 void *trap_ctx) 1546 { 1547 struct mlxsw_core *mlxsw_core = devlink_priv(devlink); 1548 struct mlxsw_driver *mlxsw_driver = mlxsw_core->driver; 1549 1550 if (!mlxsw_driver->trap_fini) 1551 return; 1552 mlxsw_driver->trap_fini(mlxsw_core, trap, trap_ctx); 1553 } 1554 1555 static int mlxsw_devlink_trap_action_set(struct devlink *devlink, 1556 const struct devlink_trap *trap, 1557 enum devlink_trap_action action, 1558 struct netlink_ext_ack *extack) 1559 { 1560 struct mlxsw_core *mlxsw_core = devlink_priv(devlink); 1561 struct mlxsw_driver *mlxsw_driver = mlxsw_core->driver; 1562 1563 if (!mlxsw_driver->trap_action_set) 1564 return -EOPNOTSUPP; 1565 return mlxsw_driver->trap_action_set(mlxsw_core, trap, action, extack); 1566 } 1567 1568 static int 1569 mlxsw_devlink_trap_group_init(struct devlink *devlink, 1570 const struct devlink_trap_group *group) 1571 { 1572 struct mlxsw_core *mlxsw_core = devlink_priv(devlink); 1573 struct mlxsw_driver *mlxsw_driver = mlxsw_core->driver; 1574 1575 if (!mlxsw_driver->trap_group_init) 1576 return -EOPNOTSUPP; 1577 return mlxsw_driver->trap_group_init(mlxsw_core, group); 1578 } 1579 1580 static int 1581 mlxsw_devlink_trap_group_set(struct devlink *devlink, 1582 const struct devlink_trap_group *group, 1583 const struct devlink_trap_policer *policer, 1584 struct netlink_ext_ack *extack) 1585 { 1586 struct mlxsw_core *mlxsw_core = devlink_priv(devlink); 1587 struct mlxsw_driver *mlxsw_driver = mlxsw_core->driver; 1588 1589 if (!mlxsw_driver->trap_group_set) 1590 return -EOPNOTSUPP; 1591 return mlxsw_driver->trap_group_set(mlxsw_core, group, policer, extack); 1592 } 1593 1594 static int 1595 mlxsw_devlink_trap_policer_init(struct devlink *devlink, 1596 const struct devlink_trap_policer *policer) 1597 { 1598 struct mlxsw_core *mlxsw_core = devlink_priv(devlink); 1599 struct mlxsw_driver *mlxsw_driver = mlxsw_core->driver; 1600 1601 if (!mlxsw_driver->trap_policer_init) 1602 return -EOPNOTSUPP; 1603 return mlxsw_driver->trap_policer_init(mlxsw_core, policer); 1604 } 1605 1606 static void 1607 mlxsw_devlink_trap_policer_fini(struct devlink *devlink, 1608 const struct devlink_trap_policer *policer) 1609 { 1610 struct mlxsw_core *mlxsw_core = devlink_priv(devlink); 1611 struct mlxsw_driver *mlxsw_driver = mlxsw_core->driver; 1612 1613 if (!mlxsw_driver->trap_policer_fini) 1614 return; 1615 mlxsw_driver->trap_policer_fini(mlxsw_core, policer); 1616 } 1617 1618 static int 1619 mlxsw_devlink_trap_policer_set(struct devlink *devlink, 1620 const struct devlink_trap_policer *policer, 1621 u64 rate, u64 burst, 1622 struct netlink_ext_ack *extack) 1623 { 1624 struct mlxsw_core *mlxsw_core = devlink_priv(devlink); 1625 struct mlxsw_driver *mlxsw_driver = mlxsw_core->driver; 1626 1627 if (!mlxsw_driver->trap_policer_set) 1628 return -EOPNOTSUPP; 1629 return mlxsw_driver->trap_policer_set(mlxsw_core, policer, rate, burst, 1630 extack); 1631 } 1632 1633 static int 1634 mlxsw_devlink_trap_policer_counter_get(struct devlink *devlink, 1635 const struct devlink_trap_policer *policer, 1636 u64 *p_drops) 1637 { 1638 struct mlxsw_core *mlxsw_core = devlink_priv(devlink); 1639 struct mlxsw_driver *mlxsw_driver = mlxsw_core->driver; 1640 1641 if (!mlxsw_driver->trap_policer_counter_get) 1642 return -EOPNOTSUPP; 1643 return mlxsw_driver->trap_policer_counter_get(mlxsw_core, policer, 1644 p_drops); 1645 } 1646 1647 static const struct devlink_ops mlxsw_devlink_ops = { 1648 .reload_actions = BIT(DEVLINK_RELOAD_ACTION_DRIVER_REINIT) | 1649 BIT(DEVLINK_RELOAD_ACTION_FW_ACTIVATE), 1650 .reload_down = mlxsw_devlink_core_bus_device_reload_down, 1651 .reload_up = mlxsw_devlink_core_bus_device_reload_up, 1652 .port_split = mlxsw_devlink_port_split, 1653 .port_unsplit = mlxsw_devlink_port_unsplit, 1654 .sb_pool_get = mlxsw_devlink_sb_pool_get, 1655 .sb_pool_set = mlxsw_devlink_sb_pool_set, 1656 .sb_port_pool_get = mlxsw_devlink_sb_port_pool_get, 1657 .sb_port_pool_set = mlxsw_devlink_sb_port_pool_set, 1658 .sb_tc_pool_bind_get = mlxsw_devlink_sb_tc_pool_bind_get, 1659 .sb_tc_pool_bind_set = mlxsw_devlink_sb_tc_pool_bind_set, 1660 .sb_occ_snapshot = mlxsw_devlink_sb_occ_snapshot, 1661 .sb_occ_max_clear = mlxsw_devlink_sb_occ_max_clear, 1662 .sb_occ_port_pool_get = mlxsw_devlink_sb_occ_port_pool_get, 1663 .sb_occ_tc_port_bind_get = mlxsw_devlink_sb_occ_tc_port_bind_get, 1664 .info_get = mlxsw_devlink_info_get, 1665 .flash_update = mlxsw_devlink_flash_update, 1666 .trap_init = mlxsw_devlink_trap_init, 1667 .trap_fini = mlxsw_devlink_trap_fini, 1668 .trap_action_set = mlxsw_devlink_trap_action_set, 1669 .trap_group_init = mlxsw_devlink_trap_group_init, 1670 .trap_group_set = mlxsw_devlink_trap_group_set, 1671 .trap_policer_init = mlxsw_devlink_trap_policer_init, 1672 .trap_policer_fini = mlxsw_devlink_trap_policer_fini, 1673 .trap_policer_set = mlxsw_devlink_trap_policer_set, 1674 .trap_policer_counter_get = mlxsw_devlink_trap_policer_counter_get, 1675 }; 1676 1677 static int mlxsw_core_params_register(struct mlxsw_core *mlxsw_core) 1678 { 1679 int err; 1680 1681 err = mlxsw_core_fw_params_register(mlxsw_core); 1682 if (err) 1683 return err; 1684 1685 if (mlxsw_core->driver->params_register) { 1686 err = mlxsw_core->driver->params_register(mlxsw_core); 1687 if (err) 1688 goto err_params_register; 1689 } 1690 return 0; 1691 1692 err_params_register: 1693 mlxsw_core_fw_params_unregister(mlxsw_core); 1694 return err; 1695 } 1696 1697 static void mlxsw_core_params_unregister(struct mlxsw_core *mlxsw_core) 1698 { 1699 mlxsw_core_fw_params_unregister(mlxsw_core); 1700 if (mlxsw_core->driver->params_register) 1701 mlxsw_core->driver->params_unregister(mlxsw_core); 1702 } 1703 1704 struct mlxsw_core_health_event { 1705 struct mlxsw_core *mlxsw_core; 1706 char mfde_pl[MLXSW_REG_MFDE_LEN]; 1707 struct work_struct work; 1708 }; 1709 1710 static void mlxsw_core_health_event_work(struct work_struct *work) 1711 { 1712 struct mlxsw_core_health_event *event; 1713 struct mlxsw_core *mlxsw_core; 1714 1715 event = container_of(work, struct mlxsw_core_health_event, work); 1716 mlxsw_core = event->mlxsw_core; 1717 devlink_health_report(mlxsw_core->health.fw_fatal, "FW fatal event occurred", 1718 event->mfde_pl); 1719 kfree(event); 1720 } 1721 1722 static void mlxsw_core_health_listener_func(const struct mlxsw_reg_info *reg, 1723 char *mfde_pl, void *priv) 1724 { 1725 struct mlxsw_core_health_event *event; 1726 struct mlxsw_core *mlxsw_core = priv; 1727 1728 event = kmalloc(sizeof(*event), GFP_ATOMIC); 1729 if (!event) 1730 return; 1731 event->mlxsw_core = mlxsw_core; 1732 memcpy(event->mfde_pl, mfde_pl, sizeof(event->mfde_pl)); 1733 INIT_WORK(&event->work, mlxsw_core_health_event_work); 1734 mlxsw_core_schedule_work(&event->work); 1735 } 1736 1737 static const struct mlxsw_listener mlxsw_core_health_listener = 1738 MLXSW_CORE_EVENTL(mlxsw_core_health_listener_func, MFDE); 1739 1740 static int 1741 mlxsw_core_health_fw_fatal_dump_fatal_cause(const char *mfde_pl, 1742 struct devlink_fmsg *fmsg) 1743 { 1744 u32 val, tile_v; 1745 int err; 1746 1747 val = mlxsw_reg_mfde_fatal_cause_id_get(mfde_pl); 1748 err = devlink_fmsg_u32_pair_put(fmsg, "cause_id", val); 1749 if (err) 1750 return err; 1751 tile_v = mlxsw_reg_mfde_fatal_cause_tile_v_get(mfde_pl); 1752 if (tile_v) { 1753 val = mlxsw_reg_mfde_fatal_cause_tile_index_get(mfde_pl); 1754 err = devlink_fmsg_u8_pair_put(fmsg, "tile_index", val); 1755 if (err) 1756 return err; 1757 } 1758 1759 return 0; 1760 } 1761 1762 static int 1763 mlxsw_core_health_fw_fatal_dump_fw_assert(const char *mfde_pl, 1764 struct devlink_fmsg *fmsg) 1765 { 1766 u32 val, tile_v; 1767 int err; 1768 1769 val = mlxsw_reg_mfde_fw_assert_var0_get(mfde_pl); 1770 err = devlink_fmsg_u32_pair_put(fmsg, "var0", val); 1771 if (err) 1772 return err; 1773 val = mlxsw_reg_mfde_fw_assert_var1_get(mfde_pl); 1774 err = devlink_fmsg_u32_pair_put(fmsg, "var1", val); 1775 if (err) 1776 return err; 1777 val = mlxsw_reg_mfde_fw_assert_var2_get(mfde_pl); 1778 err = devlink_fmsg_u32_pair_put(fmsg, "var2", val); 1779 if (err) 1780 return err; 1781 val = mlxsw_reg_mfde_fw_assert_var3_get(mfde_pl); 1782 err = devlink_fmsg_u32_pair_put(fmsg, "var3", val); 1783 if (err) 1784 return err; 1785 val = mlxsw_reg_mfde_fw_assert_var4_get(mfde_pl); 1786 err = devlink_fmsg_u32_pair_put(fmsg, "var4", val); 1787 if (err) 1788 return err; 1789 val = mlxsw_reg_mfde_fw_assert_existptr_get(mfde_pl); 1790 err = devlink_fmsg_u32_pair_put(fmsg, "existptr", val); 1791 if (err) 1792 return err; 1793 val = mlxsw_reg_mfde_fw_assert_callra_get(mfde_pl); 1794 err = devlink_fmsg_u32_pair_put(fmsg, "callra", val); 1795 if (err) 1796 return err; 1797 val = mlxsw_reg_mfde_fw_assert_oe_get(mfde_pl); 1798 err = devlink_fmsg_bool_pair_put(fmsg, "old_event", val); 1799 if (err) 1800 return err; 1801 tile_v = mlxsw_reg_mfde_fw_assert_tile_v_get(mfde_pl); 1802 if (tile_v) { 1803 val = mlxsw_reg_mfde_fw_assert_tile_index_get(mfde_pl); 1804 err = devlink_fmsg_u8_pair_put(fmsg, "tile_index", val); 1805 if (err) 1806 return err; 1807 } 1808 val = mlxsw_reg_mfde_fw_assert_ext_synd_get(mfde_pl); 1809 err = devlink_fmsg_u32_pair_put(fmsg, "ext_synd", val); 1810 if (err) 1811 return err; 1812 1813 return 0; 1814 } 1815 1816 static int 1817 mlxsw_core_health_fw_fatal_dump_kvd_im_stop(const char *mfde_pl, 1818 struct devlink_fmsg *fmsg) 1819 { 1820 u32 val; 1821 int err; 1822 1823 val = mlxsw_reg_mfde_kvd_im_stop_oe_get(mfde_pl); 1824 err = devlink_fmsg_bool_pair_put(fmsg, "old_event", val); 1825 if (err) 1826 return err; 1827 val = mlxsw_reg_mfde_kvd_im_stop_pipes_mask_get(mfde_pl); 1828 return devlink_fmsg_u32_pair_put(fmsg, "pipes_mask", val); 1829 } 1830 1831 static int 1832 mlxsw_core_health_fw_fatal_dump_crspace_to(const char *mfde_pl, 1833 struct devlink_fmsg *fmsg) 1834 { 1835 u32 val; 1836 int err; 1837 1838 val = mlxsw_reg_mfde_crspace_to_log_address_get(mfde_pl); 1839 err = devlink_fmsg_u32_pair_put(fmsg, "log_address", val); 1840 if (err) 1841 return err; 1842 val = mlxsw_reg_mfde_crspace_to_oe_get(mfde_pl); 1843 err = devlink_fmsg_bool_pair_put(fmsg, "old_event", val); 1844 if (err) 1845 return err; 1846 val = mlxsw_reg_mfde_crspace_to_log_id_get(mfde_pl); 1847 err = devlink_fmsg_u8_pair_put(fmsg, "log_irisc_id", val); 1848 if (err) 1849 return err; 1850 val = mlxsw_reg_mfde_crspace_to_log_ip_get(mfde_pl); 1851 err = devlink_fmsg_u64_pair_put(fmsg, "log_ip", val); 1852 if (err) 1853 return err; 1854 1855 return 0; 1856 } 1857 1858 static int mlxsw_core_health_fw_fatal_dump(struct devlink_health_reporter *reporter, 1859 struct devlink_fmsg *fmsg, void *priv_ctx, 1860 struct netlink_ext_ack *extack) 1861 { 1862 char *mfde_pl = priv_ctx; 1863 char *val_str; 1864 u8 event_id; 1865 u32 val; 1866 int err; 1867 1868 if (!priv_ctx) 1869 /* User-triggered dumps are not possible */ 1870 return -EOPNOTSUPP; 1871 1872 val = mlxsw_reg_mfde_irisc_id_get(mfde_pl); 1873 err = devlink_fmsg_u8_pair_put(fmsg, "irisc_id", val); 1874 if (err) 1875 return err; 1876 err = devlink_fmsg_arr_pair_nest_start(fmsg, "event"); 1877 if (err) 1878 return err; 1879 1880 event_id = mlxsw_reg_mfde_event_id_get(mfde_pl); 1881 err = devlink_fmsg_u32_pair_put(fmsg, "id", event_id); 1882 if (err) 1883 return err; 1884 switch (event_id) { 1885 case MLXSW_REG_MFDE_EVENT_ID_CRSPACE_TO: 1886 val_str = "CR space timeout"; 1887 break; 1888 case MLXSW_REG_MFDE_EVENT_ID_KVD_IM_STOP: 1889 val_str = "KVD insertion machine stopped"; 1890 break; 1891 case MLXSW_REG_MFDE_EVENT_ID_TEST: 1892 val_str = "Test"; 1893 break; 1894 case MLXSW_REG_MFDE_EVENT_ID_FW_ASSERT: 1895 val_str = "FW assert"; 1896 break; 1897 case MLXSW_REG_MFDE_EVENT_ID_FATAL_CAUSE: 1898 val_str = "Fatal cause"; 1899 break; 1900 default: 1901 val_str = NULL; 1902 } 1903 if (val_str) { 1904 err = devlink_fmsg_string_pair_put(fmsg, "desc", val_str); 1905 if (err) 1906 return err; 1907 } 1908 1909 err = devlink_fmsg_arr_pair_nest_end(fmsg); 1910 if (err) 1911 return err; 1912 1913 err = devlink_fmsg_arr_pair_nest_start(fmsg, "severity"); 1914 if (err) 1915 return err; 1916 1917 val = mlxsw_reg_mfde_severity_get(mfde_pl); 1918 err = devlink_fmsg_u8_pair_put(fmsg, "id", val); 1919 if (err) 1920 return err; 1921 switch (val) { 1922 case MLXSW_REG_MFDE_SEVERITY_FATL: 1923 val_str = "Fatal"; 1924 break; 1925 case MLXSW_REG_MFDE_SEVERITY_NRML: 1926 val_str = "Normal"; 1927 break; 1928 case MLXSW_REG_MFDE_SEVERITY_INTR: 1929 val_str = "Debug"; 1930 break; 1931 default: 1932 val_str = NULL; 1933 } 1934 if (val_str) { 1935 err = devlink_fmsg_string_pair_put(fmsg, "desc", val_str); 1936 if (err) 1937 return err; 1938 } 1939 1940 err = devlink_fmsg_arr_pair_nest_end(fmsg); 1941 if (err) 1942 return err; 1943 1944 val = mlxsw_reg_mfde_method_get(mfde_pl); 1945 switch (val) { 1946 case MLXSW_REG_MFDE_METHOD_QUERY: 1947 val_str = "query"; 1948 break; 1949 case MLXSW_REG_MFDE_METHOD_WRITE: 1950 val_str = "write"; 1951 break; 1952 default: 1953 val_str = NULL; 1954 } 1955 if (val_str) { 1956 err = devlink_fmsg_string_pair_put(fmsg, "method", val_str); 1957 if (err) 1958 return err; 1959 } 1960 1961 val = mlxsw_reg_mfde_long_process_get(mfde_pl); 1962 err = devlink_fmsg_bool_pair_put(fmsg, "long_process", val); 1963 if (err) 1964 return err; 1965 1966 val = mlxsw_reg_mfde_command_type_get(mfde_pl); 1967 switch (val) { 1968 case MLXSW_REG_MFDE_COMMAND_TYPE_MAD: 1969 val_str = "mad"; 1970 break; 1971 case MLXSW_REG_MFDE_COMMAND_TYPE_EMAD: 1972 val_str = "emad"; 1973 break; 1974 case MLXSW_REG_MFDE_COMMAND_TYPE_CMDIF: 1975 val_str = "cmdif"; 1976 break; 1977 default: 1978 val_str = NULL; 1979 } 1980 if (val_str) { 1981 err = devlink_fmsg_string_pair_put(fmsg, "command_type", val_str); 1982 if (err) 1983 return err; 1984 } 1985 1986 val = mlxsw_reg_mfde_reg_attr_id_get(mfde_pl); 1987 err = devlink_fmsg_u32_pair_put(fmsg, "reg_attr_id", val); 1988 if (err) 1989 return err; 1990 1991 switch (event_id) { 1992 case MLXSW_REG_MFDE_EVENT_ID_CRSPACE_TO: 1993 return mlxsw_core_health_fw_fatal_dump_crspace_to(mfde_pl, 1994 fmsg); 1995 case MLXSW_REG_MFDE_EVENT_ID_KVD_IM_STOP: 1996 return mlxsw_core_health_fw_fatal_dump_kvd_im_stop(mfde_pl, 1997 fmsg); 1998 case MLXSW_REG_MFDE_EVENT_ID_FW_ASSERT: 1999 return mlxsw_core_health_fw_fatal_dump_fw_assert(mfde_pl, fmsg); 2000 case MLXSW_REG_MFDE_EVENT_ID_FATAL_CAUSE: 2001 return mlxsw_core_health_fw_fatal_dump_fatal_cause(mfde_pl, 2002 fmsg); 2003 } 2004 2005 return 0; 2006 } 2007 2008 static int 2009 mlxsw_core_health_fw_fatal_test(struct devlink_health_reporter *reporter, 2010 struct netlink_ext_ack *extack) 2011 { 2012 struct mlxsw_core *mlxsw_core = devlink_health_reporter_priv(reporter); 2013 char mfgd_pl[MLXSW_REG_MFGD_LEN]; 2014 int err; 2015 2016 /* Read the register first to make sure no other bits are changed. */ 2017 err = mlxsw_reg_query(mlxsw_core, MLXSW_REG(mfgd), mfgd_pl); 2018 if (err) 2019 return err; 2020 mlxsw_reg_mfgd_trigger_test_set(mfgd_pl, true); 2021 return mlxsw_reg_write(mlxsw_core, MLXSW_REG(mfgd), mfgd_pl); 2022 } 2023 2024 static const struct devlink_health_reporter_ops 2025 mlxsw_core_health_fw_fatal_ops = { 2026 .name = "fw_fatal", 2027 .dump = mlxsw_core_health_fw_fatal_dump, 2028 .test = mlxsw_core_health_fw_fatal_test, 2029 }; 2030 2031 static int mlxsw_core_health_fw_fatal_config(struct mlxsw_core *mlxsw_core, 2032 bool enable) 2033 { 2034 char mfgd_pl[MLXSW_REG_MFGD_LEN]; 2035 int err; 2036 2037 /* Read the register first to make sure no other bits are changed. */ 2038 err = mlxsw_reg_query(mlxsw_core, MLXSW_REG(mfgd), mfgd_pl); 2039 if (err) 2040 return err; 2041 mlxsw_reg_mfgd_fatal_event_mode_set(mfgd_pl, enable); 2042 return mlxsw_reg_write(mlxsw_core, MLXSW_REG(mfgd), mfgd_pl); 2043 } 2044 2045 static int mlxsw_core_health_init(struct mlxsw_core *mlxsw_core) 2046 { 2047 struct devlink *devlink = priv_to_devlink(mlxsw_core); 2048 struct devlink_health_reporter *fw_fatal; 2049 int err; 2050 2051 if (!(mlxsw_core->bus->features & MLXSW_BUS_F_TXRX)) 2052 return 0; 2053 2054 fw_fatal = devlink_health_reporter_create(devlink, &mlxsw_core_health_fw_fatal_ops, 2055 0, mlxsw_core); 2056 if (IS_ERR(fw_fatal)) { 2057 dev_err(mlxsw_core->bus_info->dev, "Failed to create fw fatal reporter"); 2058 return PTR_ERR(fw_fatal); 2059 } 2060 mlxsw_core->health.fw_fatal = fw_fatal; 2061 2062 err = mlxsw_core_trap_register(mlxsw_core, &mlxsw_core_health_listener, mlxsw_core); 2063 if (err) 2064 goto err_trap_register; 2065 2066 err = mlxsw_core_health_fw_fatal_config(mlxsw_core, true); 2067 if (err) 2068 goto err_fw_fatal_config; 2069 2070 return 0; 2071 2072 err_fw_fatal_config: 2073 mlxsw_core_trap_unregister(mlxsw_core, &mlxsw_core_health_listener, mlxsw_core); 2074 err_trap_register: 2075 devlink_health_reporter_destroy(mlxsw_core->health.fw_fatal); 2076 return err; 2077 } 2078 2079 static void mlxsw_core_health_fini(struct mlxsw_core *mlxsw_core) 2080 { 2081 if (!(mlxsw_core->bus->features & MLXSW_BUS_F_TXRX)) 2082 return; 2083 2084 mlxsw_core_health_fw_fatal_config(mlxsw_core, false); 2085 mlxsw_core_trap_unregister(mlxsw_core, &mlxsw_core_health_listener, mlxsw_core); 2086 /* Make sure there is no more event work scheduled */ 2087 mlxsw_core_flush_owq(); 2088 devlink_health_reporter_destroy(mlxsw_core->health.fw_fatal); 2089 } 2090 2091 static void mlxsw_core_irq_event_handler_init(struct mlxsw_core *mlxsw_core) 2092 { 2093 INIT_LIST_HEAD(&mlxsw_core->irq_event_handler_list); 2094 mutex_init(&mlxsw_core->irq_event_handler_lock); 2095 } 2096 2097 static void mlxsw_core_irq_event_handler_fini(struct mlxsw_core *mlxsw_core) 2098 { 2099 mutex_destroy(&mlxsw_core->irq_event_handler_lock); 2100 WARN_ON(!list_empty(&mlxsw_core->irq_event_handler_list)); 2101 } 2102 2103 static int 2104 __mlxsw_core_bus_device_register(const struct mlxsw_bus_info *mlxsw_bus_info, 2105 const struct mlxsw_bus *mlxsw_bus, 2106 void *bus_priv, bool reload, 2107 struct devlink *devlink, 2108 struct netlink_ext_ack *extack) 2109 { 2110 const char *device_kind = mlxsw_bus_info->device_kind; 2111 struct mlxsw_core *mlxsw_core; 2112 struct mlxsw_driver *mlxsw_driver; 2113 size_t alloc_size; 2114 u16 max_lag; 2115 int err; 2116 2117 mlxsw_driver = mlxsw_core_driver_get(device_kind); 2118 if (!mlxsw_driver) 2119 return -EINVAL; 2120 2121 if (!reload) { 2122 alloc_size = sizeof(*mlxsw_core) + mlxsw_driver->priv_size; 2123 devlink = devlink_alloc(&mlxsw_devlink_ops, alloc_size, 2124 mlxsw_bus_info->dev); 2125 if (!devlink) { 2126 err = -ENOMEM; 2127 goto err_devlink_alloc; 2128 } 2129 devl_lock(devlink); 2130 } 2131 2132 mlxsw_core = devlink_priv(devlink); 2133 INIT_LIST_HEAD(&mlxsw_core->rx_listener_list); 2134 INIT_LIST_HEAD(&mlxsw_core->event_listener_list); 2135 mlxsw_core->driver = mlxsw_driver; 2136 mlxsw_core->bus = mlxsw_bus; 2137 mlxsw_core->bus_priv = bus_priv; 2138 mlxsw_core->bus_info = mlxsw_bus_info; 2139 mlxsw_core_irq_event_handler_init(mlxsw_core); 2140 2141 err = mlxsw_bus->init(bus_priv, mlxsw_core, mlxsw_driver->profile, 2142 &mlxsw_core->res); 2143 if (err) 2144 goto err_bus_init; 2145 2146 if (mlxsw_driver->resources_register && !reload) { 2147 err = mlxsw_driver->resources_register(mlxsw_core); 2148 if (err) 2149 goto err_register_resources; 2150 } 2151 2152 err = mlxsw_ports_init(mlxsw_core, reload); 2153 if (err) 2154 goto err_ports_init; 2155 2156 err = mlxsw_core_max_lag(mlxsw_core, &max_lag); 2157 if (!err && MLXSW_CORE_RES_VALID(mlxsw_core, MAX_LAG_MEMBERS)) { 2158 alloc_size = sizeof(*mlxsw_core->lag.mapping) * max_lag * 2159 MLXSW_CORE_RES_GET(mlxsw_core, MAX_LAG_MEMBERS); 2160 mlxsw_core->lag.mapping = kzalloc(alloc_size, GFP_KERNEL); 2161 if (!mlxsw_core->lag.mapping) { 2162 err = -ENOMEM; 2163 goto err_alloc_lag_mapping; 2164 } 2165 } 2166 2167 err = mlxsw_core_trap_groups_set(mlxsw_core); 2168 if (err) 2169 goto err_trap_groups_set; 2170 2171 err = mlxsw_emad_init(mlxsw_core); 2172 if (err) 2173 goto err_emad_init; 2174 2175 if (!reload) { 2176 err = mlxsw_core_params_register(mlxsw_core); 2177 if (err) 2178 goto err_register_params; 2179 } 2180 2181 err = mlxsw_core_fw_rev_validate(mlxsw_core, mlxsw_bus_info, mlxsw_driver->fw_req_rev, 2182 mlxsw_driver->fw_filename); 2183 if (err) 2184 goto err_fw_rev_validate; 2185 2186 err = mlxsw_linecards_init(mlxsw_core, mlxsw_bus_info); 2187 if (err) 2188 goto err_linecards_init; 2189 2190 err = mlxsw_core_health_init(mlxsw_core); 2191 if (err) 2192 goto err_health_init; 2193 2194 err = mlxsw_hwmon_init(mlxsw_core, mlxsw_bus_info, &mlxsw_core->hwmon); 2195 if (err) 2196 goto err_hwmon_init; 2197 2198 err = mlxsw_thermal_init(mlxsw_core, mlxsw_bus_info, 2199 &mlxsw_core->thermal); 2200 if (err) 2201 goto err_thermal_init; 2202 2203 err = mlxsw_env_init(mlxsw_core, mlxsw_bus_info, &mlxsw_core->env); 2204 if (err) 2205 goto err_env_init; 2206 2207 if (mlxsw_driver->init) { 2208 err = mlxsw_driver->init(mlxsw_core, mlxsw_bus_info, extack); 2209 if (err) 2210 goto err_driver_init; 2211 } 2212 2213 if (!reload) { 2214 devlink_set_features(devlink, DEVLINK_F_RELOAD); 2215 devl_unlock(devlink); 2216 devlink_register(devlink); 2217 } 2218 return 0; 2219 2220 err_driver_init: 2221 mlxsw_env_fini(mlxsw_core->env); 2222 err_env_init: 2223 mlxsw_thermal_fini(mlxsw_core->thermal); 2224 err_thermal_init: 2225 mlxsw_hwmon_fini(mlxsw_core->hwmon); 2226 err_hwmon_init: 2227 mlxsw_core_health_fini(mlxsw_core); 2228 err_health_init: 2229 mlxsw_linecards_fini(mlxsw_core); 2230 err_linecards_init: 2231 err_fw_rev_validate: 2232 if (!reload) 2233 mlxsw_core_params_unregister(mlxsw_core); 2234 err_register_params: 2235 mlxsw_emad_fini(mlxsw_core); 2236 err_emad_init: 2237 err_trap_groups_set: 2238 kfree(mlxsw_core->lag.mapping); 2239 err_alloc_lag_mapping: 2240 mlxsw_ports_fini(mlxsw_core, reload); 2241 err_ports_init: 2242 if (!reload) 2243 devl_resources_unregister(devlink); 2244 err_register_resources: 2245 mlxsw_bus->fini(bus_priv); 2246 err_bus_init: 2247 mlxsw_core_irq_event_handler_fini(mlxsw_core); 2248 if (!reload) { 2249 devl_unlock(devlink); 2250 devlink_free(devlink); 2251 } 2252 err_devlink_alloc: 2253 return err; 2254 } 2255 2256 int mlxsw_core_bus_device_register(const struct mlxsw_bus_info *mlxsw_bus_info, 2257 const struct mlxsw_bus *mlxsw_bus, 2258 void *bus_priv, bool reload, 2259 struct devlink *devlink, 2260 struct netlink_ext_ack *extack) 2261 { 2262 bool called_again = false; 2263 int err; 2264 2265 again: 2266 err = __mlxsw_core_bus_device_register(mlxsw_bus_info, mlxsw_bus, 2267 bus_priv, reload, 2268 devlink, extack); 2269 /* -EAGAIN is returned in case the FW was updated. FW needs 2270 * a reset, so lets try to call __mlxsw_core_bus_device_register() 2271 * again. 2272 */ 2273 if (err == -EAGAIN && !called_again) { 2274 called_again = true; 2275 goto again; 2276 } 2277 2278 return err; 2279 } 2280 EXPORT_SYMBOL(mlxsw_core_bus_device_register); 2281 2282 void mlxsw_core_bus_device_unregister(struct mlxsw_core *mlxsw_core, 2283 bool reload) 2284 { 2285 struct devlink *devlink = priv_to_devlink(mlxsw_core); 2286 2287 if (!reload) { 2288 devlink_unregister(devlink); 2289 devl_lock(devlink); 2290 } 2291 2292 if (devlink_is_reload_failed(devlink)) { 2293 if (!reload) 2294 /* Only the parts that were not de-initialized in the 2295 * failed reload attempt need to be de-initialized. 2296 */ 2297 goto reload_fail_deinit; 2298 else 2299 return; 2300 } 2301 2302 if (mlxsw_core->driver->fini) 2303 mlxsw_core->driver->fini(mlxsw_core); 2304 mlxsw_env_fini(mlxsw_core->env); 2305 mlxsw_thermal_fini(mlxsw_core->thermal); 2306 mlxsw_hwmon_fini(mlxsw_core->hwmon); 2307 mlxsw_core_health_fini(mlxsw_core); 2308 mlxsw_linecards_fini(mlxsw_core); 2309 if (!reload) 2310 mlxsw_core_params_unregister(mlxsw_core); 2311 mlxsw_emad_fini(mlxsw_core); 2312 kfree(mlxsw_core->lag.mapping); 2313 mlxsw_ports_fini(mlxsw_core, reload); 2314 if (!reload) 2315 devl_resources_unregister(devlink); 2316 mlxsw_core->bus->fini(mlxsw_core->bus_priv); 2317 mlxsw_core_irq_event_handler_fini(mlxsw_core); 2318 if (!reload) { 2319 devl_unlock(devlink); 2320 devlink_free(devlink); 2321 } 2322 2323 return; 2324 2325 reload_fail_deinit: 2326 mlxsw_core_params_unregister(mlxsw_core); 2327 devl_resources_unregister(devlink); 2328 devl_unlock(devlink); 2329 devlink_free(devlink); 2330 } 2331 EXPORT_SYMBOL(mlxsw_core_bus_device_unregister); 2332 2333 bool mlxsw_core_skb_transmit_busy(struct mlxsw_core *mlxsw_core, 2334 const struct mlxsw_tx_info *tx_info) 2335 { 2336 return mlxsw_core->bus->skb_transmit_busy(mlxsw_core->bus_priv, 2337 tx_info); 2338 } 2339 EXPORT_SYMBOL(mlxsw_core_skb_transmit_busy); 2340 2341 int mlxsw_core_skb_transmit(struct mlxsw_core *mlxsw_core, struct sk_buff *skb, 2342 const struct mlxsw_tx_info *tx_info) 2343 { 2344 return mlxsw_core->bus->skb_transmit(mlxsw_core->bus_priv, skb, 2345 tx_info); 2346 } 2347 EXPORT_SYMBOL(mlxsw_core_skb_transmit); 2348 2349 void mlxsw_core_ptp_transmitted(struct mlxsw_core *mlxsw_core, 2350 struct sk_buff *skb, u16 local_port) 2351 { 2352 if (mlxsw_core->driver->ptp_transmitted) 2353 mlxsw_core->driver->ptp_transmitted(mlxsw_core, skb, 2354 local_port); 2355 } 2356 EXPORT_SYMBOL(mlxsw_core_ptp_transmitted); 2357 2358 static bool __is_rx_listener_equal(const struct mlxsw_rx_listener *rxl_a, 2359 const struct mlxsw_rx_listener *rxl_b) 2360 { 2361 return (rxl_a->func == rxl_b->func && 2362 rxl_a->local_port == rxl_b->local_port && 2363 rxl_a->trap_id == rxl_b->trap_id && 2364 rxl_a->mirror_reason == rxl_b->mirror_reason); 2365 } 2366 2367 static struct mlxsw_rx_listener_item * 2368 __find_rx_listener_item(struct mlxsw_core *mlxsw_core, 2369 const struct mlxsw_rx_listener *rxl) 2370 { 2371 struct mlxsw_rx_listener_item *rxl_item; 2372 2373 list_for_each_entry(rxl_item, &mlxsw_core->rx_listener_list, list) { 2374 if (__is_rx_listener_equal(&rxl_item->rxl, rxl)) 2375 return rxl_item; 2376 } 2377 return NULL; 2378 } 2379 2380 int mlxsw_core_rx_listener_register(struct mlxsw_core *mlxsw_core, 2381 const struct mlxsw_rx_listener *rxl, 2382 void *priv, bool enabled) 2383 { 2384 struct mlxsw_rx_listener_item *rxl_item; 2385 2386 rxl_item = __find_rx_listener_item(mlxsw_core, rxl); 2387 if (rxl_item) 2388 return -EEXIST; 2389 rxl_item = kmalloc(sizeof(*rxl_item), GFP_KERNEL); 2390 if (!rxl_item) 2391 return -ENOMEM; 2392 rxl_item->rxl = *rxl; 2393 rxl_item->priv = priv; 2394 rxl_item->enabled = enabled; 2395 2396 list_add_rcu(&rxl_item->list, &mlxsw_core->rx_listener_list); 2397 return 0; 2398 } 2399 EXPORT_SYMBOL(mlxsw_core_rx_listener_register); 2400 2401 void mlxsw_core_rx_listener_unregister(struct mlxsw_core *mlxsw_core, 2402 const struct mlxsw_rx_listener *rxl) 2403 { 2404 struct mlxsw_rx_listener_item *rxl_item; 2405 2406 rxl_item = __find_rx_listener_item(mlxsw_core, rxl); 2407 if (!rxl_item) 2408 return; 2409 list_del_rcu(&rxl_item->list); 2410 synchronize_rcu(); 2411 kfree(rxl_item); 2412 } 2413 EXPORT_SYMBOL(mlxsw_core_rx_listener_unregister); 2414 2415 static void 2416 mlxsw_core_rx_listener_state_set(struct mlxsw_core *mlxsw_core, 2417 const struct mlxsw_rx_listener *rxl, 2418 bool enabled) 2419 { 2420 struct mlxsw_rx_listener_item *rxl_item; 2421 2422 rxl_item = __find_rx_listener_item(mlxsw_core, rxl); 2423 if (WARN_ON(!rxl_item)) 2424 return; 2425 rxl_item->enabled = enabled; 2426 } 2427 2428 static void mlxsw_core_event_listener_func(struct sk_buff *skb, u16 local_port, 2429 void *priv) 2430 { 2431 struct mlxsw_event_listener_item *event_listener_item = priv; 2432 struct mlxsw_core *mlxsw_core; 2433 struct mlxsw_reg_info reg; 2434 char *payload; 2435 char *reg_tlv; 2436 char *op_tlv; 2437 2438 mlxsw_core = event_listener_item->mlxsw_core; 2439 trace_devlink_hwmsg(priv_to_devlink(mlxsw_core), true, 0, 2440 skb->data, skb->len); 2441 2442 mlxsw_emad_tlv_parse(skb); 2443 op_tlv = mlxsw_emad_op_tlv(skb); 2444 reg_tlv = mlxsw_emad_reg_tlv(skb); 2445 2446 reg.id = mlxsw_emad_op_tlv_register_id_get(op_tlv); 2447 reg.len = (mlxsw_emad_reg_tlv_len_get(reg_tlv) - 1) * sizeof(u32); 2448 payload = mlxsw_emad_reg_payload(reg_tlv); 2449 event_listener_item->el.func(®, payload, event_listener_item->priv); 2450 dev_kfree_skb(skb); 2451 } 2452 2453 static bool __is_event_listener_equal(const struct mlxsw_event_listener *el_a, 2454 const struct mlxsw_event_listener *el_b) 2455 { 2456 return (el_a->func == el_b->func && 2457 el_a->trap_id == el_b->trap_id); 2458 } 2459 2460 static struct mlxsw_event_listener_item * 2461 __find_event_listener_item(struct mlxsw_core *mlxsw_core, 2462 const struct mlxsw_event_listener *el) 2463 { 2464 struct mlxsw_event_listener_item *el_item; 2465 2466 list_for_each_entry(el_item, &mlxsw_core->event_listener_list, list) { 2467 if (__is_event_listener_equal(&el_item->el, el)) 2468 return el_item; 2469 } 2470 return NULL; 2471 } 2472 2473 int mlxsw_core_event_listener_register(struct mlxsw_core *mlxsw_core, 2474 const struct mlxsw_event_listener *el, 2475 void *priv) 2476 { 2477 int err; 2478 struct mlxsw_event_listener_item *el_item; 2479 const struct mlxsw_rx_listener rxl = { 2480 .func = mlxsw_core_event_listener_func, 2481 .local_port = MLXSW_PORT_DONT_CARE, 2482 .trap_id = el->trap_id, 2483 }; 2484 2485 el_item = __find_event_listener_item(mlxsw_core, el); 2486 if (el_item) 2487 return -EEXIST; 2488 el_item = kmalloc(sizeof(*el_item), GFP_KERNEL); 2489 if (!el_item) 2490 return -ENOMEM; 2491 el_item->mlxsw_core = mlxsw_core; 2492 el_item->el = *el; 2493 el_item->priv = priv; 2494 2495 err = mlxsw_core_rx_listener_register(mlxsw_core, &rxl, el_item, true); 2496 if (err) 2497 goto err_rx_listener_register; 2498 2499 /* No reason to save item if we did not manage to register an RX 2500 * listener for it. 2501 */ 2502 list_add_rcu(&el_item->list, &mlxsw_core->event_listener_list); 2503 2504 return 0; 2505 2506 err_rx_listener_register: 2507 kfree(el_item); 2508 return err; 2509 } 2510 EXPORT_SYMBOL(mlxsw_core_event_listener_register); 2511 2512 void mlxsw_core_event_listener_unregister(struct mlxsw_core *mlxsw_core, 2513 const struct mlxsw_event_listener *el) 2514 { 2515 struct mlxsw_event_listener_item *el_item; 2516 const struct mlxsw_rx_listener rxl = { 2517 .func = mlxsw_core_event_listener_func, 2518 .local_port = MLXSW_PORT_DONT_CARE, 2519 .trap_id = el->trap_id, 2520 }; 2521 2522 el_item = __find_event_listener_item(mlxsw_core, el); 2523 if (!el_item) 2524 return; 2525 mlxsw_core_rx_listener_unregister(mlxsw_core, &rxl); 2526 list_del(&el_item->list); 2527 kfree(el_item); 2528 } 2529 EXPORT_SYMBOL(mlxsw_core_event_listener_unregister); 2530 2531 static int mlxsw_core_listener_register(struct mlxsw_core *mlxsw_core, 2532 const struct mlxsw_listener *listener, 2533 void *priv, bool enabled) 2534 { 2535 if (listener->is_event) { 2536 WARN_ON(!enabled); 2537 return mlxsw_core_event_listener_register(mlxsw_core, 2538 &listener->event_listener, 2539 priv); 2540 } else { 2541 return mlxsw_core_rx_listener_register(mlxsw_core, 2542 &listener->rx_listener, 2543 priv, enabled); 2544 } 2545 } 2546 2547 static void mlxsw_core_listener_unregister(struct mlxsw_core *mlxsw_core, 2548 const struct mlxsw_listener *listener, 2549 void *priv) 2550 { 2551 if (listener->is_event) 2552 mlxsw_core_event_listener_unregister(mlxsw_core, 2553 &listener->event_listener); 2554 else 2555 mlxsw_core_rx_listener_unregister(mlxsw_core, 2556 &listener->rx_listener); 2557 } 2558 2559 int mlxsw_core_trap_register(struct mlxsw_core *mlxsw_core, 2560 const struct mlxsw_listener *listener, void *priv) 2561 { 2562 enum mlxsw_reg_htgt_trap_group trap_group; 2563 enum mlxsw_reg_hpkt_action action; 2564 char hpkt_pl[MLXSW_REG_HPKT_LEN]; 2565 int err; 2566 2567 if (!(mlxsw_core->bus->features & MLXSW_BUS_F_TXRX)) 2568 return 0; 2569 2570 err = mlxsw_core_listener_register(mlxsw_core, listener, priv, 2571 listener->enabled_on_register); 2572 if (err) 2573 return err; 2574 2575 action = listener->enabled_on_register ? listener->en_action : 2576 listener->dis_action; 2577 trap_group = listener->enabled_on_register ? listener->en_trap_group : 2578 listener->dis_trap_group; 2579 mlxsw_reg_hpkt_pack(hpkt_pl, action, listener->trap_id, 2580 trap_group, listener->is_ctrl); 2581 err = mlxsw_reg_write(mlxsw_core, MLXSW_REG(hpkt), hpkt_pl); 2582 if (err) 2583 goto err_trap_set; 2584 2585 return 0; 2586 2587 err_trap_set: 2588 mlxsw_core_listener_unregister(mlxsw_core, listener, priv); 2589 return err; 2590 } 2591 EXPORT_SYMBOL(mlxsw_core_trap_register); 2592 2593 void mlxsw_core_trap_unregister(struct mlxsw_core *mlxsw_core, 2594 const struct mlxsw_listener *listener, 2595 void *priv) 2596 { 2597 char hpkt_pl[MLXSW_REG_HPKT_LEN]; 2598 2599 if (!(mlxsw_core->bus->features & MLXSW_BUS_F_TXRX)) 2600 return; 2601 2602 if (!listener->is_event) { 2603 mlxsw_reg_hpkt_pack(hpkt_pl, listener->dis_action, 2604 listener->trap_id, listener->dis_trap_group, 2605 listener->is_ctrl); 2606 mlxsw_reg_write(mlxsw_core, MLXSW_REG(hpkt), hpkt_pl); 2607 } 2608 2609 mlxsw_core_listener_unregister(mlxsw_core, listener, priv); 2610 } 2611 EXPORT_SYMBOL(mlxsw_core_trap_unregister); 2612 2613 int mlxsw_core_traps_register(struct mlxsw_core *mlxsw_core, 2614 const struct mlxsw_listener *listeners, 2615 size_t listeners_count, void *priv) 2616 { 2617 int i, err; 2618 2619 for (i = 0; i < listeners_count; i++) { 2620 err = mlxsw_core_trap_register(mlxsw_core, 2621 &listeners[i], 2622 priv); 2623 if (err) 2624 goto err_listener_register; 2625 } 2626 return 0; 2627 2628 err_listener_register: 2629 for (i--; i >= 0; i--) { 2630 mlxsw_core_trap_unregister(mlxsw_core, 2631 &listeners[i], 2632 priv); 2633 } 2634 return err; 2635 } 2636 EXPORT_SYMBOL(mlxsw_core_traps_register); 2637 2638 void mlxsw_core_traps_unregister(struct mlxsw_core *mlxsw_core, 2639 const struct mlxsw_listener *listeners, 2640 size_t listeners_count, void *priv) 2641 { 2642 int i; 2643 2644 for (i = 0; i < listeners_count; i++) { 2645 mlxsw_core_trap_unregister(mlxsw_core, 2646 &listeners[i], 2647 priv); 2648 } 2649 } 2650 EXPORT_SYMBOL(mlxsw_core_traps_unregister); 2651 2652 int mlxsw_core_trap_state_set(struct mlxsw_core *mlxsw_core, 2653 const struct mlxsw_listener *listener, 2654 bool enabled) 2655 { 2656 enum mlxsw_reg_htgt_trap_group trap_group; 2657 enum mlxsw_reg_hpkt_action action; 2658 char hpkt_pl[MLXSW_REG_HPKT_LEN]; 2659 int err; 2660 2661 /* Not supported for event listener */ 2662 if (WARN_ON(listener->is_event)) 2663 return -EINVAL; 2664 2665 action = enabled ? listener->en_action : listener->dis_action; 2666 trap_group = enabled ? listener->en_trap_group : 2667 listener->dis_trap_group; 2668 mlxsw_reg_hpkt_pack(hpkt_pl, action, listener->trap_id, 2669 trap_group, listener->is_ctrl); 2670 err = mlxsw_reg_write(mlxsw_core, MLXSW_REG(hpkt), hpkt_pl); 2671 if (err) 2672 return err; 2673 2674 mlxsw_core_rx_listener_state_set(mlxsw_core, &listener->rx_listener, 2675 enabled); 2676 return 0; 2677 } 2678 EXPORT_SYMBOL(mlxsw_core_trap_state_set); 2679 2680 static u64 mlxsw_core_tid_get(struct mlxsw_core *mlxsw_core) 2681 { 2682 return atomic64_inc_return(&mlxsw_core->emad.tid); 2683 } 2684 2685 static int mlxsw_core_reg_access_emad(struct mlxsw_core *mlxsw_core, 2686 const struct mlxsw_reg_info *reg, 2687 char *payload, 2688 enum mlxsw_core_reg_access_type type, 2689 struct list_head *bulk_list, 2690 mlxsw_reg_trans_cb_t *cb, 2691 unsigned long cb_priv) 2692 { 2693 u64 tid = mlxsw_core_tid_get(mlxsw_core); 2694 struct mlxsw_reg_trans *trans; 2695 int err; 2696 2697 trans = kzalloc(sizeof(*trans), GFP_KERNEL); 2698 if (!trans) 2699 return -ENOMEM; 2700 2701 err = mlxsw_emad_reg_access(mlxsw_core, reg, payload, type, trans, 2702 bulk_list, cb, cb_priv, tid); 2703 if (err) { 2704 kfree_rcu(trans, rcu); 2705 return err; 2706 } 2707 return 0; 2708 } 2709 2710 int mlxsw_reg_trans_query(struct mlxsw_core *mlxsw_core, 2711 const struct mlxsw_reg_info *reg, char *payload, 2712 struct list_head *bulk_list, 2713 mlxsw_reg_trans_cb_t *cb, unsigned long cb_priv) 2714 { 2715 return mlxsw_core_reg_access_emad(mlxsw_core, reg, payload, 2716 MLXSW_CORE_REG_ACCESS_TYPE_QUERY, 2717 bulk_list, cb, cb_priv); 2718 } 2719 EXPORT_SYMBOL(mlxsw_reg_trans_query); 2720 2721 int mlxsw_reg_trans_write(struct mlxsw_core *mlxsw_core, 2722 const struct mlxsw_reg_info *reg, char *payload, 2723 struct list_head *bulk_list, 2724 mlxsw_reg_trans_cb_t *cb, unsigned long cb_priv) 2725 { 2726 return mlxsw_core_reg_access_emad(mlxsw_core, reg, payload, 2727 MLXSW_CORE_REG_ACCESS_TYPE_WRITE, 2728 bulk_list, cb, cb_priv); 2729 } 2730 EXPORT_SYMBOL(mlxsw_reg_trans_write); 2731 2732 #define MLXSW_REG_TRANS_ERR_STRING_SIZE 256 2733 2734 static int mlxsw_reg_trans_wait(struct mlxsw_reg_trans *trans) 2735 { 2736 char err_string[MLXSW_REG_TRANS_ERR_STRING_SIZE]; 2737 struct mlxsw_core *mlxsw_core = trans->core; 2738 int err; 2739 2740 wait_for_completion(&trans->completion); 2741 cancel_delayed_work_sync(&trans->timeout_dw); 2742 err = trans->err; 2743 2744 if (trans->retries) 2745 dev_warn(mlxsw_core->bus_info->dev, "EMAD retries (%d/%d) (tid=%llx)\n", 2746 trans->retries, MLXSW_EMAD_MAX_RETRY, trans->tid); 2747 if (err) { 2748 dev_err(mlxsw_core->bus_info->dev, "EMAD reg access failed (tid=%llx,reg_id=%x(%s),type=%s,status=%x(%s))\n", 2749 trans->tid, trans->reg->id, 2750 mlxsw_reg_id_str(trans->reg->id), 2751 mlxsw_core_reg_access_type_str(trans->type), 2752 trans->emad_status, 2753 mlxsw_emad_op_tlv_status_str(trans->emad_status)); 2754 2755 snprintf(err_string, MLXSW_REG_TRANS_ERR_STRING_SIZE, 2756 "(tid=%llx,reg_id=%x(%s)) %s (%s)\n", trans->tid, 2757 trans->reg->id, mlxsw_reg_id_str(trans->reg->id), 2758 mlxsw_emad_op_tlv_status_str(trans->emad_status), 2759 trans->emad_err_string ? trans->emad_err_string : ""); 2760 2761 trace_devlink_hwerr(priv_to_devlink(mlxsw_core), 2762 trans->emad_status, err_string); 2763 2764 kfree(trans->emad_err_string); 2765 } 2766 2767 list_del(&trans->bulk_list); 2768 kfree_rcu(trans, rcu); 2769 return err; 2770 } 2771 2772 int mlxsw_reg_trans_bulk_wait(struct list_head *bulk_list) 2773 { 2774 struct mlxsw_reg_trans *trans; 2775 struct mlxsw_reg_trans *tmp; 2776 int sum_err = 0; 2777 int err; 2778 2779 list_for_each_entry_safe(trans, tmp, bulk_list, bulk_list) { 2780 err = mlxsw_reg_trans_wait(trans); 2781 if (err && sum_err == 0) 2782 sum_err = err; /* first error to be returned */ 2783 } 2784 return sum_err; 2785 } 2786 EXPORT_SYMBOL(mlxsw_reg_trans_bulk_wait); 2787 2788 struct mlxsw_core_irq_event_handler_item { 2789 struct list_head list; 2790 void (*cb)(struct mlxsw_core *mlxsw_core); 2791 }; 2792 2793 int mlxsw_core_irq_event_handler_register(struct mlxsw_core *mlxsw_core, 2794 mlxsw_irq_event_cb_t cb) 2795 { 2796 struct mlxsw_core_irq_event_handler_item *item; 2797 2798 item = kzalloc(sizeof(*item), GFP_KERNEL); 2799 if (!item) 2800 return -ENOMEM; 2801 item->cb = cb; 2802 mutex_lock(&mlxsw_core->irq_event_handler_lock); 2803 list_add_tail(&item->list, &mlxsw_core->irq_event_handler_list); 2804 mutex_unlock(&mlxsw_core->irq_event_handler_lock); 2805 return 0; 2806 } 2807 EXPORT_SYMBOL(mlxsw_core_irq_event_handler_register); 2808 2809 void mlxsw_core_irq_event_handler_unregister(struct mlxsw_core *mlxsw_core, 2810 mlxsw_irq_event_cb_t cb) 2811 { 2812 struct mlxsw_core_irq_event_handler_item *item, *tmp; 2813 2814 mutex_lock(&mlxsw_core->irq_event_handler_lock); 2815 list_for_each_entry_safe(item, tmp, 2816 &mlxsw_core->irq_event_handler_list, list) { 2817 if (item->cb == cb) { 2818 list_del(&item->list); 2819 kfree(item); 2820 } 2821 } 2822 mutex_unlock(&mlxsw_core->irq_event_handler_lock); 2823 } 2824 EXPORT_SYMBOL(mlxsw_core_irq_event_handler_unregister); 2825 2826 void mlxsw_core_irq_event_handlers_call(struct mlxsw_core *mlxsw_core) 2827 { 2828 struct mlxsw_core_irq_event_handler_item *item; 2829 2830 mutex_lock(&mlxsw_core->irq_event_handler_lock); 2831 list_for_each_entry(item, &mlxsw_core->irq_event_handler_list, list) { 2832 if (item->cb) 2833 item->cb(mlxsw_core); 2834 } 2835 mutex_unlock(&mlxsw_core->irq_event_handler_lock); 2836 } 2837 EXPORT_SYMBOL(mlxsw_core_irq_event_handlers_call); 2838 2839 static int mlxsw_core_reg_access_cmd(struct mlxsw_core *mlxsw_core, 2840 const struct mlxsw_reg_info *reg, 2841 char *payload, 2842 enum mlxsw_core_reg_access_type type) 2843 { 2844 enum mlxsw_emad_op_tlv_status status; 2845 int err, n_retry; 2846 bool reset_ok; 2847 char *in_mbox, *out_mbox, *tmp; 2848 2849 dev_dbg(mlxsw_core->bus_info->dev, "Reg cmd access (reg_id=%x(%s),type=%s)\n", 2850 reg->id, mlxsw_reg_id_str(reg->id), 2851 mlxsw_core_reg_access_type_str(type)); 2852 2853 in_mbox = mlxsw_cmd_mbox_alloc(); 2854 if (!in_mbox) 2855 return -ENOMEM; 2856 2857 out_mbox = mlxsw_cmd_mbox_alloc(); 2858 if (!out_mbox) { 2859 err = -ENOMEM; 2860 goto free_in_mbox; 2861 } 2862 2863 mlxsw_emad_pack_op_tlv(in_mbox, reg, type, 2864 mlxsw_core_tid_get(mlxsw_core)); 2865 tmp = in_mbox + MLXSW_EMAD_OP_TLV_LEN * sizeof(u32); 2866 mlxsw_emad_pack_reg_tlv(tmp, reg, payload); 2867 2868 /* There is a special treatment needed for MRSR (reset) register. 2869 * The command interface will return error after the command 2870 * is executed, so tell the lower layer to expect it 2871 * and cope accordingly. 2872 */ 2873 reset_ok = reg->id == MLXSW_REG_MRSR_ID; 2874 2875 n_retry = 0; 2876 retry: 2877 err = mlxsw_cmd_access_reg(mlxsw_core, reset_ok, in_mbox, out_mbox); 2878 if (!err) { 2879 err = mlxsw_emad_process_status(out_mbox, &status); 2880 if (err) { 2881 if (err == -EAGAIN && n_retry++ < MLXSW_EMAD_MAX_RETRY) 2882 goto retry; 2883 dev_err(mlxsw_core->bus_info->dev, "Reg cmd access status failed (status=%x(%s))\n", 2884 status, mlxsw_emad_op_tlv_status_str(status)); 2885 } 2886 } 2887 2888 if (!err) 2889 memcpy(payload, mlxsw_emad_reg_payload_cmd(out_mbox), 2890 reg->len); 2891 2892 mlxsw_cmd_mbox_free(out_mbox); 2893 free_in_mbox: 2894 mlxsw_cmd_mbox_free(in_mbox); 2895 if (err) 2896 dev_err(mlxsw_core->bus_info->dev, "Reg cmd access failed (reg_id=%x(%s),type=%s)\n", 2897 reg->id, mlxsw_reg_id_str(reg->id), 2898 mlxsw_core_reg_access_type_str(type)); 2899 return err; 2900 } 2901 2902 static void mlxsw_core_reg_access_cb(struct mlxsw_core *mlxsw_core, 2903 char *payload, size_t payload_len, 2904 unsigned long cb_priv) 2905 { 2906 char *orig_payload = (char *) cb_priv; 2907 2908 memcpy(orig_payload, payload, payload_len); 2909 } 2910 2911 static int mlxsw_core_reg_access(struct mlxsw_core *mlxsw_core, 2912 const struct mlxsw_reg_info *reg, 2913 char *payload, 2914 enum mlxsw_core_reg_access_type type) 2915 { 2916 LIST_HEAD(bulk_list); 2917 int err; 2918 2919 /* During initialization EMAD interface is not available to us, 2920 * so we default to command interface. We switch to EMAD interface 2921 * after setting the appropriate traps. 2922 */ 2923 if (!mlxsw_core->emad.use_emad) 2924 return mlxsw_core_reg_access_cmd(mlxsw_core, reg, 2925 payload, type); 2926 2927 err = mlxsw_core_reg_access_emad(mlxsw_core, reg, 2928 payload, type, &bulk_list, 2929 mlxsw_core_reg_access_cb, 2930 (unsigned long) payload); 2931 if (err) 2932 return err; 2933 return mlxsw_reg_trans_bulk_wait(&bulk_list); 2934 } 2935 2936 int mlxsw_reg_query(struct mlxsw_core *mlxsw_core, 2937 const struct mlxsw_reg_info *reg, char *payload) 2938 { 2939 return mlxsw_core_reg_access(mlxsw_core, reg, payload, 2940 MLXSW_CORE_REG_ACCESS_TYPE_QUERY); 2941 } 2942 EXPORT_SYMBOL(mlxsw_reg_query); 2943 2944 int mlxsw_reg_write(struct mlxsw_core *mlxsw_core, 2945 const struct mlxsw_reg_info *reg, char *payload) 2946 { 2947 return mlxsw_core_reg_access(mlxsw_core, reg, payload, 2948 MLXSW_CORE_REG_ACCESS_TYPE_WRITE); 2949 } 2950 EXPORT_SYMBOL(mlxsw_reg_write); 2951 2952 void mlxsw_core_skb_receive(struct mlxsw_core *mlxsw_core, struct sk_buff *skb, 2953 struct mlxsw_rx_info *rx_info) 2954 { 2955 struct mlxsw_rx_listener_item *rxl_item; 2956 const struct mlxsw_rx_listener *rxl; 2957 u16 local_port; 2958 bool found = false; 2959 2960 if (rx_info->is_lag) { 2961 dev_dbg_ratelimited(mlxsw_core->bus_info->dev, "%s: lag_id = %d, lag_port_index = 0x%x\n", 2962 __func__, rx_info->u.lag_id, 2963 rx_info->trap_id); 2964 /* Upper layer does not care if the skb came from LAG or not, 2965 * so just get the local_port for the lag port and push it up. 2966 */ 2967 local_port = mlxsw_core_lag_mapping_get(mlxsw_core, 2968 rx_info->u.lag_id, 2969 rx_info->lag_port_index); 2970 } else { 2971 local_port = rx_info->u.sys_port; 2972 } 2973 2974 dev_dbg_ratelimited(mlxsw_core->bus_info->dev, "%s: local_port = %d, trap_id = 0x%x\n", 2975 __func__, local_port, rx_info->trap_id); 2976 2977 if ((rx_info->trap_id >= MLXSW_TRAP_ID_MAX) || 2978 (local_port >= mlxsw_core->max_ports)) 2979 goto drop; 2980 2981 rcu_read_lock(); 2982 list_for_each_entry_rcu(rxl_item, &mlxsw_core->rx_listener_list, list) { 2983 rxl = &rxl_item->rxl; 2984 if ((rxl->local_port == MLXSW_PORT_DONT_CARE || 2985 rxl->local_port == local_port) && 2986 rxl->trap_id == rx_info->trap_id && 2987 rxl->mirror_reason == rx_info->mirror_reason) { 2988 if (rxl_item->enabled) 2989 found = true; 2990 break; 2991 } 2992 } 2993 if (!found) { 2994 rcu_read_unlock(); 2995 goto drop; 2996 } 2997 2998 rxl->func(skb, local_port, rxl_item->priv); 2999 rcu_read_unlock(); 3000 return; 3001 3002 drop: 3003 dev_kfree_skb(skb); 3004 } 3005 EXPORT_SYMBOL(mlxsw_core_skb_receive); 3006 3007 static int mlxsw_core_lag_mapping_index(struct mlxsw_core *mlxsw_core, 3008 u16 lag_id, u8 port_index) 3009 { 3010 return MLXSW_CORE_RES_GET(mlxsw_core, MAX_LAG_MEMBERS) * lag_id + 3011 port_index; 3012 } 3013 3014 void mlxsw_core_lag_mapping_set(struct mlxsw_core *mlxsw_core, 3015 u16 lag_id, u8 port_index, u16 local_port) 3016 { 3017 int index = mlxsw_core_lag_mapping_index(mlxsw_core, 3018 lag_id, port_index); 3019 3020 mlxsw_core->lag.mapping[index] = local_port; 3021 } 3022 EXPORT_SYMBOL(mlxsw_core_lag_mapping_set); 3023 3024 u16 mlxsw_core_lag_mapping_get(struct mlxsw_core *mlxsw_core, 3025 u16 lag_id, u8 port_index) 3026 { 3027 int index = mlxsw_core_lag_mapping_index(mlxsw_core, 3028 lag_id, port_index); 3029 3030 return mlxsw_core->lag.mapping[index]; 3031 } 3032 EXPORT_SYMBOL(mlxsw_core_lag_mapping_get); 3033 3034 void mlxsw_core_lag_mapping_clear(struct mlxsw_core *mlxsw_core, 3035 u16 lag_id, u16 local_port) 3036 { 3037 int i; 3038 3039 for (i = 0; i < MLXSW_CORE_RES_GET(mlxsw_core, MAX_LAG_MEMBERS); i++) { 3040 int index = mlxsw_core_lag_mapping_index(mlxsw_core, 3041 lag_id, i); 3042 3043 if (mlxsw_core->lag.mapping[index] == local_port) 3044 mlxsw_core->lag.mapping[index] = 0; 3045 } 3046 } 3047 EXPORT_SYMBOL(mlxsw_core_lag_mapping_clear); 3048 3049 bool mlxsw_core_res_valid(struct mlxsw_core *mlxsw_core, 3050 enum mlxsw_res_id res_id) 3051 { 3052 return mlxsw_res_valid(&mlxsw_core->res, res_id); 3053 } 3054 EXPORT_SYMBOL(mlxsw_core_res_valid); 3055 3056 u64 mlxsw_core_res_get(struct mlxsw_core *mlxsw_core, 3057 enum mlxsw_res_id res_id) 3058 { 3059 return mlxsw_res_get(&mlxsw_core->res, res_id); 3060 } 3061 EXPORT_SYMBOL(mlxsw_core_res_get); 3062 3063 static int __mlxsw_core_port_init(struct mlxsw_core *mlxsw_core, u16 local_port, 3064 enum devlink_port_flavour flavour, 3065 u8 slot_index, u32 port_number, bool split, 3066 u32 split_port_subnumber, 3067 bool splittable, u32 lanes, 3068 const unsigned char *switch_id, 3069 unsigned char switch_id_len) 3070 { 3071 struct devlink *devlink = priv_to_devlink(mlxsw_core); 3072 struct mlxsw_core_port *mlxsw_core_port = 3073 &mlxsw_core->ports[local_port]; 3074 struct devlink_port *devlink_port = &mlxsw_core_port->devlink_port; 3075 struct devlink_port_attrs attrs = {}; 3076 int err; 3077 3078 attrs.split = split; 3079 attrs.lanes = lanes; 3080 attrs.splittable = splittable; 3081 attrs.flavour = flavour; 3082 attrs.phys.port_number = port_number; 3083 attrs.phys.split_subport_number = split_port_subnumber; 3084 memcpy(attrs.switch_id.id, switch_id, switch_id_len); 3085 attrs.switch_id.id_len = switch_id_len; 3086 mlxsw_core_port->local_port = local_port; 3087 devlink_port_attrs_set(devlink_port, &attrs); 3088 if (slot_index) { 3089 struct mlxsw_linecard *linecard; 3090 3091 linecard = mlxsw_linecard_get(mlxsw_core->linecards, 3092 slot_index); 3093 mlxsw_core_port->linecard = linecard; 3094 devlink_port_linecard_set(devlink_port, 3095 linecard->devlink_linecard); 3096 } 3097 err = devl_port_register(devlink, devlink_port, local_port); 3098 if (err) 3099 memset(mlxsw_core_port, 0, sizeof(*mlxsw_core_port)); 3100 return err; 3101 } 3102 3103 static void __mlxsw_core_port_fini(struct mlxsw_core *mlxsw_core, u16 local_port) 3104 { 3105 struct mlxsw_core_port *mlxsw_core_port = 3106 &mlxsw_core->ports[local_port]; 3107 struct devlink_port *devlink_port = &mlxsw_core_port->devlink_port; 3108 3109 devl_port_unregister(devlink_port); 3110 memset(mlxsw_core_port, 0, sizeof(*mlxsw_core_port)); 3111 } 3112 3113 int mlxsw_core_port_init(struct mlxsw_core *mlxsw_core, u16 local_port, 3114 u8 slot_index, u32 port_number, bool split, 3115 u32 split_port_subnumber, 3116 bool splittable, u32 lanes, 3117 const unsigned char *switch_id, 3118 unsigned char switch_id_len) 3119 { 3120 int err; 3121 3122 err = __mlxsw_core_port_init(mlxsw_core, local_port, 3123 DEVLINK_PORT_FLAVOUR_PHYSICAL, slot_index, 3124 port_number, split, split_port_subnumber, 3125 splittable, lanes, 3126 switch_id, switch_id_len); 3127 if (err) 3128 return err; 3129 3130 atomic_inc(&mlxsw_core->active_ports_count); 3131 return 0; 3132 } 3133 EXPORT_SYMBOL(mlxsw_core_port_init); 3134 3135 void mlxsw_core_port_fini(struct mlxsw_core *mlxsw_core, u16 local_port) 3136 { 3137 atomic_dec(&mlxsw_core->active_ports_count); 3138 3139 __mlxsw_core_port_fini(mlxsw_core, local_port); 3140 } 3141 EXPORT_SYMBOL(mlxsw_core_port_fini); 3142 3143 int mlxsw_core_cpu_port_init(struct mlxsw_core *mlxsw_core, 3144 void *port_driver_priv, 3145 const unsigned char *switch_id, 3146 unsigned char switch_id_len) 3147 { 3148 struct mlxsw_core_port *mlxsw_core_port = 3149 &mlxsw_core->ports[MLXSW_PORT_CPU_PORT]; 3150 int err; 3151 3152 err = __mlxsw_core_port_init(mlxsw_core, MLXSW_PORT_CPU_PORT, 3153 DEVLINK_PORT_FLAVOUR_CPU, 3154 0, 0, false, 0, false, 0, 3155 switch_id, switch_id_len); 3156 if (err) 3157 return err; 3158 3159 mlxsw_core_port->port_driver_priv = port_driver_priv; 3160 return 0; 3161 } 3162 EXPORT_SYMBOL(mlxsw_core_cpu_port_init); 3163 3164 void mlxsw_core_cpu_port_fini(struct mlxsw_core *mlxsw_core) 3165 { 3166 __mlxsw_core_port_fini(mlxsw_core, MLXSW_PORT_CPU_PORT); 3167 } 3168 EXPORT_SYMBOL(mlxsw_core_cpu_port_fini); 3169 3170 void mlxsw_core_port_netdev_link(struct mlxsw_core *mlxsw_core, u16 local_port, 3171 void *port_driver_priv, struct net_device *dev) 3172 { 3173 struct mlxsw_core_port *mlxsw_core_port = 3174 &mlxsw_core->ports[local_port]; 3175 struct devlink_port *devlink_port = &mlxsw_core_port->devlink_port; 3176 3177 mlxsw_core_port->port_driver_priv = port_driver_priv; 3178 SET_NETDEV_DEVLINK_PORT(dev, devlink_port); 3179 } 3180 EXPORT_SYMBOL(mlxsw_core_port_netdev_link); 3181 3182 struct devlink_port * 3183 mlxsw_core_port_devlink_port_get(struct mlxsw_core *mlxsw_core, 3184 u16 local_port) 3185 { 3186 struct mlxsw_core_port *mlxsw_core_port = 3187 &mlxsw_core->ports[local_port]; 3188 struct devlink_port *devlink_port = &mlxsw_core_port->devlink_port; 3189 3190 return devlink_port; 3191 } 3192 EXPORT_SYMBOL(mlxsw_core_port_devlink_port_get); 3193 3194 struct mlxsw_linecard * 3195 mlxsw_core_port_linecard_get(struct mlxsw_core *mlxsw_core, 3196 u16 local_port) 3197 { 3198 struct mlxsw_core_port *mlxsw_core_port = 3199 &mlxsw_core->ports[local_port]; 3200 3201 return mlxsw_core_port->linecard; 3202 } 3203 3204 void mlxsw_core_ports_remove_selected(struct mlxsw_core *mlxsw_core, 3205 bool (*selector)(void *priv, u16 local_port), 3206 void *priv) 3207 { 3208 if (WARN_ON_ONCE(!mlxsw_core->driver->ports_remove_selected)) 3209 return; 3210 mlxsw_core->driver->ports_remove_selected(mlxsw_core, selector, priv); 3211 } 3212 3213 struct mlxsw_env *mlxsw_core_env(const struct mlxsw_core *mlxsw_core) 3214 { 3215 return mlxsw_core->env; 3216 } 3217 3218 static void mlxsw_core_buf_dump_dbg(struct mlxsw_core *mlxsw_core, 3219 const char *buf, size_t size) 3220 { 3221 __be32 *m = (__be32 *) buf; 3222 int i; 3223 int count = size / sizeof(__be32); 3224 3225 for (i = count - 1; i >= 0; i--) 3226 if (m[i]) 3227 break; 3228 i++; 3229 count = i ? i : 1; 3230 for (i = 0; i < count; i += 4) 3231 dev_dbg(mlxsw_core->bus_info->dev, "%04x - %08x %08x %08x %08x\n", 3232 i * 4, be32_to_cpu(m[i]), be32_to_cpu(m[i + 1]), 3233 be32_to_cpu(m[i + 2]), be32_to_cpu(m[i + 3])); 3234 } 3235 3236 int mlxsw_cmd_exec(struct mlxsw_core *mlxsw_core, u16 opcode, u8 opcode_mod, 3237 u32 in_mod, bool out_mbox_direct, bool reset_ok, 3238 char *in_mbox, size_t in_mbox_size, 3239 char *out_mbox, size_t out_mbox_size) 3240 { 3241 u8 status; 3242 int err; 3243 3244 BUG_ON(in_mbox_size % sizeof(u32) || out_mbox_size % sizeof(u32)); 3245 if (!mlxsw_core->bus->cmd_exec) 3246 return -EOPNOTSUPP; 3247 3248 dev_dbg(mlxsw_core->bus_info->dev, "Cmd exec (opcode=%x(%s),opcode_mod=%x,in_mod=%x)\n", 3249 opcode, mlxsw_cmd_opcode_str(opcode), opcode_mod, in_mod); 3250 if (in_mbox) { 3251 dev_dbg(mlxsw_core->bus_info->dev, "Input mailbox:\n"); 3252 mlxsw_core_buf_dump_dbg(mlxsw_core, in_mbox, in_mbox_size); 3253 } 3254 3255 err = mlxsw_core->bus->cmd_exec(mlxsw_core->bus_priv, opcode, 3256 opcode_mod, in_mod, out_mbox_direct, 3257 in_mbox, in_mbox_size, 3258 out_mbox, out_mbox_size, &status); 3259 3260 if (!err && out_mbox) { 3261 dev_dbg(mlxsw_core->bus_info->dev, "Output mailbox:\n"); 3262 mlxsw_core_buf_dump_dbg(mlxsw_core, out_mbox, out_mbox_size); 3263 } 3264 3265 if (reset_ok && err == -EIO && 3266 status == MLXSW_CMD_STATUS_RUNNING_RESET) { 3267 err = 0; 3268 } else if (err == -EIO && status != MLXSW_CMD_STATUS_OK) { 3269 dev_err(mlxsw_core->bus_info->dev, "Cmd exec failed (opcode=%x(%s),opcode_mod=%x,in_mod=%x,status=%x(%s))\n", 3270 opcode, mlxsw_cmd_opcode_str(opcode), opcode_mod, 3271 in_mod, status, mlxsw_cmd_status_str(status)); 3272 } else if (err == -ETIMEDOUT) { 3273 dev_err(mlxsw_core->bus_info->dev, "Cmd exec timed-out (opcode=%x(%s),opcode_mod=%x,in_mod=%x)\n", 3274 opcode, mlxsw_cmd_opcode_str(opcode), opcode_mod, 3275 in_mod); 3276 } 3277 3278 return err; 3279 } 3280 EXPORT_SYMBOL(mlxsw_cmd_exec); 3281 3282 int mlxsw_core_schedule_dw(struct delayed_work *dwork, unsigned long delay) 3283 { 3284 return queue_delayed_work(mlxsw_wq, dwork, delay); 3285 } 3286 EXPORT_SYMBOL(mlxsw_core_schedule_dw); 3287 3288 bool mlxsw_core_schedule_work(struct work_struct *work) 3289 { 3290 return queue_work(mlxsw_owq, work); 3291 } 3292 EXPORT_SYMBOL(mlxsw_core_schedule_work); 3293 3294 void mlxsw_core_flush_owq(void) 3295 { 3296 flush_workqueue(mlxsw_owq); 3297 } 3298 EXPORT_SYMBOL(mlxsw_core_flush_owq); 3299 3300 int mlxsw_core_kvd_sizes_get(struct mlxsw_core *mlxsw_core, 3301 const struct mlxsw_config_profile *profile, 3302 u64 *p_single_size, u64 *p_double_size, 3303 u64 *p_linear_size) 3304 { 3305 struct mlxsw_driver *driver = mlxsw_core->driver; 3306 3307 if (!driver->kvd_sizes_get) 3308 return -EINVAL; 3309 3310 return driver->kvd_sizes_get(mlxsw_core, profile, 3311 p_single_size, p_double_size, 3312 p_linear_size); 3313 } 3314 EXPORT_SYMBOL(mlxsw_core_kvd_sizes_get); 3315 3316 int mlxsw_core_resources_query(struct mlxsw_core *mlxsw_core, char *mbox, 3317 struct mlxsw_res *res) 3318 { 3319 int index, i; 3320 u64 data; 3321 u16 id; 3322 int err; 3323 3324 mlxsw_cmd_mbox_zero(mbox); 3325 3326 for (index = 0; index < MLXSW_CMD_QUERY_RESOURCES_MAX_QUERIES; 3327 index++) { 3328 err = mlxsw_cmd_query_resources(mlxsw_core, mbox, index); 3329 if (err) 3330 return err; 3331 3332 for (i = 0; i < MLXSW_CMD_QUERY_RESOURCES_PER_QUERY; i++) { 3333 id = mlxsw_cmd_mbox_query_resource_id_get(mbox, i); 3334 data = mlxsw_cmd_mbox_query_resource_data_get(mbox, i); 3335 3336 if (id == MLXSW_CMD_QUERY_RESOURCES_TABLE_END_ID) 3337 return 0; 3338 3339 mlxsw_res_parse(res, id, data); 3340 } 3341 } 3342 3343 /* If after MLXSW_RESOURCES_QUERY_MAX_QUERIES we still didn't get 3344 * MLXSW_RESOURCES_TABLE_END_ID, something went bad in the FW. 3345 */ 3346 return -EIO; 3347 } 3348 EXPORT_SYMBOL(mlxsw_core_resources_query); 3349 3350 u32 mlxsw_core_read_frc_h(struct mlxsw_core *mlxsw_core) 3351 { 3352 return mlxsw_core->bus->read_frc_h(mlxsw_core->bus_priv); 3353 } 3354 EXPORT_SYMBOL(mlxsw_core_read_frc_h); 3355 3356 u32 mlxsw_core_read_frc_l(struct mlxsw_core *mlxsw_core) 3357 { 3358 return mlxsw_core->bus->read_frc_l(mlxsw_core->bus_priv); 3359 } 3360 EXPORT_SYMBOL(mlxsw_core_read_frc_l); 3361 3362 u32 mlxsw_core_read_utc_sec(struct mlxsw_core *mlxsw_core) 3363 { 3364 return mlxsw_core->bus->read_utc_sec(mlxsw_core->bus_priv); 3365 } 3366 EXPORT_SYMBOL(mlxsw_core_read_utc_sec); 3367 3368 u32 mlxsw_core_read_utc_nsec(struct mlxsw_core *mlxsw_core) 3369 { 3370 return mlxsw_core->bus->read_utc_nsec(mlxsw_core->bus_priv); 3371 } 3372 EXPORT_SYMBOL(mlxsw_core_read_utc_nsec); 3373 3374 bool mlxsw_core_sdq_supports_cqe_v2(struct mlxsw_core *mlxsw_core) 3375 { 3376 return mlxsw_core->driver->sdq_supports_cqe_v2; 3377 } 3378 EXPORT_SYMBOL(mlxsw_core_sdq_supports_cqe_v2); 3379 3380 void mlxsw_core_emad_string_tlv_enable(struct mlxsw_core *mlxsw_core) 3381 { 3382 mlxsw_core->emad.enable_string_tlv = true; 3383 } 3384 EXPORT_SYMBOL(mlxsw_core_emad_string_tlv_enable); 3385 3386 static int __init mlxsw_core_module_init(void) 3387 { 3388 int err; 3389 3390 err = mlxsw_linecard_driver_register(); 3391 if (err) 3392 return err; 3393 3394 mlxsw_wq = alloc_workqueue(mlxsw_core_driver_name, 0, 0); 3395 if (!mlxsw_wq) { 3396 err = -ENOMEM; 3397 goto err_alloc_workqueue; 3398 } 3399 mlxsw_owq = alloc_ordered_workqueue("%s_ordered", 0, 3400 mlxsw_core_driver_name); 3401 if (!mlxsw_owq) { 3402 err = -ENOMEM; 3403 goto err_alloc_ordered_workqueue; 3404 } 3405 return 0; 3406 3407 err_alloc_ordered_workqueue: 3408 destroy_workqueue(mlxsw_wq); 3409 err_alloc_workqueue: 3410 mlxsw_linecard_driver_unregister(); 3411 return err; 3412 } 3413 3414 static void __exit mlxsw_core_module_exit(void) 3415 { 3416 destroy_workqueue(mlxsw_owq); 3417 destroy_workqueue(mlxsw_wq); 3418 mlxsw_linecard_driver_unregister(); 3419 } 3420 3421 module_init(mlxsw_core_module_init); 3422 module_exit(mlxsw_core_module_exit); 3423 3424 MODULE_LICENSE("Dual BSD/GPL"); 3425 MODULE_AUTHOR("Jiri Pirko <jiri@mellanox.com>"); 3426 MODULE_DESCRIPTION("Mellanox switch device core driver"); 3427