1 // SPDX-License-Identifier: BSD-3-Clause OR GPL-2.0 2 /* Copyright (c) 2015-2018 Mellanox Technologies. All rights reserved */ 3 4 #include <linux/kernel.h> 5 #include <linux/module.h> 6 #include <linux/device.h> 7 #include <linux/export.h> 8 #include <linux/err.h> 9 #include <linux/if_link.h> 10 #include <linux/netdevice.h> 11 #include <linux/completion.h> 12 #include <linux/skbuff.h> 13 #include <linux/etherdevice.h> 14 #include <linux/types.h> 15 #include <linux/string.h> 16 #include <linux/gfp.h> 17 #include <linux/random.h> 18 #include <linux/jiffies.h> 19 #include <linux/mutex.h> 20 #include <linux/rcupdate.h> 21 #include <linux/slab.h> 22 #include <linux/workqueue.h> 23 #include <asm/byteorder.h> 24 #include <net/devlink.h> 25 #include <trace/events/devlink.h> 26 27 #include "core.h" 28 #include "item.h" 29 #include "cmd.h" 30 #include "port.h" 31 #include "trap.h" 32 #include "emad.h" 33 #include "reg.h" 34 #include "resources.h" 35 36 static LIST_HEAD(mlxsw_core_driver_list); 37 static DEFINE_SPINLOCK(mlxsw_core_driver_list_lock); 38 39 static const char mlxsw_core_driver_name[] = "mlxsw_core"; 40 41 static struct workqueue_struct *mlxsw_wq; 42 static struct workqueue_struct *mlxsw_owq; 43 44 struct mlxsw_core_port { 45 struct devlink_port devlink_port; 46 void *port_driver_priv; 47 u8 local_port; 48 }; 49 50 void *mlxsw_core_port_driver_priv(struct mlxsw_core_port *mlxsw_core_port) 51 { 52 return mlxsw_core_port->port_driver_priv; 53 } 54 EXPORT_SYMBOL(mlxsw_core_port_driver_priv); 55 56 static bool mlxsw_core_port_check(struct mlxsw_core_port *mlxsw_core_port) 57 { 58 return mlxsw_core_port->port_driver_priv != NULL; 59 } 60 61 struct mlxsw_core { 62 struct mlxsw_driver *driver; 63 const struct mlxsw_bus *bus; 64 void *bus_priv; 65 const struct mlxsw_bus_info *bus_info; 66 struct workqueue_struct *emad_wq; 67 struct list_head rx_listener_list; 68 struct list_head event_listener_list; 69 struct { 70 atomic64_t tid; 71 struct list_head trans_list; 72 spinlock_t trans_list_lock; /* protects trans_list writes */ 73 bool use_emad; 74 } emad; 75 struct { 76 u8 *mapping; /* lag_id+port_index to local_port mapping */ 77 } lag; 78 struct mlxsw_res res; 79 struct mlxsw_hwmon *hwmon; 80 struct mlxsw_thermal *thermal; 81 struct mlxsw_core_port *ports; 82 unsigned int max_ports; 83 bool reload_fail; 84 bool fw_flash_in_progress; 85 unsigned long driver_priv[0]; 86 /* driver_priv has to be always the last item */ 87 }; 88 89 #define MLXSW_PORT_MAX_PORTS_DEFAULT 0x40 90 91 static int mlxsw_ports_init(struct mlxsw_core *mlxsw_core) 92 { 93 /* Switch ports are numbered from 1 to queried value */ 94 if (MLXSW_CORE_RES_VALID(mlxsw_core, MAX_SYSTEM_PORT)) 95 mlxsw_core->max_ports = MLXSW_CORE_RES_GET(mlxsw_core, 96 MAX_SYSTEM_PORT) + 1; 97 else 98 mlxsw_core->max_ports = MLXSW_PORT_MAX_PORTS_DEFAULT + 1; 99 100 mlxsw_core->ports = kcalloc(mlxsw_core->max_ports, 101 sizeof(struct mlxsw_core_port), GFP_KERNEL); 102 if (!mlxsw_core->ports) 103 return -ENOMEM; 104 105 return 0; 106 } 107 108 static void mlxsw_ports_fini(struct mlxsw_core *mlxsw_core) 109 { 110 kfree(mlxsw_core->ports); 111 } 112 113 unsigned int mlxsw_core_max_ports(const struct mlxsw_core *mlxsw_core) 114 { 115 return mlxsw_core->max_ports; 116 } 117 EXPORT_SYMBOL(mlxsw_core_max_ports); 118 119 void *mlxsw_core_driver_priv(struct mlxsw_core *mlxsw_core) 120 { 121 return mlxsw_core->driver_priv; 122 } 123 EXPORT_SYMBOL(mlxsw_core_driver_priv); 124 125 struct mlxsw_rx_listener_item { 126 struct list_head list; 127 struct mlxsw_rx_listener rxl; 128 void *priv; 129 }; 130 131 struct mlxsw_event_listener_item { 132 struct list_head list; 133 struct mlxsw_event_listener el; 134 void *priv; 135 }; 136 137 /****************** 138 * EMAD processing 139 ******************/ 140 141 /* emad_eth_hdr_dmac 142 * Destination MAC in EMAD's Ethernet header. 143 * Must be set to 01:02:c9:00:00:01 144 */ 145 MLXSW_ITEM_BUF(emad, eth_hdr, dmac, 0x00, 6); 146 147 /* emad_eth_hdr_smac 148 * Source MAC in EMAD's Ethernet header. 149 * Must be set to 00:02:c9:01:02:03 150 */ 151 MLXSW_ITEM_BUF(emad, eth_hdr, smac, 0x06, 6); 152 153 /* emad_eth_hdr_ethertype 154 * Ethertype in EMAD's Ethernet header. 155 * Must be set to 0x8932 156 */ 157 MLXSW_ITEM32(emad, eth_hdr, ethertype, 0x0C, 16, 16); 158 159 /* emad_eth_hdr_mlx_proto 160 * Mellanox protocol. 161 * Must be set to 0x0. 162 */ 163 MLXSW_ITEM32(emad, eth_hdr, mlx_proto, 0x0C, 8, 8); 164 165 /* emad_eth_hdr_ver 166 * Mellanox protocol version. 167 * Must be set to 0x0. 168 */ 169 MLXSW_ITEM32(emad, eth_hdr, ver, 0x0C, 4, 4); 170 171 /* emad_op_tlv_type 172 * Type of the TLV. 173 * Must be set to 0x1 (operation TLV). 174 */ 175 MLXSW_ITEM32(emad, op_tlv, type, 0x00, 27, 5); 176 177 /* emad_op_tlv_len 178 * Length of the operation TLV in u32. 179 * Must be set to 0x4. 180 */ 181 MLXSW_ITEM32(emad, op_tlv, len, 0x00, 16, 11); 182 183 /* emad_op_tlv_dr 184 * Direct route bit. Setting to 1 indicates the EMAD is a direct route 185 * EMAD. DR TLV must follow. 186 * 187 * Note: Currently not supported and must not be set. 188 */ 189 MLXSW_ITEM32(emad, op_tlv, dr, 0x00, 15, 1); 190 191 /* emad_op_tlv_status 192 * Returned status in case of EMAD response. Must be set to 0 in case 193 * of EMAD request. 194 * 0x0 - success 195 * 0x1 - device is busy. Requester should retry 196 * 0x2 - Mellanox protocol version not supported 197 * 0x3 - unknown TLV 198 * 0x4 - register not supported 199 * 0x5 - operation class not supported 200 * 0x6 - EMAD method not supported 201 * 0x7 - bad parameter (e.g. port out of range) 202 * 0x8 - resource not available 203 * 0x9 - message receipt acknowledgment. Requester should retry 204 * 0x70 - internal error 205 */ 206 MLXSW_ITEM32(emad, op_tlv, status, 0x00, 8, 7); 207 208 /* emad_op_tlv_register_id 209 * Register ID of register within register TLV. 210 */ 211 MLXSW_ITEM32(emad, op_tlv, register_id, 0x04, 16, 16); 212 213 /* emad_op_tlv_r 214 * Response bit. Setting to 1 indicates Response, otherwise request. 215 */ 216 MLXSW_ITEM32(emad, op_tlv, r, 0x04, 15, 1); 217 218 /* emad_op_tlv_method 219 * EMAD method type. 220 * 0x1 - query 221 * 0x2 - write 222 * 0x3 - send (currently not supported) 223 * 0x4 - event 224 */ 225 MLXSW_ITEM32(emad, op_tlv, method, 0x04, 8, 7); 226 227 /* emad_op_tlv_class 228 * EMAD operation class. Must be set to 0x1 (REG_ACCESS). 229 */ 230 MLXSW_ITEM32(emad, op_tlv, class, 0x04, 0, 8); 231 232 /* emad_op_tlv_tid 233 * EMAD transaction ID. Used for pairing request and response EMADs. 234 */ 235 MLXSW_ITEM64(emad, op_tlv, tid, 0x08, 0, 64); 236 237 /* emad_reg_tlv_type 238 * Type of the TLV. 239 * Must be set to 0x3 (register TLV). 240 */ 241 MLXSW_ITEM32(emad, reg_tlv, type, 0x00, 27, 5); 242 243 /* emad_reg_tlv_len 244 * Length of the operation TLV in u32. 245 */ 246 MLXSW_ITEM32(emad, reg_tlv, len, 0x00, 16, 11); 247 248 /* emad_end_tlv_type 249 * Type of the TLV. 250 * Must be set to 0x0 (end TLV). 251 */ 252 MLXSW_ITEM32(emad, end_tlv, type, 0x00, 27, 5); 253 254 /* emad_end_tlv_len 255 * Length of the end TLV in u32. 256 * Must be set to 1. 257 */ 258 MLXSW_ITEM32(emad, end_tlv, len, 0x00, 16, 11); 259 260 enum mlxsw_core_reg_access_type { 261 MLXSW_CORE_REG_ACCESS_TYPE_QUERY, 262 MLXSW_CORE_REG_ACCESS_TYPE_WRITE, 263 }; 264 265 static inline const char * 266 mlxsw_core_reg_access_type_str(enum mlxsw_core_reg_access_type type) 267 { 268 switch (type) { 269 case MLXSW_CORE_REG_ACCESS_TYPE_QUERY: 270 return "query"; 271 case MLXSW_CORE_REG_ACCESS_TYPE_WRITE: 272 return "write"; 273 } 274 BUG(); 275 } 276 277 static void mlxsw_emad_pack_end_tlv(char *end_tlv) 278 { 279 mlxsw_emad_end_tlv_type_set(end_tlv, MLXSW_EMAD_TLV_TYPE_END); 280 mlxsw_emad_end_tlv_len_set(end_tlv, MLXSW_EMAD_END_TLV_LEN); 281 } 282 283 static void mlxsw_emad_pack_reg_tlv(char *reg_tlv, 284 const struct mlxsw_reg_info *reg, 285 char *payload) 286 { 287 mlxsw_emad_reg_tlv_type_set(reg_tlv, MLXSW_EMAD_TLV_TYPE_REG); 288 mlxsw_emad_reg_tlv_len_set(reg_tlv, reg->len / sizeof(u32) + 1); 289 memcpy(reg_tlv + sizeof(u32), payload, reg->len); 290 } 291 292 static void mlxsw_emad_pack_op_tlv(char *op_tlv, 293 const struct mlxsw_reg_info *reg, 294 enum mlxsw_core_reg_access_type type, 295 u64 tid) 296 { 297 mlxsw_emad_op_tlv_type_set(op_tlv, MLXSW_EMAD_TLV_TYPE_OP); 298 mlxsw_emad_op_tlv_len_set(op_tlv, MLXSW_EMAD_OP_TLV_LEN); 299 mlxsw_emad_op_tlv_dr_set(op_tlv, 0); 300 mlxsw_emad_op_tlv_status_set(op_tlv, 0); 301 mlxsw_emad_op_tlv_register_id_set(op_tlv, reg->id); 302 mlxsw_emad_op_tlv_r_set(op_tlv, MLXSW_EMAD_OP_TLV_REQUEST); 303 if (type == MLXSW_CORE_REG_ACCESS_TYPE_QUERY) 304 mlxsw_emad_op_tlv_method_set(op_tlv, 305 MLXSW_EMAD_OP_TLV_METHOD_QUERY); 306 else 307 mlxsw_emad_op_tlv_method_set(op_tlv, 308 MLXSW_EMAD_OP_TLV_METHOD_WRITE); 309 mlxsw_emad_op_tlv_class_set(op_tlv, 310 MLXSW_EMAD_OP_TLV_CLASS_REG_ACCESS); 311 mlxsw_emad_op_tlv_tid_set(op_tlv, tid); 312 } 313 314 static int mlxsw_emad_construct_eth_hdr(struct sk_buff *skb) 315 { 316 char *eth_hdr = skb_push(skb, MLXSW_EMAD_ETH_HDR_LEN); 317 318 mlxsw_emad_eth_hdr_dmac_memcpy_to(eth_hdr, MLXSW_EMAD_EH_DMAC); 319 mlxsw_emad_eth_hdr_smac_memcpy_to(eth_hdr, MLXSW_EMAD_EH_SMAC); 320 mlxsw_emad_eth_hdr_ethertype_set(eth_hdr, MLXSW_EMAD_EH_ETHERTYPE); 321 mlxsw_emad_eth_hdr_mlx_proto_set(eth_hdr, MLXSW_EMAD_EH_MLX_PROTO); 322 mlxsw_emad_eth_hdr_ver_set(eth_hdr, MLXSW_EMAD_EH_PROTO_VERSION); 323 324 skb_reset_mac_header(skb); 325 326 return 0; 327 } 328 329 static void mlxsw_emad_construct(struct sk_buff *skb, 330 const struct mlxsw_reg_info *reg, 331 char *payload, 332 enum mlxsw_core_reg_access_type type, 333 u64 tid) 334 { 335 char *buf; 336 337 buf = skb_push(skb, MLXSW_EMAD_END_TLV_LEN * sizeof(u32)); 338 mlxsw_emad_pack_end_tlv(buf); 339 340 buf = skb_push(skb, reg->len + sizeof(u32)); 341 mlxsw_emad_pack_reg_tlv(buf, reg, payload); 342 343 buf = skb_push(skb, MLXSW_EMAD_OP_TLV_LEN * sizeof(u32)); 344 mlxsw_emad_pack_op_tlv(buf, reg, type, tid); 345 346 mlxsw_emad_construct_eth_hdr(skb); 347 } 348 349 static char *mlxsw_emad_op_tlv(const struct sk_buff *skb) 350 { 351 return ((char *) (skb->data + MLXSW_EMAD_ETH_HDR_LEN)); 352 } 353 354 static char *mlxsw_emad_reg_tlv(const struct sk_buff *skb) 355 { 356 return ((char *) (skb->data + MLXSW_EMAD_ETH_HDR_LEN + 357 MLXSW_EMAD_OP_TLV_LEN * sizeof(u32))); 358 } 359 360 static char *mlxsw_emad_reg_payload(const char *op_tlv) 361 { 362 return ((char *) (op_tlv + (MLXSW_EMAD_OP_TLV_LEN + 1) * sizeof(u32))); 363 } 364 365 static u64 mlxsw_emad_get_tid(const struct sk_buff *skb) 366 { 367 char *op_tlv; 368 369 op_tlv = mlxsw_emad_op_tlv(skb); 370 return mlxsw_emad_op_tlv_tid_get(op_tlv); 371 } 372 373 static bool mlxsw_emad_is_resp(const struct sk_buff *skb) 374 { 375 char *op_tlv; 376 377 op_tlv = mlxsw_emad_op_tlv(skb); 378 return (mlxsw_emad_op_tlv_r_get(op_tlv) == MLXSW_EMAD_OP_TLV_RESPONSE); 379 } 380 381 static int mlxsw_emad_process_status(char *op_tlv, 382 enum mlxsw_emad_op_tlv_status *p_status) 383 { 384 *p_status = mlxsw_emad_op_tlv_status_get(op_tlv); 385 386 switch (*p_status) { 387 case MLXSW_EMAD_OP_TLV_STATUS_SUCCESS: 388 return 0; 389 case MLXSW_EMAD_OP_TLV_STATUS_BUSY: 390 case MLXSW_EMAD_OP_TLV_STATUS_MESSAGE_RECEIPT_ACK: 391 return -EAGAIN; 392 case MLXSW_EMAD_OP_TLV_STATUS_VERSION_NOT_SUPPORTED: 393 case MLXSW_EMAD_OP_TLV_STATUS_UNKNOWN_TLV: 394 case MLXSW_EMAD_OP_TLV_STATUS_REGISTER_NOT_SUPPORTED: 395 case MLXSW_EMAD_OP_TLV_STATUS_CLASS_NOT_SUPPORTED: 396 case MLXSW_EMAD_OP_TLV_STATUS_METHOD_NOT_SUPPORTED: 397 case MLXSW_EMAD_OP_TLV_STATUS_BAD_PARAMETER: 398 case MLXSW_EMAD_OP_TLV_STATUS_RESOURCE_NOT_AVAILABLE: 399 case MLXSW_EMAD_OP_TLV_STATUS_INTERNAL_ERROR: 400 default: 401 return -EIO; 402 } 403 } 404 405 static int 406 mlxsw_emad_process_status_skb(struct sk_buff *skb, 407 enum mlxsw_emad_op_tlv_status *p_status) 408 { 409 return mlxsw_emad_process_status(mlxsw_emad_op_tlv(skb), p_status); 410 } 411 412 struct mlxsw_reg_trans { 413 struct list_head list; 414 struct list_head bulk_list; 415 struct mlxsw_core *core; 416 struct sk_buff *tx_skb; 417 struct mlxsw_tx_info tx_info; 418 struct delayed_work timeout_dw; 419 unsigned int retries; 420 u64 tid; 421 struct completion completion; 422 atomic_t active; 423 mlxsw_reg_trans_cb_t *cb; 424 unsigned long cb_priv; 425 const struct mlxsw_reg_info *reg; 426 enum mlxsw_core_reg_access_type type; 427 int err; 428 enum mlxsw_emad_op_tlv_status emad_status; 429 struct rcu_head rcu; 430 }; 431 432 #define MLXSW_EMAD_TIMEOUT_DURING_FW_FLASH_MS 3000 433 #define MLXSW_EMAD_TIMEOUT_MS 200 434 435 static void mlxsw_emad_trans_timeout_schedule(struct mlxsw_reg_trans *trans) 436 { 437 unsigned long timeout = msecs_to_jiffies(MLXSW_EMAD_TIMEOUT_MS); 438 439 if (trans->core->fw_flash_in_progress) 440 timeout = msecs_to_jiffies(MLXSW_EMAD_TIMEOUT_DURING_FW_FLASH_MS); 441 442 queue_delayed_work(trans->core->emad_wq, &trans->timeout_dw, timeout); 443 } 444 445 static int mlxsw_emad_transmit(struct mlxsw_core *mlxsw_core, 446 struct mlxsw_reg_trans *trans) 447 { 448 struct sk_buff *skb; 449 int err; 450 451 skb = skb_copy(trans->tx_skb, GFP_KERNEL); 452 if (!skb) 453 return -ENOMEM; 454 455 trace_devlink_hwmsg(priv_to_devlink(mlxsw_core), false, 0, 456 skb->data + mlxsw_core->driver->txhdr_len, 457 skb->len - mlxsw_core->driver->txhdr_len); 458 459 atomic_set(&trans->active, 1); 460 err = mlxsw_core_skb_transmit(mlxsw_core, skb, &trans->tx_info); 461 if (err) { 462 dev_kfree_skb(skb); 463 return err; 464 } 465 mlxsw_emad_trans_timeout_schedule(trans); 466 return 0; 467 } 468 469 static void mlxsw_emad_trans_finish(struct mlxsw_reg_trans *trans, int err) 470 { 471 struct mlxsw_core *mlxsw_core = trans->core; 472 473 dev_kfree_skb(trans->tx_skb); 474 spin_lock_bh(&mlxsw_core->emad.trans_list_lock); 475 list_del_rcu(&trans->list); 476 spin_unlock_bh(&mlxsw_core->emad.trans_list_lock); 477 trans->err = err; 478 complete(&trans->completion); 479 } 480 481 static void mlxsw_emad_transmit_retry(struct mlxsw_core *mlxsw_core, 482 struct mlxsw_reg_trans *trans) 483 { 484 int err; 485 486 if (trans->retries < MLXSW_EMAD_MAX_RETRY) { 487 trans->retries++; 488 err = mlxsw_emad_transmit(trans->core, trans); 489 if (err == 0) 490 return; 491 } else { 492 err = -EIO; 493 } 494 mlxsw_emad_trans_finish(trans, err); 495 } 496 497 static void mlxsw_emad_trans_timeout_work(struct work_struct *work) 498 { 499 struct mlxsw_reg_trans *trans = container_of(work, 500 struct mlxsw_reg_trans, 501 timeout_dw.work); 502 503 if (!atomic_dec_and_test(&trans->active)) 504 return; 505 506 mlxsw_emad_transmit_retry(trans->core, trans); 507 } 508 509 static void mlxsw_emad_process_response(struct mlxsw_core *mlxsw_core, 510 struct mlxsw_reg_trans *trans, 511 struct sk_buff *skb) 512 { 513 int err; 514 515 if (!atomic_dec_and_test(&trans->active)) 516 return; 517 518 err = mlxsw_emad_process_status_skb(skb, &trans->emad_status); 519 if (err == -EAGAIN) { 520 mlxsw_emad_transmit_retry(mlxsw_core, trans); 521 } else { 522 if (err == 0) { 523 char *op_tlv = mlxsw_emad_op_tlv(skb); 524 525 if (trans->cb) 526 trans->cb(mlxsw_core, 527 mlxsw_emad_reg_payload(op_tlv), 528 trans->reg->len, trans->cb_priv); 529 } 530 mlxsw_emad_trans_finish(trans, err); 531 } 532 } 533 534 /* called with rcu read lock held */ 535 static void mlxsw_emad_rx_listener_func(struct sk_buff *skb, u8 local_port, 536 void *priv) 537 { 538 struct mlxsw_core *mlxsw_core = priv; 539 struct mlxsw_reg_trans *trans; 540 541 trace_devlink_hwmsg(priv_to_devlink(mlxsw_core), true, 0, 542 skb->data, skb->len); 543 544 if (!mlxsw_emad_is_resp(skb)) 545 goto free_skb; 546 547 list_for_each_entry_rcu(trans, &mlxsw_core->emad.trans_list, list) { 548 if (mlxsw_emad_get_tid(skb) == trans->tid) { 549 mlxsw_emad_process_response(mlxsw_core, trans, skb); 550 break; 551 } 552 } 553 554 free_skb: 555 dev_kfree_skb(skb); 556 } 557 558 static const struct mlxsw_listener mlxsw_emad_rx_listener = 559 MLXSW_RXL(mlxsw_emad_rx_listener_func, ETHEMAD, TRAP_TO_CPU, false, 560 EMAD, DISCARD); 561 562 static int mlxsw_emad_init(struct mlxsw_core *mlxsw_core) 563 { 564 struct workqueue_struct *emad_wq; 565 u64 tid; 566 int err; 567 568 if (!(mlxsw_core->bus->features & MLXSW_BUS_F_TXRX)) 569 return 0; 570 571 emad_wq = alloc_workqueue("mlxsw_core_emad", 0, 0); 572 if (!emad_wq) 573 return -ENOMEM; 574 mlxsw_core->emad_wq = emad_wq; 575 576 /* Set the upper 32 bits of the transaction ID field to a random 577 * number. This allows us to discard EMADs addressed to other 578 * devices. 579 */ 580 get_random_bytes(&tid, 4); 581 tid <<= 32; 582 atomic64_set(&mlxsw_core->emad.tid, tid); 583 584 INIT_LIST_HEAD(&mlxsw_core->emad.trans_list); 585 spin_lock_init(&mlxsw_core->emad.trans_list_lock); 586 587 err = mlxsw_core_trap_register(mlxsw_core, &mlxsw_emad_rx_listener, 588 mlxsw_core); 589 if (err) 590 return err; 591 592 err = mlxsw_core->driver->basic_trap_groups_set(mlxsw_core); 593 if (err) 594 goto err_emad_trap_set; 595 mlxsw_core->emad.use_emad = true; 596 597 return 0; 598 599 err_emad_trap_set: 600 mlxsw_core_trap_unregister(mlxsw_core, &mlxsw_emad_rx_listener, 601 mlxsw_core); 602 destroy_workqueue(mlxsw_core->emad_wq); 603 return err; 604 } 605 606 static void mlxsw_emad_fini(struct mlxsw_core *mlxsw_core) 607 { 608 609 if (!(mlxsw_core->bus->features & MLXSW_BUS_F_TXRX)) 610 return; 611 612 mlxsw_core->emad.use_emad = false; 613 mlxsw_core_trap_unregister(mlxsw_core, &mlxsw_emad_rx_listener, 614 mlxsw_core); 615 destroy_workqueue(mlxsw_core->emad_wq); 616 } 617 618 static struct sk_buff *mlxsw_emad_alloc(const struct mlxsw_core *mlxsw_core, 619 u16 reg_len) 620 { 621 struct sk_buff *skb; 622 u16 emad_len; 623 624 emad_len = (reg_len + sizeof(u32) + MLXSW_EMAD_ETH_HDR_LEN + 625 (MLXSW_EMAD_OP_TLV_LEN + MLXSW_EMAD_END_TLV_LEN) * 626 sizeof(u32) + mlxsw_core->driver->txhdr_len); 627 if (emad_len > MLXSW_EMAD_MAX_FRAME_LEN) 628 return NULL; 629 630 skb = netdev_alloc_skb(NULL, emad_len); 631 if (!skb) 632 return NULL; 633 memset(skb->data, 0, emad_len); 634 skb_reserve(skb, emad_len); 635 636 return skb; 637 } 638 639 static int mlxsw_emad_reg_access(struct mlxsw_core *mlxsw_core, 640 const struct mlxsw_reg_info *reg, 641 char *payload, 642 enum mlxsw_core_reg_access_type type, 643 struct mlxsw_reg_trans *trans, 644 struct list_head *bulk_list, 645 mlxsw_reg_trans_cb_t *cb, 646 unsigned long cb_priv, u64 tid) 647 { 648 struct sk_buff *skb; 649 int err; 650 651 dev_dbg(mlxsw_core->bus_info->dev, "EMAD reg access (tid=%llx,reg_id=%x(%s),type=%s)\n", 652 tid, reg->id, mlxsw_reg_id_str(reg->id), 653 mlxsw_core_reg_access_type_str(type)); 654 655 skb = mlxsw_emad_alloc(mlxsw_core, reg->len); 656 if (!skb) 657 return -ENOMEM; 658 659 list_add_tail(&trans->bulk_list, bulk_list); 660 trans->core = mlxsw_core; 661 trans->tx_skb = skb; 662 trans->tx_info.local_port = MLXSW_PORT_CPU_PORT; 663 trans->tx_info.is_emad = true; 664 INIT_DELAYED_WORK(&trans->timeout_dw, mlxsw_emad_trans_timeout_work); 665 trans->tid = tid; 666 init_completion(&trans->completion); 667 trans->cb = cb; 668 trans->cb_priv = cb_priv; 669 trans->reg = reg; 670 trans->type = type; 671 672 mlxsw_emad_construct(skb, reg, payload, type, trans->tid); 673 mlxsw_core->driver->txhdr_construct(skb, &trans->tx_info); 674 675 spin_lock_bh(&mlxsw_core->emad.trans_list_lock); 676 list_add_tail_rcu(&trans->list, &mlxsw_core->emad.trans_list); 677 spin_unlock_bh(&mlxsw_core->emad.trans_list_lock); 678 err = mlxsw_emad_transmit(mlxsw_core, trans); 679 if (err) 680 goto err_out; 681 return 0; 682 683 err_out: 684 spin_lock_bh(&mlxsw_core->emad.trans_list_lock); 685 list_del_rcu(&trans->list); 686 spin_unlock_bh(&mlxsw_core->emad.trans_list_lock); 687 list_del(&trans->bulk_list); 688 dev_kfree_skb(trans->tx_skb); 689 return err; 690 } 691 692 /***************** 693 * Core functions 694 *****************/ 695 696 int mlxsw_core_driver_register(struct mlxsw_driver *mlxsw_driver) 697 { 698 spin_lock(&mlxsw_core_driver_list_lock); 699 list_add_tail(&mlxsw_driver->list, &mlxsw_core_driver_list); 700 spin_unlock(&mlxsw_core_driver_list_lock); 701 return 0; 702 } 703 EXPORT_SYMBOL(mlxsw_core_driver_register); 704 705 void mlxsw_core_driver_unregister(struct mlxsw_driver *mlxsw_driver) 706 { 707 spin_lock(&mlxsw_core_driver_list_lock); 708 list_del(&mlxsw_driver->list); 709 spin_unlock(&mlxsw_core_driver_list_lock); 710 } 711 EXPORT_SYMBOL(mlxsw_core_driver_unregister); 712 713 static struct mlxsw_driver *__driver_find(const char *kind) 714 { 715 struct mlxsw_driver *mlxsw_driver; 716 717 list_for_each_entry(mlxsw_driver, &mlxsw_core_driver_list, list) { 718 if (strcmp(mlxsw_driver->kind, kind) == 0) 719 return mlxsw_driver; 720 } 721 return NULL; 722 } 723 724 static struct mlxsw_driver *mlxsw_core_driver_get(const char *kind) 725 { 726 struct mlxsw_driver *mlxsw_driver; 727 728 spin_lock(&mlxsw_core_driver_list_lock); 729 mlxsw_driver = __driver_find(kind); 730 spin_unlock(&mlxsw_core_driver_list_lock); 731 return mlxsw_driver; 732 } 733 734 static int mlxsw_devlink_port_split(struct devlink *devlink, 735 unsigned int port_index, 736 unsigned int count, 737 struct netlink_ext_ack *extack) 738 { 739 struct mlxsw_core *mlxsw_core = devlink_priv(devlink); 740 741 if (port_index >= mlxsw_core->max_ports) { 742 NL_SET_ERR_MSG_MOD(extack, "Port index exceeds maximum number of ports"); 743 return -EINVAL; 744 } 745 if (!mlxsw_core->driver->port_split) 746 return -EOPNOTSUPP; 747 return mlxsw_core->driver->port_split(mlxsw_core, port_index, count, 748 extack); 749 } 750 751 static int mlxsw_devlink_port_unsplit(struct devlink *devlink, 752 unsigned int port_index, 753 struct netlink_ext_ack *extack) 754 { 755 struct mlxsw_core *mlxsw_core = devlink_priv(devlink); 756 757 if (port_index >= mlxsw_core->max_ports) { 758 NL_SET_ERR_MSG_MOD(extack, "Port index exceeds maximum number of ports"); 759 return -EINVAL; 760 } 761 if (!mlxsw_core->driver->port_unsplit) 762 return -EOPNOTSUPP; 763 return mlxsw_core->driver->port_unsplit(mlxsw_core, port_index, 764 extack); 765 } 766 767 static int 768 mlxsw_devlink_sb_pool_get(struct devlink *devlink, 769 unsigned int sb_index, u16 pool_index, 770 struct devlink_sb_pool_info *pool_info) 771 { 772 struct mlxsw_core *mlxsw_core = devlink_priv(devlink); 773 struct mlxsw_driver *mlxsw_driver = mlxsw_core->driver; 774 775 if (!mlxsw_driver->sb_pool_get) 776 return -EOPNOTSUPP; 777 return mlxsw_driver->sb_pool_get(mlxsw_core, sb_index, 778 pool_index, pool_info); 779 } 780 781 static int 782 mlxsw_devlink_sb_pool_set(struct devlink *devlink, 783 unsigned int sb_index, u16 pool_index, u32 size, 784 enum devlink_sb_threshold_type threshold_type, 785 struct netlink_ext_ack *extack) 786 { 787 struct mlxsw_core *mlxsw_core = devlink_priv(devlink); 788 struct mlxsw_driver *mlxsw_driver = mlxsw_core->driver; 789 790 if (!mlxsw_driver->sb_pool_set) 791 return -EOPNOTSUPP; 792 return mlxsw_driver->sb_pool_set(mlxsw_core, sb_index, 793 pool_index, size, threshold_type, 794 extack); 795 } 796 797 static void *__dl_port(struct devlink_port *devlink_port) 798 { 799 return container_of(devlink_port, struct mlxsw_core_port, devlink_port); 800 } 801 802 static int mlxsw_devlink_port_type_set(struct devlink_port *devlink_port, 803 enum devlink_port_type port_type) 804 { 805 struct mlxsw_core *mlxsw_core = devlink_priv(devlink_port->devlink); 806 struct mlxsw_driver *mlxsw_driver = mlxsw_core->driver; 807 struct mlxsw_core_port *mlxsw_core_port = __dl_port(devlink_port); 808 809 if (!mlxsw_driver->port_type_set) 810 return -EOPNOTSUPP; 811 812 return mlxsw_driver->port_type_set(mlxsw_core, 813 mlxsw_core_port->local_port, 814 port_type); 815 } 816 817 static int mlxsw_devlink_sb_port_pool_get(struct devlink_port *devlink_port, 818 unsigned int sb_index, u16 pool_index, 819 u32 *p_threshold) 820 { 821 struct mlxsw_core *mlxsw_core = devlink_priv(devlink_port->devlink); 822 struct mlxsw_driver *mlxsw_driver = mlxsw_core->driver; 823 struct mlxsw_core_port *mlxsw_core_port = __dl_port(devlink_port); 824 825 if (!mlxsw_driver->sb_port_pool_get || 826 !mlxsw_core_port_check(mlxsw_core_port)) 827 return -EOPNOTSUPP; 828 return mlxsw_driver->sb_port_pool_get(mlxsw_core_port, sb_index, 829 pool_index, p_threshold); 830 } 831 832 static int mlxsw_devlink_sb_port_pool_set(struct devlink_port *devlink_port, 833 unsigned int sb_index, u16 pool_index, 834 u32 threshold, 835 struct netlink_ext_ack *extack) 836 { 837 struct mlxsw_core *mlxsw_core = devlink_priv(devlink_port->devlink); 838 struct mlxsw_driver *mlxsw_driver = mlxsw_core->driver; 839 struct mlxsw_core_port *mlxsw_core_port = __dl_port(devlink_port); 840 841 if (!mlxsw_driver->sb_port_pool_set || 842 !mlxsw_core_port_check(mlxsw_core_port)) 843 return -EOPNOTSUPP; 844 return mlxsw_driver->sb_port_pool_set(mlxsw_core_port, sb_index, 845 pool_index, threshold, extack); 846 } 847 848 static int 849 mlxsw_devlink_sb_tc_pool_bind_get(struct devlink_port *devlink_port, 850 unsigned int sb_index, u16 tc_index, 851 enum devlink_sb_pool_type pool_type, 852 u16 *p_pool_index, u32 *p_threshold) 853 { 854 struct mlxsw_core *mlxsw_core = devlink_priv(devlink_port->devlink); 855 struct mlxsw_driver *mlxsw_driver = mlxsw_core->driver; 856 struct mlxsw_core_port *mlxsw_core_port = __dl_port(devlink_port); 857 858 if (!mlxsw_driver->sb_tc_pool_bind_get || 859 !mlxsw_core_port_check(mlxsw_core_port)) 860 return -EOPNOTSUPP; 861 return mlxsw_driver->sb_tc_pool_bind_get(mlxsw_core_port, sb_index, 862 tc_index, pool_type, 863 p_pool_index, p_threshold); 864 } 865 866 static int 867 mlxsw_devlink_sb_tc_pool_bind_set(struct devlink_port *devlink_port, 868 unsigned int sb_index, u16 tc_index, 869 enum devlink_sb_pool_type pool_type, 870 u16 pool_index, u32 threshold, 871 struct netlink_ext_ack *extack) 872 { 873 struct mlxsw_core *mlxsw_core = devlink_priv(devlink_port->devlink); 874 struct mlxsw_driver *mlxsw_driver = mlxsw_core->driver; 875 struct mlxsw_core_port *mlxsw_core_port = __dl_port(devlink_port); 876 877 if (!mlxsw_driver->sb_tc_pool_bind_set || 878 !mlxsw_core_port_check(mlxsw_core_port)) 879 return -EOPNOTSUPP; 880 return mlxsw_driver->sb_tc_pool_bind_set(mlxsw_core_port, sb_index, 881 tc_index, pool_type, 882 pool_index, threshold, extack); 883 } 884 885 static int mlxsw_devlink_sb_occ_snapshot(struct devlink *devlink, 886 unsigned int sb_index) 887 { 888 struct mlxsw_core *mlxsw_core = devlink_priv(devlink); 889 struct mlxsw_driver *mlxsw_driver = mlxsw_core->driver; 890 891 if (!mlxsw_driver->sb_occ_snapshot) 892 return -EOPNOTSUPP; 893 return mlxsw_driver->sb_occ_snapshot(mlxsw_core, sb_index); 894 } 895 896 static int mlxsw_devlink_sb_occ_max_clear(struct devlink *devlink, 897 unsigned int sb_index) 898 { 899 struct mlxsw_core *mlxsw_core = devlink_priv(devlink); 900 struct mlxsw_driver *mlxsw_driver = mlxsw_core->driver; 901 902 if (!mlxsw_driver->sb_occ_max_clear) 903 return -EOPNOTSUPP; 904 return mlxsw_driver->sb_occ_max_clear(mlxsw_core, sb_index); 905 } 906 907 static int 908 mlxsw_devlink_sb_occ_port_pool_get(struct devlink_port *devlink_port, 909 unsigned int sb_index, u16 pool_index, 910 u32 *p_cur, u32 *p_max) 911 { 912 struct mlxsw_core *mlxsw_core = devlink_priv(devlink_port->devlink); 913 struct mlxsw_driver *mlxsw_driver = mlxsw_core->driver; 914 struct mlxsw_core_port *mlxsw_core_port = __dl_port(devlink_port); 915 916 if (!mlxsw_driver->sb_occ_port_pool_get || 917 !mlxsw_core_port_check(mlxsw_core_port)) 918 return -EOPNOTSUPP; 919 return mlxsw_driver->sb_occ_port_pool_get(mlxsw_core_port, sb_index, 920 pool_index, p_cur, p_max); 921 } 922 923 static int 924 mlxsw_devlink_sb_occ_tc_port_bind_get(struct devlink_port *devlink_port, 925 unsigned int sb_index, u16 tc_index, 926 enum devlink_sb_pool_type pool_type, 927 u32 *p_cur, u32 *p_max) 928 { 929 struct mlxsw_core *mlxsw_core = devlink_priv(devlink_port->devlink); 930 struct mlxsw_driver *mlxsw_driver = mlxsw_core->driver; 931 struct mlxsw_core_port *mlxsw_core_port = __dl_port(devlink_port); 932 933 if (!mlxsw_driver->sb_occ_tc_port_bind_get || 934 !mlxsw_core_port_check(mlxsw_core_port)) 935 return -EOPNOTSUPP; 936 return mlxsw_driver->sb_occ_tc_port_bind_get(mlxsw_core_port, 937 sb_index, tc_index, 938 pool_type, p_cur, p_max); 939 } 940 941 static int 942 mlxsw_devlink_info_get(struct devlink *devlink, struct devlink_info_req *req, 943 struct netlink_ext_ack *extack) 944 { 945 struct mlxsw_core *mlxsw_core = devlink_priv(devlink); 946 char fw_info_psid[MLXSW_REG_MGIR_FW_INFO_PSID_SIZE]; 947 u32 hw_rev, fw_major, fw_minor, fw_sub_minor; 948 char mgir_pl[MLXSW_REG_MGIR_LEN]; 949 char buf[32]; 950 int err; 951 952 err = devlink_info_driver_name_put(req, 953 mlxsw_core->bus_info->device_kind); 954 if (err) 955 return err; 956 957 mlxsw_reg_mgir_pack(mgir_pl); 958 err = mlxsw_reg_query(mlxsw_core, MLXSW_REG(mgir), mgir_pl); 959 if (err) 960 return err; 961 mlxsw_reg_mgir_unpack(mgir_pl, &hw_rev, fw_info_psid, &fw_major, 962 &fw_minor, &fw_sub_minor); 963 964 sprintf(buf, "%X", hw_rev); 965 err = devlink_info_version_fixed_put(req, "hw.revision", buf); 966 if (err) 967 return err; 968 969 err = devlink_info_version_fixed_put(req, "fw.psid", fw_info_psid); 970 if (err) 971 return err; 972 973 sprintf(buf, "%d.%d.%d", fw_major, fw_minor, fw_sub_minor); 974 err = devlink_info_version_running_put(req, "fw.version", buf); 975 if (err) 976 return err; 977 978 return 0; 979 } 980 981 static int mlxsw_devlink_core_bus_device_reload(struct devlink *devlink, 982 struct netlink_ext_ack *extack) 983 { 984 struct mlxsw_core *mlxsw_core = devlink_priv(devlink); 985 int err; 986 987 if (!(mlxsw_core->bus->features & MLXSW_BUS_F_RESET)) 988 return -EOPNOTSUPP; 989 990 mlxsw_core_bus_device_unregister(mlxsw_core, true); 991 err = mlxsw_core_bus_device_register(mlxsw_core->bus_info, 992 mlxsw_core->bus, 993 mlxsw_core->bus_priv, true, 994 devlink); 995 mlxsw_core->reload_fail = !!err; 996 997 return err; 998 } 999 1000 static const struct devlink_ops mlxsw_devlink_ops = { 1001 .reload = mlxsw_devlink_core_bus_device_reload, 1002 .port_type_set = mlxsw_devlink_port_type_set, 1003 .port_split = mlxsw_devlink_port_split, 1004 .port_unsplit = mlxsw_devlink_port_unsplit, 1005 .sb_pool_get = mlxsw_devlink_sb_pool_get, 1006 .sb_pool_set = mlxsw_devlink_sb_pool_set, 1007 .sb_port_pool_get = mlxsw_devlink_sb_port_pool_get, 1008 .sb_port_pool_set = mlxsw_devlink_sb_port_pool_set, 1009 .sb_tc_pool_bind_get = mlxsw_devlink_sb_tc_pool_bind_get, 1010 .sb_tc_pool_bind_set = mlxsw_devlink_sb_tc_pool_bind_set, 1011 .sb_occ_snapshot = mlxsw_devlink_sb_occ_snapshot, 1012 .sb_occ_max_clear = mlxsw_devlink_sb_occ_max_clear, 1013 .sb_occ_port_pool_get = mlxsw_devlink_sb_occ_port_pool_get, 1014 .sb_occ_tc_port_bind_get = mlxsw_devlink_sb_occ_tc_port_bind_get, 1015 .info_get = mlxsw_devlink_info_get, 1016 }; 1017 1018 static int 1019 __mlxsw_core_bus_device_register(const struct mlxsw_bus_info *mlxsw_bus_info, 1020 const struct mlxsw_bus *mlxsw_bus, 1021 void *bus_priv, bool reload, 1022 struct devlink *devlink) 1023 { 1024 const char *device_kind = mlxsw_bus_info->device_kind; 1025 struct mlxsw_core *mlxsw_core; 1026 struct mlxsw_driver *mlxsw_driver; 1027 struct mlxsw_res *res; 1028 size_t alloc_size; 1029 int err; 1030 1031 mlxsw_driver = mlxsw_core_driver_get(device_kind); 1032 if (!mlxsw_driver) 1033 return -EINVAL; 1034 1035 if (!reload) { 1036 alloc_size = sizeof(*mlxsw_core) + mlxsw_driver->priv_size; 1037 devlink = devlink_alloc(&mlxsw_devlink_ops, alloc_size); 1038 if (!devlink) { 1039 err = -ENOMEM; 1040 goto err_devlink_alloc; 1041 } 1042 } 1043 1044 mlxsw_core = devlink_priv(devlink); 1045 INIT_LIST_HEAD(&mlxsw_core->rx_listener_list); 1046 INIT_LIST_HEAD(&mlxsw_core->event_listener_list); 1047 mlxsw_core->driver = mlxsw_driver; 1048 mlxsw_core->bus = mlxsw_bus; 1049 mlxsw_core->bus_priv = bus_priv; 1050 mlxsw_core->bus_info = mlxsw_bus_info; 1051 1052 res = mlxsw_driver->res_query_enabled ? &mlxsw_core->res : NULL; 1053 err = mlxsw_bus->init(bus_priv, mlxsw_core, mlxsw_driver->profile, res); 1054 if (err) 1055 goto err_bus_init; 1056 1057 if (mlxsw_driver->resources_register && !reload) { 1058 err = mlxsw_driver->resources_register(mlxsw_core); 1059 if (err) 1060 goto err_register_resources; 1061 } 1062 1063 err = mlxsw_ports_init(mlxsw_core); 1064 if (err) 1065 goto err_ports_init; 1066 1067 if (MLXSW_CORE_RES_VALID(mlxsw_core, MAX_LAG) && 1068 MLXSW_CORE_RES_VALID(mlxsw_core, MAX_LAG_MEMBERS)) { 1069 alloc_size = sizeof(u8) * 1070 MLXSW_CORE_RES_GET(mlxsw_core, MAX_LAG) * 1071 MLXSW_CORE_RES_GET(mlxsw_core, MAX_LAG_MEMBERS); 1072 mlxsw_core->lag.mapping = kzalloc(alloc_size, GFP_KERNEL); 1073 if (!mlxsw_core->lag.mapping) { 1074 err = -ENOMEM; 1075 goto err_alloc_lag_mapping; 1076 } 1077 } 1078 1079 err = mlxsw_emad_init(mlxsw_core); 1080 if (err) 1081 goto err_emad_init; 1082 1083 if (!reload) { 1084 err = devlink_register(devlink, mlxsw_bus_info->dev); 1085 if (err) 1086 goto err_devlink_register; 1087 } 1088 1089 if (mlxsw_driver->params_register && !reload) { 1090 err = mlxsw_driver->params_register(mlxsw_core); 1091 if (err) 1092 goto err_register_params; 1093 } 1094 1095 err = mlxsw_hwmon_init(mlxsw_core, mlxsw_bus_info, &mlxsw_core->hwmon); 1096 if (err) 1097 goto err_hwmon_init; 1098 1099 err = mlxsw_thermal_init(mlxsw_core, mlxsw_bus_info, 1100 &mlxsw_core->thermal); 1101 if (err) 1102 goto err_thermal_init; 1103 1104 if (mlxsw_driver->init) { 1105 err = mlxsw_driver->init(mlxsw_core, mlxsw_bus_info); 1106 if (err) 1107 goto err_driver_init; 1108 } 1109 1110 if (mlxsw_driver->params_register && !reload) 1111 devlink_params_publish(devlink); 1112 1113 return 0; 1114 1115 err_driver_init: 1116 mlxsw_thermal_fini(mlxsw_core->thermal); 1117 err_thermal_init: 1118 mlxsw_hwmon_fini(mlxsw_core->hwmon); 1119 err_hwmon_init: 1120 if (mlxsw_driver->params_unregister && !reload) 1121 mlxsw_driver->params_unregister(mlxsw_core); 1122 err_register_params: 1123 if (!reload) 1124 devlink_unregister(devlink); 1125 err_devlink_register: 1126 mlxsw_emad_fini(mlxsw_core); 1127 err_emad_init: 1128 kfree(mlxsw_core->lag.mapping); 1129 err_alloc_lag_mapping: 1130 mlxsw_ports_fini(mlxsw_core); 1131 err_ports_init: 1132 if (!reload) 1133 devlink_resources_unregister(devlink, NULL); 1134 err_register_resources: 1135 mlxsw_bus->fini(bus_priv); 1136 err_bus_init: 1137 if (!reload) 1138 devlink_free(devlink); 1139 err_devlink_alloc: 1140 return err; 1141 } 1142 1143 int mlxsw_core_bus_device_register(const struct mlxsw_bus_info *mlxsw_bus_info, 1144 const struct mlxsw_bus *mlxsw_bus, 1145 void *bus_priv, bool reload, 1146 struct devlink *devlink) 1147 { 1148 bool called_again = false; 1149 int err; 1150 1151 again: 1152 err = __mlxsw_core_bus_device_register(mlxsw_bus_info, mlxsw_bus, 1153 bus_priv, reload, devlink); 1154 /* -EAGAIN is returned in case the FW was updated. FW needs 1155 * a reset, so lets try to call __mlxsw_core_bus_device_register() 1156 * again. 1157 */ 1158 if (err == -EAGAIN && !called_again) { 1159 called_again = true; 1160 goto again; 1161 } 1162 1163 return err; 1164 } 1165 EXPORT_SYMBOL(mlxsw_core_bus_device_register); 1166 1167 void mlxsw_core_bus_device_unregister(struct mlxsw_core *mlxsw_core, 1168 bool reload) 1169 { 1170 struct devlink *devlink = priv_to_devlink(mlxsw_core); 1171 1172 if (mlxsw_core->reload_fail) { 1173 if (!reload) 1174 /* Only the parts that were not de-initialized in the 1175 * failed reload attempt need to be de-initialized. 1176 */ 1177 goto reload_fail_deinit; 1178 else 1179 return; 1180 } 1181 1182 if (mlxsw_core->driver->params_unregister && !reload) 1183 devlink_params_unpublish(devlink); 1184 if (mlxsw_core->driver->fini) 1185 mlxsw_core->driver->fini(mlxsw_core); 1186 mlxsw_thermal_fini(mlxsw_core->thermal); 1187 mlxsw_hwmon_fini(mlxsw_core->hwmon); 1188 if (mlxsw_core->driver->params_unregister && !reload) 1189 mlxsw_core->driver->params_unregister(mlxsw_core); 1190 if (!reload) 1191 devlink_unregister(devlink); 1192 mlxsw_emad_fini(mlxsw_core); 1193 kfree(mlxsw_core->lag.mapping); 1194 mlxsw_ports_fini(mlxsw_core); 1195 if (!reload) 1196 devlink_resources_unregister(devlink, NULL); 1197 mlxsw_core->bus->fini(mlxsw_core->bus_priv); 1198 1199 return; 1200 1201 reload_fail_deinit: 1202 if (mlxsw_core->driver->params_unregister) 1203 mlxsw_core->driver->params_unregister(mlxsw_core); 1204 devlink_unregister(devlink); 1205 devlink_resources_unregister(devlink, NULL); 1206 devlink_free(devlink); 1207 } 1208 EXPORT_SYMBOL(mlxsw_core_bus_device_unregister); 1209 1210 bool mlxsw_core_skb_transmit_busy(struct mlxsw_core *mlxsw_core, 1211 const struct mlxsw_tx_info *tx_info) 1212 { 1213 return mlxsw_core->bus->skb_transmit_busy(mlxsw_core->bus_priv, 1214 tx_info); 1215 } 1216 EXPORT_SYMBOL(mlxsw_core_skb_transmit_busy); 1217 1218 int mlxsw_core_skb_transmit(struct mlxsw_core *mlxsw_core, struct sk_buff *skb, 1219 const struct mlxsw_tx_info *tx_info) 1220 { 1221 return mlxsw_core->bus->skb_transmit(mlxsw_core->bus_priv, skb, 1222 tx_info); 1223 } 1224 EXPORT_SYMBOL(mlxsw_core_skb_transmit); 1225 1226 static bool __is_rx_listener_equal(const struct mlxsw_rx_listener *rxl_a, 1227 const struct mlxsw_rx_listener *rxl_b) 1228 { 1229 return (rxl_a->func == rxl_b->func && 1230 rxl_a->local_port == rxl_b->local_port && 1231 rxl_a->trap_id == rxl_b->trap_id); 1232 } 1233 1234 static struct mlxsw_rx_listener_item * 1235 __find_rx_listener_item(struct mlxsw_core *mlxsw_core, 1236 const struct mlxsw_rx_listener *rxl, 1237 void *priv) 1238 { 1239 struct mlxsw_rx_listener_item *rxl_item; 1240 1241 list_for_each_entry(rxl_item, &mlxsw_core->rx_listener_list, list) { 1242 if (__is_rx_listener_equal(&rxl_item->rxl, rxl) && 1243 rxl_item->priv == priv) 1244 return rxl_item; 1245 } 1246 return NULL; 1247 } 1248 1249 int mlxsw_core_rx_listener_register(struct mlxsw_core *mlxsw_core, 1250 const struct mlxsw_rx_listener *rxl, 1251 void *priv) 1252 { 1253 struct mlxsw_rx_listener_item *rxl_item; 1254 1255 rxl_item = __find_rx_listener_item(mlxsw_core, rxl, priv); 1256 if (rxl_item) 1257 return -EEXIST; 1258 rxl_item = kmalloc(sizeof(*rxl_item), GFP_KERNEL); 1259 if (!rxl_item) 1260 return -ENOMEM; 1261 rxl_item->rxl = *rxl; 1262 rxl_item->priv = priv; 1263 1264 list_add_rcu(&rxl_item->list, &mlxsw_core->rx_listener_list); 1265 return 0; 1266 } 1267 EXPORT_SYMBOL(mlxsw_core_rx_listener_register); 1268 1269 void mlxsw_core_rx_listener_unregister(struct mlxsw_core *mlxsw_core, 1270 const struct mlxsw_rx_listener *rxl, 1271 void *priv) 1272 { 1273 struct mlxsw_rx_listener_item *rxl_item; 1274 1275 rxl_item = __find_rx_listener_item(mlxsw_core, rxl, priv); 1276 if (!rxl_item) 1277 return; 1278 list_del_rcu(&rxl_item->list); 1279 synchronize_rcu(); 1280 kfree(rxl_item); 1281 } 1282 EXPORT_SYMBOL(mlxsw_core_rx_listener_unregister); 1283 1284 static void mlxsw_core_event_listener_func(struct sk_buff *skb, u8 local_port, 1285 void *priv) 1286 { 1287 struct mlxsw_event_listener_item *event_listener_item = priv; 1288 struct mlxsw_reg_info reg; 1289 char *payload; 1290 char *op_tlv = mlxsw_emad_op_tlv(skb); 1291 char *reg_tlv = mlxsw_emad_reg_tlv(skb); 1292 1293 reg.id = mlxsw_emad_op_tlv_register_id_get(op_tlv); 1294 reg.len = (mlxsw_emad_reg_tlv_len_get(reg_tlv) - 1) * sizeof(u32); 1295 payload = mlxsw_emad_reg_payload(op_tlv); 1296 event_listener_item->el.func(®, payload, event_listener_item->priv); 1297 dev_kfree_skb(skb); 1298 } 1299 1300 static bool __is_event_listener_equal(const struct mlxsw_event_listener *el_a, 1301 const struct mlxsw_event_listener *el_b) 1302 { 1303 return (el_a->func == el_b->func && 1304 el_a->trap_id == el_b->trap_id); 1305 } 1306 1307 static struct mlxsw_event_listener_item * 1308 __find_event_listener_item(struct mlxsw_core *mlxsw_core, 1309 const struct mlxsw_event_listener *el, 1310 void *priv) 1311 { 1312 struct mlxsw_event_listener_item *el_item; 1313 1314 list_for_each_entry(el_item, &mlxsw_core->event_listener_list, list) { 1315 if (__is_event_listener_equal(&el_item->el, el) && 1316 el_item->priv == priv) 1317 return el_item; 1318 } 1319 return NULL; 1320 } 1321 1322 int mlxsw_core_event_listener_register(struct mlxsw_core *mlxsw_core, 1323 const struct mlxsw_event_listener *el, 1324 void *priv) 1325 { 1326 int err; 1327 struct mlxsw_event_listener_item *el_item; 1328 const struct mlxsw_rx_listener rxl = { 1329 .func = mlxsw_core_event_listener_func, 1330 .local_port = MLXSW_PORT_DONT_CARE, 1331 .trap_id = el->trap_id, 1332 }; 1333 1334 el_item = __find_event_listener_item(mlxsw_core, el, priv); 1335 if (el_item) 1336 return -EEXIST; 1337 el_item = kmalloc(sizeof(*el_item), GFP_KERNEL); 1338 if (!el_item) 1339 return -ENOMEM; 1340 el_item->el = *el; 1341 el_item->priv = priv; 1342 1343 err = mlxsw_core_rx_listener_register(mlxsw_core, &rxl, el_item); 1344 if (err) 1345 goto err_rx_listener_register; 1346 1347 /* No reason to save item if we did not manage to register an RX 1348 * listener for it. 1349 */ 1350 list_add_rcu(&el_item->list, &mlxsw_core->event_listener_list); 1351 1352 return 0; 1353 1354 err_rx_listener_register: 1355 kfree(el_item); 1356 return err; 1357 } 1358 EXPORT_SYMBOL(mlxsw_core_event_listener_register); 1359 1360 void mlxsw_core_event_listener_unregister(struct mlxsw_core *mlxsw_core, 1361 const struct mlxsw_event_listener *el, 1362 void *priv) 1363 { 1364 struct mlxsw_event_listener_item *el_item; 1365 const struct mlxsw_rx_listener rxl = { 1366 .func = mlxsw_core_event_listener_func, 1367 .local_port = MLXSW_PORT_DONT_CARE, 1368 .trap_id = el->trap_id, 1369 }; 1370 1371 el_item = __find_event_listener_item(mlxsw_core, el, priv); 1372 if (!el_item) 1373 return; 1374 mlxsw_core_rx_listener_unregister(mlxsw_core, &rxl, el_item); 1375 list_del(&el_item->list); 1376 kfree(el_item); 1377 } 1378 EXPORT_SYMBOL(mlxsw_core_event_listener_unregister); 1379 1380 static int mlxsw_core_listener_register(struct mlxsw_core *mlxsw_core, 1381 const struct mlxsw_listener *listener, 1382 void *priv) 1383 { 1384 if (listener->is_event) 1385 return mlxsw_core_event_listener_register(mlxsw_core, 1386 &listener->u.event_listener, 1387 priv); 1388 else 1389 return mlxsw_core_rx_listener_register(mlxsw_core, 1390 &listener->u.rx_listener, 1391 priv); 1392 } 1393 1394 static void mlxsw_core_listener_unregister(struct mlxsw_core *mlxsw_core, 1395 const struct mlxsw_listener *listener, 1396 void *priv) 1397 { 1398 if (listener->is_event) 1399 mlxsw_core_event_listener_unregister(mlxsw_core, 1400 &listener->u.event_listener, 1401 priv); 1402 else 1403 mlxsw_core_rx_listener_unregister(mlxsw_core, 1404 &listener->u.rx_listener, 1405 priv); 1406 } 1407 1408 int mlxsw_core_trap_register(struct mlxsw_core *mlxsw_core, 1409 const struct mlxsw_listener *listener, void *priv) 1410 { 1411 char hpkt_pl[MLXSW_REG_HPKT_LEN]; 1412 int err; 1413 1414 err = mlxsw_core_listener_register(mlxsw_core, listener, priv); 1415 if (err) 1416 return err; 1417 1418 mlxsw_reg_hpkt_pack(hpkt_pl, listener->action, listener->trap_id, 1419 listener->trap_group, listener->is_ctrl); 1420 err = mlxsw_reg_write(mlxsw_core, MLXSW_REG(hpkt), hpkt_pl); 1421 if (err) 1422 goto err_trap_set; 1423 1424 return 0; 1425 1426 err_trap_set: 1427 mlxsw_core_listener_unregister(mlxsw_core, listener, priv); 1428 return err; 1429 } 1430 EXPORT_SYMBOL(mlxsw_core_trap_register); 1431 1432 void mlxsw_core_trap_unregister(struct mlxsw_core *mlxsw_core, 1433 const struct mlxsw_listener *listener, 1434 void *priv) 1435 { 1436 char hpkt_pl[MLXSW_REG_HPKT_LEN]; 1437 1438 if (!listener->is_event) { 1439 mlxsw_reg_hpkt_pack(hpkt_pl, listener->unreg_action, 1440 listener->trap_id, listener->trap_group, 1441 listener->is_ctrl); 1442 mlxsw_reg_write(mlxsw_core, MLXSW_REG(hpkt), hpkt_pl); 1443 } 1444 1445 mlxsw_core_listener_unregister(mlxsw_core, listener, priv); 1446 } 1447 EXPORT_SYMBOL(mlxsw_core_trap_unregister); 1448 1449 static u64 mlxsw_core_tid_get(struct mlxsw_core *mlxsw_core) 1450 { 1451 return atomic64_inc_return(&mlxsw_core->emad.tid); 1452 } 1453 1454 static int mlxsw_core_reg_access_emad(struct mlxsw_core *mlxsw_core, 1455 const struct mlxsw_reg_info *reg, 1456 char *payload, 1457 enum mlxsw_core_reg_access_type type, 1458 struct list_head *bulk_list, 1459 mlxsw_reg_trans_cb_t *cb, 1460 unsigned long cb_priv) 1461 { 1462 u64 tid = mlxsw_core_tid_get(mlxsw_core); 1463 struct mlxsw_reg_trans *trans; 1464 int err; 1465 1466 trans = kzalloc(sizeof(*trans), GFP_KERNEL); 1467 if (!trans) 1468 return -ENOMEM; 1469 1470 err = mlxsw_emad_reg_access(mlxsw_core, reg, payload, type, trans, 1471 bulk_list, cb, cb_priv, tid); 1472 if (err) { 1473 kfree(trans); 1474 return err; 1475 } 1476 return 0; 1477 } 1478 1479 int mlxsw_reg_trans_query(struct mlxsw_core *mlxsw_core, 1480 const struct mlxsw_reg_info *reg, char *payload, 1481 struct list_head *bulk_list, 1482 mlxsw_reg_trans_cb_t *cb, unsigned long cb_priv) 1483 { 1484 return mlxsw_core_reg_access_emad(mlxsw_core, reg, payload, 1485 MLXSW_CORE_REG_ACCESS_TYPE_QUERY, 1486 bulk_list, cb, cb_priv); 1487 } 1488 EXPORT_SYMBOL(mlxsw_reg_trans_query); 1489 1490 int mlxsw_reg_trans_write(struct mlxsw_core *mlxsw_core, 1491 const struct mlxsw_reg_info *reg, char *payload, 1492 struct list_head *bulk_list, 1493 mlxsw_reg_trans_cb_t *cb, unsigned long cb_priv) 1494 { 1495 return mlxsw_core_reg_access_emad(mlxsw_core, reg, payload, 1496 MLXSW_CORE_REG_ACCESS_TYPE_WRITE, 1497 bulk_list, cb, cb_priv); 1498 } 1499 EXPORT_SYMBOL(mlxsw_reg_trans_write); 1500 1501 static int mlxsw_reg_trans_wait(struct mlxsw_reg_trans *trans) 1502 { 1503 struct mlxsw_core *mlxsw_core = trans->core; 1504 int err; 1505 1506 wait_for_completion(&trans->completion); 1507 cancel_delayed_work_sync(&trans->timeout_dw); 1508 err = trans->err; 1509 1510 if (trans->retries) 1511 dev_warn(mlxsw_core->bus_info->dev, "EMAD retries (%d/%d) (tid=%llx)\n", 1512 trans->retries, MLXSW_EMAD_MAX_RETRY, trans->tid); 1513 if (err) { 1514 dev_err(mlxsw_core->bus_info->dev, "EMAD reg access failed (tid=%llx,reg_id=%x(%s),type=%s,status=%x(%s))\n", 1515 trans->tid, trans->reg->id, 1516 mlxsw_reg_id_str(trans->reg->id), 1517 mlxsw_core_reg_access_type_str(trans->type), 1518 trans->emad_status, 1519 mlxsw_emad_op_tlv_status_str(trans->emad_status)); 1520 trace_devlink_hwerr(priv_to_devlink(mlxsw_core), 1521 trans->emad_status, 1522 mlxsw_emad_op_tlv_status_str(trans->emad_status)); 1523 } 1524 1525 list_del(&trans->bulk_list); 1526 kfree_rcu(trans, rcu); 1527 return err; 1528 } 1529 1530 int mlxsw_reg_trans_bulk_wait(struct list_head *bulk_list) 1531 { 1532 struct mlxsw_reg_trans *trans; 1533 struct mlxsw_reg_trans *tmp; 1534 int sum_err = 0; 1535 int err; 1536 1537 list_for_each_entry_safe(trans, tmp, bulk_list, bulk_list) { 1538 err = mlxsw_reg_trans_wait(trans); 1539 if (err && sum_err == 0) 1540 sum_err = err; /* first error to be returned */ 1541 } 1542 return sum_err; 1543 } 1544 EXPORT_SYMBOL(mlxsw_reg_trans_bulk_wait); 1545 1546 static int mlxsw_core_reg_access_cmd(struct mlxsw_core *mlxsw_core, 1547 const struct mlxsw_reg_info *reg, 1548 char *payload, 1549 enum mlxsw_core_reg_access_type type) 1550 { 1551 enum mlxsw_emad_op_tlv_status status; 1552 int err, n_retry; 1553 bool reset_ok; 1554 char *in_mbox, *out_mbox, *tmp; 1555 1556 dev_dbg(mlxsw_core->bus_info->dev, "Reg cmd access (reg_id=%x(%s),type=%s)\n", 1557 reg->id, mlxsw_reg_id_str(reg->id), 1558 mlxsw_core_reg_access_type_str(type)); 1559 1560 in_mbox = mlxsw_cmd_mbox_alloc(); 1561 if (!in_mbox) 1562 return -ENOMEM; 1563 1564 out_mbox = mlxsw_cmd_mbox_alloc(); 1565 if (!out_mbox) { 1566 err = -ENOMEM; 1567 goto free_in_mbox; 1568 } 1569 1570 mlxsw_emad_pack_op_tlv(in_mbox, reg, type, 1571 mlxsw_core_tid_get(mlxsw_core)); 1572 tmp = in_mbox + MLXSW_EMAD_OP_TLV_LEN * sizeof(u32); 1573 mlxsw_emad_pack_reg_tlv(tmp, reg, payload); 1574 1575 /* There is a special treatment needed for MRSR (reset) register. 1576 * The command interface will return error after the command 1577 * is executed, so tell the lower layer to expect it 1578 * and cope accordingly. 1579 */ 1580 reset_ok = reg->id == MLXSW_REG_MRSR_ID; 1581 1582 n_retry = 0; 1583 retry: 1584 err = mlxsw_cmd_access_reg(mlxsw_core, reset_ok, in_mbox, out_mbox); 1585 if (!err) { 1586 err = mlxsw_emad_process_status(out_mbox, &status); 1587 if (err) { 1588 if (err == -EAGAIN && n_retry++ < MLXSW_EMAD_MAX_RETRY) 1589 goto retry; 1590 dev_err(mlxsw_core->bus_info->dev, "Reg cmd access status failed (status=%x(%s))\n", 1591 status, mlxsw_emad_op_tlv_status_str(status)); 1592 } 1593 } 1594 1595 if (!err) 1596 memcpy(payload, mlxsw_emad_reg_payload(out_mbox), 1597 reg->len); 1598 1599 mlxsw_cmd_mbox_free(out_mbox); 1600 free_in_mbox: 1601 mlxsw_cmd_mbox_free(in_mbox); 1602 if (err) 1603 dev_err(mlxsw_core->bus_info->dev, "Reg cmd access failed (reg_id=%x(%s),type=%s)\n", 1604 reg->id, mlxsw_reg_id_str(reg->id), 1605 mlxsw_core_reg_access_type_str(type)); 1606 return err; 1607 } 1608 1609 static void mlxsw_core_reg_access_cb(struct mlxsw_core *mlxsw_core, 1610 char *payload, size_t payload_len, 1611 unsigned long cb_priv) 1612 { 1613 char *orig_payload = (char *) cb_priv; 1614 1615 memcpy(orig_payload, payload, payload_len); 1616 } 1617 1618 static int mlxsw_core_reg_access(struct mlxsw_core *mlxsw_core, 1619 const struct mlxsw_reg_info *reg, 1620 char *payload, 1621 enum mlxsw_core_reg_access_type type) 1622 { 1623 LIST_HEAD(bulk_list); 1624 int err; 1625 1626 /* During initialization EMAD interface is not available to us, 1627 * so we default to command interface. We switch to EMAD interface 1628 * after setting the appropriate traps. 1629 */ 1630 if (!mlxsw_core->emad.use_emad) 1631 return mlxsw_core_reg_access_cmd(mlxsw_core, reg, 1632 payload, type); 1633 1634 err = mlxsw_core_reg_access_emad(mlxsw_core, reg, 1635 payload, type, &bulk_list, 1636 mlxsw_core_reg_access_cb, 1637 (unsigned long) payload); 1638 if (err) 1639 return err; 1640 return mlxsw_reg_trans_bulk_wait(&bulk_list); 1641 } 1642 1643 int mlxsw_reg_query(struct mlxsw_core *mlxsw_core, 1644 const struct mlxsw_reg_info *reg, char *payload) 1645 { 1646 return mlxsw_core_reg_access(mlxsw_core, reg, payload, 1647 MLXSW_CORE_REG_ACCESS_TYPE_QUERY); 1648 } 1649 EXPORT_SYMBOL(mlxsw_reg_query); 1650 1651 int mlxsw_reg_write(struct mlxsw_core *mlxsw_core, 1652 const struct mlxsw_reg_info *reg, char *payload) 1653 { 1654 return mlxsw_core_reg_access(mlxsw_core, reg, payload, 1655 MLXSW_CORE_REG_ACCESS_TYPE_WRITE); 1656 } 1657 EXPORT_SYMBOL(mlxsw_reg_write); 1658 1659 void mlxsw_core_skb_receive(struct mlxsw_core *mlxsw_core, struct sk_buff *skb, 1660 struct mlxsw_rx_info *rx_info) 1661 { 1662 struct mlxsw_rx_listener_item *rxl_item; 1663 const struct mlxsw_rx_listener *rxl; 1664 u8 local_port; 1665 bool found = false; 1666 1667 if (rx_info->is_lag) { 1668 dev_dbg_ratelimited(mlxsw_core->bus_info->dev, "%s: lag_id = %d, lag_port_index = 0x%x\n", 1669 __func__, rx_info->u.lag_id, 1670 rx_info->trap_id); 1671 /* Upper layer does not care if the skb came from LAG or not, 1672 * so just get the local_port for the lag port and push it up. 1673 */ 1674 local_port = mlxsw_core_lag_mapping_get(mlxsw_core, 1675 rx_info->u.lag_id, 1676 rx_info->lag_port_index); 1677 } else { 1678 local_port = rx_info->u.sys_port; 1679 } 1680 1681 dev_dbg_ratelimited(mlxsw_core->bus_info->dev, "%s: local_port = %d, trap_id = 0x%x\n", 1682 __func__, local_port, rx_info->trap_id); 1683 1684 if ((rx_info->trap_id >= MLXSW_TRAP_ID_MAX) || 1685 (local_port >= mlxsw_core->max_ports)) 1686 goto drop; 1687 1688 rcu_read_lock(); 1689 list_for_each_entry_rcu(rxl_item, &mlxsw_core->rx_listener_list, list) { 1690 rxl = &rxl_item->rxl; 1691 if ((rxl->local_port == MLXSW_PORT_DONT_CARE || 1692 rxl->local_port == local_port) && 1693 rxl->trap_id == rx_info->trap_id) { 1694 found = true; 1695 break; 1696 } 1697 } 1698 rcu_read_unlock(); 1699 if (!found) 1700 goto drop; 1701 1702 rxl->func(skb, local_port, rxl_item->priv); 1703 return; 1704 1705 drop: 1706 dev_kfree_skb(skb); 1707 } 1708 EXPORT_SYMBOL(mlxsw_core_skb_receive); 1709 1710 static int mlxsw_core_lag_mapping_index(struct mlxsw_core *mlxsw_core, 1711 u16 lag_id, u8 port_index) 1712 { 1713 return MLXSW_CORE_RES_GET(mlxsw_core, MAX_LAG_MEMBERS) * lag_id + 1714 port_index; 1715 } 1716 1717 void mlxsw_core_lag_mapping_set(struct mlxsw_core *mlxsw_core, 1718 u16 lag_id, u8 port_index, u8 local_port) 1719 { 1720 int index = mlxsw_core_lag_mapping_index(mlxsw_core, 1721 lag_id, port_index); 1722 1723 mlxsw_core->lag.mapping[index] = local_port; 1724 } 1725 EXPORT_SYMBOL(mlxsw_core_lag_mapping_set); 1726 1727 u8 mlxsw_core_lag_mapping_get(struct mlxsw_core *mlxsw_core, 1728 u16 lag_id, u8 port_index) 1729 { 1730 int index = mlxsw_core_lag_mapping_index(mlxsw_core, 1731 lag_id, port_index); 1732 1733 return mlxsw_core->lag.mapping[index]; 1734 } 1735 EXPORT_SYMBOL(mlxsw_core_lag_mapping_get); 1736 1737 void mlxsw_core_lag_mapping_clear(struct mlxsw_core *mlxsw_core, 1738 u16 lag_id, u8 local_port) 1739 { 1740 int i; 1741 1742 for (i = 0; i < MLXSW_CORE_RES_GET(mlxsw_core, MAX_LAG_MEMBERS); i++) { 1743 int index = mlxsw_core_lag_mapping_index(mlxsw_core, 1744 lag_id, i); 1745 1746 if (mlxsw_core->lag.mapping[index] == local_port) 1747 mlxsw_core->lag.mapping[index] = 0; 1748 } 1749 } 1750 EXPORT_SYMBOL(mlxsw_core_lag_mapping_clear); 1751 1752 bool mlxsw_core_res_valid(struct mlxsw_core *mlxsw_core, 1753 enum mlxsw_res_id res_id) 1754 { 1755 return mlxsw_res_valid(&mlxsw_core->res, res_id); 1756 } 1757 EXPORT_SYMBOL(mlxsw_core_res_valid); 1758 1759 u64 mlxsw_core_res_get(struct mlxsw_core *mlxsw_core, 1760 enum mlxsw_res_id res_id) 1761 { 1762 return mlxsw_res_get(&mlxsw_core->res, res_id); 1763 } 1764 EXPORT_SYMBOL(mlxsw_core_res_get); 1765 1766 int mlxsw_core_port_init(struct mlxsw_core *mlxsw_core, u8 local_port, 1767 u32 port_number, bool split, 1768 u32 split_port_subnumber, 1769 const unsigned char *switch_id, 1770 unsigned char switch_id_len) 1771 { 1772 struct devlink *devlink = priv_to_devlink(mlxsw_core); 1773 struct mlxsw_core_port *mlxsw_core_port = 1774 &mlxsw_core->ports[local_port]; 1775 struct devlink_port *devlink_port = &mlxsw_core_port->devlink_port; 1776 int err; 1777 1778 mlxsw_core_port->local_port = local_port; 1779 devlink_port_attrs_set(devlink_port, DEVLINK_PORT_FLAVOUR_PHYSICAL, 1780 port_number, split, split_port_subnumber, 1781 switch_id, switch_id_len); 1782 err = devlink_port_register(devlink, devlink_port, local_port); 1783 if (err) 1784 memset(mlxsw_core_port, 0, sizeof(*mlxsw_core_port)); 1785 return err; 1786 } 1787 EXPORT_SYMBOL(mlxsw_core_port_init); 1788 1789 void mlxsw_core_port_fini(struct mlxsw_core *mlxsw_core, u8 local_port) 1790 { 1791 struct mlxsw_core_port *mlxsw_core_port = 1792 &mlxsw_core->ports[local_port]; 1793 struct devlink_port *devlink_port = &mlxsw_core_port->devlink_port; 1794 1795 devlink_port_unregister(devlink_port); 1796 memset(mlxsw_core_port, 0, sizeof(*mlxsw_core_port)); 1797 } 1798 EXPORT_SYMBOL(mlxsw_core_port_fini); 1799 1800 void mlxsw_core_port_eth_set(struct mlxsw_core *mlxsw_core, u8 local_port, 1801 void *port_driver_priv, struct net_device *dev) 1802 { 1803 struct mlxsw_core_port *mlxsw_core_port = 1804 &mlxsw_core->ports[local_port]; 1805 struct devlink_port *devlink_port = &mlxsw_core_port->devlink_port; 1806 1807 mlxsw_core_port->port_driver_priv = port_driver_priv; 1808 devlink_port_type_eth_set(devlink_port, dev); 1809 } 1810 EXPORT_SYMBOL(mlxsw_core_port_eth_set); 1811 1812 void mlxsw_core_port_ib_set(struct mlxsw_core *mlxsw_core, u8 local_port, 1813 void *port_driver_priv) 1814 { 1815 struct mlxsw_core_port *mlxsw_core_port = 1816 &mlxsw_core->ports[local_port]; 1817 struct devlink_port *devlink_port = &mlxsw_core_port->devlink_port; 1818 1819 mlxsw_core_port->port_driver_priv = port_driver_priv; 1820 devlink_port_type_ib_set(devlink_port, NULL); 1821 } 1822 EXPORT_SYMBOL(mlxsw_core_port_ib_set); 1823 1824 void mlxsw_core_port_clear(struct mlxsw_core *mlxsw_core, u8 local_port, 1825 void *port_driver_priv) 1826 { 1827 struct mlxsw_core_port *mlxsw_core_port = 1828 &mlxsw_core->ports[local_port]; 1829 struct devlink_port *devlink_port = &mlxsw_core_port->devlink_port; 1830 1831 mlxsw_core_port->port_driver_priv = port_driver_priv; 1832 devlink_port_type_clear(devlink_port); 1833 } 1834 EXPORT_SYMBOL(mlxsw_core_port_clear); 1835 1836 enum devlink_port_type mlxsw_core_port_type_get(struct mlxsw_core *mlxsw_core, 1837 u8 local_port) 1838 { 1839 struct mlxsw_core_port *mlxsw_core_port = 1840 &mlxsw_core->ports[local_port]; 1841 struct devlink_port *devlink_port = &mlxsw_core_port->devlink_port; 1842 1843 return devlink_port->type; 1844 } 1845 EXPORT_SYMBOL(mlxsw_core_port_type_get); 1846 1847 1848 struct devlink_port * 1849 mlxsw_core_port_devlink_port_get(struct mlxsw_core *mlxsw_core, 1850 u8 local_port) 1851 { 1852 struct mlxsw_core_port *mlxsw_core_port = 1853 &mlxsw_core->ports[local_port]; 1854 struct devlink_port *devlink_port = &mlxsw_core_port->devlink_port; 1855 1856 return devlink_port; 1857 } 1858 EXPORT_SYMBOL(mlxsw_core_port_devlink_port_get); 1859 1860 static void mlxsw_core_buf_dump_dbg(struct mlxsw_core *mlxsw_core, 1861 const char *buf, size_t size) 1862 { 1863 __be32 *m = (__be32 *) buf; 1864 int i; 1865 int count = size / sizeof(__be32); 1866 1867 for (i = count - 1; i >= 0; i--) 1868 if (m[i]) 1869 break; 1870 i++; 1871 count = i ? i : 1; 1872 for (i = 0; i < count; i += 4) 1873 dev_dbg(mlxsw_core->bus_info->dev, "%04x - %08x %08x %08x %08x\n", 1874 i * 4, be32_to_cpu(m[i]), be32_to_cpu(m[i + 1]), 1875 be32_to_cpu(m[i + 2]), be32_to_cpu(m[i + 3])); 1876 } 1877 1878 int mlxsw_cmd_exec(struct mlxsw_core *mlxsw_core, u16 opcode, u8 opcode_mod, 1879 u32 in_mod, bool out_mbox_direct, bool reset_ok, 1880 char *in_mbox, size_t in_mbox_size, 1881 char *out_mbox, size_t out_mbox_size) 1882 { 1883 u8 status; 1884 int err; 1885 1886 BUG_ON(in_mbox_size % sizeof(u32) || out_mbox_size % sizeof(u32)); 1887 if (!mlxsw_core->bus->cmd_exec) 1888 return -EOPNOTSUPP; 1889 1890 dev_dbg(mlxsw_core->bus_info->dev, "Cmd exec (opcode=%x(%s),opcode_mod=%x,in_mod=%x)\n", 1891 opcode, mlxsw_cmd_opcode_str(opcode), opcode_mod, in_mod); 1892 if (in_mbox) { 1893 dev_dbg(mlxsw_core->bus_info->dev, "Input mailbox:\n"); 1894 mlxsw_core_buf_dump_dbg(mlxsw_core, in_mbox, in_mbox_size); 1895 } 1896 1897 err = mlxsw_core->bus->cmd_exec(mlxsw_core->bus_priv, opcode, 1898 opcode_mod, in_mod, out_mbox_direct, 1899 in_mbox, in_mbox_size, 1900 out_mbox, out_mbox_size, &status); 1901 1902 if (!err && out_mbox) { 1903 dev_dbg(mlxsw_core->bus_info->dev, "Output mailbox:\n"); 1904 mlxsw_core_buf_dump_dbg(mlxsw_core, out_mbox, out_mbox_size); 1905 } 1906 1907 if (reset_ok && err == -EIO && 1908 status == MLXSW_CMD_STATUS_RUNNING_RESET) { 1909 err = 0; 1910 } else if (err == -EIO && status != MLXSW_CMD_STATUS_OK) { 1911 dev_err(mlxsw_core->bus_info->dev, "Cmd exec failed (opcode=%x(%s),opcode_mod=%x,in_mod=%x,status=%x(%s))\n", 1912 opcode, mlxsw_cmd_opcode_str(opcode), opcode_mod, 1913 in_mod, status, mlxsw_cmd_status_str(status)); 1914 } else if (err == -ETIMEDOUT) { 1915 dev_err(mlxsw_core->bus_info->dev, "Cmd exec timed-out (opcode=%x(%s),opcode_mod=%x,in_mod=%x)\n", 1916 opcode, mlxsw_cmd_opcode_str(opcode), opcode_mod, 1917 in_mod); 1918 } 1919 1920 return err; 1921 } 1922 EXPORT_SYMBOL(mlxsw_cmd_exec); 1923 1924 int mlxsw_core_schedule_dw(struct delayed_work *dwork, unsigned long delay) 1925 { 1926 return queue_delayed_work(mlxsw_wq, dwork, delay); 1927 } 1928 EXPORT_SYMBOL(mlxsw_core_schedule_dw); 1929 1930 bool mlxsw_core_schedule_work(struct work_struct *work) 1931 { 1932 return queue_work(mlxsw_owq, work); 1933 } 1934 EXPORT_SYMBOL(mlxsw_core_schedule_work); 1935 1936 void mlxsw_core_flush_owq(void) 1937 { 1938 flush_workqueue(mlxsw_owq); 1939 } 1940 EXPORT_SYMBOL(mlxsw_core_flush_owq); 1941 1942 int mlxsw_core_kvd_sizes_get(struct mlxsw_core *mlxsw_core, 1943 const struct mlxsw_config_profile *profile, 1944 u64 *p_single_size, u64 *p_double_size, 1945 u64 *p_linear_size) 1946 { 1947 struct mlxsw_driver *driver = mlxsw_core->driver; 1948 1949 if (!driver->kvd_sizes_get) 1950 return -EINVAL; 1951 1952 return driver->kvd_sizes_get(mlxsw_core, profile, 1953 p_single_size, p_double_size, 1954 p_linear_size); 1955 } 1956 EXPORT_SYMBOL(mlxsw_core_kvd_sizes_get); 1957 1958 void mlxsw_core_fw_flash_start(struct mlxsw_core *mlxsw_core) 1959 { 1960 mlxsw_core->fw_flash_in_progress = true; 1961 } 1962 EXPORT_SYMBOL(mlxsw_core_fw_flash_start); 1963 1964 void mlxsw_core_fw_flash_end(struct mlxsw_core *mlxsw_core) 1965 { 1966 mlxsw_core->fw_flash_in_progress = false; 1967 } 1968 EXPORT_SYMBOL(mlxsw_core_fw_flash_end); 1969 1970 int mlxsw_core_resources_query(struct mlxsw_core *mlxsw_core, char *mbox, 1971 struct mlxsw_res *res) 1972 { 1973 int index, i; 1974 u64 data; 1975 u16 id; 1976 int err; 1977 1978 if (!res) 1979 return 0; 1980 1981 mlxsw_cmd_mbox_zero(mbox); 1982 1983 for (index = 0; index < MLXSW_CMD_QUERY_RESOURCES_MAX_QUERIES; 1984 index++) { 1985 err = mlxsw_cmd_query_resources(mlxsw_core, mbox, index); 1986 if (err) 1987 return err; 1988 1989 for (i = 0; i < MLXSW_CMD_QUERY_RESOURCES_PER_QUERY; i++) { 1990 id = mlxsw_cmd_mbox_query_resource_id_get(mbox, i); 1991 data = mlxsw_cmd_mbox_query_resource_data_get(mbox, i); 1992 1993 if (id == MLXSW_CMD_QUERY_RESOURCES_TABLE_END_ID) 1994 return 0; 1995 1996 mlxsw_res_parse(res, id, data); 1997 } 1998 } 1999 2000 /* If after MLXSW_RESOURCES_QUERY_MAX_QUERIES we still didn't get 2001 * MLXSW_RESOURCES_TABLE_END_ID, something went bad in the FW. 2002 */ 2003 return -EIO; 2004 } 2005 EXPORT_SYMBOL(mlxsw_core_resources_query); 2006 2007 static int __init mlxsw_core_module_init(void) 2008 { 2009 int err; 2010 2011 mlxsw_wq = alloc_workqueue(mlxsw_core_driver_name, 0, 0); 2012 if (!mlxsw_wq) 2013 return -ENOMEM; 2014 mlxsw_owq = alloc_ordered_workqueue("%s_ordered", 0, 2015 mlxsw_core_driver_name); 2016 if (!mlxsw_owq) { 2017 err = -ENOMEM; 2018 goto err_alloc_ordered_workqueue; 2019 } 2020 return 0; 2021 2022 err_alloc_ordered_workqueue: 2023 destroy_workqueue(mlxsw_wq); 2024 return err; 2025 } 2026 2027 static void __exit mlxsw_core_module_exit(void) 2028 { 2029 destroy_workqueue(mlxsw_owq); 2030 destroy_workqueue(mlxsw_wq); 2031 } 2032 2033 module_init(mlxsw_core_module_init); 2034 module_exit(mlxsw_core_module_exit); 2035 2036 MODULE_LICENSE("Dual BSD/GPL"); 2037 MODULE_AUTHOR("Jiri Pirko <jiri@mellanox.com>"); 2038 MODULE_DESCRIPTION("Mellanox switch device core driver"); 2039