1 // SPDX-License-Identifier: BSD-3-Clause OR GPL-2.0 2 /* Copyright (c) 2015-2018 Mellanox Technologies. All rights reserved */ 3 4 #include <linux/kernel.h> 5 #include <linux/module.h> 6 #include <linux/device.h> 7 #include <linux/export.h> 8 #include <linux/err.h> 9 #include <linux/if_link.h> 10 #include <linux/netdevice.h> 11 #include <linux/completion.h> 12 #include <linux/skbuff.h> 13 #include <linux/etherdevice.h> 14 #include <linux/types.h> 15 #include <linux/string.h> 16 #include <linux/gfp.h> 17 #include <linux/random.h> 18 #include <linux/jiffies.h> 19 #include <linux/mutex.h> 20 #include <linux/rcupdate.h> 21 #include <linux/slab.h> 22 #include <linux/workqueue.h> 23 #include <asm/byteorder.h> 24 #include <net/devlink.h> 25 #include <trace/events/devlink.h> 26 27 #include "core.h" 28 #include "item.h" 29 #include "cmd.h" 30 #include "port.h" 31 #include "trap.h" 32 #include "emad.h" 33 #include "reg.h" 34 #include "resources.h" 35 36 static LIST_HEAD(mlxsw_core_driver_list); 37 static DEFINE_SPINLOCK(mlxsw_core_driver_list_lock); 38 39 static const char mlxsw_core_driver_name[] = "mlxsw_core"; 40 41 static struct workqueue_struct *mlxsw_wq; 42 static struct workqueue_struct *mlxsw_owq; 43 44 struct mlxsw_core_port { 45 struct devlink_port devlink_port; 46 void *port_driver_priv; 47 u8 local_port; 48 }; 49 50 void *mlxsw_core_port_driver_priv(struct mlxsw_core_port *mlxsw_core_port) 51 { 52 return mlxsw_core_port->port_driver_priv; 53 } 54 EXPORT_SYMBOL(mlxsw_core_port_driver_priv); 55 56 static bool mlxsw_core_port_check(struct mlxsw_core_port *mlxsw_core_port) 57 { 58 return mlxsw_core_port->port_driver_priv != NULL; 59 } 60 61 struct mlxsw_core { 62 struct mlxsw_driver *driver; 63 const struct mlxsw_bus *bus; 64 void *bus_priv; 65 const struct mlxsw_bus_info *bus_info; 66 struct workqueue_struct *emad_wq; 67 struct list_head rx_listener_list; 68 struct list_head event_listener_list; 69 struct { 70 atomic64_t tid; 71 struct list_head trans_list; 72 spinlock_t trans_list_lock; /* protects trans_list writes */ 73 bool use_emad; 74 } emad; 75 struct { 76 u8 *mapping; /* lag_id+port_index to local_port mapping */ 77 } lag; 78 struct mlxsw_res res; 79 struct mlxsw_hwmon *hwmon; 80 struct mlxsw_thermal *thermal; 81 struct mlxsw_core_port *ports; 82 unsigned int max_ports; 83 bool reload_fail; 84 bool fw_flash_in_progress; 85 unsigned long driver_priv[0]; 86 /* driver_priv has to be always the last item */ 87 }; 88 89 #define MLXSW_PORT_MAX_PORTS_DEFAULT 0x40 90 91 static int mlxsw_ports_init(struct mlxsw_core *mlxsw_core) 92 { 93 /* Switch ports are numbered from 1 to queried value */ 94 if (MLXSW_CORE_RES_VALID(mlxsw_core, MAX_SYSTEM_PORT)) 95 mlxsw_core->max_ports = MLXSW_CORE_RES_GET(mlxsw_core, 96 MAX_SYSTEM_PORT) + 1; 97 else 98 mlxsw_core->max_ports = MLXSW_PORT_MAX_PORTS_DEFAULT + 1; 99 100 mlxsw_core->ports = kcalloc(mlxsw_core->max_ports, 101 sizeof(struct mlxsw_core_port), GFP_KERNEL); 102 if (!mlxsw_core->ports) 103 return -ENOMEM; 104 105 return 0; 106 } 107 108 static void mlxsw_ports_fini(struct mlxsw_core *mlxsw_core) 109 { 110 kfree(mlxsw_core->ports); 111 } 112 113 unsigned int mlxsw_core_max_ports(const struct mlxsw_core *mlxsw_core) 114 { 115 return mlxsw_core->max_ports; 116 } 117 EXPORT_SYMBOL(mlxsw_core_max_ports); 118 119 void *mlxsw_core_driver_priv(struct mlxsw_core *mlxsw_core) 120 { 121 return mlxsw_core->driver_priv; 122 } 123 EXPORT_SYMBOL(mlxsw_core_driver_priv); 124 125 struct mlxsw_rx_listener_item { 126 struct list_head list; 127 struct mlxsw_rx_listener rxl; 128 void *priv; 129 }; 130 131 struct mlxsw_event_listener_item { 132 struct list_head list; 133 struct mlxsw_event_listener el; 134 void *priv; 135 }; 136 137 /****************** 138 * EMAD processing 139 ******************/ 140 141 /* emad_eth_hdr_dmac 142 * Destination MAC in EMAD's Ethernet header. 143 * Must be set to 01:02:c9:00:00:01 144 */ 145 MLXSW_ITEM_BUF(emad, eth_hdr, dmac, 0x00, 6); 146 147 /* emad_eth_hdr_smac 148 * Source MAC in EMAD's Ethernet header. 149 * Must be set to 00:02:c9:01:02:03 150 */ 151 MLXSW_ITEM_BUF(emad, eth_hdr, smac, 0x06, 6); 152 153 /* emad_eth_hdr_ethertype 154 * Ethertype in EMAD's Ethernet header. 155 * Must be set to 0x8932 156 */ 157 MLXSW_ITEM32(emad, eth_hdr, ethertype, 0x0C, 16, 16); 158 159 /* emad_eth_hdr_mlx_proto 160 * Mellanox protocol. 161 * Must be set to 0x0. 162 */ 163 MLXSW_ITEM32(emad, eth_hdr, mlx_proto, 0x0C, 8, 8); 164 165 /* emad_eth_hdr_ver 166 * Mellanox protocol version. 167 * Must be set to 0x0. 168 */ 169 MLXSW_ITEM32(emad, eth_hdr, ver, 0x0C, 4, 4); 170 171 /* emad_op_tlv_type 172 * Type of the TLV. 173 * Must be set to 0x1 (operation TLV). 174 */ 175 MLXSW_ITEM32(emad, op_tlv, type, 0x00, 27, 5); 176 177 /* emad_op_tlv_len 178 * Length of the operation TLV in u32. 179 * Must be set to 0x4. 180 */ 181 MLXSW_ITEM32(emad, op_tlv, len, 0x00, 16, 11); 182 183 /* emad_op_tlv_dr 184 * Direct route bit. Setting to 1 indicates the EMAD is a direct route 185 * EMAD. DR TLV must follow. 186 * 187 * Note: Currently not supported and must not be set. 188 */ 189 MLXSW_ITEM32(emad, op_tlv, dr, 0x00, 15, 1); 190 191 /* emad_op_tlv_status 192 * Returned status in case of EMAD response. Must be set to 0 in case 193 * of EMAD request. 194 * 0x0 - success 195 * 0x1 - device is busy. Requester should retry 196 * 0x2 - Mellanox protocol version not supported 197 * 0x3 - unknown TLV 198 * 0x4 - register not supported 199 * 0x5 - operation class not supported 200 * 0x6 - EMAD method not supported 201 * 0x7 - bad parameter (e.g. port out of range) 202 * 0x8 - resource not available 203 * 0x9 - message receipt acknowledgment. Requester should retry 204 * 0x70 - internal error 205 */ 206 MLXSW_ITEM32(emad, op_tlv, status, 0x00, 8, 7); 207 208 /* emad_op_tlv_register_id 209 * Register ID of register within register TLV. 210 */ 211 MLXSW_ITEM32(emad, op_tlv, register_id, 0x04, 16, 16); 212 213 /* emad_op_tlv_r 214 * Response bit. Setting to 1 indicates Response, otherwise request. 215 */ 216 MLXSW_ITEM32(emad, op_tlv, r, 0x04, 15, 1); 217 218 /* emad_op_tlv_method 219 * EMAD method type. 220 * 0x1 - query 221 * 0x2 - write 222 * 0x3 - send (currently not supported) 223 * 0x4 - event 224 */ 225 MLXSW_ITEM32(emad, op_tlv, method, 0x04, 8, 7); 226 227 /* emad_op_tlv_class 228 * EMAD operation class. Must be set to 0x1 (REG_ACCESS). 229 */ 230 MLXSW_ITEM32(emad, op_tlv, class, 0x04, 0, 8); 231 232 /* emad_op_tlv_tid 233 * EMAD transaction ID. Used for pairing request and response EMADs. 234 */ 235 MLXSW_ITEM64(emad, op_tlv, tid, 0x08, 0, 64); 236 237 /* emad_reg_tlv_type 238 * Type of the TLV. 239 * Must be set to 0x3 (register TLV). 240 */ 241 MLXSW_ITEM32(emad, reg_tlv, type, 0x00, 27, 5); 242 243 /* emad_reg_tlv_len 244 * Length of the operation TLV in u32. 245 */ 246 MLXSW_ITEM32(emad, reg_tlv, len, 0x00, 16, 11); 247 248 /* emad_end_tlv_type 249 * Type of the TLV. 250 * Must be set to 0x0 (end TLV). 251 */ 252 MLXSW_ITEM32(emad, end_tlv, type, 0x00, 27, 5); 253 254 /* emad_end_tlv_len 255 * Length of the end TLV in u32. 256 * Must be set to 1. 257 */ 258 MLXSW_ITEM32(emad, end_tlv, len, 0x00, 16, 11); 259 260 enum mlxsw_core_reg_access_type { 261 MLXSW_CORE_REG_ACCESS_TYPE_QUERY, 262 MLXSW_CORE_REG_ACCESS_TYPE_WRITE, 263 }; 264 265 static inline const char * 266 mlxsw_core_reg_access_type_str(enum mlxsw_core_reg_access_type type) 267 { 268 switch (type) { 269 case MLXSW_CORE_REG_ACCESS_TYPE_QUERY: 270 return "query"; 271 case MLXSW_CORE_REG_ACCESS_TYPE_WRITE: 272 return "write"; 273 } 274 BUG(); 275 } 276 277 static void mlxsw_emad_pack_end_tlv(char *end_tlv) 278 { 279 mlxsw_emad_end_tlv_type_set(end_tlv, MLXSW_EMAD_TLV_TYPE_END); 280 mlxsw_emad_end_tlv_len_set(end_tlv, MLXSW_EMAD_END_TLV_LEN); 281 } 282 283 static void mlxsw_emad_pack_reg_tlv(char *reg_tlv, 284 const struct mlxsw_reg_info *reg, 285 char *payload) 286 { 287 mlxsw_emad_reg_tlv_type_set(reg_tlv, MLXSW_EMAD_TLV_TYPE_REG); 288 mlxsw_emad_reg_tlv_len_set(reg_tlv, reg->len / sizeof(u32) + 1); 289 memcpy(reg_tlv + sizeof(u32), payload, reg->len); 290 } 291 292 static void mlxsw_emad_pack_op_tlv(char *op_tlv, 293 const struct mlxsw_reg_info *reg, 294 enum mlxsw_core_reg_access_type type, 295 u64 tid) 296 { 297 mlxsw_emad_op_tlv_type_set(op_tlv, MLXSW_EMAD_TLV_TYPE_OP); 298 mlxsw_emad_op_tlv_len_set(op_tlv, MLXSW_EMAD_OP_TLV_LEN); 299 mlxsw_emad_op_tlv_dr_set(op_tlv, 0); 300 mlxsw_emad_op_tlv_status_set(op_tlv, 0); 301 mlxsw_emad_op_tlv_register_id_set(op_tlv, reg->id); 302 mlxsw_emad_op_tlv_r_set(op_tlv, MLXSW_EMAD_OP_TLV_REQUEST); 303 if (type == MLXSW_CORE_REG_ACCESS_TYPE_QUERY) 304 mlxsw_emad_op_tlv_method_set(op_tlv, 305 MLXSW_EMAD_OP_TLV_METHOD_QUERY); 306 else 307 mlxsw_emad_op_tlv_method_set(op_tlv, 308 MLXSW_EMAD_OP_TLV_METHOD_WRITE); 309 mlxsw_emad_op_tlv_class_set(op_tlv, 310 MLXSW_EMAD_OP_TLV_CLASS_REG_ACCESS); 311 mlxsw_emad_op_tlv_tid_set(op_tlv, tid); 312 } 313 314 static int mlxsw_emad_construct_eth_hdr(struct sk_buff *skb) 315 { 316 char *eth_hdr = skb_push(skb, MLXSW_EMAD_ETH_HDR_LEN); 317 318 mlxsw_emad_eth_hdr_dmac_memcpy_to(eth_hdr, MLXSW_EMAD_EH_DMAC); 319 mlxsw_emad_eth_hdr_smac_memcpy_to(eth_hdr, MLXSW_EMAD_EH_SMAC); 320 mlxsw_emad_eth_hdr_ethertype_set(eth_hdr, MLXSW_EMAD_EH_ETHERTYPE); 321 mlxsw_emad_eth_hdr_mlx_proto_set(eth_hdr, MLXSW_EMAD_EH_MLX_PROTO); 322 mlxsw_emad_eth_hdr_ver_set(eth_hdr, MLXSW_EMAD_EH_PROTO_VERSION); 323 324 skb_reset_mac_header(skb); 325 326 return 0; 327 } 328 329 static void mlxsw_emad_construct(struct sk_buff *skb, 330 const struct mlxsw_reg_info *reg, 331 char *payload, 332 enum mlxsw_core_reg_access_type type, 333 u64 tid) 334 { 335 char *buf; 336 337 buf = skb_push(skb, MLXSW_EMAD_END_TLV_LEN * sizeof(u32)); 338 mlxsw_emad_pack_end_tlv(buf); 339 340 buf = skb_push(skb, reg->len + sizeof(u32)); 341 mlxsw_emad_pack_reg_tlv(buf, reg, payload); 342 343 buf = skb_push(skb, MLXSW_EMAD_OP_TLV_LEN * sizeof(u32)); 344 mlxsw_emad_pack_op_tlv(buf, reg, type, tid); 345 346 mlxsw_emad_construct_eth_hdr(skb); 347 } 348 349 static char *mlxsw_emad_op_tlv(const struct sk_buff *skb) 350 { 351 return ((char *) (skb->data + MLXSW_EMAD_ETH_HDR_LEN)); 352 } 353 354 static char *mlxsw_emad_reg_tlv(const struct sk_buff *skb) 355 { 356 return ((char *) (skb->data + MLXSW_EMAD_ETH_HDR_LEN + 357 MLXSW_EMAD_OP_TLV_LEN * sizeof(u32))); 358 } 359 360 static char *mlxsw_emad_reg_payload(const char *op_tlv) 361 { 362 return ((char *) (op_tlv + (MLXSW_EMAD_OP_TLV_LEN + 1) * sizeof(u32))); 363 } 364 365 static u64 mlxsw_emad_get_tid(const struct sk_buff *skb) 366 { 367 char *op_tlv; 368 369 op_tlv = mlxsw_emad_op_tlv(skb); 370 return mlxsw_emad_op_tlv_tid_get(op_tlv); 371 } 372 373 static bool mlxsw_emad_is_resp(const struct sk_buff *skb) 374 { 375 char *op_tlv; 376 377 op_tlv = mlxsw_emad_op_tlv(skb); 378 return (mlxsw_emad_op_tlv_r_get(op_tlv) == MLXSW_EMAD_OP_TLV_RESPONSE); 379 } 380 381 static int mlxsw_emad_process_status(char *op_tlv, 382 enum mlxsw_emad_op_tlv_status *p_status) 383 { 384 *p_status = mlxsw_emad_op_tlv_status_get(op_tlv); 385 386 switch (*p_status) { 387 case MLXSW_EMAD_OP_TLV_STATUS_SUCCESS: 388 return 0; 389 case MLXSW_EMAD_OP_TLV_STATUS_BUSY: 390 case MLXSW_EMAD_OP_TLV_STATUS_MESSAGE_RECEIPT_ACK: 391 return -EAGAIN; 392 case MLXSW_EMAD_OP_TLV_STATUS_VERSION_NOT_SUPPORTED: 393 case MLXSW_EMAD_OP_TLV_STATUS_UNKNOWN_TLV: 394 case MLXSW_EMAD_OP_TLV_STATUS_REGISTER_NOT_SUPPORTED: 395 case MLXSW_EMAD_OP_TLV_STATUS_CLASS_NOT_SUPPORTED: 396 case MLXSW_EMAD_OP_TLV_STATUS_METHOD_NOT_SUPPORTED: 397 case MLXSW_EMAD_OP_TLV_STATUS_BAD_PARAMETER: 398 case MLXSW_EMAD_OP_TLV_STATUS_RESOURCE_NOT_AVAILABLE: 399 case MLXSW_EMAD_OP_TLV_STATUS_INTERNAL_ERROR: 400 default: 401 return -EIO; 402 } 403 } 404 405 static int 406 mlxsw_emad_process_status_skb(struct sk_buff *skb, 407 enum mlxsw_emad_op_tlv_status *p_status) 408 { 409 return mlxsw_emad_process_status(mlxsw_emad_op_tlv(skb), p_status); 410 } 411 412 struct mlxsw_reg_trans { 413 struct list_head list; 414 struct list_head bulk_list; 415 struct mlxsw_core *core; 416 struct sk_buff *tx_skb; 417 struct mlxsw_tx_info tx_info; 418 struct delayed_work timeout_dw; 419 unsigned int retries; 420 u64 tid; 421 struct completion completion; 422 atomic_t active; 423 mlxsw_reg_trans_cb_t *cb; 424 unsigned long cb_priv; 425 const struct mlxsw_reg_info *reg; 426 enum mlxsw_core_reg_access_type type; 427 int err; 428 enum mlxsw_emad_op_tlv_status emad_status; 429 struct rcu_head rcu; 430 }; 431 432 #define MLXSW_EMAD_TIMEOUT_DURING_FW_FLASH_MS 3000 433 #define MLXSW_EMAD_TIMEOUT_MS 200 434 435 static void mlxsw_emad_trans_timeout_schedule(struct mlxsw_reg_trans *trans) 436 { 437 unsigned long timeout = msecs_to_jiffies(MLXSW_EMAD_TIMEOUT_MS); 438 439 if (trans->core->fw_flash_in_progress) 440 timeout = msecs_to_jiffies(MLXSW_EMAD_TIMEOUT_DURING_FW_FLASH_MS); 441 442 queue_delayed_work(trans->core->emad_wq, &trans->timeout_dw, timeout); 443 } 444 445 static int mlxsw_emad_transmit(struct mlxsw_core *mlxsw_core, 446 struct mlxsw_reg_trans *trans) 447 { 448 struct sk_buff *skb; 449 int err; 450 451 skb = skb_copy(trans->tx_skb, GFP_KERNEL); 452 if (!skb) 453 return -ENOMEM; 454 455 trace_devlink_hwmsg(priv_to_devlink(mlxsw_core), false, 0, 456 skb->data + mlxsw_core->driver->txhdr_len, 457 skb->len - mlxsw_core->driver->txhdr_len); 458 459 atomic_set(&trans->active, 1); 460 err = mlxsw_core_skb_transmit(mlxsw_core, skb, &trans->tx_info); 461 if (err) { 462 dev_kfree_skb(skb); 463 return err; 464 } 465 mlxsw_emad_trans_timeout_schedule(trans); 466 return 0; 467 } 468 469 static void mlxsw_emad_trans_finish(struct mlxsw_reg_trans *trans, int err) 470 { 471 struct mlxsw_core *mlxsw_core = trans->core; 472 473 dev_kfree_skb(trans->tx_skb); 474 spin_lock_bh(&mlxsw_core->emad.trans_list_lock); 475 list_del_rcu(&trans->list); 476 spin_unlock_bh(&mlxsw_core->emad.trans_list_lock); 477 trans->err = err; 478 complete(&trans->completion); 479 } 480 481 static void mlxsw_emad_transmit_retry(struct mlxsw_core *mlxsw_core, 482 struct mlxsw_reg_trans *trans) 483 { 484 int err; 485 486 if (trans->retries < MLXSW_EMAD_MAX_RETRY) { 487 trans->retries++; 488 err = mlxsw_emad_transmit(trans->core, trans); 489 if (err == 0) 490 return; 491 } else { 492 err = -EIO; 493 } 494 mlxsw_emad_trans_finish(trans, err); 495 } 496 497 static void mlxsw_emad_trans_timeout_work(struct work_struct *work) 498 { 499 struct mlxsw_reg_trans *trans = container_of(work, 500 struct mlxsw_reg_trans, 501 timeout_dw.work); 502 503 if (!atomic_dec_and_test(&trans->active)) 504 return; 505 506 mlxsw_emad_transmit_retry(trans->core, trans); 507 } 508 509 static void mlxsw_emad_process_response(struct mlxsw_core *mlxsw_core, 510 struct mlxsw_reg_trans *trans, 511 struct sk_buff *skb) 512 { 513 int err; 514 515 if (!atomic_dec_and_test(&trans->active)) 516 return; 517 518 err = mlxsw_emad_process_status_skb(skb, &trans->emad_status); 519 if (err == -EAGAIN) { 520 mlxsw_emad_transmit_retry(mlxsw_core, trans); 521 } else { 522 if (err == 0) { 523 char *op_tlv = mlxsw_emad_op_tlv(skb); 524 525 if (trans->cb) 526 trans->cb(mlxsw_core, 527 mlxsw_emad_reg_payload(op_tlv), 528 trans->reg->len, trans->cb_priv); 529 } 530 mlxsw_emad_trans_finish(trans, err); 531 } 532 } 533 534 /* called with rcu read lock held */ 535 static void mlxsw_emad_rx_listener_func(struct sk_buff *skb, u8 local_port, 536 void *priv) 537 { 538 struct mlxsw_core *mlxsw_core = priv; 539 struct mlxsw_reg_trans *trans; 540 541 trace_devlink_hwmsg(priv_to_devlink(mlxsw_core), true, 0, 542 skb->data, skb->len); 543 544 if (!mlxsw_emad_is_resp(skb)) 545 goto free_skb; 546 547 list_for_each_entry_rcu(trans, &mlxsw_core->emad.trans_list, list) { 548 if (mlxsw_emad_get_tid(skb) == trans->tid) { 549 mlxsw_emad_process_response(mlxsw_core, trans, skb); 550 break; 551 } 552 } 553 554 free_skb: 555 dev_kfree_skb(skb); 556 } 557 558 static const struct mlxsw_listener mlxsw_emad_rx_listener = 559 MLXSW_RXL(mlxsw_emad_rx_listener_func, ETHEMAD, TRAP_TO_CPU, false, 560 EMAD, DISCARD); 561 562 static int mlxsw_emad_init(struct mlxsw_core *mlxsw_core) 563 { 564 struct workqueue_struct *emad_wq; 565 u64 tid; 566 int err; 567 568 if (!(mlxsw_core->bus->features & MLXSW_BUS_F_TXRX)) 569 return 0; 570 571 emad_wq = alloc_workqueue("mlxsw_core_emad", 0, 0); 572 if (!emad_wq) 573 return -ENOMEM; 574 mlxsw_core->emad_wq = emad_wq; 575 576 /* Set the upper 32 bits of the transaction ID field to a random 577 * number. This allows us to discard EMADs addressed to other 578 * devices. 579 */ 580 get_random_bytes(&tid, 4); 581 tid <<= 32; 582 atomic64_set(&mlxsw_core->emad.tid, tid); 583 584 INIT_LIST_HEAD(&mlxsw_core->emad.trans_list); 585 spin_lock_init(&mlxsw_core->emad.trans_list_lock); 586 587 err = mlxsw_core_trap_register(mlxsw_core, &mlxsw_emad_rx_listener, 588 mlxsw_core); 589 if (err) 590 return err; 591 592 err = mlxsw_core->driver->basic_trap_groups_set(mlxsw_core); 593 if (err) 594 goto err_emad_trap_set; 595 mlxsw_core->emad.use_emad = true; 596 597 return 0; 598 599 err_emad_trap_set: 600 mlxsw_core_trap_unregister(mlxsw_core, &mlxsw_emad_rx_listener, 601 mlxsw_core); 602 destroy_workqueue(mlxsw_core->emad_wq); 603 return err; 604 } 605 606 static void mlxsw_emad_fini(struct mlxsw_core *mlxsw_core) 607 { 608 609 if (!(mlxsw_core->bus->features & MLXSW_BUS_F_TXRX)) 610 return; 611 612 mlxsw_core->emad.use_emad = false; 613 mlxsw_core_trap_unregister(mlxsw_core, &mlxsw_emad_rx_listener, 614 mlxsw_core); 615 destroy_workqueue(mlxsw_core->emad_wq); 616 } 617 618 static struct sk_buff *mlxsw_emad_alloc(const struct mlxsw_core *mlxsw_core, 619 u16 reg_len) 620 { 621 struct sk_buff *skb; 622 u16 emad_len; 623 624 emad_len = (reg_len + sizeof(u32) + MLXSW_EMAD_ETH_HDR_LEN + 625 (MLXSW_EMAD_OP_TLV_LEN + MLXSW_EMAD_END_TLV_LEN) * 626 sizeof(u32) + mlxsw_core->driver->txhdr_len); 627 if (emad_len > MLXSW_EMAD_MAX_FRAME_LEN) 628 return NULL; 629 630 skb = netdev_alloc_skb(NULL, emad_len); 631 if (!skb) 632 return NULL; 633 memset(skb->data, 0, emad_len); 634 skb_reserve(skb, emad_len); 635 636 return skb; 637 } 638 639 static int mlxsw_emad_reg_access(struct mlxsw_core *mlxsw_core, 640 const struct mlxsw_reg_info *reg, 641 char *payload, 642 enum mlxsw_core_reg_access_type type, 643 struct mlxsw_reg_trans *trans, 644 struct list_head *bulk_list, 645 mlxsw_reg_trans_cb_t *cb, 646 unsigned long cb_priv, u64 tid) 647 { 648 struct sk_buff *skb; 649 int err; 650 651 dev_dbg(mlxsw_core->bus_info->dev, "EMAD reg access (tid=%llx,reg_id=%x(%s),type=%s)\n", 652 tid, reg->id, mlxsw_reg_id_str(reg->id), 653 mlxsw_core_reg_access_type_str(type)); 654 655 skb = mlxsw_emad_alloc(mlxsw_core, reg->len); 656 if (!skb) 657 return -ENOMEM; 658 659 list_add_tail(&trans->bulk_list, bulk_list); 660 trans->core = mlxsw_core; 661 trans->tx_skb = skb; 662 trans->tx_info.local_port = MLXSW_PORT_CPU_PORT; 663 trans->tx_info.is_emad = true; 664 INIT_DELAYED_WORK(&trans->timeout_dw, mlxsw_emad_trans_timeout_work); 665 trans->tid = tid; 666 init_completion(&trans->completion); 667 trans->cb = cb; 668 trans->cb_priv = cb_priv; 669 trans->reg = reg; 670 trans->type = type; 671 672 mlxsw_emad_construct(skb, reg, payload, type, trans->tid); 673 mlxsw_core->driver->txhdr_construct(skb, &trans->tx_info); 674 675 spin_lock_bh(&mlxsw_core->emad.trans_list_lock); 676 list_add_tail_rcu(&trans->list, &mlxsw_core->emad.trans_list); 677 spin_unlock_bh(&mlxsw_core->emad.trans_list_lock); 678 err = mlxsw_emad_transmit(mlxsw_core, trans); 679 if (err) 680 goto err_out; 681 return 0; 682 683 err_out: 684 spin_lock_bh(&mlxsw_core->emad.trans_list_lock); 685 list_del_rcu(&trans->list); 686 spin_unlock_bh(&mlxsw_core->emad.trans_list_lock); 687 list_del(&trans->bulk_list); 688 dev_kfree_skb(trans->tx_skb); 689 return err; 690 } 691 692 /***************** 693 * Core functions 694 *****************/ 695 696 int mlxsw_core_driver_register(struct mlxsw_driver *mlxsw_driver) 697 { 698 spin_lock(&mlxsw_core_driver_list_lock); 699 list_add_tail(&mlxsw_driver->list, &mlxsw_core_driver_list); 700 spin_unlock(&mlxsw_core_driver_list_lock); 701 return 0; 702 } 703 EXPORT_SYMBOL(mlxsw_core_driver_register); 704 705 void mlxsw_core_driver_unregister(struct mlxsw_driver *mlxsw_driver) 706 { 707 spin_lock(&mlxsw_core_driver_list_lock); 708 list_del(&mlxsw_driver->list); 709 spin_unlock(&mlxsw_core_driver_list_lock); 710 } 711 EXPORT_SYMBOL(mlxsw_core_driver_unregister); 712 713 static struct mlxsw_driver *__driver_find(const char *kind) 714 { 715 struct mlxsw_driver *mlxsw_driver; 716 717 list_for_each_entry(mlxsw_driver, &mlxsw_core_driver_list, list) { 718 if (strcmp(mlxsw_driver->kind, kind) == 0) 719 return mlxsw_driver; 720 } 721 return NULL; 722 } 723 724 static struct mlxsw_driver *mlxsw_core_driver_get(const char *kind) 725 { 726 struct mlxsw_driver *mlxsw_driver; 727 728 spin_lock(&mlxsw_core_driver_list_lock); 729 mlxsw_driver = __driver_find(kind); 730 spin_unlock(&mlxsw_core_driver_list_lock); 731 return mlxsw_driver; 732 } 733 734 static int mlxsw_devlink_port_split(struct devlink *devlink, 735 unsigned int port_index, 736 unsigned int count, 737 struct netlink_ext_ack *extack) 738 { 739 struct mlxsw_core *mlxsw_core = devlink_priv(devlink); 740 741 if (port_index >= mlxsw_core->max_ports) { 742 NL_SET_ERR_MSG_MOD(extack, "Port index exceeds maximum number of ports"); 743 return -EINVAL; 744 } 745 if (!mlxsw_core->driver->port_split) 746 return -EOPNOTSUPP; 747 return mlxsw_core->driver->port_split(mlxsw_core, port_index, count, 748 extack); 749 } 750 751 static int mlxsw_devlink_port_unsplit(struct devlink *devlink, 752 unsigned int port_index, 753 struct netlink_ext_ack *extack) 754 { 755 struct mlxsw_core *mlxsw_core = devlink_priv(devlink); 756 757 if (port_index >= mlxsw_core->max_ports) { 758 NL_SET_ERR_MSG_MOD(extack, "Port index exceeds maximum number of ports"); 759 return -EINVAL; 760 } 761 if (!mlxsw_core->driver->port_unsplit) 762 return -EOPNOTSUPP; 763 return mlxsw_core->driver->port_unsplit(mlxsw_core, port_index, 764 extack); 765 } 766 767 static int 768 mlxsw_devlink_sb_pool_get(struct devlink *devlink, 769 unsigned int sb_index, u16 pool_index, 770 struct devlink_sb_pool_info *pool_info) 771 { 772 struct mlxsw_core *mlxsw_core = devlink_priv(devlink); 773 struct mlxsw_driver *mlxsw_driver = mlxsw_core->driver; 774 775 if (!mlxsw_driver->sb_pool_get) 776 return -EOPNOTSUPP; 777 return mlxsw_driver->sb_pool_get(mlxsw_core, sb_index, 778 pool_index, pool_info); 779 } 780 781 static int 782 mlxsw_devlink_sb_pool_set(struct devlink *devlink, 783 unsigned int sb_index, u16 pool_index, u32 size, 784 enum devlink_sb_threshold_type threshold_type) 785 { 786 struct mlxsw_core *mlxsw_core = devlink_priv(devlink); 787 struct mlxsw_driver *mlxsw_driver = mlxsw_core->driver; 788 789 if (!mlxsw_driver->sb_pool_set) 790 return -EOPNOTSUPP; 791 return mlxsw_driver->sb_pool_set(mlxsw_core, sb_index, 792 pool_index, size, threshold_type); 793 } 794 795 static void *__dl_port(struct devlink_port *devlink_port) 796 { 797 return container_of(devlink_port, struct mlxsw_core_port, devlink_port); 798 } 799 800 static int mlxsw_devlink_port_type_set(struct devlink_port *devlink_port, 801 enum devlink_port_type port_type) 802 { 803 struct mlxsw_core *mlxsw_core = devlink_priv(devlink_port->devlink); 804 struct mlxsw_driver *mlxsw_driver = mlxsw_core->driver; 805 struct mlxsw_core_port *mlxsw_core_port = __dl_port(devlink_port); 806 807 if (!mlxsw_driver->port_type_set) 808 return -EOPNOTSUPP; 809 810 return mlxsw_driver->port_type_set(mlxsw_core, 811 mlxsw_core_port->local_port, 812 port_type); 813 } 814 815 static int mlxsw_devlink_sb_port_pool_get(struct devlink_port *devlink_port, 816 unsigned int sb_index, u16 pool_index, 817 u32 *p_threshold) 818 { 819 struct mlxsw_core *mlxsw_core = devlink_priv(devlink_port->devlink); 820 struct mlxsw_driver *mlxsw_driver = mlxsw_core->driver; 821 struct mlxsw_core_port *mlxsw_core_port = __dl_port(devlink_port); 822 823 if (!mlxsw_driver->sb_port_pool_get || 824 !mlxsw_core_port_check(mlxsw_core_port)) 825 return -EOPNOTSUPP; 826 return mlxsw_driver->sb_port_pool_get(mlxsw_core_port, sb_index, 827 pool_index, p_threshold); 828 } 829 830 static int mlxsw_devlink_sb_port_pool_set(struct devlink_port *devlink_port, 831 unsigned int sb_index, u16 pool_index, 832 u32 threshold) 833 { 834 struct mlxsw_core *mlxsw_core = devlink_priv(devlink_port->devlink); 835 struct mlxsw_driver *mlxsw_driver = mlxsw_core->driver; 836 struct mlxsw_core_port *mlxsw_core_port = __dl_port(devlink_port); 837 838 if (!mlxsw_driver->sb_port_pool_set || 839 !mlxsw_core_port_check(mlxsw_core_port)) 840 return -EOPNOTSUPP; 841 return mlxsw_driver->sb_port_pool_set(mlxsw_core_port, sb_index, 842 pool_index, threshold); 843 } 844 845 static int 846 mlxsw_devlink_sb_tc_pool_bind_get(struct devlink_port *devlink_port, 847 unsigned int sb_index, u16 tc_index, 848 enum devlink_sb_pool_type pool_type, 849 u16 *p_pool_index, u32 *p_threshold) 850 { 851 struct mlxsw_core *mlxsw_core = devlink_priv(devlink_port->devlink); 852 struct mlxsw_driver *mlxsw_driver = mlxsw_core->driver; 853 struct mlxsw_core_port *mlxsw_core_port = __dl_port(devlink_port); 854 855 if (!mlxsw_driver->sb_tc_pool_bind_get || 856 !mlxsw_core_port_check(mlxsw_core_port)) 857 return -EOPNOTSUPP; 858 return mlxsw_driver->sb_tc_pool_bind_get(mlxsw_core_port, sb_index, 859 tc_index, pool_type, 860 p_pool_index, p_threshold); 861 } 862 863 static int 864 mlxsw_devlink_sb_tc_pool_bind_set(struct devlink_port *devlink_port, 865 unsigned int sb_index, u16 tc_index, 866 enum devlink_sb_pool_type pool_type, 867 u16 pool_index, u32 threshold) 868 { 869 struct mlxsw_core *mlxsw_core = devlink_priv(devlink_port->devlink); 870 struct mlxsw_driver *mlxsw_driver = mlxsw_core->driver; 871 struct mlxsw_core_port *mlxsw_core_port = __dl_port(devlink_port); 872 873 if (!mlxsw_driver->sb_tc_pool_bind_set || 874 !mlxsw_core_port_check(mlxsw_core_port)) 875 return -EOPNOTSUPP; 876 return mlxsw_driver->sb_tc_pool_bind_set(mlxsw_core_port, sb_index, 877 tc_index, pool_type, 878 pool_index, threshold); 879 } 880 881 static int mlxsw_devlink_sb_occ_snapshot(struct devlink *devlink, 882 unsigned int sb_index) 883 { 884 struct mlxsw_core *mlxsw_core = devlink_priv(devlink); 885 struct mlxsw_driver *mlxsw_driver = mlxsw_core->driver; 886 887 if (!mlxsw_driver->sb_occ_snapshot) 888 return -EOPNOTSUPP; 889 return mlxsw_driver->sb_occ_snapshot(mlxsw_core, sb_index); 890 } 891 892 static int mlxsw_devlink_sb_occ_max_clear(struct devlink *devlink, 893 unsigned int sb_index) 894 { 895 struct mlxsw_core *mlxsw_core = devlink_priv(devlink); 896 struct mlxsw_driver *mlxsw_driver = mlxsw_core->driver; 897 898 if (!mlxsw_driver->sb_occ_max_clear) 899 return -EOPNOTSUPP; 900 return mlxsw_driver->sb_occ_max_clear(mlxsw_core, sb_index); 901 } 902 903 static int 904 mlxsw_devlink_sb_occ_port_pool_get(struct devlink_port *devlink_port, 905 unsigned int sb_index, u16 pool_index, 906 u32 *p_cur, u32 *p_max) 907 { 908 struct mlxsw_core *mlxsw_core = devlink_priv(devlink_port->devlink); 909 struct mlxsw_driver *mlxsw_driver = mlxsw_core->driver; 910 struct mlxsw_core_port *mlxsw_core_port = __dl_port(devlink_port); 911 912 if (!mlxsw_driver->sb_occ_port_pool_get || 913 !mlxsw_core_port_check(mlxsw_core_port)) 914 return -EOPNOTSUPP; 915 return mlxsw_driver->sb_occ_port_pool_get(mlxsw_core_port, sb_index, 916 pool_index, p_cur, p_max); 917 } 918 919 static int 920 mlxsw_devlink_sb_occ_tc_port_bind_get(struct devlink_port *devlink_port, 921 unsigned int sb_index, u16 tc_index, 922 enum devlink_sb_pool_type pool_type, 923 u32 *p_cur, u32 *p_max) 924 { 925 struct mlxsw_core *mlxsw_core = devlink_priv(devlink_port->devlink); 926 struct mlxsw_driver *mlxsw_driver = mlxsw_core->driver; 927 struct mlxsw_core_port *mlxsw_core_port = __dl_port(devlink_port); 928 929 if (!mlxsw_driver->sb_occ_tc_port_bind_get || 930 !mlxsw_core_port_check(mlxsw_core_port)) 931 return -EOPNOTSUPP; 932 return mlxsw_driver->sb_occ_tc_port_bind_get(mlxsw_core_port, 933 sb_index, tc_index, 934 pool_type, p_cur, p_max); 935 } 936 937 static int 938 mlxsw_devlink_info_get(struct devlink *devlink, struct devlink_info_req *req, 939 struct netlink_ext_ack *extack) 940 { 941 struct mlxsw_core *mlxsw_core = devlink_priv(devlink); 942 char fw_info_psid[MLXSW_REG_MGIR_FW_INFO_PSID_SIZE]; 943 u32 hw_rev, fw_major, fw_minor, fw_sub_minor; 944 char mgir_pl[MLXSW_REG_MGIR_LEN]; 945 char buf[32]; 946 int err; 947 948 err = devlink_info_driver_name_put(req, 949 mlxsw_core->bus_info->device_kind); 950 if (err) 951 return err; 952 953 mlxsw_reg_mgir_pack(mgir_pl); 954 err = mlxsw_reg_query(mlxsw_core, MLXSW_REG(mgir), mgir_pl); 955 if (err) 956 return err; 957 mlxsw_reg_mgir_unpack(mgir_pl, &hw_rev, fw_info_psid, &fw_major, 958 &fw_minor, &fw_sub_minor); 959 960 sprintf(buf, "%X", hw_rev); 961 err = devlink_info_version_fixed_put(req, "hw.revision", buf); 962 if (err) 963 return err; 964 965 err = devlink_info_version_fixed_put(req, "fw.psid", fw_info_psid); 966 if (err) 967 return err; 968 969 sprintf(buf, "%d.%d.%d", fw_major, fw_minor, fw_sub_minor); 970 err = devlink_info_version_running_put(req, "fw.version", buf); 971 if (err) 972 return err; 973 974 return 0; 975 } 976 977 static int mlxsw_devlink_core_bus_device_reload(struct devlink *devlink, 978 struct netlink_ext_ack *extack) 979 { 980 struct mlxsw_core *mlxsw_core = devlink_priv(devlink); 981 int err; 982 983 if (!(mlxsw_core->bus->features & MLXSW_BUS_F_RESET)) 984 return -EOPNOTSUPP; 985 986 mlxsw_core_bus_device_unregister(mlxsw_core, true); 987 err = mlxsw_core_bus_device_register(mlxsw_core->bus_info, 988 mlxsw_core->bus, 989 mlxsw_core->bus_priv, true, 990 devlink); 991 mlxsw_core->reload_fail = !!err; 992 993 return err; 994 } 995 996 static const struct devlink_ops mlxsw_devlink_ops = { 997 .reload = mlxsw_devlink_core_bus_device_reload, 998 .port_type_set = mlxsw_devlink_port_type_set, 999 .port_split = mlxsw_devlink_port_split, 1000 .port_unsplit = mlxsw_devlink_port_unsplit, 1001 .sb_pool_get = mlxsw_devlink_sb_pool_get, 1002 .sb_pool_set = mlxsw_devlink_sb_pool_set, 1003 .sb_port_pool_get = mlxsw_devlink_sb_port_pool_get, 1004 .sb_port_pool_set = mlxsw_devlink_sb_port_pool_set, 1005 .sb_tc_pool_bind_get = mlxsw_devlink_sb_tc_pool_bind_get, 1006 .sb_tc_pool_bind_set = mlxsw_devlink_sb_tc_pool_bind_set, 1007 .sb_occ_snapshot = mlxsw_devlink_sb_occ_snapshot, 1008 .sb_occ_max_clear = mlxsw_devlink_sb_occ_max_clear, 1009 .sb_occ_port_pool_get = mlxsw_devlink_sb_occ_port_pool_get, 1010 .sb_occ_tc_port_bind_get = mlxsw_devlink_sb_occ_tc_port_bind_get, 1011 .info_get = mlxsw_devlink_info_get, 1012 }; 1013 1014 static int 1015 __mlxsw_core_bus_device_register(const struct mlxsw_bus_info *mlxsw_bus_info, 1016 const struct mlxsw_bus *mlxsw_bus, 1017 void *bus_priv, bool reload, 1018 struct devlink *devlink) 1019 { 1020 const char *device_kind = mlxsw_bus_info->device_kind; 1021 struct mlxsw_core *mlxsw_core; 1022 struct mlxsw_driver *mlxsw_driver; 1023 struct mlxsw_res *res; 1024 size_t alloc_size; 1025 int err; 1026 1027 mlxsw_driver = mlxsw_core_driver_get(device_kind); 1028 if (!mlxsw_driver) 1029 return -EINVAL; 1030 1031 if (!reload) { 1032 alloc_size = sizeof(*mlxsw_core) + mlxsw_driver->priv_size; 1033 devlink = devlink_alloc(&mlxsw_devlink_ops, alloc_size); 1034 if (!devlink) { 1035 err = -ENOMEM; 1036 goto err_devlink_alloc; 1037 } 1038 } 1039 1040 mlxsw_core = devlink_priv(devlink); 1041 INIT_LIST_HEAD(&mlxsw_core->rx_listener_list); 1042 INIT_LIST_HEAD(&mlxsw_core->event_listener_list); 1043 mlxsw_core->driver = mlxsw_driver; 1044 mlxsw_core->bus = mlxsw_bus; 1045 mlxsw_core->bus_priv = bus_priv; 1046 mlxsw_core->bus_info = mlxsw_bus_info; 1047 1048 res = mlxsw_driver->res_query_enabled ? &mlxsw_core->res : NULL; 1049 err = mlxsw_bus->init(bus_priv, mlxsw_core, mlxsw_driver->profile, res); 1050 if (err) 1051 goto err_bus_init; 1052 1053 if (mlxsw_driver->resources_register && !reload) { 1054 err = mlxsw_driver->resources_register(mlxsw_core); 1055 if (err) 1056 goto err_register_resources; 1057 } 1058 1059 err = mlxsw_ports_init(mlxsw_core); 1060 if (err) 1061 goto err_ports_init; 1062 1063 if (MLXSW_CORE_RES_VALID(mlxsw_core, MAX_LAG) && 1064 MLXSW_CORE_RES_VALID(mlxsw_core, MAX_LAG_MEMBERS)) { 1065 alloc_size = sizeof(u8) * 1066 MLXSW_CORE_RES_GET(mlxsw_core, MAX_LAG) * 1067 MLXSW_CORE_RES_GET(mlxsw_core, MAX_LAG_MEMBERS); 1068 mlxsw_core->lag.mapping = kzalloc(alloc_size, GFP_KERNEL); 1069 if (!mlxsw_core->lag.mapping) { 1070 err = -ENOMEM; 1071 goto err_alloc_lag_mapping; 1072 } 1073 } 1074 1075 err = mlxsw_emad_init(mlxsw_core); 1076 if (err) 1077 goto err_emad_init; 1078 1079 if (!reload) { 1080 err = devlink_register(devlink, mlxsw_bus_info->dev); 1081 if (err) 1082 goto err_devlink_register; 1083 } 1084 1085 if (mlxsw_driver->params_register && !reload) { 1086 err = mlxsw_driver->params_register(mlxsw_core); 1087 if (err) 1088 goto err_register_params; 1089 } 1090 1091 err = mlxsw_hwmon_init(mlxsw_core, mlxsw_bus_info, &mlxsw_core->hwmon); 1092 if (err) 1093 goto err_hwmon_init; 1094 1095 err = mlxsw_thermal_init(mlxsw_core, mlxsw_bus_info, 1096 &mlxsw_core->thermal); 1097 if (err) 1098 goto err_thermal_init; 1099 1100 if (mlxsw_driver->init) { 1101 err = mlxsw_driver->init(mlxsw_core, mlxsw_bus_info); 1102 if (err) 1103 goto err_driver_init; 1104 } 1105 1106 if (mlxsw_driver->params_register && !reload) 1107 devlink_params_publish(devlink); 1108 1109 return 0; 1110 1111 err_driver_init: 1112 mlxsw_thermal_fini(mlxsw_core->thermal); 1113 err_thermal_init: 1114 mlxsw_hwmon_fini(mlxsw_core->hwmon); 1115 err_hwmon_init: 1116 if (mlxsw_driver->params_unregister && !reload) 1117 mlxsw_driver->params_unregister(mlxsw_core); 1118 err_register_params: 1119 if (!reload) 1120 devlink_unregister(devlink); 1121 err_devlink_register: 1122 mlxsw_emad_fini(mlxsw_core); 1123 err_emad_init: 1124 kfree(mlxsw_core->lag.mapping); 1125 err_alloc_lag_mapping: 1126 mlxsw_ports_fini(mlxsw_core); 1127 err_ports_init: 1128 if (!reload) 1129 devlink_resources_unregister(devlink, NULL); 1130 err_register_resources: 1131 mlxsw_bus->fini(bus_priv); 1132 err_bus_init: 1133 if (!reload) 1134 devlink_free(devlink); 1135 err_devlink_alloc: 1136 return err; 1137 } 1138 1139 int mlxsw_core_bus_device_register(const struct mlxsw_bus_info *mlxsw_bus_info, 1140 const struct mlxsw_bus *mlxsw_bus, 1141 void *bus_priv, bool reload, 1142 struct devlink *devlink) 1143 { 1144 bool called_again = false; 1145 int err; 1146 1147 again: 1148 err = __mlxsw_core_bus_device_register(mlxsw_bus_info, mlxsw_bus, 1149 bus_priv, reload, devlink); 1150 /* -EAGAIN is returned in case the FW was updated. FW needs 1151 * a reset, so lets try to call __mlxsw_core_bus_device_register() 1152 * again. 1153 */ 1154 if (err == -EAGAIN && !called_again) { 1155 called_again = true; 1156 goto again; 1157 } 1158 1159 return err; 1160 } 1161 EXPORT_SYMBOL(mlxsw_core_bus_device_register); 1162 1163 void mlxsw_core_bus_device_unregister(struct mlxsw_core *mlxsw_core, 1164 bool reload) 1165 { 1166 struct devlink *devlink = priv_to_devlink(mlxsw_core); 1167 1168 if (mlxsw_core->reload_fail) { 1169 if (!reload) 1170 /* Only the parts that were not de-initialized in the 1171 * failed reload attempt need to be de-initialized. 1172 */ 1173 goto reload_fail_deinit; 1174 else 1175 return; 1176 } 1177 1178 if (mlxsw_core->driver->params_unregister && !reload) 1179 devlink_params_unpublish(devlink); 1180 if (mlxsw_core->driver->fini) 1181 mlxsw_core->driver->fini(mlxsw_core); 1182 mlxsw_thermal_fini(mlxsw_core->thermal); 1183 mlxsw_hwmon_fini(mlxsw_core->hwmon); 1184 if (mlxsw_core->driver->params_unregister && !reload) 1185 mlxsw_core->driver->params_unregister(mlxsw_core); 1186 if (!reload) 1187 devlink_unregister(devlink); 1188 mlxsw_emad_fini(mlxsw_core); 1189 kfree(mlxsw_core->lag.mapping); 1190 mlxsw_ports_fini(mlxsw_core); 1191 if (!reload) 1192 devlink_resources_unregister(devlink, NULL); 1193 mlxsw_core->bus->fini(mlxsw_core->bus_priv); 1194 1195 return; 1196 1197 reload_fail_deinit: 1198 if (mlxsw_core->driver->params_unregister) 1199 mlxsw_core->driver->params_unregister(mlxsw_core); 1200 devlink_unregister(devlink); 1201 devlink_resources_unregister(devlink, NULL); 1202 devlink_free(devlink); 1203 } 1204 EXPORT_SYMBOL(mlxsw_core_bus_device_unregister); 1205 1206 bool mlxsw_core_skb_transmit_busy(struct mlxsw_core *mlxsw_core, 1207 const struct mlxsw_tx_info *tx_info) 1208 { 1209 return mlxsw_core->bus->skb_transmit_busy(mlxsw_core->bus_priv, 1210 tx_info); 1211 } 1212 EXPORT_SYMBOL(mlxsw_core_skb_transmit_busy); 1213 1214 int mlxsw_core_skb_transmit(struct mlxsw_core *mlxsw_core, struct sk_buff *skb, 1215 const struct mlxsw_tx_info *tx_info) 1216 { 1217 return mlxsw_core->bus->skb_transmit(mlxsw_core->bus_priv, skb, 1218 tx_info); 1219 } 1220 EXPORT_SYMBOL(mlxsw_core_skb_transmit); 1221 1222 static bool __is_rx_listener_equal(const struct mlxsw_rx_listener *rxl_a, 1223 const struct mlxsw_rx_listener *rxl_b) 1224 { 1225 return (rxl_a->func == rxl_b->func && 1226 rxl_a->local_port == rxl_b->local_port && 1227 rxl_a->trap_id == rxl_b->trap_id); 1228 } 1229 1230 static struct mlxsw_rx_listener_item * 1231 __find_rx_listener_item(struct mlxsw_core *mlxsw_core, 1232 const struct mlxsw_rx_listener *rxl, 1233 void *priv) 1234 { 1235 struct mlxsw_rx_listener_item *rxl_item; 1236 1237 list_for_each_entry(rxl_item, &mlxsw_core->rx_listener_list, list) { 1238 if (__is_rx_listener_equal(&rxl_item->rxl, rxl) && 1239 rxl_item->priv == priv) 1240 return rxl_item; 1241 } 1242 return NULL; 1243 } 1244 1245 int mlxsw_core_rx_listener_register(struct mlxsw_core *mlxsw_core, 1246 const struct mlxsw_rx_listener *rxl, 1247 void *priv) 1248 { 1249 struct mlxsw_rx_listener_item *rxl_item; 1250 1251 rxl_item = __find_rx_listener_item(mlxsw_core, rxl, priv); 1252 if (rxl_item) 1253 return -EEXIST; 1254 rxl_item = kmalloc(sizeof(*rxl_item), GFP_KERNEL); 1255 if (!rxl_item) 1256 return -ENOMEM; 1257 rxl_item->rxl = *rxl; 1258 rxl_item->priv = priv; 1259 1260 list_add_rcu(&rxl_item->list, &mlxsw_core->rx_listener_list); 1261 return 0; 1262 } 1263 EXPORT_SYMBOL(mlxsw_core_rx_listener_register); 1264 1265 void mlxsw_core_rx_listener_unregister(struct mlxsw_core *mlxsw_core, 1266 const struct mlxsw_rx_listener *rxl, 1267 void *priv) 1268 { 1269 struct mlxsw_rx_listener_item *rxl_item; 1270 1271 rxl_item = __find_rx_listener_item(mlxsw_core, rxl, priv); 1272 if (!rxl_item) 1273 return; 1274 list_del_rcu(&rxl_item->list); 1275 synchronize_rcu(); 1276 kfree(rxl_item); 1277 } 1278 EXPORT_SYMBOL(mlxsw_core_rx_listener_unregister); 1279 1280 static void mlxsw_core_event_listener_func(struct sk_buff *skb, u8 local_port, 1281 void *priv) 1282 { 1283 struct mlxsw_event_listener_item *event_listener_item = priv; 1284 struct mlxsw_reg_info reg; 1285 char *payload; 1286 char *op_tlv = mlxsw_emad_op_tlv(skb); 1287 char *reg_tlv = mlxsw_emad_reg_tlv(skb); 1288 1289 reg.id = mlxsw_emad_op_tlv_register_id_get(op_tlv); 1290 reg.len = (mlxsw_emad_reg_tlv_len_get(reg_tlv) - 1) * sizeof(u32); 1291 payload = mlxsw_emad_reg_payload(op_tlv); 1292 event_listener_item->el.func(®, payload, event_listener_item->priv); 1293 dev_kfree_skb(skb); 1294 } 1295 1296 static bool __is_event_listener_equal(const struct mlxsw_event_listener *el_a, 1297 const struct mlxsw_event_listener *el_b) 1298 { 1299 return (el_a->func == el_b->func && 1300 el_a->trap_id == el_b->trap_id); 1301 } 1302 1303 static struct mlxsw_event_listener_item * 1304 __find_event_listener_item(struct mlxsw_core *mlxsw_core, 1305 const struct mlxsw_event_listener *el, 1306 void *priv) 1307 { 1308 struct mlxsw_event_listener_item *el_item; 1309 1310 list_for_each_entry(el_item, &mlxsw_core->event_listener_list, list) { 1311 if (__is_event_listener_equal(&el_item->el, el) && 1312 el_item->priv == priv) 1313 return el_item; 1314 } 1315 return NULL; 1316 } 1317 1318 int mlxsw_core_event_listener_register(struct mlxsw_core *mlxsw_core, 1319 const struct mlxsw_event_listener *el, 1320 void *priv) 1321 { 1322 int err; 1323 struct mlxsw_event_listener_item *el_item; 1324 const struct mlxsw_rx_listener rxl = { 1325 .func = mlxsw_core_event_listener_func, 1326 .local_port = MLXSW_PORT_DONT_CARE, 1327 .trap_id = el->trap_id, 1328 }; 1329 1330 el_item = __find_event_listener_item(mlxsw_core, el, priv); 1331 if (el_item) 1332 return -EEXIST; 1333 el_item = kmalloc(sizeof(*el_item), GFP_KERNEL); 1334 if (!el_item) 1335 return -ENOMEM; 1336 el_item->el = *el; 1337 el_item->priv = priv; 1338 1339 err = mlxsw_core_rx_listener_register(mlxsw_core, &rxl, el_item); 1340 if (err) 1341 goto err_rx_listener_register; 1342 1343 /* No reason to save item if we did not manage to register an RX 1344 * listener for it. 1345 */ 1346 list_add_rcu(&el_item->list, &mlxsw_core->event_listener_list); 1347 1348 return 0; 1349 1350 err_rx_listener_register: 1351 kfree(el_item); 1352 return err; 1353 } 1354 EXPORT_SYMBOL(mlxsw_core_event_listener_register); 1355 1356 void mlxsw_core_event_listener_unregister(struct mlxsw_core *mlxsw_core, 1357 const struct mlxsw_event_listener *el, 1358 void *priv) 1359 { 1360 struct mlxsw_event_listener_item *el_item; 1361 const struct mlxsw_rx_listener rxl = { 1362 .func = mlxsw_core_event_listener_func, 1363 .local_port = MLXSW_PORT_DONT_CARE, 1364 .trap_id = el->trap_id, 1365 }; 1366 1367 el_item = __find_event_listener_item(mlxsw_core, el, priv); 1368 if (!el_item) 1369 return; 1370 mlxsw_core_rx_listener_unregister(mlxsw_core, &rxl, el_item); 1371 list_del(&el_item->list); 1372 kfree(el_item); 1373 } 1374 EXPORT_SYMBOL(mlxsw_core_event_listener_unregister); 1375 1376 static int mlxsw_core_listener_register(struct mlxsw_core *mlxsw_core, 1377 const struct mlxsw_listener *listener, 1378 void *priv) 1379 { 1380 if (listener->is_event) 1381 return mlxsw_core_event_listener_register(mlxsw_core, 1382 &listener->u.event_listener, 1383 priv); 1384 else 1385 return mlxsw_core_rx_listener_register(mlxsw_core, 1386 &listener->u.rx_listener, 1387 priv); 1388 } 1389 1390 static void mlxsw_core_listener_unregister(struct mlxsw_core *mlxsw_core, 1391 const struct mlxsw_listener *listener, 1392 void *priv) 1393 { 1394 if (listener->is_event) 1395 mlxsw_core_event_listener_unregister(mlxsw_core, 1396 &listener->u.event_listener, 1397 priv); 1398 else 1399 mlxsw_core_rx_listener_unregister(mlxsw_core, 1400 &listener->u.rx_listener, 1401 priv); 1402 } 1403 1404 int mlxsw_core_trap_register(struct mlxsw_core *mlxsw_core, 1405 const struct mlxsw_listener *listener, void *priv) 1406 { 1407 char hpkt_pl[MLXSW_REG_HPKT_LEN]; 1408 int err; 1409 1410 err = mlxsw_core_listener_register(mlxsw_core, listener, priv); 1411 if (err) 1412 return err; 1413 1414 mlxsw_reg_hpkt_pack(hpkt_pl, listener->action, listener->trap_id, 1415 listener->trap_group, listener->is_ctrl); 1416 err = mlxsw_reg_write(mlxsw_core, MLXSW_REG(hpkt), hpkt_pl); 1417 if (err) 1418 goto err_trap_set; 1419 1420 return 0; 1421 1422 err_trap_set: 1423 mlxsw_core_listener_unregister(mlxsw_core, listener, priv); 1424 return err; 1425 } 1426 EXPORT_SYMBOL(mlxsw_core_trap_register); 1427 1428 void mlxsw_core_trap_unregister(struct mlxsw_core *mlxsw_core, 1429 const struct mlxsw_listener *listener, 1430 void *priv) 1431 { 1432 char hpkt_pl[MLXSW_REG_HPKT_LEN]; 1433 1434 if (!listener->is_event) { 1435 mlxsw_reg_hpkt_pack(hpkt_pl, listener->unreg_action, 1436 listener->trap_id, listener->trap_group, 1437 listener->is_ctrl); 1438 mlxsw_reg_write(mlxsw_core, MLXSW_REG(hpkt), hpkt_pl); 1439 } 1440 1441 mlxsw_core_listener_unregister(mlxsw_core, listener, priv); 1442 } 1443 EXPORT_SYMBOL(mlxsw_core_trap_unregister); 1444 1445 static u64 mlxsw_core_tid_get(struct mlxsw_core *mlxsw_core) 1446 { 1447 return atomic64_inc_return(&mlxsw_core->emad.tid); 1448 } 1449 1450 static int mlxsw_core_reg_access_emad(struct mlxsw_core *mlxsw_core, 1451 const struct mlxsw_reg_info *reg, 1452 char *payload, 1453 enum mlxsw_core_reg_access_type type, 1454 struct list_head *bulk_list, 1455 mlxsw_reg_trans_cb_t *cb, 1456 unsigned long cb_priv) 1457 { 1458 u64 tid = mlxsw_core_tid_get(mlxsw_core); 1459 struct mlxsw_reg_trans *trans; 1460 int err; 1461 1462 trans = kzalloc(sizeof(*trans), GFP_KERNEL); 1463 if (!trans) 1464 return -ENOMEM; 1465 1466 err = mlxsw_emad_reg_access(mlxsw_core, reg, payload, type, trans, 1467 bulk_list, cb, cb_priv, tid); 1468 if (err) { 1469 kfree(trans); 1470 return err; 1471 } 1472 return 0; 1473 } 1474 1475 int mlxsw_reg_trans_query(struct mlxsw_core *mlxsw_core, 1476 const struct mlxsw_reg_info *reg, char *payload, 1477 struct list_head *bulk_list, 1478 mlxsw_reg_trans_cb_t *cb, unsigned long cb_priv) 1479 { 1480 return mlxsw_core_reg_access_emad(mlxsw_core, reg, payload, 1481 MLXSW_CORE_REG_ACCESS_TYPE_QUERY, 1482 bulk_list, cb, cb_priv); 1483 } 1484 EXPORT_SYMBOL(mlxsw_reg_trans_query); 1485 1486 int mlxsw_reg_trans_write(struct mlxsw_core *mlxsw_core, 1487 const struct mlxsw_reg_info *reg, char *payload, 1488 struct list_head *bulk_list, 1489 mlxsw_reg_trans_cb_t *cb, unsigned long cb_priv) 1490 { 1491 return mlxsw_core_reg_access_emad(mlxsw_core, reg, payload, 1492 MLXSW_CORE_REG_ACCESS_TYPE_WRITE, 1493 bulk_list, cb, cb_priv); 1494 } 1495 EXPORT_SYMBOL(mlxsw_reg_trans_write); 1496 1497 static int mlxsw_reg_trans_wait(struct mlxsw_reg_trans *trans) 1498 { 1499 struct mlxsw_core *mlxsw_core = trans->core; 1500 int err; 1501 1502 wait_for_completion(&trans->completion); 1503 cancel_delayed_work_sync(&trans->timeout_dw); 1504 err = trans->err; 1505 1506 if (trans->retries) 1507 dev_warn(mlxsw_core->bus_info->dev, "EMAD retries (%d/%d) (tid=%llx)\n", 1508 trans->retries, MLXSW_EMAD_MAX_RETRY, trans->tid); 1509 if (err) { 1510 dev_err(mlxsw_core->bus_info->dev, "EMAD reg access failed (tid=%llx,reg_id=%x(%s),type=%s,status=%x(%s))\n", 1511 trans->tid, trans->reg->id, 1512 mlxsw_reg_id_str(trans->reg->id), 1513 mlxsw_core_reg_access_type_str(trans->type), 1514 trans->emad_status, 1515 mlxsw_emad_op_tlv_status_str(trans->emad_status)); 1516 trace_devlink_hwerr(priv_to_devlink(mlxsw_core), 1517 trans->emad_status, 1518 mlxsw_emad_op_tlv_status_str(trans->emad_status)); 1519 } 1520 1521 list_del(&trans->bulk_list); 1522 kfree_rcu(trans, rcu); 1523 return err; 1524 } 1525 1526 int mlxsw_reg_trans_bulk_wait(struct list_head *bulk_list) 1527 { 1528 struct mlxsw_reg_trans *trans; 1529 struct mlxsw_reg_trans *tmp; 1530 int sum_err = 0; 1531 int err; 1532 1533 list_for_each_entry_safe(trans, tmp, bulk_list, bulk_list) { 1534 err = mlxsw_reg_trans_wait(trans); 1535 if (err && sum_err == 0) 1536 sum_err = err; /* first error to be returned */ 1537 } 1538 return sum_err; 1539 } 1540 EXPORT_SYMBOL(mlxsw_reg_trans_bulk_wait); 1541 1542 static int mlxsw_core_reg_access_cmd(struct mlxsw_core *mlxsw_core, 1543 const struct mlxsw_reg_info *reg, 1544 char *payload, 1545 enum mlxsw_core_reg_access_type type) 1546 { 1547 enum mlxsw_emad_op_tlv_status status; 1548 int err, n_retry; 1549 bool reset_ok; 1550 char *in_mbox, *out_mbox, *tmp; 1551 1552 dev_dbg(mlxsw_core->bus_info->dev, "Reg cmd access (reg_id=%x(%s),type=%s)\n", 1553 reg->id, mlxsw_reg_id_str(reg->id), 1554 mlxsw_core_reg_access_type_str(type)); 1555 1556 in_mbox = mlxsw_cmd_mbox_alloc(); 1557 if (!in_mbox) 1558 return -ENOMEM; 1559 1560 out_mbox = mlxsw_cmd_mbox_alloc(); 1561 if (!out_mbox) { 1562 err = -ENOMEM; 1563 goto free_in_mbox; 1564 } 1565 1566 mlxsw_emad_pack_op_tlv(in_mbox, reg, type, 1567 mlxsw_core_tid_get(mlxsw_core)); 1568 tmp = in_mbox + MLXSW_EMAD_OP_TLV_LEN * sizeof(u32); 1569 mlxsw_emad_pack_reg_tlv(tmp, reg, payload); 1570 1571 /* There is a special treatment needed for MRSR (reset) register. 1572 * The command interface will return error after the command 1573 * is executed, so tell the lower layer to expect it 1574 * and cope accordingly. 1575 */ 1576 reset_ok = reg->id == MLXSW_REG_MRSR_ID; 1577 1578 n_retry = 0; 1579 retry: 1580 err = mlxsw_cmd_access_reg(mlxsw_core, reset_ok, in_mbox, out_mbox); 1581 if (!err) { 1582 err = mlxsw_emad_process_status(out_mbox, &status); 1583 if (err) { 1584 if (err == -EAGAIN && n_retry++ < MLXSW_EMAD_MAX_RETRY) 1585 goto retry; 1586 dev_err(mlxsw_core->bus_info->dev, "Reg cmd access status failed (status=%x(%s))\n", 1587 status, mlxsw_emad_op_tlv_status_str(status)); 1588 } 1589 } 1590 1591 if (!err) 1592 memcpy(payload, mlxsw_emad_reg_payload(out_mbox), 1593 reg->len); 1594 1595 mlxsw_cmd_mbox_free(out_mbox); 1596 free_in_mbox: 1597 mlxsw_cmd_mbox_free(in_mbox); 1598 if (err) 1599 dev_err(mlxsw_core->bus_info->dev, "Reg cmd access failed (reg_id=%x(%s),type=%s)\n", 1600 reg->id, mlxsw_reg_id_str(reg->id), 1601 mlxsw_core_reg_access_type_str(type)); 1602 return err; 1603 } 1604 1605 static void mlxsw_core_reg_access_cb(struct mlxsw_core *mlxsw_core, 1606 char *payload, size_t payload_len, 1607 unsigned long cb_priv) 1608 { 1609 char *orig_payload = (char *) cb_priv; 1610 1611 memcpy(orig_payload, payload, payload_len); 1612 } 1613 1614 static int mlxsw_core_reg_access(struct mlxsw_core *mlxsw_core, 1615 const struct mlxsw_reg_info *reg, 1616 char *payload, 1617 enum mlxsw_core_reg_access_type type) 1618 { 1619 LIST_HEAD(bulk_list); 1620 int err; 1621 1622 /* During initialization EMAD interface is not available to us, 1623 * so we default to command interface. We switch to EMAD interface 1624 * after setting the appropriate traps. 1625 */ 1626 if (!mlxsw_core->emad.use_emad) 1627 return mlxsw_core_reg_access_cmd(mlxsw_core, reg, 1628 payload, type); 1629 1630 err = mlxsw_core_reg_access_emad(mlxsw_core, reg, 1631 payload, type, &bulk_list, 1632 mlxsw_core_reg_access_cb, 1633 (unsigned long) payload); 1634 if (err) 1635 return err; 1636 return mlxsw_reg_trans_bulk_wait(&bulk_list); 1637 } 1638 1639 int mlxsw_reg_query(struct mlxsw_core *mlxsw_core, 1640 const struct mlxsw_reg_info *reg, char *payload) 1641 { 1642 return mlxsw_core_reg_access(mlxsw_core, reg, payload, 1643 MLXSW_CORE_REG_ACCESS_TYPE_QUERY); 1644 } 1645 EXPORT_SYMBOL(mlxsw_reg_query); 1646 1647 int mlxsw_reg_write(struct mlxsw_core *mlxsw_core, 1648 const struct mlxsw_reg_info *reg, char *payload) 1649 { 1650 return mlxsw_core_reg_access(mlxsw_core, reg, payload, 1651 MLXSW_CORE_REG_ACCESS_TYPE_WRITE); 1652 } 1653 EXPORT_SYMBOL(mlxsw_reg_write); 1654 1655 void mlxsw_core_skb_receive(struct mlxsw_core *mlxsw_core, struct sk_buff *skb, 1656 struct mlxsw_rx_info *rx_info) 1657 { 1658 struct mlxsw_rx_listener_item *rxl_item; 1659 const struct mlxsw_rx_listener *rxl; 1660 u8 local_port; 1661 bool found = false; 1662 1663 if (rx_info->is_lag) { 1664 dev_dbg_ratelimited(mlxsw_core->bus_info->dev, "%s: lag_id = %d, lag_port_index = 0x%x\n", 1665 __func__, rx_info->u.lag_id, 1666 rx_info->trap_id); 1667 /* Upper layer does not care if the skb came from LAG or not, 1668 * so just get the local_port for the lag port and push it up. 1669 */ 1670 local_port = mlxsw_core_lag_mapping_get(mlxsw_core, 1671 rx_info->u.lag_id, 1672 rx_info->lag_port_index); 1673 } else { 1674 local_port = rx_info->u.sys_port; 1675 } 1676 1677 dev_dbg_ratelimited(mlxsw_core->bus_info->dev, "%s: local_port = %d, trap_id = 0x%x\n", 1678 __func__, local_port, rx_info->trap_id); 1679 1680 if ((rx_info->trap_id >= MLXSW_TRAP_ID_MAX) || 1681 (local_port >= mlxsw_core->max_ports)) 1682 goto drop; 1683 1684 rcu_read_lock(); 1685 list_for_each_entry_rcu(rxl_item, &mlxsw_core->rx_listener_list, list) { 1686 rxl = &rxl_item->rxl; 1687 if ((rxl->local_port == MLXSW_PORT_DONT_CARE || 1688 rxl->local_port == local_port) && 1689 rxl->trap_id == rx_info->trap_id) { 1690 found = true; 1691 break; 1692 } 1693 } 1694 rcu_read_unlock(); 1695 if (!found) 1696 goto drop; 1697 1698 rxl->func(skb, local_port, rxl_item->priv); 1699 return; 1700 1701 drop: 1702 dev_kfree_skb(skb); 1703 } 1704 EXPORT_SYMBOL(mlxsw_core_skb_receive); 1705 1706 static int mlxsw_core_lag_mapping_index(struct mlxsw_core *mlxsw_core, 1707 u16 lag_id, u8 port_index) 1708 { 1709 return MLXSW_CORE_RES_GET(mlxsw_core, MAX_LAG_MEMBERS) * lag_id + 1710 port_index; 1711 } 1712 1713 void mlxsw_core_lag_mapping_set(struct mlxsw_core *mlxsw_core, 1714 u16 lag_id, u8 port_index, u8 local_port) 1715 { 1716 int index = mlxsw_core_lag_mapping_index(mlxsw_core, 1717 lag_id, port_index); 1718 1719 mlxsw_core->lag.mapping[index] = local_port; 1720 } 1721 EXPORT_SYMBOL(mlxsw_core_lag_mapping_set); 1722 1723 u8 mlxsw_core_lag_mapping_get(struct mlxsw_core *mlxsw_core, 1724 u16 lag_id, u8 port_index) 1725 { 1726 int index = mlxsw_core_lag_mapping_index(mlxsw_core, 1727 lag_id, port_index); 1728 1729 return mlxsw_core->lag.mapping[index]; 1730 } 1731 EXPORT_SYMBOL(mlxsw_core_lag_mapping_get); 1732 1733 void mlxsw_core_lag_mapping_clear(struct mlxsw_core *mlxsw_core, 1734 u16 lag_id, u8 local_port) 1735 { 1736 int i; 1737 1738 for (i = 0; i < MLXSW_CORE_RES_GET(mlxsw_core, MAX_LAG_MEMBERS); i++) { 1739 int index = mlxsw_core_lag_mapping_index(mlxsw_core, 1740 lag_id, i); 1741 1742 if (mlxsw_core->lag.mapping[index] == local_port) 1743 mlxsw_core->lag.mapping[index] = 0; 1744 } 1745 } 1746 EXPORT_SYMBOL(mlxsw_core_lag_mapping_clear); 1747 1748 bool mlxsw_core_res_valid(struct mlxsw_core *mlxsw_core, 1749 enum mlxsw_res_id res_id) 1750 { 1751 return mlxsw_res_valid(&mlxsw_core->res, res_id); 1752 } 1753 EXPORT_SYMBOL(mlxsw_core_res_valid); 1754 1755 u64 mlxsw_core_res_get(struct mlxsw_core *mlxsw_core, 1756 enum mlxsw_res_id res_id) 1757 { 1758 return mlxsw_res_get(&mlxsw_core->res, res_id); 1759 } 1760 EXPORT_SYMBOL(mlxsw_core_res_get); 1761 1762 int mlxsw_core_port_init(struct mlxsw_core *mlxsw_core, u8 local_port, 1763 u32 port_number, bool split, 1764 u32 split_port_subnumber, 1765 const unsigned char *switch_id, 1766 unsigned char switch_id_len) 1767 { 1768 struct devlink *devlink = priv_to_devlink(mlxsw_core); 1769 struct mlxsw_core_port *mlxsw_core_port = 1770 &mlxsw_core->ports[local_port]; 1771 struct devlink_port *devlink_port = &mlxsw_core_port->devlink_port; 1772 int err; 1773 1774 mlxsw_core_port->local_port = local_port; 1775 devlink_port_attrs_set(devlink_port, DEVLINK_PORT_FLAVOUR_PHYSICAL, 1776 port_number, split, split_port_subnumber, 1777 switch_id, switch_id_len); 1778 err = devlink_port_register(devlink, devlink_port, local_port); 1779 if (err) 1780 memset(mlxsw_core_port, 0, sizeof(*mlxsw_core_port)); 1781 return err; 1782 } 1783 EXPORT_SYMBOL(mlxsw_core_port_init); 1784 1785 void mlxsw_core_port_fini(struct mlxsw_core *mlxsw_core, u8 local_port) 1786 { 1787 struct mlxsw_core_port *mlxsw_core_port = 1788 &mlxsw_core->ports[local_port]; 1789 struct devlink_port *devlink_port = &mlxsw_core_port->devlink_port; 1790 1791 devlink_port_unregister(devlink_port); 1792 memset(mlxsw_core_port, 0, sizeof(*mlxsw_core_port)); 1793 } 1794 EXPORT_SYMBOL(mlxsw_core_port_fini); 1795 1796 void mlxsw_core_port_eth_set(struct mlxsw_core *mlxsw_core, u8 local_port, 1797 void *port_driver_priv, struct net_device *dev) 1798 { 1799 struct mlxsw_core_port *mlxsw_core_port = 1800 &mlxsw_core->ports[local_port]; 1801 struct devlink_port *devlink_port = &mlxsw_core_port->devlink_port; 1802 1803 mlxsw_core_port->port_driver_priv = port_driver_priv; 1804 devlink_port_type_eth_set(devlink_port, dev); 1805 } 1806 EXPORT_SYMBOL(mlxsw_core_port_eth_set); 1807 1808 void mlxsw_core_port_ib_set(struct mlxsw_core *mlxsw_core, u8 local_port, 1809 void *port_driver_priv) 1810 { 1811 struct mlxsw_core_port *mlxsw_core_port = 1812 &mlxsw_core->ports[local_port]; 1813 struct devlink_port *devlink_port = &mlxsw_core_port->devlink_port; 1814 1815 mlxsw_core_port->port_driver_priv = port_driver_priv; 1816 devlink_port_type_ib_set(devlink_port, NULL); 1817 } 1818 EXPORT_SYMBOL(mlxsw_core_port_ib_set); 1819 1820 void mlxsw_core_port_clear(struct mlxsw_core *mlxsw_core, u8 local_port, 1821 void *port_driver_priv) 1822 { 1823 struct mlxsw_core_port *mlxsw_core_port = 1824 &mlxsw_core->ports[local_port]; 1825 struct devlink_port *devlink_port = &mlxsw_core_port->devlink_port; 1826 1827 mlxsw_core_port->port_driver_priv = port_driver_priv; 1828 devlink_port_type_clear(devlink_port); 1829 } 1830 EXPORT_SYMBOL(mlxsw_core_port_clear); 1831 1832 enum devlink_port_type mlxsw_core_port_type_get(struct mlxsw_core *mlxsw_core, 1833 u8 local_port) 1834 { 1835 struct mlxsw_core_port *mlxsw_core_port = 1836 &mlxsw_core->ports[local_port]; 1837 struct devlink_port *devlink_port = &mlxsw_core_port->devlink_port; 1838 1839 return devlink_port->type; 1840 } 1841 EXPORT_SYMBOL(mlxsw_core_port_type_get); 1842 1843 1844 struct devlink_port * 1845 mlxsw_core_port_devlink_port_get(struct mlxsw_core *mlxsw_core, 1846 u8 local_port) 1847 { 1848 struct mlxsw_core_port *mlxsw_core_port = 1849 &mlxsw_core->ports[local_port]; 1850 struct devlink_port *devlink_port = &mlxsw_core_port->devlink_port; 1851 1852 return devlink_port; 1853 } 1854 EXPORT_SYMBOL(mlxsw_core_port_devlink_port_get); 1855 1856 static void mlxsw_core_buf_dump_dbg(struct mlxsw_core *mlxsw_core, 1857 const char *buf, size_t size) 1858 { 1859 __be32 *m = (__be32 *) buf; 1860 int i; 1861 int count = size / sizeof(__be32); 1862 1863 for (i = count - 1; i >= 0; i--) 1864 if (m[i]) 1865 break; 1866 i++; 1867 count = i ? i : 1; 1868 for (i = 0; i < count; i += 4) 1869 dev_dbg(mlxsw_core->bus_info->dev, "%04x - %08x %08x %08x %08x\n", 1870 i * 4, be32_to_cpu(m[i]), be32_to_cpu(m[i + 1]), 1871 be32_to_cpu(m[i + 2]), be32_to_cpu(m[i + 3])); 1872 } 1873 1874 int mlxsw_cmd_exec(struct mlxsw_core *mlxsw_core, u16 opcode, u8 opcode_mod, 1875 u32 in_mod, bool out_mbox_direct, bool reset_ok, 1876 char *in_mbox, size_t in_mbox_size, 1877 char *out_mbox, size_t out_mbox_size) 1878 { 1879 u8 status; 1880 int err; 1881 1882 BUG_ON(in_mbox_size % sizeof(u32) || out_mbox_size % sizeof(u32)); 1883 if (!mlxsw_core->bus->cmd_exec) 1884 return -EOPNOTSUPP; 1885 1886 dev_dbg(mlxsw_core->bus_info->dev, "Cmd exec (opcode=%x(%s),opcode_mod=%x,in_mod=%x)\n", 1887 opcode, mlxsw_cmd_opcode_str(opcode), opcode_mod, in_mod); 1888 if (in_mbox) { 1889 dev_dbg(mlxsw_core->bus_info->dev, "Input mailbox:\n"); 1890 mlxsw_core_buf_dump_dbg(mlxsw_core, in_mbox, in_mbox_size); 1891 } 1892 1893 err = mlxsw_core->bus->cmd_exec(mlxsw_core->bus_priv, opcode, 1894 opcode_mod, in_mod, out_mbox_direct, 1895 in_mbox, in_mbox_size, 1896 out_mbox, out_mbox_size, &status); 1897 1898 if (!err && out_mbox) { 1899 dev_dbg(mlxsw_core->bus_info->dev, "Output mailbox:\n"); 1900 mlxsw_core_buf_dump_dbg(mlxsw_core, out_mbox, out_mbox_size); 1901 } 1902 1903 if (reset_ok && err == -EIO && 1904 status == MLXSW_CMD_STATUS_RUNNING_RESET) { 1905 err = 0; 1906 } else if (err == -EIO && status != MLXSW_CMD_STATUS_OK) { 1907 dev_err(mlxsw_core->bus_info->dev, "Cmd exec failed (opcode=%x(%s),opcode_mod=%x,in_mod=%x,status=%x(%s))\n", 1908 opcode, mlxsw_cmd_opcode_str(opcode), opcode_mod, 1909 in_mod, status, mlxsw_cmd_status_str(status)); 1910 } else if (err == -ETIMEDOUT) { 1911 dev_err(mlxsw_core->bus_info->dev, "Cmd exec timed-out (opcode=%x(%s),opcode_mod=%x,in_mod=%x)\n", 1912 opcode, mlxsw_cmd_opcode_str(opcode), opcode_mod, 1913 in_mod); 1914 } 1915 1916 return err; 1917 } 1918 EXPORT_SYMBOL(mlxsw_cmd_exec); 1919 1920 int mlxsw_core_schedule_dw(struct delayed_work *dwork, unsigned long delay) 1921 { 1922 return queue_delayed_work(mlxsw_wq, dwork, delay); 1923 } 1924 EXPORT_SYMBOL(mlxsw_core_schedule_dw); 1925 1926 bool mlxsw_core_schedule_work(struct work_struct *work) 1927 { 1928 return queue_work(mlxsw_owq, work); 1929 } 1930 EXPORT_SYMBOL(mlxsw_core_schedule_work); 1931 1932 void mlxsw_core_flush_owq(void) 1933 { 1934 flush_workqueue(mlxsw_owq); 1935 } 1936 EXPORT_SYMBOL(mlxsw_core_flush_owq); 1937 1938 int mlxsw_core_kvd_sizes_get(struct mlxsw_core *mlxsw_core, 1939 const struct mlxsw_config_profile *profile, 1940 u64 *p_single_size, u64 *p_double_size, 1941 u64 *p_linear_size) 1942 { 1943 struct mlxsw_driver *driver = mlxsw_core->driver; 1944 1945 if (!driver->kvd_sizes_get) 1946 return -EINVAL; 1947 1948 return driver->kvd_sizes_get(mlxsw_core, profile, 1949 p_single_size, p_double_size, 1950 p_linear_size); 1951 } 1952 EXPORT_SYMBOL(mlxsw_core_kvd_sizes_get); 1953 1954 void mlxsw_core_fw_flash_start(struct mlxsw_core *mlxsw_core) 1955 { 1956 mlxsw_core->fw_flash_in_progress = true; 1957 } 1958 EXPORT_SYMBOL(mlxsw_core_fw_flash_start); 1959 1960 void mlxsw_core_fw_flash_end(struct mlxsw_core *mlxsw_core) 1961 { 1962 mlxsw_core->fw_flash_in_progress = false; 1963 } 1964 EXPORT_SYMBOL(mlxsw_core_fw_flash_end); 1965 1966 int mlxsw_core_resources_query(struct mlxsw_core *mlxsw_core, char *mbox, 1967 struct mlxsw_res *res) 1968 { 1969 int index, i; 1970 u64 data; 1971 u16 id; 1972 int err; 1973 1974 if (!res) 1975 return 0; 1976 1977 mlxsw_cmd_mbox_zero(mbox); 1978 1979 for (index = 0; index < MLXSW_CMD_QUERY_RESOURCES_MAX_QUERIES; 1980 index++) { 1981 err = mlxsw_cmd_query_resources(mlxsw_core, mbox, index); 1982 if (err) 1983 return err; 1984 1985 for (i = 0; i < MLXSW_CMD_QUERY_RESOURCES_PER_QUERY; i++) { 1986 id = mlxsw_cmd_mbox_query_resource_id_get(mbox, i); 1987 data = mlxsw_cmd_mbox_query_resource_data_get(mbox, i); 1988 1989 if (id == MLXSW_CMD_QUERY_RESOURCES_TABLE_END_ID) 1990 return 0; 1991 1992 mlxsw_res_parse(res, id, data); 1993 } 1994 } 1995 1996 /* If after MLXSW_RESOURCES_QUERY_MAX_QUERIES we still didn't get 1997 * MLXSW_RESOURCES_TABLE_END_ID, something went bad in the FW. 1998 */ 1999 return -EIO; 2000 } 2001 EXPORT_SYMBOL(mlxsw_core_resources_query); 2002 2003 static int __init mlxsw_core_module_init(void) 2004 { 2005 int err; 2006 2007 mlxsw_wq = alloc_workqueue(mlxsw_core_driver_name, 0, 0); 2008 if (!mlxsw_wq) 2009 return -ENOMEM; 2010 mlxsw_owq = alloc_ordered_workqueue("%s_ordered", 0, 2011 mlxsw_core_driver_name); 2012 if (!mlxsw_owq) { 2013 err = -ENOMEM; 2014 goto err_alloc_ordered_workqueue; 2015 } 2016 return 0; 2017 2018 err_alloc_ordered_workqueue: 2019 destroy_workqueue(mlxsw_wq); 2020 return err; 2021 } 2022 2023 static void __exit mlxsw_core_module_exit(void) 2024 { 2025 destroy_workqueue(mlxsw_owq); 2026 destroy_workqueue(mlxsw_wq); 2027 } 2028 2029 module_init(mlxsw_core_module_init); 2030 module_exit(mlxsw_core_module_exit); 2031 2032 MODULE_LICENSE("Dual BSD/GPL"); 2033 MODULE_AUTHOR("Jiri Pirko <jiri@mellanox.com>"); 2034 MODULE_DESCRIPTION("Mellanox switch device core driver"); 2035