1 // SPDX-License-Identifier: GPL-2.0 OR Linux-OpenIB 2 /* Copyright (c) 2019 Mellanox Technologies. */ 3 4 #include "dr_types.h" 5 6 static bool dr_mask_is_smac_set(struct mlx5dr_match_spec *spec) 7 { 8 return (spec->smac_47_16 || spec->smac_15_0); 9 } 10 11 static bool dr_mask_is_dmac_set(struct mlx5dr_match_spec *spec) 12 { 13 return (spec->dmac_47_16 || spec->dmac_15_0); 14 } 15 16 static bool dr_mask_is_src_addr_set(struct mlx5dr_match_spec *spec) 17 { 18 return (spec->src_ip_127_96 || spec->src_ip_95_64 || 19 spec->src_ip_63_32 || spec->src_ip_31_0); 20 } 21 22 static bool dr_mask_is_dst_addr_set(struct mlx5dr_match_spec *spec) 23 { 24 return (spec->dst_ip_127_96 || spec->dst_ip_95_64 || 25 spec->dst_ip_63_32 || spec->dst_ip_31_0); 26 } 27 28 static bool dr_mask_is_l3_base_set(struct mlx5dr_match_spec *spec) 29 { 30 return (spec->ip_protocol || spec->frag || spec->tcp_flags || 31 spec->ip_ecn || spec->ip_dscp); 32 } 33 34 static bool dr_mask_is_tcp_udp_base_set(struct mlx5dr_match_spec *spec) 35 { 36 return (spec->tcp_sport || spec->tcp_dport || 37 spec->udp_sport || spec->udp_dport); 38 } 39 40 static bool dr_mask_is_ipv4_set(struct mlx5dr_match_spec *spec) 41 { 42 return (spec->dst_ip_31_0 || spec->src_ip_31_0); 43 } 44 45 static bool dr_mask_is_ipv4_5_tuple_set(struct mlx5dr_match_spec *spec) 46 { 47 return (dr_mask_is_l3_base_set(spec) || 48 dr_mask_is_tcp_udp_base_set(spec) || 49 dr_mask_is_ipv4_set(spec)); 50 } 51 52 static bool dr_mask_is_eth_l2_tnl_set(struct mlx5dr_match_misc *misc) 53 { 54 return misc->vxlan_vni; 55 } 56 57 static bool dr_mask_is_ttl_set(struct mlx5dr_match_spec *spec) 58 { 59 return spec->ttl_hoplimit; 60 } 61 62 #define DR_MASK_IS_L2_DST(_spec, _misc, _inner_outer) (_spec.first_vid || \ 63 (_spec).first_cfi || (_spec).first_prio || (_spec).cvlan_tag || \ 64 (_spec).svlan_tag || (_spec).dmac_47_16 || (_spec).dmac_15_0 || \ 65 (_spec).ethertype || (_spec).ip_version || \ 66 (_misc)._inner_outer##_second_vid || \ 67 (_misc)._inner_outer##_second_cfi || \ 68 (_misc)._inner_outer##_second_prio || \ 69 (_misc)._inner_outer##_second_cvlan_tag || \ 70 (_misc)._inner_outer##_second_svlan_tag) 71 72 #define DR_MASK_IS_ETH_L4_SET(_spec, _misc, _inner_outer) ( \ 73 dr_mask_is_l3_base_set(&(_spec)) || \ 74 dr_mask_is_tcp_udp_base_set(&(_spec)) || \ 75 dr_mask_is_ttl_set(&(_spec)) || \ 76 (_misc)._inner_outer##_ipv6_flow_label) 77 78 #define DR_MASK_IS_ETH_L4_MISC_SET(_misc3, _inner_outer) ( \ 79 (_misc3)._inner_outer##_tcp_seq_num || \ 80 (_misc3)._inner_outer##_tcp_ack_num) 81 82 #define DR_MASK_IS_FIRST_MPLS_SET(_misc2, _inner_outer) ( \ 83 (_misc2)._inner_outer##_first_mpls_label || \ 84 (_misc2)._inner_outer##_first_mpls_exp || \ 85 (_misc2)._inner_outer##_first_mpls_s_bos || \ 86 (_misc2)._inner_outer##_first_mpls_ttl) 87 88 static bool dr_mask_is_tnl_gre_set(struct mlx5dr_match_misc *misc) 89 { 90 return (misc->gre_key_h || misc->gre_key_l || 91 misc->gre_protocol || misc->gre_c_present || 92 misc->gre_k_present || misc->gre_s_present); 93 } 94 95 #define DR_MASK_IS_OUTER_MPLS_OVER_GRE_SET(_misc) (\ 96 (_misc)->outer_first_mpls_over_gre_label || \ 97 (_misc)->outer_first_mpls_over_gre_exp || \ 98 (_misc)->outer_first_mpls_over_gre_s_bos || \ 99 (_misc)->outer_first_mpls_over_gre_ttl) 100 101 #define DR_MASK_IS_OUTER_MPLS_OVER_UDP_SET(_misc) (\ 102 (_misc)->outer_first_mpls_over_udp_label || \ 103 (_misc)->outer_first_mpls_over_udp_exp || \ 104 (_misc)->outer_first_mpls_over_udp_s_bos || \ 105 (_misc)->outer_first_mpls_over_udp_ttl) 106 107 static bool 108 dr_mask_is_vxlan_gpe_set(struct mlx5dr_match_misc3 *misc3) 109 { 110 return (misc3->outer_vxlan_gpe_vni || 111 misc3->outer_vxlan_gpe_next_protocol || 112 misc3->outer_vxlan_gpe_flags); 113 } 114 115 static bool 116 dr_matcher_supp_vxlan_gpe(struct mlx5dr_cmd_caps *caps) 117 { 118 return (caps->sw_format_ver == MLX5_STEERING_FORMAT_CONNECTX_6DX) || 119 (caps->flex_protocols & MLX5_FLEX_PARSER_VXLAN_GPE_ENABLED); 120 } 121 122 static bool 123 dr_mask_is_tnl_vxlan_gpe(struct mlx5dr_match_param *mask, 124 struct mlx5dr_domain *dmn) 125 { 126 return dr_mask_is_vxlan_gpe_set(&mask->misc3) && 127 dr_matcher_supp_vxlan_gpe(&dmn->info.caps); 128 } 129 130 static bool dr_mask_is_tnl_geneve_set(struct mlx5dr_match_misc *misc) 131 { 132 return misc->geneve_vni || 133 misc->geneve_oam || 134 misc->geneve_protocol_type || 135 misc->geneve_opt_len; 136 } 137 138 static bool dr_mask_is_tnl_geneve_tlv_opt(struct mlx5dr_match_misc3 *misc3) 139 { 140 return misc3->geneve_tlv_option_0_data; 141 } 142 143 static bool 144 dr_matcher_supp_tnl_geneve(struct mlx5dr_cmd_caps *caps) 145 { 146 return (caps->sw_format_ver == MLX5_STEERING_FORMAT_CONNECTX_6DX) || 147 (caps->flex_protocols & MLX5_FLEX_PARSER_GENEVE_ENABLED); 148 } 149 150 static bool 151 dr_mask_is_tnl_geneve(struct mlx5dr_match_param *mask, 152 struct mlx5dr_domain *dmn) 153 { 154 return dr_mask_is_tnl_geneve_set(&mask->misc) && 155 dr_matcher_supp_tnl_geneve(&dmn->info.caps); 156 } 157 158 static bool dr_mask_is_tnl_gtpu_set(struct mlx5dr_match_misc3 *misc3) 159 { 160 return misc3->gtpu_msg_flags || misc3->gtpu_msg_type || misc3->gtpu_teid; 161 } 162 163 static bool dr_matcher_supp_tnl_gtpu(struct mlx5dr_cmd_caps *caps) 164 { 165 return caps->flex_protocols & MLX5_FLEX_PARSER_GTPU_ENABLED; 166 } 167 168 static bool dr_mask_is_tnl_gtpu(struct mlx5dr_match_param *mask, 169 struct mlx5dr_domain *dmn) 170 { 171 return dr_mask_is_tnl_gtpu_set(&mask->misc3) && 172 dr_matcher_supp_tnl_gtpu(&dmn->info.caps); 173 } 174 175 static int dr_matcher_supp_tnl_gtpu_dw_0(struct mlx5dr_cmd_caps *caps) 176 { 177 return caps->flex_protocols & MLX5_FLEX_PARSER_GTPU_DW_0_ENABLED; 178 } 179 180 static bool dr_mask_is_tnl_gtpu_dw_0(struct mlx5dr_match_param *mask, 181 struct mlx5dr_domain *dmn) 182 { 183 return mask->misc3.gtpu_dw_0 && 184 dr_matcher_supp_tnl_gtpu_dw_0(&dmn->info.caps); 185 } 186 187 static int dr_matcher_supp_tnl_gtpu_teid(struct mlx5dr_cmd_caps *caps) 188 { 189 return caps->flex_protocols & MLX5_FLEX_PARSER_GTPU_TEID_ENABLED; 190 } 191 192 static bool dr_mask_is_tnl_gtpu_teid(struct mlx5dr_match_param *mask, 193 struct mlx5dr_domain *dmn) 194 { 195 return mask->misc3.gtpu_teid && 196 dr_matcher_supp_tnl_gtpu_teid(&dmn->info.caps); 197 } 198 199 static int dr_matcher_supp_tnl_gtpu_dw_2(struct mlx5dr_cmd_caps *caps) 200 { 201 return caps->flex_protocols & MLX5_FLEX_PARSER_GTPU_DW_2_ENABLED; 202 } 203 204 static bool dr_mask_is_tnl_gtpu_dw_2(struct mlx5dr_match_param *mask, 205 struct mlx5dr_domain *dmn) 206 { 207 return mask->misc3.gtpu_dw_2 && 208 dr_matcher_supp_tnl_gtpu_dw_2(&dmn->info.caps); 209 } 210 211 static int dr_matcher_supp_tnl_gtpu_first_ext(struct mlx5dr_cmd_caps *caps) 212 { 213 return caps->flex_protocols & MLX5_FLEX_PARSER_GTPU_FIRST_EXT_DW_0_ENABLED; 214 } 215 216 static bool dr_mask_is_tnl_gtpu_first_ext(struct mlx5dr_match_param *mask, 217 struct mlx5dr_domain *dmn) 218 { 219 return mask->misc3.gtpu_first_ext_dw_0 && 220 dr_matcher_supp_tnl_gtpu_first_ext(&dmn->info.caps); 221 } 222 223 static bool dr_mask_is_tnl_gtpu_flex_parser_0(struct mlx5dr_match_param *mask, 224 struct mlx5dr_domain *dmn) 225 { 226 struct mlx5dr_cmd_caps *caps = &dmn->info.caps; 227 228 return (dr_is_flex_parser_0_id(caps->flex_parser_id_gtpu_dw_0) && 229 dr_mask_is_tnl_gtpu_dw_0(mask, dmn)) || 230 (dr_is_flex_parser_0_id(caps->flex_parser_id_gtpu_teid) && 231 dr_mask_is_tnl_gtpu_teid(mask, dmn)) || 232 (dr_is_flex_parser_0_id(caps->flex_parser_id_gtpu_dw_2) && 233 dr_mask_is_tnl_gtpu_dw_2(mask, dmn)) || 234 (dr_is_flex_parser_0_id(caps->flex_parser_id_gtpu_first_ext_dw_0) && 235 dr_mask_is_tnl_gtpu_first_ext(mask, dmn)); 236 } 237 238 static bool dr_mask_is_tnl_gtpu_flex_parser_1(struct mlx5dr_match_param *mask, 239 struct mlx5dr_domain *dmn) 240 { 241 struct mlx5dr_cmd_caps *caps = &dmn->info.caps; 242 243 return (dr_is_flex_parser_1_id(caps->flex_parser_id_gtpu_dw_0) && 244 dr_mask_is_tnl_gtpu_dw_0(mask, dmn)) || 245 (dr_is_flex_parser_1_id(caps->flex_parser_id_gtpu_teid) && 246 dr_mask_is_tnl_gtpu_teid(mask, dmn)) || 247 (dr_is_flex_parser_1_id(caps->flex_parser_id_gtpu_dw_2) && 248 dr_mask_is_tnl_gtpu_dw_2(mask, dmn)) || 249 (dr_is_flex_parser_1_id(caps->flex_parser_id_gtpu_first_ext_dw_0) && 250 dr_mask_is_tnl_gtpu_first_ext(mask, dmn)); 251 } 252 253 static bool dr_mask_is_tnl_gtpu_any(struct mlx5dr_match_param *mask, 254 struct mlx5dr_domain *dmn) 255 { 256 return dr_mask_is_tnl_gtpu_flex_parser_0(mask, dmn) || 257 dr_mask_is_tnl_gtpu_flex_parser_1(mask, dmn) || 258 dr_mask_is_tnl_gtpu(mask, dmn); 259 } 260 261 static int dr_matcher_supp_icmp_v4(struct mlx5dr_cmd_caps *caps) 262 { 263 return (caps->sw_format_ver == MLX5_STEERING_FORMAT_CONNECTX_6DX) || 264 (caps->flex_protocols & MLX5_FLEX_PARSER_ICMP_V4_ENABLED); 265 } 266 267 static int dr_matcher_supp_icmp_v6(struct mlx5dr_cmd_caps *caps) 268 { 269 return (caps->sw_format_ver == MLX5_STEERING_FORMAT_CONNECTX_6DX) || 270 (caps->flex_protocols & MLX5_FLEX_PARSER_ICMP_V6_ENABLED); 271 } 272 273 static bool dr_mask_is_icmpv6_set(struct mlx5dr_match_misc3 *misc3) 274 { 275 return (misc3->icmpv6_type || misc3->icmpv6_code || 276 misc3->icmpv6_header_data); 277 } 278 279 static bool dr_mask_is_icmp(struct mlx5dr_match_param *mask, 280 struct mlx5dr_domain *dmn) 281 { 282 if (DR_MASK_IS_ICMPV4_SET(&mask->misc3)) 283 return dr_matcher_supp_icmp_v4(&dmn->info.caps); 284 else if (dr_mask_is_icmpv6_set(&mask->misc3)) 285 return dr_matcher_supp_icmp_v6(&dmn->info.caps); 286 287 return false; 288 } 289 290 static bool dr_mask_is_wqe_metadata_set(struct mlx5dr_match_misc2 *misc2) 291 { 292 return misc2->metadata_reg_a; 293 } 294 295 static bool dr_mask_is_reg_c_0_3_set(struct mlx5dr_match_misc2 *misc2) 296 { 297 return (misc2->metadata_reg_c_0 || misc2->metadata_reg_c_1 || 298 misc2->metadata_reg_c_2 || misc2->metadata_reg_c_3); 299 } 300 301 static bool dr_mask_is_reg_c_4_7_set(struct mlx5dr_match_misc2 *misc2) 302 { 303 return (misc2->metadata_reg_c_4 || misc2->metadata_reg_c_5 || 304 misc2->metadata_reg_c_6 || misc2->metadata_reg_c_7); 305 } 306 307 static bool dr_mask_is_gvmi_or_qpn_set(struct mlx5dr_match_misc *misc) 308 { 309 return (misc->source_sqn || misc->source_port); 310 } 311 312 static bool dr_mask_is_flex_parser_id_0_3_set(u32 flex_parser_id, 313 u32 flex_parser_value) 314 { 315 if (flex_parser_id) 316 return flex_parser_id <= DR_STE_MAX_FLEX_0_ID; 317 318 /* Using flex_parser 0 means that id is zero, thus value must be set. */ 319 return flex_parser_value; 320 } 321 322 static bool dr_mask_is_flex_parser_0_3_set(struct mlx5dr_match_misc4 *misc4) 323 { 324 return (dr_mask_is_flex_parser_id_0_3_set(misc4->prog_sample_field_id_0, 325 misc4->prog_sample_field_value_0) || 326 dr_mask_is_flex_parser_id_0_3_set(misc4->prog_sample_field_id_1, 327 misc4->prog_sample_field_value_1) || 328 dr_mask_is_flex_parser_id_0_3_set(misc4->prog_sample_field_id_2, 329 misc4->prog_sample_field_value_2) || 330 dr_mask_is_flex_parser_id_0_3_set(misc4->prog_sample_field_id_3, 331 misc4->prog_sample_field_value_3)); 332 } 333 334 static bool dr_mask_is_flex_parser_id_4_7_set(u32 flex_parser_id) 335 { 336 return flex_parser_id > DR_STE_MAX_FLEX_0_ID && 337 flex_parser_id <= DR_STE_MAX_FLEX_1_ID; 338 } 339 340 static bool dr_mask_is_flex_parser_4_7_set(struct mlx5dr_match_misc4 *misc4) 341 { 342 return (dr_mask_is_flex_parser_id_4_7_set(misc4->prog_sample_field_id_0) || 343 dr_mask_is_flex_parser_id_4_7_set(misc4->prog_sample_field_id_1) || 344 dr_mask_is_flex_parser_id_4_7_set(misc4->prog_sample_field_id_2) || 345 dr_mask_is_flex_parser_id_4_7_set(misc4->prog_sample_field_id_3)); 346 } 347 348 static int dr_matcher_supp_tnl_mpls_over_gre(struct mlx5dr_cmd_caps *caps) 349 { 350 return caps->flex_protocols & MLX5_FLEX_PARSER_MPLS_OVER_GRE_ENABLED; 351 } 352 353 static bool dr_mask_is_tnl_mpls_over_gre(struct mlx5dr_match_param *mask, 354 struct mlx5dr_domain *dmn) 355 { 356 return DR_MASK_IS_OUTER_MPLS_OVER_GRE_SET(&mask->misc2) && 357 dr_matcher_supp_tnl_mpls_over_gre(&dmn->info.caps); 358 } 359 360 static int dr_matcher_supp_tnl_mpls_over_udp(struct mlx5dr_cmd_caps *caps) 361 { 362 return caps->flex_protocols & mlx5_FLEX_PARSER_MPLS_OVER_UDP_ENABLED; 363 } 364 365 static bool dr_mask_is_tnl_mpls_over_udp(struct mlx5dr_match_param *mask, 366 struct mlx5dr_domain *dmn) 367 { 368 return DR_MASK_IS_OUTER_MPLS_OVER_UDP_SET(&mask->misc2) && 369 dr_matcher_supp_tnl_mpls_over_udp(&dmn->info.caps); 370 } 371 int mlx5dr_matcher_select_builders(struct mlx5dr_matcher *matcher, 372 struct mlx5dr_matcher_rx_tx *nic_matcher, 373 enum mlx5dr_ipv outer_ipv, 374 enum mlx5dr_ipv inner_ipv) 375 { 376 nic_matcher->ste_builder = 377 nic_matcher->ste_builder_arr[outer_ipv][inner_ipv]; 378 nic_matcher->num_of_builders = 379 nic_matcher->num_of_builders_arr[outer_ipv][inner_ipv]; 380 381 if (!nic_matcher->num_of_builders) { 382 mlx5dr_dbg(matcher->tbl->dmn, 383 "Rule not supported on this matcher due to IP related fields\n"); 384 return -EINVAL; 385 } 386 387 return 0; 388 } 389 390 static int dr_matcher_set_ste_builders(struct mlx5dr_matcher *matcher, 391 struct mlx5dr_matcher_rx_tx *nic_matcher, 392 enum mlx5dr_ipv outer_ipv, 393 enum mlx5dr_ipv inner_ipv) 394 { 395 struct mlx5dr_domain_rx_tx *nic_dmn = nic_matcher->nic_tbl->nic_dmn; 396 struct mlx5dr_domain *dmn = matcher->tbl->dmn; 397 struct mlx5dr_ste_ctx *ste_ctx = dmn->ste_ctx; 398 struct mlx5dr_match_param mask = {}; 399 struct mlx5dr_ste_build *sb; 400 bool inner, rx; 401 int idx = 0; 402 int ret, i; 403 404 sb = nic_matcher->ste_builder_arr[outer_ipv][inner_ipv]; 405 rx = nic_dmn->ste_type == MLX5DR_STE_TYPE_RX; 406 407 /* Create a temporary mask to track and clear used mask fields */ 408 if (matcher->match_criteria & DR_MATCHER_CRITERIA_OUTER) 409 mask.outer = matcher->mask.outer; 410 411 if (matcher->match_criteria & DR_MATCHER_CRITERIA_MISC) 412 mask.misc = matcher->mask.misc; 413 414 if (matcher->match_criteria & DR_MATCHER_CRITERIA_INNER) 415 mask.inner = matcher->mask.inner; 416 417 if (matcher->match_criteria & DR_MATCHER_CRITERIA_MISC2) 418 mask.misc2 = matcher->mask.misc2; 419 420 if (matcher->match_criteria & DR_MATCHER_CRITERIA_MISC3) 421 mask.misc3 = matcher->mask.misc3; 422 423 if (matcher->match_criteria & DR_MATCHER_CRITERIA_MISC4) 424 mask.misc4 = matcher->mask.misc4; 425 426 ret = mlx5dr_ste_build_pre_check(dmn, matcher->match_criteria, 427 &matcher->mask, NULL); 428 if (ret) 429 return ret; 430 431 /* Outer */ 432 if (matcher->match_criteria & (DR_MATCHER_CRITERIA_OUTER | 433 DR_MATCHER_CRITERIA_MISC | 434 DR_MATCHER_CRITERIA_MISC2 | 435 DR_MATCHER_CRITERIA_MISC3)) { 436 inner = false; 437 438 if (dr_mask_is_wqe_metadata_set(&mask.misc2)) 439 mlx5dr_ste_build_general_purpose(ste_ctx, &sb[idx++], 440 &mask, inner, rx); 441 442 if (dr_mask_is_reg_c_0_3_set(&mask.misc2)) 443 mlx5dr_ste_build_register_0(ste_ctx, &sb[idx++], 444 &mask, inner, rx); 445 446 if (dr_mask_is_reg_c_4_7_set(&mask.misc2)) 447 mlx5dr_ste_build_register_1(ste_ctx, &sb[idx++], 448 &mask, inner, rx); 449 450 if (dr_mask_is_gvmi_or_qpn_set(&mask.misc) && 451 (dmn->type == MLX5DR_DOMAIN_TYPE_FDB || 452 dmn->type == MLX5DR_DOMAIN_TYPE_NIC_RX)) { 453 mlx5dr_ste_build_src_gvmi_qpn(ste_ctx, &sb[idx++], 454 &mask, dmn, inner, rx); 455 } 456 457 if (dr_mask_is_smac_set(&mask.outer) && 458 dr_mask_is_dmac_set(&mask.outer)) { 459 mlx5dr_ste_build_eth_l2_src_dst(ste_ctx, &sb[idx++], 460 &mask, inner, rx); 461 } 462 463 if (dr_mask_is_smac_set(&mask.outer)) 464 mlx5dr_ste_build_eth_l2_src(ste_ctx, &sb[idx++], 465 &mask, inner, rx); 466 467 if (DR_MASK_IS_L2_DST(mask.outer, mask.misc, outer)) 468 mlx5dr_ste_build_eth_l2_dst(ste_ctx, &sb[idx++], 469 &mask, inner, rx); 470 471 if (outer_ipv == DR_RULE_IPV6) { 472 if (dr_mask_is_dst_addr_set(&mask.outer)) 473 mlx5dr_ste_build_eth_l3_ipv6_dst(ste_ctx, &sb[idx++], 474 &mask, inner, rx); 475 476 if (dr_mask_is_src_addr_set(&mask.outer)) 477 mlx5dr_ste_build_eth_l3_ipv6_src(ste_ctx, &sb[idx++], 478 &mask, inner, rx); 479 480 if (DR_MASK_IS_ETH_L4_SET(mask.outer, mask.misc, outer)) 481 mlx5dr_ste_build_eth_ipv6_l3_l4(ste_ctx, &sb[idx++], 482 &mask, inner, rx); 483 } else { 484 if (dr_mask_is_ipv4_5_tuple_set(&mask.outer)) 485 mlx5dr_ste_build_eth_l3_ipv4_5_tuple(ste_ctx, &sb[idx++], 486 &mask, inner, rx); 487 488 if (dr_mask_is_ttl_set(&mask.outer)) 489 mlx5dr_ste_build_eth_l3_ipv4_misc(ste_ctx, &sb[idx++], 490 &mask, inner, rx); 491 } 492 493 if (dr_mask_is_tnl_vxlan_gpe(&mask, dmn)) 494 mlx5dr_ste_build_tnl_vxlan_gpe(ste_ctx, &sb[idx++], 495 &mask, inner, rx); 496 else if (dr_mask_is_tnl_geneve(&mask, dmn)) { 497 mlx5dr_ste_build_tnl_geneve(ste_ctx, &sb[idx++], 498 &mask, inner, rx); 499 if (dr_mask_is_tnl_geneve_tlv_opt(&mask.misc3)) 500 mlx5dr_ste_build_tnl_geneve_tlv_opt(ste_ctx, &sb[idx++], 501 &mask, &dmn->info.caps, 502 inner, rx); 503 } else if (dr_mask_is_tnl_gtpu_any(&mask, dmn)) { 504 if (dr_mask_is_tnl_gtpu_flex_parser_0(&mask, dmn)) 505 mlx5dr_ste_build_tnl_gtpu_flex_parser_0(ste_ctx, &sb[idx++], 506 &mask, &dmn->info.caps, 507 inner, rx); 508 509 if (dr_mask_is_tnl_gtpu_flex_parser_1(&mask, dmn)) 510 mlx5dr_ste_build_tnl_gtpu_flex_parser_1(ste_ctx, &sb[idx++], 511 &mask, &dmn->info.caps, 512 inner, rx); 513 514 if (dr_mask_is_tnl_gtpu(&mask, dmn)) 515 mlx5dr_ste_build_tnl_gtpu(ste_ctx, &sb[idx++], 516 &mask, inner, rx); 517 } 518 519 if (DR_MASK_IS_ETH_L4_MISC_SET(mask.misc3, outer)) 520 mlx5dr_ste_build_eth_l4_misc(ste_ctx, &sb[idx++], 521 &mask, inner, rx); 522 523 if (DR_MASK_IS_FIRST_MPLS_SET(mask.misc2, outer)) 524 mlx5dr_ste_build_mpls(ste_ctx, &sb[idx++], 525 &mask, inner, rx); 526 527 if (dr_mask_is_tnl_mpls_over_gre(&mask, dmn)) 528 mlx5dr_ste_build_tnl_mpls_over_gre(ste_ctx, &sb[idx++], 529 &mask, &dmn->info.caps, 530 inner, rx); 531 else if (dr_mask_is_tnl_mpls_over_udp(&mask, dmn)) 532 mlx5dr_ste_build_tnl_mpls_over_udp(ste_ctx, &sb[idx++], 533 &mask, &dmn->info.caps, 534 inner, rx); 535 536 if (dr_mask_is_icmp(&mask, dmn)) 537 mlx5dr_ste_build_icmp(ste_ctx, &sb[idx++], 538 &mask, &dmn->info.caps, 539 inner, rx); 540 541 if (dr_mask_is_tnl_gre_set(&mask.misc)) 542 mlx5dr_ste_build_tnl_gre(ste_ctx, &sb[idx++], 543 &mask, inner, rx); 544 } 545 546 /* Inner */ 547 if (matcher->match_criteria & (DR_MATCHER_CRITERIA_INNER | 548 DR_MATCHER_CRITERIA_MISC | 549 DR_MATCHER_CRITERIA_MISC2 | 550 DR_MATCHER_CRITERIA_MISC3)) { 551 inner = true; 552 553 if (dr_mask_is_eth_l2_tnl_set(&mask.misc)) 554 mlx5dr_ste_build_eth_l2_tnl(ste_ctx, &sb[idx++], 555 &mask, inner, rx); 556 557 if (dr_mask_is_smac_set(&mask.inner) && 558 dr_mask_is_dmac_set(&mask.inner)) { 559 mlx5dr_ste_build_eth_l2_src_dst(ste_ctx, &sb[idx++], 560 &mask, inner, rx); 561 } 562 563 if (dr_mask_is_smac_set(&mask.inner)) 564 mlx5dr_ste_build_eth_l2_src(ste_ctx, &sb[idx++], 565 &mask, inner, rx); 566 567 if (DR_MASK_IS_L2_DST(mask.inner, mask.misc, inner)) 568 mlx5dr_ste_build_eth_l2_dst(ste_ctx, &sb[idx++], 569 &mask, inner, rx); 570 571 if (inner_ipv == DR_RULE_IPV6) { 572 if (dr_mask_is_dst_addr_set(&mask.inner)) 573 mlx5dr_ste_build_eth_l3_ipv6_dst(ste_ctx, &sb[idx++], 574 &mask, inner, rx); 575 576 if (dr_mask_is_src_addr_set(&mask.inner)) 577 mlx5dr_ste_build_eth_l3_ipv6_src(ste_ctx, &sb[idx++], 578 &mask, inner, rx); 579 580 if (DR_MASK_IS_ETH_L4_SET(mask.inner, mask.misc, inner)) 581 mlx5dr_ste_build_eth_ipv6_l3_l4(ste_ctx, &sb[idx++], 582 &mask, inner, rx); 583 } else { 584 if (dr_mask_is_ipv4_5_tuple_set(&mask.inner)) 585 mlx5dr_ste_build_eth_l3_ipv4_5_tuple(ste_ctx, &sb[idx++], 586 &mask, inner, rx); 587 588 if (dr_mask_is_ttl_set(&mask.inner)) 589 mlx5dr_ste_build_eth_l3_ipv4_misc(ste_ctx, &sb[idx++], 590 &mask, inner, rx); 591 } 592 593 if (DR_MASK_IS_ETH_L4_MISC_SET(mask.misc3, inner)) 594 mlx5dr_ste_build_eth_l4_misc(ste_ctx, &sb[idx++], 595 &mask, inner, rx); 596 597 if (DR_MASK_IS_FIRST_MPLS_SET(mask.misc2, inner)) 598 mlx5dr_ste_build_mpls(ste_ctx, &sb[idx++], 599 &mask, inner, rx); 600 601 if (dr_mask_is_tnl_mpls_over_gre(&mask, dmn)) 602 mlx5dr_ste_build_tnl_mpls_over_gre(ste_ctx, &sb[idx++], 603 &mask, &dmn->info.caps, 604 inner, rx); 605 else if (dr_mask_is_tnl_mpls_over_udp(&mask, dmn)) 606 mlx5dr_ste_build_tnl_mpls_over_udp(ste_ctx, &sb[idx++], 607 &mask, &dmn->info.caps, 608 inner, rx); 609 } 610 611 if (matcher->match_criteria & DR_MATCHER_CRITERIA_MISC4) { 612 if (dr_mask_is_flex_parser_0_3_set(&mask.misc4)) 613 mlx5dr_ste_build_flex_parser_0(ste_ctx, &sb[idx++], 614 &mask, false, rx); 615 616 if (dr_mask_is_flex_parser_4_7_set(&mask.misc4)) 617 mlx5dr_ste_build_flex_parser_1(ste_ctx, &sb[idx++], 618 &mask, false, rx); 619 } 620 621 /* Empty matcher, takes all */ 622 if (matcher->match_criteria == DR_MATCHER_CRITERIA_EMPTY) 623 mlx5dr_ste_build_empty_always_hit(&sb[idx++], rx); 624 625 if (idx == 0) { 626 mlx5dr_err(dmn, "Cannot generate any valid rules from mask\n"); 627 return -EINVAL; 628 } 629 630 /* Check that all mask fields were consumed */ 631 for (i = 0; i < sizeof(struct mlx5dr_match_param); i++) { 632 if (((u8 *)&mask)[i] != 0) { 633 mlx5dr_dbg(dmn, "Mask contains unsupported parameters\n"); 634 return -EOPNOTSUPP; 635 } 636 } 637 638 nic_matcher->ste_builder = sb; 639 nic_matcher->num_of_builders_arr[outer_ipv][inner_ipv] = idx; 640 641 return 0; 642 } 643 644 static int dr_matcher_connect(struct mlx5dr_domain *dmn, 645 struct mlx5dr_matcher_rx_tx *curr_nic_matcher, 646 struct mlx5dr_matcher_rx_tx *next_nic_matcher, 647 struct mlx5dr_matcher_rx_tx *prev_nic_matcher) 648 { 649 struct mlx5dr_table_rx_tx *nic_tbl = curr_nic_matcher->nic_tbl; 650 struct mlx5dr_domain_rx_tx *nic_dmn = nic_tbl->nic_dmn; 651 struct mlx5dr_htbl_connect_info info; 652 struct mlx5dr_ste_htbl *prev_htbl; 653 int ret; 654 655 /* Connect end anchor hash table to next_htbl or to the default address */ 656 if (next_nic_matcher) { 657 info.type = CONNECT_HIT; 658 info.hit_next_htbl = next_nic_matcher->s_htbl; 659 } else { 660 info.type = CONNECT_MISS; 661 info.miss_icm_addr = nic_tbl->default_icm_addr; 662 } 663 ret = mlx5dr_ste_htbl_init_and_postsend(dmn, nic_dmn, 664 curr_nic_matcher->e_anchor, 665 &info, info.type == CONNECT_HIT); 666 if (ret) 667 return ret; 668 669 /* Connect start hash table to end anchor */ 670 info.type = CONNECT_MISS; 671 info.miss_icm_addr = curr_nic_matcher->e_anchor->chunk->icm_addr; 672 ret = mlx5dr_ste_htbl_init_and_postsend(dmn, nic_dmn, 673 curr_nic_matcher->s_htbl, 674 &info, false); 675 if (ret) 676 return ret; 677 678 /* Connect previous hash table to matcher start hash table */ 679 if (prev_nic_matcher) 680 prev_htbl = prev_nic_matcher->e_anchor; 681 else 682 prev_htbl = nic_tbl->s_anchor; 683 684 info.type = CONNECT_HIT; 685 info.hit_next_htbl = curr_nic_matcher->s_htbl; 686 ret = mlx5dr_ste_htbl_init_and_postsend(dmn, nic_dmn, prev_htbl, 687 &info, true); 688 if (ret) 689 return ret; 690 691 /* Update the pointing ste and next hash table */ 692 curr_nic_matcher->s_htbl->pointing_ste = prev_htbl->ste_arr; 693 prev_htbl->ste_arr[0].next_htbl = curr_nic_matcher->s_htbl; 694 695 if (next_nic_matcher) { 696 next_nic_matcher->s_htbl->pointing_ste = curr_nic_matcher->e_anchor->ste_arr; 697 curr_nic_matcher->e_anchor->ste_arr[0].next_htbl = next_nic_matcher->s_htbl; 698 } 699 700 return 0; 701 } 702 703 static int dr_matcher_add_to_tbl(struct mlx5dr_matcher *matcher) 704 { 705 struct mlx5dr_matcher *next_matcher, *prev_matcher, *tmp_matcher; 706 struct mlx5dr_table *tbl = matcher->tbl; 707 struct mlx5dr_domain *dmn = tbl->dmn; 708 bool first = true; 709 int ret; 710 711 next_matcher = NULL; 712 list_for_each_entry(tmp_matcher, &tbl->matcher_list, matcher_list) { 713 if (tmp_matcher->prio >= matcher->prio) { 714 next_matcher = tmp_matcher; 715 break; 716 } 717 first = false; 718 } 719 720 prev_matcher = NULL; 721 if (next_matcher && !first) 722 prev_matcher = list_prev_entry(next_matcher, matcher_list); 723 else if (!first) 724 prev_matcher = list_last_entry(&tbl->matcher_list, 725 struct mlx5dr_matcher, 726 matcher_list); 727 728 if (dmn->type == MLX5DR_DOMAIN_TYPE_FDB || 729 dmn->type == MLX5DR_DOMAIN_TYPE_NIC_RX) { 730 ret = dr_matcher_connect(dmn, &matcher->rx, 731 next_matcher ? &next_matcher->rx : NULL, 732 prev_matcher ? &prev_matcher->rx : NULL); 733 if (ret) 734 return ret; 735 } 736 737 if (dmn->type == MLX5DR_DOMAIN_TYPE_FDB || 738 dmn->type == MLX5DR_DOMAIN_TYPE_NIC_TX) { 739 ret = dr_matcher_connect(dmn, &matcher->tx, 740 next_matcher ? &next_matcher->tx : NULL, 741 prev_matcher ? &prev_matcher->tx : NULL); 742 if (ret) 743 return ret; 744 } 745 746 if (prev_matcher) 747 list_add(&matcher->matcher_list, &prev_matcher->matcher_list); 748 else if (next_matcher) 749 list_add_tail(&matcher->matcher_list, 750 &next_matcher->matcher_list); 751 else 752 list_add(&matcher->matcher_list, &tbl->matcher_list); 753 754 return 0; 755 } 756 757 static void dr_matcher_uninit_nic(struct mlx5dr_matcher_rx_tx *nic_matcher) 758 { 759 mlx5dr_htbl_put(nic_matcher->s_htbl); 760 mlx5dr_htbl_put(nic_matcher->e_anchor); 761 } 762 763 static void dr_matcher_uninit_fdb(struct mlx5dr_matcher *matcher) 764 { 765 dr_matcher_uninit_nic(&matcher->rx); 766 dr_matcher_uninit_nic(&matcher->tx); 767 } 768 769 static void dr_matcher_uninit(struct mlx5dr_matcher *matcher) 770 { 771 struct mlx5dr_domain *dmn = matcher->tbl->dmn; 772 773 switch (dmn->type) { 774 case MLX5DR_DOMAIN_TYPE_NIC_RX: 775 dr_matcher_uninit_nic(&matcher->rx); 776 break; 777 case MLX5DR_DOMAIN_TYPE_NIC_TX: 778 dr_matcher_uninit_nic(&matcher->tx); 779 break; 780 case MLX5DR_DOMAIN_TYPE_FDB: 781 dr_matcher_uninit_fdb(matcher); 782 break; 783 default: 784 WARN_ON(true); 785 break; 786 } 787 } 788 789 static int dr_matcher_set_all_ste_builders(struct mlx5dr_matcher *matcher, 790 struct mlx5dr_matcher_rx_tx *nic_matcher) 791 { 792 struct mlx5dr_domain *dmn = matcher->tbl->dmn; 793 794 dr_matcher_set_ste_builders(matcher, nic_matcher, DR_RULE_IPV4, DR_RULE_IPV4); 795 dr_matcher_set_ste_builders(matcher, nic_matcher, DR_RULE_IPV4, DR_RULE_IPV6); 796 dr_matcher_set_ste_builders(matcher, nic_matcher, DR_RULE_IPV6, DR_RULE_IPV4); 797 dr_matcher_set_ste_builders(matcher, nic_matcher, DR_RULE_IPV6, DR_RULE_IPV6); 798 799 if (!nic_matcher->ste_builder) { 800 mlx5dr_err(dmn, "Cannot generate IPv4 or IPv6 rules with given mask\n"); 801 return -EINVAL; 802 } 803 804 return 0; 805 } 806 807 static int dr_matcher_init_nic(struct mlx5dr_matcher *matcher, 808 struct mlx5dr_matcher_rx_tx *nic_matcher) 809 { 810 struct mlx5dr_domain *dmn = matcher->tbl->dmn; 811 int ret; 812 813 ret = dr_matcher_set_all_ste_builders(matcher, nic_matcher); 814 if (ret) 815 return ret; 816 817 nic_matcher->e_anchor = mlx5dr_ste_htbl_alloc(dmn->ste_icm_pool, 818 DR_CHUNK_SIZE_1, 819 MLX5DR_STE_LU_TYPE_DONT_CARE, 820 0); 821 if (!nic_matcher->e_anchor) 822 return -ENOMEM; 823 824 nic_matcher->s_htbl = mlx5dr_ste_htbl_alloc(dmn->ste_icm_pool, 825 DR_CHUNK_SIZE_1, 826 nic_matcher->ste_builder[0].lu_type, 827 nic_matcher->ste_builder[0].byte_mask); 828 if (!nic_matcher->s_htbl) { 829 ret = -ENOMEM; 830 goto free_e_htbl; 831 } 832 833 /* make sure the tables exist while empty */ 834 mlx5dr_htbl_get(nic_matcher->s_htbl); 835 mlx5dr_htbl_get(nic_matcher->e_anchor); 836 837 return 0; 838 839 free_e_htbl: 840 mlx5dr_ste_htbl_free(nic_matcher->e_anchor); 841 return ret; 842 } 843 844 static int dr_matcher_init_fdb(struct mlx5dr_matcher *matcher) 845 { 846 int ret; 847 848 ret = dr_matcher_init_nic(matcher, &matcher->rx); 849 if (ret) 850 return ret; 851 852 ret = dr_matcher_init_nic(matcher, &matcher->tx); 853 if (ret) 854 goto uninit_nic_rx; 855 856 return 0; 857 858 uninit_nic_rx: 859 dr_matcher_uninit_nic(&matcher->rx); 860 return ret; 861 } 862 863 static int dr_matcher_init(struct mlx5dr_matcher *matcher, 864 struct mlx5dr_match_parameters *mask) 865 { 866 struct mlx5dr_table *tbl = matcher->tbl; 867 struct mlx5dr_domain *dmn = tbl->dmn; 868 int ret; 869 870 if (matcher->match_criteria >= DR_MATCHER_CRITERIA_MAX) { 871 mlx5dr_err(dmn, "Invalid match criteria attribute\n"); 872 return -EINVAL; 873 } 874 875 if (mask) { 876 if (mask->match_sz > DR_SZ_MATCH_PARAM) { 877 mlx5dr_err(dmn, "Invalid match size attribute\n"); 878 return -EINVAL; 879 } 880 mlx5dr_ste_copy_param(matcher->match_criteria, 881 &matcher->mask, mask); 882 } 883 884 switch (dmn->type) { 885 case MLX5DR_DOMAIN_TYPE_NIC_RX: 886 matcher->rx.nic_tbl = &tbl->rx; 887 ret = dr_matcher_init_nic(matcher, &matcher->rx); 888 break; 889 case MLX5DR_DOMAIN_TYPE_NIC_TX: 890 matcher->tx.nic_tbl = &tbl->tx; 891 ret = dr_matcher_init_nic(matcher, &matcher->tx); 892 break; 893 case MLX5DR_DOMAIN_TYPE_FDB: 894 matcher->rx.nic_tbl = &tbl->rx; 895 matcher->tx.nic_tbl = &tbl->tx; 896 ret = dr_matcher_init_fdb(matcher); 897 break; 898 default: 899 WARN_ON(true); 900 return -EINVAL; 901 } 902 903 return ret; 904 } 905 906 struct mlx5dr_matcher * 907 mlx5dr_matcher_create(struct mlx5dr_table *tbl, 908 u32 priority, 909 u8 match_criteria_enable, 910 struct mlx5dr_match_parameters *mask) 911 { 912 struct mlx5dr_matcher *matcher; 913 int ret; 914 915 refcount_inc(&tbl->refcount); 916 917 matcher = kzalloc(sizeof(*matcher), GFP_KERNEL); 918 if (!matcher) 919 goto dec_ref; 920 921 matcher->tbl = tbl; 922 matcher->prio = priority; 923 matcher->match_criteria = match_criteria_enable; 924 refcount_set(&matcher->refcount, 1); 925 INIT_LIST_HEAD(&matcher->matcher_list); 926 927 mlx5dr_domain_lock(tbl->dmn); 928 929 ret = dr_matcher_init(matcher, mask); 930 if (ret) 931 goto free_matcher; 932 933 ret = dr_matcher_add_to_tbl(matcher); 934 if (ret) 935 goto matcher_uninit; 936 937 mlx5dr_domain_unlock(tbl->dmn); 938 939 return matcher; 940 941 matcher_uninit: 942 dr_matcher_uninit(matcher); 943 free_matcher: 944 mlx5dr_domain_unlock(tbl->dmn); 945 kfree(matcher); 946 dec_ref: 947 refcount_dec(&tbl->refcount); 948 return NULL; 949 } 950 951 static int dr_matcher_disconnect(struct mlx5dr_domain *dmn, 952 struct mlx5dr_table_rx_tx *nic_tbl, 953 struct mlx5dr_matcher_rx_tx *next_nic_matcher, 954 struct mlx5dr_matcher_rx_tx *prev_nic_matcher) 955 { 956 struct mlx5dr_domain_rx_tx *nic_dmn = nic_tbl->nic_dmn; 957 struct mlx5dr_htbl_connect_info info; 958 struct mlx5dr_ste_htbl *prev_anchor; 959 960 if (prev_nic_matcher) 961 prev_anchor = prev_nic_matcher->e_anchor; 962 else 963 prev_anchor = nic_tbl->s_anchor; 964 965 /* Connect previous anchor hash table to next matcher or to the default address */ 966 if (next_nic_matcher) { 967 info.type = CONNECT_HIT; 968 info.hit_next_htbl = next_nic_matcher->s_htbl; 969 next_nic_matcher->s_htbl->pointing_ste = prev_anchor->ste_arr; 970 prev_anchor->ste_arr[0].next_htbl = next_nic_matcher->s_htbl; 971 } else { 972 info.type = CONNECT_MISS; 973 info.miss_icm_addr = nic_tbl->default_icm_addr; 974 prev_anchor->ste_arr[0].next_htbl = NULL; 975 } 976 977 return mlx5dr_ste_htbl_init_and_postsend(dmn, nic_dmn, prev_anchor, 978 &info, true); 979 } 980 981 static int dr_matcher_remove_from_tbl(struct mlx5dr_matcher *matcher) 982 { 983 struct mlx5dr_matcher *prev_matcher, *next_matcher; 984 struct mlx5dr_table *tbl = matcher->tbl; 985 struct mlx5dr_domain *dmn = tbl->dmn; 986 int ret = 0; 987 988 if (list_is_last(&matcher->matcher_list, &tbl->matcher_list)) 989 next_matcher = NULL; 990 else 991 next_matcher = list_next_entry(matcher, matcher_list); 992 993 if (matcher->matcher_list.prev == &tbl->matcher_list) 994 prev_matcher = NULL; 995 else 996 prev_matcher = list_prev_entry(matcher, matcher_list); 997 998 if (dmn->type == MLX5DR_DOMAIN_TYPE_FDB || 999 dmn->type == MLX5DR_DOMAIN_TYPE_NIC_RX) { 1000 ret = dr_matcher_disconnect(dmn, &tbl->rx, 1001 next_matcher ? &next_matcher->rx : NULL, 1002 prev_matcher ? &prev_matcher->rx : NULL); 1003 if (ret) 1004 return ret; 1005 } 1006 1007 if (dmn->type == MLX5DR_DOMAIN_TYPE_FDB || 1008 dmn->type == MLX5DR_DOMAIN_TYPE_NIC_TX) { 1009 ret = dr_matcher_disconnect(dmn, &tbl->tx, 1010 next_matcher ? &next_matcher->tx : NULL, 1011 prev_matcher ? &prev_matcher->tx : NULL); 1012 if (ret) 1013 return ret; 1014 } 1015 1016 list_del(&matcher->matcher_list); 1017 1018 return 0; 1019 } 1020 1021 int mlx5dr_matcher_destroy(struct mlx5dr_matcher *matcher) 1022 { 1023 struct mlx5dr_table *tbl = matcher->tbl; 1024 1025 if (refcount_read(&matcher->refcount) > 1) 1026 return -EBUSY; 1027 1028 mlx5dr_domain_lock(tbl->dmn); 1029 1030 dr_matcher_remove_from_tbl(matcher); 1031 dr_matcher_uninit(matcher); 1032 refcount_dec(&matcher->tbl->refcount); 1033 1034 mlx5dr_domain_unlock(tbl->dmn); 1035 kfree(matcher); 1036 1037 return 0; 1038 } 1039