1 // SPDX-License-Identifier: GPL-2.0 OR Linux-OpenIB 2 /* Copyright (c) 2019 Mellanox Technologies. */ 3 4 #include "dr_types.h" 5 6 enum dr_action_domain { 7 DR_ACTION_DOMAIN_NIC_INGRESS, 8 DR_ACTION_DOMAIN_NIC_EGRESS, 9 DR_ACTION_DOMAIN_FDB_INGRESS, 10 DR_ACTION_DOMAIN_FDB_EGRESS, 11 DR_ACTION_DOMAIN_MAX, 12 }; 13 14 enum dr_action_valid_state { 15 DR_ACTION_STATE_ERR, 16 DR_ACTION_STATE_NO_ACTION, 17 DR_ACTION_STATE_REFORMAT, 18 DR_ACTION_STATE_MODIFY_HDR, 19 DR_ACTION_STATE_MODIFY_VLAN, 20 DR_ACTION_STATE_NON_TERM, 21 DR_ACTION_STATE_TERM, 22 DR_ACTION_STATE_MAX, 23 }; 24 25 static const enum dr_action_valid_state 26 next_action_state[DR_ACTION_DOMAIN_MAX][DR_ACTION_STATE_MAX][DR_ACTION_TYP_MAX] = { 27 [DR_ACTION_DOMAIN_NIC_INGRESS] = { 28 [DR_ACTION_STATE_NO_ACTION] = { 29 [DR_ACTION_TYP_DROP] = DR_ACTION_STATE_TERM, 30 [DR_ACTION_TYP_QP] = DR_ACTION_STATE_TERM, 31 [DR_ACTION_TYP_FT] = DR_ACTION_STATE_TERM, 32 [DR_ACTION_TYP_TAG] = DR_ACTION_STATE_NON_TERM, 33 [DR_ACTION_TYP_CTR] = DR_ACTION_STATE_NON_TERM, 34 [DR_ACTION_TYP_TNL_L2_TO_L2] = DR_ACTION_STATE_REFORMAT, 35 [DR_ACTION_TYP_TNL_L3_TO_L2] = DR_ACTION_STATE_REFORMAT, 36 [DR_ACTION_TYP_MODIFY_HDR] = DR_ACTION_STATE_MODIFY_HDR, 37 [DR_ACTION_TYP_POP_VLAN] = DR_ACTION_STATE_MODIFY_VLAN, 38 }, 39 [DR_ACTION_STATE_REFORMAT] = { 40 [DR_ACTION_TYP_DROP] = DR_ACTION_STATE_TERM, 41 [DR_ACTION_TYP_QP] = DR_ACTION_STATE_TERM, 42 [DR_ACTION_TYP_FT] = DR_ACTION_STATE_TERM, 43 [DR_ACTION_TYP_TAG] = DR_ACTION_STATE_REFORMAT, 44 [DR_ACTION_TYP_CTR] = DR_ACTION_STATE_REFORMAT, 45 [DR_ACTION_TYP_MODIFY_HDR] = DR_ACTION_STATE_MODIFY_HDR, 46 [DR_ACTION_TYP_POP_VLAN] = DR_ACTION_STATE_MODIFY_VLAN, 47 }, 48 [DR_ACTION_STATE_MODIFY_HDR] = { 49 [DR_ACTION_TYP_DROP] = DR_ACTION_STATE_TERM, 50 [DR_ACTION_TYP_QP] = DR_ACTION_STATE_TERM, 51 [DR_ACTION_TYP_FT] = DR_ACTION_STATE_TERM, 52 [DR_ACTION_TYP_TAG] = DR_ACTION_STATE_MODIFY_HDR, 53 [DR_ACTION_TYP_CTR] = DR_ACTION_STATE_MODIFY_HDR, 54 }, 55 [DR_ACTION_STATE_MODIFY_VLAN] = { 56 [DR_ACTION_TYP_DROP] = DR_ACTION_STATE_TERM, 57 [DR_ACTION_TYP_QP] = DR_ACTION_STATE_TERM, 58 [DR_ACTION_TYP_FT] = DR_ACTION_STATE_TERM, 59 [DR_ACTION_TYP_TAG] = DR_ACTION_STATE_MODIFY_VLAN, 60 [DR_ACTION_TYP_CTR] = DR_ACTION_STATE_MODIFY_VLAN, 61 [DR_ACTION_TYP_POP_VLAN] = DR_ACTION_STATE_MODIFY_VLAN, 62 [DR_ACTION_TYP_MODIFY_HDR] = DR_ACTION_STATE_MODIFY_HDR, 63 }, 64 [DR_ACTION_STATE_NON_TERM] = { 65 [DR_ACTION_TYP_DROP] = DR_ACTION_STATE_TERM, 66 [DR_ACTION_TYP_QP] = DR_ACTION_STATE_TERM, 67 [DR_ACTION_TYP_FT] = DR_ACTION_STATE_TERM, 68 [DR_ACTION_TYP_TAG] = DR_ACTION_STATE_NON_TERM, 69 [DR_ACTION_TYP_CTR] = DR_ACTION_STATE_NON_TERM, 70 [DR_ACTION_TYP_TNL_L2_TO_L2] = DR_ACTION_STATE_REFORMAT, 71 [DR_ACTION_TYP_TNL_L3_TO_L2] = DR_ACTION_STATE_REFORMAT, 72 [DR_ACTION_TYP_MODIFY_HDR] = DR_ACTION_STATE_MODIFY_HDR, 73 [DR_ACTION_TYP_POP_VLAN] = DR_ACTION_STATE_MODIFY_VLAN, 74 }, 75 [DR_ACTION_STATE_TERM] = { 76 [DR_ACTION_TYP_CTR] = DR_ACTION_STATE_TERM, 77 }, 78 }, 79 [DR_ACTION_DOMAIN_NIC_EGRESS] = { 80 [DR_ACTION_STATE_NO_ACTION] = { 81 [DR_ACTION_TYP_DROP] = DR_ACTION_STATE_TERM, 82 [DR_ACTION_TYP_FT] = DR_ACTION_STATE_TERM, 83 [DR_ACTION_TYP_CTR] = DR_ACTION_STATE_NON_TERM, 84 [DR_ACTION_TYP_L2_TO_TNL_L2] = DR_ACTION_STATE_REFORMAT, 85 [DR_ACTION_TYP_L2_TO_TNL_L3] = DR_ACTION_STATE_REFORMAT, 86 [DR_ACTION_TYP_MODIFY_HDR] = DR_ACTION_STATE_MODIFY_HDR, 87 [DR_ACTION_TYP_PUSH_VLAN] = DR_ACTION_STATE_MODIFY_VLAN, 88 }, 89 [DR_ACTION_STATE_REFORMAT] = { 90 [DR_ACTION_TYP_DROP] = DR_ACTION_STATE_TERM, 91 [DR_ACTION_TYP_FT] = DR_ACTION_STATE_TERM, 92 [DR_ACTION_TYP_CTR] = DR_ACTION_STATE_REFORMAT, 93 }, 94 [DR_ACTION_STATE_MODIFY_HDR] = { 95 [DR_ACTION_TYP_DROP] = DR_ACTION_STATE_TERM, 96 [DR_ACTION_TYP_FT] = DR_ACTION_STATE_TERM, 97 [DR_ACTION_TYP_CTR] = DR_ACTION_STATE_MODIFY_HDR, 98 [DR_ACTION_TYP_L2_TO_TNL_L2] = DR_ACTION_STATE_REFORMAT, 99 [DR_ACTION_TYP_L2_TO_TNL_L3] = DR_ACTION_STATE_REFORMAT, 100 [DR_ACTION_TYP_PUSH_VLAN] = DR_ACTION_STATE_MODIFY_VLAN, 101 }, 102 [DR_ACTION_STATE_MODIFY_VLAN] = { 103 [DR_ACTION_TYP_DROP] = DR_ACTION_STATE_TERM, 104 [DR_ACTION_TYP_FT] = DR_ACTION_STATE_TERM, 105 [DR_ACTION_TYP_CTR] = DR_ACTION_STATE_MODIFY_VLAN, 106 [DR_ACTION_TYP_PUSH_VLAN] = DR_ACTION_STATE_MODIFY_VLAN, 107 [DR_ACTION_TYP_L2_TO_TNL_L2] = DR_ACTION_STATE_REFORMAT, 108 [DR_ACTION_TYP_L2_TO_TNL_L3] = DR_ACTION_STATE_REFORMAT, 109 }, 110 [DR_ACTION_STATE_NON_TERM] = { 111 [DR_ACTION_TYP_DROP] = DR_ACTION_STATE_TERM, 112 [DR_ACTION_TYP_FT] = DR_ACTION_STATE_TERM, 113 [DR_ACTION_TYP_CTR] = DR_ACTION_STATE_NON_TERM, 114 [DR_ACTION_TYP_L2_TO_TNL_L2] = DR_ACTION_STATE_REFORMAT, 115 [DR_ACTION_TYP_L2_TO_TNL_L3] = DR_ACTION_STATE_REFORMAT, 116 [DR_ACTION_TYP_MODIFY_HDR] = DR_ACTION_STATE_MODIFY_HDR, 117 [DR_ACTION_TYP_PUSH_VLAN] = DR_ACTION_STATE_MODIFY_VLAN, 118 }, 119 [DR_ACTION_STATE_TERM] = { 120 [DR_ACTION_TYP_CTR] = DR_ACTION_STATE_TERM, 121 }, 122 }, 123 [DR_ACTION_DOMAIN_FDB_INGRESS] = { 124 [DR_ACTION_STATE_NO_ACTION] = { 125 [DR_ACTION_TYP_DROP] = DR_ACTION_STATE_TERM, 126 [DR_ACTION_TYP_FT] = DR_ACTION_STATE_TERM, 127 [DR_ACTION_TYP_CTR] = DR_ACTION_STATE_NON_TERM, 128 [DR_ACTION_TYP_TNL_L2_TO_L2] = DR_ACTION_STATE_REFORMAT, 129 [DR_ACTION_TYP_TNL_L3_TO_L2] = DR_ACTION_STATE_REFORMAT, 130 [DR_ACTION_TYP_MODIFY_HDR] = DR_ACTION_STATE_MODIFY_HDR, 131 [DR_ACTION_TYP_POP_VLAN] = DR_ACTION_STATE_MODIFY_VLAN, 132 [DR_ACTION_TYP_VPORT] = DR_ACTION_STATE_TERM, 133 }, 134 [DR_ACTION_STATE_REFORMAT] = { 135 [DR_ACTION_TYP_DROP] = DR_ACTION_STATE_TERM, 136 [DR_ACTION_TYP_FT] = DR_ACTION_STATE_TERM, 137 [DR_ACTION_TYP_CTR] = DR_ACTION_STATE_REFORMAT, 138 [DR_ACTION_TYP_MODIFY_HDR] = DR_ACTION_STATE_MODIFY_HDR, 139 [DR_ACTION_TYP_POP_VLAN] = DR_ACTION_STATE_MODIFY_VLAN, 140 [DR_ACTION_TYP_VPORT] = DR_ACTION_STATE_TERM, 141 }, 142 [DR_ACTION_STATE_MODIFY_HDR] = { 143 [DR_ACTION_TYP_DROP] = DR_ACTION_STATE_TERM, 144 [DR_ACTION_TYP_FT] = DR_ACTION_STATE_TERM, 145 [DR_ACTION_TYP_CTR] = DR_ACTION_STATE_MODIFY_HDR, 146 [DR_ACTION_TYP_VPORT] = DR_ACTION_STATE_TERM, 147 }, 148 [DR_ACTION_STATE_MODIFY_VLAN] = { 149 [DR_ACTION_TYP_DROP] = DR_ACTION_STATE_TERM, 150 [DR_ACTION_TYP_FT] = DR_ACTION_STATE_TERM, 151 [DR_ACTION_TYP_POP_VLAN] = DR_ACTION_STATE_MODIFY_VLAN, 152 [DR_ACTION_TYP_CTR] = DR_ACTION_STATE_MODIFY_VLAN, 153 [DR_ACTION_TYP_VPORT] = DR_ACTION_STATE_TERM, 154 [DR_ACTION_TYP_MODIFY_HDR] = DR_ACTION_STATE_MODIFY_HDR, 155 }, 156 [DR_ACTION_STATE_NON_TERM] = { 157 [DR_ACTION_TYP_DROP] = DR_ACTION_STATE_TERM, 158 [DR_ACTION_TYP_FT] = DR_ACTION_STATE_TERM, 159 [DR_ACTION_TYP_CTR] = DR_ACTION_STATE_NON_TERM, 160 [DR_ACTION_TYP_TNL_L2_TO_L2] = DR_ACTION_STATE_REFORMAT, 161 [DR_ACTION_TYP_TNL_L3_TO_L2] = DR_ACTION_STATE_REFORMAT, 162 [DR_ACTION_TYP_MODIFY_HDR] = DR_ACTION_STATE_MODIFY_HDR, 163 [DR_ACTION_TYP_POP_VLAN] = DR_ACTION_STATE_MODIFY_VLAN, 164 [DR_ACTION_TYP_VPORT] = DR_ACTION_STATE_TERM, 165 }, 166 [DR_ACTION_STATE_TERM] = { 167 [DR_ACTION_TYP_CTR] = DR_ACTION_STATE_TERM, 168 }, 169 }, 170 [DR_ACTION_DOMAIN_FDB_EGRESS] = { 171 [DR_ACTION_STATE_NO_ACTION] = { 172 [DR_ACTION_TYP_DROP] = DR_ACTION_STATE_TERM, 173 [DR_ACTION_TYP_FT] = DR_ACTION_STATE_TERM, 174 [DR_ACTION_TYP_CTR] = DR_ACTION_STATE_NON_TERM, 175 [DR_ACTION_TYP_MODIFY_HDR] = DR_ACTION_STATE_MODIFY_HDR, 176 [DR_ACTION_TYP_L2_TO_TNL_L2] = DR_ACTION_STATE_REFORMAT, 177 [DR_ACTION_TYP_L2_TO_TNL_L3] = DR_ACTION_STATE_REFORMAT, 178 [DR_ACTION_TYP_PUSH_VLAN] = DR_ACTION_STATE_MODIFY_VLAN, 179 [DR_ACTION_TYP_VPORT] = DR_ACTION_STATE_TERM, 180 }, 181 [DR_ACTION_STATE_REFORMAT] = { 182 [DR_ACTION_TYP_DROP] = DR_ACTION_STATE_TERM, 183 [DR_ACTION_TYP_FT] = DR_ACTION_STATE_TERM, 184 [DR_ACTION_TYP_CTR] = DR_ACTION_STATE_REFORMAT, 185 [DR_ACTION_TYP_VPORT] = DR_ACTION_STATE_TERM, 186 }, 187 [DR_ACTION_STATE_MODIFY_HDR] = { 188 [DR_ACTION_TYP_DROP] = DR_ACTION_STATE_TERM, 189 [DR_ACTION_TYP_FT] = DR_ACTION_STATE_TERM, 190 [DR_ACTION_TYP_CTR] = DR_ACTION_STATE_MODIFY_HDR, 191 [DR_ACTION_TYP_L2_TO_TNL_L2] = DR_ACTION_STATE_REFORMAT, 192 [DR_ACTION_TYP_L2_TO_TNL_L3] = DR_ACTION_STATE_REFORMAT, 193 [DR_ACTION_TYP_PUSH_VLAN] = DR_ACTION_STATE_MODIFY_VLAN, 194 [DR_ACTION_TYP_VPORT] = DR_ACTION_STATE_TERM, 195 }, 196 [DR_ACTION_STATE_MODIFY_VLAN] = { 197 [DR_ACTION_TYP_DROP] = DR_ACTION_STATE_TERM, 198 [DR_ACTION_TYP_FT] = DR_ACTION_STATE_TERM, 199 [DR_ACTION_TYP_PUSH_VLAN] = DR_ACTION_STATE_MODIFY_VLAN, 200 [DR_ACTION_TYP_CTR] = DR_ACTION_STATE_MODIFY_VLAN, 201 [DR_ACTION_TYP_L2_TO_TNL_L2] = DR_ACTION_STATE_REFORMAT, 202 [DR_ACTION_TYP_L2_TO_TNL_L3] = DR_ACTION_STATE_REFORMAT, 203 [DR_ACTION_TYP_VPORT] = DR_ACTION_STATE_TERM, 204 }, 205 [DR_ACTION_STATE_NON_TERM] = { 206 [DR_ACTION_TYP_DROP] = DR_ACTION_STATE_TERM, 207 [DR_ACTION_TYP_FT] = DR_ACTION_STATE_TERM, 208 [DR_ACTION_TYP_CTR] = DR_ACTION_STATE_NON_TERM, 209 [DR_ACTION_TYP_MODIFY_HDR] = DR_ACTION_STATE_MODIFY_HDR, 210 [DR_ACTION_TYP_L2_TO_TNL_L2] = DR_ACTION_STATE_REFORMAT, 211 [DR_ACTION_TYP_L2_TO_TNL_L3] = DR_ACTION_STATE_REFORMAT, 212 [DR_ACTION_TYP_PUSH_VLAN] = DR_ACTION_STATE_MODIFY_VLAN, 213 [DR_ACTION_TYP_VPORT] = DR_ACTION_STATE_TERM, 214 }, 215 [DR_ACTION_STATE_TERM] = { 216 [DR_ACTION_TYP_CTR] = DR_ACTION_STATE_TERM, 217 }, 218 }, 219 }; 220 221 static int 222 dr_action_reformat_to_action_type(enum mlx5dr_action_reformat_type reformat_type, 223 enum mlx5dr_action_type *action_type) 224 { 225 switch (reformat_type) { 226 case DR_ACTION_REFORMAT_TYP_TNL_L2_TO_L2: 227 *action_type = DR_ACTION_TYP_TNL_L2_TO_L2; 228 break; 229 case DR_ACTION_REFORMAT_TYP_L2_TO_TNL_L2: 230 *action_type = DR_ACTION_TYP_L2_TO_TNL_L2; 231 break; 232 case DR_ACTION_REFORMAT_TYP_TNL_L3_TO_L2: 233 *action_type = DR_ACTION_TYP_TNL_L3_TO_L2; 234 break; 235 case DR_ACTION_REFORMAT_TYP_L2_TO_TNL_L3: 236 *action_type = DR_ACTION_TYP_L2_TO_TNL_L3; 237 break; 238 default: 239 return -EINVAL; 240 } 241 242 return 0; 243 } 244 245 /* Apply the actions on the rule STE array starting from the last_ste. 246 * Actions might require more than one STE, new_num_stes will return 247 * the new size of the STEs array, rule with actions. 248 */ 249 static void dr_actions_apply(struct mlx5dr_domain *dmn, 250 enum mlx5dr_ste_entry_type ste_type, 251 u8 *action_type_set, 252 u8 *last_ste, 253 struct mlx5dr_ste_actions_attr *attr, 254 u32 *new_num_stes) 255 { 256 struct mlx5dr_ste_ctx *ste_ctx = dmn->ste_ctx; 257 u32 added_stes = 0; 258 259 if (ste_type == MLX5DR_STE_TYPE_RX) 260 mlx5dr_ste_set_actions_rx(ste_ctx, dmn, action_type_set, 261 last_ste, attr, &added_stes); 262 else 263 mlx5dr_ste_set_actions_tx(ste_ctx, dmn, action_type_set, 264 last_ste, attr, &added_stes); 265 266 *new_num_stes += added_stes; 267 } 268 269 static enum dr_action_domain 270 dr_action_get_action_domain(enum mlx5dr_domain_type domain, 271 enum mlx5dr_ste_entry_type ste_type) 272 { 273 switch (domain) { 274 case MLX5DR_DOMAIN_TYPE_NIC_RX: 275 return DR_ACTION_DOMAIN_NIC_INGRESS; 276 case MLX5DR_DOMAIN_TYPE_NIC_TX: 277 return DR_ACTION_DOMAIN_NIC_EGRESS; 278 case MLX5DR_DOMAIN_TYPE_FDB: 279 if (ste_type == MLX5DR_STE_TYPE_RX) 280 return DR_ACTION_DOMAIN_FDB_INGRESS; 281 return DR_ACTION_DOMAIN_FDB_EGRESS; 282 default: 283 WARN_ON(true); 284 return DR_ACTION_DOMAIN_MAX; 285 } 286 } 287 288 static 289 int dr_action_validate_and_get_next_state(enum dr_action_domain action_domain, 290 u32 action_type, 291 u32 *state) 292 { 293 u32 cur_state = *state; 294 295 /* Check action state machine is valid */ 296 *state = next_action_state[action_domain][cur_state][action_type]; 297 298 if (*state == DR_ACTION_STATE_ERR) 299 return -EOPNOTSUPP; 300 301 return 0; 302 } 303 304 static int dr_action_handle_cs_recalc(struct mlx5dr_domain *dmn, 305 struct mlx5dr_action *dest_action, 306 u64 *final_icm_addr) 307 { 308 int ret; 309 310 switch (dest_action->action_type) { 311 case DR_ACTION_TYP_FT: 312 /* Allow destination flow table only if table is a terminating 313 * table, since there is an *assumption* that in such case FW 314 * will recalculate the CS. 315 */ 316 if (dest_action->dest_tbl.is_fw_tbl) { 317 *final_icm_addr = dest_action->dest_tbl.fw_tbl.rx_icm_addr; 318 } else { 319 mlx5dr_dbg(dmn, 320 "Destination FT should be terminating when modify TTL is used\n"); 321 return -EINVAL; 322 } 323 break; 324 325 case DR_ACTION_TYP_VPORT: 326 /* If destination is vport we will get the FW flow table 327 * that recalculates the CS and forwards to the vport. 328 */ 329 ret = mlx5dr_domain_cache_get_recalc_cs_ft_addr(dest_action->vport.dmn, 330 dest_action->vport.caps->num, 331 final_icm_addr); 332 if (ret) { 333 mlx5dr_err(dmn, "Failed to get FW cs recalc flow table\n"); 334 return ret; 335 } 336 break; 337 338 default: 339 break; 340 } 341 342 return 0; 343 } 344 345 #define WITH_VLAN_NUM_HW_ACTIONS 6 346 347 int mlx5dr_actions_build_ste_arr(struct mlx5dr_matcher *matcher, 348 struct mlx5dr_matcher_rx_tx *nic_matcher, 349 struct mlx5dr_action *actions[], 350 u32 num_actions, 351 u8 *ste_arr, 352 u32 *new_hw_ste_arr_sz) 353 { 354 struct mlx5dr_domain_rx_tx *nic_dmn = nic_matcher->nic_tbl->nic_dmn; 355 bool rx_rule = nic_dmn->ste_type == MLX5DR_STE_TYPE_RX; 356 struct mlx5dr_domain *dmn = matcher->tbl->dmn; 357 u8 action_type_set[DR_ACTION_TYP_MAX] = {}; 358 struct mlx5dr_ste_actions_attr attr = {}; 359 struct mlx5dr_action *dest_action = NULL; 360 u32 state = DR_ACTION_STATE_NO_ACTION; 361 enum dr_action_domain action_domain; 362 bool recalc_cs_required = false; 363 u8 *last_ste; 364 int i, ret; 365 366 attr.gvmi = dmn->info.caps.gvmi; 367 attr.hit_gvmi = dmn->info.caps.gvmi; 368 attr.final_icm_addr = nic_dmn->default_icm_addr; 369 action_domain = dr_action_get_action_domain(dmn->type, nic_dmn->ste_type); 370 371 for (i = 0; i < num_actions; i++) { 372 struct mlx5dr_action *action; 373 int max_actions_type = 1; 374 u32 action_type; 375 376 action = actions[i]; 377 action_type = action->action_type; 378 379 switch (action_type) { 380 case DR_ACTION_TYP_DROP: 381 attr.final_icm_addr = nic_dmn->drop_icm_addr; 382 break; 383 case DR_ACTION_TYP_FT: 384 dest_action = action; 385 if (!action->dest_tbl.is_fw_tbl) { 386 if (action->dest_tbl.tbl->dmn != dmn) { 387 mlx5dr_err(dmn, 388 "Destination table belongs to a different domain\n"); 389 goto out_invalid_arg; 390 } 391 if (action->dest_tbl.tbl->level <= matcher->tbl->level) { 392 mlx5_core_warn_once(dmn->mdev, 393 "Connecting table to a lower/same level destination table\n"); 394 mlx5dr_dbg(dmn, 395 "Connecting table at level %d to a destination table at level %d\n", 396 matcher->tbl->level, 397 action->dest_tbl.tbl->level); 398 } 399 attr.final_icm_addr = rx_rule ? 400 action->dest_tbl.tbl->rx.s_anchor->chunk->icm_addr : 401 action->dest_tbl.tbl->tx.s_anchor->chunk->icm_addr; 402 } else { 403 struct mlx5dr_cmd_query_flow_table_details output; 404 int ret; 405 406 /* get the relevant addresses */ 407 if (!action->dest_tbl.fw_tbl.rx_icm_addr) { 408 ret = mlx5dr_cmd_query_flow_table(dmn->mdev, 409 action->dest_tbl.fw_tbl.type, 410 action->dest_tbl.fw_tbl.id, 411 &output); 412 if (!ret) { 413 action->dest_tbl.fw_tbl.tx_icm_addr = 414 output.sw_owner_icm_root_1; 415 action->dest_tbl.fw_tbl.rx_icm_addr = 416 output.sw_owner_icm_root_0; 417 } else { 418 mlx5dr_err(dmn, 419 "Failed mlx5_cmd_query_flow_table ret: %d\n", 420 ret); 421 return ret; 422 } 423 } 424 attr.final_icm_addr = rx_rule ? 425 action->dest_tbl.fw_tbl.rx_icm_addr : 426 action->dest_tbl.fw_tbl.tx_icm_addr; 427 } 428 break; 429 case DR_ACTION_TYP_QP: 430 mlx5dr_info(dmn, "Domain doesn't support QP\n"); 431 goto out_invalid_arg; 432 case DR_ACTION_TYP_CTR: 433 attr.ctr_id = action->ctr.ctr_id + 434 action->ctr.offeset; 435 break; 436 case DR_ACTION_TYP_TAG: 437 attr.flow_tag = action->flow_tag; 438 break; 439 case DR_ACTION_TYP_TNL_L2_TO_L2: 440 break; 441 case DR_ACTION_TYP_TNL_L3_TO_L2: 442 attr.decap_index = action->rewrite.index; 443 attr.decap_actions = action->rewrite.num_of_actions; 444 attr.decap_with_vlan = 445 attr.decap_actions == WITH_VLAN_NUM_HW_ACTIONS; 446 break; 447 case DR_ACTION_TYP_MODIFY_HDR: 448 attr.modify_index = action->rewrite.index; 449 attr.modify_actions = action->rewrite.num_of_actions; 450 recalc_cs_required = action->rewrite.modify_ttl && 451 !mlx5dr_ste_supp_ttl_cs_recalc(&dmn->info.caps); 452 break; 453 case DR_ACTION_TYP_L2_TO_TNL_L2: 454 case DR_ACTION_TYP_L2_TO_TNL_L3: 455 attr.reformat_size = action->reformat.reformat_size; 456 attr.reformat_id = action->reformat.reformat_id; 457 break; 458 case DR_ACTION_TYP_VPORT: 459 attr.hit_gvmi = action->vport.caps->vhca_gvmi; 460 dest_action = action; 461 if (rx_rule) { 462 /* Loopback on WIRE vport is not supported */ 463 if (action->vport.caps->num == WIRE_PORT) 464 goto out_invalid_arg; 465 466 attr.final_icm_addr = action->vport.caps->icm_address_rx; 467 } else { 468 attr.final_icm_addr = action->vport.caps->icm_address_tx; 469 } 470 break; 471 case DR_ACTION_TYP_POP_VLAN: 472 max_actions_type = MLX5DR_MAX_VLANS; 473 attr.vlans.count++; 474 break; 475 case DR_ACTION_TYP_PUSH_VLAN: 476 max_actions_type = MLX5DR_MAX_VLANS; 477 if (attr.vlans.count == MLX5DR_MAX_VLANS) 478 return -EINVAL; 479 480 attr.vlans.headers[attr.vlans.count++] = action->push_vlan.vlan_hdr; 481 break; 482 default: 483 goto out_invalid_arg; 484 } 485 486 /* Check action duplication */ 487 if (++action_type_set[action_type] > max_actions_type) { 488 mlx5dr_err(dmn, "Action type %d supports only max %d time(s)\n", 489 action_type, max_actions_type); 490 goto out_invalid_arg; 491 } 492 493 /* Check action state machine is valid */ 494 if (dr_action_validate_and_get_next_state(action_domain, 495 action_type, 496 &state)) { 497 mlx5dr_err(dmn, "Invalid action sequence provided\n"); 498 return -EOPNOTSUPP; 499 } 500 } 501 502 *new_hw_ste_arr_sz = nic_matcher->num_of_builders; 503 last_ste = ste_arr + DR_STE_SIZE * (nic_matcher->num_of_builders - 1); 504 505 /* Due to a HW bug in some devices, modifying TTL on RX flows will 506 * cause an incorrect checksum calculation. In this case we will 507 * use a FW table to recalculate. 508 */ 509 if (dmn->type == MLX5DR_DOMAIN_TYPE_FDB && 510 rx_rule && recalc_cs_required && dest_action) { 511 ret = dr_action_handle_cs_recalc(dmn, dest_action, &attr.final_icm_addr); 512 if (ret) { 513 mlx5dr_err(dmn, 514 "Failed to handle checksum recalculation err %d\n", 515 ret); 516 return ret; 517 } 518 } 519 520 dr_actions_apply(dmn, 521 nic_dmn->ste_type, 522 action_type_set, 523 last_ste, 524 &attr, 525 new_hw_ste_arr_sz); 526 527 return 0; 528 529 out_invalid_arg: 530 return -EINVAL; 531 } 532 533 static struct mlx5dr_action * 534 dr_action_create_generic(enum mlx5dr_action_type action_type) 535 { 536 struct mlx5dr_action *action; 537 538 action = kzalloc(sizeof(*action), GFP_KERNEL); 539 if (!action) 540 return NULL; 541 542 action->action_type = action_type; 543 refcount_set(&action->refcount, 1); 544 545 return action; 546 } 547 548 struct mlx5dr_action *mlx5dr_action_create_drop(void) 549 { 550 return dr_action_create_generic(DR_ACTION_TYP_DROP); 551 } 552 553 struct mlx5dr_action * 554 mlx5dr_action_create_dest_table_num(struct mlx5dr_domain *dmn, u32 table_num) 555 { 556 struct mlx5dr_action *action; 557 558 action = dr_action_create_generic(DR_ACTION_TYP_FT); 559 if (!action) 560 return NULL; 561 562 action->dest_tbl.is_fw_tbl = true; 563 action->dest_tbl.fw_tbl.dmn = dmn; 564 action->dest_tbl.fw_tbl.id = table_num; 565 action->dest_tbl.fw_tbl.type = FS_FT_FDB; 566 refcount_inc(&dmn->refcount); 567 568 return action; 569 } 570 571 struct mlx5dr_action * 572 mlx5dr_action_create_dest_table(struct mlx5dr_table *tbl) 573 { 574 struct mlx5dr_action *action; 575 576 refcount_inc(&tbl->refcount); 577 578 action = dr_action_create_generic(DR_ACTION_TYP_FT); 579 if (!action) 580 goto dec_ref; 581 582 action->dest_tbl.tbl = tbl; 583 584 return action; 585 586 dec_ref: 587 refcount_dec(&tbl->refcount); 588 return NULL; 589 } 590 591 struct mlx5dr_action * 592 mlx5dr_action_create_mult_dest_tbl(struct mlx5dr_domain *dmn, 593 struct mlx5dr_action_dest *dests, 594 u32 num_of_dests) 595 { 596 struct mlx5dr_cmd_flow_destination_hw_info *hw_dests; 597 struct mlx5dr_action **ref_actions; 598 struct mlx5dr_action *action; 599 bool reformat_req = false; 600 u32 num_of_ref = 0; 601 int ret; 602 int i; 603 604 if (dmn->type != MLX5DR_DOMAIN_TYPE_FDB) { 605 mlx5dr_err(dmn, "Multiple destination support is for FDB only\n"); 606 return NULL; 607 } 608 609 hw_dests = kzalloc(sizeof(*hw_dests) * num_of_dests, GFP_KERNEL); 610 if (!hw_dests) 611 return NULL; 612 613 ref_actions = kzalloc(sizeof(*ref_actions) * num_of_dests * 2, GFP_KERNEL); 614 if (!ref_actions) 615 goto free_hw_dests; 616 617 for (i = 0; i < num_of_dests; i++) { 618 struct mlx5dr_action *reformat_action = dests[i].reformat; 619 struct mlx5dr_action *dest_action = dests[i].dest; 620 621 ref_actions[num_of_ref++] = dest_action; 622 623 switch (dest_action->action_type) { 624 case DR_ACTION_TYP_VPORT: 625 hw_dests[i].vport.flags = MLX5_FLOW_DEST_VPORT_VHCA_ID; 626 hw_dests[i].type = MLX5_FLOW_DESTINATION_TYPE_VPORT; 627 hw_dests[i].vport.num = dest_action->vport.caps->num; 628 hw_dests[i].vport.vhca_id = dest_action->vport.caps->vhca_gvmi; 629 if (reformat_action) { 630 reformat_req = true; 631 hw_dests[i].vport.reformat_id = 632 reformat_action->reformat.reformat_id; 633 ref_actions[num_of_ref++] = reformat_action; 634 hw_dests[i].vport.flags |= MLX5_FLOW_DEST_VPORT_REFORMAT_ID; 635 } 636 break; 637 638 case DR_ACTION_TYP_FT: 639 hw_dests[i].type = MLX5_FLOW_DESTINATION_TYPE_FLOW_TABLE; 640 if (dest_action->dest_tbl.is_fw_tbl) 641 hw_dests[i].ft_id = dest_action->dest_tbl.fw_tbl.id; 642 else 643 hw_dests[i].ft_id = dest_action->dest_tbl.tbl->table_id; 644 break; 645 646 default: 647 mlx5dr_dbg(dmn, "Invalid multiple destinations action\n"); 648 goto free_ref_actions; 649 } 650 } 651 652 action = dr_action_create_generic(DR_ACTION_TYP_FT); 653 if (!action) 654 goto free_ref_actions; 655 656 ret = mlx5dr_fw_create_md_tbl(dmn, 657 hw_dests, 658 num_of_dests, 659 reformat_req, 660 &action->dest_tbl.fw_tbl.id, 661 &action->dest_tbl.fw_tbl.group_id); 662 if (ret) 663 goto free_action; 664 665 refcount_inc(&dmn->refcount); 666 667 for (i = 0; i < num_of_ref; i++) 668 refcount_inc(&ref_actions[i]->refcount); 669 670 action->dest_tbl.is_fw_tbl = true; 671 action->dest_tbl.fw_tbl.dmn = dmn; 672 action->dest_tbl.fw_tbl.type = FS_FT_FDB; 673 action->dest_tbl.fw_tbl.ref_actions = ref_actions; 674 action->dest_tbl.fw_tbl.num_of_ref_actions = num_of_ref; 675 676 kfree(hw_dests); 677 678 return action; 679 680 free_action: 681 kfree(action); 682 free_ref_actions: 683 kfree(ref_actions); 684 free_hw_dests: 685 kfree(hw_dests); 686 return NULL; 687 } 688 689 struct mlx5dr_action * 690 mlx5dr_action_create_dest_flow_fw_table(struct mlx5dr_domain *dmn, 691 struct mlx5_flow_table *ft) 692 { 693 struct mlx5dr_action *action; 694 695 action = dr_action_create_generic(DR_ACTION_TYP_FT); 696 if (!action) 697 return NULL; 698 699 action->dest_tbl.is_fw_tbl = 1; 700 action->dest_tbl.fw_tbl.type = ft->type; 701 action->dest_tbl.fw_tbl.id = ft->id; 702 action->dest_tbl.fw_tbl.dmn = dmn; 703 704 refcount_inc(&dmn->refcount); 705 706 return action; 707 } 708 709 struct mlx5dr_action * 710 mlx5dr_action_create_flow_counter(u32 counter_id) 711 { 712 struct mlx5dr_action *action; 713 714 action = dr_action_create_generic(DR_ACTION_TYP_CTR); 715 if (!action) 716 return NULL; 717 718 action->ctr.ctr_id = counter_id; 719 720 return action; 721 } 722 723 struct mlx5dr_action *mlx5dr_action_create_tag(u32 tag_value) 724 { 725 struct mlx5dr_action *action; 726 727 action = dr_action_create_generic(DR_ACTION_TYP_TAG); 728 if (!action) 729 return NULL; 730 731 action->flow_tag = tag_value & 0xffffff; 732 733 return action; 734 } 735 736 static int 737 dr_action_verify_reformat_params(enum mlx5dr_action_type reformat_type, 738 struct mlx5dr_domain *dmn, 739 size_t data_sz, 740 void *data) 741 { 742 if ((!data && data_sz) || (data && !data_sz) || reformat_type > 743 DR_ACTION_TYP_L2_TO_TNL_L3) { 744 mlx5dr_dbg(dmn, "Invalid reformat parameter!\n"); 745 goto out_err; 746 } 747 748 if (dmn->type == MLX5DR_DOMAIN_TYPE_FDB) 749 return 0; 750 751 if (dmn->type == MLX5DR_DOMAIN_TYPE_NIC_RX) { 752 if (reformat_type != DR_ACTION_TYP_TNL_L2_TO_L2 && 753 reformat_type != DR_ACTION_TYP_TNL_L3_TO_L2) { 754 mlx5dr_dbg(dmn, "Action reformat type not support on RX domain\n"); 755 goto out_err; 756 } 757 } else if (dmn->type == MLX5DR_DOMAIN_TYPE_NIC_TX) { 758 if (reformat_type != DR_ACTION_TYP_L2_TO_TNL_L2 && 759 reformat_type != DR_ACTION_TYP_L2_TO_TNL_L3) { 760 mlx5dr_dbg(dmn, "Action reformat type not support on TX domain\n"); 761 goto out_err; 762 } 763 } 764 765 return 0; 766 767 out_err: 768 return -EINVAL; 769 } 770 771 #define ACTION_CACHE_LINE_SIZE 64 772 773 static int 774 dr_action_create_reformat_action(struct mlx5dr_domain *dmn, 775 size_t data_sz, void *data, 776 struct mlx5dr_action *action) 777 { 778 u32 reformat_id; 779 int ret; 780 781 switch (action->action_type) { 782 case DR_ACTION_TYP_L2_TO_TNL_L2: 783 case DR_ACTION_TYP_L2_TO_TNL_L3: 784 { 785 enum mlx5_reformat_ctx_type rt; 786 787 if (action->action_type == DR_ACTION_TYP_L2_TO_TNL_L2) 788 rt = MLX5_REFORMAT_TYPE_L2_TO_L2_TUNNEL; 789 else 790 rt = MLX5_REFORMAT_TYPE_L2_TO_L3_TUNNEL; 791 792 ret = mlx5dr_cmd_create_reformat_ctx(dmn->mdev, rt, data_sz, data, 793 &reformat_id); 794 if (ret) 795 return ret; 796 797 action->reformat.reformat_id = reformat_id; 798 action->reformat.reformat_size = data_sz; 799 return 0; 800 } 801 case DR_ACTION_TYP_TNL_L2_TO_L2: 802 { 803 return 0; 804 } 805 case DR_ACTION_TYP_TNL_L3_TO_L2: 806 { 807 u8 hw_actions[ACTION_CACHE_LINE_SIZE] = {}; 808 int ret; 809 810 ret = mlx5dr_ste_set_action_decap_l3_list(dmn->ste_ctx, 811 data, data_sz, 812 hw_actions, 813 ACTION_CACHE_LINE_SIZE, 814 &action->rewrite.num_of_actions); 815 if (ret) { 816 mlx5dr_dbg(dmn, "Failed creating decap l3 action list\n"); 817 return ret; 818 } 819 820 action->rewrite.chunk = mlx5dr_icm_alloc_chunk(dmn->action_icm_pool, 821 DR_CHUNK_SIZE_8); 822 if (!action->rewrite.chunk) { 823 mlx5dr_dbg(dmn, "Failed allocating modify header chunk\n"); 824 return -ENOMEM; 825 } 826 827 action->rewrite.data = (void *)hw_actions; 828 action->rewrite.index = (action->rewrite.chunk->icm_addr - 829 dmn->info.caps.hdr_modify_icm_addr) / 830 ACTION_CACHE_LINE_SIZE; 831 832 ret = mlx5dr_send_postsend_action(dmn, action); 833 if (ret) { 834 mlx5dr_dbg(dmn, "Writing decap l3 actions to ICM failed\n"); 835 mlx5dr_icm_free_chunk(action->rewrite.chunk); 836 return ret; 837 } 838 return 0; 839 } 840 default: 841 mlx5dr_info(dmn, "Reformat type is not supported %d\n", action->action_type); 842 return -EINVAL; 843 } 844 } 845 846 #define CVLAN_ETHERTYPE 0x8100 847 #define SVLAN_ETHERTYPE 0x88a8 848 849 struct mlx5dr_action *mlx5dr_action_create_pop_vlan(void) 850 { 851 return dr_action_create_generic(DR_ACTION_TYP_POP_VLAN); 852 } 853 854 struct mlx5dr_action *mlx5dr_action_create_push_vlan(struct mlx5dr_domain *dmn, 855 __be32 vlan_hdr) 856 { 857 u32 vlan_hdr_h = ntohl(vlan_hdr); 858 u16 ethertype = vlan_hdr_h >> 16; 859 struct mlx5dr_action *action; 860 861 if (ethertype != SVLAN_ETHERTYPE && ethertype != CVLAN_ETHERTYPE) { 862 mlx5dr_dbg(dmn, "Invalid vlan ethertype\n"); 863 return NULL; 864 } 865 866 action = dr_action_create_generic(DR_ACTION_TYP_PUSH_VLAN); 867 if (!action) 868 return NULL; 869 870 action->push_vlan.vlan_hdr = vlan_hdr_h; 871 return action; 872 } 873 874 struct mlx5dr_action * 875 mlx5dr_action_create_packet_reformat(struct mlx5dr_domain *dmn, 876 enum mlx5dr_action_reformat_type reformat_type, 877 size_t data_sz, 878 void *data) 879 { 880 enum mlx5dr_action_type action_type; 881 struct mlx5dr_action *action; 882 int ret; 883 884 refcount_inc(&dmn->refcount); 885 886 /* General checks */ 887 ret = dr_action_reformat_to_action_type(reformat_type, &action_type); 888 if (ret) { 889 mlx5dr_dbg(dmn, "Invalid reformat_type provided\n"); 890 goto dec_ref; 891 } 892 893 ret = dr_action_verify_reformat_params(action_type, dmn, data_sz, data); 894 if (ret) 895 goto dec_ref; 896 897 action = dr_action_create_generic(action_type); 898 if (!action) 899 goto dec_ref; 900 901 action->reformat.dmn = dmn; 902 903 ret = dr_action_create_reformat_action(dmn, 904 data_sz, 905 data, 906 action); 907 if (ret) { 908 mlx5dr_dbg(dmn, "Failed creating reformat action %d\n", ret); 909 goto free_action; 910 } 911 912 return action; 913 914 free_action: 915 kfree(action); 916 dec_ref: 917 refcount_dec(&dmn->refcount); 918 return NULL; 919 } 920 921 static int 922 dr_action_modify_sw_to_hw_add(struct mlx5dr_domain *dmn, 923 __be64 *sw_action, 924 __be64 *hw_action, 925 const struct mlx5dr_ste_action_modify_field **ret_hw_info) 926 { 927 const struct mlx5dr_ste_action_modify_field *hw_action_info; 928 u8 max_length; 929 u16 sw_field; 930 u32 data; 931 932 /* Get SW modify action data */ 933 sw_field = MLX5_GET(set_action_in, sw_action, field); 934 data = MLX5_GET(set_action_in, sw_action, data); 935 936 /* Convert SW data to HW modify action format */ 937 hw_action_info = mlx5dr_ste_conv_modify_hdr_sw_field(dmn->ste_ctx, sw_field); 938 if (!hw_action_info) { 939 mlx5dr_dbg(dmn, "Modify add action invalid field given\n"); 940 return -EINVAL; 941 } 942 943 max_length = hw_action_info->end - hw_action_info->start + 1; 944 945 mlx5dr_ste_set_action_add(dmn->ste_ctx, 946 hw_action, 947 hw_action_info->hw_field, 948 hw_action_info->start, 949 max_length, 950 data); 951 952 *ret_hw_info = hw_action_info; 953 954 return 0; 955 } 956 957 static int 958 dr_action_modify_sw_to_hw_set(struct mlx5dr_domain *dmn, 959 __be64 *sw_action, 960 __be64 *hw_action, 961 const struct mlx5dr_ste_action_modify_field **ret_hw_info) 962 { 963 const struct mlx5dr_ste_action_modify_field *hw_action_info; 964 u8 offset, length, max_length; 965 u16 sw_field; 966 u32 data; 967 968 /* Get SW modify action data */ 969 length = MLX5_GET(set_action_in, sw_action, length); 970 offset = MLX5_GET(set_action_in, sw_action, offset); 971 sw_field = MLX5_GET(set_action_in, sw_action, field); 972 data = MLX5_GET(set_action_in, sw_action, data); 973 974 /* Convert SW data to HW modify action format */ 975 hw_action_info = mlx5dr_ste_conv_modify_hdr_sw_field(dmn->ste_ctx, sw_field); 976 if (!hw_action_info) { 977 mlx5dr_dbg(dmn, "Modify set action invalid field given\n"); 978 return -EINVAL; 979 } 980 981 /* PRM defines that length zero specific length of 32bits */ 982 length = length ? length : 32; 983 984 max_length = hw_action_info->end - hw_action_info->start + 1; 985 986 if (length + offset > max_length) { 987 mlx5dr_dbg(dmn, "Modify action length + offset exceeds limit\n"); 988 return -EINVAL; 989 } 990 991 mlx5dr_ste_set_action_set(dmn->ste_ctx, 992 hw_action, 993 hw_action_info->hw_field, 994 hw_action_info->start + offset, 995 length, 996 data); 997 998 *ret_hw_info = hw_action_info; 999 1000 return 0; 1001 } 1002 1003 static int 1004 dr_action_modify_sw_to_hw_copy(struct mlx5dr_domain *dmn, 1005 __be64 *sw_action, 1006 __be64 *hw_action, 1007 const struct mlx5dr_ste_action_modify_field **ret_dst_hw_info, 1008 const struct mlx5dr_ste_action_modify_field **ret_src_hw_info) 1009 { 1010 u8 src_offset, dst_offset, src_max_length, dst_max_length, length; 1011 const struct mlx5dr_ste_action_modify_field *hw_dst_action_info; 1012 const struct mlx5dr_ste_action_modify_field *hw_src_action_info; 1013 u16 src_field, dst_field; 1014 1015 /* Get SW modify action data */ 1016 src_field = MLX5_GET(copy_action_in, sw_action, src_field); 1017 dst_field = MLX5_GET(copy_action_in, sw_action, dst_field); 1018 src_offset = MLX5_GET(copy_action_in, sw_action, src_offset); 1019 dst_offset = MLX5_GET(copy_action_in, sw_action, dst_offset); 1020 length = MLX5_GET(copy_action_in, sw_action, length); 1021 1022 /* Convert SW data to HW modify action format */ 1023 hw_src_action_info = mlx5dr_ste_conv_modify_hdr_sw_field(dmn->ste_ctx, src_field); 1024 hw_dst_action_info = mlx5dr_ste_conv_modify_hdr_sw_field(dmn->ste_ctx, dst_field); 1025 if (!hw_src_action_info || !hw_dst_action_info) { 1026 mlx5dr_dbg(dmn, "Modify copy action invalid field given\n"); 1027 return -EINVAL; 1028 } 1029 1030 /* PRM defines that length zero specific length of 32bits */ 1031 length = length ? length : 32; 1032 1033 src_max_length = hw_src_action_info->end - 1034 hw_src_action_info->start + 1; 1035 dst_max_length = hw_dst_action_info->end - 1036 hw_dst_action_info->start + 1; 1037 1038 if (length + src_offset > src_max_length || 1039 length + dst_offset > dst_max_length) { 1040 mlx5dr_dbg(dmn, "Modify action length + offset exceeds limit\n"); 1041 return -EINVAL; 1042 } 1043 1044 mlx5dr_ste_set_action_copy(dmn->ste_ctx, 1045 hw_action, 1046 hw_dst_action_info->hw_field, 1047 hw_dst_action_info->start + dst_offset, 1048 length, 1049 hw_src_action_info->hw_field, 1050 hw_src_action_info->start + src_offset); 1051 1052 *ret_dst_hw_info = hw_dst_action_info; 1053 *ret_src_hw_info = hw_src_action_info; 1054 1055 return 0; 1056 } 1057 1058 static int 1059 dr_action_modify_sw_to_hw(struct mlx5dr_domain *dmn, 1060 __be64 *sw_action, 1061 __be64 *hw_action, 1062 const struct mlx5dr_ste_action_modify_field **ret_dst_hw_info, 1063 const struct mlx5dr_ste_action_modify_field **ret_src_hw_info) 1064 { 1065 u8 action; 1066 int ret; 1067 1068 *hw_action = 0; 1069 *ret_src_hw_info = NULL; 1070 1071 /* Get SW modify action type */ 1072 action = MLX5_GET(set_action_in, sw_action, action_type); 1073 1074 switch (action) { 1075 case MLX5_ACTION_TYPE_SET: 1076 ret = dr_action_modify_sw_to_hw_set(dmn, sw_action, 1077 hw_action, 1078 ret_dst_hw_info); 1079 break; 1080 1081 case MLX5_ACTION_TYPE_ADD: 1082 ret = dr_action_modify_sw_to_hw_add(dmn, sw_action, 1083 hw_action, 1084 ret_dst_hw_info); 1085 break; 1086 1087 case MLX5_ACTION_TYPE_COPY: 1088 ret = dr_action_modify_sw_to_hw_copy(dmn, sw_action, 1089 hw_action, 1090 ret_dst_hw_info, 1091 ret_src_hw_info); 1092 break; 1093 1094 default: 1095 mlx5dr_info(dmn, "Unsupported action_type for modify action\n"); 1096 ret = -EOPNOTSUPP; 1097 } 1098 1099 return ret; 1100 } 1101 1102 static int 1103 dr_action_modify_check_set_field_limitation(struct mlx5dr_action *action, 1104 const __be64 *sw_action) 1105 { 1106 u16 sw_field = MLX5_GET(set_action_in, sw_action, field); 1107 struct mlx5dr_domain *dmn = action->rewrite.dmn; 1108 1109 if (sw_field == MLX5_ACTION_IN_FIELD_METADATA_REG_A) { 1110 action->rewrite.allow_rx = 0; 1111 if (dmn->type != MLX5DR_DOMAIN_TYPE_NIC_TX) { 1112 mlx5dr_dbg(dmn, "Unsupported field %d for RX/FDB set action\n", 1113 sw_field); 1114 return -EINVAL; 1115 } 1116 } else if (sw_field == MLX5_ACTION_IN_FIELD_METADATA_REG_B) { 1117 action->rewrite.allow_tx = 0; 1118 if (dmn->type != MLX5DR_DOMAIN_TYPE_NIC_RX) { 1119 mlx5dr_dbg(dmn, "Unsupported field %d for TX/FDB set action\n", 1120 sw_field); 1121 return -EINVAL; 1122 } 1123 } 1124 1125 if (!action->rewrite.allow_rx && !action->rewrite.allow_tx) { 1126 mlx5dr_dbg(dmn, "Modify SET actions not supported on both RX and TX\n"); 1127 return -EINVAL; 1128 } 1129 1130 return 0; 1131 } 1132 1133 static int 1134 dr_action_modify_check_add_field_limitation(struct mlx5dr_action *action, 1135 const __be64 *sw_action) 1136 { 1137 u16 sw_field = MLX5_GET(set_action_in, sw_action, field); 1138 struct mlx5dr_domain *dmn = action->rewrite.dmn; 1139 1140 if (sw_field != MLX5_ACTION_IN_FIELD_OUT_IP_TTL && 1141 sw_field != MLX5_ACTION_IN_FIELD_OUT_IPV6_HOPLIMIT && 1142 sw_field != MLX5_ACTION_IN_FIELD_OUT_TCP_SEQ_NUM && 1143 sw_field != MLX5_ACTION_IN_FIELD_OUT_TCP_ACK_NUM) { 1144 mlx5dr_dbg(dmn, "Unsupported field %d for add action\n", 1145 sw_field); 1146 return -EINVAL; 1147 } 1148 1149 return 0; 1150 } 1151 1152 static int 1153 dr_action_modify_check_copy_field_limitation(struct mlx5dr_action *action, 1154 const __be64 *sw_action) 1155 { 1156 struct mlx5dr_domain *dmn = action->rewrite.dmn; 1157 u16 sw_fields[2]; 1158 int i; 1159 1160 sw_fields[0] = MLX5_GET(copy_action_in, sw_action, src_field); 1161 sw_fields[1] = MLX5_GET(copy_action_in, sw_action, dst_field); 1162 1163 for (i = 0; i < 2; i++) { 1164 if (sw_fields[i] == MLX5_ACTION_IN_FIELD_METADATA_REG_A) { 1165 action->rewrite.allow_rx = 0; 1166 if (dmn->type != MLX5DR_DOMAIN_TYPE_NIC_TX) { 1167 mlx5dr_dbg(dmn, "Unsupported field %d for RX/FDB set action\n", 1168 sw_fields[i]); 1169 return -EINVAL; 1170 } 1171 } else if (sw_fields[i] == MLX5_ACTION_IN_FIELD_METADATA_REG_B) { 1172 action->rewrite.allow_tx = 0; 1173 if (dmn->type != MLX5DR_DOMAIN_TYPE_NIC_RX) { 1174 mlx5dr_dbg(dmn, "Unsupported field %d for TX/FDB set action\n", 1175 sw_fields[i]); 1176 return -EINVAL; 1177 } 1178 } 1179 } 1180 1181 if (!action->rewrite.allow_rx && !action->rewrite.allow_tx) { 1182 mlx5dr_dbg(dmn, "Modify copy actions not supported on both RX and TX\n"); 1183 return -EINVAL; 1184 } 1185 1186 return 0; 1187 } 1188 1189 static int 1190 dr_action_modify_check_field_limitation(struct mlx5dr_action *action, 1191 const __be64 *sw_action) 1192 { 1193 struct mlx5dr_domain *dmn = action->rewrite.dmn; 1194 u8 action_type; 1195 int ret; 1196 1197 action_type = MLX5_GET(set_action_in, sw_action, action_type); 1198 1199 switch (action_type) { 1200 case MLX5_ACTION_TYPE_SET: 1201 ret = dr_action_modify_check_set_field_limitation(action, 1202 sw_action); 1203 break; 1204 1205 case MLX5_ACTION_TYPE_ADD: 1206 ret = dr_action_modify_check_add_field_limitation(action, 1207 sw_action); 1208 break; 1209 1210 case MLX5_ACTION_TYPE_COPY: 1211 ret = dr_action_modify_check_copy_field_limitation(action, 1212 sw_action); 1213 break; 1214 1215 default: 1216 mlx5dr_info(dmn, "Unsupported action %d modify action\n", 1217 action_type); 1218 ret = -EOPNOTSUPP; 1219 } 1220 1221 return ret; 1222 } 1223 1224 static bool 1225 dr_action_modify_check_is_ttl_modify(const void *sw_action) 1226 { 1227 u16 sw_field = MLX5_GET(set_action_in, sw_action, field); 1228 1229 return sw_field == MLX5_ACTION_IN_FIELD_OUT_IP_TTL; 1230 } 1231 1232 static int dr_actions_convert_modify_header(struct mlx5dr_action *action, 1233 u32 max_hw_actions, 1234 u32 num_sw_actions, 1235 __be64 sw_actions[], 1236 __be64 hw_actions[], 1237 u32 *num_hw_actions, 1238 bool *modify_ttl) 1239 { 1240 const struct mlx5dr_ste_action_modify_field *hw_dst_action_info; 1241 const struct mlx5dr_ste_action_modify_field *hw_src_action_info; 1242 struct mlx5dr_domain *dmn = action->rewrite.dmn; 1243 int ret, i, hw_idx = 0; 1244 __be64 *sw_action; 1245 __be64 hw_action; 1246 u16 hw_field = 0; 1247 u32 l3_type = 0; 1248 u32 l4_type = 0; 1249 1250 *modify_ttl = false; 1251 1252 action->rewrite.allow_rx = 1; 1253 action->rewrite.allow_tx = 1; 1254 1255 for (i = 0; i < num_sw_actions; i++) { 1256 sw_action = &sw_actions[i]; 1257 1258 ret = dr_action_modify_check_field_limitation(action, 1259 sw_action); 1260 if (ret) 1261 return ret; 1262 1263 if (!(*modify_ttl)) 1264 *modify_ttl = dr_action_modify_check_is_ttl_modify(sw_action); 1265 1266 /* Convert SW action to HW action */ 1267 ret = dr_action_modify_sw_to_hw(dmn, 1268 sw_action, 1269 &hw_action, 1270 &hw_dst_action_info, 1271 &hw_src_action_info); 1272 if (ret) 1273 return ret; 1274 1275 /* Due to a HW limitation we cannot modify 2 different L3 types */ 1276 if (l3_type && hw_dst_action_info->l3_type && 1277 hw_dst_action_info->l3_type != l3_type) { 1278 mlx5dr_dbg(dmn, "Action list can't support two different L3 types\n"); 1279 return -EINVAL; 1280 } 1281 if (hw_dst_action_info->l3_type) 1282 l3_type = hw_dst_action_info->l3_type; 1283 1284 /* Due to a HW limitation we cannot modify two different L4 types */ 1285 if (l4_type && hw_dst_action_info->l4_type && 1286 hw_dst_action_info->l4_type != l4_type) { 1287 mlx5dr_dbg(dmn, "Action list can't support two different L4 types\n"); 1288 return -EINVAL; 1289 } 1290 if (hw_dst_action_info->l4_type) 1291 l4_type = hw_dst_action_info->l4_type; 1292 1293 /* HW reads and executes two actions at once this means we 1294 * need to create a gap if two actions access the same field 1295 */ 1296 if ((hw_idx % 2) && (hw_field == hw_dst_action_info->hw_field || 1297 (hw_src_action_info && 1298 hw_field == hw_src_action_info->hw_field))) { 1299 /* Check if after gap insertion the total number of HW 1300 * modify actions doesn't exceeds the limit 1301 */ 1302 hw_idx++; 1303 if ((num_sw_actions + hw_idx - i) >= max_hw_actions) { 1304 mlx5dr_dbg(dmn, "Modify header action number exceeds HW limit\n"); 1305 return -EINVAL; 1306 } 1307 } 1308 hw_field = hw_dst_action_info->hw_field; 1309 1310 hw_actions[hw_idx] = hw_action; 1311 hw_idx++; 1312 } 1313 1314 *num_hw_actions = hw_idx; 1315 1316 return 0; 1317 } 1318 1319 static int dr_action_create_modify_action(struct mlx5dr_domain *dmn, 1320 size_t actions_sz, 1321 __be64 actions[], 1322 struct mlx5dr_action *action) 1323 { 1324 struct mlx5dr_icm_chunk *chunk; 1325 u32 max_hw_actions; 1326 u32 num_hw_actions; 1327 u32 num_sw_actions; 1328 __be64 *hw_actions; 1329 bool modify_ttl; 1330 int ret; 1331 1332 num_sw_actions = actions_sz / DR_MODIFY_ACTION_SIZE; 1333 max_hw_actions = mlx5dr_icm_pool_chunk_size_to_entries(DR_CHUNK_SIZE_16); 1334 1335 if (num_sw_actions > max_hw_actions) { 1336 mlx5dr_dbg(dmn, "Max number of actions %d exceeds limit %d\n", 1337 num_sw_actions, max_hw_actions); 1338 return -EINVAL; 1339 } 1340 1341 chunk = mlx5dr_icm_alloc_chunk(dmn->action_icm_pool, DR_CHUNK_SIZE_16); 1342 if (!chunk) 1343 return -ENOMEM; 1344 1345 hw_actions = kcalloc(1, max_hw_actions * DR_MODIFY_ACTION_SIZE, GFP_KERNEL); 1346 if (!hw_actions) { 1347 ret = -ENOMEM; 1348 goto free_chunk; 1349 } 1350 1351 ret = dr_actions_convert_modify_header(action, 1352 max_hw_actions, 1353 num_sw_actions, 1354 actions, 1355 hw_actions, 1356 &num_hw_actions, 1357 &modify_ttl); 1358 if (ret) 1359 goto free_hw_actions; 1360 1361 action->rewrite.chunk = chunk; 1362 action->rewrite.modify_ttl = modify_ttl; 1363 action->rewrite.data = (u8 *)hw_actions; 1364 action->rewrite.num_of_actions = num_hw_actions; 1365 action->rewrite.index = (chunk->icm_addr - 1366 dmn->info.caps.hdr_modify_icm_addr) / 1367 ACTION_CACHE_LINE_SIZE; 1368 1369 ret = mlx5dr_send_postsend_action(dmn, action); 1370 if (ret) 1371 goto free_hw_actions; 1372 1373 return 0; 1374 1375 free_hw_actions: 1376 kfree(hw_actions); 1377 free_chunk: 1378 mlx5dr_icm_free_chunk(chunk); 1379 return ret; 1380 } 1381 1382 struct mlx5dr_action * 1383 mlx5dr_action_create_modify_header(struct mlx5dr_domain *dmn, 1384 u32 flags, 1385 size_t actions_sz, 1386 __be64 actions[]) 1387 { 1388 struct mlx5dr_action *action; 1389 int ret = 0; 1390 1391 refcount_inc(&dmn->refcount); 1392 1393 if (actions_sz % DR_MODIFY_ACTION_SIZE) { 1394 mlx5dr_dbg(dmn, "Invalid modify actions size provided\n"); 1395 goto dec_ref; 1396 } 1397 1398 action = dr_action_create_generic(DR_ACTION_TYP_MODIFY_HDR); 1399 if (!action) 1400 goto dec_ref; 1401 1402 action->rewrite.dmn = dmn; 1403 1404 ret = dr_action_create_modify_action(dmn, 1405 actions_sz, 1406 actions, 1407 action); 1408 if (ret) { 1409 mlx5dr_dbg(dmn, "Failed creating modify header action %d\n", ret); 1410 goto free_action; 1411 } 1412 1413 return action; 1414 1415 free_action: 1416 kfree(action); 1417 dec_ref: 1418 refcount_dec(&dmn->refcount); 1419 return NULL; 1420 } 1421 1422 struct mlx5dr_action * 1423 mlx5dr_action_create_dest_vport(struct mlx5dr_domain *dmn, 1424 u32 vport, u8 vhca_id_valid, 1425 u16 vhca_id) 1426 { 1427 struct mlx5dr_cmd_vport_cap *vport_cap; 1428 struct mlx5dr_domain *vport_dmn; 1429 struct mlx5dr_action *action; 1430 u8 peer_vport; 1431 1432 peer_vport = vhca_id_valid && (vhca_id != dmn->info.caps.gvmi); 1433 vport_dmn = peer_vport ? dmn->peer_dmn : dmn; 1434 if (!vport_dmn) { 1435 mlx5dr_dbg(dmn, "No peer vport domain for given vhca_id\n"); 1436 return NULL; 1437 } 1438 1439 if (vport_dmn->type != MLX5DR_DOMAIN_TYPE_FDB) { 1440 mlx5dr_dbg(dmn, "Domain doesn't support vport actions\n"); 1441 return NULL; 1442 } 1443 1444 vport_cap = mlx5dr_get_vport_cap(&vport_dmn->info.caps, vport); 1445 if (!vport_cap) { 1446 mlx5dr_dbg(dmn, "Failed to get vport %d caps\n", vport); 1447 return NULL; 1448 } 1449 1450 action = dr_action_create_generic(DR_ACTION_TYP_VPORT); 1451 if (!action) 1452 return NULL; 1453 1454 action->vport.dmn = vport_dmn; 1455 action->vport.caps = vport_cap; 1456 1457 return action; 1458 } 1459 1460 int mlx5dr_action_destroy(struct mlx5dr_action *action) 1461 { 1462 if (refcount_read(&action->refcount) > 1) 1463 return -EBUSY; 1464 1465 switch (action->action_type) { 1466 case DR_ACTION_TYP_FT: 1467 if (action->dest_tbl.is_fw_tbl) 1468 refcount_dec(&action->dest_tbl.fw_tbl.dmn->refcount); 1469 else 1470 refcount_dec(&action->dest_tbl.tbl->refcount); 1471 1472 if (action->dest_tbl.is_fw_tbl && 1473 action->dest_tbl.fw_tbl.num_of_ref_actions) { 1474 struct mlx5dr_action **ref_actions; 1475 int i; 1476 1477 ref_actions = action->dest_tbl.fw_tbl.ref_actions; 1478 for (i = 0; i < action->dest_tbl.fw_tbl.num_of_ref_actions; i++) 1479 refcount_dec(&ref_actions[i]->refcount); 1480 1481 kfree(ref_actions); 1482 1483 mlx5dr_fw_destroy_md_tbl(action->dest_tbl.fw_tbl.dmn, 1484 action->dest_tbl.fw_tbl.id, 1485 action->dest_tbl.fw_tbl.group_id); 1486 } 1487 break; 1488 case DR_ACTION_TYP_TNL_L2_TO_L2: 1489 refcount_dec(&action->reformat.dmn->refcount); 1490 break; 1491 case DR_ACTION_TYP_TNL_L3_TO_L2: 1492 mlx5dr_icm_free_chunk(action->rewrite.chunk); 1493 refcount_dec(&action->reformat.dmn->refcount); 1494 break; 1495 case DR_ACTION_TYP_L2_TO_TNL_L2: 1496 case DR_ACTION_TYP_L2_TO_TNL_L3: 1497 mlx5dr_cmd_destroy_reformat_ctx((action->reformat.dmn)->mdev, 1498 action->reformat.reformat_id); 1499 refcount_dec(&action->reformat.dmn->refcount); 1500 break; 1501 case DR_ACTION_TYP_MODIFY_HDR: 1502 mlx5dr_icm_free_chunk(action->rewrite.chunk); 1503 kfree(action->rewrite.data); 1504 refcount_dec(&action->rewrite.dmn->refcount); 1505 break; 1506 default: 1507 break; 1508 } 1509 1510 kfree(action); 1511 return 0; 1512 } 1513