1 /* SPDX-License-Identifier: GPL-2.0 OR Linux-OpenIB */
2 /* Copyright (c) 2022, NVIDIA CORPORATION & AFFILIATES. All rights reserved. */
3 
4 #ifndef __MLX5_LIB_ASO_H__
5 #define __MLX5_LIB_ASO_H__
6 
7 #include <linux/mlx5/qp.h>
8 #include "mlx5_core.h"
9 
10 #define MLX5_ASO_WQEBBS \
11 	(DIV_ROUND_UP(sizeof(struct mlx5_aso_wqe), MLX5_SEND_WQE_BB))
12 #define MLX5_ASO_WQEBBS_DATA \
13 	(DIV_ROUND_UP(sizeof(struct mlx5_aso_wqe_data), MLX5_SEND_WQE_BB))
14 #define MLX5_WQE_CTRL_WQE_OPC_MOD_SHIFT 24
15 
16 struct mlx5_wqe_aso_ctrl_seg {
17 	__be32  va_h;
18 	__be32  va_l; /* include read_enable */
19 	__be32  l_key;
20 	u8      data_mask_mode;
21 	u8      condition_1_0_operand;
22 	u8      condition_1_0_offset;
23 	u8      data_offset_condition_operand;
24 	__be32  condition_0_data;
25 	__be32  condition_0_mask;
26 	__be32  condition_1_data;
27 	__be32  condition_1_mask;
28 	__be64  bitwise_data;
29 	__be64  data_mask;
30 };
31 
32 struct mlx5_wqe_aso_data_seg {
33 	__be32  bytewise_data[16];
34 };
35 
36 struct mlx5_aso_wqe {
37 	struct mlx5_wqe_ctrl_seg      ctrl;
38 	struct mlx5_wqe_aso_ctrl_seg  aso_ctrl;
39 };
40 
41 struct mlx5_aso_wqe_data {
42 	struct mlx5_wqe_ctrl_seg      ctrl;
43 	struct mlx5_wqe_aso_ctrl_seg  aso_ctrl;
44 	struct mlx5_wqe_aso_data_seg  aso_data;
45 };
46 
47 enum {
48 	MLX5_ASO_LOGICAL_AND,
49 	MLX5_ASO_LOGICAL_OR,
50 };
51 
52 enum {
53 	MLX5_ASO_ALWAYS_FALSE,
54 	MLX5_ASO_ALWAYS_TRUE,
55 	MLX5_ASO_EQUAL,
56 	MLX5_ASO_NOT_EQUAL,
57 	MLX5_ASO_GREATER_OR_EQUAL,
58 	MLX5_ASO_LESSER_OR_EQUAL,
59 	MLX5_ASO_LESSER,
60 	MLX5_ASO_GREATER,
61 	MLX5_ASO_CYCLIC_GREATER,
62 	MLX5_ASO_CYCLIC_LESSER,
63 };
64 
65 enum {
66 	MLX5_ASO_DATA_MASK_MODE_BITWISE_64BIT,
67 	MLX5_ASO_DATA_MASK_MODE_BYTEWISE_64BYTE,
68 	MLX5_ASO_DATA_MASK_MODE_CALCULATED_64BYTE,
69 };
70 
71 enum {
72 	MLX5_ACCESS_ASO_OPC_MOD_FLOW_METER = 0x2,
73 };
74 
75 struct mlx5_aso;
76 
77 void *mlx5_aso_get_wqe(struct mlx5_aso *aso);
78 void mlx5_aso_build_wqe(struct mlx5_aso *aso, u8 ds_cnt,
79 			struct mlx5_aso_wqe *aso_wqe,
80 			u32 obj_id, u32 opc_mode);
81 void mlx5_aso_post_wqe(struct mlx5_aso *aso, bool with_data,
82 		       struct mlx5_wqe_ctrl_seg *doorbell_cseg);
83 int mlx5_aso_poll_cq(struct mlx5_aso *aso, bool with_data, u32 interval_ms);
84 
85 struct mlx5_aso *mlx5_aso_create(struct mlx5_core_dev *mdev, u32 pdn);
86 void mlx5_aso_destroy(struct mlx5_aso *aso);
87 #endif /* __MLX5_LIB_ASO_H__ */
88