1 /* SPDX-License-Identifier: GPL-2.0 OR Linux-OpenIB */ 2 /* Copyright (c) 2021, NVIDIA CORPORATION & AFFILIATES. */ 3 4 #ifndef __MLX5_LAG_FS_H__ 5 #define __MLX5_LAG_FS_H__ 6 7 #include "lib/fs_ttc.h" 8 9 struct mlx5_lag_definer { 10 struct mlx5_flow_definer *definer; 11 struct mlx5_flow_table *ft; 12 struct mlx5_flow_group *fg; 13 /* Each port has ldev->buckets number of rules and they are arrange in 14 * [port * buckets .. port * buckets + buckets) locations 15 */ 16 struct mlx5_flow_handle *rules[MLX5_MAX_PORTS * MLX5_LAG_MAX_HASH_BUCKETS]; 17 }; 18 19 struct mlx5_lag_ttc { 20 struct mlx5_ttc_table *ttc; 21 struct mlx5_lag_definer *definers[MLX5_NUM_TT]; 22 }; 23 24 struct mlx5_lag_port_sel { 25 DECLARE_BITMAP(tt_map, MLX5_NUM_TT); 26 bool tunnel; 27 struct mlx5_lag_ttc outer; 28 struct mlx5_lag_ttc inner; 29 }; 30 31 #ifdef CONFIG_MLX5_ESWITCH 32 33 int mlx5_lag_port_sel_modify(struct mlx5_lag *ldev, u8 *ports); 34 void mlx5_lag_port_sel_destroy(struct mlx5_lag *ldev); 35 int mlx5_lag_port_sel_create(struct mlx5_lag *ldev, 36 enum netdev_lag_hash hash_type, u8 *ports); 37 38 #else /* CONFIG_MLX5_ESWITCH */ 39 static inline int mlx5_lag_port_sel_create(struct mlx5_lag *ldev, 40 enum netdev_lag_hash hash_type, 41 u8 *ports) 42 { 43 return 0; 44 } 45 46 static inline int mlx5_lag_port_sel_modify(struct mlx5_lag *ldev, u8 *ports) 47 { 48 return 0; 49 } 50 51 static inline void mlx5_lag_port_sel_destroy(struct mlx5_lag *ldev) {} 52 #endif /* CONFIG_MLX5_ESWITCH */ 53 #endif /* __MLX5_LAG_FS_H__ */ 54