1 /* SPDX-License-Identifier: GPL-2.0 OR Linux-OpenIB */ 2 /* Copyright (c) 2019 Mellanox Technologies. */ 3 4 #ifndef __MLX5_LAG_H__ 5 #define __MLX5_LAG_H__ 6 7 #include <linux/debugfs.h> 8 9 #define MLX5_LAG_MAX_HASH_BUCKETS 16 10 #include "mlx5_core.h" 11 #include "mp.h" 12 #include "port_sel.h" 13 #include "mpesw.h" 14 15 enum { 16 MLX5_LAG_P1, 17 MLX5_LAG_P2, 18 }; 19 20 enum { 21 MLX5_LAG_FLAG_NDEVS_READY, 22 }; 23 24 enum { 25 MLX5_LAG_MODE_FLAG_HASH_BASED, 26 MLX5_LAG_MODE_FLAG_SHARED_FDB, 27 MLX5_LAG_MODE_FLAG_FDB_SEL_MODE_NATIVE, 28 }; 29 30 enum mlx5_lag_mode { 31 MLX5_LAG_MODE_NONE, 32 MLX5_LAG_MODE_ROCE, 33 MLX5_LAG_MODE_SRIOV, 34 MLX5_LAG_MODE_MULTIPATH, 35 MLX5_LAG_MODE_MPESW, 36 }; 37 38 struct lag_func { 39 struct mlx5_core_dev *dev; 40 struct net_device *netdev; 41 bool has_drop; 42 }; 43 44 /* Used for collection of netdev event info. */ 45 struct lag_tracker { 46 enum netdev_lag_tx_type tx_type; 47 struct netdev_lag_lower_state_info netdev_state[MLX5_MAX_PORTS]; 48 unsigned int is_bonded:1; 49 unsigned int has_inactive:1; 50 enum netdev_lag_hash hash_type; 51 }; 52 53 enum mpesw_op { 54 MLX5_MPESW_OP_ENABLE, 55 MLX5_MPESW_OP_DISABLE, 56 }; 57 58 struct mlx5_mpesw_work_st { 59 struct work_struct work; 60 struct mlx5_lag *lag; 61 enum mpesw_op op; 62 struct completion comp; 63 int result; 64 }; 65 66 /* LAG data of a ConnectX card. 67 * It serves both its phys functions. 68 */ 69 struct mlx5_lag { 70 enum mlx5_lag_mode mode; 71 unsigned long mode_flags; 72 unsigned long state_flags; 73 u8 ports; 74 u8 buckets; 75 int mode_changes_in_progress; 76 u8 v2p_map[MLX5_MAX_PORTS * MLX5_LAG_MAX_HASH_BUCKETS]; 77 struct kref ref; 78 struct lag_func pf[MLX5_MAX_PORTS]; 79 struct lag_tracker tracker; 80 struct workqueue_struct *wq; 81 struct delayed_work bond_work; 82 struct notifier_block nb; 83 struct lag_mp lag_mp; 84 struct mlx5_lag_port_sel port_sel; 85 /* Protect lag fields/state changes */ 86 struct mutex lock; 87 struct lag_mpesw lag_mpesw; 88 }; 89 90 static inline bool mlx5_is_lag_supported(struct mlx5_core_dev *dev) 91 { 92 if (!MLX5_CAP_GEN(dev, vport_group_manager) || 93 !MLX5_CAP_GEN(dev, lag_master) || 94 MLX5_CAP_GEN(dev, num_lag_ports) < 2 || 95 MLX5_CAP_GEN(dev, num_lag_ports) > MLX5_MAX_PORTS) 96 return false; 97 return true; 98 } 99 100 static inline struct mlx5_lag * 101 mlx5_lag_dev(struct mlx5_core_dev *dev) 102 { 103 return dev->priv.lag; 104 } 105 106 static inline bool 107 __mlx5_lag_is_active(struct mlx5_lag *ldev) 108 { 109 return ldev->mode != MLX5_LAG_MODE_NONE; 110 } 111 112 static inline bool 113 mlx5_lag_is_ready(struct mlx5_lag *ldev) 114 { 115 return test_bit(MLX5_LAG_FLAG_NDEVS_READY, &ldev->state_flags); 116 } 117 118 void mlx5_modify_lag(struct mlx5_lag *ldev, 119 struct lag_tracker *tracker); 120 int mlx5_activate_lag(struct mlx5_lag *ldev, 121 struct lag_tracker *tracker, 122 enum mlx5_lag_mode mode, 123 bool shared_fdb); 124 int mlx5_lag_dev_get_netdev_idx(struct mlx5_lag *ldev, 125 struct net_device *ndev); 126 bool mlx5_shared_fdb_supported(struct mlx5_lag *ldev); 127 void mlx5_lag_del_mpesw_rule(struct mlx5_core_dev *dev); 128 int mlx5_lag_add_mpesw_rule(struct mlx5_core_dev *dev); 129 130 char *mlx5_get_str_port_sel_mode(enum mlx5_lag_mode mode, unsigned long flags); 131 void mlx5_infer_tx_enabled(struct lag_tracker *tracker, u8 num_ports, 132 u8 *ports, int *num_enabled); 133 134 void mlx5_ldev_add_debugfs(struct mlx5_core_dev *dev); 135 void mlx5_ldev_remove_debugfs(struct dentry *dbg); 136 void mlx5_disable_lag(struct mlx5_lag *ldev); 137 138 #endif /* __MLX5_LAG_H__ */ 139