1 /* 2 * Copyright (c) 2015, Mellanox Technologies, Ltd. All rights reserved. 3 * 4 * This software is available to you under a choice of one of two 5 * licenses. You may choose to be licensed under the terms of the GNU 6 * General Public License (GPL) Version 2, available from the file 7 * COPYING in the main directory of this source tree, or the 8 * OpenIB.org BSD license below: 9 * 10 * Redistribution and use in source and binary forms, with or 11 * without modification, are permitted provided that the following 12 * conditions are met: 13 * 14 * - Redistributions of source code must retain the above 15 * copyright notice, this list of conditions and the following 16 * disclaimer. 17 * 18 * - Redistributions in binary form must reproduce the above 19 * copyright notice, this list of conditions and the following 20 * disclaimer in the documentation and/or other materials 21 * provided with the distribution. 22 * 23 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, 24 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF 25 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND 26 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS 27 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN 28 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN 29 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE 30 * SOFTWARE. 31 */ 32 33 #ifndef __MLX5_ESWITCH_H__ 34 #define __MLX5_ESWITCH_H__ 35 36 #include <linux/if_ether.h> 37 #include <linux/if_link.h> 38 #include <linux/atomic.h> 39 #include <linux/xarray.h> 40 #include <net/devlink.h> 41 #include <linux/mlx5/device.h> 42 #include <linux/mlx5/eswitch.h> 43 #include <linux/mlx5/vport.h> 44 #include <linux/mlx5/fs.h> 45 #include "lib/mpfs.h" 46 #include "lib/fs_chains.h" 47 #include "sf/sf.h" 48 #include "en/tc_ct.h" 49 #include "en/tc/sample.h" 50 51 enum mlx5_mapped_obj_type { 52 MLX5_MAPPED_OBJ_CHAIN, 53 MLX5_MAPPED_OBJ_SAMPLE, 54 MLX5_MAPPED_OBJ_INT_PORT_METADATA, 55 }; 56 57 struct mlx5_mapped_obj { 58 enum mlx5_mapped_obj_type type; 59 union { 60 u32 chain; 61 struct { 62 u32 group_id; 63 u32 rate; 64 u32 trunc_size; 65 u32 tunnel_id; 66 } sample; 67 u32 int_port_metadata; 68 }; 69 }; 70 71 #ifdef CONFIG_MLX5_ESWITCH 72 73 #define ESW_OFFLOADS_DEFAULT_NUM_GROUPS 15 74 75 #define MLX5_MAX_UC_PER_VPORT(dev) \ 76 (1 << MLX5_CAP_GEN(dev, log_max_current_uc_list)) 77 78 #define MLX5_MAX_MC_PER_VPORT(dev) \ 79 (1 << MLX5_CAP_GEN(dev, log_max_current_mc_list)) 80 81 #define mlx5_esw_has_fwd_fdb(dev) \ 82 MLX5_CAP_ESW_FLOWTABLE(dev, fdb_multi_path_to_table) 83 84 #define esw_chains(esw) \ 85 ((esw)->fdb_table.offloads.esw_chains_priv) 86 87 enum { 88 MAPPING_TYPE_CHAIN, 89 MAPPING_TYPE_TUNNEL, 90 MAPPING_TYPE_TUNNEL_ENC_OPTS, 91 MAPPING_TYPE_LABELS, 92 MAPPING_TYPE_ZONE, 93 MAPPING_TYPE_INT_PORT, 94 }; 95 96 struct vport_ingress { 97 struct mlx5_flow_table *acl; 98 struct mlx5_flow_handle *allow_rule; 99 struct { 100 struct mlx5_flow_group *allow_spoofchk_only_grp; 101 struct mlx5_flow_group *allow_untagged_spoofchk_grp; 102 struct mlx5_flow_group *allow_untagged_only_grp; 103 struct mlx5_flow_group *drop_grp; 104 struct mlx5_flow_handle *drop_rule; 105 struct mlx5_fc *drop_counter; 106 } legacy; 107 struct { 108 /* Optional group to add an FTE to do internal priority 109 * tagging on ingress packets. 110 */ 111 struct mlx5_flow_group *metadata_prio_tag_grp; 112 /* Group to add default match-all FTE entry to tag ingress 113 * packet with metadata. 114 */ 115 struct mlx5_flow_group *metadata_allmatch_grp; 116 /* Optional group to add a drop all rule */ 117 struct mlx5_flow_group *drop_grp; 118 struct mlx5_modify_hdr *modify_metadata; 119 struct mlx5_flow_handle *modify_metadata_rule; 120 struct mlx5_flow_handle *drop_rule; 121 } offloads; 122 }; 123 124 struct vport_egress { 125 struct mlx5_flow_table *acl; 126 struct mlx5_flow_handle *allowed_vlan; 127 struct mlx5_flow_group *vlan_grp; 128 union { 129 struct { 130 struct mlx5_flow_group *drop_grp; 131 struct mlx5_flow_handle *drop_rule; 132 struct mlx5_fc *drop_counter; 133 } legacy; 134 struct { 135 struct mlx5_flow_group *fwd_grp; 136 struct mlx5_flow_handle *fwd_rule; 137 struct mlx5_flow_handle *bounce_rule; 138 struct mlx5_flow_group *bounce_grp; 139 } offloads; 140 }; 141 }; 142 143 struct mlx5_vport_drop_stats { 144 u64 rx_dropped; 145 u64 tx_dropped; 146 }; 147 148 struct mlx5_vport_info { 149 u8 mac[ETH_ALEN]; 150 u16 vlan; 151 u64 node_guid; 152 int link_state; 153 u8 qos; 154 u8 spoofchk: 1; 155 u8 trusted: 1; 156 u8 roce_enabled: 1; 157 u8 mig_enabled: 1; 158 }; 159 160 /* Vport context events */ 161 enum mlx5_eswitch_vport_event { 162 MLX5_VPORT_UC_ADDR_CHANGE = BIT(0), 163 MLX5_VPORT_MC_ADDR_CHANGE = BIT(1), 164 MLX5_VPORT_PROMISC_CHANGE = BIT(3), 165 }; 166 167 struct mlx5_vport { 168 struct mlx5_core_dev *dev; 169 struct hlist_head uc_list[MLX5_L2_ADDR_HASH_SIZE]; 170 struct hlist_head mc_list[MLX5_L2_ADDR_HASH_SIZE]; 171 struct mlx5_flow_handle *promisc_rule; 172 struct mlx5_flow_handle *allmulti_rule; 173 struct work_struct vport_change_handler; 174 175 struct vport_ingress ingress; 176 struct vport_egress egress; 177 u32 default_metadata; 178 u32 metadata; 179 180 struct mlx5_vport_info info; 181 182 struct { 183 bool enabled; 184 u32 esw_tsar_ix; 185 u32 bw_share; 186 u32 min_rate; 187 u32 max_rate; 188 struct mlx5_esw_rate_group *group; 189 } qos; 190 191 u16 vport; 192 bool enabled; 193 enum mlx5_eswitch_vport_event enabled_events; 194 int index; 195 struct devlink_port *dl_port; 196 struct dentry *dbgfs; 197 }; 198 199 struct mlx5_esw_indir_table; 200 201 struct mlx5_eswitch_fdb { 202 union { 203 struct legacy_fdb { 204 struct mlx5_flow_table *fdb; 205 struct mlx5_flow_group *addr_grp; 206 struct mlx5_flow_group *allmulti_grp; 207 struct mlx5_flow_group *promisc_grp; 208 struct mlx5_flow_table *vepa_fdb; 209 struct mlx5_flow_handle *vepa_uplink_rule; 210 struct mlx5_flow_handle *vepa_star_rule; 211 } legacy; 212 213 struct offloads_fdb { 214 struct mlx5_flow_namespace *ns; 215 struct mlx5_flow_table *tc_miss_table; 216 struct mlx5_flow_table *slow_fdb; 217 struct mlx5_flow_group *send_to_vport_grp; 218 struct mlx5_flow_group *send_to_vport_meta_grp; 219 struct mlx5_flow_group *peer_miss_grp; 220 struct mlx5_flow_handle **peer_miss_rules; 221 struct mlx5_flow_group *miss_grp; 222 struct mlx5_flow_handle **send_to_vport_meta_rules; 223 struct mlx5_flow_handle *miss_rule_uni; 224 struct mlx5_flow_handle *miss_rule_multi; 225 int vlan_push_pop_refcount; 226 227 struct mlx5_fs_chains *esw_chains_priv; 228 struct { 229 DECLARE_HASHTABLE(table, 8); 230 /* Protects vports.table */ 231 struct mutex lock; 232 } vports; 233 234 struct mlx5_esw_indir_table *indir; 235 236 } offloads; 237 }; 238 u32 flags; 239 }; 240 241 struct mlx5_esw_offload { 242 struct mlx5_flow_table *ft_offloads_restore; 243 struct mlx5_flow_group *restore_group; 244 struct mlx5_modify_hdr *restore_copy_hdr_id; 245 struct mapping_ctx *reg_c0_obj_pool; 246 247 struct mlx5_flow_table *ft_offloads; 248 struct mlx5_flow_group *vport_rx_group; 249 struct mlx5_flow_group *vport_rx_drop_group; 250 struct mlx5_flow_handle *vport_rx_drop_rule; 251 struct xarray vport_reps; 252 struct list_head peer_flows; 253 struct mutex peer_mutex; 254 struct mutex encap_tbl_lock; /* protects encap_tbl */ 255 DECLARE_HASHTABLE(encap_tbl, 8); 256 struct mutex decap_tbl_lock; /* protects decap_tbl */ 257 DECLARE_HASHTABLE(decap_tbl, 8); 258 struct mod_hdr_tbl mod_hdr; 259 DECLARE_HASHTABLE(termtbl_tbl, 8); 260 struct mutex termtbl_mutex; /* protects termtbl hash */ 261 struct xarray vhca_map; 262 const struct mlx5_eswitch_rep_ops *rep_ops[NUM_REP_TYPES]; 263 u8 inline_mode; 264 atomic64_t num_flows; 265 enum devlink_eswitch_encap_mode encap; 266 struct ida vport_metadata_ida; 267 unsigned int host_number; /* ECPF supports one external host */ 268 }; 269 270 /* E-Switch MC FDB table hash node */ 271 struct esw_mc_addr { /* SRIOV only */ 272 struct l2addr_node node; 273 struct mlx5_flow_handle *uplink_rule; /* Forward to uplink rule */ 274 u32 refcnt; 275 }; 276 277 struct mlx5_host_work { 278 struct work_struct work; 279 struct mlx5_eswitch *esw; 280 }; 281 282 struct mlx5_esw_functions { 283 struct mlx5_nb nb; 284 u16 num_vfs; 285 }; 286 287 enum { 288 MLX5_ESWITCH_VPORT_MATCH_METADATA = BIT(0), 289 MLX5_ESWITCH_REG_C1_LOOPBACK_ENABLED = BIT(1), 290 MLX5_ESWITCH_VPORT_ACL_NS_CREATED = BIT(2), 291 }; 292 293 struct mlx5_esw_bridge_offloads; 294 295 enum { 296 MLX5_ESW_FDB_CREATED = BIT(0), 297 }; 298 299 struct mlx5_eswitch { 300 struct mlx5_core_dev *dev; 301 struct mlx5_nb nb; 302 struct mlx5_eswitch_fdb fdb_table; 303 /* legacy data structures */ 304 struct hlist_head mc_table[MLX5_L2_ADDR_HASH_SIZE]; 305 struct esw_mc_addr mc_promisc; 306 /* end of legacy */ 307 struct workqueue_struct *work_queue; 308 struct xarray vports; 309 u32 flags; 310 int total_vports; 311 int enabled_vports; 312 /* Synchronize between vport change events 313 * and async SRIOV admin state changes 314 */ 315 struct mutex state_lock; 316 317 /* Protects eswitch mode change that occurs via one or more 318 * user commands, i.e. sriov state change, devlink commands. 319 */ 320 struct rw_semaphore mode_lock; 321 atomic64_t user_count; 322 323 struct { 324 u32 root_tsar_ix; 325 struct mlx5_esw_rate_group *group0; 326 struct list_head groups; /* Protected by esw->state_lock */ 327 328 /* Protected by esw->state_lock. 329 * Initially 0, meaning no QoS users and QoS is disabled. 330 */ 331 refcount_t refcnt; 332 } qos; 333 334 struct mlx5_esw_bridge_offloads *br_offloads; 335 struct mlx5_esw_offload offloads; 336 int mode; 337 u16 manager_vport; 338 u16 first_host_vport; 339 struct mlx5_esw_functions esw_funcs; 340 struct { 341 u32 large_group_num; 342 } params; 343 struct blocking_notifier_head n_head; 344 struct dentry *dbgfs; 345 }; 346 347 void esw_offloads_disable(struct mlx5_eswitch *esw); 348 int esw_offloads_enable(struct mlx5_eswitch *esw); 349 void esw_offloads_cleanup_reps(struct mlx5_eswitch *esw); 350 int esw_offloads_init_reps(struct mlx5_eswitch *esw); 351 352 struct mlx5_flow_handle * 353 mlx5_eswitch_add_send_to_vport_meta_rule(struct mlx5_eswitch *esw, u16 vport_num); 354 void mlx5_eswitch_del_send_to_vport_meta_rule(struct mlx5_flow_handle *rule); 355 356 bool mlx5_esw_vport_match_metadata_supported(const struct mlx5_eswitch *esw); 357 int mlx5_esw_offloads_vport_metadata_set(struct mlx5_eswitch *esw, bool enable); 358 u32 mlx5_esw_match_metadata_alloc(struct mlx5_eswitch *esw); 359 void mlx5_esw_match_metadata_free(struct mlx5_eswitch *esw, u32 metadata); 360 361 int mlx5_esw_qos_modify_vport_rate(struct mlx5_eswitch *esw, u16 vport_num, u32 rate_mbps); 362 363 /* E-Switch API */ 364 int mlx5_eswitch_init(struct mlx5_core_dev *dev); 365 void mlx5_eswitch_cleanup(struct mlx5_eswitch *esw); 366 367 #define MLX5_ESWITCH_IGNORE_NUM_VFS (-1) 368 int mlx5_eswitch_enable_locked(struct mlx5_eswitch *esw, int num_vfs); 369 int mlx5_eswitch_enable(struct mlx5_eswitch *esw, int num_vfs); 370 void mlx5_eswitch_disable_sriov(struct mlx5_eswitch *esw, bool clear_vf); 371 void mlx5_eswitch_disable_locked(struct mlx5_eswitch *esw); 372 void mlx5_eswitch_disable(struct mlx5_eswitch *esw); 373 int mlx5_eswitch_set_vport_mac(struct mlx5_eswitch *esw, 374 u16 vport, const u8 *mac); 375 int mlx5_eswitch_set_vport_state(struct mlx5_eswitch *esw, 376 u16 vport, int link_state); 377 int mlx5_eswitch_set_vport_vlan(struct mlx5_eswitch *esw, 378 u16 vport, u16 vlan, u8 qos); 379 int mlx5_eswitch_set_vport_spoofchk(struct mlx5_eswitch *esw, 380 u16 vport, bool spoofchk); 381 int mlx5_eswitch_set_vport_trust(struct mlx5_eswitch *esw, 382 u16 vport_num, bool setting); 383 int mlx5_eswitch_set_vport_rate(struct mlx5_eswitch *esw, u16 vport, 384 u32 max_rate, u32 min_rate); 385 int mlx5_esw_qos_vport_update_group(struct mlx5_eswitch *esw, 386 struct mlx5_vport *vport, 387 struct mlx5_esw_rate_group *group, 388 struct netlink_ext_ack *extack); 389 int mlx5_eswitch_set_vepa(struct mlx5_eswitch *esw, u8 setting); 390 int mlx5_eswitch_get_vepa(struct mlx5_eswitch *esw, u8 *setting); 391 int mlx5_eswitch_get_vport_config(struct mlx5_eswitch *esw, 392 u16 vport, struct ifla_vf_info *ivi); 393 int mlx5_eswitch_get_vport_stats(struct mlx5_eswitch *esw, 394 u16 vport, 395 struct ifla_vf_stats *vf_stats); 396 void mlx5_eswitch_del_send_to_vport_rule(struct mlx5_flow_handle *rule); 397 398 int mlx5_eswitch_modify_esw_vport_context(struct mlx5_core_dev *dev, u16 vport, 399 bool other_vport, void *in); 400 401 struct mlx5_flow_spec; 402 struct mlx5_esw_flow_attr; 403 struct mlx5_termtbl_handle; 404 405 bool 406 mlx5_eswitch_termtbl_required(struct mlx5_eswitch *esw, 407 struct mlx5_flow_attr *attr, 408 struct mlx5_flow_act *flow_act, 409 struct mlx5_flow_spec *spec); 410 411 struct mlx5_flow_handle * 412 mlx5_eswitch_add_termtbl_rule(struct mlx5_eswitch *esw, 413 struct mlx5_flow_table *ft, 414 struct mlx5_flow_spec *spec, 415 struct mlx5_esw_flow_attr *attr, 416 struct mlx5_flow_act *flow_act, 417 struct mlx5_flow_destination *dest, 418 int num_dest); 419 420 void 421 mlx5_eswitch_termtbl_put(struct mlx5_eswitch *esw, 422 struct mlx5_termtbl_handle *tt); 423 424 void 425 mlx5_eswitch_clear_rule_source_port(struct mlx5_eswitch *esw, struct mlx5_flow_spec *spec); 426 427 struct mlx5_flow_handle * 428 mlx5_eswitch_add_offloaded_rule(struct mlx5_eswitch *esw, 429 struct mlx5_flow_spec *spec, 430 struct mlx5_flow_attr *attr); 431 struct mlx5_flow_handle * 432 mlx5_eswitch_add_fwd_rule(struct mlx5_eswitch *esw, 433 struct mlx5_flow_spec *spec, 434 struct mlx5_flow_attr *attr); 435 void 436 mlx5_eswitch_del_offloaded_rule(struct mlx5_eswitch *esw, 437 struct mlx5_flow_handle *rule, 438 struct mlx5_flow_attr *attr); 439 void 440 mlx5_eswitch_del_fwd_rule(struct mlx5_eswitch *esw, 441 struct mlx5_flow_handle *rule, 442 struct mlx5_flow_attr *attr); 443 444 struct mlx5_flow_handle * 445 mlx5_eswitch_create_vport_rx_rule(struct mlx5_eswitch *esw, u16 vport, 446 struct mlx5_flow_destination *dest); 447 448 enum { 449 SET_VLAN_STRIP = BIT(0), 450 SET_VLAN_INSERT = BIT(1) 451 }; 452 453 enum mlx5_flow_match_level { 454 MLX5_MATCH_NONE = MLX5_INLINE_MODE_NONE, 455 MLX5_MATCH_L2 = MLX5_INLINE_MODE_L2, 456 MLX5_MATCH_L3 = MLX5_INLINE_MODE_IP, 457 MLX5_MATCH_L4 = MLX5_INLINE_MODE_TCP_UDP, 458 }; 459 460 /* current maximum for flow based vport multicasting */ 461 #define MLX5_MAX_FLOW_FWD_VPORTS 32 462 463 enum { 464 MLX5_ESW_DEST_ENCAP = BIT(0), 465 MLX5_ESW_DEST_ENCAP_VALID = BIT(1), 466 MLX5_ESW_DEST_CHAIN_WITH_SRC_PORT_CHANGE = BIT(2), 467 }; 468 469 struct mlx5_esw_flow_attr { 470 struct mlx5_eswitch_rep *in_rep; 471 struct mlx5_core_dev *in_mdev; 472 struct mlx5_core_dev *counter_dev; 473 struct mlx5e_tc_int_port *dest_int_port; 474 struct mlx5e_tc_int_port *int_port; 475 476 int split_count; 477 int out_count; 478 479 __be16 vlan_proto[MLX5_FS_VLAN_DEPTH]; 480 u16 vlan_vid[MLX5_FS_VLAN_DEPTH]; 481 u8 vlan_prio[MLX5_FS_VLAN_DEPTH]; 482 u8 total_vlan; 483 struct { 484 u32 flags; 485 struct mlx5_eswitch_rep *rep; 486 struct mlx5_pkt_reformat *pkt_reformat; 487 struct mlx5_core_dev *mdev; 488 struct mlx5_termtbl_handle *termtbl; 489 int src_port_rewrite_act_id; 490 } dests[MLX5_MAX_FLOW_FWD_VPORTS]; 491 struct mlx5_rx_tun_attr *rx_tun_attr; 492 struct ethhdr eth; 493 struct mlx5_pkt_reformat *decap_pkt_reformat; 494 }; 495 496 int mlx5_devlink_eswitch_mode_set(struct devlink *devlink, u16 mode, 497 struct netlink_ext_ack *extack); 498 int mlx5_devlink_eswitch_mode_get(struct devlink *devlink, u16 *mode); 499 int mlx5_devlink_eswitch_inline_mode_set(struct devlink *devlink, u8 mode, 500 struct netlink_ext_ack *extack); 501 int mlx5_devlink_eswitch_inline_mode_get(struct devlink *devlink, u8 *mode); 502 int mlx5_devlink_eswitch_encap_mode_set(struct devlink *devlink, 503 enum devlink_eswitch_encap_mode encap, 504 struct netlink_ext_ack *extack); 505 int mlx5_devlink_eswitch_encap_mode_get(struct devlink *devlink, 506 enum devlink_eswitch_encap_mode *encap); 507 int mlx5_devlink_port_function_hw_addr_get(struct devlink_port *port, 508 u8 *hw_addr, int *hw_addr_len, 509 struct netlink_ext_ack *extack); 510 int mlx5_devlink_port_function_hw_addr_set(struct devlink_port *port, 511 const u8 *hw_addr, int hw_addr_len, 512 struct netlink_ext_ack *extack); 513 int mlx5_devlink_port_fn_roce_get(struct devlink_port *port, bool *is_enabled, 514 struct netlink_ext_ack *extack); 515 int mlx5_devlink_port_fn_roce_set(struct devlink_port *port, bool enable, 516 struct netlink_ext_ack *extack); 517 int mlx5_devlink_port_fn_migratable_get(struct devlink_port *port, bool *is_enabled, 518 struct netlink_ext_ack *extack); 519 int mlx5_devlink_port_fn_migratable_set(struct devlink_port *port, bool enable, 520 struct netlink_ext_ack *extack); 521 void *mlx5_eswitch_get_uplink_priv(struct mlx5_eswitch *esw, u8 rep_type); 522 523 int mlx5_eswitch_add_vlan_action(struct mlx5_eswitch *esw, 524 struct mlx5_flow_attr *attr); 525 int mlx5_eswitch_del_vlan_action(struct mlx5_eswitch *esw, 526 struct mlx5_flow_attr *attr); 527 int __mlx5_eswitch_set_vport_vlan(struct mlx5_eswitch *esw, 528 u16 vport, u16 vlan, u8 qos, u8 set_flags); 529 530 static inline bool mlx5_eswitch_vlan_actions_supported(struct mlx5_core_dev *dev, 531 u8 vlan_depth) 532 { 533 bool ret = MLX5_CAP_ESW_FLOWTABLE_FDB(dev, pop_vlan) && 534 MLX5_CAP_ESW_FLOWTABLE_FDB(dev, push_vlan); 535 536 if (vlan_depth == 1) 537 return ret; 538 539 return ret && MLX5_CAP_ESW_FLOWTABLE_FDB(dev, pop_vlan_2) && 540 MLX5_CAP_ESW_FLOWTABLE_FDB(dev, push_vlan_2); 541 } 542 543 bool mlx5_esw_multipath_prereq(struct mlx5_core_dev *dev0, 544 struct mlx5_core_dev *dev1); 545 546 const u32 *mlx5_esw_query_functions(struct mlx5_core_dev *dev); 547 548 #define MLX5_DEBUG_ESWITCH_MASK BIT(3) 549 550 #define esw_info(__dev, format, ...) \ 551 dev_info((__dev)->device, "E-Switch: " format, ##__VA_ARGS__) 552 553 #define esw_warn(__dev, format, ...) \ 554 dev_warn((__dev)->device, "E-Switch: " format, ##__VA_ARGS__) 555 556 #define esw_debug(dev, format, ...) \ 557 mlx5_core_dbg_mask(dev, MLX5_DEBUG_ESWITCH_MASK, format, ##__VA_ARGS__) 558 559 static inline bool mlx5_esw_allowed(const struct mlx5_eswitch *esw) 560 { 561 return esw && MLX5_ESWITCH_MANAGER(esw->dev); 562 } 563 564 /* The returned number is valid only when the dev is eswitch manager. */ 565 static inline u16 mlx5_eswitch_manager_vport(struct mlx5_core_dev *dev) 566 { 567 return mlx5_core_is_ecpf_esw_manager(dev) ? 568 MLX5_VPORT_ECPF : MLX5_VPORT_PF; 569 } 570 571 static inline bool 572 mlx5_esw_is_manager_vport(const struct mlx5_eswitch *esw, u16 vport_num) 573 { 574 return esw->manager_vport == vport_num; 575 } 576 577 static inline u16 mlx5_eswitch_first_host_vport_num(struct mlx5_core_dev *dev) 578 { 579 return mlx5_core_is_ecpf_esw_manager(dev) ? 580 MLX5_VPORT_PF : MLX5_VPORT_FIRST_VF; 581 } 582 583 static inline bool mlx5_eswitch_is_funcs_handler(const struct mlx5_core_dev *dev) 584 { 585 return mlx5_core_is_ecpf_esw_manager(dev); 586 } 587 588 static inline unsigned int 589 mlx5_esw_vport_to_devlink_port_index(const struct mlx5_core_dev *dev, 590 u16 vport_num) 591 { 592 return (MLX5_CAP_GEN(dev, vhca_id) << 16) | vport_num; 593 } 594 595 static inline u16 596 mlx5_esw_devlink_port_index_to_vport_num(unsigned int dl_port_index) 597 { 598 return dl_port_index & 0xffff; 599 } 600 601 static inline bool mlx5_esw_is_fdb_created(struct mlx5_eswitch *esw) 602 { 603 return esw->fdb_table.flags & MLX5_ESW_FDB_CREATED; 604 } 605 606 /* TODO: This mlx5e_tc function shouldn't be called by eswitch */ 607 void mlx5e_tc_clean_fdb_peer_flows(struct mlx5_eswitch *esw); 608 609 /* Each mark identifies eswitch vport type. 610 * MLX5_ESW_VPT_HOST_FN is used to identify both PF and VF ports using 611 * a single mark. 612 * MLX5_ESW_VPT_VF identifies a SRIOV VF vport. 613 * MLX5_ESW_VPT_SF identifies SF vport. 614 */ 615 #define MLX5_ESW_VPT_HOST_FN XA_MARK_0 616 #define MLX5_ESW_VPT_VF XA_MARK_1 617 #define MLX5_ESW_VPT_SF XA_MARK_2 618 619 /* The vport iterator is valid only after vport are initialized in mlx5_eswitch_init. 620 * Borrowed the idea from xa_for_each_marked() but with support for desired last element. 621 */ 622 623 #define mlx5_esw_for_each_vport(esw, index, vport) \ 624 xa_for_each(&((esw)->vports), index, vport) 625 626 #define mlx5_esw_for_each_entry_marked(xa, index, entry, last, filter) \ 627 for (index = 0, entry = xa_find(xa, &index, last, filter); \ 628 entry; entry = xa_find_after(xa, &index, last, filter)) 629 630 #define mlx5_esw_for_each_vport_marked(esw, index, vport, last, filter) \ 631 mlx5_esw_for_each_entry_marked(&((esw)->vports), index, vport, last, filter) 632 633 #define mlx5_esw_for_each_vf_vport(esw, index, vport, last) \ 634 mlx5_esw_for_each_vport_marked(esw, index, vport, last, MLX5_ESW_VPT_VF) 635 636 #define mlx5_esw_for_each_host_func_vport(esw, index, vport, last) \ 637 mlx5_esw_for_each_vport_marked(esw, index, vport, last, MLX5_ESW_VPT_HOST_FN) 638 639 struct mlx5_eswitch *mlx5_devlink_eswitch_get(struct devlink *devlink); 640 struct mlx5_vport *__must_check 641 mlx5_eswitch_get_vport(struct mlx5_eswitch *esw, u16 vport_num); 642 643 bool mlx5_eswitch_is_vf_vport(struct mlx5_eswitch *esw, u16 vport_num); 644 bool mlx5_esw_is_sf_vport(struct mlx5_eswitch *esw, u16 vport_num); 645 646 int mlx5_esw_funcs_changed_handler(struct notifier_block *nb, unsigned long type, void *data); 647 648 int 649 mlx5_eswitch_enable_pf_vf_vports(struct mlx5_eswitch *esw, 650 enum mlx5_eswitch_vport_event enabled_events); 651 void mlx5_eswitch_disable_pf_vf_vports(struct mlx5_eswitch *esw); 652 653 int mlx5_esw_vport_enable(struct mlx5_eswitch *esw, u16 vport_num, 654 enum mlx5_eswitch_vport_event enabled_events); 655 void mlx5_esw_vport_disable(struct mlx5_eswitch *esw, u16 vport_num); 656 657 int 658 esw_vport_create_offloads_acl_tables(struct mlx5_eswitch *esw, 659 struct mlx5_vport *vport); 660 void 661 esw_vport_destroy_offloads_acl_tables(struct mlx5_eswitch *esw, 662 struct mlx5_vport *vport); 663 664 struct esw_vport_tbl_namespace { 665 int max_fte; 666 int max_num_groups; 667 u32 flags; 668 }; 669 670 struct mlx5_vport_tbl_attr { 671 u32 chain; 672 u16 prio; 673 u16 vport; 674 const struct esw_vport_tbl_namespace *vport_ns; 675 }; 676 677 struct mlx5_flow_table * 678 mlx5_esw_vporttbl_get(struct mlx5_eswitch *esw, struct mlx5_vport_tbl_attr *attr); 679 void 680 mlx5_esw_vporttbl_put(struct mlx5_eswitch *esw, struct mlx5_vport_tbl_attr *attr); 681 682 struct mlx5_flow_handle * 683 esw_add_restore_rule(struct mlx5_eswitch *esw, u32 tag); 684 685 int esw_offloads_load_rep(struct mlx5_eswitch *esw, u16 vport_num); 686 void esw_offloads_unload_rep(struct mlx5_eswitch *esw, u16 vport_num); 687 688 int mlx5_esw_offloads_rep_load(struct mlx5_eswitch *esw, u16 vport_num); 689 void mlx5_esw_offloads_rep_unload(struct mlx5_eswitch *esw, u16 vport_num); 690 691 int mlx5_eswitch_load_vport(struct mlx5_eswitch *esw, u16 vport_num, 692 enum mlx5_eswitch_vport_event enabled_events); 693 void mlx5_eswitch_unload_vport(struct mlx5_eswitch *esw, u16 vport_num); 694 695 int mlx5_eswitch_load_vf_vports(struct mlx5_eswitch *esw, u16 num_vfs, 696 enum mlx5_eswitch_vport_event enabled_events); 697 void mlx5_eswitch_unload_vf_vports(struct mlx5_eswitch *esw, u16 num_vfs); 698 699 int mlx5_esw_offloads_devlink_port_register(struct mlx5_eswitch *esw, u16 vport_num); 700 void mlx5_esw_offloads_devlink_port_unregister(struct mlx5_eswitch *esw, u16 vport_num); 701 struct devlink_port *mlx5_esw_offloads_devlink_port(struct mlx5_eswitch *esw, u16 vport_num); 702 703 void mlx5_esw_vport_debugfs_create(struct mlx5_eswitch *esw, u16 vport_num, bool is_sf, u16 sf_num); 704 void mlx5_esw_vport_debugfs_destroy(struct mlx5_eswitch *esw, u16 vport_num); 705 706 int mlx5_esw_devlink_sf_port_register(struct mlx5_eswitch *esw, struct devlink_port *dl_port, 707 u16 vport_num, u32 controller, u32 sfnum); 708 void mlx5_esw_devlink_sf_port_unregister(struct mlx5_eswitch *esw, u16 vport_num); 709 710 int mlx5_esw_offloads_sf_vport_enable(struct mlx5_eswitch *esw, struct devlink_port *dl_port, 711 u16 vport_num, u32 controller, u32 sfnum); 712 void mlx5_esw_offloads_sf_vport_disable(struct mlx5_eswitch *esw, u16 vport_num); 713 int mlx5_esw_sf_max_hpf_functions(struct mlx5_core_dev *dev, u16 *max_sfs, u16 *sf_base_id); 714 715 int mlx5_esw_vport_vhca_id_set(struct mlx5_eswitch *esw, u16 vport_num); 716 void mlx5_esw_vport_vhca_id_clear(struct mlx5_eswitch *esw, u16 vport_num); 717 int mlx5_eswitch_vhca_id_to_vport(struct mlx5_eswitch *esw, u16 vhca_id, u16 *vport_num); 718 719 /** 720 * mlx5_esw_event_info - Indicates eswitch mode changed/changing. 721 * 722 * @new_mode: New mode of eswitch. 723 */ 724 struct mlx5_esw_event_info { 725 u16 new_mode; 726 }; 727 728 int mlx5_esw_event_notifier_register(struct mlx5_eswitch *esw, struct notifier_block *n); 729 void mlx5_esw_event_notifier_unregister(struct mlx5_eswitch *esw, struct notifier_block *n); 730 731 bool mlx5_esw_hold(struct mlx5_core_dev *dev); 732 void mlx5_esw_release(struct mlx5_core_dev *dev); 733 void mlx5_esw_get(struct mlx5_core_dev *dev); 734 void mlx5_esw_put(struct mlx5_core_dev *dev); 735 int mlx5_esw_try_lock(struct mlx5_eswitch *esw); 736 void mlx5_esw_unlock(struct mlx5_eswitch *esw); 737 738 void esw_vport_change_handle_locked(struct mlx5_vport *vport); 739 740 bool mlx5_esw_offloads_controller_valid(const struct mlx5_eswitch *esw, u32 controller); 741 742 int mlx5_eswitch_offloads_config_single_fdb(struct mlx5_eswitch *master_esw, 743 struct mlx5_eswitch *slave_esw); 744 void mlx5_eswitch_offloads_destroy_single_fdb(struct mlx5_eswitch *master_esw, 745 struct mlx5_eswitch *slave_esw); 746 int mlx5_eswitch_reload_reps(struct mlx5_eswitch *esw); 747 748 static inline int mlx5_eswitch_num_vfs(struct mlx5_eswitch *esw) 749 { 750 if (mlx5_esw_allowed(esw)) 751 return esw->esw_funcs.num_vfs; 752 753 return 0; 754 } 755 756 static inline struct mlx5_flow_table * 757 mlx5_eswitch_get_slow_fdb(struct mlx5_eswitch *esw) 758 { 759 return esw->fdb_table.offloads.slow_fdb; 760 } 761 #else /* CONFIG_MLX5_ESWITCH */ 762 /* eswitch API stubs */ 763 static inline int mlx5_eswitch_init(struct mlx5_core_dev *dev) { return 0; } 764 static inline void mlx5_eswitch_cleanup(struct mlx5_eswitch *esw) {} 765 static inline int mlx5_eswitch_enable(struct mlx5_eswitch *esw, int num_vfs) { return 0; } 766 static inline void mlx5_eswitch_disable_sriov(struct mlx5_eswitch *esw, bool clear_vf) {} 767 static inline void mlx5_eswitch_disable(struct mlx5_eswitch *esw) {} 768 static inline bool mlx5_eswitch_is_funcs_handler(struct mlx5_core_dev *dev) { return false; } 769 static inline 770 int mlx5_eswitch_set_vport_state(struct mlx5_eswitch *esw, u16 vport, int link_state) { return 0; } 771 static inline const u32 *mlx5_esw_query_functions(struct mlx5_core_dev *dev) 772 { 773 return ERR_PTR(-EOPNOTSUPP); 774 } 775 776 static inline struct mlx5_flow_handle * 777 esw_add_restore_rule(struct mlx5_eswitch *esw, u32 tag) 778 { 779 return ERR_PTR(-EOPNOTSUPP); 780 } 781 782 static inline unsigned int 783 mlx5_esw_vport_to_devlink_port_index(const struct mlx5_core_dev *dev, 784 u16 vport_num) 785 { 786 return vport_num; 787 } 788 789 static inline int 790 mlx5_eswitch_offloads_config_single_fdb(struct mlx5_eswitch *master_esw, 791 struct mlx5_eswitch *slave_esw) 792 { 793 return 0; 794 } 795 796 static inline void 797 mlx5_eswitch_offloads_destroy_single_fdb(struct mlx5_eswitch *master_esw, 798 struct mlx5_eswitch *slave_esw) {} 799 800 static inline int 801 mlx5_eswitch_reload_reps(struct mlx5_eswitch *esw) 802 { 803 return 0; 804 } 805 #endif /* CONFIG_MLX5_ESWITCH */ 806 807 #endif /* __MLX5_ESWITCH_H__ */ 808