1 /* 2 * Copyright (c) 2015, Mellanox Technologies, Ltd. All rights reserved. 3 * 4 * This software is available to you under a choice of one of two 5 * licenses. You may choose to be licensed under the terms of the GNU 6 * General Public License (GPL) Version 2, available from the file 7 * COPYING in the main directory of this source tree, or the 8 * OpenIB.org BSD license below: 9 * 10 * Redistribution and use in source and binary forms, with or 11 * without modification, are permitted provided that the following 12 * conditions are met: 13 * 14 * - Redistributions of source code must retain the above 15 * copyright notice, this list of conditions and the following 16 * disclaimer. 17 * 18 * - Redistributions in binary form must reproduce the above 19 * copyright notice, this list of conditions and the following 20 * disclaimer in the documentation and/or other materials 21 * provided with the distribution. 22 * 23 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, 24 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF 25 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND 26 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS 27 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN 28 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN 29 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE 30 * SOFTWARE. 31 */ 32 33 #ifndef __MLX5_ESWITCH_H__ 34 #define __MLX5_ESWITCH_H__ 35 36 #include <linux/if_ether.h> 37 #include <linux/if_link.h> 38 #include <linux/atomic.h> 39 #include <net/devlink.h> 40 #include <linux/mlx5/device.h> 41 #include <linux/mlx5/eswitch.h> 42 #include <linux/mlx5/vport.h> 43 #include <linux/mlx5/fs.h> 44 #include "lib/mpfs.h" 45 #include "en/tc_ct.h" 46 47 #ifdef CONFIG_MLX5_ESWITCH 48 49 #define ESW_OFFLOADS_DEFAULT_NUM_GROUPS 15 50 51 #define MLX5_MAX_UC_PER_VPORT(dev) \ 52 (1 << MLX5_CAP_GEN(dev, log_max_current_uc_list)) 53 54 #define MLX5_MAX_MC_PER_VPORT(dev) \ 55 (1 << MLX5_CAP_GEN(dev, log_max_current_mc_list)) 56 57 #define MLX5_MIN_BW_SHARE 1 58 59 #define MLX5_RATE_TO_BW_SHARE(rate, divider, limit) \ 60 min_t(u32, max_t(u32, (rate) / (divider), MLX5_MIN_BW_SHARE), limit) 61 62 #define mlx5_esw_has_fwd_fdb(dev) \ 63 MLX5_CAP_ESW_FLOWTABLE(dev, fdb_multi_path_to_table) 64 65 struct vport_ingress { 66 struct mlx5_flow_table *acl; 67 struct mlx5_flow_handle *allow_rule; 68 struct { 69 struct mlx5_flow_group *allow_spoofchk_only_grp; 70 struct mlx5_flow_group *allow_untagged_spoofchk_grp; 71 struct mlx5_flow_group *allow_untagged_only_grp; 72 struct mlx5_flow_group *drop_grp; 73 struct mlx5_flow_handle *drop_rule; 74 struct mlx5_fc *drop_counter; 75 } legacy; 76 struct { 77 /* Optional group to add an FTE to do internal priority 78 * tagging on ingress packets. 79 */ 80 struct mlx5_flow_group *metadata_prio_tag_grp; 81 /* Group to add default match-all FTE entry to tag ingress 82 * packet with metadata. 83 */ 84 struct mlx5_flow_group *metadata_allmatch_grp; 85 struct mlx5_modify_hdr *modify_metadata; 86 struct mlx5_flow_handle *modify_metadata_rule; 87 } offloads; 88 }; 89 90 struct vport_egress { 91 struct mlx5_flow_table *acl; 92 struct mlx5_flow_handle *allowed_vlan; 93 struct mlx5_flow_group *vlan_grp; 94 union { 95 struct { 96 struct mlx5_flow_group *drop_grp; 97 struct mlx5_flow_handle *drop_rule; 98 struct mlx5_fc *drop_counter; 99 } legacy; 100 struct { 101 struct mlx5_flow_group *fwd_grp; 102 struct mlx5_flow_handle *fwd_rule; 103 } offloads; 104 }; 105 }; 106 107 struct mlx5_vport_drop_stats { 108 u64 rx_dropped; 109 u64 tx_dropped; 110 }; 111 112 struct mlx5_vport_info { 113 u8 mac[ETH_ALEN]; 114 u16 vlan; 115 u8 qos; 116 u64 node_guid; 117 int link_state; 118 u32 min_rate; 119 u32 max_rate; 120 bool spoofchk; 121 bool trusted; 122 }; 123 124 /* Vport context events */ 125 enum mlx5_eswitch_vport_event { 126 MLX5_VPORT_UC_ADDR_CHANGE = BIT(0), 127 MLX5_VPORT_MC_ADDR_CHANGE = BIT(1), 128 MLX5_VPORT_PROMISC_CHANGE = BIT(3), 129 }; 130 131 struct mlx5_vport { 132 struct mlx5_core_dev *dev; 133 int vport; 134 struct hlist_head uc_list[MLX5_L2_ADDR_HASH_SIZE]; 135 struct hlist_head mc_list[MLX5_L2_ADDR_HASH_SIZE]; 136 struct mlx5_flow_handle *promisc_rule; 137 struct mlx5_flow_handle *allmulti_rule; 138 struct work_struct vport_change_handler; 139 140 struct vport_ingress ingress; 141 struct vport_egress egress; 142 u32 default_metadata; 143 u32 metadata; 144 145 struct mlx5_vport_info info; 146 147 struct { 148 bool enabled; 149 u32 esw_tsar_ix; 150 u32 bw_share; 151 } qos; 152 153 bool enabled; 154 enum mlx5_eswitch_vport_event enabled_events; 155 }; 156 157 enum offloads_fdb_flags { 158 ESW_FDB_CHAINS_AND_PRIOS_SUPPORTED = BIT(0), 159 }; 160 161 struct mlx5_esw_chains_priv; 162 163 struct mlx5_eswitch_fdb { 164 union { 165 struct legacy_fdb { 166 struct mlx5_flow_table *fdb; 167 struct mlx5_flow_group *addr_grp; 168 struct mlx5_flow_group *allmulti_grp; 169 struct mlx5_flow_group *promisc_grp; 170 struct mlx5_flow_table *vepa_fdb; 171 struct mlx5_flow_handle *vepa_uplink_rule; 172 struct mlx5_flow_handle *vepa_star_rule; 173 } legacy; 174 175 struct offloads_fdb { 176 struct mlx5_flow_namespace *ns; 177 struct mlx5_flow_table *slow_fdb; 178 struct mlx5_flow_group *send_to_vport_grp; 179 struct mlx5_flow_group *peer_miss_grp; 180 struct mlx5_flow_handle **peer_miss_rules; 181 struct mlx5_flow_group *miss_grp; 182 struct mlx5_flow_handle *miss_rule_uni; 183 struct mlx5_flow_handle *miss_rule_multi; 184 int vlan_push_pop_refcount; 185 186 struct mlx5_esw_chains_priv *esw_chains_priv; 187 struct { 188 DECLARE_HASHTABLE(table, 8); 189 /* Protects vports.table */ 190 struct mutex lock; 191 } vports; 192 193 } offloads; 194 }; 195 u32 flags; 196 }; 197 198 struct mlx5_esw_offload { 199 struct mlx5_flow_table *ft_offloads_restore; 200 struct mlx5_flow_group *restore_group; 201 struct mlx5_modify_hdr *restore_copy_hdr_id; 202 203 struct mlx5_flow_table *ft_offloads; 204 struct mlx5_flow_group *vport_rx_group; 205 struct mlx5_eswitch_rep *vport_reps; 206 struct list_head peer_flows; 207 struct mutex peer_mutex; 208 struct mutex encap_tbl_lock; /* protects encap_tbl */ 209 DECLARE_HASHTABLE(encap_tbl, 8); 210 struct mutex decap_tbl_lock; /* protects decap_tbl */ 211 DECLARE_HASHTABLE(decap_tbl, 8); 212 struct mod_hdr_tbl mod_hdr; 213 DECLARE_HASHTABLE(termtbl_tbl, 8); 214 struct mutex termtbl_mutex; /* protects termtbl hash */ 215 const struct mlx5_eswitch_rep_ops *rep_ops[NUM_REP_TYPES]; 216 u8 inline_mode; 217 atomic64_t num_flows; 218 enum devlink_eswitch_encap_mode encap; 219 struct ida vport_metadata_ida; 220 }; 221 222 /* E-Switch MC FDB table hash node */ 223 struct esw_mc_addr { /* SRIOV only */ 224 struct l2addr_node node; 225 struct mlx5_flow_handle *uplink_rule; /* Forward to uplink rule */ 226 u32 refcnt; 227 }; 228 229 struct mlx5_host_work { 230 struct work_struct work; 231 struct mlx5_eswitch *esw; 232 }; 233 234 struct mlx5_esw_functions { 235 struct mlx5_nb nb; 236 u16 num_vfs; 237 }; 238 239 enum { 240 MLX5_ESWITCH_VPORT_MATCH_METADATA = BIT(0), 241 MLX5_ESWITCH_REG_C1_LOOPBACK_ENABLED = BIT(1), 242 }; 243 244 struct mlx5_eswitch { 245 struct mlx5_core_dev *dev; 246 struct mlx5_nb nb; 247 struct mlx5_eswitch_fdb fdb_table; 248 /* legacy data structures */ 249 struct hlist_head mc_table[MLX5_L2_ADDR_HASH_SIZE]; 250 struct esw_mc_addr mc_promisc; 251 /* end of legacy */ 252 struct workqueue_struct *work_queue; 253 struct mlx5_vport *vports; 254 u32 flags; 255 int total_vports; 256 int enabled_vports; 257 /* Synchronize between vport change events 258 * and async SRIOV admin state changes 259 */ 260 struct mutex state_lock; 261 262 /* Protects eswitch mode change that occurs via one or more 263 * user commands, i.e. sriov state change, devlink commands. 264 */ 265 struct mutex mode_lock; 266 267 struct { 268 bool enabled; 269 u32 root_tsar_id; 270 } qos; 271 272 struct mlx5_esw_offload offloads; 273 int mode; 274 u16 manager_vport; 275 u16 first_host_vport; 276 struct mlx5_esw_functions esw_funcs; 277 struct { 278 u32 large_group_num; 279 } params; 280 }; 281 282 void esw_offloads_disable(struct mlx5_eswitch *esw); 283 int esw_offloads_enable(struct mlx5_eswitch *esw); 284 void esw_offloads_cleanup_reps(struct mlx5_eswitch *esw); 285 int esw_offloads_init_reps(struct mlx5_eswitch *esw); 286 287 u32 mlx5_esw_match_metadata_alloc(struct mlx5_eswitch *esw); 288 void mlx5_esw_match_metadata_free(struct mlx5_eswitch *esw, u32 metadata); 289 290 int mlx5_esw_modify_vport_rate(struct mlx5_eswitch *esw, u16 vport_num, 291 u32 rate_mbps); 292 293 /* E-Switch API */ 294 int mlx5_eswitch_init(struct mlx5_core_dev *dev); 295 void mlx5_eswitch_cleanup(struct mlx5_eswitch *esw); 296 297 #define MLX5_ESWITCH_IGNORE_NUM_VFS (-1) 298 int mlx5_eswitch_enable_locked(struct mlx5_eswitch *esw, int mode, int num_vfs); 299 int mlx5_eswitch_enable(struct mlx5_eswitch *esw, int num_vfs); 300 void mlx5_eswitch_disable_locked(struct mlx5_eswitch *esw, bool clear_vf); 301 void mlx5_eswitch_disable(struct mlx5_eswitch *esw, bool clear_vf); 302 int mlx5_eswitch_set_vport_mac(struct mlx5_eswitch *esw, 303 u16 vport, const u8 *mac); 304 int mlx5_eswitch_set_vport_state(struct mlx5_eswitch *esw, 305 u16 vport, int link_state); 306 int mlx5_eswitch_set_vport_vlan(struct mlx5_eswitch *esw, 307 u16 vport, u16 vlan, u8 qos); 308 int mlx5_eswitch_set_vport_spoofchk(struct mlx5_eswitch *esw, 309 u16 vport, bool spoofchk); 310 int mlx5_eswitch_set_vport_trust(struct mlx5_eswitch *esw, 311 u16 vport_num, bool setting); 312 int mlx5_eswitch_set_vport_rate(struct mlx5_eswitch *esw, u16 vport, 313 u32 max_rate, u32 min_rate); 314 int mlx5_eswitch_set_vepa(struct mlx5_eswitch *esw, u8 setting); 315 int mlx5_eswitch_get_vepa(struct mlx5_eswitch *esw, u8 *setting); 316 int mlx5_eswitch_get_vport_config(struct mlx5_eswitch *esw, 317 u16 vport, struct ifla_vf_info *ivi); 318 int mlx5_eswitch_get_vport_stats(struct mlx5_eswitch *esw, 319 u16 vport, 320 struct ifla_vf_stats *vf_stats); 321 void mlx5_eswitch_del_send_to_vport_rule(struct mlx5_flow_handle *rule); 322 323 int mlx5_eswitch_modify_esw_vport_context(struct mlx5_core_dev *dev, u16 vport, 324 bool other_vport, void *in); 325 326 struct mlx5_flow_spec; 327 struct mlx5_esw_flow_attr; 328 struct mlx5_termtbl_handle; 329 330 bool 331 mlx5_eswitch_termtbl_required(struct mlx5_eswitch *esw, 332 struct mlx5_esw_flow_attr *attr, 333 struct mlx5_flow_act *flow_act, 334 struct mlx5_flow_spec *spec); 335 336 struct mlx5_flow_handle * 337 mlx5_eswitch_add_termtbl_rule(struct mlx5_eswitch *esw, 338 struct mlx5_flow_table *ft, 339 struct mlx5_flow_spec *spec, 340 struct mlx5_esw_flow_attr *attr, 341 struct mlx5_flow_act *flow_act, 342 struct mlx5_flow_destination *dest, 343 int num_dest); 344 345 void 346 mlx5_eswitch_termtbl_put(struct mlx5_eswitch *esw, 347 struct mlx5_termtbl_handle *tt); 348 349 struct mlx5_flow_handle * 350 mlx5_eswitch_add_offloaded_rule(struct mlx5_eswitch *esw, 351 struct mlx5_flow_spec *spec, 352 struct mlx5_esw_flow_attr *attr); 353 struct mlx5_flow_handle * 354 mlx5_eswitch_add_fwd_rule(struct mlx5_eswitch *esw, 355 struct mlx5_flow_spec *spec, 356 struct mlx5_esw_flow_attr *attr); 357 void 358 mlx5_eswitch_del_offloaded_rule(struct mlx5_eswitch *esw, 359 struct mlx5_flow_handle *rule, 360 struct mlx5_esw_flow_attr *attr); 361 void 362 mlx5_eswitch_del_fwd_rule(struct mlx5_eswitch *esw, 363 struct mlx5_flow_handle *rule, 364 struct mlx5_esw_flow_attr *attr); 365 366 struct mlx5_flow_handle * 367 mlx5_eswitch_create_vport_rx_rule(struct mlx5_eswitch *esw, u16 vport, 368 struct mlx5_flow_destination *dest); 369 370 enum { 371 SET_VLAN_STRIP = BIT(0), 372 SET_VLAN_INSERT = BIT(1) 373 }; 374 375 enum mlx5_flow_match_level { 376 MLX5_MATCH_NONE = MLX5_INLINE_MODE_NONE, 377 MLX5_MATCH_L2 = MLX5_INLINE_MODE_L2, 378 MLX5_MATCH_L3 = MLX5_INLINE_MODE_IP, 379 MLX5_MATCH_L4 = MLX5_INLINE_MODE_TCP_UDP, 380 }; 381 382 /* current maximum for flow based vport multicasting */ 383 #define MLX5_MAX_FLOW_FWD_VPORTS 2 384 385 enum { 386 MLX5_ESW_DEST_ENCAP = BIT(0), 387 MLX5_ESW_DEST_ENCAP_VALID = BIT(1), 388 }; 389 390 enum { 391 MLX5_ESW_ATTR_FLAG_VLAN_HANDLED = BIT(0), 392 MLX5_ESW_ATTR_FLAG_SLOW_PATH = BIT(1), 393 MLX5_ESW_ATTR_FLAG_NO_IN_PORT = BIT(2), 394 }; 395 396 struct mlx5_esw_flow_attr { 397 struct mlx5_eswitch_rep *in_rep; 398 struct mlx5_core_dev *in_mdev; 399 struct mlx5_core_dev *counter_dev; 400 401 int split_count; 402 int out_count; 403 404 int action; 405 __be16 vlan_proto[MLX5_FS_VLAN_DEPTH]; 406 u16 vlan_vid[MLX5_FS_VLAN_DEPTH]; 407 u8 vlan_prio[MLX5_FS_VLAN_DEPTH]; 408 u8 total_vlan; 409 struct { 410 u32 flags; 411 struct mlx5_eswitch_rep *rep; 412 struct mlx5_pkt_reformat *pkt_reformat; 413 struct mlx5_core_dev *mdev; 414 struct mlx5_termtbl_handle *termtbl; 415 } dests[MLX5_MAX_FLOW_FWD_VPORTS]; 416 struct mlx5_modify_hdr *modify_hdr; 417 u8 inner_match_level; 418 u8 outer_match_level; 419 struct mlx5_fc *counter; 420 u32 chain; 421 u16 prio; 422 u32 dest_chain; 423 u32 flags; 424 struct mlx5_flow_table *fdb; 425 struct mlx5_flow_table *dest_ft; 426 struct mlx5_ct_attr ct_attr; 427 struct mlx5_pkt_reformat *decap_pkt_reformat; 428 struct mlx5e_tc_flow_parse_attr *parse_attr; 429 }; 430 431 int mlx5_devlink_eswitch_mode_set(struct devlink *devlink, u16 mode, 432 struct netlink_ext_ack *extack); 433 int mlx5_devlink_eswitch_mode_get(struct devlink *devlink, u16 *mode); 434 int mlx5_devlink_eswitch_inline_mode_set(struct devlink *devlink, u8 mode, 435 struct netlink_ext_ack *extack); 436 int mlx5_devlink_eswitch_inline_mode_get(struct devlink *devlink, u8 *mode); 437 int mlx5_devlink_eswitch_encap_mode_set(struct devlink *devlink, 438 enum devlink_eswitch_encap_mode encap, 439 struct netlink_ext_ack *extack); 440 int mlx5_devlink_eswitch_encap_mode_get(struct devlink *devlink, 441 enum devlink_eswitch_encap_mode *encap); 442 int mlx5_devlink_port_function_hw_addr_get(struct devlink *devlink, 443 struct devlink_port *port, 444 u8 *hw_addr, int *hw_addr_len, 445 struct netlink_ext_ack *extack); 446 int mlx5_devlink_port_function_hw_addr_set(struct devlink *devlink, 447 struct devlink_port *port, 448 const u8 *hw_addr, int hw_addr_len, 449 struct netlink_ext_ack *extack); 450 451 void *mlx5_eswitch_get_uplink_priv(struct mlx5_eswitch *esw, u8 rep_type); 452 453 int mlx5_eswitch_add_vlan_action(struct mlx5_eswitch *esw, 454 struct mlx5_esw_flow_attr *attr); 455 int mlx5_eswitch_del_vlan_action(struct mlx5_eswitch *esw, 456 struct mlx5_esw_flow_attr *attr); 457 int __mlx5_eswitch_set_vport_vlan(struct mlx5_eswitch *esw, 458 u16 vport, u16 vlan, u8 qos, u8 set_flags); 459 460 static inline bool mlx5_esw_qos_enabled(struct mlx5_eswitch *esw) 461 { 462 return esw->qos.enabled; 463 } 464 465 static inline bool mlx5_eswitch_vlan_actions_supported(struct mlx5_core_dev *dev, 466 u8 vlan_depth) 467 { 468 bool ret = MLX5_CAP_ESW_FLOWTABLE_FDB(dev, pop_vlan) && 469 MLX5_CAP_ESW_FLOWTABLE_FDB(dev, push_vlan); 470 471 if (vlan_depth == 1) 472 return ret; 473 474 return ret && MLX5_CAP_ESW_FLOWTABLE_FDB(dev, pop_vlan_2) && 475 MLX5_CAP_ESW_FLOWTABLE_FDB(dev, push_vlan_2); 476 } 477 478 bool mlx5_esw_lag_prereq(struct mlx5_core_dev *dev0, 479 struct mlx5_core_dev *dev1); 480 bool mlx5_esw_multipath_prereq(struct mlx5_core_dev *dev0, 481 struct mlx5_core_dev *dev1); 482 483 const u32 *mlx5_esw_query_functions(struct mlx5_core_dev *dev); 484 485 #define MLX5_DEBUG_ESWITCH_MASK BIT(3) 486 487 #define esw_info(__dev, format, ...) \ 488 dev_info((__dev)->device, "E-Switch: " format, ##__VA_ARGS__) 489 490 #define esw_warn(__dev, format, ...) \ 491 dev_warn((__dev)->device, "E-Switch: " format, ##__VA_ARGS__) 492 493 #define esw_debug(dev, format, ...) \ 494 mlx5_core_dbg_mask(dev, MLX5_DEBUG_ESWITCH_MASK, format, ##__VA_ARGS__) 495 496 /* The returned number is valid only when the dev is eswitch manager. */ 497 static inline u16 mlx5_eswitch_manager_vport(struct mlx5_core_dev *dev) 498 { 499 return mlx5_core_is_ecpf_esw_manager(dev) ? 500 MLX5_VPORT_ECPF : MLX5_VPORT_PF; 501 } 502 503 static inline bool 504 mlx5_esw_is_manager_vport(const struct mlx5_eswitch *esw, u16 vport_num) 505 { 506 return esw->manager_vport == vport_num; 507 } 508 509 static inline u16 mlx5_eswitch_first_host_vport_num(struct mlx5_core_dev *dev) 510 { 511 return mlx5_core_is_ecpf_esw_manager(dev) ? 512 MLX5_VPORT_PF : MLX5_VPORT_FIRST_VF; 513 } 514 515 static inline bool mlx5_eswitch_is_funcs_handler(const struct mlx5_core_dev *dev) 516 { 517 return mlx5_core_is_ecpf_esw_manager(dev); 518 } 519 520 static inline int mlx5_eswitch_uplink_idx(struct mlx5_eswitch *esw) 521 { 522 /* Uplink always locate at the last element of the array.*/ 523 return esw->total_vports - 1; 524 } 525 526 static inline int mlx5_eswitch_ecpf_idx(struct mlx5_eswitch *esw) 527 { 528 return esw->total_vports - 2; 529 } 530 531 static inline int mlx5_eswitch_vport_num_to_index(struct mlx5_eswitch *esw, 532 u16 vport_num) 533 { 534 if (vport_num == MLX5_VPORT_ECPF) { 535 if (!mlx5_ecpf_vport_exists(esw->dev)) 536 esw_warn(esw->dev, "ECPF vport doesn't exist!\n"); 537 return mlx5_eswitch_ecpf_idx(esw); 538 } 539 540 if (vport_num == MLX5_VPORT_UPLINK) 541 return mlx5_eswitch_uplink_idx(esw); 542 543 return vport_num; 544 } 545 546 static inline u16 mlx5_eswitch_index_to_vport_num(struct mlx5_eswitch *esw, 547 int index) 548 { 549 if (index == mlx5_eswitch_ecpf_idx(esw) && 550 mlx5_ecpf_vport_exists(esw->dev)) 551 return MLX5_VPORT_ECPF; 552 553 if (index == mlx5_eswitch_uplink_idx(esw)) 554 return MLX5_VPORT_UPLINK; 555 556 return index; 557 } 558 559 static inline unsigned int 560 mlx5_esw_vport_to_devlink_port_index(const struct mlx5_core_dev *dev, 561 u16 vport_num) 562 { 563 return (MLX5_CAP_GEN(dev, vhca_id) << 16) | vport_num; 564 } 565 566 static inline u16 567 mlx5_esw_devlink_port_index_to_vport_num(unsigned int dl_port_index) 568 { 569 return dl_port_index & 0xffff; 570 } 571 572 /* TODO: This mlx5e_tc function shouldn't be called by eswitch */ 573 void mlx5e_tc_clean_fdb_peer_flows(struct mlx5_eswitch *esw); 574 575 /* The vport getter/iterator are only valid after esw->total_vports 576 * and vport->vport are initialized in mlx5_eswitch_init. 577 */ 578 #define mlx5_esw_for_all_vports(esw, i, vport) \ 579 for ((i) = MLX5_VPORT_PF; \ 580 (vport) = &(esw)->vports[i], \ 581 (i) < (esw)->total_vports; (i)++) 582 583 #define mlx5_esw_for_all_vports_reverse(esw, i, vport) \ 584 for ((i) = (esw)->total_vports - 1; \ 585 (vport) = &(esw)->vports[i], \ 586 (i) >= MLX5_VPORT_PF; (i)--) 587 588 #define mlx5_esw_for_each_vf_vport(esw, i, vport, nvfs) \ 589 for ((i) = MLX5_VPORT_FIRST_VF; \ 590 (vport) = &(esw)->vports[(i)], \ 591 (i) <= (nvfs); (i)++) 592 593 #define mlx5_esw_for_each_vf_vport_reverse(esw, i, vport, nvfs) \ 594 for ((i) = (nvfs); \ 595 (vport) = &(esw)->vports[(i)], \ 596 (i) >= MLX5_VPORT_FIRST_VF; (i)--) 597 598 /* The rep getter/iterator are only valid after esw->total_vports 599 * and vport->vport are initialized in mlx5_eswitch_init. 600 */ 601 #define mlx5_esw_for_all_reps(esw, i, rep) \ 602 for ((i) = MLX5_VPORT_PF; \ 603 (rep) = &(esw)->offloads.vport_reps[i], \ 604 (i) < (esw)->total_vports; (i)++) 605 606 #define mlx5_esw_for_each_vf_rep(esw, i, rep, nvfs) \ 607 for ((i) = MLX5_VPORT_FIRST_VF; \ 608 (rep) = &(esw)->offloads.vport_reps[i], \ 609 (i) <= (nvfs); (i)++) 610 611 #define mlx5_esw_for_each_vf_rep_reverse(esw, i, rep, nvfs) \ 612 for ((i) = (nvfs); \ 613 (rep) = &(esw)->offloads.vport_reps[i], \ 614 (i) >= MLX5_VPORT_FIRST_VF; (i)--) 615 616 #define mlx5_esw_for_each_vf_vport_num(esw, vport, nvfs) \ 617 for ((vport) = MLX5_VPORT_FIRST_VF; (vport) <= (nvfs); (vport)++) 618 619 #define mlx5_esw_for_each_vf_vport_num_reverse(esw, vport, nvfs) \ 620 for ((vport) = (nvfs); (vport) >= MLX5_VPORT_FIRST_VF; (vport)--) 621 622 /* Includes host PF (vport 0) if it's not esw manager. */ 623 #define mlx5_esw_for_each_host_func_rep(esw, i, rep, nvfs) \ 624 for ((i) = (esw)->first_host_vport; \ 625 (rep) = &(esw)->offloads.vport_reps[i], \ 626 (i) <= (nvfs); (i)++) 627 628 #define mlx5_esw_for_each_host_func_rep_reverse(esw, i, rep, nvfs) \ 629 for ((i) = (nvfs); \ 630 (rep) = &(esw)->offloads.vport_reps[i], \ 631 (i) >= (esw)->first_host_vport; (i)--) 632 633 #define mlx5_esw_for_each_host_func_vport(esw, vport, nvfs) \ 634 for ((vport) = (esw)->first_host_vport; \ 635 (vport) <= (nvfs); (vport)++) 636 637 #define mlx5_esw_for_each_host_func_vport_reverse(esw, vport, nvfs) \ 638 for ((vport) = (nvfs); \ 639 (vport) >= (esw)->first_host_vport; (vport)--) 640 641 struct mlx5_eswitch *mlx5_devlink_eswitch_get(struct devlink *devlink); 642 struct mlx5_vport *__must_check 643 mlx5_eswitch_get_vport(struct mlx5_eswitch *esw, u16 vport_num); 644 645 bool mlx5_eswitch_is_vf_vport(const struct mlx5_eswitch *esw, u16 vport_num); 646 647 int mlx5_esw_funcs_changed_handler(struct notifier_block *nb, unsigned long type, void *data); 648 649 int 650 mlx5_eswitch_enable_pf_vf_vports(struct mlx5_eswitch *esw, 651 enum mlx5_eswitch_vport_event enabled_events); 652 void mlx5_eswitch_disable_pf_vf_vports(struct mlx5_eswitch *esw); 653 654 int 655 esw_vport_create_offloads_acl_tables(struct mlx5_eswitch *esw, 656 struct mlx5_vport *vport); 657 void 658 esw_vport_destroy_offloads_acl_tables(struct mlx5_eswitch *esw, 659 struct mlx5_vport *vport); 660 661 int mlx5_esw_vport_tbl_get(struct mlx5_eswitch *esw); 662 void mlx5_esw_vport_tbl_put(struct mlx5_eswitch *esw); 663 664 struct mlx5_flow_handle * 665 esw_add_restore_rule(struct mlx5_eswitch *esw, u32 tag); 666 u32 667 esw_get_max_restore_tag(struct mlx5_eswitch *esw); 668 669 int esw_offloads_load_rep(struct mlx5_eswitch *esw, u16 vport_num); 670 void esw_offloads_unload_rep(struct mlx5_eswitch *esw, u16 vport_num); 671 672 int mlx5_eswitch_load_vport(struct mlx5_eswitch *esw, u16 vport_num, 673 enum mlx5_eswitch_vport_event enabled_events); 674 void mlx5_eswitch_unload_vport(struct mlx5_eswitch *esw, u16 vport_num); 675 676 int mlx5_eswitch_load_vf_vports(struct mlx5_eswitch *esw, u16 num_vfs, 677 enum mlx5_eswitch_vport_event enabled_events); 678 void mlx5_eswitch_unload_vf_vports(struct mlx5_eswitch *esw, u16 num_vfs); 679 680 #else /* CONFIG_MLX5_ESWITCH */ 681 /* eswitch API stubs */ 682 static inline int mlx5_eswitch_init(struct mlx5_core_dev *dev) { return 0; } 683 static inline void mlx5_eswitch_cleanup(struct mlx5_eswitch *esw) {} 684 static inline int mlx5_eswitch_enable(struct mlx5_eswitch *esw, int num_vfs) { return 0; } 685 static inline void mlx5_eswitch_disable(struct mlx5_eswitch *esw, bool clear_vf) {} 686 static inline bool mlx5_esw_lag_prereq(struct mlx5_core_dev *dev0, struct mlx5_core_dev *dev1) { return true; } 687 static inline bool mlx5_eswitch_is_funcs_handler(struct mlx5_core_dev *dev) { return false; } 688 static inline 689 int mlx5_eswitch_set_vport_state(struct mlx5_eswitch *esw, u16 vport, int link_state) { return 0; } 690 static inline const u32 *mlx5_esw_query_functions(struct mlx5_core_dev *dev) 691 { 692 return ERR_PTR(-EOPNOTSUPP); 693 } 694 695 static inline struct mlx5_flow_handle * 696 esw_add_restore_rule(struct mlx5_eswitch *esw, u32 tag) 697 { 698 return ERR_PTR(-EOPNOTSUPP); 699 } 700 #endif /* CONFIG_MLX5_ESWITCH */ 701 702 #endif /* __MLX5_ESWITCH_H__ */ 703