1 /* 2 * Copyright (c) 2015, Mellanox Technologies. All rights reserved. 3 * 4 * This software is available to you under a choice of one of two 5 * licenses. You may choose to be licensed under the terms of the GNU 6 * General Public License (GPL) Version 2, available from the file 7 * COPYING in the main directory of this source tree, or the 8 * OpenIB.org BSD license below: 9 * 10 * Redistribution and use in source and binary forms, with or 11 * without modification, are permitted provided that the following 12 * conditions are met: 13 * 14 * - Redistributions of source code must retain the above 15 * copyright notice, this list of conditions and the following 16 * disclaimer. 17 * 18 * - Redistributions in binary form must reproduce the above 19 * copyright notice, this list of conditions and the following 20 * disclaimer in the documentation and/or other materials 21 * provided with the distribution. 22 * 23 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, 24 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF 25 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND 26 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS 27 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN 28 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN 29 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE 30 * SOFTWARE. 31 */ 32 33 #include <linux/irq.h> 34 #include "en.h" 35 #include "en/txrx.h" 36 #include "en/xdp.h" 37 #include "en/xsk/rx.h" 38 #include "en/xsk/tx.h" 39 40 static inline bool mlx5e_channel_no_affinity_change(struct mlx5e_channel *c) 41 { 42 int current_cpu = smp_processor_id(); 43 44 return cpumask_test_cpu(current_cpu, c->aff_mask); 45 } 46 47 static void mlx5e_handle_tx_dim(struct mlx5e_txqsq *sq) 48 { 49 struct mlx5e_sq_stats *stats = sq->stats; 50 struct dim_sample dim_sample = {}; 51 52 if (unlikely(!test_bit(MLX5E_SQ_STATE_AM, &sq->state))) 53 return; 54 55 dim_update_sample(sq->cq.event_ctr, stats->packets, stats->bytes, &dim_sample); 56 net_dim(&sq->dim, dim_sample); 57 } 58 59 static void mlx5e_handle_rx_dim(struct mlx5e_rq *rq) 60 { 61 struct mlx5e_rq_stats *stats = rq->stats; 62 struct dim_sample dim_sample = {}; 63 64 if (unlikely(!test_bit(MLX5E_RQ_STATE_AM, &rq->state))) 65 return; 66 67 dim_update_sample(rq->cq.event_ctr, stats->packets, stats->bytes, &dim_sample); 68 net_dim(&rq->dim, dim_sample); 69 } 70 71 void mlx5e_trigger_irq(struct mlx5e_icosq *sq) 72 { 73 struct mlx5_wq_cyc *wq = &sq->wq; 74 struct mlx5e_tx_wqe *nopwqe; 75 u16 pi = mlx5_wq_cyc_ctr2ix(wq, sq->pc); 76 77 sq->db.wqe_info[pi] = (struct mlx5e_icosq_wqe_info) { 78 .wqe_type = MLX5E_ICOSQ_WQE_NOP, 79 .num_wqebbs = 1, 80 }; 81 82 nopwqe = mlx5e_post_nop(wq, sq->sqn, &sq->pc); 83 mlx5e_notify_hw(wq, sq->pc, sq->uar_map, &nopwqe->ctrl); 84 } 85 86 static bool mlx5e_napi_xsk_post(struct mlx5e_xdpsq *xsksq, struct mlx5e_rq *xskrq) 87 { 88 bool busy_xsk = false, xsk_rx_alloc_err; 89 90 /* Handle the race between the application querying need_wakeup and the 91 * driver setting it: 92 * 1. Update need_wakeup both before and after the TX. If it goes to 93 * "yes", it can only happen with the first update. 94 * 2. If the application queried need_wakeup before we set it, the 95 * packets will be transmitted anyway, even w/o a wakeup. 96 * 3. Give a chance to clear need_wakeup after new packets were queued 97 * for TX. 98 */ 99 mlx5e_xsk_update_tx_wakeup(xsksq); 100 busy_xsk |= mlx5e_xsk_tx(xsksq, MLX5E_TX_XSK_POLL_BUDGET); 101 mlx5e_xsk_update_tx_wakeup(xsksq); 102 103 xsk_rx_alloc_err = INDIRECT_CALL_2(xskrq->post_wqes, 104 mlx5e_post_rx_mpwqes, 105 mlx5e_post_rx_wqes, 106 xskrq); 107 busy_xsk |= mlx5e_xsk_update_rx_wakeup(xskrq, xsk_rx_alloc_err); 108 109 return busy_xsk; 110 } 111 112 int mlx5e_napi_poll(struct napi_struct *napi, int budget) 113 { 114 struct mlx5e_channel *c = container_of(napi, struct mlx5e_channel, 115 napi); 116 struct mlx5e_ch_stats *ch_stats = c->stats; 117 struct mlx5e_xdpsq *xsksq = &c->xsksq; 118 struct mlx5e_txqsq __rcu **qos_sqs; 119 struct mlx5e_rq *xskrq = &c->xskrq; 120 struct mlx5e_rq *rq = &c->rq; 121 bool aff_change = false; 122 bool busy_xsk = false; 123 bool busy = false; 124 int work_done = 0; 125 u16 qos_sqs_size; 126 bool xsk_open; 127 int i; 128 129 rcu_read_lock(); 130 131 qos_sqs = rcu_dereference(c->qos_sqs); 132 133 xsk_open = test_bit(MLX5E_CHANNEL_STATE_XSK, c->state); 134 135 ch_stats->poll++; 136 137 for (i = 0; i < c->num_tc; i++) 138 busy |= mlx5e_poll_tx_cq(&c->sq[i].cq, budget); 139 140 if (unlikely(qos_sqs)) { 141 smp_rmb(); /* Pairs with mlx5e_qos_alloc_queues. */ 142 qos_sqs_size = READ_ONCE(c->qos_sqs_size); 143 144 for (i = 0; i < qos_sqs_size; i++) { 145 struct mlx5e_txqsq *sq = rcu_dereference(qos_sqs[i]); 146 147 if (sq) 148 busy |= mlx5e_poll_tx_cq(&sq->cq, budget); 149 } 150 } 151 152 busy |= mlx5e_poll_xdpsq_cq(&c->xdpsq.cq); 153 154 if (c->xdp) 155 busy |= mlx5e_poll_xdpsq_cq(&c->rq_xdpsq.cq); 156 157 if (likely(budget)) { /* budget=0 means: don't poll rx rings */ 158 if (xsk_open) 159 work_done = mlx5e_poll_rx_cq(&xskrq->cq, budget); 160 161 if (likely(budget - work_done)) 162 work_done += mlx5e_poll_rx_cq(&rq->cq, budget - work_done); 163 164 busy |= work_done == budget; 165 } 166 167 mlx5e_poll_ico_cq(&c->icosq.cq); 168 if (mlx5e_poll_ico_cq(&c->async_icosq.cq)) 169 /* Don't clear the flag if nothing was polled to prevent 170 * queueing more WQEs and overflowing the async ICOSQ. 171 */ 172 clear_bit(MLX5E_SQ_STATE_PENDING_XSK_TX, &c->async_icosq.state); 173 174 busy |= INDIRECT_CALL_2(rq->post_wqes, 175 mlx5e_post_rx_mpwqes, 176 mlx5e_post_rx_wqes, 177 rq); 178 if (xsk_open) { 179 busy |= mlx5e_poll_xdpsq_cq(&xsksq->cq); 180 busy_xsk |= mlx5e_napi_xsk_post(xsksq, xskrq); 181 } 182 183 busy |= busy_xsk; 184 185 if (busy) { 186 if (likely(mlx5e_channel_no_affinity_change(c))) { 187 work_done = budget; 188 goto out; 189 } 190 ch_stats->aff_change++; 191 aff_change = true; 192 if (budget && work_done == budget) 193 work_done--; 194 } 195 196 if (unlikely(!napi_complete_done(napi, work_done))) 197 goto out; 198 199 ch_stats->arm++; 200 201 for (i = 0; i < c->num_tc; i++) { 202 mlx5e_handle_tx_dim(&c->sq[i]); 203 mlx5e_cq_arm(&c->sq[i].cq); 204 } 205 if (unlikely(qos_sqs)) { 206 for (i = 0; i < qos_sqs_size; i++) { 207 struct mlx5e_txqsq *sq = rcu_dereference(qos_sqs[i]); 208 209 if (sq) { 210 mlx5e_handle_tx_dim(sq); 211 mlx5e_cq_arm(&sq->cq); 212 } 213 } 214 } 215 216 mlx5e_handle_rx_dim(rq); 217 218 mlx5e_cq_arm(&rq->cq); 219 mlx5e_cq_arm(&c->icosq.cq); 220 mlx5e_cq_arm(&c->async_icosq.cq); 221 mlx5e_cq_arm(&c->xdpsq.cq); 222 223 if (xsk_open) { 224 mlx5e_handle_rx_dim(xskrq); 225 mlx5e_cq_arm(&xsksq->cq); 226 mlx5e_cq_arm(&xskrq->cq); 227 } 228 229 if (unlikely(aff_change && busy_xsk)) { 230 mlx5e_trigger_irq(&c->icosq); 231 ch_stats->force_irq++; 232 } 233 234 out: 235 rcu_read_unlock(); 236 237 return work_done; 238 } 239 240 void mlx5e_completion_event(struct mlx5_core_cq *mcq, struct mlx5_eqe *eqe) 241 { 242 struct mlx5e_cq *cq = container_of(mcq, struct mlx5e_cq, mcq); 243 244 napi_schedule(cq->napi); 245 cq->event_ctr++; 246 cq->ch_stats->events++; 247 } 248 249 void mlx5e_cq_error_event(struct mlx5_core_cq *mcq, enum mlx5_event event) 250 { 251 struct mlx5e_cq *cq = container_of(mcq, struct mlx5e_cq, mcq); 252 struct net_device *netdev = cq->netdev; 253 254 netdev_err(netdev, "%s: cqn=0x%.6x event=0x%.2x\n", 255 __func__, mcq->cqn, event); 256 } 257